1a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish/** @file 2a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 33d70643bbd4d6be9b3607b470e7c9aeb700d4ef4hhtian Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> 43402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 53d70643bbd4d6be9b3607b470e7c9aeb700d4ef4hhtian This program and the accompanying materials 6a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish are licensed and made available under the terms and conditions of the BSD License 7a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish which accompanies this distribution. The full text of the license may be found at 8a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish http://opensource.org/licenses/bsd-license.php 9a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 10a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 13a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish**/ 14a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 15a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish#include "PciEmulation.h" 16a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 17a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishBOOLEAN 18a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishPciRootBridgeMemAddressValid ( 19a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN PCI_ROOT_BRIDGE *Private, 20a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINT64 Address 21a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish ) 22a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish{ 23a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish if ((Address >= Private->MemoryStart) && (Address < (Private->MemoryStart + Private->MemorySize))) { 24a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return TRUE; 25a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 26a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 27a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return FALSE; 28a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish} 29a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 30a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 31a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishEFI_STATUS 32a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishPciRootBridgeIoMemRW ( 33a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 34a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINTN Count, 35a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN BOOLEAN InStrideFlag, 36a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN PTR In, 37a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN BOOLEAN OutStrideFlag, 38a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish OUT PTR Out 39a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish ) 40a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish{ 41a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish UINTN Stride; 42a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish UINTN InStride; 43a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish UINTN OutStride; 44a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 45a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 46a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish Width = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03); 47a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish Stride = (UINTN)1 << Width; 48a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish InStride = InStrideFlag ? Stride : 0; 49a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish OutStride = OutStrideFlag ? Stride : 0; 50a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 51a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish // 52a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish // Loop for each iteration and move the data 53a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish // 54a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish switch (Width) { 55a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint8: 56a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish for (;Count > 0; Count--, In.buf += InStride, Out.buf += OutStride) { 57a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish *In.ui8 = *Out.ui8; 58a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 59a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish break; 60a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint16: 61a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish for (;Count > 0; Count--, In.buf += InStride, Out.buf += OutStride) { 62a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish *In.ui16 = *Out.ui16; 63a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 64a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish break; 65a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint32: 66a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish for (;Count > 0; Count--, In.buf += InStride, Out.buf += OutStride) { 67a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish *In.ui32 = *Out.ui32; 68a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 69a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish break; 70a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish default: 71a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 72a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 73a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 74a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_SUCCESS; 75a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish} 76a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 77a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishEFI_STATUS 78a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishPciRootBridgeIoPciRW ( 79a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 80a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN BOOLEAN Write, 81a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 82a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINT64 UserAddress, 83a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINTN Count, 84a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN OUT VOID *UserBuffer 85a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish ) 86a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish{ 87a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_SUCCESS; 88a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish} 89a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 903402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron/** 91a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. 923402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 93a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 94a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Width Signifies the width of the memory operations. 953402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron @param Address The base address of the memory operations. 96a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Count The number of memory operations to perform. 97a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Buffer For read operations, the destination buffer to store the results. For write 983402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron operations, the source buffer to write data from. 993402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 1003402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. 101a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 102a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 1033402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 104a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish**/ 105a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishEFI_STATUS 106a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishEFIAPI 107a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishPciRootBridgeIoMemRead ( 108a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 109a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 110a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINT64 Address, 111a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINTN Count, 112a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN OUT VOID *Buffer 113a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish ) 114a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish{ 115a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish PCI_ROOT_BRIDGE *Private; 116a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish UINTN AlignMask; 117a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish PTR In; 118a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish PTR Out; 119a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 120a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish if ( Buffer == NULL ) { 121a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 122a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 1233402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 124a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish Private = INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This); 125a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 126a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish if (!PciRootBridgeMemAddressValid (Private, Address)) { 127a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 128a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 129a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 130a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish AlignMask = (1 << (Width & 0x03)) - 1; 131a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish if (Address & AlignMask) { 132a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 133a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 134a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 135a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish In.buf = Buffer; 136a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish Out.buf = (VOID *)(UINTN) Address; 137a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 138a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish switch (Width) { 139a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint8: 140a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint16: 141a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint32: 142a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint64: 143a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out); 144a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 145a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFifoUint8: 146a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFifoUint16: 147a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFifoUint32: 148a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFifoUint64: 149a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out); 150a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 151a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFillUint8: 152a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFillUint16: 153a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFillUint32: 154a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFillUint64: 155a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out); 1563402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 157a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish default: 158a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish break; 159a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 1603402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 161a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 162a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish} 163a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 164a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 165a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 1663402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron/** 167a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. 1683402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 169a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 170a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Width Signifies the width of the memory operations. 1713402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron @param Address The base address of the memory operations. 172a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Count The number of memory operations to perform. 173a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Buffer For read operations, the destination buffer to store the results. For write 1743402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron operations, the source buffer to write data from. 1753402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 1763402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. 177a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 178a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 1793402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 180a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish**/ 181a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishEFI_STATUS 182a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishEFIAPI 183a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishPciRootBridgeIoMemWrite ( 184a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 185a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 186a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINT64 Address, 187a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINTN Count, 188a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN OUT VOID *Buffer 189a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish ) 190a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish{ 191a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish PCI_ROOT_BRIDGE *Private; 192a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish UINTN AlignMask; 193a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish PTR In; 194a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish PTR Out; 195a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 196a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish if ( Buffer == NULL ) { 197a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 198a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 1993402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 200a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish Private = INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This); 201a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 202a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish if (!PciRootBridgeMemAddressValid (Private, Address)) { 203a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 204a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 205a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 206a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish AlignMask = (1 << (Width & 0x03)) - 1; 207a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish if (Address & AlignMask) { 208a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 209a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 210a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 211a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish In.buf = (VOID *)(UINTN) Address; 212a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish Out.buf = Buffer; 213a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 214a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish switch (Width) { 215a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint8: 216a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint16: 217a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint32: 218a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthUint64: 219a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out); 2203402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 221a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFifoUint8: 222a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFifoUint16: 223a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFifoUint32: 224a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFifoUint64: 225a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out); 226a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 227a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFillUint8: 228a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFillUint16: 229a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFillUint32: 230a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish case EfiPciWidthFillUint64: 231a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out); 2323402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 233a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish default: 234a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish break; 235a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 236a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 237a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 238a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish} 239a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 2403402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron/** 241a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. 2423402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 243a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 244a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Width Signifies the width of the memory operations. 2453402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron @param Address The base address of the memory operations. 246a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Count The number of memory operations to perform. 247a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Buffer For read operations, the destination buffer to store the results. For write 2483402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron operations, the source buffer to write data from. 2493402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 2503402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. 251a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 252a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 2533402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 254a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish**/ 255a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishEFI_STATUS 256a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishEFIAPI 257a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishPciRootBridgeIoPciRead ( 258a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 259a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 260a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINT64 Address, 261a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINTN Count, 262a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN OUT VOID *Buffer 263a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish ) 264a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish{ 265a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish if (Buffer == NULL) { 266a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 267a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 268a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 269a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return PciRootBridgeIoPciRW (This, FALSE, Width, Address, Count, Buffer); 270a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish} 271a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 272a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 273a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 2743402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron/** 275a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. 2763402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 277a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 278a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Width Signifies the width of the memory operations. 2793402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron @param Address The base address of the memory operations. 280a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Count The number of memory operations to perform. 281a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @param Buffer For read operations, the destination buffer to store the results. For write 2823402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron operations, the source buffer to write data from. 2833402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 2843402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. 285a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 286a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 2873402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 288a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish**/ 289a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishEFI_STATUS 290a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishEFIAPI 291a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfishPciRootBridgeIoPciWrite ( 292a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 293a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 294a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINT64 Address, 295a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN UINTN Count, 296a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish IN OUT VOID *Buffer 297a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish ) 298a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish{ 299a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish if (Buffer == NULL) { 300a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return EFI_INVALID_PARAMETER; 301a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish } 3023402aac7d985bf8a9f9d3c639f3fe93609380513Ronald Cron 303a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish return PciRootBridgeIoPciRW (This, TRUE, Width, Address, Count, Buffer); 304a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish} 305a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 306a3f98646f68239bf9c577b24689bc69cbcde1b47andrewfish 307