1b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// RUN: %clang_cc1 -triple s390x-linux-gnu \
2b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// RUN:   -emit-llvm -o - %s | FileCheck %s
3b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// RUN: %clang_cc1 -triple s390x-linux-gnu -target-feature +vector \
4b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// RUN:   -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-VECTOR %s
5b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu z13 \
6b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// RUN:   -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-VECTOR %s
758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// Vector types
958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
1058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(1))) char v1i8;
1158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
1258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(2))) char v2i8;
1358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(2))) short v1i16;
1458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
1558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(4))) char v4i8;
1658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(4))) short v2i16;
1758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(4))) int v1i32;
1858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(4))) float v1f32;
1958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
2058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(8))) char v8i8;
2158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(8))) short v4i16;
2258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(8))) int v2i32;
2358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(8))) long long v1i64;
2458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(8))) float v2f32;
2558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(8))) double v1f64;
2658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
2758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(16))) char v16i8;
2858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(16))) short v8i16;
2958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(16))) int v4i32;
3058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(16))) long long v2i64;
3158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(16))) __int128 v1i128;
3258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(16))) float v4f32;
3358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(16))) double v2f64;
3458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(16))) long double v1f128;
3558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
3658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainartypedef __attribute__((vector_size(32))) char v32i8;
3758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
38b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarunsigned int align = __alignof__ (v16i8);
39b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: @align = global i32 16
40b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: @align = global i32 8
41b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
4258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv1i8 pass_v1i8(v1i8 arg) { return arg; }
4358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v1i8(<1 x i8>* noalias sret %{{.*}}, <1 x i8>*)
44b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <1 x i8> @pass_v1i8(<1 x i8> %{{.*}})
4558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
4658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv2i8 pass_v2i8(v2i8 arg) { return arg; }
4758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v2i8(<2 x i8>* noalias sret %{{.*}}, <2 x i8>*)
48b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <2 x i8> @pass_v2i8(<2 x i8> %{{.*}})
4958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
5058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv4i8 pass_v4i8(v4i8 arg) { return arg; }
5158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v4i8(<4 x i8>* noalias sret %{{.*}}, <4 x i8>*)
52b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <4 x i8> @pass_v4i8(<4 x i8> %{{.*}})
5358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
5458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv8i8 pass_v8i8(v8i8 arg) { return arg; }
5558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v8i8(<8 x i8>* noalias sret %{{.*}}, <8 x i8>*)
56b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <8 x i8> @pass_v8i8(<8 x i8> %{{.*}})
5758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
5858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv16i8 pass_v16i8(v16i8 arg) { return arg; }
5958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v16i8(<16 x i8>* noalias sret %{{.*}}, <16 x i8>*)
60b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <16 x i8> @pass_v16i8(<16 x i8> %{{.*}})
6158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
6258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv32i8 pass_v32i8(v32i8 arg) { return arg; }
6358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v32i8(<32 x i8>* noalias sret %{{.*}}, <32 x i8>*)
64b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_v32i8(<32 x i8>* noalias sret %{{.*}}, <32 x i8>*)
6558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
6658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv1i16 pass_v1i16(v1i16 arg) { return arg; }
6758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v1i16(<1 x i16>* noalias sret %{{.*}}, <1 x i16>*)
68b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <1 x i16> @pass_v1i16(<1 x i16> %{{.*}})
6958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
7058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv2i16 pass_v2i16(v2i16 arg) { return arg; }
7158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v2i16(<2 x i16>* noalias sret %{{.*}}, <2 x i16>*)
72b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <2 x i16> @pass_v2i16(<2 x i16> %{{.*}})
7358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
7458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv4i16 pass_v4i16(v4i16 arg) { return arg; }
7558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v4i16(<4 x i16>* noalias sret %{{.*}}, <4 x i16>*)
76b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <4 x i16> @pass_v4i16(<4 x i16> %{{.*}})
7758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
7858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv8i16 pass_v8i16(v8i16 arg) { return arg; }
7958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v8i16(<8 x i16>* noalias sret %{{.*}}, <8 x i16>*)
80b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <8 x i16> @pass_v8i16(<8 x i16> %{{.*}})
8158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
8258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv1i32 pass_v1i32(v1i32 arg) { return arg; }
8358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v1i32(<1 x i32>* noalias sret %{{.*}}, <1 x i32>*)
84b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <1 x i32> @pass_v1i32(<1 x i32> %{{.*}})
8558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
8658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv2i32 pass_v2i32(v2i32 arg) { return arg; }
8758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v2i32(<2 x i32>* noalias sret %{{.*}}, <2 x i32>*)
88b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <2 x i32> @pass_v2i32(<2 x i32> %{{.*}})
8958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
9058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv4i32 pass_v4i32(v4i32 arg) { return arg; }
9158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v4i32(<4 x i32>* noalias sret %{{.*}}, <4 x i32>*)
92b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <4 x i32> @pass_v4i32(<4 x i32> %{{.*}})
9358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
9458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv1i64 pass_v1i64(v1i64 arg) { return arg; }
9558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v1i64(<1 x i64>* noalias sret %{{.*}}, <1 x i64>*)
96b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <1 x i64> @pass_v1i64(<1 x i64> %{{.*}})
9758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
9858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv2i64 pass_v2i64(v2i64 arg) { return arg; }
9958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v2i64(<2 x i64>* noalias sret %{{.*}}, <2 x i64>*)
100b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <2 x i64> @pass_v2i64(<2 x i64> %{{.*}})
10158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
10258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv1i128 pass_v1i128(v1i128 arg) { return arg; }
10358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v1i128(<1 x i128>* noalias sret %{{.*}}, <1 x i128>*)
104b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <1 x i128> @pass_v1i128(<1 x i128> %{{.*}})
10558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
10658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv1f32 pass_v1f32(v1f32 arg) { return arg; }
10758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v1f32(<1 x float>* noalias sret %{{.*}}, <1 x float>*)
108b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <1 x float> @pass_v1f32(<1 x float> %{{.*}})
10958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
11058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv2f32 pass_v2f32(v2f32 arg) { return arg; }
11158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v2f32(<2 x float>* noalias sret %{{.*}}, <2 x float>*)
112b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <2 x float> @pass_v2f32(<2 x float> %{{.*}})
11358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
11458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv4f32 pass_v4f32(v4f32 arg) { return arg; }
11558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v4f32(<4 x float>* noalias sret %{{.*}}, <4 x float>*)
116b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <4 x float> @pass_v4f32(<4 x float> %{{.*}})
11758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
11858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv1f64 pass_v1f64(v1f64 arg) { return arg; }
11958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v1f64(<1 x double>* noalias sret %{{.*}}, <1 x double>*)
120b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <1 x double> @pass_v1f64(<1 x double> %{{.*}})
12158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
12258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv2f64 pass_v2f64(v2f64 arg) { return arg; }
12358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v2f64(<2 x double>* noalias sret %{{.*}}, <2 x double>*)
124b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <2 x double> @pass_v2f64(<2 x double> %{{.*}})
12558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
12658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv1f128 pass_v1f128(v1f128 arg) { return arg; }
12758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_v1f128(<1 x fp128>* noalias sret %{{.*}}, <1 x fp128>*)
128b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <1 x fp128> @pass_v1f128(<1 x fp128> %{{.*}})
129b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
130b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
131b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// Vector-like aggregate types
132b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
133b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v1i8 { v1i8 a; };
134b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v1i8 pass_agg_v1i8(struct agg_v1i8 arg) { return arg; }
135b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_agg_v1i8(%struct.agg_v1i8* noalias sret %{{.*}}, i8 %{{.*}})
136b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_agg_v1i8(%struct.agg_v1i8* noalias sret %{{.*}}, <1 x i8> %{{.*}})
137b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
138b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v2i8 { v2i8 a; };
139b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v2i8 pass_agg_v2i8(struct agg_v2i8 arg) { return arg; }
140b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_agg_v2i8(%struct.agg_v2i8* noalias sret %{{.*}}, i16 %{{.*}})
141b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_agg_v2i8(%struct.agg_v2i8* noalias sret %{{.*}}, <2 x i8> %{{.*}})
142b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
143b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v4i8 { v4i8 a; };
144b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v4i8 pass_agg_v4i8(struct agg_v4i8 arg) { return arg; }
145b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_agg_v4i8(%struct.agg_v4i8* noalias sret %{{.*}}, i32 %{{.*}})
146b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_agg_v4i8(%struct.agg_v4i8* noalias sret %{{.*}}, <4 x i8> %{{.*}})
147b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
148b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v8i8 { v8i8 a; };
149b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v8i8 pass_agg_v8i8(struct agg_v8i8 arg) { return arg; }
150b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_agg_v8i8(%struct.agg_v8i8* noalias sret %{{.*}}, i64 %{{.*}})
151b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_agg_v8i8(%struct.agg_v8i8* noalias sret %{{.*}}, <8 x i8> %{{.*}})
152b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
153b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v16i8 { v16i8 a; };
154b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v16i8 pass_agg_v16i8(struct agg_v16i8 arg) { return arg; }
155b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_agg_v16i8(%struct.agg_v16i8* noalias sret %{{.*}}, %struct.agg_v16i8* %{{.*}})
156b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_agg_v16i8(%struct.agg_v16i8* noalias sret %{{.*}}, <16 x i8> %{{.*}})
157b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
158b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v32i8 { v32i8 a; };
159b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v32i8 pass_agg_v32i8(struct agg_v32i8 arg) { return arg; }
160b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_agg_v32i8(%struct.agg_v32i8* noalias sret %{{.*}}, %struct.agg_v32i8* %{{.*}})
161b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_agg_v32i8(%struct.agg_v32i8* noalias sret %{{.*}}, %struct.agg_v32i8* %{{.*}})
162b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
163b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
164b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// Verify that the following are *not* vector-like aggregate types
165b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
166b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_novector1 { v4i8 a; v4i8 b; };
167b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_novector1 pass_agg_novector1(struct agg_novector1 arg) { return arg; }
168b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_agg_novector1(%struct.agg_novector1* noalias sret %{{.*}}, i64 %{{.*}})
169b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_agg_novector1(%struct.agg_novector1* noalias sret %{{.*}}, i64 %{{.*}})
170b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
171b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_novector2 { v4i8 a; float b; };
172b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_novector2 pass_agg_novector2(struct agg_novector2 arg) { return arg; }
173b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_agg_novector2(%struct.agg_novector2* noalias sret %{{.*}}, i64 %{{.*}})
174b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_agg_novector2(%struct.agg_novector2* noalias sret %{{.*}}, i64 %{{.*}})
175b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
176b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_novector3 { v4i8 a; int : 0; };
177b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_novector3 pass_agg_novector3(struct agg_novector3 arg) { return arg; }
178b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_agg_novector3(%struct.agg_novector3* noalias sret %{{.*}}, i32 %{{.*}})
179b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_agg_novector3(%struct.agg_novector3* noalias sret %{{.*}}, i32 %{{.*}})
180b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
181b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_novector4 { v4i8 a __attribute__((aligned (8))); };
182b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_novector4 pass_agg_novector4(struct agg_novector4 arg) { return arg; }
183b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @pass_agg_novector4(%struct.agg_novector4* noalias sret %{{.*}}, i64 %{{.*}})
184b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @pass_agg_novector4(%struct.agg_novector4* noalias sret %{{.*}}, i64 %{{.*}})
18558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
18658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
18758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// Accessing variable argument lists
18858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
18958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv1i8 va_v1i8(__builtin_va_list l) { return __builtin_va_arg(l, v1i8); }
19058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @va_v1i8(<1 x i8>* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
19158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
19258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
19358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
19458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
19558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
19658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
19758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
19858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
19958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
20058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to <1 x i8>**
20158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
20258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
20358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
20458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
20558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
20658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to <1 x i8>**
20758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
20858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
20958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <1 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
21058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <1 x i8>*, <1 x i8>** [[VA_ARG_ADDR]]
21158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: ret void
212b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <1 x i8> @va_v1i8(%struct.__va_list_tag* %{{.*}})
213b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
214b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
215b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <1 x i8>*
216b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA1:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
217b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA1]], i8** [[OVERFLOW_ARG_AREA_PTR]]
218b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[RET:%[^ ]+]] = load <1 x i8>, <1 x i8>* [[MEM_ADDR]]
219b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret <1 x i8> [[RET]]
22058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
22158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv2i8 va_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, v2i8); }
22258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @va_v2i8(<2 x i8>* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
22358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
22458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
22558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
22658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
22758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
22858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
22958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
23058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
23158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
23258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to <2 x i8>**
23358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
23458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
23558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
23658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
23758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
23858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to <2 x i8>**
23958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
24058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
24158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <2 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
24258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <2 x i8>*, <2 x i8>** [[VA_ARG_ADDR]]
24358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: ret void
244b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <2 x i8> @va_v2i8(%struct.__va_list_tag* %{{.*}})
245b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
246b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
247b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <2 x i8>*
248b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA1:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
249b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA1]], i8** [[OVERFLOW_ARG_AREA_PTR]]
250b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[RET:%[^ ]+]] = load <2 x i8>, <2 x i8>* [[MEM_ADDR]]
251b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret <2 x i8> [[RET]]
25258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
25358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv4i8 va_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, v4i8); }
25458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @va_v4i8(<4 x i8>* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
25558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
25658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
25758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
25858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
25958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
26058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
26158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
26258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
26358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
26458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to <4 x i8>**
26558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
26658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
26758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
26858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
26958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
27058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to <4 x i8>**
27158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
27258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
27358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <4 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
27458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <4 x i8>*, <4 x i8>** [[VA_ARG_ADDR]]
27558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: ret void
276b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <4 x i8> @va_v4i8(%struct.__va_list_tag* %{{.*}})
277b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
278b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
279b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <4 x i8>*
280b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA1:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
281b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA1]], i8** [[OVERFLOW_ARG_AREA_PTR]]
282b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[RET:%[^ ]+]] = load <4 x i8>, <4 x i8>* [[MEM_ADDR]]
283b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret <4 x i8> [[RET]]
28458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
28558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv8i8 va_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, v8i8); }
28658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @va_v8i8(<8 x i8>* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
28758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
28858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
28958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
29058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
29158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
29258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
29358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
29458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
29558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
29658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to <8 x i8>**
29758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
29858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
29958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
30058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
30158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
30258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to <8 x i8>**
30358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
30458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
30558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <8 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
30658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <8 x i8>*, <8 x i8>** [[VA_ARG_ADDR]]
30758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: ret void
308b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <8 x i8> @va_v8i8(%struct.__va_list_tag* %{{.*}})
309b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
310b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
311b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <8 x i8>*
312b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA1:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
313b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA1]], i8** [[OVERFLOW_ARG_AREA_PTR]]
314b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[RET:%[^ ]+]] = load <8 x i8>, <8 x i8>* [[MEM_ADDR]]
315b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret <8 x i8> [[RET]]
31658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
31758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv16i8 va_v16i8(__builtin_va_list l) { return __builtin_va_arg(l, v16i8); }
31858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @va_v16i8(<16 x i8>* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
31958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
32058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
32158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
32258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
32358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
32458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
32558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
32658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
32758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
32858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to <16 x i8>**
32958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
33058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
33158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
33258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
33358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
33458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to <16 x i8>**
33558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
33658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
33758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <16 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
33858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <16 x i8>*, <16 x i8>** [[VA_ARG_ADDR]]
33958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: ret void
340b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define <16 x i8> @va_v16i8(%struct.__va_list_tag* %{{.*}})
341b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
342b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
343b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <16 x i8>*
344b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA1:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 16
345b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA1]], i8** [[OVERFLOW_ARG_AREA_PTR]]
346b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[RET:%[^ ]+]] = load <16 x i8>, <16 x i8>* [[MEM_ADDR]]
347b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret <16 x i8> [[RET]]
34858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar
34958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainarv32i8 va_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, v32i8); }
35058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK-LABEL: define void @va_v32i8(<32 x i8>* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
35158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
35258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
35358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
35458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
35558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
35658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
35758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
35858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
35958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
36058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to <32 x i8>**
36158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
36258878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
36358878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
36458878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
36558878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
36658878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to <32 x i8>**
36758878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
36858878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
36958878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <32 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
37058878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <32 x i8>*, <32 x i8>** [[VA_ARG_ADDR]]
37158878f85ab89b13e9eea4af3ccf055e42c557bc8Pirama Arumuga Nainar// CHECK: ret void
372b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @va_v32i8(<32 x i8>* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
373b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
374b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
375b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
376b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: br i1 [[FITS_IN_REGS]],
377b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
378b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
379b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
380b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
381b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
382b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to <32 x i8>**
383b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
384b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
385b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
386b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
387b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
388b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to <32 x i8>**
389b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
390b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
391b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[VA_ARG_ADDR:%[^ ]+]] = phi <32 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
392b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[INDIRECT_ARG:%[^ ]+]] = load <32 x i8>*, <32 x i8>** [[VA_ARG_ADDR]]
393b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret void
394b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
395b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v1i8 va_agg_v1i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v1i8); }
396b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @va_agg_v1i8(%struct.agg_v1i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
397b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
398b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
399b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
400b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
401b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
402b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 23
403b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
404b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
405b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
406b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to %struct.agg_v1i8*
407b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
408b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
409b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
410b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
411b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 7
412b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to %struct.agg_v1i8*
413b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
414b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
415b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v1i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
416b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: ret void
417b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @va_agg_v1i8(%struct.agg_v1i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
418b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
419b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
420b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v1i8*
421b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA1:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
422b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA1]], i8** [[OVERFLOW_ARG_AREA_PTR]]
423b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret void
424b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
425b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v2i8 va_agg_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v2i8); }
426b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @va_agg_v2i8(%struct.agg_v2i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
427b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
428b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
429b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
430b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
431b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
432b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 22
433b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
434b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
435b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
436b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to %struct.agg_v2i8*
437b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
438b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
439b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
440b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
441b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 6
442b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to %struct.agg_v2i8*
443b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
444b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
445b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v2i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
446b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: ret void
447b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @va_agg_v2i8(%struct.agg_v2i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
448b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
449b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
450b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v2i8*
451b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA1:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
452b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA1]], i8** [[OVERFLOW_ARG_AREA_PTR]]
453b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret void
454b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
455b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v4i8 va_agg_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v4i8); }
456b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @va_agg_v4i8(%struct.agg_v4i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
457b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
458b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
459b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
460b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
461b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
462b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 20
463b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
464b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
465b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
466b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to %struct.agg_v4i8*
467b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
468b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
469b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
470b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
471b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 4
472b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to %struct.agg_v4i8*
473b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
474b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
475b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v4i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
476b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: ret void
477b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @va_agg_v4i8(%struct.agg_v4i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
478b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
479b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
480b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v4i8*
481b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA1:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
482b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA1]], i8** [[OVERFLOW_ARG_AREA_PTR]]
483b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret void
484b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
485b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v8i8 va_agg_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v8i8); }
486b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @va_agg_v8i8(%struct.agg_v8i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
487b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
488b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
489b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
490b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
491b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
492b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
493b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
494b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
495b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
496b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to %struct.agg_v8i8*
497b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
498b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
499b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
500b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
501b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
502b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to %struct.agg_v8i8*
503b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
504b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
505b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v8i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
506b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: ret void
507b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @va_agg_v8i8(%struct.agg_v8i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
508b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
509b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
510b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v8i8*
511b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA1:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
512b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA1]], i8** [[OVERFLOW_ARG_AREA_PTR]]
513b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret void
514b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
515b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v16i8 va_agg_v16i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v16i8); }
516b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @va_agg_v16i8(%struct.agg_v16i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
517b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
518b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
519b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
520b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
521b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
522b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
523b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
524b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
525b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
526b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to %struct.agg_v16i8**
527b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
528b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
529b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
530b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
531b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
532b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to %struct.agg_v16i8**
533b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
534b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
535b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v16i8** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
536b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load %struct.agg_v16i8*, %struct.agg_v16i8** [[VA_ARG_ADDR]]
537b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: ret void
538b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @va_agg_v16i8(%struct.agg_v16i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
539b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
540b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
541b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v16i8*
542b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA1:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 16
543b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA1]], i8** [[OVERFLOW_ARG_AREA_PTR]]
544b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret void
545b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar
546b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainarstruct agg_v32i8 va_agg_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v32i8); }
547b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-LABEL: define void @va_agg_v32i8(%struct.agg_v32i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
548b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
549b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
550b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
551b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: br i1 [[FITS_IN_REGS]],
552b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
553b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
554b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
555b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
556b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
557b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to %struct.agg_v32i8**
558b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
559b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
560b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
561b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
562b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
563b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to %struct.agg_v32i8**
564b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
565b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
566b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v32i8** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
567b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load %struct.agg_v32i8*, %struct.agg_v32i8** [[VA_ARG_ADDR]]
568b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK: ret void
569b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR-LABEL: define void @va_agg_v32i8(%struct.agg_v32i8* noalias sret %{{.*}}, %struct.__va_list_tag* %{{.*}})
570b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
571b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
572b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
573b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: br i1 [[FITS_IN_REGS]],
574b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[SCALED_REG_COUNT:%[^ ]+]] = mul i64 [[REG_COUNT]], 8
575b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_OFFSET:%[^ ]+]] = add i64 [[SCALED_REG_COUNT]], 16
576b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_SAVE_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 3
577b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_SAVE_AREA:%[^ ]+]] = load i8*, i8** [[REG_SAVE_AREA_PTR:[^ ]+]]
578b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[RAW_REG_ADDR:%[^ ]+]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i64 [[REG_OFFSET]]
579b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_ADDR:%[^ ]+]] = bitcast i8* [[RAW_REG_ADDR]] to %struct.agg_v32i8**
580b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[REG_COUNT1:%[^ ]+]] = add i64 [[REG_COUNT]], 1
581b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i64 [[REG_COUNT1]], i64* [[REG_COUNT_PTR]]
582b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
583b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
584b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[RAW_MEM_ADDR:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 0
585b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[RAW_MEM_ADDR]] to %struct.agg_v32i8**
586b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[OVERFLOW_ARG_AREA2:%[^ ]+]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i64 8
587b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
588b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v32i8** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
589b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: [[INDIRECT_ARG:%[^ ]+]] = load %struct.agg_v32i8*, %struct.agg_v32i8** [[VA_ARG_ADDR]]
590b6d6993e6e6d3daf4d9876794254d20a134e37c2Pirama Arumuga Nainar// CHECK-VECTOR: ret void
591