arch-sh.h revision cca84643cc10cd72b0b453ff92ccb8643ba51493 
1/* Renesas SH (32bit) only */
2
3#ifndef ARCH_SH_H
4#define ARCH_SH_H
5
6#define FIO_ARCH	(arch_sh)
7
8#ifndef __NR_ioprio_set
9#define __NR_ioprio_set	288
10#define __NR_ioprio_get	289
11#endif
12
13#ifndef __NR_fadvise64
14#define __NR_fadvise64	250
15#endif
16
17#ifndef __NR_sys_splice
18#define __NR_sys_splice		313
19#define __NR_sys_tee		315
20#define __NR_sys_vmsplice	316
21#endif
22
23#define nop             __asm__ __volatile__ ("nop": : :"memory")
24
25#define mb()								\
26	do {								\
27		if (arch_flags & ARCH_FLAG_1)				\
28			__asm__ __volatile__ ("synco": : :"memory");	\
29		else							\
30			__asm__ __volatile__ (" " : : : "memory");	\
31	} while (0)
32
33#define read_barrier()	mb()
34#define write_barrier()	mb()
35
36#include <stdio.h>
37#include <elf.h>
38
39extern unsigned long arch_flags;
40
41#define CPU_HAS_LLSC	0x0040
42
43static inline int arch_init(char *envp[])
44{
45	Elf32_auxv_t *auxv;
46
47	while (*envp++ != NULL)
48		;
49
50	for (auxv = (Elf32_auxv_t *) envp; auxv->a_type != AT_NULL; auxv++) {
51		if (auxv->a_type == AT_HWCAP) {
52			if (auxv->a_un.a_val & CPU_HAS_LLSC) {
53				arch_flags |= ARCH_FLAG_1;
54				break;
55			}
56		}
57	}
58
59	return 0;
60}
61
62#define ARCH_HAVE_INIT
63
64#endif
65