arch-x86.h revision edf2c6cf5adc82ee43c81e033cf2215eb9ffdb16 
1#ifndef ARCH_X86_H
2#define ARCH_X86_H
3
4#define ARCH	(arch_i386)
5
6#ifndef __NR_ioprio_set
7#define __NR_ioprio_set		289
8#define __NR_ioprio_get		290
9#endif
10
11#ifndef __NR_fadvise64
12#define __NR_fadvise64		250
13#endif
14
15#ifndef __NR_sys_splice
16#define __NR_sys_splice		313
17#define __NR_sys_tee		315
18#define __NR_sys_vmsplice	316
19#endif
20
21#ifndef __NR_async_exec
22#define __NR_async_exec		325
23#define __NR_async_wait		326
24#define __NR_umem_add		327
25#define __NR_async_thread	328
26#endif
27
28#define	FIO_HUGE_PAGE		4194304
29
30#define FIO_HAVE_SYSLET
31
32#define nop		__asm__ __volatile__("rep;nop": : :"memory")
33#define read_barrier()	__asm__ __volatile__("": : :"memory")
34#define write_barrier()	__asm__ __volatile__("": : :"memory")
35
36static inline unsigned long arch_ffz(unsigned long bitmask)
37{
38	__asm__("bsfl %1,%0" :"=r" (bitmask) :"r" (~bitmask));
39	return bitmask;
40}
41#define ARCH_HAVE_FFZ
42
43typedef struct {
44	unsigned int lock;
45} spinlock_t;
46
47static inline void spin_lock(spinlock_t *lock)
48{
49	short inc = 0x0100;
50
51	__asm__ __volatile__("xaddw %w0, %1\n"
52			"1:\t"
53			"cmpb %h0, %b0\n\t"
54			"je 2f\n\t"
55			"rep ; nop\n\t"
56			"movb %1, %b0\n\t"
57			"jmp 1b\n"
58			"2:"
59			: "+Q" (inc), "+m" (lock->lock)
60			:
61			: "memory", "cc");
62}
63
64static inline void spin_unlock(spinlock_t *lock)
65{
66	__asm__ __volatile__("incb %0"
67			: "+m" (lock->lock)
68			:
69			: "memory", "cc");
70}
71
72#endif
73