1224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 2224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Performance events: 3224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 4224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> 5224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar 6224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra 7224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 8224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Data type definitions, declarations, prototypes. 9224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 10224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Started by: Thomas Gleixner and Ingo Molnar 11224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 12224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * For licencing details see kernel-base/COPYING 13224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 14224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#ifndef _UAPI_LINUX_PERF_EVENT_H 15224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _UAPI_LINUX_PERF_EVENT_H 16224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 17224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <linux/types.h> 18224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <linux/ioctl.h> 19224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <asm/byteorder.h> 20224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 21224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 22224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * User-space ABI bits: 23224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 24224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 25224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 26224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * attr.type 27224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 28224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_type_id { 29224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_HARDWARE = 0, 30224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_SOFTWARE = 1, 31224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_TRACEPOINT = 2, 32224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_HW_CACHE = 3, 33224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_RAW = 4, 34224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_BREAKPOINT = 5, 35224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 36224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_MAX, /* non-ABI */ 37224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 38224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 39224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 40224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Generalized performance event event_id types, used by the 41224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * attr.event_id parameter of the sys_perf_event_open() 42224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * syscall: 43224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 44224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_hw_id { 45224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 46224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Common hardware events, generalized by the kernel: 47224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 48224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CPU_CYCLES = 0, 49224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_INSTRUCTIONS = 1, 50224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_REFERENCES = 2, 51224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_MISSES = 3, 52224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, 53224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_BRANCH_MISSES = 5, 54224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_BUS_CYCLES = 6, 55224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, 56224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, 57224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_REF_CPU_CYCLES = 9, 58224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 59224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_MAX, /* non-ABI */ 60224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 61224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 62224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 63224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Generalized hardware cache events: 64224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 65224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x 66224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { read, write, prefetch } x 67224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { accesses, misses } 68224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 69224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_hw_cache_id { 70224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_L1D = 0, 71224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_L1I = 1, 72224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_LL = 2, 73224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_DTLB = 3, 74224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_ITLB = 4, 75224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_BPU = 5, 76224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_NODE = 6, 77224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 78224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ 79224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 80224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 81224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_hw_cache_op_id { 82224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_OP_READ = 0, 83224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_OP_WRITE = 1, 84224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, 85224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 86224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ 87224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 88224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 89224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_hw_cache_op_result_id { 90224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, 91224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_RESULT_MISS = 1, 92224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 93224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ 94224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 95224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 96224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 97224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Special "software" events provided by the kernel, even if the hardware 98224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * does not support performance events. These events measure various 99224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * physical and sw events of the kernel (and allow the profiling of them as 100224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * well): 101224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 102224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_sw_ids { 103224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_CPU_CLOCK = 0, 104224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_TASK_CLOCK = 1, 105224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_PAGE_FAULTS = 2, 106224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_CONTEXT_SWITCHES = 3, 107224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_CPU_MIGRATIONS = 4, 108224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, 109224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, 110224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, 111224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_EMULATION_FAULTS = 8, 112e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_COUNT_SW_DUMMY = 9, 11312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_COUNT_SW_BPF_OUTPUT = 10, 114224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 115224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_MAX, /* non-ABI */ 116224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 117224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 118224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 119224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Bits that can be set in attr.sample_type to request information 120224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * in the overflow packets. 121224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 122224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_event_sample_format { 123224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_IP = 1U << 0, 124224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_TID = 1U << 1, 125224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_TIME = 1U << 2, 126224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_ADDR = 1U << 3, 127224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_READ = 1U << 4, 128224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_CALLCHAIN = 1U << 5, 129224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_ID = 1U << 6, 130224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_CPU = 1U << 7, 131224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_PERIOD = 1U << 8, 132224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_STREAM_ID = 1U << 9, 133224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_RAW = 1U << 10, 134224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_STACK = 1U << 11, 135224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_REGS_USER = 1U << 12, 136224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_STACK_USER = 1U << 13, 137224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_WEIGHT = 1U << 14, 138224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_DATA_SRC = 1U << 15, 139e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_SAMPLE_IDENTIFIER = 1U << 16, 140e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_SAMPLE_TRANSACTION = 1U << 17, 14112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_REGS_INTR = 1U << 18, 142224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 14312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_MAX = 1U << 19, /* non-ABI */ 144224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 145224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 146224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 147224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set 148224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 149224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * If the user does not pass priv level information via branch_sample_type, 150224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * the kernel uses the event's priv level. Branch and event priv levels do 151224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * not have to match. Branch priv level is checked for permissions. 152224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 153224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The branch types can be combined, however BRANCH_ANY covers all types 154224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * of branches and therefore it supersedes all the other types. 155224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 15612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferrisenum perf_branch_sample_type_shift { 15712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_USER_SHIFT = 0, /* user branches */ 15812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_KERNEL_SHIFT = 1, /* kernel branches */ 15912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_HV_SHIFT = 2, /* hypervisor branches */ 16012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 16112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_ANY_SHIFT = 3, /* any branch types */ 16212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT = 4, /* any call branch */ 16312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT = 5, /* any return branch */ 16412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_IND_CALL_SHIFT = 6, /* indirect calls */ 16512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT = 7, /* transaction aborts */ 16612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_IN_TX_SHIFT = 8, /* in transaction */ 16712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_NO_TX_SHIFT = 9, /* not in transaction */ 16812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_COND_SHIFT = 10, /* conditional branches */ 16912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 17012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 11, /* call/ret stack */ 17112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT = 12, /* indirect jumps */ 17212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_CALL_SHIFT = 13, /* direct call */ 17312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 174ccfaccd726a369b7df72e251710755233d176e5aChristopher Ferris PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT = 14, /* no flags */ 175ccfaccd726a369b7df72e251710755233d176e5aChristopher Ferris PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT = 15, /* no cycles */ 176ccfaccd726a369b7df72e251710755233d176e5aChristopher Ferris 17712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_MAX_SHIFT /* non-ABI */ 17812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris}; 17912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 180224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_branch_sample_type { 18112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_USER = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT, 18212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_KERNEL = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT, 18312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_HV = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT, 18412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 18512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_ANY = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT, 18612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_ANY_CALL = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT, 18712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT, 18812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_IND_CALL = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT, 18912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_ABORT_TX = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT, 19012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_IN_TX = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT, 19112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_NO_TX = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT, 19212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_COND = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT, 19312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 19412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_CALL_STACK = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT, 19512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_IND_JUMP = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT, 19612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_CALL = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT, 19712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 198ccfaccd726a369b7df72e251710755233d176e5aChristopher Ferris PERF_SAMPLE_BRANCH_NO_FLAGS = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT, 199ccfaccd726a369b7df72e251710755233d176e5aChristopher Ferris PERF_SAMPLE_BRANCH_NO_CYCLES = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT, 200ccfaccd726a369b7df72e251710755233d176e5aChristopher Ferris 20112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_SAMPLE_BRANCH_MAX = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT, 202224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 203224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 204224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_SAMPLE_BRANCH_PLM_ALL \ 205224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng (PERF_SAMPLE_BRANCH_USER|\ 206224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_KERNEL|\ 207224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_HV) 208224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 209224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 210224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Values to determine ABI of the registers dump. 211224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 212224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_sample_regs_abi { 213224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_REGS_ABI_NONE = 0, 214224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_REGS_ABI_32 = 1, 215224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_REGS_ABI_64 = 2, 216224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 217224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 218224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 219e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * Values for the memory transaction event qualifier, mostly for 220e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * abort events. Multiple bits can be set. 221e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris */ 222e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferrisenum { 223e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_ELISION = (1 << 0), /* From elision */ 224e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_TRANSACTION = (1 << 1), /* From transaction */ 225e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_SYNC = (1 << 2), /* Instruction is related */ 226e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_ASYNC = (1 << 3), /* Instruction not related */ 227e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_RETRY = (1 << 4), /* Retry possible */ 228e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_CONFLICT = (1 << 5), /* Conflict abort */ 229e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */ 230e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_CAPACITY_READ = (1 << 7), /* Capacity read abort */ 231e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris 232e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_MAX = (1 << 8), /* non-ABI */ 233e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris 234e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris /* bits 32..63 are reserved for the abort code */ 235e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris 236e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_ABORT_MASK = (0xffffffffULL << 32), 237e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_TXN_ABORT_SHIFT = 32, 238e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris}; 239e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris 240e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris/* 241224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The format of the data returned by read() on a perf event fd, 242224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * as specified by attr.read_format: 243224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 244224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct read_format { 245224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 value; 246224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 247224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 248224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 id; } && PERF_FORMAT_ID 249224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } && !PERF_FORMAT_GROUP 250224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 251224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 nr; 252224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 253224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 254224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 value; 255224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 id; } && PERF_FORMAT_ID 256224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } cntr[nr]; 257224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } && PERF_FORMAT_GROUP 258224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 259224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 260224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_event_read_format { 261224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, 262224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, 263224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_FORMAT_ID = 1U << 2, 264224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_FORMAT_GROUP = 1U << 3, 265224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 266224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ 267224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 268224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 269224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ 270224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ 271224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ 272224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */ 273224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* add: sample_stack_user */ 27412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris#define PERF_ATTR_SIZE_VER4 104 /* add: sample_regs_intr */ 27512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris#define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */ 276224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 277224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 278224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Hardware event_id to monitor via a performance monitoring event: 2796e3550f2a1c3909fb75be068f7ae9009f7e8622aChristopher Ferris * 2806e3550f2a1c3909fb75be068f7ae9009f7e8622aChristopher Ferris * @sample_max_stack: Max number of frame pointers in a callchain, 2816e3550f2a1c3909fb75be068f7ae9009f7e8622aChristopher Ferris * should be < /proc/sys/kernel/perf_event_max_stack 282224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 283224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct perf_event_attr { 284224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 285224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 286224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Major type: hardware/software/tracepoint/etc. 287224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 288224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 type; 289224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 290224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 291224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Size of the attr structure, for fwd/bwd compat. 292224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 293224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 size; 294224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 295224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 296224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Type specific configuration information. 297224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 298224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 config; 299224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 300224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng union { 301224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 sample_period; 302224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 sample_freq; 303224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 304224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 305224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 sample_type; 306224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 read_format; 307224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 308224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 disabled : 1, /* off by default */ 309224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng inherit : 1, /* children inherit it */ 310224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng pinned : 1, /* must always be on PMU */ 311224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclusive : 1, /* only group on PMU */ 312224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_user : 1, /* don't count user */ 313224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_kernel : 1, /* ditto kernel */ 314224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_hv : 1, /* ditto hypervisor */ 315224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_idle : 1, /* don't count when idle */ 316224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mmap : 1, /* include mmap data */ 317224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng comm : 1, /* include comm data */ 318224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng freq : 1, /* use freq, not period */ 319224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng inherit_stat : 1, /* per task counts */ 320224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enable_on_exec : 1, /* next exec enables */ 321224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng task : 1, /* trace fork/exit */ 322224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng watermark : 1, /* wakeup_watermark */ 323224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 324224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * precise_ip: 325224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 326224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 0 - SAMPLE_IP can have arbitrary skid 327224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 1 - SAMPLE_IP must have constant skid 328224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 2 - SAMPLE_IP requested to have 0 skid 329224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 3 - SAMPLE_IP must have 0 skid 330224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 331224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * See also PERF_RECORD_MISC_EXACT_IP 332224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 333224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng precise_ip : 2, /* skid constraint */ 334224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mmap_data : 1, /* non-exec mmap data */ 335224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng sample_id_all : 1, /* sample_type all events */ 336224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 337224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_host : 1, /* don't count in host */ 338224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_guest : 1, /* don't count in guest */ 339224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 340224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_callchain_kernel : 1, /* exclude kernel callchains */ 341224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_callchain_user : 1, /* exclude user callchains */ 342e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris mmap2 : 1, /* include mmap with inode data */ 343314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris comm_exec : 1, /* flag comm events that are due to an exec */ 34412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris use_clockid : 1, /* use @clockid for time fields */ 34512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris context_switch : 1, /* context switch data */ 346ccfaccd726a369b7df72e251710755233d176e5aChristopher Ferris write_backward : 1, /* Write ring buffer from end to beginning */ 347ccfaccd726a369b7df72e251710755233d176e5aChristopher Ferris __reserved_1 : 36; 348224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 349224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng union { 350224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 wakeup_events; /* wakeup every n events */ 351224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 wakeup_watermark; /* bytes before wakeup */ 352224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 353224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 354224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 bp_type; 355224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng union { 356224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 bp_addr; 357224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 config1; /* extension of config */ 358224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 359224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng union { 360224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 bp_len; 361224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 config2; /* extension of config1 */ 362224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 363224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 branch_sample_type; /* enum perf_branch_sample_type */ 364224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 365224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 366224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Defines set of user regs to dump on samples. 367224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * See asm/perf_regs.h for details. 368224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 369224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 sample_regs_user; 370224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 371224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 372224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Defines size of the user stack to dump on samples. 373224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 374224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 sample_stack_user; 375224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 37612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris __s32 clockid; 37712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris /* 37812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * Defines set of regs to dump for each sample 37912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * state captured on: 38012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * - precise = 0: PMU interrupt 38112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * - precise > 0: sampled instruction 38212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 38312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * See asm/perf_regs.h for details. 38412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris */ 38512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris __u64 sample_regs_intr; 38612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 38712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris /* 38812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * Wakeup watermark for AUX area 38912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris */ 39012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris __u32 aux_watermark; 3916e3550f2a1c3909fb75be068f7ae9009f7e8622aChristopher Ferris __u16 sample_max_stack; 3926e3550f2a1c3909fb75be068f7ae9009f7e8622aChristopher Ferris __u16 __reserved_2; /* align to __u64 */ 393224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 394224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 395224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define perf_flags(attr) (*(&(attr)->read_format + 1)) 396224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 397224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 398224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Ioctls that can be done on a perf event fd: 399224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 400224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_ENABLE _IO ('$', 0) 401224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_DISABLE _IO ('$', 1) 402224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_REFRESH _IO ('$', 2) 403224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_RESET _IO ('$', 3) 404224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) 405224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) 406224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) 407e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris#define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *) 40812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris#define PERF_EVENT_IOC_SET_BPF _IOW('$', 8, __u32) 409ccfaccd726a369b7df72e251710755233d176e5aChristopher Ferris#define PERF_EVENT_IOC_PAUSE_OUTPUT _IOW('$', 9, __u32) 410224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 411224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_event_ioc_flags { 412224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_IOC_FLAG_GROUP = 1U << 0, 413224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 414224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 415224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 416224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Structure of the page that can be mapped via mmap 417224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 418224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct perf_event_mmap_page { 419224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 version; /* version number of this structure */ 420224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 compat_version; /* lowest version this is compat with */ 421224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 422224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 423224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Bits needed to read the hw events in user-space. 424224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 4257c0b639731767acd9b3788628d81174c641fa6b9Christopher Ferris * u32 seq, time_mult, time_shift, index, width; 426224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 count, enabled, running; 427224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 cyc, time_offset; 428224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * s64 pmc = 0; 429224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 430224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * do { 431224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * seq = pc->lock; 432224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * barrier() 433224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 434224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * enabled = pc->time_enabled; 435224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * running = pc->time_running; 436224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 437224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * if (pc->cap_usr_time && enabled != running) { 438224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * cyc = rdtsc(); 439224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * time_offset = pc->time_offset; 440224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * time_mult = pc->time_mult; 441224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * time_shift = pc->time_shift; 442224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } 443224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 4447c0b639731767acd9b3788628d81174c641fa6b9Christopher Ferris * index = pc->index; 445224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * count = pc->offset; 4467c0b639731767acd9b3788628d81174c641fa6b9Christopher Ferris * if (pc->cap_user_rdpmc && index) { 447224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * width = pc->pmc_width; 4487c0b639731767acd9b3788628d81174c641fa6b9Christopher Ferris * pmc = rdpmc(index - 1); 449224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } 450224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 451224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * barrier(); 452224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } while (pc->lock != seq); 453224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 454224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * NOTE: for obvious reason this only works on self-monitoring 455224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * processes. 456224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 457224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 lock; /* seqlock for synchronization */ 458224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 index; /* hardware event identifier */ 459224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __s64 offset; /* add to hardware event value */ 460224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 time_enabled; /* time event active */ 461224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 time_running; /* time event on cpu */ 462224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng union { 463224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 capabilities; 464e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris struct { 465e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris __u64 cap_bit0 : 1, /* Always 0, deprecated, see commit 860f085b74e9 */ 466e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris cap_bit0_is_deprecated : 1, /* Always 1, signals that bit 0 is zero */ 467e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris 468e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris cap_user_rdpmc : 1, /* The RDPMC instruction can be used to read counts */ 469e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris cap_user_time : 1, /* The time_* fields are used */ 470e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris cap_user_time_zero : 1, /* The time_zero field is used */ 471e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris cap_____res : 59; 472e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris }; 473224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 474224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 475224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 4767c0b639731767acd9b3788628d81174c641fa6b9Christopher Ferris * If cap_user_rdpmc this field provides the bit-width of the value 477224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * read using the rdpmc() or equivalent instruction. This can be used 478224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * to sign extend the result like: 479224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 480224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * pmc <<= 64 - width; 481224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * pmc >>= 64 - width; // signed shift right 482224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * count += pmc; 483224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 484224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u16 pmc_width; 485224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 486224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 487224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * If cap_usr_time the below fields can be used to compute the time 488224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * delta since time_enabled (in ns) using rdtsc or similar. 489224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 490224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 quot, rem; 491224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 delta; 492224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 493224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * quot = (cyc >> time_shift); 49412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * rem = cyc & (((u64)1 << time_shift) - 1); 495224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * delta = time_offset + quot * time_mult + 496224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * ((rem * time_mult) >> time_shift); 497224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 498224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Where time_offset,time_mult,time_shift and cyc are read in the 499224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * seqcount loop described above. This delta can then be added to 5007c0b639731767acd9b3788628d81174c641fa6b9Christopher Ferris * enabled and possible running (if index), improving the scaling: 501224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 502224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * enabled += delta; 5037c0b639731767acd9b3788628d81174c641fa6b9Christopher Ferris * if (index) 504224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * running += delta; 505224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 506224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * quot = count / running; 507224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * rem = count % running; 508224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * count = quot * enabled + (rem * enabled) / running; 509224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 510224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u16 time_shift; 511224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 time_mult; 512224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 time_offset; 513e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris /* 514e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated 515e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * from sample timestamps. 516e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 517e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * time = timestamp - time_zero; 518e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * quot = time / time_mult; 519e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * rem = time % time_mult; 520e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * cyc = (quot << time_shift) + (rem << time_shift) / time_mult; 521e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 522e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * And vice versa: 523e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 524e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * quot = cyc >> time_shift; 52512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * rem = cyc & (((u64)1 << time_shift) - 1); 526e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * timestamp = time_zero + quot * time_mult + 527e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * ((rem * time_mult) >> time_shift); 528e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris */ 529e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris __u64 time_zero; 530e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris __u32 size; /* Header size up to __reserved[] fields. */ 531224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 532224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 533224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Hole for extension of the self monitor capabilities 534224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 535224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 536e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris __u8 __reserved[118*8+4]; /* align to 1k. */ 537224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 538224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 539224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Control data for the mmap() data buffer. 540224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 541e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * User-space reading the @data_head value should issue an smp_rmb(), 542e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * after reading this value. 543224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 544224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * When the mapping is PROT_WRITE the @data_tail value should be 545e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * written by userspace to reflect the last read data, after issueing 546e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * an smp_mb() to separate the data read from the ->data_tail store. 547e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * In this case the kernel will not over-write unread data. 548e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 549e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * See perf_output_put_handle() for the data ordering. 55012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 55112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * data_{offset,size} indicate the location and size of the perf record 55212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * buffer within the mmapped area. 553224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 554224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 data_head; /* head in the data section */ 555224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 data_tail; /* user-space written tail */ 55612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris __u64 data_offset; /* where the buffer starts */ 55712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris __u64 data_size; /* data buffer size */ 55812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 55912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris /* 56012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * AUX area is defined by aux_{offset,size} fields that should be set 56112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * by the userspace, so that 56212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 56312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * aux_offset >= data_offset + data_size 56412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 56512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * prior to mmap()ing it. Size of the mmap()ed area should be aux_size. 56612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 56712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * Ring buffer pointers aux_{head,tail} have the same semantics as 56812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * data_{head,tail} and same ordering rules apply. 56912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris */ 57012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris __u64 aux_head; 57112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris __u64 aux_tail; 57212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris __u64 aux_offset; 57312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris __u64 aux_size; 574224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 575224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 576224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) 577224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) 578224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_KERNEL (1 << 0) 579224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_USER (2 << 0) 580224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_HYPERVISOR (3 << 0) 581224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) 582224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_GUEST_USER (5 << 0) 583224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 584314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris/* 58512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * Indicates that /proc/PID/maps parsing are truncated by time out. 58612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris */ 58712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris#define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12) 58812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris/* 589314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris * PERF_RECORD_MISC_MMAP_DATA and PERF_RECORD_MISC_COMM_EXEC are used on 590314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris * different events so can reuse the same bit position. 59112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * Ditto PERF_RECORD_MISC_SWITCH_OUT. 592314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris */ 593224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_MMAP_DATA (1 << 13) 594314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris#define PERF_RECORD_MISC_COMM_EXEC (1 << 13) 59512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris#define PERF_RECORD_MISC_SWITCH_OUT (1 << 13) 596224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 597224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Indicates that the content of PERF_SAMPLE_IP points to 598224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * the actual instruction that triggered the event. See also 599224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * perf_event_attr::precise_ip. 600224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 601224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_EXACT_IP (1 << 14) 602224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 603224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Reserve the last bit to indicate some extended misc field 604224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 605224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) 606224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 607224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct perf_event_header { 608224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 type; 609224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u16 misc; 610224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u16 size; 611224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 612224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 613224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_event_type { 614224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 615224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 616224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * If perf_event_attr.sample_id_all is set then all event types will 617224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * have the sample_type selected fields related to where/when 618e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU, 619e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed 620e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * just after the perf_event_header and the fields already present for 621e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * the existing fields, i.e. at the end of the payload. That way a newer 622e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * perf.data file will be supported by older perf tools, with these new 623e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * optional fields being ignored. 624224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 625e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct sample_id { 626e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * { u32 pid, tid; } && PERF_SAMPLE_TID 627e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * { u64 time; } && PERF_SAMPLE_TIME 628e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * { u64 id; } && PERF_SAMPLE_ID 629e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 630e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * { u32 cpu, res; } && PERF_SAMPLE_CPU 631e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * { u64 id; } && PERF_SAMPLE_IDENTIFIER 632e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * } && perf_event_attr::sample_id_all 633e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 634e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID. The 635e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed 636e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * relative to header.size. 637e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris */ 638e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris 639e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris /* 640224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The MMAP events record the PROT_EXEC mappings so that we can 641224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * correlate userspace IPs to code. They have the following structure: 642224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 643224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 644224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 645224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 646224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 pid, tid; 647224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 addr; 648224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 len; 649224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 pgoff; 650224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * char filename[]; 651e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct sample_id sample_id; 652224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 653224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 654224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_MMAP = 1, 655224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 656224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 657224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 658224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 659224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 id; 660224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 lost; 661e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct sample_id sample_id; 662224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 663224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 664224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_LOST = 2, 665224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 666224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 667224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 668224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 669224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 670224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 pid, tid; 671224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * char comm[]; 672e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct sample_id sample_id; 673224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 674224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 675224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_COMM = 3, 676224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 677224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 678224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 679224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 680224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 pid, ppid; 681224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 tid, ptid; 682224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 time; 683e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct sample_id sample_id; 684224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 685224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 686224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_EXIT = 4, 687224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 688224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 689224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 690224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 691224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 time; 692224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 id; 693224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 stream_id; 694e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct sample_id sample_id; 695224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 696224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 697224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_THROTTLE = 5, 698224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_UNTHROTTLE = 6, 699224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 700224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 701224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 702224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 703224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 pid, ppid; 704224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 tid, ptid; 705224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 time; 706e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct sample_id sample_id; 707224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 708224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 709224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_FORK = 7, 710224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 711224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 712224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 713224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 714224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 pid, tid; 715224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 716224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct read_format values; 717e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct sample_id sample_id; 718224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 719224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 720224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_READ = 8, 721224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 722224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 723224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 724224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 725224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 726e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * # 727e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID. 728e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * # The advantage of PERF_SAMPLE_IDENTIFIER is that its position 729e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * # is fixed relative to header. 730e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * # 731e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 732e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * { u64 id; } && PERF_SAMPLE_IDENTIFIER 733224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 ip; } && PERF_SAMPLE_IP 734224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u32 pid, tid; } && PERF_SAMPLE_TID 735224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 time; } && PERF_SAMPLE_TIME 736224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 addr; } && PERF_SAMPLE_ADDR 737224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 id; } && PERF_SAMPLE_ID 738224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 739224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u32 cpu, res; } && PERF_SAMPLE_CPU 740224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 period; } && PERF_SAMPLE_PERIOD 741224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 742224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { struct read_format values; } && PERF_SAMPLE_READ 743224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 744224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 nr, 745224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN 746224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 747224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # 748224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # The RAW record below is opaque data wrt the ABI 749224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # 750224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # That is, the ABI doesn't make any promises wrt to 751224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # the stability of its content, it may vary depending 752224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # on event, hardware, kernel version and phase of 753224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # the moon. 754224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # 755224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # In other words, PERF_SAMPLE_RAW contents are not an ABI. 756224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # 757224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 758224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u32 size; 759224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * char data[size];}&& PERF_SAMPLE_RAW 760224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 761224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 nr; 762224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK 763224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 764224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 abi; # enum perf_sample_regs_abi 765224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER 766224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 767224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 size; 768224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * char data[size]; 769224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 dyn_size; } && PERF_SAMPLE_STACK_USER 770224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 771224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 weight; } && PERF_SAMPLE_WEIGHT 772e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * { u64 data_src; } && PERF_SAMPLE_DATA_SRC 773e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * { u64 transaction; } && PERF_SAMPLE_TRANSACTION 77412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * { u64 abi; # enum perf_sample_regs_abi 77512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR 776224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 777224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 778224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_SAMPLE = 9, 779224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 780e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris /* 781e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * The MMAP2 records are an augmented version of MMAP, they add 782e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * maj, min, ino numbers to be used to uniquely identify each mapping 783e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 784e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct { 785e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct perf_event_header header; 786e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 787e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * u32 pid, tid; 788e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * u64 addr; 789e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * u64 len; 790e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * u64 pgoff; 791e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * u32 maj; 792e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * u32 min; 793e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * u64 ino; 794e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * u64 ino_generation; 795314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris * u32 prot, flags; 796e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * char filename[]; 797e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * struct sample_id sample_id; 798e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * }; 799e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris */ 800e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris PERF_RECORD_MMAP2 = 10, 801e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris 80212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris /* 80312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * Records that new data landed in the AUX buffer part. 80412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 80512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct { 80612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct perf_event_header header; 80712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 80812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * u64 aux_offset; 80912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * u64 aux_size; 81012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * u64 flags; 81112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct sample_id sample_id; 81212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * }; 81312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris */ 81412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_RECORD_AUX = 11, 81512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 81612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris /* 81712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * Indicates that instruction trace has started 81812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 81912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct { 82012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct perf_event_header header; 82112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * u32 pid; 82212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * u32 tid; 82312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * }; 82412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris */ 82512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_RECORD_ITRACE_START = 12, 82612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 82712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris /* 82812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * Records the dropped/lost sample number. 82912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 83012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct { 83112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct perf_event_header header; 83212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 83312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * u64 lost; 83412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct sample_id sample_id; 83512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * }; 83612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris */ 83712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_RECORD_LOST_SAMPLES = 13, 83812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 83912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris /* 84012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * Records a context switch in or out (flagged by 84112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * PERF_RECORD_MISC_SWITCH_OUT). See also 84212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * PERF_RECORD_SWITCH_CPU_WIDE. 84312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 84412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct { 84512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct perf_event_header header; 84612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct sample_id sample_id; 84712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * }; 84812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris */ 84912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_RECORD_SWITCH = 14, 85012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 85112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris /* 85212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * CPU-wide version of PERF_RECORD_SWITCH with next_prev_pid and 85312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * next_prev_tid that are the next (switching out) or previous 85412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * (switching in) pid/tid. 85512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * 85612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct { 85712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct perf_event_header header; 85812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * u32 next_prev_pid; 85912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * u32 next_prev_tid; 86012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * struct sample_id sample_id; 86112e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * }; 86212e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris */ 86312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris PERF_RECORD_SWITCH_CPU_WIDE = 15, 86412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 865224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_MAX, /* non-ABI */ 866224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 867224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 868224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MAX_STACK_DEPTH 127 869ccfaccd726a369b7df72e251710755233d176e5aChristopher Ferris#define PERF_MAX_CONTEXTS_PER_STACK 8 870224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 871224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_callchain_context { 872224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_HV = (__u64)-32, 873224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_KERNEL = (__u64)-128, 874224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_USER = (__u64)-512, 875224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 876224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_GUEST = (__u64)-2048, 877224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, 878224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_GUEST_USER = (__u64)-2560, 879224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 880224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_MAX = (__u64)-4095, 881224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 882224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 88312e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris/** 88412e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * PERF_RECORD_AUX::flags bits 88512e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris */ 88612e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris#define PERF_AUX_FLAG_TRUNCATED 0x01 /* record was truncated to fit */ 88712e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris#define PERF_AUX_FLAG_OVERWRITE 0x02 /* snapshot from overwrite mode */ 88812e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris 889314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris#define PERF_FLAG_FD_NO_GROUP (1UL << 0) 890314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris#define PERF_FLAG_FD_OUTPUT (1UL << 1) 891314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris#define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup id, per-cpu mode only */ 892314752488cb92b9f86028836d0b8eabd8acb6a7cChristopher Ferris#define PERF_FLAG_FD_CLOEXEC (1UL << 3) /* O_CLOEXEC */ 893224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 894224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengunion perf_mem_data_src { 895224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 val; 896224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct { 897224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 mem_op:5, /* type of opcode */ 898224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mem_lvl:14, /* memory hierarchy level */ 899224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mem_snoop:5, /* snoop mode */ 900224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mem_lock:2, /* lock instr */ 901224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mem_dtlb:7, /* tlb access */ 902224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mem_rsvd:31; 903224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 904224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 905224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 906224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* type of opcode (load/store/prefetch,code) */ 907224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_NA 0x01 /* not available */ 908224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_LOAD 0x02 /* load instruction */ 909224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_STORE 0x04 /* store instruction */ 910224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_PFETCH 0x08 /* prefetch */ 911224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_EXEC 0x10 /* code (execution) */ 912224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_SHIFT 0 913224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 914224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* memory hierarchy (memory level, hit or miss) */ 915224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_NA 0x01 /* not available */ 916224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_HIT 0x02 /* hit level */ 917224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_MISS 0x04 /* miss level */ 918224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_L1 0x08 /* L1 */ 919224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */ 920224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_L2 0x20 /* L2 */ 921224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_L3 0x40 /* L3 */ 922224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */ 923224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */ 924224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */ 925224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_REM_CCE1 0x400 /* Remote Cache (1 hop) */ 926224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_REM_CCE2 0x800 /* Remote Cache (2 hops) */ 927224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_IO 0x1000 /* I/O memory */ 928224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */ 929224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_SHIFT 5 930224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 931224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* snoop mode */ 932224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_NA 0x01 /* not available */ 933224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_NONE 0x02 /* no snoop */ 934224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_HIT 0x04 /* snoop hit */ 935224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_MISS 0x08 /* snoop miss */ 936224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_HITM 0x10 /* snoop hit modified */ 937224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_SHIFT 19 938224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 939224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* locked instruction */ 940224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LOCK_NA 0x01 /* not available */ 941224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LOCK_LOCKED 0x02 /* locked transaction */ 942224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LOCK_SHIFT 24 943224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 944224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* TLB access */ 945224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_NA 0x01 /* not available */ 946224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_HIT 0x02 /* hit level */ 947224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_MISS 0x04 /* miss level */ 948224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_L1 0x08 /* L1 */ 949224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_L2 0x10 /* L2 */ 950224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_WK 0x20 /* Hardware Walker*/ 951224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_OS 0x40 /* OS fault handler */ 952224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_SHIFT 26 953224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 954224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_S(a, s) \ 955e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) 956e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris 957e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris/* 958e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * single taken branch record layout: 959e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 960e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * from: source instruction (may not always be a branch insn) 961e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * to: branch target 962e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * mispred: branch target was mispredicted 963e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * predicted: branch target was predicted 964e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 965e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * support for mispred, predicted is optional. In case it 966e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * is not supported mispred = predicted = 0. 967e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * 968e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * in_tx: running in a hardware transaction 969e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris * abort: aborting a hardware transaction 97012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris * cycles: cycles from last branch (or 0 if not supported) 971e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris */ 972e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferrisstruct perf_branch_entry { 973e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris __u64 from; 974e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris __u64 to; 975e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris __u64 mispred:1, /* target mispredicted */ 976e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris predicted:1,/* target predicted */ 977e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris in_tx:1, /* in transaction */ 978e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris abort:1, /* transaction abort */ 97912e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris cycles:16, /* cycle count to last branch */ 98012e1f28cce28271eb109a5bae818a804f0c3bb27Christopher Ferris reserved:44; 981e084501669a4e4931c9d648351ecd7d595b81b79Christopher Ferris}; 982224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 983224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#endif /* _UAPI_LINUX_PERF_EVENT_H */ 984