13f32d65912b4da23793dab618d981be2ce11c331Evan Cheng//===-- LiveStackAnalysis.h - Live Stack Slot Analysis ----------*- C++ -*-===// 23f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// 33f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// The LLVM Compiler Infrastructure 43f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// 53f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// This file is distributed under the University of Illinois Open Source 63f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// License. See LICENSE.TXT for details. 73f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// 83f32d65912b4da23793dab618d981be2ce11c331Evan Cheng//===----------------------------------------------------------------------===// 93f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// 103f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// This file implements the live stack slot analysis pass. It is analogous to 113f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// live interval analysis except it's analyzing liveness of stack slots rather 123f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// than registers. 133f32d65912b4da23793dab618d981be2ce11c331Evan Cheng// 143f32d65912b4da23793dab618d981be2ce11c331Evan Cheng//===----------------------------------------------------------------------===// 153f32d65912b4da23793dab618d981be2ce11c331Evan Cheng 16674be02d525d4e24bc6943ed9274958c580bcfbcJakub Staszak#ifndef LLVM_CODEGEN_LIVESTACKANALYSIS_H 17674be02d525d4e24bc6943ed9274958c580bcfbcJakub Staszak#define LLVM_CODEGEN_LIVESTACKANALYSIS_H 183f32d65912b4da23793dab618d981be2ce11c331Evan Cheng 193f32d65912b4da23793dab618d981be2ce11c331Evan Cheng#include "llvm/CodeGen/LiveInterval.h" 20255f89faee13dc491cb64fbeae3c763e7e2ea4e6Chandler Carruth#include "llvm/CodeGen/MachineFunctionPass.h" 213f32d65912b4da23793dab618d981be2ce11c331Evan Cheng#include "llvm/Support/Allocator.h" 22255f89faee13dc491cb64fbeae3c763e7e2ea4e6Chandler Carruth#include "llvm/Target/TargetRegisterInfo.h" 233f32d65912b4da23793dab618d981be2ce11c331Evan Cheng#include <map> 244c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar#include <unordered_map> 253f32d65912b4da23793dab618d981be2ce11c331Evan Cheng 263f32d65912b4da23793dab618d981be2ce11c331Evan Chengnamespace llvm { 273f32d65912b4da23793dab618d981be2ce11c331Evan Cheng 28f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainarclass LiveStacks : public MachineFunctionPass { 29f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const TargetRegisterInfo *TRI; 30f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 31f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar /// Special pool allocator for VNInfo's (LiveInterval val#). 32f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar /// 33f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar VNInfo::Allocator VNInfoAllocator; 34f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 35f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar /// S2IMap - Stack slot indices to live interval mapping. 36f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar /// 37f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar typedef std::unordered_map<int, LiveInterval> SS2IntervalMap; 38f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar SS2IntervalMap S2IMap; 39f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 40f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar /// S2RCMap - Stack slot indices to register class mapping. 41f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar std::map<int, const TargetRegisterClass *> S2RCMap; 42f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 43f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainarpublic: 44f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar static char ID; // Pass identification, replacement for typeid 45f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar LiveStacks() : MachineFunctionPass(ID) { 46f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar initializeLiveStacksPass(*PassRegistry::getPassRegistry()); 47f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 48f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 49f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar typedef SS2IntervalMap::iterator iterator; 50f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar typedef SS2IntervalMap::const_iterator const_iterator; 51f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const_iterator begin() const { return S2IMap.begin(); } 52f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const_iterator end() const { return S2IMap.end(); } 53f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar iterator begin() { return S2IMap.begin(); } 54f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar iterator end() { return S2IMap.end(); } 55f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 56f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); } 57f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 58f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC); 59f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 60f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar LiveInterval &getInterval(int Slot) { 61f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(Slot >= 0 && "Spill slot indice must be >= 0"); 62f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar SS2IntervalMap::iterator I = S2IMap.find(Slot); 63f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(I != S2IMap.end() && "Interval does not exist for stack slot"); 64f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return I->second; 65f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 66f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 67f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const LiveInterval &getInterval(int Slot) const { 68f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(Slot >= 0 && "Spill slot indice must be >= 0"); 69f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar SS2IntervalMap::const_iterator I = S2IMap.find(Slot); 70f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(I != S2IMap.end() && "Interval does not exist for stack slot"); 71f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return I->second; 72f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 73f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 74f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar bool hasInterval(int Slot) const { return S2IMap.count(Slot); } 75f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 76f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const TargetRegisterClass *getIntervalRegClass(int Slot) const { 77f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(Slot >= 0 && "Spill slot indice must be >= 0"); 78f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar std::map<int, const TargetRegisterClass *>::const_iterator I = 79f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar S2RCMap.find(Slot); 80f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(I != S2RCMap.end() && 81f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar "Register class info does not exist for stack slot"); 82f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return I->second; 83f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 84f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 85f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; } 86f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 87f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar void getAnalysisUsage(AnalysisUsage &AU) const override; 88f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar void releaseMemory() override; 89f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 90f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar /// runOnMachineFunction - pass entry point 91f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar bool runOnMachineFunction(MachineFunction &) override; 92f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 93f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar /// print - Implement the dump method. 94f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar void print(raw_ostream &O, const Module * = nullptr) const override; 95f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar}; 963f32d65912b4da23793dab618d981be2ce11c331Evan Cheng} 973f32d65912b4da23793dab618d981be2ce11c331Evan Cheng 983f32d65912b4da23793dab618d981be2ce11c331Evan Cheng#endif /* LLVM_CODEGEN_LIVESTACK_ANALYSIS_H */ 99