PHIElimination.cpp revision 4888d5e98c7ae1fed28e41d75a65ddf70b25b03d
1//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass eliminates machine instruction PHI nodes by inserting copy 11// instructions. This destroys SSA information, but is the desired input for 12// some register allocators. 13// 14//===----------------------------------------------------------------------===// 15 16#define DEBUG_TYPE "phielim" 17#include "PHIEliminationUtils.h" 18#include "llvm/CodeGen/LiveVariables.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/CodeGen/MachineDominators.h" 21#include "llvm/CodeGen/MachineInstr.h" 22#include "llvm/CodeGen/MachineInstrBuilder.h" 23#include "llvm/CodeGen/MachineLoopInfo.h" 24#include "llvm/CodeGen/MachineRegisterInfo.h" 25#include "llvm/Target/TargetInstrInfo.h" 26#include "llvm/Function.h" 27#include "llvm/Target/TargetMachine.h" 28#include "llvm/ADT/SmallPtrSet.h" 29#include "llvm/ADT/STLExtras.h" 30#include "llvm/ADT/Statistic.h" 31#include "llvm/Support/CommandLine.h" 32#include "llvm/Support/Compiler.h" 33#include "llvm/Support/Debug.h" 34#include <algorithm> 35using namespace llvm; 36 37static cl::opt<bool> 38DisableEdgeSplitting("disable-phi-elim-edge-splitting", cl::init(false), 39 cl::Hidden, cl::desc("Disable critical edge splitting " 40 "during PHI elimination")); 41 42namespace { 43 class PHIElimination : public MachineFunctionPass { 44 MachineRegisterInfo *MRI; // Machine register information 45 46 public: 47 static char ID; // Pass identification, replacement for typeid 48 PHIElimination() : MachineFunctionPass(ID) { 49 initializePHIEliminationPass(*PassRegistry::getPassRegistry()); 50 } 51 52 virtual bool runOnMachineFunction(MachineFunction &Fn); 53 virtual void getAnalysisUsage(AnalysisUsage &AU) const; 54 55 private: 56 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions 57 /// in predecessor basic blocks. 58 /// 59 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB); 60 void LowerAtomicPHINode(MachineBasicBlock &MBB, 61 MachineBasicBlock::iterator AfterPHIsIt); 62 63 /// analyzePHINodes - Gather information about the PHI nodes in 64 /// here. In particular, we want to map the number of uses of a virtual 65 /// register which is used in a PHI node. We map that to the BB the 66 /// vreg is coming from. This is used later to determine when the vreg 67 /// is killed in the BB. 68 /// 69 void analyzePHINodes(const MachineFunction& Fn); 70 71 /// Split critical edges where necessary for good coalescer performance. 72 bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, 73 LiveVariables &LV, MachineLoopInfo *MLI); 74 75 typedef std::pair<unsigned, unsigned> BBVRegPair; 76 typedef DenseMap<BBVRegPair, unsigned> VRegPHIUse; 77 78 VRegPHIUse VRegPHIUseCount; 79 80 // Defs of PHI sources which are implicit_def. 81 SmallPtrSet<MachineInstr*, 4> ImpDefs; 82 83 // Map reusable lowered PHI node -> incoming join register. 84 typedef DenseMap<MachineInstr*, unsigned, 85 MachineInstrExpressionTrait> LoweredPHIMap; 86 LoweredPHIMap LoweredPHIs; 87 }; 88} 89 90STATISTIC(NumAtomic, "Number of atomic phis lowered"); 91STATISTIC(NumCriticalEdgesSplit, "Number of critical edges split"); 92STATISTIC(NumReused, "Number of reused lowered phis"); 93 94char PHIElimination::ID = 0; 95INITIALIZE_PASS(PHIElimination, "phi-node-elimination", 96 "Eliminate PHI nodes for register allocation", false, false) 97 98char& llvm::PHIEliminationID = PHIElimination::ID; 99 100void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const { 101 AU.addPreserved<LiveVariables>(); 102 AU.addPreserved<MachineDominatorTree>(); 103 AU.addPreserved<MachineLoopInfo>(); 104 MachineFunctionPass::getAnalysisUsage(AU); 105} 106 107bool PHIElimination::runOnMachineFunction(MachineFunction &MF) { 108 MRI = &MF.getRegInfo(); 109 110 bool Changed = false; 111 112 // This pass takes the function out of SSA form. 113 MRI->leaveSSA(); 114 115 // Split critical edges to help the coalescer 116 if (!DisableEdgeSplitting) { 117 if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>()) { 118 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); 119 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 120 Changed |= SplitPHIEdges(MF, *I, *LV, MLI); 121 } 122 } 123 124 // Populate VRegPHIUseCount 125 analyzePHINodes(MF); 126 127 // Eliminate PHI instructions by inserting copies into predecessor blocks. 128 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 129 Changed |= EliminatePHINodes(MF, *I); 130 131 // Remove dead IMPLICIT_DEF instructions. 132 for (SmallPtrSet<MachineInstr*, 4>::iterator I = ImpDefs.begin(), 133 E = ImpDefs.end(); I != E; ++I) { 134 MachineInstr *DefMI = *I; 135 unsigned DefReg = DefMI->getOperand(0).getReg(); 136 if (MRI->use_nodbg_empty(DefReg)) 137 DefMI->eraseFromParent(); 138 } 139 140 // Clean up the lowered PHI instructions. 141 for (LoweredPHIMap::iterator I = LoweredPHIs.begin(), E = LoweredPHIs.end(); 142 I != E; ++I) 143 MF.DeleteMachineInstr(I->first); 144 145 LoweredPHIs.clear(); 146 ImpDefs.clear(); 147 VRegPHIUseCount.clear(); 148 149 return Changed; 150} 151 152/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in 153/// predecessor basic blocks. 154/// 155bool PHIElimination::EliminatePHINodes(MachineFunction &MF, 156 MachineBasicBlock &MBB) { 157 if (MBB.empty() || !MBB.front().isPHI()) 158 return false; // Quick exit for basic blocks without PHIs. 159 160 // Get an iterator to the first instruction after the last PHI node (this may 161 // also be the end of the basic block). 162 MachineBasicBlock::iterator AfterPHIsIt = MBB.SkipPHIsAndLabels(MBB.begin()); 163 164 while (MBB.front().isPHI()) 165 LowerAtomicPHINode(MBB, AfterPHIsIt); 166 167 return true; 168} 169 170/// isSourceDefinedByImplicitDef - Return true if all sources of the phi node 171/// are implicit_def's. 172static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi, 173 const MachineRegisterInfo *MRI) { 174 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) { 175 unsigned SrcReg = MPhi->getOperand(i).getReg(); 176 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 177 if (!DefMI || !DefMI->isImplicitDef()) 178 return false; 179 } 180 return true; 181} 182 183 184 185/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block, 186/// under the assuption that it needs to be lowered in a way that supports 187/// atomic execution of PHIs. This lowering method is always correct all of the 188/// time. 189/// 190void PHIElimination::LowerAtomicPHINode( 191 MachineBasicBlock &MBB, 192 MachineBasicBlock::iterator AfterPHIsIt) { 193 ++NumAtomic; 194 // Unlink the PHI node from the basic block, but don't delete the PHI yet. 195 MachineInstr *MPhi = MBB.remove(MBB.begin()); 196 197 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2; 198 unsigned DestReg = MPhi->getOperand(0).getReg(); 199 assert(MPhi->getOperand(0).getSubReg() == 0 && "Can't handle sub-reg PHIs"); 200 bool isDead = MPhi->getOperand(0).isDead(); 201 202 // Create a new register for the incoming PHI arguments. 203 MachineFunction &MF = *MBB.getParent(); 204 unsigned IncomingReg = 0; 205 bool reusedIncoming = false; // Is IncomingReg reused from an earlier PHI? 206 207 // Insert a register to register copy at the top of the current block (but 208 // after any remaining phi nodes) which copies the new incoming register 209 // into the phi node destination. 210 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 211 if (isSourceDefinedByImplicitDef(MPhi, MRI)) 212 // If all sources of a PHI node are implicit_def, just emit an 213 // implicit_def instead of a copy. 214 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 215 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg); 216 else { 217 // Can we reuse an earlier PHI node? This only happens for critical edges, 218 // typically those created by tail duplication. 219 unsigned &entry = LoweredPHIs[MPhi]; 220 if (entry) { 221 // An identical PHI node was already lowered. Reuse the incoming register. 222 IncomingReg = entry; 223 reusedIncoming = true; 224 ++NumReused; 225 DEBUG(dbgs() << "Reusing " << PrintReg(IncomingReg) << " for " << *MPhi); 226 } else { 227 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); 228 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC); 229 } 230 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 231 TII->get(TargetOpcode::COPY), DestReg) 232 .addReg(IncomingReg); 233 } 234 235 // Update live variable information if there is any. 236 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>(); 237 if (LV) { 238 MachineInstr *PHICopy = prior(AfterPHIsIt); 239 240 if (IncomingReg) { 241 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg); 242 243 // Increment use count of the newly created virtual register. 244 LV->setPHIJoin(IncomingReg); 245 246 // When we are reusing the incoming register, it may already have been 247 // killed in this block. The old kill will also have been inserted at 248 // AfterPHIsIt, so it appears before the current PHICopy. 249 if (reusedIncoming) 250 if (MachineInstr *OldKill = VI.findKill(&MBB)) { 251 DEBUG(dbgs() << "Remove old kill from " << *OldKill); 252 LV->removeVirtualRegisterKilled(IncomingReg, OldKill); 253 DEBUG(MBB.dump()); 254 } 255 256 // Add information to LiveVariables to know that the incoming value is 257 // killed. Note that because the value is defined in several places (once 258 // each for each incoming block), the "def" block and instruction fields 259 // for the VarInfo is not filled in. 260 LV->addVirtualRegisterKilled(IncomingReg, PHICopy); 261 } 262 263 // Since we are going to be deleting the PHI node, if it is the last use of 264 // any registers, or if the value itself is dead, we need to move this 265 // information over to the new copy we just inserted. 266 LV->removeVirtualRegistersKilled(MPhi); 267 268 // If the result is dead, update LV. 269 if (isDead) { 270 LV->addVirtualRegisterDead(DestReg, PHICopy); 271 LV->removeVirtualRegisterDead(DestReg, MPhi); 272 } 273 } 274 275 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node. 276 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) 277 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i+1).getMBB()->getNumber(), 278 MPhi->getOperand(i).getReg())]; 279 280 // Now loop over all of the incoming arguments, changing them to copy into the 281 // IncomingReg register in the corresponding predecessor basic block. 282 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto; 283 for (int i = NumSrcs - 1; i >= 0; --i) { 284 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg(); 285 unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg(); 286 287 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) && 288 "Machine PHI Operands must all be virtual registers!"); 289 290 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source 291 // path the PHI. 292 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB(); 293 294 // If source is defined by an implicit def, there is no need to insert a 295 // copy. 296 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 297 if (DefMI->isImplicitDef()) { 298 ImpDefs.insert(DefMI); 299 continue; 300 } 301 302 // Check to make sure we haven't already emitted the copy for this block. 303 // This can happen because PHI nodes may have multiple entries for the same 304 // basic block. 305 if (!MBBsInsertedInto.insert(&opBlock)) 306 continue; // If the copy has already been emitted, we're done. 307 308 // Find a safe location to insert the copy, this may be the first terminator 309 // in the block (or end()). 310 MachineBasicBlock::iterator InsertPos = 311 findPHICopyInsertPoint(&opBlock, &MBB, SrcReg); 312 313 // Insert the copy. 314 if (!reusedIncoming && IncomingReg) 315 BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(), 316 TII->get(TargetOpcode::COPY), IncomingReg).addReg(SrcReg, 0, SrcSubReg); 317 318 // Now update live variable information if we have it. Otherwise we're done 319 if (!LV) continue; 320 321 // We want to be able to insert a kill of the register if this PHI (aka, the 322 // copy we just inserted) is the last use of the source value. Live 323 // variable analysis conservatively handles this by saying that the value is 324 // live until the end of the block the PHI entry lives in. If the value 325 // really is dead at the PHI copy, there will be no successor blocks which 326 // have the value live-in. 327 328 // Also check to see if this register is in use by another PHI node which 329 // has not yet been eliminated. If so, it will be killed at an appropriate 330 // point later. 331 332 // Is it used by any PHI instructions in this block? 333 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)]; 334 335 // Okay, if we now know that the value is not live out of the block, we can 336 // add a kill marker in this block saying that it kills the incoming value! 337 if (!ValueIsUsed && !LV->isLiveOut(SrcReg, opBlock)) { 338 // In our final twist, we have to decide which instruction kills the 339 // register. In most cases this is the copy, however, the first 340 // terminator instruction at the end of the block may also use the value. 341 // In this case, we should mark *it* as being the killing block, not the 342 // copy. 343 MachineBasicBlock::iterator KillInst; 344 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator(); 345 if (Term != opBlock.end() && Term->readsRegister(SrcReg)) { 346 KillInst = Term; 347 348 // Check that no other terminators use values. 349#ifndef NDEBUG 350 for (MachineBasicBlock::iterator TI = llvm::next(Term); 351 TI != opBlock.end(); ++TI) { 352 if (TI->isDebugValue()) 353 continue; 354 assert(!TI->readsRegister(SrcReg) && 355 "Terminator instructions cannot use virtual registers unless" 356 "they are the first terminator in a block!"); 357 } 358#endif 359 } else if (reusedIncoming || !IncomingReg) { 360 // We may have to rewind a bit if we didn't insert a copy this time. 361 KillInst = Term; 362 while (KillInst != opBlock.begin()) { 363 --KillInst; 364 if (KillInst->isDebugValue()) 365 continue; 366 if (KillInst->readsRegister(SrcReg)) 367 break; 368 } 369 } else { 370 // We just inserted this copy. 371 KillInst = prior(InsertPos); 372 } 373 assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction"); 374 375 // Finally, mark it killed. 376 LV->addVirtualRegisterKilled(SrcReg, KillInst); 377 378 // This vreg no longer lives all of the way through opBlock. 379 unsigned opBlockNum = opBlock.getNumber(); 380 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum); 381 } 382 } 383 384 // Really delete the PHI instruction now, if it is not in the LoweredPHIs map. 385 if (reusedIncoming || !IncomingReg) 386 MF.DeleteMachineInstr(MPhi); 387} 388 389/// analyzePHINodes - Gather information about the PHI nodes in here. In 390/// particular, we want to map the number of uses of a virtual register which is 391/// used in a PHI node. We map that to the BB the vreg is coming from. This is 392/// used later to determine when the vreg is killed in the BB. 393/// 394void PHIElimination::analyzePHINodes(const MachineFunction& MF) { 395 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); 396 I != E; ++I) 397 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); 398 BBI != BBE && BBI->isPHI(); ++BBI) 399 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) 400 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(), 401 BBI->getOperand(i).getReg())]; 402} 403 404bool PHIElimination::SplitPHIEdges(MachineFunction &MF, 405 MachineBasicBlock &MBB, 406 LiveVariables &LV, 407 MachineLoopInfo *MLI) { 408 if (MBB.empty() || !MBB.front().isPHI() || MBB.isLandingPad()) 409 return false; // Quick exit for basic blocks without PHIs. 410 411 bool Changed = false; 412 for (MachineBasicBlock::iterator BBI = MBB.begin(), BBE = MBB.end(); 413 BBI != BBE && BBI->isPHI(); ++BBI) { 414 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) { 415 unsigned Reg = BBI->getOperand(i).getReg(); 416 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB(); 417 // We break edges when registers are live out from the predecessor block 418 // (not considering PHI nodes). If the register is live in to this block 419 // anyway, we would gain nothing from splitting. 420 // Avoid splitting backedges of loops. It would introduce small 421 // out-of-line blocks into the loop which is very bad for code placement. 422 if (PreMBB != &MBB && 423 !LV.isLiveIn(Reg, MBB) && LV.isLiveOut(Reg, *PreMBB)) { 424 if (!MLI || 425 !(MLI->getLoopFor(PreMBB) == MLI->getLoopFor(&MBB) && 426 MLI->isLoopHeader(&MBB))) { 427 if (PreMBB->SplitCriticalEdge(&MBB, this)) { 428 Changed = true; 429 ++NumCriticalEdgesSplit; 430 } 431 } 432 } 433 } 434 } 435 return Changed; 436} 437