131d157ae1ac2cd9c787dc3c1d28e64c682803844Jia Liu//===-- HexagonAsmPrinter.cpp - Print machine instrs to Hexagon assembly --===// 2b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// 3b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// The LLVM Compiler Infrastructure 4b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// 5b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// This file is distributed under the University of Illinois Open Source 6b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// License. See LICENSE.TXT for details. 7b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// 8b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum//===----------------------------------------------------------------------===// 9b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// 10b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// This file contains a printer that converts from our internal representation 11b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// of machine-dependent LLVM code to Hexagon assembly language. This printer is 12b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// the output mechanism used by `llc'. 13b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// 14b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum//===----------------------------------------------------------------------===// 15b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 16d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "Hexagon.h" 17d6c98ae63824854ea2175b362a10985cac7cfb32Jyotsna Verma#include "HexagonAsmPrinter.h" 18d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "HexagonMachineFunctionInfo.h" 19d6c98ae63824854ea2175b362a10985cac7cfb32Jyotsna Verma#include "HexagonSubtarget.h" 2036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "HexagonTargetMachine.h" 2137ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines#include "MCTargetDesc/HexagonInstPrinter.h" 22ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines#include "MCTargetDesc/HexagonMCInstrInfo.h" 236948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar#include "MCTargetDesc/HexagonMCShuffler.h" 24d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/ADT/StringExtras.h" 25e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes#include "llvm/Analysis/ConstantFolding.h" 26b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum#include "llvm/CodeGen/AsmPrinter.h" 27b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum#include "llvm/CodeGen/MachineFunctionPass.h" 28b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum#include "llvm/CodeGen/MachineInstr.h" 29b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum#include "llvm/CodeGen/MachineInstrBuilder.h" 30d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/CodeGen/MachineModuleInfo.h" 310b8c9a80f20772c3793201ab5b251d3520b9cea3Chandler Carruth#include "llvm/IR/Constants.h" 320b8c9a80f20772c3793201ab5b251d3520b9cea3Chandler Carruth#include "llvm/IR/DataLayout.h" 330b8c9a80f20772c3793201ab5b251d3520b9cea3Chandler Carruth#include "llvm/IR/DerivedTypes.h" 3436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "llvm/IR/Mangler.h" 350b8c9a80f20772c3793201ab5b251d3520b9cea3Chandler Carruth#include "llvm/IR/Module.h" 36b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum#include "llvm/MC/MCAsmInfo.h" 37e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes#include "llvm/MC/MCContext.h" 38e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes#include "llvm/MC/MCExpr.h" 39e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes#include "llvm/MC/MCInst.h" 40e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes#include "llvm/MC/MCSection.h" 41f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar#include "llvm/MC/MCSectionELF.h" 42e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes#include "llvm/MC/MCStreamer.h" 43b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum#include "llvm/MC/MCSymbol.h" 44b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum#include "llvm/Support/CommandLine.h" 45d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/Support/Debug.h" 46f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar#include "llvm/Support/ELF.h" 47e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes#include "llvm/Support/Format.h" 48d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/Support/MathExtras.h" 4979aa3417eb6f58d668aadfedf075240a41d35a26Craig Topper#include "llvm/Support/TargetRegistry.h" 50d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/Support/raw_ostream.h" 51b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum#include "llvm/Target/TargetInstrInfo.h" 52d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/Target/TargetLoweringObjectFile.h" 53b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum#include "llvm/Target/TargetOptions.h" 54d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/Target/TargetRegisterInfo.h" 55b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 56b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicumusing namespace llvm; 57b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 58f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainarnamespace llvm { 59f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar void HexagonLowerToMC(const MCInstrInfo &MCII, const MachineInstr *MI, 60f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCInst &MCB, HexagonAsmPrinter &AP); 61f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar} 62f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 63dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#define DEBUG_TYPE "asm-printer" 64dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 65b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicumstatic cl::opt<bool> AlignCalls( 66b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum "hexagon-align-calls", cl::Hidden, cl::init(true), 67b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum cl::desc("Insert falign after call instruction for Hexagon target")); 68b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 69f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar// Given a scalar register return its pair. 70f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainarinline static unsigned getHexagonRegisterPair(unsigned Reg, 71f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCRegisterInfo *RI) { 72f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(Hexagon::IntRegsRegClass.contains(Reg)); 73f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCSuperRegIterator SR(Reg, RI, false); 74f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned Pair = *SR; 75f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(Hexagon::DoubleRegsRegClass.contains(Pair)); 76f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return Pair; 77f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar} 78f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 79ebe69fe11e48d322045d5949c83283927a0d790bStephen HinesHexagonAsmPrinter::HexagonAsmPrinter(TargetMachine &TM, 80ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::unique_ptr<MCStreamer> Streamer) 81ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines : AsmPrinter(TM, std::move(Streamer)), Subtarget(nullptr) {} 82ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 83e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezesvoid HexagonAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 84e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes raw_ostream &O) { 85e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes const MachineOperand &MO = MI->getOperand(OpNo); 86e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes 87b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum switch (MO.getType()) { 8826f61a158b3cce69252c05cc0e79f500d6c3d92eSirish Pande default: llvm_unreachable ("<unknown operand type>"); 89e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes case MachineOperand::MO_Register: 90e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes O << HexagonInstPrinter::getRegisterName(MO.getReg()); 91e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes return; 92b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum case MachineOperand::MO_Immediate: 93e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes O << MO.getImm(); 94e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes return; 95b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum case MachineOperand::MO_MachineBasicBlock: 966948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar MO.getMBB()->getSymbol()->print(O, MAI); 97b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return; 98b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum case MachineOperand::MO_ConstantPoolIndex: 996948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar GetCPISymbol(MO.getIndex())->print(O, MAI); 100b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return; 101e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes case MachineOperand::MO_GlobalAddress: 102b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum // Computing the address of a global symbol, not calling it. 1036948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar getSymbol(MO.getGlobal())->print(O, MAI); 104b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum printOffset(MO.getOffset(), O); 105b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return; 106b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum } 107b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum} 108b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 109b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// 110b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// isBlockOnlyReachableByFallthrough - We need to override this since the 111b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// default AsmPrinter does not print labels for any basic block that 112b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// is only reachable by a fall through. That works for all cases except 113b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// for the case in which the basic block is reachable by a fall through but 114b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// through an indirect from a jump table. In this case, the jump table 115b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// will contain a label not defined by AsmPrinter. 116b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum// 117b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicumbool HexagonAsmPrinter:: 118b4b54153ad760c69a00a08531abef4ed434a5092Tony LinthicumisBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const { 119f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (MBB->hasAddressTaken()) 120b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return false; 121b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return AsmPrinter::isBlockOnlyReachableByFallthrough(MBB); 122b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum} 123b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 124b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 125b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum/// PrintAsmOperand - Print out an operand for an inline asm expression. 126b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum/// 127b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicumbool HexagonAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 128b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum unsigned AsmVariant, 129b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum const char *ExtraCode, 130e5041e6fa8fa74a26e031b7487be1912257c87f1Evandro Menezes raw_ostream &OS) { 131b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum // Does this asm operand have a single letter operand modifier? 132b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum if (ExtraCode && ExtraCode[0]) { 133f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (ExtraCode[1] != 0) 134f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return true; // Unknown modifier. 135b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 136b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum switch (ExtraCode[0]) { 1370518fca843ff87d069ecb07fc00d306c1f587d58Jack Carter default: 1380518fca843ff87d069ecb07fc00d306c1f587d58Jack Carter // See if this is a generic print operand 1390518fca843ff87d069ecb07fc00d306c1f587d58Jack Carter return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, OS); 140b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum case 'c': // Don't print "$" before a global var name or constant. 141b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum // Hexagon never has a prefix. 142b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum printOperand(MI, OpNo, OS); 143b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return false; 144b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum case 'L': // Write second word of DImode reference. 145b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum // Verify that this operand has two consecutive registers. 146b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum if (!MI->getOperand(OpNo).isReg() || 147b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum OpNo+1 == MI->getNumOperands() || 148b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum !MI->getOperand(OpNo+1).isReg()) 149b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return true; 150b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum ++OpNo; // Return the high-part. 151b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum break; 152b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum case 'I': 153b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum // Write 'i' if an integer constant, otherwise nothing. Used to print 154b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum // addi vs add, etc. 155b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum if (MI->getOperand(OpNo).isImm()) 156b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum OS << "i"; 157b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return false; 158b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum } 159b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum } 160b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 161b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum printOperand(MI, OpNo, OS); 162b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return false; 163b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum} 164b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 165b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicumbool HexagonAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, 166b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum unsigned OpNo, unsigned AsmVariant, 167b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum const char *ExtraCode, 168b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum raw_ostream &O) { 169b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum if (ExtraCode && ExtraCode[0]) 170b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return true; // Unknown modifier. 171b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 172b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum const MachineOperand &Base = MI->getOperand(OpNo); 173b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum const MachineOperand &Offset = MI->getOperand(OpNo+1); 174b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 175b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum if (Base.isReg()) 176b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum printOperand(MI, OpNo, O); 177b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum else 178bc2198133a1836598b54b943420748e75d5dea94Craig Topper llvm_unreachable("Unimplemented"); 179b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 180b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum if (Offset.isImm()) { 181b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum if (Offset.getImm()) 182b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum O << " + #" << Offset.getImm(); 183b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum } 184b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum else 185bc2198133a1836598b54b943420748e75d5dea94Craig Topper llvm_unreachable("Unimplemented"); 186b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 187b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum return false; 188b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum} 189b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 190de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainarstatic MCSymbol *smallData(AsmPrinter &AP, const MachineInstr &MI, 191de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar MCStreamer &OutStreamer, const MCOperand &Imm, 192de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar int AlignSize) { 193f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCSymbol *Sym; 194f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar int64_t Value; 195f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Imm.getExpr()->evaluateAsAbsolute(Value)) { 196f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar StringRef sectionPrefix; 197f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar std::string ImmString; 198f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar StringRef Name; 199f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (AlignSize == 8) { 200f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar Name = ".CONST_0000000000000000"; 201f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar sectionPrefix = ".gnu.linkonce.l8"; 202f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar ImmString = utohexstr(Value); 203f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } else { 204f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar Name = ".CONST_00000000"; 205f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar sectionPrefix = ".gnu.linkonce.l4"; 206f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar ImmString = utohexstr(static_cast<uint32_t>(Value)); 207f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 208f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 209f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar std::string symbolName = // Yes, leading zeros are kept. 210f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar Name.drop_back(ImmString.size()).str() + ImmString; 211f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar std::string sectionName = sectionPrefix.str() + symbolName; 212f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 213f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCSectionELF *Section = OutStreamer.getContext().getELFSection( 214f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar sectionName, ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 215f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer.SwitchSection(Section); 216f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 217f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar Sym = AP.OutContext.getOrCreateSymbol(Twine(symbolName)); 218f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Sym->isUndefined()) { 219f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer.EmitLabel(Sym); 220f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer.EmitSymbolAttribute(Sym, MCSA_Global); 221f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer.EmitIntValue(Value, AlignSize); 222f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer.EmitCodeAlignment(AlignSize); 223f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 224f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } else { 225f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(Imm.isExpr() && "Expected expression and found none"); 226f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MachineOperand &MO = MI.getOperand(1); 227f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(MO.isGlobal() || MO.isCPI() || MO.isJTI()); 228f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCSymbol *MOSymbol = nullptr; 229f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (MO.isGlobal()) 230f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MOSymbol = AP.getSymbol(MO.getGlobal()); 231f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else if (MO.isCPI()) 232f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MOSymbol = AP.GetCPISymbol(MO.getIndex()); 233f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else if (MO.isJTI()) 234f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MOSymbol = AP.GetJTISymbol(MO.getIndex()); 235f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else 236f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar llvm_unreachable("Unknown operand type!"); 237f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 238f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar StringRef SymbolName = MOSymbol->getName(); 239f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar std::string LitaName = ".CONST_" + SymbolName.str(); 240f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 241f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCSectionELF *Section = OutStreamer.getContext().getELFSection( 242f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar ".lita", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 243f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 244f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer.SwitchSection(Section); 245f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar Sym = AP.OutContext.getOrCreateSymbol(Twine(LitaName)); 246f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Sym->isUndefined()) { 247f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer.EmitLabel(Sym); 248f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer.EmitSymbolAttribute(Sym, MCSA_Local); 249f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer.EmitValue(Imm.getExpr(), AlignSize); 250f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer.EmitCodeAlignment(AlignSize); 251f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 252f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 253f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return Sym; 254f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar} 255f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 256f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainarvoid HexagonAsmPrinter::HexagonProcessInstruction(MCInst &Inst, 257f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MachineInstr &MI) { 258f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCInst &MappedInst = static_cast <MCInst &>(Inst); 259f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCRegisterInfo *RI = OutStreamer->getContext().getRegisterInfo(); 260f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 261f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar switch (Inst.getOpcode()) { 262f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar default: return; 263f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 264de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar case Hexagon::A2_iconst: { 265de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar Inst.setOpcode(Hexagon::A2_addi); 266de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar MCOperand Reg = Inst.getOperand(0); 267de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar MCOperand S16 = Inst.getOperand(1); 268de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar HexagonMCInstrInfo::setMustNotExtend(*S16.getExpr()); 269de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar HexagonMCInstrInfo::setS23_2_reloc(*S16.getExpr()); 270de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar Inst.clear(); 271de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar Inst.addOperand(Reg); 272de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar Inst.addOperand(MCOperand::createReg(Hexagon::R0)); 273de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar Inst.addOperand(S16); 274de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar break; 275de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar } 276de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar 277f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // "$dst = CONST64(#$src1)", 278f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::CONST64_Float_Real: 279f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::CONST64_Int_Real: 280f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (!OutStreamer->hasRawTextSupport()) { 281f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCOperand &Imm = MappedInst.getOperand(1); 282f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCSectionSubPair Current = OutStreamer->getCurrentSection(); 283f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 284f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCSymbol *Sym = smallData(*this, MI, *OutStreamer, Imm, 8); 285f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 286f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer->SwitchSection(Current.first, Current.second); 287f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCInst TmpInst; 288f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Reg = MappedInst.getOperand(0); 289f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::L2_loadrdgp); 290f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(Reg); 291f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MCOperand::createExpr( 292f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCSymbolRefExpr::create(Sym, OutContext))); 293f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst = TmpInst; 294f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 295f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 296f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar break; 297f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::CONST32: 298f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::CONST32_Float_Real: 299f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::CONST32_Int_Real: 300f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::FCONST32_nsdata: 301f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (!OutStreamer->hasRawTextSupport()) { 302f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Imm = MappedInst.getOperand(1); 303f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCSectionSubPair Current = OutStreamer->getCurrentSection(); 304f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCSymbol *Sym = smallData(*this, MI, *OutStreamer, Imm, 4); 305f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer->SwitchSection(Current.first, Current.second); 306f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCInst TmpInst; 307f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Reg = MappedInst.getOperand(0); 308f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::L2_loadrigp); 309f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(Reg); 310de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar TmpInst.addOperand(MCOperand::createExpr(HexagonMCExpr::create( 311de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar MCSymbolRefExpr::create(Sym, OutContext), OutContext))); 312f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst = TmpInst; 313f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 314f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar break; 315f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 316f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // C2_pxfer_map maps to C2_or instruction. Though, it's possible to use 317f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // C2_or during instruction selection itself but it results 318f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // into suboptimal code. 319f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::C2_pxfer_map: { 320f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Ps = Inst.getOperand(1); 321f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::C2_or); 322f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.addOperand(Ps); 323f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 324f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 325f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 326f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // Vector reduce complex multiply by scalar, Rt & 1 map to :hi else :lo 327f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // The insn is mapped from the 4 operand to the 3 operand raw form taking 328f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // 3 register pairs. 329f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::M2_vrcmpys_acc_s1: { 330f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Rt = Inst.getOperand(3); 331f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert (Rt.isReg() && "Expected register and none was found"); 332f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned Reg = RI->getEncodingValue(Rt.getReg()); 333f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Reg & 1) 334f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::M2_vrcmpys_acc_s1_h); 335f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else 336f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::M2_vrcmpys_acc_s1_l); 337f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); 338f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 339f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 340f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::M2_vrcmpys_s1: { 341f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Rt = Inst.getOperand(2); 342f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert (Rt.isReg() && "Expected register and none was found"); 343f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned Reg = RI->getEncodingValue(Rt.getReg()); 344f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Reg & 1) 345f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::M2_vrcmpys_s1_h); 346f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else 347f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::M2_vrcmpys_s1_l); 348f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); 349f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 350f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 351f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 352f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::M2_vrcmpys_s1rp: { 353f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Rt = Inst.getOperand(2); 354f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert (Rt.isReg() && "Expected register and none was found"); 355f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned Reg = RI->getEncodingValue(Rt.getReg()); 356f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Reg & 1) 357f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::M2_vrcmpys_s1rp_h); 358f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else 359f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::M2_vrcmpys_s1rp_l); 360f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); 361f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 362f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 363f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 364f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::A4_boundscheck: { 365f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Rs = Inst.getOperand(1); 366f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert (Rs.isReg() && "Expected register and none was found"); 367f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned Reg = RI->getEncodingValue(Rs.getReg()); 368f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Reg & 1) // Odd mapped to raw:hi, regpair is rodd:odd-1, like r3:2 369f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::A4_boundscheck_hi); 370f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else // raw:lo 371f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::A4_boundscheck_lo); 372f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar Rs.setReg(getHexagonRegisterPair(Rs.getReg(), RI)); 373f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 374f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 375f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::S5_asrhub_rnd_sat_goodsyntax: { 376f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &MO = MappedInst.getOperand(2); 377f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar int64_t Imm; 378f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCExpr const *Expr = MO.getExpr(); 379f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar bool Success = Expr->evaluateAsAbsolute(Imm); 380de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar assert (Success && "Expected immediate and none was found"); 381de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar (void)Success; 382f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCInst TmpInst; 383f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Imm == 0) { 384f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::S2_vsathub); 385f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(0)); 386f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(1)); 387f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst = TmpInst; 388f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 389f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 390f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::S5_asrhub_rnd_sat); 391f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(0)); 392f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(1)); 393f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCExpr *One = MCConstantExpr::create(1, OutContext); 394f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCExpr *Sub = MCBinaryExpr::createSub(Expr, One, OutContext); 395de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar TmpInst.addOperand( 396de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar MCOperand::createExpr(HexagonMCExpr::create(Sub, OutContext))); 397f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst = TmpInst; 398f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 399f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 400f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::S5_vasrhrnd_goodsyntax: 401f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::S2_asr_i_p_rnd_goodsyntax: { 402f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &MO2 = MappedInst.getOperand(2); 403f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCExpr const *Expr = MO2.getExpr(); 404f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar int64_t Imm; 405f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar bool Success = Expr->evaluateAsAbsolute(Imm); 406de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar assert (Success && "Expected immediate and none was found"); 407de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar (void)Success; 408f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCInst TmpInst; 409f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Imm == 0) { 410f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::A2_combinew); 411f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(0)); 412f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &MO1 = MappedInst.getOperand(1); 413f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned High = RI->getSubReg(MO1.getReg(), Hexagon::subreg_hireg); 414f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned Low = RI->getSubReg(MO1.getReg(), Hexagon::subreg_loreg); 415f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // Add a new operand for the second register in the pair. 416f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MCOperand::createReg(High)); 417f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MCOperand::createReg(Low)); 418f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst = TmpInst; 419f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 420f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 421f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 422f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Inst.getOpcode() == Hexagon::S2_asr_i_p_rnd_goodsyntax) 423f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::S2_asr_i_p_rnd); 424f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else 425f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::S5_vasrhrnd); 426f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(0)); 427f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(1)); 428f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCExpr *One = MCConstantExpr::create(1, OutContext); 429f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCExpr *Sub = MCBinaryExpr::createSub(Expr, One, OutContext); 430de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar TmpInst.addOperand( 431de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar MCOperand::createExpr(HexagonMCExpr::create(Sub, OutContext))); 432f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst = TmpInst; 433f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 434f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 435f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // if ("#u5==0") Assembler mapped to: "Rd=Rs"; else Rd=asr(Rs,#u5-1):rnd 436f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::S2_asr_i_r_rnd_goodsyntax: { 437f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &MO = Inst.getOperand(2); 438f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCExpr const *Expr = MO.getExpr(); 439f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar int64_t Imm; 440f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar bool Success = Expr->evaluateAsAbsolute(Imm); 441de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar assert (Success && "Expected immediate and none was found"); 442de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar (void)Success; 443f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCInst TmpInst; 444f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Imm == 0) { 445f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::A2_tfr); 446f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(0)); 447f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(1)); 448f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst = TmpInst; 449f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 450f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 451f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::S2_asr_i_r_rnd); 452f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(0)); 453f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MappedInst.getOperand(1)); 454f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCExpr *One = MCConstantExpr::create(1, OutContext); 455f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCExpr *Sub = MCBinaryExpr::createSub(Expr, One, OutContext); 456de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar TmpInst.addOperand( 457de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar MCOperand::createExpr(HexagonMCExpr::create(Sub, OutContext))); 458f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst = TmpInst; 459f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 460f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 461f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::TFRI_f: 462f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::A2_tfrsi); 463f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 464f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::TFRI_cPt_f: 465f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::C2_cmoveit); 466f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 467f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::TFRI_cNotPt_f: 468f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::C2_cmoveif); 469f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 470f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::MUX_ri_f: 471f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::C2_muxri); 472f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 473f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::MUX_ir_f: 474f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::C2_muxir); 475f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 476f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 477f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // Translate a "$Rdd = #imm" to "$Rdd = combine(#[-1,0], #imm)" 478f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::A2_tfrpi: { 479f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCInst TmpInst; 480f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Rdd = MappedInst.getOperand(0); 481f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &MO = MappedInst.getOperand(1); 482f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 483f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::A2_combineii); 484f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(Rdd); 485f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar int64_t Imm; 486f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar bool Success = MO.getExpr()->evaluateAsAbsolute(Imm); 487f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Success && Imm < 0) { 488f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCExpr *MOne = MCConstantExpr::create(-1, OutContext); 489de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar TmpInst.addOperand(MCOperand::createExpr(HexagonMCExpr::create(MOne, OutContext))); 490f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } else { 491f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCExpr *Zero = MCConstantExpr::create(0, OutContext); 492de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar TmpInst.addOperand(MCOperand::createExpr(HexagonMCExpr::create(Zero, OutContext))); 493f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 494f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(MO); 495f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst = TmpInst; 496f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 497f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 498f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // Translate a "$Rdd = $Rss" to "$Rdd = combine($Rs, $Rt)" 499f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::A2_tfrp: { 500f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &MO = MappedInst.getOperand(1); 501f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); 502f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::subreg_loreg); 503f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MO.setReg(High); 504f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // Add a new operand for the second register in the pair. 505f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.addOperand(MCOperand::createReg(Low)); 506f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::A2_combinew); 507f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 508f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 509f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 510f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::A2_tfrpt: 511f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::A2_tfrpf: { 512f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &MO = MappedInst.getOperand(2); 513f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); 514f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::subreg_loreg); 515f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MO.setReg(High); 516f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // Add a new operand for the second register in the pair. 517f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.addOperand(MCOperand::createReg(Low)); 518f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrpt) 519f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar ? Hexagon::C2_ccombinewt 520f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar : Hexagon::C2_ccombinewf); 521f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 522f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 523f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::A2_tfrptnew: 524f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::A2_tfrpfnew: { 525f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &MO = MappedInst.getOperand(2); 526f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); 527f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::subreg_loreg); 528f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MO.setReg(High); 529f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar // Add a new operand for the second register in the pair. 530f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.addOperand(MCOperand::createReg(Low)); 531f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrptnew) 532f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar ? Hexagon::C2_ccombinewnewt 533f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar : Hexagon::C2_ccombinewnewf); 534f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 535f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 536f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 537f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::M2_mpysmi: { 538f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Imm = MappedInst.getOperand(2); 539f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCExpr const *Expr = Imm.getExpr(); 540f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar int64_t Value; 541f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar bool Success = Expr->evaluateAsAbsolute(Value); 542de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar assert(Success); 543de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar (void)Success; 544f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Value < 0 && Value > -256) { 545f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::M2_mpysin); 546de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar Imm.setExpr(HexagonMCExpr::create( 547de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar MCUnaryExpr::createMinus(Expr, OutContext), OutContext)); 548de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar } else 549f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::M2_mpysip); 550f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 551f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 552f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 553f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::A2_addsp: { 554f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCOperand &Rt = Inst.getOperand(1); 555f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert (Rt.isReg() && "Expected register and none was found"); 556f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar unsigned Reg = RI->getEncodingValue(Rt.getReg()); 557f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (Reg & 1) 558f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::A2_addsph); 559f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else 560f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst.setOpcode(Hexagon::A2_addspl); 561f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); 562f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 563f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 564f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::HEXAGON_V6_vd0_pseudo: 565f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Hexagon::HEXAGON_V6_vd0_pseudo_128B: { 566f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCInst TmpInst; 567f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert (Inst.getOperand(0).isReg() && 568f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar "Expected register and none was found"); 569f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 570f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.setOpcode(Hexagon::V6_vxor); 571f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(Inst.getOperand(0)); 572f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(Inst.getOperand(0)); 573f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar TmpInst.addOperand(Inst.getOperand(0)); 574f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MappedInst = TmpInst; 575f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 576f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 577f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 578f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 579f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar} 580f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 581b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 582b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum/// printMachineInstruction -- Print out a single Hexagon MI in Darwin syntax to 583b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum/// the current output stream. 584b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum/// 585b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicumvoid HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) { 586f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCInst MCB = HexagonMCInstrInfo::createBundle(); 587f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const MCInstrInfo &MCII = *Subtarget->getInstrInfo(); 58826f61a158b3cce69252c05cc0e79f500d6c3d92eSirish Pande 5896948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar if (MI->isBundle()) { 5906948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar const MachineBasicBlock* MBB = MI->getParent(); 591f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MachineBasicBlock::const_instr_iterator MII = MI->getIterator(); 5926948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar unsigned IgnoreCount = 0; 5936948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar 594f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar for (++MII; MII != MBB->instr_end() && MII->isInsideBundle(); ++MII) 5956948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar if (MII->getOpcode() == TargetOpcode::DBG_VALUE || 5966948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar MII->getOpcode() == TargetOpcode::IMPLICIT_DEF) 5976948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar ++IgnoreCount; 598f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else 599f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar HexagonLowerToMC(MCII, &*MII, MCB, *this); 60026f61a158b3cce69252c05cc0e79f500d6c3d92eSirish Pande } 601f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar else 602f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar HexagonLowerToMC(MCII, MI, MCB, *this); 603f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 604f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar bool Ok = HexagonMCInstrInfo::canonicalizePacket( 605f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar MCII, *Subtarget, OutStreamer->getContext(), MCB, nullptr); 606f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar assert(Ok); 607f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar (void)Ok; 608f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if(HexagonMCInstrInfo::bundleSize(MCB) == 0) 609f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar return; 610f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OutStreamer->EmitInstruction(MCB, getSubtargetInfo()); 611b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum} 612b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum 613b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicumextern "C" void LLVMInitializeHexagonAsmPrinter() { 614b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum RegisterAsmPrinter<HexagonAsmPrinter> X(TheHexagonTarget); 615b4b54153ad760c69a00a08531abef4ed434a5092Tony Linthicum} 616