MipsTargetMachine.cpp revision 0bf3dfbef60e36827df9c7e12b62503f1e345cd0
1//===-- MipsTargetMachine.cpp - Define TargetMachine for Mips ------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===---------------------------------------------------------------------===// 9// 10// Implements the info about Mips target spec. 11// 12//===---------------------------------------------------------------------===// 13 14#include "Mips.h" 15#include "MipsMCAsmInfo.h" 16#include "MipsTargetMachine.h" 17#include "llvm/PassManager.h" 18#include "llvm/Target/TargetRegistry.h" 19using namespace llvm; 20 21extern "C" void LLVMInitializeMipsTarget() { 22 // Register the target. 23 RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget); 24 RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget); 25 RegisterAsmInfo<MipsMCAsmInfo> A(TheMipsTarget); 26 RegisterAsmInfo<MipsMCAsmInfo> B(TheMipselTarget); 27} 28 29// DataLayout --> Big-endian, 32-bit pointer/ABI/alignment 30// The stack is always 8 byte aligned 31// On function prologue, the stack is created by decrementing 32// its pointer. Once decremented, all references are done with positive 33// offset from the stack/frame pointer, using StackGrowsUp enables 34// an easier handling. 35// Using CodeModel::Large enables different CALL behavior. 36MipsTargetMachine:: 37MipsTargetMachine(const Target &T, const std::string &TT, 38 const std::string &FS, bool isLittle=false) : 39 LLVMTargetMachine(T, TT), 40 Subtarget(TT, FS, isLittle), 41 DataLayout(isLittle ? std::string("e-p:32:32:32-i8:8:32-i16:16:32-n32") : 42 std::string("E-p:32:32:32-i8:8:32-i16:16:32-n32")), 43 InstrInfo(*this), 44 FrameLowering(Subtarget), 45 TLInfo(*this), TSInfo(*this) { 46 // Abicall enables PIC by default 47 if (getRelocationModel() == Reloc::Default) { 48 if (Subtarget.isABI_O32()) 49 setRelocationModel(Reloc::PIC_); 50 else 51 setRelocationModel(Reloc::Static); 52 } 53} 54 55MipselTargetMachine:: 56MipselTargetMachine(const Target &T, const std::string &TT, 57 const std::string &FS) : 58 MipsTargetMachine(T, TT, FS, true) {} 59 60// Install an instruction selector pass using 61// the ISelDag to gen Mips code. 62bool MipsTargetMachine:: 63addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) 64{ 65 PM.add(createMipsISelDag(*this)); 66 return false; 67} 68 69// Implemented by targets that want to run passes immediately before 70// machine code is emitted. return true if -print-machineinstrs should 71// print out the code after the passes. 72bool MipsTargetMachine:: 73addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) 74{ 75 PM.add(createMipsDelaySlotFillerPass(*this)); 76 return true; 77} 78 79bool MipsTargetMachine:: 80addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) { 81 PM.add(createMipsExpandPseudoPass(*this)); 82 return true; 83} 84