i915_state_emit.c revision 8af684e37e7bacfc40aa9cd5f30ca1f692d0c62c
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include "i915_reg.h" 30#include "i915_context.h" 31#include "i915_batch.h" 32#include "i915_debug.h" 33#include "i915_resource.h" 34 35#include "pipe/p_context.h" 36#include "pipe/p_defines.h" 37 38static unsigned translate_format( enum pipe_format format ) 39{ 40 switch (format) { 41 case PIPE_FORMAT_B8G8R8A8_UNORM: 42 return COLOR_BUF_ARGB8888; 43 case PIPE_FORMAT_B5G6R5_UNORM: 44 return COLOR_BUF_RGB565; 45 default: 46 assert(0); 47 return 0; 48 } 49} 50 51static unsigned translate_depth_format( enum pipe_format zformat ) 52{ 53 switch (zformat) { 54 case PIPE_FORMAT_Z24X8_UNORM: 55 case PIPE_FORMAT_Z24_UNORM_S8_USCALED: 56 return DEPTH_FRMT_24_FIXED_8_OTHER; 57 case PIPE_FORMAT_Z16_UNORM: 58 return DEPTH_FRMT_16_FIXED; 59 default: 60 assert(0); 61 return 0; 62 } 63} 64 65 66/** 67 * Examine framebuffer state to determine width, height. 68 */ 69static boolean 70framebuffer_size(const struct pipe_framebuffer_state *fb, 71 uint *width, uint *height) 72{ 73 if (fb->cbufs[0]) { 74 *width = fb->cbufs[0]->width; 75 *height = fb->cbufs[0]->height; 76 return TRUE; 77 } 78 else if (fb->zsbuf) { 79 *width = fb->zsbuf->width; 80 *height = fb->zsbuf->height; 81 return TRUE; 82 } 83 else { 84 *width = *height = 0; 85 return FALSE; 86 } 87} 88 89static inline uint32_t 90buf_3d_tiling_bits(enum i915_winsys_buffer_tile tiling) 91{ 92 uint32_t tiling_bits = 0; 93 94 switch (tiling) { 95 case I915_TILE_Y: 96 tiling_bits |= BUF_3D_TILE_WALK_Y; 97 case I915_TILE_X: 98 tiling_bits |= BUF_3D_TILED_SURFACE; 99 case I915_TILE_NONE: 100 break; 101 } 102 103 return tiling_bits; 104} 105 106/* Push the state into the sarea and/or texture memory. 107 */ 108void 109i915_emit_hardware_state(struct i915_context *i915 ) 110{ 111 /* XXX: there must be an easier way */ 112 const unsigned dwords = ( 14 + 113 7 + 114 I915_MAX_DYNAMIC + 115 8 + 116 2 + I915_TEX_UNITS*3 + 117 2 + I915_TEX_UNITS*3 + 118 2 + I915_MAX_CONSTANT*4 + 119#if 0 120 i915->current.program_len + 121#else 122 i915->fs->program_len + 123#endif 124 6 125 ) * 3/2; /* plus 50% margin */ 126 const unsigned relocs = ( I915_TEX_UNITS + 127 3 128 ) * 3/2; /* plus 50% margin */ 129 130 uintptr_t save_ptr; 131 size_t save_relocs; 132 133 if (I915_DBG_ON(DBG_ATOMS)) 134 i915_dump_hardware_dirty(i915, __FUNCTION__); 135 136 if(!BEGIN_BATCH(dwords, relocs)) { 137 FLUSH_BATCH(NULL); 138 assert(BEGIN_BATCH(dwords, relocs)); 139 } 140 141 save_ptr = (uintptr_t)i915->batch->ptr; 142 save_relocs = i915->batch->relocs; 143 144 /* 14 dwords, 0 relocs */ 145 if (i915->hardware_dirty & I915_HW_INVARIENT) 146 { 147 OUT_BATCH(_3DSTATE_AA_CMD | 148 AA_LINE_ECAAR_WIDTH_ENABLE | 149 AA_LINE_ECAAR_WIDTH_1_0 | 150 AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0); 151 152 OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); 153 OUT_BATCH(0); 154 155 OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD); 156 OUT_BATCH(0); 157 158 OUT_BATCH(_3DSTATE_DFLT_Z_CMD); 159 OUT_BATCH(0); 160 161 OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS | 162 CSB_TCB(0, 0) | 163 CSB_TCB(1, 1) | 164 CSB_TCB(2, 2) | 165 CSB_TCB(3, 3) | 166 CSB_TCB(4, 4) | 167 CSB_TCB(5, 5) | 168 CSB_TCB(6, 6) | 169 CSB_TCB(7, 7)); 170 171 OUT_BATCH(_3DSTATE_RASTER_RULES_CMD | 172 ENABLE_POINT_RASTER_RULE | 173 OGL_POINT_RASTER_RULE | 174 ENABLE_LINE_STRIP_PROVOKE_VRTX | 175 ENABLE_TRI_FAN_PROVOKE_VRTX | 176 LINE_STRIP_PROVOKE_VRTX(1) | 177 TRI_FAN_PROVOKE_VRTX(2) | 178 ENABLE_TEXKILL_3D_4D | 179 TEXKILL_4D); 180 181 /* Need to initialize this to zero. 182 */ 183 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | (0)); 184 OUT_BATCH(0); 185 186 OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE); 187 188 /* disable indirect state for now 189 */ 190 OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0); 191 OUT_BATCH(0); 192 } 193 194 /* 7 dwords, 1 relocs */ 195 if (i915->hardware_dirty & I915_HW_IMMEDIATE) 196 { 197 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | 198 I1_LOAD_S(0) | 199 I1_LOAD_S(1) | 200 I1_LOAD_S(2) | 201 I1_LOAD_S(4) | 202 I1_LOAD_S(5) | 203 I1_LOAD_S(6) | 204 (5)); 205 206 if(i915->vbo) 207 OUT_RELOC(i915->vbo, 208 I915_USAGE_VERTEX, 209 i915->current.immediate[I915_IMMEDIATE_S0]); 210 else 211 /* FIXME: we should not do this */ 212 OUT_BATCH(0); 213 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S1]); 214 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S2]); 215 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S4]); 216 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S5]); 217 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S6]); 218 } 219 220#if 01 221 /* I915_MAX_DYNAMIC dwords, 0 relocs */ 222 if (i915->hardware_dirty & I915_HW_DYNAMIC) 223 { 224 int i; 225 for (i = 0; i < I915_MAX_DYNAMIC; i++) { 226 OUT_BATCH(i915->current.dynamic[i]); 227 } 228 } 229#endif 230 231#if 01 232 /* 8 dwords, 2 relocs */ 233 if (i915->hardware_dirty & I915_HW_STATIC) 234 { 235 struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0]; 236 struct pipe_surface *depth_surface = i915->framebuffer.zsbuf; 237 238 if (cbuf_surface) { 239 struct i915_texture *tex = i915_texture(cbuf_surface->texture); 240 uint32_t tiling_bits = 0; 241 assert(tex); 242 243 OUT_BATCH(_3DSTATE_BUF_INFO_CMD); 244 245 OUT_BATCH(BUF_3D_ID_COLOR_BACK | 246 BUF_3D_PITCH(tex->stride) | /* pitch in bytes */ 247 buf_3d_tiling_bits(tex->tiling)); 248 249 OUT_RELOC(tex->buffer, 250 I915_USAGE_RENDER, 251 0); 252 } 253 254 /* What happens if no zbuf?? 255 */ 256 if (depth_surface) { 257 struct i915_texture *tex = i915_texture(depth_surface->texture); 258 assert(tex); 259 260 OUT_BATCH(_3DSTATE_BUF_INFO_CMD); 261 262 assert(tex); 263 OUT_BATCH(BUF_3D_ID_DEPTH | 264 BUF_3D_PITCH(tex->stride) | /* pitch in bytes */ 265 buf_3d_tiling_bits(tex->tiling)); 266 267 OUT_RELOC(tex->buffer, 268 I915_USAGE_RENDER, 269 depth_surface->offset); 270 } 271 272 { 273 unsigned cformat, zformat = 0; 274 275 if (cbuf_surface) 276 cformat = cbuf_surface->format; 277 else 278 cformat = PIPE_FORMAT_B8G8R8A8_UNORM; /* arbitrary */ 279 cformat = translate_format(cformat); 280 281 if (depth_surface) 282 zformat = translate_depth_format( i915->framebuffer.zsbuf->format ); 283 284 OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD); 285 OUT_BATCH(DSTORG_HORT_BIAS(0x8) | /* .5 */ 286 DSTORG_VERT_BIAS(0x8) | /* .5 */ 287 LOD_PRECLAMP_OGL | 288 TEX_DEFAULT_COLOR_OGL | 289 cformat | 290 zformat ); 291 } 292 } 293#endif 294 295#if 01 296 /* texture images */ 297 /* 2 + I915_TEX_UNITS*3 dwords, I915_TEX_UNITS relocs */ 298 if (i915->hardware_dirty & (I915_HW_MAP | I915_HW_SAMPLER)) 299 { 300 const uint nr = i915->current.sampler_enable_nr; 301 if (nr) { 302 const uint enabled = i915->current.sampler_enable_flags; 303 uint unit; 304 uint count = 0; 305 OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr)); 306 OUT_BATCH(enabled); 307 for (unit = 0; unit < I915_TEX_UNITS; unit++) { 308 if (enabled & (1 << unit)) { 309 struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture); 310 struct i915_winsys_buffer *buf = texture->buffer; 311 assert(buf); 312 313 count++; 314 315 OUT_RELOC(buf, I915_USAGE_SAMPLER, 0); 316 OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */ 317 OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */ 318 } 319 } 320 assert(count == nr); 321 } 322 } 323#endif 324 325#if 01 326 /* samplers */ 327 /* 2 + I915_TEX_UNITS*3 dwords, 0 relocs */ 328 if (i915->hardware_dirty & I915_HW_SAMPLER) 329 { 330 if (i915->current.sampler_enable_nr) { 331 int i; 332 333 OUT_BATCH( _3DSTATE_SAMPLER_STATE | 334 (3 * i915->current.sampler_enable_nr) ); 335 336 OUT_BATCH( i915->current.sampler_enable_flags ); 337 338 for (i = 0; i < I915_TEX_UNITS; i++) { 339 if (i915->current.sampler_enable_flags & (1<<i)) { 340 OUT_BATCH( i915->current.sampler[i][0] ); 341 OUT_BATCH( i915->current.sampler[i][1] ); 342 OUT_BATCH( i915->current.sampler[i][2] ); 343 } 344 } 345 } 346 } 347#endif 348 349#if 01 350 /* constants */ 351 /* 2 + I915_MAX_CONSTANT*4 dwords, 0 relocs */ 352 if (i915->hardware_dirty & I915_HW_CONSTANTS) 353 { 354 /* Collate the user-defined constants with the fragment shader's 355 * immediates according to the constant_flags[] array. 356 */ 357 const uint nr = i915->fs->num_constants; 358 if (nr) { 359 uint i; 360 361 OUT_BATCH( _3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4) ); 362 OUT_BATCH( (1 << (nr - 1)) | ((1 << (nr - 1)) - 1) ); 363 364 for (i = 0; i < nr; i++) { 365 const uint *c; 366 if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) { 367 /* grab user-defined constant */ 368 c = (uint *) i915->current.constants[PIPE_SHADER_FRAGMENT][i]; 369 } 370 else { 371 /* emit program constant */ 372 c = (uint *) i915->fs->constants[i]; 373 } 374#if 0 /* debug */ 375 { 376 float *f = (float *) c; 377 printf("Const %2d: %f %f %f %f %s\n", i, f[0], f[1], f[2], f[3], 378 (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER 379 ? "user" : "immediate")); 380 } 381#endif 382 OUT_BATCH(*c++); 383 OUT_BATCH(*c++); 384 OUT_BATCH(*c++); 385 OUT_BATCH(*c++); 386 } 387 } 388 } 389#endif 390 391#if 01 392 /* Fragment program */ 393 /* i915->current.program_len dwords, 0 relocs */ 394 if (i915->hardware_dirty & I915_HW_PROGRAM) 395 { 396 uint i; 397 /* we should always have, at least, a pass-through program */ 398 assert(i915->fs->program_len > 0); 399 for (i = 0; i < i915->fs->program_len; i++) { 400 OUT_BATCH(i915->fs->program[i]); 401 } 402 } 403#endif 404 405#if 01 406 /* drawing surface size */ 407 /* 6 dwords, 0 relocs */ 408 if (i915->hardware_dirty & I915_HW_STATIC) 409 { 410 uint w, h; 411 struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0]; 412 struct i915_texture *tex = i915_texture(cbuf_surface->texture); 413 unsigned x, y; 414 int face; 415 uint32_t draw_offset; 416 boolean ret; 417 418 ret = framebuffer_size(&i915->framebuffer, &w, &h); 419 assert(ret); 420 421 face = tex->b.b.target == PIPE_TEXTURE_CUBE ? 422 cbuf_surface->face : cbuf_surface->zslice; 423 424 x = tex->image_offset[cbuf_surface->level][face].nblocksx; 425 y = tex->image_offset[cbuf_surface->level][face].nblocksy; 426 427 draw_offset = x | (y << 16); 428 429 /* XXX flush only required when the draw_offset changes! */ 430 OUT_BATCH(MI_FLUSH | INHIBIT_FLUSH_RENDER_CACHE); 431 OUT_BATCH(_3DSTATE_DRAW_RECT_CMD); 432 OUT_BATCH(DRAW_RECT_DIS_DEPTH_OFS); 433 OUT_BATCH(draw_offset); 434 OUT_BATCH((w - 1 + x) | ((h - 1 + y) << 16)); 435 OUT_BATCH(draw_offset); 436 } 437#endif 438 439 I915_DBG(DBG_EMIT, "%s: used %d dwords, %d relocs\n", __FUNCTION__, 440 ((uintptr_t)i915->batch->ptr - save_ptr) / 4, 441 i915->batch->relocs - save_relocs); 442 443 i915->hardware_dirty = 0; 444} 445