r300_screen.c revision 3bb33c911b895819fde5e179b2466c08f88164cf
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2010 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "util/u_format.h" 25#include "util/u_format_s3tc.h" 26#include "util/u_memory.h" 27#include "os/os_time.h" 28#include "vl/vl_context.h" 29#include "vl/vl_video_buffer.h" 30 31#include "r300_context.h" 32#include "r300_texture.h" 33#include "r300_screen_buffer.h" 34#include "r300_state_inlines.h" 35#include "r300_public.h" 36 37#include "draw/draw_context.h" 38 39/* Return the identifier behind whom the brave coders responsible for this 40 * amalgamation of code, sweat, and duct tape, routinely obscure their names. 41 * 42 * ...I should have just put "Corbin Simpson", but I'm not that cool. 43 * 44 * (Or egotistical. Yet.) */ 45static const char* r300_get_vendor(struct pipe_screen* pscreen) 46{ 47 return "X.Org R300 Project"; 48} 49 50static const char* chip_families[] = { 51 "ATI R300", 52 "ATI R350", 53 "ATI RV350", 54 "ATI RV370", 55 "ATI RV380", 56 "ATI RS400", 57 "ATI RC410", 58 "ATI RS480", 59 "ATI R420", 60 "ATI R423", 61 "ATI R430", 62 "ATI R480", 63 "ATI R481", 64 "ATI RV410", 65 "ATI RS600", 66 "ATI RS690", 67 "ATI RS740", 68 "ATI RV515", 69 "ATI R520", 70 "ATI RV530", 71 "ATI R580", 72 "ATI RV560", 73 "ATI RV570" 74}; 75 76static const char* r300_get_name(struct pipe_screen* pscreen) 77{ 78 struct r300_screen* r300screen = r300_screen(pscreen); 79 80 return chip_families[r300screen->caps.family]; 81} 82 83static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) 84{ 85 struct r300_screen* r300screen = r300_screen(pscreen); 86 boolean is_r500 = r300screen->caps.is_r500; 87 88 switch (param) { 89 /* Supported features (boolean caps). */ 90 case PIPE_CAP_NPOT_TEXTURES: 91 case PIPE_CAP_TWO_SIDED_STENCIL: 92 case PIPE_CAP_GLSL: 93 /* I'll be frank. This is a lie. 94 * 95 * We don't truly support GLSL on any of this driver's chipsets. 96 * To be fair, no chipset supports the full GLSL specification 97 * to the best of our knowledge, but some of the less esoteric 98 * features are still missing here. 99 * 100 * Rather than cripple ourselves intentionally, I'm going to set 101 * this flag, and as Gallium's interface continues to change, I 102 * hope that this single monolithic GLSL enable can slowly get 103 * split down into many different pieces and the state tracker 104 * will handle fallbacks transparently, like it should. 105 * 106 * ~ C. 107 */ 108 case PIPE_CAP_ANISOTROPIC_FILTER: 109 case PIPE_CAP_POINT_SPRITE: 110 case PIPE_CAP_OCCLUSION_QUERY: 111 case PIPE_CAP_TEXTURE_SHADOW_MAP: 112 case PIPE_CAP_TEXTURE_MIRROR_CLAMP: 113 case PIPE_CAP_TEXTURE_MIRROR_REPEAT: 114 case PIPE_CAP_BLEND_EQUATION_SEPARATE: 115 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: 116 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: 117 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: 118 return 1; 119 120 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */ 121 case PIPE_CAP_TEXTURE_SWIZZLE: 122 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1; 123 124 /* Supported on r500 only. */ 125 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL: 126 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: 127 case PIPE_CAP_SM3: 128 return is_r500 ? 1 : 0; 129 130 /* Unsupported features. */ 131 case PIPE_CAP_TIMER_QUERY: 132 case PIPE_CAP_DUAL_SOURCE_BLEND: 133 case PIPE_CAP_INDEP_BLEND_ENABLE: 134 case PIPE_CAP_INDEP_BLEND_FUNC: 135 case PIPE_CAP_DEPTH_CLAMP: 136 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE: 137 case PIPE_CAP_SHADER_STENCIL_EXPORT: 138 case PIPE_CAP_ARRAY_TEXTURES: 139 case PIPE_CAP_TGSI_INSTANCEID: 140 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: 141 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: 142 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: 143 case PIPE_CAP_SEAMLESS_CUBE_MAP: 144 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: 145 return 0; 146 147 /* SWTCL-only features. */ 148 case PIPE_CAP_STREAM_OUTPUT: 149 case PIPE_CAP_PRIMITIVE_RESTART: 150 return !r300screen->caps.has_tcl; 151 152 /* Texturing. */ 153 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: 154 case PIPE_CAP_MAX_COMBINED_SAMPLERS: 155 return r300screen->caps.num_tex_units; 156 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: 157 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: 158 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: 159 /* 13 == 4096, 12 == 2048 */ 160 return is_r500 ? 13 : 12; 161 162 /* Render targets. */ 163 case PIPE_CAP_MAX_RENDER_TARGETS: 164 return 4; 165 166 default: 167 debug_printf("r300: Warning: Unknown CAP %d in get_param.\n", 168 param); 169 return 0; 170 } 171} 172 173static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param) 174{ 175 struct r300_screen* r300screen = r300_screen(pscreen); 176 boolean is_r400 = r300screen->caps.is_r400; 177 boolean is_r500 = r300screen->caps.is_r500; 178 179 switch (shader) 180 { 181 case PIPE_SHADER_FRAGMENT: 182 switch (param) 183 { 184 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 185 return is_r500 || is_r400 ? 512 : 96; 186 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 187 return is_r500 || is_r400 ? 512 : 64; 188 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 189 return is_r500 || is_r400 ? 512 : 32; 190 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 191 return is_r500 ? 511 : 4; 192 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 193 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */ 194 /* Fragment shader limits. */ 195 case PIPE_SHADER_CAP_MAX_INPUTS: 196 /* 2 colors + 8 texcoords are always supported 197 * (minus fog and wpos). 198 * 199 * R500 has the ability to turn 3rd and 4th color into 200 * additional texcoords but there is no two-sided color 201 * selection then. However the facing bit can be used instead. */ 202 return 10; 203 case PIPE_SHADER_CAP_MAX_CONSTS: 204 return is_r500 ? 256 : 32; 205 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 206 return 1; 207 case PIPE_SHADER_CAP_MAX_TEMPS: 208 return is_r500 ? 128 : is_r400 ? 64 : 32; 209 case PIPE_SHADER_CAP_MAX_ADDRS: 210 return 0; 211 case PIPE_SHADER_CAP_MAX_PREDS: 212 return is_r500 ? 1 : 0; 213 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 214 return 0; 215 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 216 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 217 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 218 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 219 return 0; 220 case PIPE_SHADER_CAP_SUBROUTINES: 221 return 0; 222 } 223 break; 224 case PIPE_SHADER_VERTEX: 225 if (!r300screen->caps.has_tcl) { 226 return draw_get_shader_param(shader, param); 227 } 228 229 switch (param) 230 { 231 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 232 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 233 return is_r500 ? 1024 : 256; 234 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 235 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 236 return 0; 237 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 238 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */ 239 case PIPE_SHADER_CAP_MAX_INPUTS: 240 return 16; 241 case PIPE_SHADER_CAP_MAX_CONSTS: 242 return 256; 243 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 244 return 1; 245 case PIPE_SHADER_CAP_MAX_TEMPS: 246 return 32; 247 case PIPE_SHADER_CAP_MAX_ADDRS: 248 return 1; /* XXX guessed */ 249 case PIPE_SHADER_CAP_MAX_PREDS: 250 return is_r500 ? 4 : 0; /* XXX guessed. */ 251 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 252 return 0; 253 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 254 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 255 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 256 return 0; 257 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 258 return 1; 259 case PIPE_SHADER_CAP_SUBROUTINES: 260 return 0; 261 default: 262 break; 263 } 264 break; 265 default: 266 break; 267 } 268 return 0; 269} 270 271static float r300_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param) 272{ 273 struct r300_screen* r300screen = r300_screen(pscreen); 274 275 switch (param) { 276 case PIPE_CAP_MAX_LINE_WIDTH: 277 case PIPE_CAP_MAX_LINE_WIDTH_AA: 278 case PIPE_CAP_MAX_POINT_WIDTH: 279 case PIPE_CAP_MAX_POINT_WIDTH_AA: 280 /* The maximum dimensions of the colorbuffer are our practical 281 * rendering limits. 2048 pixels should be enough for anybody. */ 282 if (r300screen->caps.is_r500) { 283 return 4096.0f; 284 } else if (r300screen->caps.is_r400) { 285 return 4021.0f; 286 } else { 287 return 2560.0f; 288 } 289 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: 290 return 16.0f; 291 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: 292 return 16.0f; 293 case PIPE_CAP_GUARD_BAND_LEFT: 294 case PIPE_CAP_GUARD_BAND_TOP: 295 case PIPE_CAP_GUARD_BAND_RIGHT: 296 case PIPE_CAP_GUARD_BAND_BOTTOM: 297 /* XXX I don't know what these should be but the least we can do is 298 * silence the potential error message */ 299 return 0.0f; 300 default: 301 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n", 302 param); 303 return 0.0f; 304 } 305} 306 307static int r300_get_video_param(struct pipe_screen *screen, 308 enum pipe_video_profile profile, 309 enum pipe_video_cap param) 310{ 311 switch (param) { 312 case PIPE_VIDEO_CAP_NPOT_TEXTURES: 313 return 0; 314 default: 315 return 0; 316 } 317} 318 319static boolean r300_is_format_supported(struct pipe_screen* screen, 320 enum pipe_format format, 321 enum pipe_texture_target target, 322 unsigned sample_count, 323 unsigned usage) 324{ 325 struct radeon_winsys *rws = r300_screen(screen)->rws; 326 uint32_t retval = 0; 327 boolean drm_2_8_0 = rws->get_value(rws, RADEON_VID_DRM_2_8_0); 328 boolean is_r500 = r300_screen(screen)->caps.is_r500; 329 boolean is_r400 = r300_screen(screen)->caps.is_r400; 330 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM || 331 format == PIPE_FORMAT_R10G10B10X2_SNORM || 332 format == PIPE_FORMAT_B10G10R10A2_UNORM || 333 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM; 334 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM || 335 format == PIPE_FORMAT_RGTC1_SNORM || 336 format == PIPE_FORMAT_LATC1_UNORM || 337 format == PIPE_FORMAT_LATC1_SNORM; 338 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM || 339 format == PIPE_FORMAT_RGTC2_SNORM || 340 format == PIPE_FORMAT_LATC2_UNORM || 341 format == PIPE_FORMAT_LATC2_SNORM; 342 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT || 343 format == PIPE_FORMAT_R16G16_FLOAT || 344 format == PIPE_FORMAT_A16_FLOAT || 345 format == PIPE_FORMAT_L16_FLOAT || 346 format == PIPE_FORMAT_L16A16_FLOAT || 347 format == PIPE_FORMAT_I16_FLOAT; 348 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT || 349 format == PIPE_FORMAT_R16G16_FLOAT || 350 format == PIPE_FORMAT_R16G16B16_FLOAT || 351 format == PIPE_FORMAT_R16G16B16A16_FLOAT; 352 353 if (!util_format_is_supported(format, usage)) 354 return FALSE; 355 356 /* Check multisampling support. */ 357 switch (sample_count) { 358 case 0: 359 case 1: 360 break; 361 case 2: 362 case 3: 363 case 4: 364 case 6: 365 return FALSE; 366#if 0 367 if (usage != PIPE_BIND_RENDER_TARGET || 368 !util_format_is_rgba8_variant( 369 util_format_description(format))) { 370 return FALSE; 371 } 372#endif 373 break; 374 default: 375 return FALSE; 376 } 377 378 /* Check sampler format support. */ 379 if ((usage & PIPE_BIND_SAMPLER_VIEW) && 380 /* ATI1N is r5xx-only. */ 381 (is_r500 || !is_ati1n) && 382 /* ATI2N is supported on r4xx-r5xx. */ 383 (is_r400 || is_r500 || !is_ati2n) && 384 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */ 385 (drm_2_8_0 || !is_x16f_xy16f) && 386 r300_is_sampler_format_supported(format)) { 387 retval |= PIPE_BIND_SAMPLER_VIEW; 388 } 389 390 /* Check colorbuffer format support. */ 391 if ((usage & (PIPE_BIND_RENDER_TARGET | 392 PIPE_BIND_DISPLAY_TARGET | 393 PIPE_BIND_SCANOUT | 394 PIPE_BIND_SHARED)) && 395 /* 2101010 cannot be rendered to on non-r5xx. */ 396 (!is_color2101010 || (is_r500 && drm_2_8_0)) && 397 r300_is_colorbuffer_format_supported(format)) { 398 retval |= usage & 399 (PIPE_BIND_RENDER_TARGET | 400 PIPE_BIND_DISPLAY_TARGET | 401 PIPE_BIND_SCANOUT | 402 PIPE_BIND_SHARED); 403 } 404 405 /* Check depth-stencil format support. */ 406 if (usage & PIPE_BIND_DEPTH_STENCIL && 407 r300_is_zs_format_supported(format)) { 408 retval |= PIPE_BIND_DEPTH_STENCIL; 409 } 410 411 /* Check vertex buffer format support. */ 412 if (usage & PIPE_BIND_VERTEX_BUFFER && 413 /* Half float is supported on >= RV350. */ 414 (is_r400 || is_r500 || !is_half_float) && 415 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) { 416 retval |= PIPE_BIND_VERTEX_BUFFER; 417 } 418 419 /* Transfers are always supported. */ 420 if (usage & PIPE_BIND_TRANSFER_READ) 421 retval |= PIPE_BIND_TRANSFER_READ; 422 if (usage & PIPE_BIND_TRANSFER_WRITE) 423 retval |= PIPE_BIND_TRANSFER_WRITE; 424 425 return retval == usage; 426} 427 428static struct pipe_video_context * 429r300_video_create(struct pipe_screen *screen, struct pipe_context *pipe) 430{ 431 assert(screen); 432 433 return vl_create_context(pipe); 434} 435 436static void r300_destroy_screen(struct pipe_screen* pscreen) 437{ 438 struct r300_screen* r300screen = r300_screen(pscreen); 439 struct radeon_winsys *rws = radeon_winsys(pscreen); 440 441 util_slab_destroy(&r300screen->pool_buffers); 442 pipe_mutex_destroy(r300screen->num_contexts_mutex); 443 444 if (rws) 445 rws->destroy(rws); 446 447 FREE(r300screen); 448} 449 450static void r300_fence_reference(struct pipe_screen *screen, 451 struct pipe_fence_handle **ptr, 452 struct pipe_fence_handle *fence) 453{ 454 pb_reference((struct pb_buffer**)ptr, 455 (struct pb_buffer*)fence); 456} 457 458static boolean r300_fence_signalled(struct pipe_screen *screen, 459 struct pipe_fence_handle *fence) 460{ 461 struct radeon_winsys *rws = r300_screen(screen)->rws; 462 struct pb_buffer *rfence = (struct pb_buffer*)fence; 463 464 return !rws->buffer_is_busy(rfence); 465} 466 467static boolean r300_fence_finish(struct pipe_screen *screen, 468 struct pipe_fence_handle *fence, 469 uint64_t timeout) 470{ 471 struct radeon_winsys *rws = r300_screen(screen)->rws; 472 struct pb_buffer *rfence = (struct pb_buffer*)fence; 473 474 if (timeout != PIPE_TIMEOUT_INFINITE) { 475 int64_t start_time = os_time_get(); 476 477 /* Convert to microseconds. */ 478 timeout /= 1000; 479 480 /* Wait in a loop. */ 481 while (rws->buffer_is_busy(rfence)) { 482 if (os_time_get() - start_time >= timeout) { 483 return FALSE; 484 } 485 os_time_sleep(10); 486 } 487 return TRUE; 488 } 489 490 rws->buffer_wait(rfence); 491 return TRUE; 492} 493 494struct pipe_screen* r300_screen_create(struct radeon_winsys *rws) 495{ 496 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen); 497 498 if (!r300screen) { 499 FREE(r300screen); 500 return NULL; 501 } 502 503 r300screen->caps.pci_id = rws->get_value(rws, RADEON_VID_PCI_ID); 504 r300screen->caps.num_frag_pipes = rws->get_value(rws, RADEON_VID_R300_GB_PIPES); 505 r300screen->caps.num_z_pipes = rws->get_value(rws, RADEON_VID_R300_Z_PIPES); 506 507 r300_init_debug(r300screen); 508 r300_parse_chipset(&r300screen->caps); 509 510 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK)) 511 r300screen->caps.zmask_ram = 0; 512 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ)) 513 r300screen->caps.hiz_ram = 0; 514 515 if (!rws->get_value(rws, RADEON_VID_DRM_2_8_0)) 516 r300screen->caps.has_us_format = FALSE; 517 518 pipe_mutex_init(r300screen->num_contexts_mutex); 519 520 util_slab_create(&r300screen->pool_buffers, 521 sizeof(struct r300_resource), 64, 522 UTIL_SLAB_SINGLETHREADED); 523 524 r300screen->rws = rws; 525 r300screen->screen.winsys = (struct pipe_winsys*)rws; 526 r300screen->screen.destroy = r300_destroy_screen; 527 r300screen->screen.get_name = r300_get_name; 528 r300screen->screen.get_vendor = r300_get_vendor; 529 r300screen->screen.get_param = r300_get_param; 530 r300screen->screen.get_shader_param = r300_get_shader_param; 531 r300screen->screen.get_paramf = r300_get_paramf; 532 r300screen->screen.get_video_param = r300_get_video_param; 533 r300screen->screen.is_format_supported = r300_is_format_supported; 534 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported; 535 r300screen->screen.context_create = r300_create_context; 536 r300screen->screen.video_context_create = r300_video_create; 537 r300screen->screen.fence_reference = r300_fence_reference; 538 r300screen->screen.fence_signalled = r300_fence_signalled; 539 r300screen->screen.fence_finish = r300_fence_finish; 540 541 r300_init_screen_resource_functions(r300screen); 542 543 util_format_s3tc_init(); 544 545 return &r300screen->screen; 546} 547