r300_state.c revision 07961bb05e5ba05205b9f53834863664f1023870 
1/*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23#include "util/u_math.h"
24#include "util/u_pack_color.h"
25
26#include "util/u_debug.h"
27
28#include "pipe/p_config.h"
29#include "pipe/internal/p_winsys_screen.h"
30
31#include "r300_context.h"
32#include "r300_reg.h"
33#include "r300_state_inlines.h"
34#include "r300_fs.h"
35
36/* r300_state: Functions used to intialize state context by translating
37 * Gallium state objects into semi-native r300 state objects. */
38
39/* Create a new blend state based on the CSO blend state.
40 *
41 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
42static void* r300_create_blend_state(struct pipe_context* pipe,
43                                     const struct pipe_blend_state* state)
44{
45    struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
46
47    if (state->blend_enable) {
48        /* XXX for now, always do separate alpha...
49         * is it faster to do it with one reg? */
50        blend->blend_control = R300_ALPHA_BLEND_ENABLE |
51                R300_SEPARATE_ALPHA_ENABLE |
52                R300_READ_ENABLE |
53                r300_translate_blend_function(state->rgb_func) |
54                (r300_translate_blend_factor(state->rgb_src_factor) <<
55                    R300_SRC_BLEND_SHIFT) |
56                (r300_translate_blend_factor(state->rgb_dst_factor) <<
57                    R300_DST_BLEND_SHIFT);
58        blend->alpha_blend_control =
59                r300_translate_blend_function(state->alpha_func) |
60                (r300_translate_blend_factor(state->alpha_src_factor) <<
61                    R300_SRC_BLEND_SHIFT) |
62                (r300_translate_blend_factor(state->alpha_dst_factor) <<
63                    R300_DST_BLEND_SHIFT);
64    }
65
66    /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
67    if (state->logicop_enable) {
68        blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
69                (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
70    }
71
72    if (state->dither) {
73        blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
74                R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
75    }
76
77    return (void*)blend;
78}
79
80/* Bind blend state. */
81static void r300_bind_blend_state(struct pipe_context* pipe,
82                                  void* state)
83{
84    struct r300_context* r300 = r300_context(pipe);
85
86    r300->blend_state = (struct r300_blend_state*)state;
87    r300->dirty_state |= R300_NEW_BLEND;
88}
89
90/* Free blend state. */
91static void r300_delete_blend_state(struct pipe_context* pipe,
92                                    void* state)
93{
94    FREE(state);
95}
96
97/* Set blend color.
98 * Setup both R300 and R500 registers, figure out later which one to write. */
99static void r300_set_blend_color(struct pipe_context* pipe,
100                                 const struct pipe_blend_color* color)
101{
102    struct r300_context* r300 = r300_context(pipe);
103    ubyte ur, ug, ub, ua;
104
105    ur = float_to_ubyte(color->color[0]);
106    ug = float_to_ubyte(color->color[1]);
107    ub = float_to_ubyte(color->color[2]);
108    ua = float_to_ubyte(color->color[3]);
109
110    util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM,
111            &r300->blend_color_state->blend_color);
112
113    /* XXX this is wrong */
114    r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16);
115    r300->blend_color_state->blend_color_green_blue = ub | (ug << 16);
116
117    r300->dirty_state |= R300_NEW_BLEND_COLOR;
118}
119
120static void r300_set_clip_state(struct pipe_context* pipe,
121                                const struct pipe_clip_state* state)
122{
123    struct r300_context* r300 = r300_context(pipe);
124
125    if (r300_screen(pipe->screen)->caps->has_tcl) {
126        r300->clip_state = *state;
127        r300->dirty_state |= R300_NEW_CLIP;
128    } else {
129        draw_flush(r300->draw);
130        draw_set_clip_state(r300->draw, state);
131    }
132}
133
134static void
135    r300_set_constant_buffer(struct pipe_context* pipe,
136                             uint shader, uint index,
137                             const struct pipe_constant_buffer* buffer)
138{
139    struct r300_context* r300 = r300_context(pipe);
140    int i = r300->shader_constants[shader].user_count;
141
142    /* This entire chunk of code seems ever-so-slightly baked.
143     * It's as if I've got pipe_buffer* matryoshkas... */
144    if (buffer && buffer->buffer && buffer->buffer->size) {
145        void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer,
146                                             PIPE_BUFFER_USAGE_CPU_READ);
147        memcpy(r300->shader_constants[shader].constants,
148            map, buffer->buffer->size);
149        pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer);
150
151        r300->shader_constants[shader].user_count =
152            buffer->buffer->size / (sizeof(float) * 4);
153    } else {
154        r300->shader_constants[shader].user_count = 0;
155    }
156
157    r300->dirty_state |= R300_NEW_CONSTANTS;
158#if 0
159    /* If the number of constants have changed, invalidate the shader. */
160    if (r300->shader_constants[shader].user_count != i) {
161        if (shader == PIPE_SHADER_FRAGMENT && r300->fs &&
162                r300->fs->uses_imms) {
163            r300->fs->translated = FALSE;
164            r300_translate_fragment_shader(r300, r300->fs);
165        } else if (shader == PIPE_SHADER_VERTEX && r300->vs &&
166                r300->vs->uses_imms) {
167            r300->vs->translated = FALSE;
168            r300_translate_vertex_shader(r300, r300->vs);
169        }
170    }
171#endif
172}
173
174/* Create a new depth, stencil, and alpha state based on the CSO dsa state.
175 *
176 * This contains the depth buffer, stencil buffer, alpha test, and such.
177 * On the Radeon, depth and stencil buffer setup are intertwined, which is
178 * the reason for some of the strange-looking assignments across registers. */
179static void*
180        r300_create_dsa_state(struct pipe_context* pipe,
181                              const struct pipe_depth_stencil_alpha_state* state)
182{
183    struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
184
185    /* Depth test setup. */
186    if (state->depth.enabled) {
187        dsa->z_buffer_control |= R300_Z_ENABLE;
188
189        if (state->depth.writemask) {
190            dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
191        }
192
193        dsa->z_stencil_control |=
194            (r300_translate_depth_stencil_function(state->depth.func) <<
195                R300_Z_FUNC_SHIFT);
196    }
197
198    /* Stencil buffer setup. */
199    if (state->stencil[0].enabled) {
200        dsa->z_buffer_control |= R300_STENCIL_ENABLE;
201        dsa->z_stencil_control |=
202            (r300_translate_depth_stencil_function(state->stencil[0].func) <<
203                R300_S_FRONT_FUNC_SHIFT) |
204            (r300_translate_stencil_op(state->stencil[0].fail_op) <<
205                R300_S_FRONT_SFAIL_OP_SHIFT) |
206            (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
207                R300_S_FRONT_ZPASS_OP_SHIFT) |
208            (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
209                R300_S_FRONT_ZFAIL_OP_SHIFT);
210
211        dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
212                (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
213                (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
214
215        if (state->stencil[1].enabled) {
216            dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
217            dsa->z_stencil_control |=
218            (r300_translate_depth_stencil_function(state->stencil[1].func) <<
219                R300_S_BACK_FUNC_SHIFT) |
220            (r300_translate_stencil_op(state->stencil[1].fail_op) <<
221                R300_S_BACK_SFAIL_OP_SHIFT) |
222            (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
223                R300_S_BACK_ZPASS_OP_SHIFT) |
224            (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
225                R300_S_BACK_ZFAIL_OP_SHIFT);
226
227            dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
228                (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
229                (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
230        }
231    }
232
233    /* Alpha test setup. */
234    if (state->alpha.enabled) {
235        dsa->alpha_function =
236            r300_translate_alpha_function(state->alpha.func) |
237            R300_FG_ALPHA_FUNC_ENABLE;
238        dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f,
239                                     0, 1023);
240    } else {
241        dsa->z_buffer_top = R300_ZTOP_ENABLE;
242    }
243
244    return (void*)dsa;
245}
246
247/* Bind DSA state. */
248static void r300_bind_dsa_state(struct pipe_context* pipe,
249                                void* state)
250{
251    struct r300_context* r300 = r300_context(pipe);
252
253    r300->dsa_state = (struct r300_dsa_state*)state;
254    r300->dirty_state |= R300_NEW_DSA;
255}
256
257/* Free DSA state. */
258static void r300_delete_dsa_state(struct pipe_context* pipe,
259                                  void* state)
260{
261    FREE(state);
262}
263
264static void r300_set_edgeflags(struct pipe_context* pipe,
265                               const unsigned* bitfield)
266{
267    /* XXX you know it's bad when i915 has this blank too */
268    /* XXX and even worse, I have no idea WTF the bitfield is */
269}
270
271static void
272    r300_set_framebuffer_state(struct pipe_context* pipe,
273                               const struct pipe_framebuffer_state* state)
274{
275    struct r300_context* r300 = r300_context(pipe);
276
277    draw_flush(r300->draw);
278
279    r300->framebuffer_state = *state;
280
281    r300->dirty_state |= R300_NEW_FRAMEBUFFERS;
282}
283
284/* Create fragment shader state. */
285static void* r300_create_fs_state(struct pipe_context* pipe,
286                                  const struct pipe_shader_state* shader)
287{
288    struct r300_context* r300 = r300_context(pipe);
289    struct r300_fragment_shader* fs = NULL;
290
291    if (r300_screen(r300->context.screen)->caps->is_r500) {
292        fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r5xx_fragment_shader);
293    } else {
294        fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r3xx_fragment_shader);
295    }
296
297    /* Copy state directly into shader. */
298    fs->state = *shader;
299    fs->state.tokens = tgsi_dup_tokens(shader->tokens);
300
301    tgsi_scan_shader(shader->tokens, &fs->info);
302
303    return (void*)fs;
304}
305
306/* Bind fragment shader state. */
307static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
308{
309    struct r300_context* r300 = r300_context(pipe);
310    struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
311
312    if (fs == NULL) {
313        r300->fs = NULL;
314        return;
315    } else if (!fs->translated) {
316        r300_translate_fragment_shader(r300, fs);
317    }
318
319    r300->fs = fs;
320
321    r300->dirty_state |= R300_NEW_FRAGMENT_SHADER;
322}
323
324/* Delete fragment shader state. */
325static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
326{
327    struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
328    FREE(fs->state.tokens);
329    FREE(shader);
330}
331
332static void r300_set_polygon_stipple(struct pipe_context* pipe,
333                                     const struct pipe_poly_stipple* state)
334{
335    /* XXX no idea how to set this up, but not terribly important */
336}
337
338/* Create a new rasterizer state based on the CSO rasterizer state.
339 *
340 * This is a very large chunk of state, and covers most of the graphics
341 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
342 *
343 * In a not entirely unironic sidenote, this state has nearly nothing to do
344 * with the actual block on the Radeon called the rasterizer (RS). */
345static void* r300_create_rs_state(struct pipe_context* pipe,
346                                  const struct pipe_rasterizer_state* state)
347{
348    struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
349
350    /* Copy rasterizer state for Draw. */
351    rs->rs = *state;
352
353    rs->enable_vte = !state->bypass_vs_clip_and_viewport;
354
355#ifdef PIPE_ARCH_LITTLE_ENDIAN
356    rs->vap_control_status = R300_VC_NO_SWAP;
357#else
358    rs->vap_control_status = R300_VC_32BIT_SWAP;
359#endif
360
361    /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
362     * Else, enable HW TCL and force Draw's TCL off. */
363    if (state->bypass_vs_clip_and_viewport ||
364            !r300_screen(pipe->screen)->caps->has_tcl) {
365        rs->vap_control_status |= R300_VAP_TCL_BYPASS;
366    } else {
367        rs->rs.bypass_vs_clip_and_viewport = TRUE;
368    }
369
370    rs->point_size = pack_float_16_6x(state->point_size) |
371        (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
372
373    rs->point_minmax =
374        ((int)(state->point_size_min * 6.0) <<
375         R300_GA_POINT_MINMAX_MIN_SHIFT) |
376        ((int)(state->point_size_max * 6.0) <<
377         R300_GA_POINT_MINMAX_MAX_SHIFT);
378
379    rs->line_control = pack_float_16_6x(state->line_width) |
380        R300_GA_LINE_CNTL_END_TYPE_COMP;
381
382    /* Radeons don't think in "CW/CCW", they think in "front/back". */
383    if (state->front_winding == PIPE_WINDING_CW) {
384        rs->cull_mode = R300_FRONT_FACE_CW;
385
386        if (state->offset_cw) {
387            rs->polygon_offset_enable |= R300_FRONT_ENABLE;
388        }
389        if (state->offset_ccw) {
390            rs->polygon_offset_enable |= R300_BACK_ENABLE;
391        }
392    } else {
393        rs->cull_mode = R300_FRONT_FACE_CCW;
394
395        if (state->offset_ccw) {
396            rs->polygon_offset_enable |= R300_FRONT_ENABLE;
397        }
398        if (state->offset_cw) {
399            rs->polygon_offset_enable |= R300_BACK_ENABLE;
400        }
401    }
402    if (state->front_winding & state->cull_mode) {
403        rs->cull_mode |= R300_CULL_FRONT;
404    }
405    if (~(state->front_winding) & state->cull_mode) {
406        rs->cull_mode |= R300_CULL_BACK;
407    }
408
409    if (rs->polygon_offset_enable) {
410        rs->depth_offset_front = rs->depth_offset_back =
411            fui(state->offset_units);
412        rs->depth_scale_front = rs->depth_scale_back =
413            fui(state->offset_scale);
414    }
415
416    if (state->line_stipple_enable) {
417        rs->line_stipple_config =
418            R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
419            (fui((float)state->line_stipple_factor) &
420                R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
421        /* XXX this might need to be scaled up */
422        rs->line_stipple_value = state->line_stipple_pattern;
423    }
424
425    if (state->flatshade) {
426        rs->color_control = R300_SHADE_MODEL_FLAT;
427    } else {
428        rs->color_control = R300_SHADE_MODEL_SMOOTH;
429    }
430
431    if (!state->flatshade_first) {
432        rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
433    }
434
435    return (void*)rs;
436}
437
438/* Bind rasterizer state. */
439static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
440{
441    struct r300_context* r300 = r300_context(pipe);
442    struct r300_rs_state* rs = (struct r300_rs_state*)state;
443
444    draw_flush(r300->draw);
445    draw_set_rasterizer_state(r300->draw, &rs->rs);
446
447    r300->rs_state = rs;
448    r300->dirty_state |= R300_NEW_RASTERIZER;
449}
450
451/* Free rasterizer state. */
452static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
453{
454    FREE(state);
455}
456
457static void*
458        r300_create_sampler_state(struct pipe_context* pipe,
459                                  const struct pipe_sampler_state* state)
460{
461    struct r300_context* r300 = r300_context(pipe);
462    struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
463    int lod_bias;
464
465    sampler->filter0 |=
466        (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
467        (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
468        (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
469
470    sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
471                                                   state->mag_img_filter,
472                                                   state->min_mip_filter);
473
474    lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
475
476    sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
477
478    sampler->filter1 |= r300_anisotropy(state->max_anisotropy);
479
480    util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
481                    &sampler->border_color);
482
483    /* R500-specific fixups and optimizations */
484    if (r300_screen(r300->context.screen)->caps->is_r500) {
485        sampler->filter1 |= R500_BORDER_FIX;
486    }
487
488    return (void*)sampler;
489}
490
491static void r300_bind_sampler_states(struct pipe_context* pipe,
492                                     unsigned count,
493                                     void** states)
494{
495    struct r300_context* r300 = r300_context(pipe);
496    int i;
497
498    if (count > 8) {
499        return;
500    }
501
502    for (i = 0; i < count; i++) {
503        if (r300->sampler_states[i] != states[i]) {
504            r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
505            r300->dirty_state |= (R300_NEW_SAMPLER << i);
506        }
507    }
508
509    r300->sampler_count = count;
510}
511
512static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
513{
514    FREE(state);
515}
516
517static void r300_set_sampler_textures(struct pipe_context* pipe,
518                                      unsigned count,
519                                      struct pipe_texture** texture)
520{
521    struct r300_context* r300 = r300_context(pipe);
522    int i;
523
524    /* XXX magic num */
525    if (count > 8) {
526        return;
527    }
528
529    for (i = 0; i < count; i++) {
530        if (r300->textures[i] != (struct r300_texture*)texture[i]) {
531            pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
532                texture[i]);
533            r300->dirty_state |= (R300_NEW_TEXTURE << i);
534        }
535    }
536
537    for (i = count; i < 8; i++) {
538        if (r300->textures[i]) {
539            pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
540                NULL);
541            r300->dirty_state |= (R300_NEW_TEXTURE << i);
542        }
543    }
544
545    r300->texture_count = count;
546}
547
548static void r300_set_scissor_state(struct pipe_context* pipe,
549                                   const struct pipe_scissor_state* state)
550{
551    struct r300_context* r300 = r300_context(pipe);
552
553    if (r300_screen(r300->context.screen)->caps->is_r500) {
554        r300->scissor_state->scissor_top_left =
555            (state->minx << R300_SCISSORS_X_SHIFT) |
556            (state->miny << R300_SCISSORS_Y_SHIFT);
557        r300->scissor_state->scissor_bottom_right =
558            (state->maxx << R300_SCISSORS_X_SHIFT) |
559            (state->maxy << R300_SCISSORS_Y_SHIFT);
560    } else {
561        /* Offset of 1440 in non-R500 chipsets. */
562        r300->scissor_state->scissor_top_left =
563            ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) |
564            ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT);
565        r300->scissor_state->scissor_bottom_right =
566            ((state->maxx + 1440) << R300_SCISSORS_X_SHIFT) |
567            ((state->maxy + 1440) << R300_SCISSORS_Y_SHIFT);
568    }
569
570    r300->dirty_state |= R300_NEW_SCISSOR;
571}
572
573static void r300_set_viewport_state(struct pipe_context* pipe,
574                                    const struct pipe_viewport_state* state)
575{
576    struct r300_context* r300 = r300_context(pipe);
577
578    /* Do the transform in HW. */
579    r300->viewport_state->vte_control = R300_VTX_W0_FMT;
580
581    if (state->scale[0] != 1.0f) {
582        assert(state->scale[0] != 0.0f);
583        r300->viewport_state->xscale = state->scale[0];
584        r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA;
585    }
586    if (state->scale[1] != 1.0f) {
587        assert(state->scale[1] != 0.0f);
588        r300->viewport_state->yscale = state->scale[1];
589        r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA;
590    }
591    if (state->scale[2] != 1.0f) {
592        assert(state->scale[2] != 0.0f);
593        r300->viewport_state->zscale = state->scale[2];
594        r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA;
595    }
596    if (state->translate[0] != 0.0f) {
597        r300->viewport_state->xoffset = state->translate[0];
598        r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA;
599    }
600    if (state->translate[1] != 0.0f) {
601        r300->viewport_state->yoffset = state->translate[1];
602        r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA;
603    }
604    if (state->translate[2] != 0.0f) {
605        r300->viewport_state->zoffset = state->translate[2];
606        r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA;
607    }
608
609    r300->dirty_state |= R300_NEW_VIEWPORT;
610}
611
612static void r300_set_vertex_buffers(struct pipe_context* pipe,
613                                    unsigned count,
614                                    const struct pipe_vertex_buffer* buffers)
615{
616    struct r300_context* r300 = r300_context(pipe);
617
618    memcpy(r300->vertex_buffers, buffers,
619        sizeof(struct pipe_vertex_buffer) * count);
620
621    r300->vertex_buffer_count = count;
622
623    draw_flush(r300->draw);
624    draw_set_vertex_buffers(r300->draw, count, buffers);
625}
626
627static void r300_set_vertex_elements(struct pipe_context* pipe,
628                                    unsigned count,
629                                    const struct pipe_vertex_element* elements)
630{
631    struct r300_context* r300 = r300_context(pipe);
632
633    draw_flush(r300->draw);
634    draw_set_vertex_elements(r300->draw, count, elements);
635}
636
637static void* r300_create_vs_state(struct pipe_context* pipe,
638                                  const struct pipe_shader_state* shader)
639{
640    struct r300_context* r300 = r300_context(pipe);
641
642    if (r300_screen(pipe->screen)->caps->has_tcl) {
643        struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
644        /* Copy state directly into shader. */
645        vs->state = *shader;
646        vs->state.tokens = tgsi_dup_tokens(shader->tokens);
647
648        tgsi_scan_shader(shader->tokens, &vs->info);
649
650        /* Appease Draw. */
651        vs->draw = draw_create_vertex_shader(r300->draw, shader);
652
653        return (void*)vs;
654    } else {
655        return draw_create_vertex_shader(r300->draw, shader);
656    }
657}
658
659static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
660{
661    struct r300_context* r300 = r300_context(pipe);
662
663    draw_flush(r300->draw);
664
665    if (r300_screen(pipe->screen)->caps->has_tcl) {
666        struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
667
668        if (vs == NULL) {
669            r300->vs = NULL;
670            return;
671        } else if (!vs->translated) {
672            r300_translate_vertex_shader(r300, vs);
673        }
674
675        draw_bind_vertex_shader(r300->draw, vs->draw);
676        r300->vs = vs;
677        r300->dirty_state |= R300_NEW_VERTEX_SHADER;
678    } else {
679        draw_bind_vertex_shader(r300->draw,
680                (struct draw_vertex_shader*)shader);
681    }
682}
683
684static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
685{
686    struct r300_context* r300 = r300_context(pipe);
687
688    if (r300_screen(pipe->screen)->caps->has_tcl) {
689        struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
690
691        draw_delete_vertex_shader(r300->draw, vs->draw);
692        FREE(vs->state.tokens);
693        FREE(shader);
694    } else {
695        draw_delete_vertex_shader(r300->draw,
696                (struct draw_vertex_shader*)shader);
697    }
698}
699
700void r300_init_state_functions(struct r300_context* r300)
701{
702    r300->context.create_blend_state = r300_create_blend_state;
703    r300->context.bind_blend_state = r300_bind_blend_state;
704    r300->context.delete_blend_state = r300_delete_blend_state;
705
706    r300->context.set_blend_color = r300_set_blend_color;
707
708    r300->context.set_clip_state = r300_set_clip_state;
709
710    r300->context.set_constant_buffer = r300_set_constant_buffer;
711
712    r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
713    r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
714    r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
715
716    r300->context.set_edgeflags = r300_set_edgeflags;
717
718    r300->context.set_framebuffer_state = r300_set_framebuffer_state;
719
720    r300->context.create_fs_state = r300_create_fs_state;
721    r300->context.bind_fs_state = r300_bind_fs_state;
722    r300->context.delete_fs_state = r300_delete_fs_state;
723
724    r300->context.set_polygon_stipple = r300_set_polygon_stipple;
725
726    r300->context.create_rasterizer_state = r300_create_rs_state;
727    r300->context.bind_rasterizer_state = r300_bind_rs_state;
728    r300->context.delete_rasterizer_state = r300_delete_rs_state;
729
730    r300->context.create_sampler_state = r300_create_sampler_state;
731    r300->context.bind_sampler_states = r300_bind_sampler_states;
732    r300->context.delete_sampler_state = r300_delete_sampler_state;
733
734    r300->context.set_sampler_textures = r300_set_sampler_textures;
735
736    r300->context.set_scissor_state = r300_set_scissor_state;
737
738    r300->context.set_viewport_state = r300_set_viewport_state;
739
740    r300->context.set_vertex_buffers = r300_set_vertex_buffers;
741    r300->context.set_vertex_elements = r300_set_vertex_elements;
742
743    r300->context.create_vs_state = r300_create_vs_state;
744    r300->context.bind_vs_state = r300_bind_vs_state;
745    r300->context.delete_vs_state = r300_delete_vs_state;
746}
747