r300_state.c revision 08afcaa56e187cdd137a5c6581c265c1a0fc8d18
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_math.h" 27#include "util/u_memory.h" 28#include "util/u_pack_color.h" 29 30#include "tgsi/tgsi_parse.h" 31 32#include "pipe/p_config.h" 33 34#include "r300_context.h" 35#include "r300_reg.h" 36#include "r300_screen.h" 37#include "r300_screen_buffer.h" 38#include "r300_state_inlines.h" 39#include "r300_fs.h" 40#include "r300_texture.h" 41#include "r300_vs.h" 42#include "r300_winsys.h" 43 44/* r300_state: Functions used to intialize state context by translating 45 * Gallium state objects into semi-native r300 state objects. */ 46 47#define UPDATE_STATE(cso, atom) \ 48 if (cso != atom.state) { \ 49 atom.state = cso; \ 50 atom.dirty = TRUE; \ 51 } 52 53static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 54 unsigned dstRGB, unsigned dstA) 55{ 56 /* If the blend equation is ADD or REVERSE_SUBTRACT, 57 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 58 * will not be changed. 59 * Notice that the dst factors are the src factors inverted. */ 60 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 61 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 62 srcRGB == PIPE_BLENDFACTOR_ZERO) && 63 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 64 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 65 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 66 srcA == PIPE_BLENDFACTOR_ZERO) && 67 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 68 dstRGB == PIPE_BLENDFACTOR_ONE) && 69 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 70 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 71 dstA == PIPE_BLENDFACTOR_ONE); 72} 73 74static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 75 unsigned dstRGB, unsigned dstA) 76{ 77 /* If the blend equation is ADD or REVERSE_SUBTRACT, 78 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 79 * will not be changed. 80 * Notice that the dst factors are the src factors inverted. */ 81 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 82 srcRGB == PIPE_BLENDFACTOR_ZERO) && 83 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 84 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 85 srcA == PIPE_BLENDFACTOR_ZERO) && 86 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 87 dstRGB == PIPE_BLENDFACTOR_ONE) && 88 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 89 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 90 dstA == PIPE_BLENDFACTOR_ONE); 91} 92 93static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 94 unsigned dstRGB, unsigned dstA) 95{ 96 /* If the blend equation is ADD or REVERSE_SUBTRACT, 97 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 98 * will not be changed. 99 * Notice that the dst factors are the src factors inverted. */ 100 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 101 srcRGB == PIPE_BLENDFACTOR_ZERO) && 102 (srcA == PIPE_BLENDFACTOR_ZERO) && 103 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 104 dstRGB == PIPE_BLENDFACTOR_ONE) && 105 (dstA == PIPE_BLENDFACTOR_ONE); 106} 107 108static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 109 unsigned dstRGB, unsigned dstA) 110{ 111 /* If the blend equation is ADD or REVERSE_SUBTRACT, 112 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 113 * will not be changed. 114 * Notice that the dst factors are the src factors inverted. */ 115 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 116 srcRGB == PIPE_BLENDFACTOR_ZERO) && 117 (srcA == PIPE_BLENDFACTOR_ZERO) && 118 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 119 dstRGB == PIPE_BLENDFACTOR_ONE) && 120 (dstA == PIPE_BLENDFACTOR_ONE); 121} 122 123static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 124 unsigned dstRGB, unsigned dstA) 125{ 126 /* If the blend equation is ADD or REVERSE_SUBTRACT, 127 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 128 * the colorbuffer will not be changed. 129 * Notice that the dst factors are the src factors inverted. */ 130 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 131 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 132 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 133 srcRGB == PIPE_BLENDFACTOR_ZERO) && 134 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 135 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 136 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 137 srcA == PIPE_BLENDFACTOR_ZERO) && 138 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 139 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 140 dstRGB == PIPE_BLENDFACTOR_ONE) && 141 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 142 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 143 dstA == PIPE_BLENDFACTOR_ONE); 144} 145 146static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 147 unsigned dstRGB, unsigned dstA) 148{ 149 /* If the blend equation is ADD or REVERSE_SUBTRACT, 150 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 151 * the colorbuffer will not be changed. 152 * Notice that the dst factors are the src factors inverted. */ 153 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 154 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 155 srcRGB == PIPE_BLENDFACTOR_ZERO) && 156 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 157 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 158 srcA == PIPE_BLENDFACTOR_ZERO) && 159 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 160 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 161 dstRGB == PIPE_BLENDFACTOR_ONE) && 162 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 163 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 164 dstA == PIPE_BLENDFACTOR_ONE); 165} 166 167static unsigned bgra_cmask(unsigned mask) 168{ 169 /* Gallium uses RGBA color ordering while R300 expects BGRA. */ 170 171 return ((mask & PIPE_MASK_R) << 2) | 172 ((mask & PIPE_MASK_B) >> 2) | 173 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 174} 175 176/* Create a new blend state based on the CSO blend state. 177 * 178 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 179static void* r300_create_blend_state(struct pipe_context* pipe, 180 const struct pipe_blend_state* state) 181{ 182 struct r300_screen* r300screen = r300_screen(pipe->screen); 183 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 184 185 if (state->rt[0].blend_enable) 186 { 187 unsigned eqRGB = state->rt[0].rgb_func; 188 unsigned srcRGB = state->rt[0].rgb_src_factor; 189 unsigned dstRGB = state->rt[0].rgb_dst_factor; 190 191 unsigned eqA = state->rt[0].alpha_func; 192 unsigned srcA = state->rt[0].alpha_src_factor; 193 unsigned dstA = state->rt[0].alpha_dst_factor; 194 195 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 196 * this is just the crappy D3D naming */ 197 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 198 r300_translate_blend_function(eqRGB) | 199 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 200 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 201 202 /* Optimization: some operations do not require the destination color. 203 * 204 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 205 * otherwise blending gives incorrect results. It seems to be 206 * a hardware bug. */ 207 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 208 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 209 dstRGB != PIPE_BLENDFACTOR_ZERO || 210 dstA != PIPE_BLENDFACTOR_ZERO || 211 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 212 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 213 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 214 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 215 srcA == PIPE_BLENDFACTOR_DST_COLOR || 216 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 217 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 218 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 219 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 220 /* Enable reading from the colorbuffer. */ 221 blend->blend_control |= R300_READ_ENABLE; 222 223 if (r300screen->caps.is_r500) { 224 /* Optimization: Depending on incoming pixels, we can 225 * conditionally disable the reading in hardware... */ 226 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 227 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 228 /* Disable reading if SRC_ALPHA == 0. */ 229 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 230 dstRGB == PIPE_BLENDFACTOR_ZERO) && 231 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 232 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 233 dstA == PIPE_BLENDFACTOR_ZERO)) { 234 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ; 235 } 236 237 /* Disable reading if SRC_ALPHA == 1. */ 238 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 239 dstRGB == PIPE_BLENDFACTOR_ZERO) && 240 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 241 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 242 dstA == PIPE_BLENDFACTOR_ZERO)) { 243 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ; 244 } 245 } 246 } 247 } 248 249 /* Optimization: discard pixels which don't change the colorbuffer. 250 * 251 * The code below is non-trivial and some math is involved. 252 * 253 * Discarding pixels must be disabled when FP16 AA is enabled. 254 * This is a hardware bug. Also, this implementation wouldn't work 255 * with FP blending enabled and equation clamping disabled. 256 * 257 * Equations other than ADD are rarely used and therefore won't be 258 * optimized. */ 259 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 260 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 261 /* ADD: X+Y 262 * REVERSE_SUBTRACT: Y-X 263 * 264 * The idea is: 265 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 266 * then CB will not be changed. 267 * 268 * Given the srcFactor and dstFactor variables, we can derive 269 * what src and dst should be equal to and discard appropriate 270 * pixels. 271 */ 272 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 273 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 274 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 275 dstRGB, dstA)) { 276 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 277 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 278 dstRGB, dstA)) { 279 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 280 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 281 dstRGB, dstA)) { 282 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 283 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 284 dstRGB, dstA)) { 285 blend->blend_control |= 286 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 287 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 288 dstRGB, dstA)) { 289 blend->blend_control |= 290 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 291 } 292 } 293 294 /* separate alpha */ 295 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 296 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE; 297 blend->alpha_blend_control = 298 r300_translate_blend_function(eqA) | 299 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 300 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 301 } 302 } 303 304 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 305 if (state->logicop_enable) { 306 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 307 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 308 } 309 310 /* Color channel masks for all MRTs. */ 311 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask); 312 if (r300screen->caps.is_r500 && state->independent_blend_enable) { 313 if (state->rt[1].blend_enable) { 314 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; 315 } 316 if (state->rt[2].blend_enable) { 317 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8; 318 } 319 if (state->rt[3].blend_enable) { 320 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12; 321 } 322 } 323 324 /* Neither fglrx nor classic r300 ever set this, regardless of dithering 325 * state. Since it's an optional implementation detail, we can leave it 326 * out and never dither. 327 * 328 * This could be revisited if we ever get quality or conformance hints. 329 * 330 if (state->dither) { 331 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 332 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 333 } 334 */ 335 336 return (void*)blend; 337} 338 339/* Bind blend state. */ 340static void r300_bind_blend_state(struct pipe_context* pipe, 341 void* state) 342{ 343 struct r300_context* r300 = r300_context(pipe); 344 345 UPDATE_STATE(state, r300->blend_state); 346} 347 348/* Free blend state. */ 349static void r300_delete_blend_state(struct pipe_context* pipe, 350 void* state) 351{ 352 FREE(state); 353} 354 355/* Convert float to 10bit integer */ 356static unsigned float_to_fixed10(float f) 357{ 358 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 359} 360 361/* Set blend color. 362 * Setup both R300 and R500 registers, figure out later which one to write. */ 363static void r300_set_blend_color(struct pipe_context* pipe, 364 const struct pipe_blend_color* color) 365{ 366 struct r300_context* r300 = r300_context(pipe); 367 struct r300_blend_color_state* state = 368 (struct r300_blend_color_state*)r300->blend_color_state.state; 369 union util_color uc; 370 371 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 372 state->blend_color = uc.ui; 373 374 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 375 state->blend_color_red_alpha = 376 float_to_fixed10(color->color[0]) | 377 (float_to_fixed10(color->color[3]) << 16); 378 state->blend_color_green_blue = 379 float_to_fixed10(color->color[2]) | 380 (float_to_fixed10(color->color[1]) << 16); 381 382 r300->blend_color_state.size = r300->screen->caps.is_r500 ? 3 : 2; 383 r300->blend_color_state.dirty = TRUE; 384} 385 386static void r300_set_clip_state(struct pipe_context* pipe, 387 const struct pipe_clip_state* state) 388{ 389 struct r300_context* r300 = r300_context(pipe); 390 391 r300->clip = *state; 392 393 if (r300->screen->caps.has_tcl) { 394 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state)); 395 r300->clip_state.size = 29; 396 } else { 397 draw_flush(r300->draw); 398 draw_set_clip_state(r300->draw, state); 399 r300->clip_state.size = 2; 400 } 401 402 r300->clip_state.dirty = TRUE; 403} 404 405/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 406 * 407 * This contains the depth buffer, stencil buffer, alpha test, and such. 408 * On the Radeon, depth and stencil buffer setup are intertwined, which is 409 * the reason for some of the strange-looking assignments across registers. */ 410static void* 411 r300_create_dsa_state(struct pipe_context* pipe, 412 const struct pipe_depth_stencil_alpha_state* state) 413{ 414 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps; 415 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 416 417 /* Depth test setup. */ 418 if (state->depth.enabled) { 419 dsa->z_buffer_control |= R300_Z_ENABLE; 420 421 if (state->depth.writemask) { 422 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 423 } 424 425 dsa->z_stencil_control |= 426 (r300_translate_depth_stencil_function(state->depth.func) << 427 R300_Z_FUNC_SHIFT); 428 } 429 430 /* Stencil buffer setup. */ 431 if (state->stencil[0].enabled) { 432 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 433 dsa->z_stencil_control |= 434 (r300_translate_depth_stencil_function(state->stencil[0].func) << 435 R300_S_FRONT_FUNC_SHIFT) | 436 (r300_translate_stencil_op(state->stencil[0].fail_op) << 437 R300_S_FRONT_SFAIL_OP_SHIFT) | 438 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 439 R300_S_FRONT_ZPASS_OP_SHIFT) | 440 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 441 R300_S_FRONT_ZFAIL_OP_SHIFT); 442 443 dsa->stencil_ref_mask = 444 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 445 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 446 447 if (state->stencil[1].enabled) { 448 dsa->two_sided = TRUE; 449 450 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 451 dsa->z_stencil_control |= 452 (r300_translate_depth_stencil_function(state->stencil[1].func) << 453 R300_S_BACK_FUNC_SHIFT) | 454 (r300_translate_stencil_op(state->stencil[1].fail_op) << 455 R300_S_BACK_SFAIL_OP_SHIFT) | 456 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 457 R300_S_BACK_ZPASS_OP_SHIFT) | 458 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 459 R300_S_BACK_ZFAIL_OP_SHIFT); 460 461 dsa->stencil_ref_bf = 462 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 463 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 464 465 if (caps->is_r500) { 466 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 467 } else { 468 dsa->stencil_ref_bf_fallback = 469 (state->stencil[0].valuemask != state->stencil[1].valuemask || 470 state->stencil[0].writemask != state->stencil[1].writemask); 471 } 472 } 473 } 474 475 /* Alpha test setup. */ 476 if (state->alpha.enabled) { 477 dsa->alpha_function = 478 r300_translate_alpha_function(state->alpha.func) | 479 R300_FG_ALPHA_FUNC_ENABLE; 480 481 /* We could use 10bit alpha ref but who needs that? */ 482 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 483 484 if (caps->is_r500) 485 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 486 } 487 488 return (void*)dsa; 489} 490 491static void r300_update_stencil_ref_fallback_status(struct r300_context *r300) 492{ 493 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 494 495 if (r300->screen->caps.is_r500) { 496 return; 497 } 498 499 r300->stencil_ref_bf_fallback = 500 dsa->stencil_ref_bf_fallback || 501 (dsa->two_sided && 502 r300->stencil_ref.ref_value[0] != r300->stencil_ref.ref_value[1]); 503} 504 505/* Bind DSA state. */ 506static void r300_bind_dsa_state(struct pipe_context* pipe, 507 void* state) 508{ 509 struct r300_context* r300 = r300_context(pipe); 510 511 if (!state) { 512 return; 513 } 514 515 UPDATE_STATE(state, r300->dsa_state); 516 517 r300_update_stencil_ref_fallback_status(r300); 518} 519 520/* Free DSA state. */ 521static void r300_delete_dsa_state(struct pipe_context* pipe, 522 void* state) 523{ 524 FREE(state); 525} 526 527static void r300_set_stencil_ref(struct pipe_context* pipe, 528 const struct pipe_stencil_ref* sr) 529{ 530 struct r300_context* r300 = r300_context(pipe); 531 532 r300->stencil_ref = *sr; 533 r300->dsa_state.dirty = TRUE; 534 535 r300_update_stencil_ref_fallback_status(r300); 536} 537 538/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 539static void r300_fb_update_tiling_flags(struct r300_context *r300, 540 const struct pipe_framebuffer_state *old_state, 541 const struct pipe_framebuffer_state *new_state) 542{ 543 struct r300_texture *tex; 544 unsigned i, j, level; 545 546 /* Reset tiling flags for old surfaces to default values. */ 547 for (i = 0; i < old_state->nr_cbufs; i++) { 548 for (j = 0; j < new_state->nr_cbufs; j++) { 549 if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) { 550 break; 551 } 552 } 553 /* If not binding the surface again... */ 554 if (j != new_state->nr_cbufs) { 555 continue; 556 } 557 558 tex = r300_texture(old_state->cbufs[i]->texture); 559 560 if (tex) { 561 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 562 tex->pitch[0], 563 tex->microtile, 564 tex->macrotile); 565 } 566 } 567 if (old_state->zsbuf && 568 (!new_state->zsbuf || 569 old_state->zsbuf->texture != new_state->zsbuf->texture)) { 570 tex = r300_texture(old_state->zsbuf->texture); 571 572 if (tex) { 573 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 574 tex->pitch[0], 575 tex->microtile, 576 tex->macrotile); 577 } 578 } 579 580 /* Set tiling flags for new surfaces. */ 581 for (i = 0; i < new_state->nr_cbufs; i++) { 582 tex = r300_texture(new_state->cbufs[i]->texture); 583 level = new_state->cbufs[i]->level; 584 585 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 586 tex->pitch[level], 587 tex->microtile, 588 tex->mip_macrotile[level]); 589 } 590 if (new_state->zsbuf) { 591 tex = r300_texture(new_state->zsbuf->texture); 592 level = new_state->zsbuf->level; 593 594 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 595 tex->pitch[level], 596 tex->microtile, 597 tex->mip_macrotile[level]); 598 } 599} 600 601static void 602 r300_set_framebuffer_state(struct pipe_context* pipe, 603 const struct pipe_framebuffer_state* state) 604{ 605 struct r300_context* r300 = r300_context(pipe); 606 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 607 unsigned max_width, max_height; 608 uint32_t zbuffer_bpp = 0; 609 610 if (state->nr_cbufs > 4) { 611 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, " 612 "refusing to bind framebuffer state!\n", __FUNCTION__); 613 return; 614 } 615 616 if (r300->screen->caps.is_r500) { 617 max_width = max_height = 4096; 618 } else if (r300->screen->caps.is_r400) { 619 max_width = max_height = 4021; 620 } else { 621 max_width = max_height = 2560; 622 } 623 624 if (state->width > max_width || state->height > max_height) { 625 fprintf(stderr, "r300: Implementation error: Render targets are too " 626 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 627 return; 628 } 629 630 if (r300->draw) { 631 draw_flush(r300->draw); 632 } 633 634 r300->fb_state.dirty = TRUE; 635 636 /* If nr_cbufs is changed from zero to non-zero or vice versa... */ 637 if (!!old_state->nr_cbufs != !!state->nr_cbufs) { 638 r300->blend_state.dirty = TRUE; 639 } 640 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 641 if (!!old_state->zsbuf != !!state->zsbuf) { 642 r300->dsa_state.dirty = TRUE; 643 } 644 645 r300_fb_update_tiling_flags(r300, r300->fb_state.state, state); 646 647 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); 648 649 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + 650 (state->zsbuf ? 10 : 0) + 11; 651 652 /* Polygon offset depends on the zbuffer bit depth. */ 653 if (state->zsbuf && r300->polygon_offset_enabled) { 654 switch (util_format_get_blocksize(state->zsbuf->texture->format)) { 655 case 2: 656 zbuffer_bpp = 16; 657 break; 658 case 4: 659 zbuffer_bpp = 24; 660 break; 661 } 662 663 if (r300->zbuffer_bpp != zbuffer_bpp) { 664 r300->zbuffer_bpp = zbuffer_bpp; 665 r300->rs_state.dirty = TRUE; 666 } 667 } 668} 669 670/* Create fragment shader state. */ 671static void* r300_create_fs_state(struct pipe_context* pipe, 672 const struct pipe_shader_state* shader) 673{ 674 struct r300_fragment_shader* fs = NULL; 675 676 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 677 678 /* Copy state directly into shader. */ 679 fs->state = *shader; 680 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 681 682 tgsi_scan_shader(shader->tokens, &fs->info); 683 r300_shader_read_fs_inputs(&fs->info, &fs->inputs); 684 685 return (void*)fs; 686} 687 688/* Bind fragment shader state. */ 689static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 690{ 691 struct r300_context* r300 = r300_context(pipe); 692 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 693 694 if (fs == NULL) { 695 r300->fs = NULL; 696 return; 697 } 698 699 r300->fs = fs; 700 r300_pick_fragment_shader(r300); 701 702 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 703 704 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) { 705 r300->vap_output_state.dirty = TRUE; 706 } 707 708 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS; 709} 710 711/* Delete fragment shader state. */ 712static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 713{ 714 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 715 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 716 717 while (ptr) { 718 tmp = ptr; 719 ptr = ptr->next; 720 rc_constants_destroy(&tmp->code.constants); 721 FREE(tmp); 722 } 723 FREE((void*)fs->state.tokens); 724 FREE(shader); 725} 726 727static void r300_set_polygon_stipple(struct pipe_context* pipe, 728 const struct pipe_poly_stipple* state) 729{ 730 /* XXX no idea how to set this up, but not terribly important */ 731} 732 733/* Create a new rasterizer state based on the CSO rasterizer state. 734 * 735 * This is a very large chunk of state, and covers most of the graphics 736 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 737 * 738 * In a not entirely unironic sidenote, this state has nearly nothing to do 739 * with the actual block on the Radeon called the rasterizer (RS). */ 740static void* r300_create_rs_state(struct pipe_context* pipe, 741 const struct pipe_rasterizer_state* state) 742{ 743 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 744 745 /* Copy rasterizer state for Draw. */ 746 rs->rs = *state; 747 748#ifdef PIPE_ARCH_LITTLE_ENDIAN 749 rs->vap_control_status = R300_VC_NO_SWAP; 750#else 751 rs->vap_control_status = R300_VC_32BIT_SWAP; 752#endif 753 754 /* If no TCL engine is present, turn off the HW TCL. */ 755 if (!r300_screen(pipe->screen)->caps.has_tcl) { 756 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 757 } 758 759 rs->point_size = pack_float_16_6x(state->point_size) | 760 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 761 762 rs->line_control = pack_float_16_6x(state->line_width) | 763 R300_GA_LINE_CNTL_END_TYPE_COMP; 764 765 /* Enable polygon mode */ 766 if (state->fill_cw != PIPE_POLYGON_MODE_FILL || 767 state->fill_ccw != PIPE_POLYGON_MODE_FILL) { 768 rs->polygon_mode = R300_GA_POLY_MODE_DUAL; 769 } 770 771 /* Radeons don't think in "CW/CCW", they think in "front/back". */ 772 if (state->front_winding == PIPE_WINDING_CW) { 773 rs->cull_mode = R300_FRONT_FACE_CW; 774 775 /* Polygon offset */ 776 if (state->offset_cw) { 777 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 778 } 779 if (state->offset_ccw) { 780 rs->polygon_offset_enable |= R300_BACK_ENABLE; 781 } 782 783 /* Polygon mode */ 784 if (rs->polygon_mode) { 785 rs->polygon_mode |= 786 r300_translate_polygon_mode_front(state->fill_cw); 787 rs->polygon_mode |= 788 r300_translate_polygon_mode_back(state->fill_ccw); 789 } 790 } else { 791 rs->cull_mode = R300_FRONT_FACE_CCW; 792 793 /* Polygon offset */ 794 if (state->offset_ccw) { 795 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 796 } 797 if (state->offset_cw) { 798 rs->polygon_offset_enable |= R300_BACK_ENABLE; 799 } 800 801 /* Polygon mode */ 802 if (rs->polygon_mode) { 803 rs->polygon_mode |= 804 r300_translate_polygon_mode_front(state->fill_ccw); 805 rs->polygon_mode |= 806 r300_translate_polygon_mode_back(state->fill_cw); 807 } 808 } 809 if (state->front_winding & state->cull_mode) { 810 rs->cull_mode |= R300_CULL_FRONT; 811 } 812 if (~(state->front_winding) & state->cull_mode) { 813 rs->cull_mode |= R300_CULL_BACK; 814 } 815 816 if (rs->polygon_offset_enable) { 817 rs->depth_offset = state->offset_units; 818 rs->depth_scale = state->offset_scale; 819 } 820 821 if (state->line_stipple_enable) { 822 rs->line_stipple_config = 823 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 824 (fui((float)state->line_stipple_factor) & 825 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 826 /* XXX this might need to be scaled up */ 827 rs->line_stipple_value = state->line_stipple_pattern; 828 } 829 830 if (state->flatshade) { 831 rs->color_control = R300_SHADE_MODEL_FLAT; 832 } else { 833 rs->color_control = R300_SHADE_MODEL_SMOOTH; 834 } 835 836 rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF; 837 838 return (void*)rs; 839} 840 841/* Bind rasterizer state. */ 842static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 843{ 844 struct r300_context* r300 = r300_context(pipe); 845 struct r300_rs_state* rs = (struct r300_rs_state*)state; 846 847 if (r300->draw) { 848 draw_flush(r300->draw); 849 draw_set_rasterizer_state(r300->draw, &rs->rs); 850 } 851 852 if (rs) { 853 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw; 854 } else { 855 r300->polygon_offset_enabled = FALSE; 856 } 857 858 UPDATE_STATE(state, r300->rs_state); 859 r300->rs_state.size = 19 + (r300->polygon_offset_enabled ? 5 : 0); 860} 861 862/* Free rasterizer state. */ 863static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 864{ 865 FREE(state); 866} 867 868static void* 869 r300_create_sampler_state(struct pipe_context* pipe, 870 const struct pipe_sampler_state* state) 871{ 872 struct r300_context* r300 = r300_context(pipe); 873 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 874 boolean is_r500 = r300->screen->caps.is_r500; 875 int lod_bias; 876 union util_color uc; 877 878 sampler->state = *state; 879 880 sampler->filter0 |= 881 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 882 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 883 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 884 885 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 886 state->mag_img_filter, 887 state->min_mip_filter, 888 state->max_anisotropy > 0); 889 890 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 891 892 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 893 /* We must pass these to the merge function to clamp them properly. */ 894 sampler->min_lod = MAX2((unsigned)state->min_lod, 0); 895 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0); 896 897 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); 898 899 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 900 901 /* This is very high quality anisotropic filtering for R5xx. 902 * It's good for benchmarking the performance of texturing but 903 * in practice we don't want to slow down the driver because it's 904 * a pretty good performance killer. Feel free to play with it. */ 905 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 906 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 907 } 908 909 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 910 sampler->border_color = uc.ui; 911 912 /* R500-specific fixups and optimizations */ 913 if (r300->screen->caps.is_r500) { 914 sampler->filter1 |= R500_BORDER_FIX; 915 } 916 917 return (void*)sampler; 918} 919 920static void r300_bind_sampler_states(struct pipe_context* pipe, 921 unsigned count, 922 void** states) 923{ 924 struct r300_context* r300 = r300_context(pipe); 925 struct r300_textures_state* state = 926 (struct r300_textures_state*)r300->textures_state.state; 927 unsigned tex_units = r300->screen->caps.num_tex_units; 928 929 if (count > tex_units) { 930 return; 931 } 932 933 memcpy(state->sampler_states, states, sizeof(void*) * count); 934 state->sampler_state_count = count; 935 936 r300->textures_state.dirty = TRUE; 937 938 /* Pick a fragment shader based on the texture compare state. */ 939 if (r300->fs && count) { 940 if (r300_pick_fragment_shader(r300)) { 941 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | 942 R300_NEW_FRAGMENT_SHADER_CONSTANTS; 943 } 944 } 945} 946 947static void r300_lacks_vertex_textures(struct pipe_context* pipe, 948 unsigned count, 949 void** states) 950{ 951} 952 953static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 954{ 955 FREE(state); 956} 957 958static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 959 unsigned count, 960 struct pipe_sampler_view** views) 961{ 962 struct r300_context* r300 = r300_context(pipe); 963 struct r300_textures_state* state = 964 (struct r300_textures_state*)r300->textures_state.state; 965 struct r300_texture *texture; 966 unsigned i; 967 unsigned tex_units = r300->screen->caps.num_tex_units; 968 boolean is_r500 = r300->screen->caps.is_r500; 969 boolean dirty_tex = FALSE; 970 971 if (count > tex_units) { 972 return; 973 } 974 975 for (i = 0; i < count; i++) { 976 if (&state->sampler_views[i]->base != views[i]) { 977 pipe_sampler_view_reference( 978 (struct pipe_sampler_view**)&state->sampler_views[i], 979 views[i]); 980 981 if (!views[i]) { 982 continue; 983 } 984 985 /* A new sampler view (= texture)... */ 986 dirty_tex = TRUE; 987 988 /* R300-specific - set the texrect factor in the fragment shader */ 989 texture = r300_texture(views[i]->texture); 990 if (!is_r500 && texture->uses_pitch) { 991 /* XXX It would be nice to re-emit just 1 constant, 992 * XXX not all of them */ 993 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 994 } 995 } 996 } 997 998 for (i = count; i < tex_units; i++) { 999 if (state->sampler_views[i]) { 1000 pipe_sampler_view_reference( 1001 (struct pipe_sampler_view**)&state->sampler_views[i], 1002 NULL); 1003 } 1004 } 1005 1006 state->sampler_view_count = count; 1007 1008 r300->textures_state.dirty = TRUE; 1009 1010 if (dirty_tex) { 1011 r300->texture_cache_inval.dirty = TRUE; 1012 } 1013} 1014 1015static struct pipe_sampler_view * 1016r300_create_sampler_view(struct pipe_context *pipe, 1017 struct pipe_resource *texture, 1018 const struct pipe_sampler_view *templ) 1019{ 1020 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view); 1021 struct r300_texture *tex = r300_texture(texture); 1022 unsigned char swizzle[4]; 1023 1024 if (view) { 1025 view->base = *templ; 1026 view->base.reference.count = 1; 1027 view->base.context = pipe; 1028 view->base.texture = NULL; 1029 pipe_resource_reference(&view->base.texture, texture); 1030 1031 swizzle[0] = templ->swizzle_r; 1032 swizzle[1] = templ->swizzle_g; 1033 swizzle[2] = templ->swizzle_b; 1034 swizzle[3] = templ->swizzle_a; 1035 1036 /* XXX Enable swizzles when they become supported. Now we get RGBA 1037 * everywhere. And do testing! */ 1038 view->format = tex->tx_format; 1039 view->format.format1 |= r300_translate_texformat(templ->format, 1040 0); /*swizzle);*/ 1041 if (r300_screen(pipe->screen)->caps.is_r500) { 1042 view->format.format2 |= r500_tx_format_msb_bit(templ->format); 1043 } 1044 } 1045 1046 return (struct pipe_sampler_view*)view; 1047} 1048 1049static void 1050r300_sampler_view_destroy(struct pipe_context *pipe, 1051 struct pipe_sampler_view *view) 1052{ 1053 pipe_resource_reference(&view->texture, NULL); 1054 FREE(view); 1055} 1056 1057static void r300_set_scissor_state(struct pipe_context* pipe, 1058 const struct pipe_scissor_state* state) 1059{ 1060 struct r300_context* r300 = r300_context(pipe); 1061 1062 memcpy(r300->scissor_state.state, state, 1063 sizeof(struct pipe_scissor_state)); 1064 1065 r300->scissor_state.dirty = TRUE; 1066} 1067 1068static void r300_set_viewport_state(struct pipe_context* pipe, 1069 const struct pipe_viewport_state* state) 1070{ 1071 struct r300_context* r300 = r300_context(pipe); 1072 struct r300_viewport_state* viewport = 1073 (struct r300_viewport_state*)r300->viewport_state.state; 1074 1075 r300->viewport = *state; 1076 1077 /* Do the transform in HW. */ 1078 viewport->vte_control = R300_VTX_W0_FMT; 1079 1080 if (state->scale[0] != 1.0f) { 1081 viewport->xscale = state->scale[0]; 1082 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1083 } 1084 if (state->scale[1] != 1.0f) { 1085 viewport->yscale = state->scale[1]; 1086 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1087 } 1088 if (state->scale[2] != 1.0f) { 1089 viewport->zscale = state->scale[2]; 1090 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1091 } 1092 if (state->translate[0] != 0.0f) { 1093 viewport->xoffset = state->translate[0]; 1094 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1095 } 1096 if (state->translate[1] != 0.0f) { 1097 viewport->yoffset = state->translate[1]; 1098 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1099 } 1100 if (state->translate[2] != 0.0f) { 1101 viewport->zoffset = state->translate[2]; 1102 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1103 } 1104 1105 r300->viewport_state.dirty = TRUE; 1106 if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) { 1107 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1108 } 1109} 1110 1111static void r300_set_vertex_buffers(struct pipe_context* pipe, 1112 unsigned count, 1113 const struct pipe_vertex_buffer* buffers) 1114{ 1115 struct r300_context* r300 = r300_context(pipe); 1116 struct pipe_vertex_buffer *vbo; 1117 unsigned i, max_index = (1 << 24) - 1; 1118 boolean any_user_buffer = FALSE; 1119 1120 if (count == r300->vertex_buffer_count && 1121 memcmp(r300->vertex_buffer, buffers, 1122 sizeof(struct pipe_vertex_buffer) * count) == 0) { 1123 return; 1124 } 1125 1126 /* Check if the stride is aligned to the size of DWORD. */ 1127 for (i = 0; i < count; i++) { 1128 if (buffers[i].buffer) { 1129 if (buffers[i].stride % 4 != 0) { 1130 // XXX Shouldn't we align the buffer? 1131 fprintf(stderr, "r300_set_vertex_buffers: " 1132 "Unaligned buffer stride %i isn't supported.\n", 1133 buffers[i].stride); 1134 assert(0); 1135 abort(); 1136 } 1137 } 1138 } 1139 1140 for (i = 0; i < count; i++) { 1141 /* Why, yes, I AM casting away constness. How did you know? */ 1142 vbo = (struct pipe_vertex_buffer*)&buffers[i]; 1143 1144 /* Reference our buffer. */ 1145 pipe_resource_reference(&r300->vertex_buffer[i].buffer, vbo->buffer); 1146 1147 /* Skip NULL buffers */ 1148 if (!buffers[i].buffer) { 1149 continue; 1150 } 1151 1152 if (r300_buffer_is_user_buffer(vbo->buffer)) { 1153 any_user_buffer = TRUE; 1154 } 1155 1156 if (vbo->max_index == ~0) { 1157 /* Bogus value from broken state tracker; hax it. */ 1158 /* TODO - more hax - fixes doom3 from almos on irc */ 1159 if (!vbo->stride) { 1160 fprintf(stderr, "r300: got a VBO with stride 0 fixing up to stide 4\n"); 1161 vbo->stride = 4; 1162 } 1163 vbo->max_index = 1164 (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride; 1165 } 1166 1167 max_index = MIN2(vbo->max_index, max_index); 1168 } 1169 1170 for (; i < r300->vertex_buffer_count; i++) { 1171 /* Dereference any old buffers. */ 1172 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL); 1173 } 1174 1175 memcpy(r300->vertex_buffer, buffers, 1176 sizeof(struct pipe_vertex_buffer) * count); 1177 1178 r300->vertex_buffer_count = count; 1179 r300->vertex_buffer_max_index = max_index; 1180 r300->any_user_vbs = any_user_buffer; 1181 1182 if (r300->draw) { 1183 draw_flush(r300->draw); 1184 draw_set_vertex_buffers(r300->draw, count, buffers); 1185 } 1186} 1187 1188/* Update the PSC tables. */ 1189static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1190{ 1191 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1192 uint16_t type, swizzle; 1193 enum pipe_format format; 1194 unsigned i; 1195 1196 assert(velems->count <= 16); 1197 1198 /* Vertex shaders have no semantics on their inputs, 1199 * so PSC should just route stuff based on the vertex elements, 1200 * and not on attrib information. */ 1201 for (i = 0; i < velems->count; i++) { 1202 format = velems->velem[i].src_format; 1203 1204 type = r300_translate_vertex_data_type(format) | 1205 (i << R300_DST_VEC_LOC_SHIFT); 1206 swizzle = r300_translate_vertex_data_swizzle(format); 1207 1208 if (i & 1) { 1209 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1210 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1211 } else { 1212 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1213 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1214 } 1215 } 1216 1217 /* Set the last vector in the PSC. */ 1218 if (i) { 1219 i -= 1; 1220 } 1221 vstream->vap_prog_stream_cntl[i >> 1] |= 1222 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1223 1224 vstream->count = (i >> 1) + 1; 1225} 1226 1227static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1228 unsigned count, 1229 const struct pipe_vertex_element* attribs) 1230{ 1231 struct r300_vertex_element_state *velems; 1232 unsigned i, size; 1233 1234 assert(count <= PIPE_MAX_ATTRIBS); 1235 velems = CALLOC_STRUCT(r300_vertex_element_state); 1236 if (velems != NULL) { 1237 velems->count = count; 1238 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1239 1240 if (r300_screen(pipe->screen)->caps.has_tcl) { 1241 /* Check if the format is aligned to the size of DWORD. */ 1242 for (i = 0; i < count; i++) { 1243 size = util_format_get_blocksize(attribs[i].src_format); 1244 1245 if (size % 4 != 0) { 1246 /* XXX Shouldn't we align the format? */ 1247 fprintf(stderr, "r300_create_vertex_elements_state: " 1248 "Unaligned format %s:%i isn't supported\n", 1249 util_format_name(attribs[i].src_format), size); 1250 assert(0); 1251 abort(); 1252 } 1253 } 1254 1255 r300_vertex_psc(velems); 1256 } 1257 } 1258 return velems; 1259} 1260 1261static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1262 void *state) 1263{ 1264 struct r300_context *r300 = r300_context(pipe); 1265 struct r300_vertex_element_state *velems = state; 1266 1267 if (velems == NULL) { 1268 return; 1269 } 1270 1271 r300->velems = velems; 1272 1273 if (r300->draw) { 1274 draw_flush(r300->draw); 1275 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1276 } 1277 1278 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1279 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1280} 1281 1282static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1283{ 1284 FREE(state); 1285} 1286 1287static void* r300_create_vs_state(struct pipe_context* pipe, 1288 const struct pipe_shader_state* shader) 1289{ 1290 struct r300_context* r300 = r300_context(pipe); 1291 1292 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1293 r300_vertex_shader_common_init(vs, shader); 1294 1295 if (r300->screen->caps.has_tcl) { 1296 r300_translate_vertex_shader(r300, vs); 1297 } else { 1298 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader); 1299 } 1300 1301 return vs; 1302} 1303 1304static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1305{ 1306 struct r300_context* r300 = r300_context(pipe); 1307 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1308 1309 if (vs == NULL) { 1310 r300->vs_state.state = NULL; 1311 return; 1312 } 1313 if (vs == r300->vs_state.state) { 1314 return; 1315 } 1316 r300->vs_state.state = vs; 1317 1318 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block 1319 if (r300->fs) { 1320 r300_vertex_shader_setup_wpos(r300); 1321 } 1322 memcpy(r300->vap_output_state.state, &vs->vap_out, 1323 sizeof(struct r300_vap_output_state)); 1324 r300->vap_output_state.dirty = TRUE; 1325 1326 /* The majority of the RS block bits is dependent on the vertex shader. */ 1327 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 1328 1329 if (r300->screen->caps.has_tcl) { 1330 r300->vs_state.dirty = TRUE; 1331 r300->vs_state.size = vs->code.length + 9; 1332 1333 r300->pvs_flush.dirty = TRUE; 1334 1335 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 1336 } else { 1337 draw_flush(r300->draw); 1338 draw_bind_vertex_shader(r300->draw, 1339 (struct draw_vertex_shader*)vs->draw_vs); 1340 } 1341} 1342 1343static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1344{ 1345 struct r300_context* r300 = r300_context(pipe); 1346 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1347 1348 if (r300->screen->caps.has_tcl) { 1349 rc_constants_destroy(&vs->code.constants); 1350 } else { 1351 draw_delete_vertex_shader(r300->draw, 1352 (struct draw_vertex_shader*)vs->draw_vs); 1353 } 1354 1355 FREE((void*)vs->state.tokens); 1356 FREE(shader); 1357} 1358 1359static void r300_set_constant_buffer(struct pipe_context *pipe, 1360 uint shader, uint index, 1361 struct pipe_resource *buf) 1362{ 1363 struct r300_context* r300 = r300_context(pipe); 1364 struct pipe_transfer *tr; 1365 void *mapped; 1366 int max_size = 0; 1367 1368 if (buf == NULL || buf->width0 == 0 || 1369 (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL) 1370 { 1371 r300->shader_constants[shader].count = 0; 1372 return; 1373 } 1374 1375 assert((buf->width0 % 4 * sizeof(float)) == 0); 1376 1377 /* Check the size of the constant buffer. */ 1378 switch (shader) { 1379 case PIPE_SHADER_VERTEX: 1380 max_size = 256; 1381 break; 1382 case PIPE_SHADER_FRAGMENT: 1383 if (r300->screen->caps.is_r500) { 1384 max_size = 256; 1385 /* XXX Implement emission of r400's extended constant buffer. */ 1386 /*} else if (r300->screen->caps.is_r400) { 1387 max_size = 64;*/ 1388 } else { 1389 max_size = 32; 1390 } 1391 break; 1392 default: 1393 assert(0); 1394 } 1395 1396 /* XXX Subtract immediates and RC_STATE_* variables. */ 1397 if (buf->width0 > (sizeof(float) * 4 * max_size)) { 1398 fprintf(stderr, "r300: Max size of the constant buffer is " 1399 "%i*4 floats.\n", max_size); 1400 abort(); 1401 } 1402 1403 memcpy(r300->shader_constants[shader].constants, mapped, buf->width0); 1404 r300->shader_constants[shader].count = buf->width0 / (4 * sizeof(float)); 1405 pipe_buffer_unmap(pipe, buf, tr); 1406 1407 if (shader == PIPE_SHADER_VERTEX) { 1408 if (r300->screen->caps.has_tcl) { 1409 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 1410 r300->pvs_flush.dirty = TRUE; 1411 } else if (r300->draw) { 1412 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX, 1413 0, r300->shader_constants[PIPE_SHADER_VERTEX].constants, 1414 buf->width0); 1415 } 1416 } else if (shader == PIPE_SHADER_FRAGMENT) { 1417 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1418 } 1419} 1420 1421void r300_init_state_functions(struct r300_context* r300) 1422{ 1423 r300->context.create_blend_state = r300_create_blend_state; 1424 r300->context.bind_blend_state = r300_bind_blend_state; 1425 r300->context.delete_blend_state = r300_delete_blend_state; 1426 1427 r300->context.set_blend_color = r300_set_blend_color; 1428 1429 r300->context.set_clip_state = r300_set_clip_state; 1430 1431 r300->context.set_constant_buffer = r300_set_constant_buffer; 1432 1433 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1434 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1435 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1436 1437 r300->context.set_stencil_ref = r300_set_stencil_ref; 1438 1439 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1440 1441 r300->context.create_fs_state = r300_create_fs_state; 1442 r300->context.bind_fs_state = r300_bind_fs_state; 1443 r300->context.delete_fs_state = r300_delete_fs_state; 1444 1445 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1446 1447 r300->context.create_rasterizer_state = r300_create_rs_state; 1448 r300->context.bind_rasterizer_state = r300_bind_rs_state; 1449 r300->context.delete_rasterizer_state = r300_delete_rs_state; 1450 1451 r300->context.create_sampler_state = r300_create_sampler_state; 1452 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 1453 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 1454 r300->context.delete_sampler_state = r300_delete_sampler_state; 1455 1456 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 1457 r300->context.create_sampler_view = r300_create_sampler_view; 1458 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 1459 1460 r300->context.set_scissor_state = r300_set_scissor_state; 1461 1462 r300->context.set_viewport_state = r300_set_viewport_state; 1463 1464 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 1465 1466 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 1467 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 1468 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 1469 1470 r300->context.create_vs_state = r300_create_vs_state; 1471 r300->context.bind_vs_state = r300_bind_vs_state; 1472 r300->context.delete_vs_state = r300_delete_vs_state; 1473} 1474