r300_state.c revision 1f630fa0167ed799556a764178772c096a3ddeba
1/*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23#include "draw/draw_context.h"
24
25#include "util/u_math.h"
26#include "util/u_memory.h"
27#include "util/u_pack_color.h"
28
29#include "tgsi/tgsi_parse.h"
30
31#include "pipe/p_config.h"
32#include "pipe/internal/p_winsys_screen.h"
33
34#include "r300_context.h"
35#include "r300_reg.h"
36#include "r300_screen.h"
37#include "r300_state_inlines.h"
38#include "r300_fs.h"
39#include "r300_vs.h"
40
41/* r300_state: Functions used to intialize state context by translating
42 * Gallium state objects into semi-native r300 state objects. */
43
44/* Create a new blend state based on the CSO blend state.
45 *
46 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
47static void* r300_create_blend_state(struct pipe_context* pipe,
48                                     const struct pipe_blend_state* state)
49{
50    struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
51
52    if (state->blend_enable)
53    {
54        unsigned eqRGB = state->rgb_func;
55        unsigned srcRGB = state->rgb_src_factor;
56        unsigned dstRGB = state->rgb_dst_factor;
57
58        unsigned eqA = state->alpha_func;
59        unsigned srcA = state->alpha_src_factor;
60        unsigned dstA = state->alpha_dst_factor;
61
62        /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
63         * this is just the crappy D3D naming */
64        blend->blend_control = R300_ALPHA_BLEND_ENABLE |
65            r300_translate_blend_function(eqRGB) |
66            ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
67            ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
68
69        /* optimization: some operations do not require the destination color */
70        if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
71            eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
72            dstRGB != PIPE_BLENDFACTOR_ZERO ||
73            dstA != PIPE_BLENDFACTOR_ZERO ||
74            srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
75            srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
76            srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
77            srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
78            srcA == PIPE_BLENDFACTOR_DST_COLOR ||
79            srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
80            srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
81            srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA)
82            blend->blend_control |= R300_READ_ENABLE;
83
84        /* XXX implement the optimization with DISCARD_SRC_PIXELS*/
85        /* XXX implement the optimization with SRC_ALPHA_?_NO_READ */
86
87        /* separate alpha */
88        if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
89            blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE;
90            blend->alpha_blend_control =
91                r300_translate_blend_function(eqA) |
92                (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
93                (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
94        }
95    }
96
97    /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
98    if (state->logicop_enable) {
99        blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
100                (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
101    }
102
103    if (state->dither) {
104        blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
105                R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
106    }
107
108    return (void*)blend;
109}
110
111/* Bind blend state. */
112static void r300_bind_blend_state(struct pipe_context* pipe,
113                                  void* state)
114{
115    struct r300_context* r300 = r300_context(pipe);
116
117    r300->blend_state = (struct r300_blend_state*)state;
118    r300->dirty_state |= R300_NEW_BLEND;
119}
120
121/* Free blend state. */
122static void r300_delete_blend_state(struct pipe_context* pipe,
123                                    void* state)
124{
125    FREE(state);
126}
127
128/* Convert float to 10bit integer */
129static unsigned float_to_fixed10(float f)
130{
131    return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
132}
133
134/* Set blend color.
135 * Setup both R300 and R500 registers, figure out later which one to write. */
136static void r300_set_blend_color(struct pipe_context* pipe,
137                                 const struct pipe_blend_color* color)
138{
139    struct r300_context* r300 = r300_context(pipe);
140
141    util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM,
142            &r300->blend_color_state->blend_color);
143
144    /* XXX if FP16 blending is enabled, we should use the FP16 format */
145    r300->blend_color_state->blend_color_red_alpha =
146        float_to_fixed10(color->color[0]) |
147        (float_to_fixed10(color->color[3]) << 16);
148    r300->blend_color_state->blend_color_green_blue =
149        float_to_fixed10(color->color[2]) |
150        (float_to_fixed10(color->color[1]) << 16);
151
152    r300->dirty_state |= R300_NEW_BLEND_COLOR;
153}
154
155static void r300_set_clip_state(struct pipe_context* pipe,
156                                const struct pipe_clip_state* state)
157{
158    struct r300_context* r300 = r300_context(pipe);
159
160    if (r300_screen(pipe->screen)->caps->has_tcl) {
161        r300->clip_state = *state;
162        r300->dirty_state |= R300_NEW_CLIP;
163    } else {
164        draw_flush(r300->draw);
165        draw_set_clip_state(r300->draw, state);
166    }
167}
168
169/* Create a new depth, stencil, and alpha state based on the CSO dsa state.
170 *
171 * This contains the depth buffer, stencil buffer, alpha test, and such.
172 * On the Radeon, depth and stencil buffer setup are intertwined, which is
173 * the reason for some of the strange-looking assignments across registers. */
174static void*
175        r300_create_dsa_state(struct pipe_context* pipe,
176                              const struct pipe_depth_stencil_alpha_state* state)
177{
178    struct r300_capabilities *caps =
179        r300_screen(r300_context(pipe)->context.screen)->caps;
180    struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
181
182    /* Depth test setup. */
183    if (state->depth.enabled) {
184        dsa->z_buffer_control |= R300_Z_ENABLE;
185
186        if (state->depth.writemask) {
187            dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
188        }
189
190        dsa->z_stencil_control |=
191            (r300_translate_depth_stencil_function(state->depth.func) <<
192                R300_Z_FUNC_SHIFT);
193    }
194
195    /* Stencil buffer setup. */
196    if (state->stencil[0].enabled) {
197        dsa->z_buffer_control |= R300_STENCIL_ENABLE;
198        dsa->z_stencil_control |=
199            (r300_translate_depth_stencil_function(state->stencil[0].func) <<
200                R300_S_FRONT_FUNC_SHIFT) |
201            (r300_translate_stencil_op(state->stencil[0].fail_op) <<
202                R300_S_FRONT_SFAIL_OP_SHIFT) |
203            (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
204                R300_S_FRONT_ZPASS_OP_SHIFT) |
205            (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
206                R300_S_FRONT_ZFAIL_OP_SHIFT);
207
208        dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
209                (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
210                (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
211
212        if (state->stencil[1].enabled) {
213            dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
214            dsa->z_stencil_control |=
215            (r300_translate_depth_stencil_function(state->stencil[1].func) <<
216                R300_S_BACK_FUNC_SHIFT) |
217            (r300_translate_stencil_op(state->stencil[1].fail_op) <<
218                R300_S_BACK_SFAIL_OP_SHIFT) |
219            (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
220                R300_S_BACK_ZPASS_OP_SHIFT) |
221            (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
222                R300_S_BACK_ZFAIL_OP_SHIFT);
223
224            /* XXX it seems r3xx doesn't support STENCILREFMASK_BF */
225            if (caps->is_r500)
226            {
227                dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
228                dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
229                    (state->stencil[1].valuemask <<
230                    R300_STENCILMASK_SHIFT) |
231                    (state->stencil[1].writemask <<
232                    R300_STENCILWRITEMASK_SHIFT);
233            }
234        }
235    }
236
237    /* Alpha test setup. */
238    if (state->alpha.enabled) {
239        dsa->alpha_function =
240            r300_translate_alpha_function(state->alpha.func) |
241            R300_FG_ALPHA_FUNC_ENABLE;
242
243        /* XXX figure out why emitting 10bit alpha ref causes CS to dump */
244        /* always use 8bit alpha ref */
245        dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
246
247        if (caps->is_r500)
248            dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
249    }
250
251    return (void*)dsa;
252}
253
254/* Bind DSA state. */
255static void r300_bind_dsa_state(struct pipe_context* pipe,
256                                void* state)
257{
258    struct r300_context* r300 = r300_context(pipe);
259
260    r300->dsa_state = (struct r300_dsa_state*)state;
261    r300->dirty_state |= R300_NEW_DSA;
262}
263
264/* Free DSA state. */
265static void r300_delete_dsa_state(struct pipe_context* pipe,
266                                  void* state)
267{
268    FREE(state);
269}
270
271static void r300_set_edgeflags(struct pipe_context* pipe,
272                               const unsigned* bitfield)
273{
274    /* XXX you know it's bad when i915 has this blank too */
275    /* XXX and even worse, I have no idea WTF the bitfield is */
276}
277
278static void
279    r300_set_framebuffer_state(struct pipe_context* pipe,
280                               const struct pipe_framebuffer_state* state)
281{
282    struct r300_context* r300 = r300_context(pipe);
283
284    if (r300->draw) {
285        draw_flush(r300->draw);
286    }
287
288    r300->framebuffer_state = *state;
289
290    r300->dirty_state |= R300_NEW_FRAMEBUFFERS;
291}
292
293/* Create fragment shader state. */
294static void* r300_create_fs_state(struct pipe_context* pipe,
295                                  const struct pipe_shader_state* shader)
296{
297    struct r300_fragment_shader* fs = NULL;
298
299    fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
300
301    /* Copy state directly into shader. */
302    fs->state = *shader;
303    fs->state.tokens = tgsi_dup_tokens(shader->tokens);
304
305    tgsi_scan_shader(shader->tokens, &fs->info);
306
307    return (void*)fs;
308}
309
310/* Bind fragment shader state. */
311static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
312{
313    struct r300_context* r300 = r300_context(pipe);
314    struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
315
316    if (fs == NULL) {
317        r300->fs = NULL;
318        return;
319    } else if (!fs->translated) {
320        r300_translate_fragment_shader(r300, fs);
321    }
322
323    r300->fs = fs;
324
325    r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS;
326}
327
328/* Delete fragment shader state. */
329static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
330{
331    struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
332    rc_constants_destroy(&fs->code.constants);
333    FREE((void*)fs->state.tokens);
334    FREE(shader);
335}
336
337static void r300_set_polygon_stipple(struct pipe_context* pipe,
338                                     const struct pipe_poly_stipple* state)
339{
340    /* XXX no idea how to set this up, but not terribly important */
341}
342
343/* Create a new rasterizer state based on the CSO rasterizer state.
344 *
345 * This is a very large chunk of state, and covers most of the graphics
346 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
347 *
348 * In a not entirely unironic sidenote, this state has nearly nothing to do
349 * with the actual block on the Radeon called the rasterizer (RS). */
350static void* r300_create_rs_state(struct pipe_context* pipe,
351                                  const struct pipe_rasterizer_state* state)
352{
353    struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
354
355    /* Copy rasterizer state for Draw. */
356    rs->rs = *state;
357
358    rs->enable_vte = !state->bypass_vs_clip_and_viewport;
359
360#ifdef PIPE_ARCH_LITTLE_ENDIAN
361    rs->vap_control_status = R300_VC_NO_SWAP;
362#else
363    rs->vap_control_status = R300_VC_32BIT_SWAP;
364#endif
365
366    /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
367     * Else, enable HW TCL and force Draw's TCL off. */
368    if (state->bypass_vs_clip_and_viewport ||
369            !r300_screen(pipe->screen)->caps->has_tcl) {
370        rs->vap_control_status |= R300_VAP_TCL_BYPASS;
371    } else {
372        rs->rs.bypass_vs_clip_and_viewport = TRUE;
373    }
374
375    rs->point_size = pack_float_16_6x(state->point_size) |
376        (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
377
378    rs->point_minmax =
379        ((int)(state->point_size_min * 6.0) <<
380         R300_GA_POINT_MINMAX_MIN_SHIFT) |
381        ((int)(state->point_size_max * 6.0) <<
382         R300_GA_POINT_MINMAX_MAX_SHIFT);
383
384    rs->line_control = pack_float_16_6x(state->line_width) |
385        R300_GA_LINE_CNTL_END_TYPE_COMP;
386
387    /* Radeons don't think in "CW/CCW", they think in "front/back". */
388    if (state->front_winding == PIPE_WINDING_CW) {
389        rs->cull_mode = R300_FRONT_FACE_CW;
390
391        if (state->offset_cw) {
392            rs->polygon_offset_enable |= R300_FRONT_ENABLE;
393        }
394        if (state->offset_ccw) {
395            rs->polygon_offset_enable |= R300_BACK_ENABLE;
396        }
397    } else {
398        rs->cull_mode = R300_FRONT_FACE_CCW;
399
400        if (state->offset_ccw) {
401            rs->polygon_offset_enable |= R300_FRONT_ENABLE;
402        }
403        if (state->offset_cw) {
404            rs->polygon_offset_enable |= R300_BACK_ENABLE;
405        }
406    }
407    if (state->front_winding & state->cull_mode) {
408        rs->cull_mode |= R300_CULL_FRONT;
409    }
410    if (~(state->front_winding) & state->cull_mode) {
411        rs->cull_mode |= R300_CULL_BACK;
412    }
413
414    if (rs->polygon_offset_enable) {
415        rs->depth_offset_front = rs->depth_offset_back =
416            fui(state->offset_units);
417        rs->depth_scale_front = rs->depth_scale_back =
418            fui(state->offset_scale);
419    }
420
421    if (state->line_stipple_enable) {
422        rs->line_stipple_config =
423            R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
424            (fui((float)state->line_stipple_factor) &
425                R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
426        /* XXX this might need to be scaled up */
427        rs->line_stipple_value = state->line_stipple_pattern;
428    }
429
430    if (state->flatshade) {
431        rs->color_control = R300_SHADE_MODEL_FLAT;
432    } else {
433        rs->color_control = R300_SHADE_MODEL_SMOOTH;
434    }
435
436    if (!state->flatshade_first) {
437        rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
438    }
439
440    return (void*)rs;
441}
442
443/* Bind rasterizer state. */
444static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
445{
446    struct r300_context* r300 = r300_context(pipe);
447    struct r300_rs_state* rs = (struct r300_rs_state*)state;
448
449    if (r300->draw) {
450        draw_flush(r300->draw);
451        draw_set_rasterizer_state(r300->draw, &rs->rs);
452    }
453
454    r300->rs_state = rs;
455    /* XXX Clean these up when we move to atom emits */
456    r300->dirty_state |= R300_NEW_RASTERIZER;
457    r300->dirty_state |= R300_NEW_RS_BLOCK;
458    r300->dirty_state |= R300_NEW_SCISSOR;
459    r300->dirty_state |= R300_NEW_VIEWPORT;
460}
461
462/* Free rasterizer state. */
463static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
464{
465    FREE(state);
466}
467
468static void*
469        r300_create_sampler_state(struct pipe_context* pipe,
470                                  const struct pipe_sampler_state* state)
471{
472    struct r300_context* r300 = r300_context(pipe);
473    struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
474    int lod_bias;
475
476    sampler->filter0 |=
477        (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
478        (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
479        (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
480
481    sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
482                                                   state->mag_img_filter,
483                                                   state->min_mip_filter);
484
485    lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
486
487    sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
488
489    sampler->filter1 |= r300_anisotropy(state->max_anisotropy);
490
491    util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
492                    &sampler->border_color);
493
494    /* R500-specific fixups and optimizations */
495    if (r300_screen(r300->context.screen)->caps->is_r500) {
496        sampler->filter1 |= R500_BORDER_FIX;
497    }
498
499    return (void*)sampler;
500}
501
502static void r300_bind_sampler_states(struct pipe_context* pipe,
503                                     unsigned count,
504                                     void** states)
505{
506    struct r300_context* r300 = r300_context(pipe);
507    int i;
508
509    if (count > 8) {
510        return;
511    }
512
513    for (i = 0; i < count; i++) {
514        if (r300->sampler_states[i] != states[i]) {
515            r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
516            r300->dirty_state |= (R300_NEW_SAMPLER << i);
517        }
518    }
519
520    r300->sampler_count = count;
521}
522
523static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
524{
525    FREE(state);
526}
527
528static void r300_set_sampler_textures(struct pipe_context* pipe,
529                                      unsigned count,
530                                      struct pipe_texture** texture)
531{
532    struct r300_context* r300 = r300_context(pipe);
533    int i;
534
535    /* XXX magic num */
536    if (count > 8) {
537        return;
538    }
539
540    for (i = 0; i < count; i++) {
541        if (r300->textures[i] != (struct r300_texture*)texture[i]) {
542            pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
543                texture[i]);
544            r300->dirty_state |= (R300_NEW_TEXTURE << i);
545        }
546    }
547
548    for (i = count; i < 8; i++) {
549        if (r300->textures[i]) {
550            pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
551                NULL);
552            r300->dirty_state |= (R300_NEW_TEXTURE << i);
553        }
554    }
555
556    r300->texture_count = count;
557}
558
559static void r300_set_scissor_state(struct pipe_context* pipe,
560                                   const struct pipe_scissor_state* state)
561{
562    struct r300_context* r300 = r300_context(pipe);
563
564    if (r300_screen(r300->context.screen)->caps->is_r500) {
565        r300->scissor_state->scissor_top_left =
566            (state->minx << R300_SCISSORS_X_SHIFT) |
567            (state->miny << R300_SCISSORS_Y_SHIFT);
568        r300->scissor_state->scissor_bottom_right =
569            ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) |
570            ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT);
571    } else {
572        /* Offset of 1440 in non-R500 chipsets. */
573        r300->scissor_state->scissor_top_left =
574            ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) |
575            ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT);
576        r300->scissor_state->scissor_bottom_right =
577            (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) |
578            (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT);
579    }
580
581    r300->dirty_state |= R300_NEW_SCISSOR;
582}
583
584static void r300_set_viewport_state(struct pipe_context* pipe,
585                                    const struct pipe_viewport_state* state)
586{
587    struct r300_context* r300 = r300_context(pipe);
588
589    /* Do the transform in HW. */
590    r300->viewport_state->vte_control = R300_VTX_W0_FMT;
591
592    if (state->scale[0] != 1.0f) {
593        r300->viewport_state->xscale = state->scale[0];
594        r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA;
595    }
596    if (state->scale[1] != 1.0f) {
597        r300->viewport_state->yscale = state->scale[1];
598        r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA;
599    }
600    if (state->scale[2] != 1.0f) {
601        r300->viewport_state->zscale = state->scale[2];
602        r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA;
603    }
604    if (state->translate[0] != 0.0f) {
605        r300->viewport_state->xoffset = state->translate[0];
606        r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA;
607    }
608    if (state->translate[1] != 0.0f) {
609        r300->viewport_state->yoffset = state->translate[1];
610        r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA;
611    }
612    if (state->translate[2] != 0.0f) {
613        r300->viewport_state->zoffset = state->translate[2];
614        r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA;
615    }
616
617    r300->dirty_state |= R300_NEW_VIEWPORT;
618}
619
620static void r300_set_vertex_buffers(struct pipe_context* pipe,
621                                    unsigned count,
622                                    const struct pipe_vertex_buffer* buffers)
623{
624    struct r300_context* r300 = r300_context(pipe);
625
626    memcpy(r300->vertex_buffers, buffers,
627        sizeof(struct pipe_vertex_buffer) * count);
628
629    r300->vertex_buffer_count = count;
630
631    if (r300->draw) {
632        draw_flush(r300->draw);
633        draw_set_vertex_buffers(r300->draw, count, buffers);
634    }
635}
636
637static void r300_set_vertex_elements(struct pipe_context* pipe,
638                                    unsigned count,
639                                    const struct pipe_vertex_element* elements)
640{
641    struct r300_context* r300 = r300_context(pipe);
642
643    memcpy(r300->vertex_elements, elements,
644        sizeof(struct pipe_vertex_element) * count);
645
646    r300->vertex_element_count = count;
647
648    if (r300->draw) {
649        draw_flush(r300->draw);
650        draw_set_vertex_elements(r300->draw, count, elements);
651    }
652}
653
654static void* r300_create_vs_state(struct pipe_context* pipe,
655                                  const struct pipe_shader_state* shader)
656{
657    struct r300_context* r300 = r300_context(pipe);
658
659    if (r300_screen(pipe->screen)->caps->has_tcl) {
660        struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
661        /* Copy state directly into shader. */
662        vs->state = *shader;
663        vs->state.tokens = tgsi_dup_tokens(shader->tokens);
664
665        tgsi_scan_shader(shader->tokens, &vs->info);
666
667        /* Appease Draw. */
668        vs->draw = draw_create_vertex_shader(r300->draw, shader);
669
670        return (void*)vs;
671    } else {
672        return draw_create_vertex_shader(r300->draw, shader);
673    }
674}
675
676static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
677{
678    struct r300_context* r300 = r300_context(pipe);
679
680    draw_flush(r300->draw);
681
682    if (r300_screen(pipe->screen)->caps->has_tcl) {
683        struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
684
685        if (vs == NULL) {
686            r300->vs = NULL;
687            return;
688        } else if (!vs->translated) {
689            r300_translate_vertex_shader(r300, vs);
690        }
691
692        draw_bind_vertex_shader(r300->draw, vs->draw);
693        r300->vs = vs;
694        r300->dirty_state |= R300_NEW_VERTEX_SHADER | R300_NEW_VERTEX_SHADER_CONSTANTS;
695    } else {
696        draw_bind_vertex_shader(r300->draw,
697                (struct draw_vertex_shader*)shader);
698    }
699}
700
701static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
702{
703    struct r300_context* r300 = r300_context(pipe);
704
705    if (r300_screen(pipe->screen)->caps->has_tcl) {
706        struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
707
708        rc_constants_destroy(&vs->code.constants);
709        draw_delete_vertex_shader(r300->draw, vs->draw);
710        FREE((void*)vs->state.tokens);
711        FREE(shader);
712    } else {
713        draw_delete_vertex_shader(r300->draw,
714                (struct draw_vertex_shader*)shader);
715    }
716}
717
718static void r300_set_constant_buffer(struct pipe_context *pipe,
719                                     uint shader, uint index,
720                                     const struct pipe_constant_buffer *buf)
721{
722    struct r300_context* r300 = r300_context(pipe);
723    void *mapped;
724
725    if (buf == NULL || buf->buffer->size == 0 ||
726        (mapped = pipe_buffer_map(pipe->screen, buf->buffer, PIPE_BUFFER_USAGE_CPU_READ)) == NULL)
727    {
728        r300->shader_constants[shader].count = 0;
729        return;
730    }
731
732    assert((buf->buffer->size % 4 * sizeof(float)) == 0);
733    memcpy(r300->shader_constants[shader].constants, mapped, buf->buffer->size);
734    r300->shader_constants[shader].count = buf->buffer->size / (4 * sizeof(float));
735    pipe_buffer_unmap(pipe->screen, buf->buffer);
736
737    if (shader == PIPE_SHADER_VERTEX)
738        r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
739    else if (shader == PIPE_SHADER_FRAGMENT)
740        r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
741}
742
743void r300_init_state_functions(struct r300_context* r300)
744{
745    r300->context.create_blend_state = r300_create_blend_state;
746    r300->context.bind_blend_state = r300_bind_blend_state;
747    r300->context.delete_blend_state = r300_delete_blend_state;
748
749    r300->context.set_blend_color = r300_set_blend_color;
750
751    r300->context.set_clip_state = r300_set_clip_state;
752
753    r300->context.set_constant_buffer = r300_set_constant_buffer;
754
755    r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
756    r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
757    r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
758
759    r300->context.set_edgeflags = r300_set_edgeflags;
760
761    r300->context.set_framebuffer_state = r300_set_framebuffer_state;
762
763    r300->context.create_fs_state = r300_create_fs_state;
764    r300->context.bind_fs_state = r300_bind_fs_state;
765    r300->context.delete_fs_state = r300_delete_fs_state;
766
767    r300->context.set_polygon_stipple = r300_set_polygon_stipple;
768
769    r300->context.create_rasterizer_state = r300_create_rs_state;
770    r300->context.bind_rasterizer_state = r300_bind_rs_state;
771    r300->context.delete_rasterizer_state = r300_delete_rs_state;
772
773    r300->context.create_sampler_state = r300_create_sampler_state;
774    r300->context.bind_sampler_states = r300_bind_sampler_states;
775    r300->context.delete_sampler_state = r300_delete_sampler_state;
776
777    r300->context.set_sampler_textures = r300_set_sampler_textures;
778
779    r300->context.set_scissor_state = r300_set_scissor_state;
780
781    r300->context.set_viewport_state = r300_set_viewport_state;
782
783    r300->context.set_vertex_buffers = r300_set_vertex_buffers;
784    r300->context.set_vertex_elements = r300_set_vertex_elements;
785
786    r300->context.create_vs_state = r300_create_vs_state;
787    r300->context.bind_vs_state = r300_bind_vs_state;
788    r300->context.delete_vs_state = r300_delete_vs_state;
789}
790