r300_state.c revision 45d79af644349882b4990b775737405be7cd1aa2
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_math.h" 27#include "util/u_memory.h" 28#include "util/u_pack_color.h" 29 30#include "tgsi/tgsi_parse.h" 31 32#include "pipe/p_config.h" 33 34#include "r300_context.h" 35#include "r300_emit.h" 36#include "r300_reg.h" 37#include "r300_screen.h" 38#include "r300_screen_buffer.h" 39#include "r300_state.h" 40#include "r300_state_inlines.h" 41#include "r300_fs.h" 42#include "r300_texture.h" 43#include "r300_vs.h" 44#include "r300_winsys.h" 45 46/* r300_state: Functions used to intialize state context by translating 47 * Gallium state objects into semi-native r300 state objects. */ 48 49#define UPDATE_STATE(cso, atom) \ 50 if (cso != atom.state) { \ 51 atom.state = cso; \ 52 atom.dirty = TRUE; \ 53 } 54 55static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 56 unsigned dstRGB, unsigned dstA) 57{ 58 /* If the blend equation is ADD or REVERSE_SUBTRACT, 59 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 60 * will not be changed. 61 * Notice that the dst factors are the src factors inverted. */ 62 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 63 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 64 srcRGB == PIPE_BLENDFACTOR_ZERO) && 65 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 66 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 67 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 68 srcA == PIPE_BLENDFACTOR_ZERO) && 69 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 70 dstRGB == PIPE_BLENDFACTOR_ONE) && 71 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 72 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 73 dstA == PIPE_BLENDFACTOR_ONE); 74} 75 76static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 77 unsigned dstRGB, unsigned dstA) 78{ 79 /* If the blend equation is ADD or REVERSE_SUBTRACT, 80 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 81 * will not be changed. 82 * Notice that the dst factors are the src factors inverted. */ 83 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 84 srcRGB == PIPE_BLENDFACTOR_ZERO) && 85 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 86 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 87 srcA == PIPE_BLENDFACTOR_ZERO) && 88 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 89 dstRGB == PIPE_BLENDFACTOR_ONE) && 90 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 91 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 92 dstA == PIPE_BLENDFACTOR_ONE); 93} 94 95static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 96 unsigned dstRGB, unsigned dstA) 97{ 98 /* If the blend equation is ADD or REVERSE_SUBTRACT, 99 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 100 * will not be changed. 101 * Notice that the dst factors are the src factors inverted. */ 102 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 103 srcRGB == PIPE_BLENDFACTOR_ZERO) && 104 (srcA == PIPE_BLENDFACTOR_ZERO) && 105 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 106 dstRGB == PIPE_BLENDFACTOR_ONE) && 107 (dstA == PIPE_BLENDFACTOR_ONE); 108} 109 110static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 111 unsigned dstRGB, unsigned dstA) 112{ 113 /* If the blend equation is ADD or REVERSE_SUBTRACT, 114 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 115 * will not be changed. 116 * Notice that the dst factors are the src factors inverted. */ 117 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 118 srcRGB == PIPE_BLENDFACTOR_ZERO) && 119 (srcA == PIPE_BLENDFACTOR_ZERO) && 120 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 121 dstRGB == PIPE_BLENDFACTOR_ONE) && 122 (dstA == PIPE_BLENDFACTOR_ONE); 123} 124 125static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 126 unsigned dstRGB, unsigned dstA) 127{ 128 /* If the blend equation is ADD or REVERSE_SUBTRACT, 129 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 130 * the colorbuffer will not be changed. 131 * Notice that the dst factors are the src factors inverted. */ 132 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 133 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 134 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 135 srcRGB == PIPE_BLENDFACTOR_ZERO) && 136 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 137 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 138 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 139 srcA == PIPE_BLENDFACTOR_ZERO) && 140 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 141 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 142 dstRGB == PIPE_BLENDFACTOR_ONE) && 143 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 144 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 145 dstA == PIPE_BLENDFACTOR_ONE); 146} 147 148static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 149 unsigned dstRGB, unsigned dstA) 150{ 151 /* If the blend equation is ADD or REVERSE_SUBTRACT, 152 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 153 * the colorbuffer will not be changed. 154 * Notice that the dst factors are the src factors inverted. */ 155 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 156 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 157 srcRGB == PIPE_BLENDFACTOR_ZERO) && 158 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 159 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 160 srcA == PIPE_BLENDFACTOR_ZERO) && 161 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 162 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 163 dstRGB == PIPE_BLENDFACTOR_ONE) && 164 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 165 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 166 dstA == PIPE_BLENDFACTOR_ONE); 167} 168 169static unsigned bgra_cmask(unsigned mask) 170{ 171 /* Gallium uses RGBA color ordering while R300 expects BGRA. */ 172 173 return ((mask & PIPE_MASK_R) << 2) | 174 ((mask & PIPE_MASK_B) >> 2) | 175 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 176} 177 178/* Create a new blend state based on the CSO blend state. 179 * 180 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 181static void* r300_create_blend_state(struct pipe_context* pipe, 182 const struct pipe_blend_state* state) 183{ 184 struct r300_screen* r300screen = r300_screen(pipe->screen); 185 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 186 187 if (state->rt[0].blend_enable) 188 { 189 unsigned eqRGB = state->rt[0].rgb_func; 190 unsigned srcRGB = state->rt[0].rgb_src_factor; 191 unsigned dstRGB = state->rt[0].rgb_dst_factor; 192 193 unsigned eqA = state->rt[0].alpha_func; 194 unsigned srcA = state->rt[0].alpha_src_factor; 195 unsigned dstA = state->rt[0].alpha_dst_factor; 196 197 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 198 * this is just the crappy D3D naming */ 199 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 200 r300_translate_blend_function(eqRGB) | 201 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 202 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 203 204 /* Optimization: some operations do not require the destination color. 205 * 206 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 207 * otherwise blending gives incorrect results. It seems to be 208 * a hardware bug. */ 209 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 210 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 211 dstRGB != PIPE_BLENDFACTOR_ZERO || 212 dstA != PIPE_BLENDFACTOR_ZERO || 213 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 214 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 215 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 216 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 217 srcA == PIPE_BLENDFACTOR_DST_COLOR || 218 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 219 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 220 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 221 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 222 /* Enable reading from the colorbuffer. */ 223 blend->blend_control |= R300_READ_ENABLE; 224 225 if (r300screen->caps.is_r500) { 226 /* Optimization: Depending on incoming pixels, we can 227 * conditionally disable the reading in hardware... */ 228 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 229 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 230 /* Disable reading if SRC_ALPHA == 0. */ 231 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 232 dstRGB == PIPE_BLENDFACTOR_ZERO) && 233 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 234 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 235 dstA == PIPE_BLENDFACTOR_ZERO)) { 236 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ; 237 } 238 239 /* Disable reading if SRC_ALPHA == 1. */ 240 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 241 dstRGB == PIPE_BLENDFACTOR_ZERO) && 242 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 243 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 244 dstA == PIPE_BLENDFACTOR_ZERO)) { 245 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ; 246 } 247 } 248 } 249 } 250 251 /* Optimization: discard pixels which don't change the colorbuffer. 252 * 253 * The code below is non-trivial and some math is involved. 254 * 255 * Discarding pixels must be disabled when FP16 AA is enabled. 256 * This is a hardware bug. Also, this implementation wouldn't work 257 * with FP blending enabled and equation clamping disabled. 258 * 259 * Equations other than ADD are rarely used and therefore won't be 260 * optimized. */ 261 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 262 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 263 /* ADD: X+Y 264 * REVERSE_SUBTRACT: Y-X 265 * 266 * The idea is: 267 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 268 * then CB will not be changed. 269 * 270 * Given the srcFactor and dstFactor variables, we can derive 271 * what src and dst should be equal to and discard appropriate 272 * pixels. 273 */ 274 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 275 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 276 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 277 dstRGB, dstA)) { 278 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 279 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 280 dstRGB, dstA)) { 281 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 282 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 283 dstRGB, dstA)) { 284 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 285 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 286 dstRGB, dstA)) { 287 blend->blend_control |= 288 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 289 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 290 dstRGB, dstA)) { 291 blend->blend_control |= 292 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 293 } 294 } 295 296 /* separate alpha */ 297 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 298 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE; 299 blend->alpha_blend_control = 300 r300_translate_blend_function(eqA) | 301 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 302 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 303 } 304 } 305 306 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 307 if (state->logicop_enable) { 308 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 309 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 310 } 311 312 /* Color channel masks for all MRTs. */ 313 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask); 314 if (r300screen->caps.is_r500 && state->independent_blend_enable) { 315 if (state->rt[1].blend_enable) { 316 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; 317 } 318 if (state->rt[2].blend_enable) { 319 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8; 320 } 321 if (state->rt[3].blend_enable) { 322 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12; 323 } 324 } 325 326 /* Neither fglrx nor classic r300 ever set this, regardless of dithering 327 * state. Since it's an optional implementation detail, we can leave it 328 * out and never dither. 329 * 330 * This could be revisited if we ever get quality or conformance hints. 331 * 332 if (state->dither) { 333 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 334 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 335 } 336 */ 337 338 return (void*)blend; 339} 340 341/* Bind blend state. */ 342static void r300_bind_blend_state(struct pipe_context* pipe, 343 void* state) 344{ 345 struct r300_context* r300 = r300_context(pipe); 346 347 UPDATE_STATE(state, r300->blend_state); 348} 349 350/* Free blend state. */ 351static void r300_delete_blend_state(struct pipe_context* pipe, 352 void* state) 353{ 354 FREE(state); 355} 356 357/* Convert float to 10bit integer */ 358static unsigned float_to_fixed10(float f) 359{ 360 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 361} 362 363/* Set blend color. 364 * Setup both R300 and R500 registers, figure out later which one to write. */ 365static void r300_set_blend_color(struct pipe_context* pipe, 366 const struct pipe_blend_color* color) 367{ 368 struct r300_context* r300 = r300_context(pipe); 369 struct r300_blend_color_state* state = 370 (struct r300_blend_color_state*)r300->blend_color_state.state; 371 union util_color uc; 372 373 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 374 state->blend_color = uc.ui; 375 376 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 377 state->blend_color_red_alpha = 378 float_to_fixed10(color->color[0]) | 379 (float_to_fixed10(color->color[3]) << 16); 380 state->blend_color_green_blue = 381 float_to_fixed10(color->color[2]) | 382 (float_to_fixed10(color->color[1]) << 16); 383 384 r300->blend_color_state.size = r300->screen->caps.is_r500 ? 3 : 2; 385 r300->blend_color_state.dirty = TRUE; 386} 387 388static void r300_set_clip_state(struct pipe_context* pipe, 389 const struct pipe_clip_state* state) 390{ 391 struct r300_context* r300 = r300_context(pipe); 392 393 r300->clip = *state; 394 395 if (r300->screen->caps.has_tcl) { 396 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state)); 397 r300->clip_state.size = 29; 398 } else { 399 draw_flush(r300->draw); 400 draw_set_clip_state(r300->draw, state); 401 r300->clip_state.size = 2; 402 } 403 404 r300->clip_state.dirty = TRUE; 405} 406 407/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 408 * 409 * This contains the depth buffer, stencil buffer, alpha test, and such. 410 * On the Radeon, depth and stencil buffer setup are intertwined, which is 411 * the reason for some of the strange-looking assignments across registers. */ 412static void* 413 r300_create_dsa_state(struct pipe_context* pipe, 414 const struct pipe_depth_stencil_alpha_state* state) 415{ 416 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps; 417 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 418 419 /* Depth test setup. */ 420 if (state->depth.enabled) { 421 dsa->z_buffer_control |= R300_Z_ENABLE; 422 423 if (state->depth.writemask) { 424 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 425 } 426 427 dsa->z_stencil_control |= 428 (r300_translate_depth_stencil_function(state->depth.func) << 429 R300_Z_FUNC_SHIFT); 430 } 431 432 /* Stencil buffer setup. */ 433 if (state->stencil[0].enabled) { 434 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 435 dsa->z_stencil_control |= 436 (r300_translate_depth_stencil_function(state->stencil[0].func) << 437 R300_S_FRONT_FUNC_SHIFT) | 438 (r300_translate_stencil_op(state->stencil[0].fail_op) << 439 R300_S_FRONT_SFAIL_OP_SHIFT) | 440 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 441 R300_S_FRONT_ZPASS_OP_SHIFT) | 442 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 443 R300_S_FRONT_ZFAIL_OP_SHIFT); 444 445 dsa->stencil_ref_mask = 446 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 447 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 448 449 if (state->stencil[1].enabled) { 450 dsa->two_sided = TRUE; 451 452 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 453 dsa->z_stencil_control |= 454 (r300_translate_depth_stencil_function(state->stencil[1].func) << 455 R300_S_BACK_FUNC_SHIFT) | 456 (r300_translate_stencil_op(state->stencil[1].fail_op) << 457 R300_S_BACK_SFAIL_OP_SHIFT) | 458 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 459 R300_S_BACK_ZPASS_OP_SHIFT) | 460 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 461 R300_S_BACK_ZFAIL_OP_SHIFT); 462 463 dsa->stencil_ref_bf = 464 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 465 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 466 467 if (caps->is_r500) { 468 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 469 } else { 470 dsa->stencil_ref_bf_fallback = 471 (state->stencil[0].valuemask != state->stencil[1].valuemask || 472 state->stencil[0].writemask != state->stencil[1].writemask); 473 } 474 } 475 } 476 477 /* Alpha test setup. */ 478 if (state->alpha.enabled) { 479 dsa->alpha_function = 480 r300_translate_alpha_function(state->alpha.func) | 481 R300_FG_ALPHA_FUNC_ENABLE; 482 483 /* We could use 10bit alpha ref but who needs that? */ 484 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 485 486 if (caps->is_r500) 487 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 488 } 489 490 return (void*)dsa; 491} 492 493static void r300_update_stencil_ref_fallback_status(struct r300_context *r300) 494{ 495 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 496 497 if (r300->screen->caps.is_r500) { 498 return; 499 } 500 501 r300->stencil_ref_bf_fallback = 502 dsa->stencil_ref_bf_fallback || 503 (dsa->two_sided && 504 r300->stencil_ref.ref_value[0] != r300->stencil_ref.ref_value[1]); 505} 506 507/* Bind DSA state. */ 508static void r300_bind_dsa_state(struct pipe_context* pipe, 509 void* state) 510{ 511 struct r300_context* r300 = r300_context(pipe); 512 513 if (!state) { 514 return; 515 } 516 517 UPDATE_STATE(state, r300->dsa_state); 518 519 r300_update_stencil_ref_fallback_status(r300); 520} 521 522/* Free DSA state. */ 523static void r300_delete_dsa_state(struct pipe_context* pipe, 524 void* state) 525{ 526 FREE(state); 527} 528 529static void r300_set_stencil_ref(struct pipe_context* pipe, 530 const struct pipe_stencil_ref* sr) 531{ 532 struct r300_context* r300 = r300_context(pipe); 533 534 r300->stencil_ref = *sr; 535 r300->dsa_state.dirty = TRUE; 536 537 r300_update_stencil_ref_fallback_status(r300); 538} 539 540/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 541static void r300_fb_set_tiling_flags(struct r300_context *r300, 542 const struct pipe_framebuffer_state *old_state, 543 const struct pipe_framebuffer_state *new_state) 544{ 545 struct r300_texture *tex; 546 unsigned i, level; 547 548 /* Set tiling flags for new surfaces. */ 549 for (i = 0; i < new_state->nr_cbufs; i++) { 550 tex = r300_texture(new_state->cbufs[i]->texture); 551 level = new_state->cbufs[i]->level; 552 553 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 554 tex->pitch[level], 555 tex->microtile, 556 tex->mip_macrotile[level]); 557 } 558 if (new_state->zsbuf) { 559 tex = r300_texture(new_state->zsbuf->texture); 560 level = new_state->zsbuf->level; 561 562 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 563 tex->pitch[level], 564 tex->microtile, 565 tex->mip_macrotile[level]); 566 } 567} 568 569static void 570 r300_set_framebuffer_state(struct pipe_context* pipe, 571 const struct pipe_framebuffer_state* state) 572{ 573 struct r300_context* r300 = r300_context(pipe); 574 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 575 unsigned max_width, max_height; 576 uint32_t zbuffer_bpp = 0; 577 578 if (state->nr_cbufs > 4) { 579 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, " 580 "refusing to bind framebuffer state!\n", __FUNCTION__); 581 return; 582 } 583 584 if (r300->screen->caps.is_r500) { 585 max_width = max_height = 4096; 586 } else if (r300->screen->caps.is_r400) { 587 max_width = max_height = 4021; 588 } else { 589 max_width = max_height = 2560; 590 } 591 592 if (state->width > max_width || state->height > max_height) { 593 fprintf(stderr, "r300: Implementation error: Render targets are too " 594 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 595 return; 596 } 597 598 if (r300->draw) { 599 draw_flush(r300->draw); 600 } 601 602 r300->fb_state.dirty = TRUE; 603 604 /* If nr_cbufs is changed from zero to non-zero or vice versa... */ 605 if (!!old_state->nr_cbufs != !!state->nr_cbufs) { 606 r300->blend_state.dirty = TRUE; 607 } 608 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 609 if (!!old_state->zsbuf != !!state->zsbuf) { 610 r300->dsa_state.dirty = TRUE; 611 } 612 613 /* The tiling flags are dependent on the surface miplevel, unfortunately. */ 614 r300_fb_set_tiling_flags(r300, r300->fb_state.state, state); 615 616 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); 617 618 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + 619 (state->zsbuf ? 10 : 0) + 11; 620 621 /* Polygon offset depends on the zbuffer bit depth. */ 622 if (state->zsbuf && r300->polygon_offset_enabled) { 623 switch (util_format_get_blocksize(state->zsbuf->texture->format)) { 624 case 2: 625 zbuffer_bpp = 16; 626 break; 627 case 4: 628 zbuffer_bpp = 24; 629 break; 630 } 631 632 if (r300->zbuffer_bpp != zbuffer_bpp) { 633 r300->zbuffer_bpp = zbuffer_bpp; 634 r300->rs_state.dirty = TRUE; 635 } 636 } 637} 638 639/* Create fragment shader state. */ 640static void* r300_create_fs_state(struct pipe_context* pipe, 641 const struct pipe_shader_state* shader) 642{ 643 struct r300_fragment_shader* fs = NULL; 644 645 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 646 647 /* Copy state directly into shader. */ 648 fs->state = *shader; 649 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 650 651 return (void*)fs; 652} 653 654void r300_mark_fs_code_dirty(struct r300_context *r300) 655{ 656 struct r300_fragment_shader* fs = r300_fs(r300); 657 658 r300->fs.dirty = TRUE; 659 r300->fs_rc_constant_state.dirty = TRUE; 660 r300->fs_constants.dirty = TRUE; 661 662 if (r300->screen->caps.is_r500) { 663 r300->fs.size = r500_get_fs_atom_size(r300); 664 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7; 665 r300->fs_constants.size = fs->shader->externals_count * 4 + 3; 666 } else { 667 r300->fs.size = r300_get_fs_atom_size(r300); 668 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5; 669 r300->fs_constants.size = fs->shader->externals_count * 4 + 1; 670 } 671} 672 673/* Bind fragment shader state. */ 674static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 675{ 676 struct r300_context* r300 = r300_context(pipe); 677 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 678 679 if (fs == NULL) { 680 r300->fs.state = NULL; 681 return; 682 } 683 684 r300->fs.state = fs; 685 r300_pick_fragment_shader(r300); 686 r300_mark_fs_code_dirty(r300); 687 688 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 689 690 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) { 691 r300->vap_output_state.dirty = TRUE; 692 } 693} 694 695/* Delete fragment shader state. */ 696static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 697{ 698 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 699 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 700 701 while (ptr) { 702 tmp = ptr; 703 ptr = ptr->next; 704 rc_constants_destroy(&tmp->code.constants); 705 FREE(tmp); 706 } 707 FREE((void*)fs->state.tokens); 708 FREE(shader); 709} 710 711static void r300_set_polygon_stipple(struct pipe_context* pipe, 712 const struct pipe_poly_stipple* state) 713{ 714 /* XXX no idea how to set this up, but not terribly important */ 715} 716 717/* Create a new rasterizer state based on the CSO rasterizer state. 718 * 719 * This is a very large chunk of state, and covers most of the graphics 720 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 721 * 722 * In a not entirely unironic sidenote, this state has nearly nothing to do 723 * with the actual block on the Radeon called the rasterizer (RS). */ 724static void* r300_create_rs_state(struct pipe_context* pipe, 725 const struct pipe_rasterizer_state* state) 726{ 727 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 728 int i; 729 730 /* Copy rasterizer state for Draw. */ 731 rs->rs = *state; 732 733#ifdef PIPE_ARCH_LITTLE_ENDIAN 734 rs->vap_control_status = R300_VC_NO_SWAP; 735#else 736 rs->vap_control_status = R300_VC_32BIT_SWAP; 737#endif 738 739 /* If no TCL engine is present, turn off the HW TCL. */ 740 if (!r300_screen(pipe->screen)->caps.has_tcl) { 741 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 742 } 743 744 rs->point_size = pack_float_16_6x(state->point_size) | 745 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 746 747 rs->line_control = pack_float_16_6x(state->line_width) | 748 R300_GA_LINE_CNTL_END_TYPE_COMP; 749 750 /* Enable polygon mode */ 751 if (state->fill_cw != PIPE_POLYGON_MODE_FILL || 752 state->fill_ccw != PIPE_POLYGON_MODE_FILL) { 753 rs->polygon_mode = R300_GA_POLY_MODE_DUAL; 754 } 755 756 /* Radeons don't think in "CW/CCW", they think in "front/back". */ 757 if (state->front_winding == PIPE_WINDING_CW) { 758 rs->cull_mode = R300_FRONT_FACE_CW; 759 760 /* Polygon offset */ 761 if (state->offset_cw) { 762 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 763 } 764 if (state->offset_ccw) { 765 rs->polygon_offset_enable |= R300_BACK_ENABLE; 766 } 767 768 /* Polygon mode */ 769 if (rs->polygon_mode) { 770 rs->polygon_mode |= 771 r300_translate_polygon_mode_front(state->fill_cw); 772 rs->polygon_mode |= 773 r300_translate_polygon_mode_back(state->fill_ccw); 774 } 775 } else { 776 rs->cull_mode = R300_FRONT_FACE_CCW; 777 778 /* Polygon offset */ 779 if (state->offset_ccw) { 780 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 781 } 782 if (state->offset_cw) { 783 rs->polygon_offset_enable |= R300_BACK_ENABLE; 784 } 785 786 /* Polygon mode */ 787 if (rs->polygon_mode) { 788 rs->polygon_mode |= 789 r300_translate_polygon_mode_front(state->fill_ccw); 790 rs->polygon_mode |= 791 r300_translate_polygon_mode_back(state->fill_cw); 792 } 793 } 794 if (state->front_winding & state->cull_mode) { 795 rs->cull_mode |= R300_CULL_FRONT; 796 } 797 if (~(state->front_winding) & state->cull_mode) { 798 rs->cull_mode |= R300_CULL_BACK; 799 } 800 801 if (rs->polygon_offset_enable) { 802 rs->depth_offset = state->offset_units; 803 rs->depth_scale = state->offset_scale; 804 } 805 806 if (state->line_stipple_enable) { 807 rs->line_stipple_config = 808 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 809 (fui((float)state->line_stipple_factor) & 810 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 811 /* XXX this might need to be scaled up */ 812 rs->line_stipple_value = state->line_stipple_pattern; 813 } 814 815 if (state->flatshade) { 816 rs->color_control = R300_SHADE_MODEL_FLAT; 817 } else { 818 rs->color_control = R300_SHADE_MODEL_SMOOTH; 819 } 820 821 rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF; 822 823 /* XXX Disable point sprites until we know what's wrong with them. */ 824 rs->rs.sprite_coord_enable = 0; 825 826 /* Point sprites */ 827 if (rs->rs.sprite_coord_enable) { 828 rs->stuffing_enable = R300_GB_POINT_STUFF_ENABLE; 829 for (i = 0; i < 8; i++) { 830 if (state->sprite_coord_enable & (1 << i)) 831 rs->stuffing_enable |= 832 R300_GB_TEX_STR << (R300_GB_TEX0_SOURCE_SHIFT + (i*2)); 833 } 834 835 rs->point_texcoord_left = 0.0f; 836 rs->point_texcoord_right = 1.0f; 837 838 switch (state->sprite_coord_mode) { 839 case PIPE_SPRITE_COORD_UPPER_LEFT: 840 rs->point_texcoord_top = 0.0f; 841 rs->point_texcoord_bottom = 1.0f; 842 break; 843 case PIPE_SPRITE_COORD_LOWER_LEFT: 844 rs->point_texcoord_top = 1.0f; 845 rs->point_texcoord_bottom = 0.0f; 846 break; 847 } 848 } 849 850 return (void*)rs; 851} 852 853/* Bind rasterizer state. */ 854static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 855{ 856 struct r300_context* r300 = r300_context(pipe); 857 struct r300_rs_state* rs = (struct r300_rs_state*)state; 858 int last_sprite_coord_enable = r300->sprite_coord_enable; 859 860 if (r300->draw) { 861 draw_flush(r300->draw); 862 draw_set_rasterizer_state(r300->draw, &rs->rs, state); 863 } 864 865 if (rs) { 866 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw; 867 r300->sprite_coord_enable = rs->rs.sprite_coord_enable; 868 } else { 869 r300->polygon_offset_enabled = FALSE; 870 r300->sprite_coord_enable = 0; 871 } 872 873 UPDATE_STATE(state, r300->rs_state); 874 r300->rs_state.size = 26 + (r300->polygon_offset_enabled ? 5 : 0); 875 876 if (last_sprite_coord_enable != r300->sprite_coord_enable) { 877 r300->rs_block_state.dirty = TRUE; 878 } 879} 880 881/* Free rasterizer state. */ 882static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 883{ 884 FREE(state); 885} 886 887static void* 888 r300_create_sampler_state(struct pipe_context* pipe, 889 const struct pipe_sampler_state* state) 890{ 891 struct r300_context* r300 = r300_context(pipe); 892 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 893 boolean is_r500 = r300->screen->caps.is_r500; 894 int lod_bias; 895 union util_color uc; 896 897 sampler->state = *state; 898 899 sampler->filter0 |= 900 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 901 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 902 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 903 904 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 905 state->mag_img_filter, 906 state->min_mip_filter, 907 state->max_anisotropy > 0); 908 909 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 910 911 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 912 /* We must pass these to the merge function to clamp them properly. */ 913 sampler->min_lod = MAX2((unsigned)state->min_lod, 0); 914 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0); 915 916 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); 917 918 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 919 920 /* This is very high quality anisotropic filtering for R5xx. 921 * It's good for benchmarking the performance of texturing but 922 * in practice we don't want to slow down the driver because it's 923 * a pretty good performance killer. Feel free to play with it. */ 924 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 925 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 926 } 927 928 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 929 sampler->border_color = uc.ui; 930 931 /* R500-specific fixups and optimizations */ 932 if (r300->screen->caps.is_r500) { 933 sampler->filter1 |= R500_BORDER_FIX; 934 } 935 936 return (void*)sampler; 937} 938 939static void r300_bind_sampler_states(struct pipe_context* pipe, 940 unsigned count, 941 void** states) 942{ 943 struct r300_context* r300 = r300_context(pipe); 944 struct r300_textures_state* state = 945 (struct r300_textures_state*)r300->textures_state.state; 946 unsigned tex_units = r300->screen->caps.num_tex_units; 947 948 if (count > tex_units) { 949 return; 950 } 951 952 memcpy(state->sampler_states, states, sizeof(void*) * count); 953 state->sampler_state_count = count; 954 955 r300->textures_state.dirty = TRUE; 956} 957 958static void r300_lacks_vertex_textures(struct pipe_context* pipe, 959 unsigned count, 960 void** states) 961{ 962} 963 964static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 965{ 966 FREE(state); 967} 968 969static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 970 unsigned count, 971 struct pipe_sampler_view** views) 972{ 973 struct r300_context* r300 = r300_context(pipe); 974 struct r300_textures_state* state = 975 (struct r300_textures_state*)r300->textures_state.state; 976 struct r300_texture *texture; 977 unsigned i; 978 unsigned tex_units = r300->screen->caps.num_tex_units; 979 boolean dirty_tex = FALSE; 980 981 if (count > tex_units) { 982 return; 983 } 984 985 for (i = 0; i < count; i++) { 986 if (&state->sampler_views[i]->base != views[i]) { 987 pipe_sampler_view_reference( 988 (struct pipe_sampler_view**)&state->sampler_views[i], 989 views[i]); 990 991 if (!views[i]) { 992 continue; 993 } 994 995 /* A new sampler view (= texture)... */ 996 dirty_tex = TRUE; 997 998 /* Set the texrect factor in the fragment shader. 999 * Needed for RECT and NPOT fallback. */ 1000 texture = r300_texture(views[i]->texture); 1001 if (texture->uses_pitch) { 1002 r300->fs_rc_constant_state.dirty = TRUE; 1003 } 1004 } 1005 } 1006 1007 for (i = count; i < tex_units; i++) { 1008 if (state->sampler_views[i]) { 1009 pipe_sampler_view_reference( 1010 (struct pipe_sampler_view**)&state->sampler_views[i], 1011 NULL); 1012 } 1013 } 1014 1015 state->sampler_view_count = count; 1016 1017 r300->textures_state.dirty = TRUE; 1018 1019 if (dirty_tex) { 1020 r300->texture_cache_inval.dirty = TRUE; 1021 } 1022} 1023 1024static struct pipe_sampler_view * 1025r300_create_sampler_view(struct pipe_context *pipe, 1026 struct pipe_resource *texture, 1027 const struct pipe_sampler_view *templ) 1028{ 1029 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view); 1030 struct r300_texture *tex = r300_texture(texture); 1031 unsigned char swizzle[4]; 1032 1033 if (view) { 1034 view->base = *templ; 1035 view->base.reference.count = 1; 1036 view->base.context = pipe; 1037 view->base.texture = NULL; 1038 pipe_resource_reference(&view->base.texture, texture); 1039 1040 swizzle[0] = templ->swizzle_r; 1041 swizzle[1] = templ->swizzle_g; 1042 swizzle[2] = templ->swizzle_b; 1043 swizzle[3] = templ->swizzle_a; 1044 1045 view->format = tex->tx_format; 1046 view->format.format1 |= r300_translate_texformat(templ->format, 1047 swizzle); 1048 if (r300_screen(pipe->screen)->caps.is_r500) { 1049 view->format.format2 |= r500_tx_format_msb_bit(templ->format); 1050 } 1051 } 1052 1053 return (struct pipe_sampler_view*)view; 1054} 1055 1056static void 1057r300_sampler_view_destroy(struct pipe_context *pipe, 1058 struct pipe_sampler_view *view) 1059{ 1060 pipe_resource_reference(&view->texture, NULL); 1061 FREE(view); 1062} 1063 1064static void r300_set_scissor_state(struct pipe_context* pipe, 1065 const struct pipe_scissor_state* state) 1066{ 1067 struct r300_context* r300 = r300_context(pipe); 1068 1069 memcpy(r300->scissor_state.state, state, 1070 sizeof(struct pipe_scissor_state)); 1071 1072 r300->scissor_state.dirty = TRUE; 1073} 1074 1075static void r300_set_viewport_state(struct pipe_context* pipe, 1076 const struct pipe_viewport_state* state) 1077{ 1078 struct r300_context* r300 = r300_context(pipe); 1079 struct r300_viewport_state* viewport = 1080 (struct r300_viewport_state*)r300->viewport_state.state; 1081 1082 r300->viewport = *state; 1083 1084 /* Do the transform in HW. */ 1085 viewport->vte_control = R300_VTX_W0_FMT; 1086 1087 if (state->scale[0] != 1.0f) { 1088 viewport->xscale = state->scale[0]; 1089 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1090 } 1091 if (state->scale[1] != 1.0f) { 1092 viewport->yscale = state->scale[1]; 1093 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1094 } 1095 if (state->scale[2] != 1.0f) { 1096 viewport->zscale = state->scale[2]; 1097 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1098 } 1099 if (state->translate[0] != 0.0f) { 1100 viewport->xoffset = state->translate[0]; 1101 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1102 } 1103 if (state->translate[1] != 0.0f) { 1104 viewport->yoffset = state->translate[1]; 1105 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1106 } 1107 if (state->translate[2] != 0.0f) { 1108 viewport->zoffset = state->translate[2]; 1109 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1110 } 1111 1112 r300->viewport_state.dirty = TRUE; 1113 if (r300->fs.state && r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) { 1114 r300->fs_rc_constant_state.dirty = TRUE; 1115 } 1116} 1117 1118static void r300_set_vertex_buffers(struct pipe_context* pipe, 1119 unsigned count, 1120 const struct pipe_vertex_buffer* buffers) 1121{ 1122 struct r300_context* r300 = r300_context(pipe); 1123 struct pipe_vertex_buffer *vbo; 1124 unsigned i, max_index = (1 << 24) - 1; 1125 boolean any_user_buffer = FALSE; 1126 1127 if (count == r300->vertex_buffer_count && 1128 memcmp(r300->vertex_buffer, buffers, 1129 sizeof(struct pipe_vertex_buffer) * count) == 0) { 1130 return; 1131 } 1132 1133 /* Check if the stride is aligned to the size of DWORD. */ 1134 for (i = 0; i < count; i++) { 1135 if (buffers[i].buffer) { 1136 if (buffers[i].stride % 4 != 0) { 1137 // XXX Shouldn't we align the buffer? 1138 fprintf(stderr, "r300: set_vertex_buffers: " 1139 "Unaligned buffer stride %i isn't supported.\n", 1140 buffers[i].stride); 1141 abort(); 1142 } 1143 } 1144 } 1145 1146 for (i = 0; i < count; i++) { 1147 /* Why, yes, I AM casting away constness. How did you know? */ 1148 vbo = (struct pipe_vertex_buffer*)&buffers[i]; 1149 1150 /* Reference our buffer. */ 1151 pipe_resource_reference(&r300->vertex_buffer[i].buffer, vbo->buffer); 1152 1153 /* Skip NULL buffers */ 1154 if (!buffers[i].buffer) { 1155 continue; 1156 } 1157 1158 if (r300_buffer_is_user_buffer(vbo->buffer)) { 1159 any_user_buffer = TRUE; 1160 } 1161 1162 if (vbo->max_index == ~0) { 1163 /* if no VBO stride then only one vertex value so max index is 1 */ 1164 /* should think about converting to VS constants like svga does */ 1165 if (!vbo->stride) 1166 vbo->max_index = 1; 1167 else 1168 vbo->max_index = 1169 (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride; 1170 } 1171 1172 max_index = MIN2(vbo->max_index, max_index); 1173 } 1174 1175 for (; i < r300->vertex_buffer_count; i++) { 1176 /* Dereference any old buffers. */ 1177 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL); 1178 } 1179 1180 memcpy(r300->vertex_buffer, buffers, 1181 sizeof(struct pipe_vertex_buffer) * count); 1182 1183 r300->vertex_buffer_count = count; 1184 r300->vertex_buffer_max_index = max_index; 1185 r300->any_user_vbs = any_user_buffer; 1186 1187 if (r300->draw) { 1188 draw_flush(r300->draw); 1189 draw_set_vertex_buffers(r300->draw, count, buffers); 1190 } 1191} 1192 1193/* Update the PSC tables. */ 1194static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1195{ 1196 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1197 uint16_t type, swizzle; 1198 enum pipe_format format; 1199 unsigned i; 1200 1201 if (velems->count > 16) { 1202 fprintf(stderr, "r300: More than 16 vertex elements are not supported," 1203 " requested %i, using 16.\n", velems->count); 1204 velems->count = 16; 1205 } 1206 1207 /* Vertex shaders have no semantics on their inputs, 1208 * so PSC should just route stuff based on the vertex elements, 1209 * and not on attrib information. */ 1210 for (i = 0; i < velems->count; i++) { 1211 format = velems->velem[i].src_format; 1212 1213 type = r300_translate_vertex_data_type(format) | 1214 (i << R300_DST_VEC_LOC_SHIFT); 1215 swizzle = r300_translate_vertex_data_swizzle(format); 1216 1217 if (i & 1) { 1218 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1219 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1220 } else { 1221 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1222 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1223 } 1224 } 1225 1226 /* Set the last vector in the PSC. */ 1227 if (i) { 1228 i -= 1; 1229 } 1230 vstream->vap_prog_stream_cntl[i >> 1] |= 1231 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1232 1233 vstream->count = (i >> 1) + 1; 1234} 1235 1236static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1237 unsigned count, 1238 const struct pipe_vertex_element* attribs) 1239{ 1240 struct r300_vertex_element_state *velems; 1241 unsigned i, size; 1242 enum pipe_format *format; 1243 1244 assert(count <= PIPE_MAX_ATTRIBS); 1245 velems = CALLOC_STRUCT(r300_vertex_element_state); 1246 if (velems != NULL) { 1247 velems->count = count; 1248 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1249 1250 if (r300_screen(pipe->screen)->caps.has_tcl) { 1251 r300_vertex_psc(velems); 1252 1253 /* Check if the format is aligned to the size of DWORD. 1254 * We only care about the blocksizes of the formats since 1255 * swizzles are already set up. */ 1256 for (i = 0; i < count; i++) { 1257 format = &velems->velem[i].src_format; 1258 1259 /* Replace some formats with their aligned counterparts, 1260 * this is OK because we check for aligned strides too. */ 1261 switch (*format) { 1262 /* Align to RGBA8. */ 1263 case PIPE_FORMAT_R8_UNORM: 1264 case PIPE_FORMAT_R8G8_UNORM: 1265 case PIPE_FORMAT_R8G8B8_UNORM: 1266 *format = PIPE_FORMAT_R8G8B8A8_UNORM; 1267 continue; 1268 case PIPE_FORMAT_R8_SNORM: 1269 case PIPE_FORMAT_R8G8_SNORM: 1270 case PIPE_FORMAT_R8G8B8_SNORM: 1271 *format = PIPE_FORMAT_R8G8B8A8_SNORM; 1272 continue; 1273 case PIPE_FORMAT_R8_USCALED: 1274 case PIPE_FORMAT_R8G8_USCALED: 1275 case PIPE_FORMAT_R8G8B8_USCALED: 1276 *format = PIPE_FORMAT_R8G8B8A8_USCALED; 1277 continue; 1278 case PIPE_FORMAT_R8_SSCALED: 1279 case PIPE_FORMAT_R8G8_SSCALED: 1280 case PIPE_FORMAT_R8G8B8_SSCALED: 1281 *format = PIPE_FORMAT_R8G8B8A8_SSCALED; 1282 continue; 1283 1284 /* Align to RG16. */ 1285 case PIPE_FORMAT_R16_UNORM: 1286 *format = PIPE_FORMAT_R16G16_UNORM; 1287 continue; 1288 case PIPE_FORMAT_R16_SNORM: 1289 *format = PIPE_FORMAT_R16G16_SNORM; 1290 continue; 1291 case PIPE_FORMAT_R16_USCALED: 1292 *format = PIPE_FORMAT_R16G16_USCALED; 1293 continue; 1294 case PIPE_FORMAT_R16_SSCALED: 1295 *format = PIPE_FORMAT_R16G16_SSCALED; 1296 continue; 1297 case PIPE_FORMAT_R16_FLOAT: 1298 *format = PIPE_FORMAT_R16G16_FLOAT; 1299 continue; 1300 1301 /* Align to RGBA16. */ 1302 case PIPE_FORMAT_R16G16B16_UNORM: 1303 *format = PIPE_FORMAT_R16G16B16A16_UNORM; 1304 continue; 1305 case PIPE_FORMAT_R16G16B16_SNORM: 1306 *format = PIPE_FORMAT_R16G16B16A16_SNORM; 1307 continue; 1308 case PIPE_FORMAT_R16G16B16_USCALED: 1309 *format = PIPE_FORMAT_R16G16B16A16_USCALED; 1310 continue; 1311 case PIPE_FORMAT_R16G16B16_SSCALED: 1312 *format = PIPE_FORMAT_R16G16B16A16_SSCALED; 1313 continue; 1314 case PIPE_FORMAT_R16G16B16_FLOAT: 1315 *format = PIPE_FORMAT_R16G16B16A16_FLOAT; 1316 continue; 1317 1318 default:; 1319 } 1320 1321 size = util_format_get_blocksize(*format); 1322 1323 if (size % 4 != 0) { 1324 /* XXX Shouldn't we align the format? */ 1325 fprintf(stderr, "r300_create_vertex_elements_state: " 1326 "Unaligned format %s:%i isn't supported\n", 1327 util_format_name(*format), size); 1328 assert(0); 1329 abort(); 1330 } 1331 } 1332 1333 } 1334 } 1335 return velems; 1336} 1337 1338static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1339 void *state) 1340{ 1341 struct r300_context *r300 = r300_context(pipe); 1342 struct r300_vertex_element_state *velems = state; 1343 1344 if (velems == NULL) { 1345 return; 1346 } 1347 1348 r300->velems = velems; 1349 1350 if (r300->draw) { 1351 draw_flush(r300->draw); 1352 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1353 } 1354 1355 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1356 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1357} 1358 1359static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1360{ 1361 FREE(state); 1362} 1363 1364static void* r300_create_vs_state(struct pipe_context* pipe, 1365 const struct pipe_shader_state* shader) 1366{ 1367 struct r300_context* r300 = r300_context(pipe); 1368 1369 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1370 1371 /* Copy state directly into shader. */ 1372 vs->state = *shader; 1373 vs->state.tokens = tgsi_dup_tokens(shader->tokens); 1374 1375 if (r300->screen->caps.has_tcl) { 1376 r300_translate_vertex_shader(r300, vs, vs->state.tokens); 1377 } else { 1378 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader); 1379 } 1380 1381 return vs; 1382} 1383 1384static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1385{ 1386 struct r300_context* r300 = r300_context(pipe); 1387 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1388 1389 if (vs == NULL) { 1390 r300->vs_state.state = NULL; 1391 return; 1392 } 1393 if (vs == r300->vs_state.state) { 1394 return; 1395 } 1396 r300->vs_state.state = vs; 1397 1398 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block 1399 if (r300->fs.state) { 1400 r300_vertex_shader_setup_wpos(r300); 1401 } 1402 memcpy(r300->vap_output_state.state, &vs->vap_out, 1403 sizeof(struct r300_vap_output_state)); 1404 r300->vap_output_state.dirty = TRUE; 1405 1406 /* The majority of the RS block bits is dependent on the vertex shader. */ 1407 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 1408 1409 if (r300->screen->caps.has_tcl) { 1410 r300->vs_state.dirty = TRUE; 1411 r300->vs_state.size = 1412 vs->code.length + 9 + 1413 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0); 1414 1415 if (vs->externals_count) { 1416 r300->vs_constants.dirty = TRUE; 1417 r300->vs_constants.size = vs->externals_count * 4 + 3; 1418 } else { 1419 r300->vs_constants.size = 0; 1420 } 1421 1422 r300->pvs_flush.dirty = TRUE; 1423 } else { 1424 draw_flush(r300->draw); 1425 draw_bind_vertex_shader(r300->draw, 1426 (struct draw_vertex_shader*)vs->draw_vs); 1427 } 1428} 1429 1430static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1431{ 1432 struct r300_context* r300 = r300_context(pipe); 1433 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1434 1435 if (r300->screen->caps.has_tcl) { 1436 rc_constants_destroy(&vs->code.constants); 1437 } else { 1438 draw_delete_vertex_shader(r300->draw, 1439 (struct draw_vertex_shader*)vs->draw_vs); 1440 } 1441 1442 FREE((void*)vs->state.tokens); 1443 FREE(shader); 1444} 1445 1446static void r300_set_constant_buffer(struct pipe_context *pipe, 1447 uint shader, uint index, 1448 struct pipe_resource *buf) 1449{ 1450 struct r300_context* r300 = r300_context(pipe); 1451 struct r300_constant_buffer *cbuf; 1452 struct pipe_transfer *tr; 1453 void *mapped; 1454 int max_size = 0; 1455 1456 switch (shader) { 1457 case PIPE_SHADER_VERTEX: 1458 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state; 1459 max_size = 256; 1460 break; 1461 case PIPE_SHADER_FRAGMENT: 1462 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state; 1463 if (r300->screen->caps.is_r500) { 1464 max_size = 256; 1465 } else { 1466 max_size = 32; 1467 } 1468 break; 1469 default: 1470 assert(0); 1471 return; 1472 } 1473 1474 if (buf == NULL || buf->width0 == 0 || 1475 (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL) 1476 { 1477 cbuf->count = 0; 1478 return; 1479 } 1480 1481 assert((buf->width0 % 4 * sizeof(float)) == 0); 1482 1483 /* Check the size of the constant buffer. */ 1484 /* XXX Subtract immediates and RC_STATE_* variables. */ 1485 if (buf->width0 > (sizeof(float) * 4 * max_size)) { 1486 fprintf(stderr, "r300: Max size of the constant buffer is " 1487 "%i*4 floats.\n", max_size); 1488 abort(); 1489 } 1490 1491 memcpy(cbuf->constants, mapped, buf->width0); 1492 cbuf->count = buf->width0 / (4 * sizeof(float)); 1493 pipe_buffer_unmap(pipe, buf, tr); 1494 1495 if (shader == PIPE_SHADER_VERTEX) { 1496 if (r300->screen->caps.has_tcl) { 1497 if (r300->vs_constants.size) { 1498 r300->vs_constants.dirty = TRUE; 1499 } 1500 r300->pvs_flush.dirty = TRUE; 1501 } else if (r300->draw) { 1502 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX, 1503 0, cbuf->constants, 1504 buf->width0); 1505 } 1506 } else if (shader == PIPE_SHADER_FRAGMENT) { 1507 r300->fs_constants.dirty = TRUE; 1508 } 1509} 1510 1511void r300_init_state_functions(struct r300_context* r300) 1512{ 1513 r300->context.create_blend_state = r300_create_blend_state; 1514 r300->context.bind_blend_state = r300_bind_blend_state; 1515 r300->context.delete_blend_state = r300_delete_blend_state; 1516 1517 r300->context.set_blend_color = r300_set_blend_color; 1518 1519 r300->context.set_clip_state = r300_set_clip_state; 1520 1521 r300->context.set_constant_buffer = r300_set_constant_buffer; 1522 1523 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1524 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1525 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1526 1527 r300->context.set_stencil_ref = r300_set_stencil_ref; 1528 1529 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1530 1531 r300->context.create_fs_state = r300_create_fs_state; 1532 r300->context.bind_fs_state = r300_bind_fs_state; 1533 r300->context.delete_fs_state = r300_delete_fs_state; 1534 1535 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1536 1537 r300->context.create_rasterizer_state = r300_create_rs_state; 1538 r300->context.bind_rasterizer_state = r300_bind_rs_state; 1539 r300->context.delete_rasterizer_state = r300_delete_rs_state; 1540 1541 r300->context.create_sampler_state = r300_create_sampler_state; 1542 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 1543 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 1544 r300->context.delete_sampler_state = r300_delete_sampler_state; 1545 1546 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 1547 r300->context.create_sampler_view = r300_create_sampler_view; 1548 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 1549 1550 r300->context.set_scissor_state = r300_set_scissor_state; 1551 1552 r300->context.set_viewport_state = r300_set_viewport_state; 1553 1554 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 1555 1556 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 1557 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 1558 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 1559 1560 r300->context.create_vs_state = r300_create_vs_state; 1561 r300->context.bind_vs_state = r300_bind_vs_state; 1562 r300->context.delete_vs_state = r300_delete_vs_state; 1563} 1564