r300_state.c revision 6a448a525baf81173f92ee8c3074b98baa54397b
1/*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23#include "draw/draw_context.h"
24
25#include "util/u_debug.h"
26#include "util/u_math.h"
27#include "util/u_memory.h"
28#include "util/u_pack_color.h"
29
30#include "tgsi/tgsi_parse.h"
31
32#include "pipe/p_config.h"
33#include "pipe/internal/p_winsys_screen.h"
34
35#include "r300_context.h"
36#include "r300_reg.h"
37#include "r300_screen.h"
38#include "r300_state_inlines.h"
39#include "r300_fs.h"
40#include "r300_vs.h"
41
42/* r300_state: Functions used to intialize state context by translating
43 * Gallium state objects into semi-native r300 state objects. */
44
45/* Create a new blend state based on the CSO blend state.
46 *
47 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
48static void* r300_create_blend_state(struct pipe_context* pipe,
49                                     const struct pipe_blend_state* state)
50{
51    struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
52
53    {
54	unsigned eqRGB = state->rgb_func;
55	unsigned srcRGB = state->rgb_src_factor;
56	unsigned dstRGB = state->rgb_dst_factor;
57
58	unsigned eqA = state->alpha_func;
59	unsigned srcA = state->alpha_src_factor;
60	unsigned dstA = state->alpha_dst_factor;
61
62	if (srcA != srcRGB ||
63	    dstA != dstRGB ||
64	    eqA != eqRGB) {
65	    blend->alpha_blend_control =
66		r300_translate_blend_function(eqA) |
67		(r300_translate_blend_factor(srcA) <<
68                    R300_SRC_BLEND_SHIFT) |
69                (r300_translate_blend_factor(dstA) <<
70		 R300_DST_BLEND_SHIFT);
71	    blend->blend_control |= R300_ALPHA_BLEND_ENABLE |
72		R300_SEPARATE_ALPHA_ENABLE;
73	} else {
74	    blend->alpha_blend_control = R300_COMB_FCN_ADD_CLAMP |
75		(R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
76		(R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
77	}
78    }
79    if (state->blend_enable) {
80        /* XXX for now, always do separate alpha...
81         * is it faster to do it with one reg? */
82        blend->blend_control |= R300_READ_ENABLE |
83                r300_translate_blend_function(state->rgb_func) |
84                (r300_translate_blend_factor(state->rgb_src_factor) <<
85                    R300_SRC_BLEND_SHIFT) |
86                (r300_translate_blend_factor(state->rgb_dst_factor) <<
87                    R300_DST_BLEND_SHIFT);
88    } else {
89	blend->blend_control =
90	    R300_COMB_FCN_ADD_CLAMP |
91	    (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
92	    (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
93    }
94
95    /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
96    if (state->logicop_enable) {
97        blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
98                (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
99    }
100
101    if (state->dither) {
102        blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
103                R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
104    }
105
106    return (void*)blend;
107}
108
109/* Bind blend state. */
110static void r300_bind_blend_state(struct pipe_context* pipe,
111                                  void* state)
112{
113    struct r300_context* r300 = r300_context(pipe);
114
115    r300->blend_state = (struct r300_blend_state*)state;
116    r300->dirty_state |= R300_NEW_BLEND;
117}
118
119/* Free blend state. */
120static void r300_delete_blend_state(struct pipe_context* pipe,
121                                    void* state)
122{
123    FREE(state);
124}
125
126/* Set blend color.
127 * Setup both R300 and R500 registers, figure out later which one to write. */
128static void r300_set_blend_color(struct pipe_context* pipe,
129                                 const struct pipe_blend_color* color)
130{
131    struct r300_context* r300 = r300_context(pipe);
132    ubyte ur, ug, ub, ua;
133
134    ur = float_to_ubyte(color->color[0]);
135    ug = float_to_ubyte(color->color[1]);
136    ub = float_to_ubyte(color->color[2]);
137    ua = float_to_ubyte(color->color[3]);
138
139    util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM,
140            &r300->blend_color_state->blend_color);
141
142    /* XXX this is wrong */
143    r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16);
144    r300->blend_color_state->blend_color_green_blue = ub | (ug << 16);
145
146    r300->dirty_state |= R300_NEW_BLEND_COLOR;
147}
148
149static void r300_set_clip_state(struct pipe_context* pipe,
150                                const struct pipe_clip_state* state)
151{
152    struct r300_context* r300 = r300_context(pipe);
153
154    if (r300_screen(pipe->screen)->caps->has_tcl) {
155        r300->clip_state = *state;
156        r300->dirty_state |= R300_NEW_CLIP;
157    } else {
158        draw_flush(r300->draw);
159        draw_set_clip_state(r300->draw, state);
160    }
161}
162
163static void
164    r300_set_constant_buffer(struct pipe_context* pipe,
165                             uint shader, uint index,
166                             const struct pipe_constant_buffer* buffer)
167{
168    struct r300_context* r300 = r300_context(pipe);
169
170    /* This entire chunk of code seems ever-so-slightly baked.
171     * It's as if I've got pipe_buffer* matryoshkas... */
172    if (buffer && buffer->buffer && buffer->buffer->size) {
173        void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer,
174                                             PIPE_BUFFER_USAGE_CPU_READ);
175        memcpy(r300->shader_constants[shader].constants,
176            map, buffer->buffer->size);
177        pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer);
178
179        r300->shader_constants[shader].count =
180            buffer->buffer->size / (sizeof(float) * 4);
181    } else {
182        r300->shader_constants[shader].count = 0;
183    }
184
185    r300->dirty_state |= R300_NEW_CONSTANTS;
186}
187
188/* Create a new depth, stencil, and alpha state based on the CSO dsa state.
189 *
190 * This contains the depth buffer, stencil buffer, alpha test, and such.
191 * On the Radeon, depth and stencil buffer setup are intertwined, which is
192 * the reason for some of the strange-looking assignments across registers. */
193static void*
194        r300_create_dsa_state(struct pipe_context* pipe,
195                              const struct pipe_depth_stencil_alpha_state* state)
196{
197    struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
198
199    /* Depth test setup. */
200    if (state->depth.enabled) {
201        dsa->z_buffer_control |= R300_Z_ENABLE;
202
203        if (state->depth.writemask) {
204            dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
205        }
206
207        dsa->z_stencil_control |=
208            (r300_translate_depth_stencil_function(state->depth.func) <<
209                R300_Z_FUNC_SHIFT);
210    }
211
212    /* Stencil buffer setup. */
213    if (state->stencil[0].enabled) {
214        dsa->z_buffer_control |= R300_STENCIL_ENABLE;
215        dsa->z_stencil_control |=
216            (r300_translate_depth_stencil_function(state->stencil[0].func) <<
217                R300_S_FRONT_FUNC_SHIFT) |
218            (r300_translate_stencil_op(state->stencil[0].fail_op) <<
219                R300_S_FRONT_SFAIL_OP_SHIFT) |
220            (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
221                R300_S_FRONT_ZPASS_OP_SHIFT) |
222            (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
223                R300_S_FRONT_ZFAIL_OP_SHIFT);
224
225        dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
226                (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
227                (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
228
229        if (state->stencil[1].enabled) {
230            dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
231            dsa->z_stencil_control |=
232            (r300_translate_depth_stencil_function(state->stencil[1].func) <<
233                R300_S_BACK_FUNC_SHIFT) |
234            (r300_translate_stencil_op(state->stencil[1].fail_op) <<
235                R300_S_BACK_SFAIL_OP_SHIFT) |
236            (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
237                R300_S_BACK_ZPASS_OP_SHIFT) |
238            (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
239                R300_S_BACK_ZFAIL_OP_SHIFT);
240
241            dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
242                (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
243                (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
244        }
245    }
246
247    /* Alpha test setup. */
248    if (state->alpha.enabled) {
249        dsa->alpha_function =
250            r300_translate_alpha_function(state->alpha.func) |
251            R300_FG_ALPHA_FUNC_ENABLE;
252        dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f,
253                                     0, 1023);
254    }
255
256    return (void*)dsa;
257}
258
259/* Bind DSA state. */
260static void r300_bind_dsa_state(struct pipe_context* pipe,
261                                void* state)
262{
263    struct r300_context* r300 = r300_context(pipe);
264
265    r300->dsa_state = (struct r300_dsa_state*)state;
266    r300->dirty_state |= R300_NEW_DSA;
267}
268
269/* Free DSA state. */
270static void r300_delete_dsa_state(struct pipe_context* pipe,
271                                  void* state)
272{
273    FREE(state);
274}
275
276static void r300_set_edgeflags(struct pipe_context* pipe,
277                               const unsigned* bitfield)
278{
279    /* XXX you know it's bad when i915 has this blank too */
280    /* XXX and even worse, I have no idea WTF the bitfield is */
281}
282
283static void
284    r300_set_framebuffer_state(struct pipe_context* pipe,
285                               const struct pipe_framebuffer_state* state)
286{
287    struct r300_context* r300 = r300_context(pipe);
288
289    draw_flush(r300->draw);
290
291    r300->framebuffer_state = *state;
292
293    r300->dirty_state |= R300_NEW_FRAMEBUFFERS;
294}
295
296/* Create fragment shader state. */
297static void* r300_create_fs_state(struct pipe_context* pipe,
298                                  const struct pipe_shader_state* shader)
299{
300    struct r300_fragment_shader* fs = NULL;
301
302    fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
303
304    /* Copy state directly into shader. */
305    fs->state = *shader;
306    fs->state.tokens = tgsi_dup_tokens(shader->tokens);
307
308    tgsi_scan_shader(shader->tokens, &fs->info);
309
310    return (void*)fs;
311}
312
313/* Bind fragment shader state. */
314static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
315{
316    struct r300_context* r300 = r300_context(pipe);
317    struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
318
319    if (fs == NULL) {
320        r300->fs = NULL;
321        return;
322    } else if (!fs->translated) {
323        r300_translate_fragment_shader(r300, fs);
324    }
325
326    r300->fs = fs;
327
328    r300->dirty_state |= R300_NEW_FRAGMENT_SHADER;
329}
330
331/* Delete fragment shader state. */
332static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
333{
334    struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
335    rc_constants_destroy(&fs->code.constants);
336    FREE((void*)fs->state.tokens);
337    FREE(shader);
338}
339
340static void r300_set_polygon_stipple(struct pipe_context* pipe,
341                                     const struct pipe_poly_stipple* state)
342{
343    /* XXX no idea how to set this up, but not terribly important */
344}
345
346/* Create a new rasterizer state based on the CSO rasterizer state.
347 *
348 * This is a very large chunk of state, and covers most of the graphics
349 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
350 *
351 * In a not entirely unironic sidenote, this state has nearly nothing to do
352 * with the actual block on the Radeon called the rasterizer (RS). */
353static void* r300_create_rs_state(struct pipe_context* pipe,
354                                  const struct pipe_rasterizer_state* state)
355{
356    struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
357
358    /* Copy rasterizer state for Draw. */
359    rs->rs = *state;
360
361    rs->enable_vte = !state->bypass_vs_clip_and_viewport;
362
363#ifdef PIPE_ARCH_LITTLE_ENDIAN
364    rs->vap_control_status = R300_VC_NO_SWAP;
365#else
366    rs->vap_control_status = R300_VC_32BIT_SWAP;
367#endif
368
369    /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
370     * Else, enable HW TCL and force Draw's TCL off. */
371    if (state->bypass_vs_clip_and_viewport ||
372            !r300_screen(pipe->screen)->caps->has_tcl) {
373        rs->vap_control_status |= R300_VAP_TCL_BYPASS;
374    } else {
375        rs->rs.bypass_vs_clip_and_viewport = TRUE;
376    }
377
378    rs->point_size = pack_float_16_6x(state->point_size) |
379        (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
380
381    rs->point_minmax =
382        ((int)(state->point_size_min * 6.0) <<
383         R300_GA_POINT_MINMAX_MIN_SHIFT) |
384        ((int)(state->point_size_max * 6.0) <<
385         R300_GA_POINT_MINMAX_MAX_SHIFT);
386
387    rs->line_control = pack_float_16_6x(state->line_width) |
388        R300_GA_LINE_CNTL_END_TYPE_COMP;
389
390    /* Radeons don't think in "CW/CCW", they think in "front/back". */
391    if (state->front_winding == PIPE_WINDING_CW) {
392        rs->cull_mode = R300_FRONT_FACE_CW;
393
394        if (state->offset_cw) {
395            rs->polygon_offset_enable |= R300_FRONT_ENABLE;
396        }
397        if (state->offset_ccw) {
398            rs->polygon_offset_enable |= R300_BACK_ENABLE;
399        }
400    } else {
401        rs->cull_mode = R300_FRONT_FACE_CCW;
402
403        if (state->offset_ccw) {
404            rs->polygon_offset_enable |= R300_FRONT_ENABLE;
405        }
406        if (state->offset_cw) {
407            rs->polygon_offset_enable |= R300_BACK_ENABLE;
408        }
409    }
410    if (state->front_winding & state->cull_mode) {
411        rs->cull_mode |= R300_CULL_FRONT;
412    }
413    if (~(state->front_winding) & state->cull_mode) {
414        rs->cull_mode |= R300_CULL_BACK;
415    }
416
417    if (rs->polygon_offset_enable) {
418        rs->depth_offset_front = rs->depth_offset_back =
419            fui(state->offset_units);
420        rs->depth_scale_front = rs->depth_scale_back =
421            fui(state->offset_scale);
422    }
423
424    if (state->line_stipple_enable) {
425        rs->line_stipple_config =
426            R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
427            (fui((float)state->line_stipple_factor) &
428                R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
429        /* XXX this might need to be scaled up */
430        rs->line_stipple_value = state->line_stipple_pattern;
431    }
432
433    if (state->flatshade) {
434        rs->color_control = R300_SHADE_MODEL_FLAT;
435    } else {
436        rs->color_control = R300_SHADE_MODEL_SMOOTH;
437    }
438
439    if (!state->flatshade_first) {
440        rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
441    }
442
443    return (void*)rs;
444}
445
446/* Bind rasterizer state. */
447static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
448{
449    struct r300_context* r300 = r300_context(pipe);
450    struct r300_rs_state* rs = (struct r300_rs_state*)state;
451
452    draw_flush(r300->draw);
453    draw_set_rasterizer_state(r300->draw, &rs->rs);
454
455    r300->rs_state = rs;
456    r300->dirty_state |= R300_NEW_RASTERIZER;
457    r300->dirty_state |= R300_NEW_RS_BLOCK;
458    r300->dirty_state |= R300_NEW_SCISSOR;
459    r300->dirty_state |= R300_NEW_VIEWPORT;
460}
461
462/* Free rasterizer state. */
463static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
464{
465    FREE(state);
466}
467
468static void*
469        r300_create_sampler_state(struct pipe_context* pipe,
470                                  const struct pipe_sampler_state* state)
471{
472    struct r300_context* r300 = r300_context(pipe);
473    struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
474    int lod_bias;
475
476    sampler->filter0 |=
477        (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
478        (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
479        (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
480
481    sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
482                                                   state->mag_img_filter,
483                                                   state->min_mip_filter);
484
485    lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
486
487    sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
488
489    sampler->filter1 |= r300_anisotropy(state->max_anisotropy);
490
491    util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
492                    &sampler->border_color);
493
494    /* R500-specific fixups and optimizations */
495    if (r300_screen(r300->context.screen)->caps->is_r500) {
496        sampler->filter1 |= R500_BORDER_FIX;
497    }
498
499    return (void*)sampler;
500}
501
502static void r300_bind_sampler_states(struct pipe_context* pipe,
503                                     unsigned count,
504                                     void** states)
505{
506    struct r300_context* r300 = r300_context(pipe);
507    int i;
508
509    if (count > 8) {
510        return;
511    }
512
513    for (i = 0; i < count; i++) {
514        if (r300->sampler_states[i] != states[i]) {
515            r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
516            r300->dirty_state |= (R300_NEW_SAMPLER << i);
517        }
518    }
519
520    r300->sampler_count = count;
521}
522
523static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
524{
525    FREE(state);
526}
527
528static void r300_set_sampler_textures(struct pipe_context* pipe,
529                                      unsigned count,
530                                      struct pipe_texture** texture)
531{
532    struct r300_context* r300 = r300_context(pipe);
533    int i;
534
535    /* XXX magic num */
536    if (count > 8) {
537        return;
538    }
539
540    for (i = 0; i < count; i++) {
541        if (r300->textures[i] != (struct r300_texture*)texture[i]) {
542            pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
543                texture[i]);
544            r300->dirty_state |= (R300_NEW_TEXTURE << i);
545        }
546    }
547
548    for (i = count; i < 8; i++) {
549        if (r300->textures[i]) {
550            pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
551                NULL);
552            r300->dirty_state |= (R300_NEW_TEXTURE << i);
553        }
554    }
555
556    r300->texture_count = count;
557}
558
559static void r300_set_scissor_state(struct pipe_context* pipe,
560                                   const struct pipe_scissor_state* state)
561{
562    struct r300_context* r300 = r300_context(pipe);
563
564    if (r300_screen(r300->context.screen)->caps->is_r500) {
565        r300->scissor_state->scissor_top_left =
566            (state->minx << R300_SCISSORS_X_SHIFT) |
567            (state->miny << R300_SCISSORS_Y_SHIFT);
568        r300->scissor_state->scissor_bottom_right =
569            ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) |
570            ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT);
571    } else {
572        /* Offset of 1440 in non-R500 chipsets. */
573        r300->scissor_state->scissor_top_left =
574            ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) |
575            ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT);
576        r300->scissor_state->scissor_bottom_right =
577            (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) |
578            (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT);
579    }
580
581    r300->dirty_state |= R300_NEW_SCISSOR;
582}
583
584static void r300_set_viewport_state(struct pipe_context* pipe,
585                                    const struct pipe_viewport_state* state)
586{
587    struct r300_context* r300 = r300_context(pipe);
588
589    /* Do the transform in HW. */
590    r300->viewport_state->vte_control = R300_VTX_W0_FMT;
591
592    if (state->scale[0] != 1.0f) {
593        assert(state->scale[0] != 0.0f);
594        r300->viewport_state->xscale = state->scale[0];
595        r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA;
596    }
597    if (state->scale[1] != 1.0f) {
598        assert(state->scale[1] != 0.0f);
599        r300->viewport_state->yscale = state->scale[1];
600        r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA;
601    }
602    if (state->scale[2] != 1.0f) {
603        assert(state->scale[2] != 0.0f);
604        r300->viewport_state->zscale = state->scale[2];
605        r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA;
606    }
607    if (state->translate[0] != 0.0f) {
608        r300->viewport_state->xoffset = state->translate[0];
609        r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA;
610    }
611    if (state->translate[1] != 0.0f) {
612        r300->viewport_state->yoffset = state->translate[1];
613        r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA;
614    }
615    if (state->translate[2] != 0.0f) {
616        r300->viewport_state->zoffset = state->translate[2];
617        r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA;
618    }
619
620    r300->dirty_state |= R300_NEW_VIEWPORT;
621}
622
623static void r300_set_vertex_buffers(struct pipe_context* pipe,
624                                    unsigned count,
625                                    const struct pipe_vertex_buffer* buffers)
626{
627    struct r300_context* r300 = r300_context(pipe);
628
629    memcpy(r300->vertex_buffers, buffers,
630        sizeof(struct pipe_vertex_buffer) * count);
631
632    r300->vertex_buffer_count = count;
633
634    draw_flush(r300->draw);
635    draw_set_vertex_buffers(r300->draw, count, buffers);
636}
637
638static void r300_set_vertex_elements(struct pipe_context* pipe,
639                                    unsigned count,
640                                    const struct pipe_vertex_element* elements)
641{
642    struct r300_context* r300 = r300_context(pipe);
643
644    draw_flush(r300->draw);
645    draw_set_vertex_elements(r300->draw, count, elements);
646}
647
648static void* r300_create_vs_state(struct pipe_context* pipe,
649                                  const struct pipe_shader_state* shader)
650{
651    struct r300_context* r300 = r300_context(pipe);
652
653    if (r300_screen(pipe->screen)->caps->has_tcl) {
654        struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
655        /* Copy state directly into shader. */
656        vs->state = *shader;
657        vs->state.tokens = tgsi_dup_tokens(shader->tokens);
658
659        tgsi_scan_shader(shader->tokens, &vs->info);
660
661        /* Appease Draw. */
662        vs->draw = draw_create_vertex_shader(r300->draw, shader);
663
664        return (void*)vs;
665    } else {
666        return draw_create_vertex_shader(r300->draw, shader);
667    }
668}
669
670static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
671{
672    struct r300_context* r300 = r300_context(pipe);
673
674    draw_flush(r300->draw);
675
676    if (r300_screen(pipe->screen)->caps->has_tcl) {
677        struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
678
679        if (vs == NULL) {
680            r300->vs = NULL;
681            return;
682        } else if (!vs->translated) {
683            r300_translate_vertex_shader(r300, vs);
684        }
685
686        draw_bind_vertex_shader(r300->draw, vs->draw);
687        r300->vs = vs;
688        r300->dirty_state |= R300_NEW_VERTEX_SHADER;
689    } else {
690        draw_bind_vertex_shader(r300->draw,
691                (struct draw_vertex_shader*)shader);
692    }
693}
694
695static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
696{
697    struct r300_context* r300 = r300_context(pipe);
698
699    if (r300_screen(pipe->screen)->caps->has_tcl) {
700        struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
701
702        rc_constants_destroy(&vs->code.constants);
703        draw_delete_vertex_shader(r300->draw, vs->draw);
704        FREE((void*)vs->state.tokens);
705        FREE(shader);
706    } else {
707        draw_delete_vertex_shader(r300->draw,
708                (struct draw_vertex_shader*)shader);
709    }
710}
711
712void r300_init_state_functions(struct r300_context* r300)
713{
714    r300->context.create_blend_state = r300_create_blend_state;
715    r300->context.bind_blend_state = r300_bind_blend_state;
716    r300->context.delete_blend_state = r300_delete_blend_state;
717
718    r300->context.set_blend_color = r300_set_blend_color;
719
720    r300->context.set_clip_state = r300_set_clip_state;
721
722    r300->context.set_constant_buffer = r300_set_constant_buffer;
723
724    r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
725    r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
726    r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
727
728    r300->context.set_edgeflags = r300_set_edgeflags;
729
730    r300->context.set_framebuffer_state = r300_set_framebuffer_state;
731
732    r300->context.create_fs_state = r300_create_fs_state;
733    r300->context.bind_fs_state = r300_bind_fs_state;
734    r300->context.delete_fs_state = r300_delete_fs_state;
735
736    r300->context.set_polygon_stipple = r300_set_polygon_stipple;
737
738    r300->context.create_rasterizer_state = r300_create_rs_state;
739    r300->context.bind_rasterizer_state = r300_bind_rs_state;
740    r300->context.delete_rasterizer_state = r300_delete_rs_state;
741
742    r300->context.create_sampler_state = r300_create_sampler_state;
743    r300->context.bind_sampler_states = r300_bind_sampler_states;
744    r300->context.delete_sampler_state = r300_delete_sampler_state;
745
746    r300->context.set_sampler_textures = r300_set_sampler_textures;
747
748    r300->context.set_scissor_state = r300_set_scissor_state;
749
750    r300->context.set_viewport_state = r300_set_viewport_state;
751
752    r300->context.set_vertex_buffers = r300_set_vertex_buffers;
753    r300->context.set_vertex_elements = r300_set_vertex_elements;
754
755    r300->context.create_vs_state = r300_create_vs_state;
756    r300->context.bind_vs_state = r300_bind_vs_state;
757    r300->context.delete_vs_state = r300_delete_vs_state;
758}
759