r300_state.c revision 8bf9842fac00369b5cd3a82fb4d87db0e31848b8
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_math.h" 27#include "util/u_memory.h" 28#include "util/u_pack_color.h" 29 30#include "tgsi/tgsi_parse.h" 31 32#include "pipe/p_config.h" 33 34#include "r300_context.h" 35#include "r300_reg.h" 36#include "r300_screen.h" 37#include "r300_screen_buffer.h" 38#include "r300_state_inlines.h" 39#include "r300_fs.h" 40#include "r300_vs.h" 41#include "r300_winsys.h" 42 43/* r300_state: Functions used to intialize state context by translating 44 * Gallium state objects into semi-native r300 state objects. */ 45 46#define UPDATE_STATE(cso, atom) \ 47 if (cso != atom.state) { \ 48 atom.state = cso; \ 49 atom.dirty = TRUE; \ 50 } 51 52static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 53 unsigned dstRGB, unsigned dstA) 54{ 55 /* If the blend equation is ADD or REVERSE_SUBTRACT, 56 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 57 * will not be changed. 58 * Notice that the dst factors are the src factors inverted. */ 59 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 60 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 61 srcRGB == PIPE_BLENDFACTOR_ZERO) && 62 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 63 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 64 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 65 srcA == PIPE_BLENDFACTOR_ZERO) && 66 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 67 dstRGB == PIPE_BLENDFACTOR_ONE) && 68 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 69 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 70 dstA == PIPE_BLENDFACTOR_ONE); 71} 72 73static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 74 unsigned dstRGB, unsigned dstA) 75{ 76 /* If the blend equation is ADD or REVERSE_SUBTRACT, 77 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 78 * will not be changed. 79 * Notice that the dst factors are the src factors inverted. */ 80 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 81 srcRGB == PIPE_BLENDFACTOR_ZERO) && 82 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 83 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 84 srcA == PIPE_BLENDFACTOR_ZERO) && 85 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 86 dstRGB == PIPE_BLENDFACTOR_ONE) && 87 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 88 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 89 dstA == PIPE_BLENDFACTOR_ONE); 90} 91 92static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 93 unsigned dstRGB, unsigned dstA) 94{ 95 /* If the blend equation is ADD or REVERSE_SUBTRACT, 96 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 97 * will not be changed. 98 * Notice that the dst factors are the src factors inverted. */ 99 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 100 srcRGB == PIPE_BLENDFACTOR_ZERO) && 101 (srcA == PIPE_BLENDFACTOR_ZERO) && 102 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 103 dstRGB == PIPE_BLENDFACTOR_ONE) && 104 (dstA == PIPE_BLENDFACTOR_ONE); 105} 106 107static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 108 unsigned dstRGB, unsigned dstA) 109{ 110 /* If the blend equation is ADD or REVERSE_SUBTRACT, 111 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 112 * will not be changed. 113 * Notice that the dst factors are the src factors inverted. */ 114 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 115 srcRGB == PIPE_BLENDFACTOR_ZERO) && 116 (srcA == PIPE_BLENDFACTOR_ZERO) && 117 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 118 dstRGB == PIPE_BLENDFACTOR_ONE) && 119 (dstA == PIPE_BLENDFACTOR_ONE); 120} 121 122static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 123 unsigned dstRGB, unsigned dstA) 124{ 125 /* If the blend equation is ADD or REVERSE_SUBTRACT, 126 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 127 * the colorbuffer will not be changed. 128 * Notice that the dst factors are the src factors inverted. */ 129 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 130 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 131 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 132 srcRGB == PIPE_BLENDFACTOR_ZERO) && 133 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 134 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 135 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 136 srcA == PIPE_BLENDFACTOR_ZERO) && 137 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 138 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 139 dstRGB == PIPE_BLENDFACTOR_ONE) && 140 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 141 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 142 dstA == PIPE_BLENDFACTOR_ONE); 143} 144 145static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 146 unsigned dstRGB, unsigned dstA) 147{ 148 /* If the blend equation is ADD or REVERSE_SUBTRACT, 149 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 150 * the colorbuffer will not be changed. 151 * Notice that the dst factors are the src factors inverted. */ 152 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 153 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 154 srcRGB == PIPE_BLENDFACTOR_ZERO) && 155 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 156 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 157 srcA == PIPE_BLENDFACTOR_ZERO) && 158 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 159 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 160 dstRGB == PIPE_BLENDFACTOR_ONE) && 161 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 162 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 163 dstA == PIPE_BLENDFACTOR_ONE); 164} 165 166static unsigned bgra_cmask(unsigned mask) 167{ 168 /* Gallium uses RGBA color ordering while R300 expects BGRA. */ 169 170 return ((mask & PIPE_MASK_R) << 2) | 171 ((mask & PIPE_MASK_B) >> 2) | 172 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 173} 174 175/* Create a new blend state based on the CSO blend state. 176 * 177 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 178static void* r300_create_blend_state(struct pipe_context* pipe, 179 const struct pipe_blend_state* state) 180{ 181 struct r300_screen* r300screen = r300_screen(pipe->screen); 182 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 183 184 if (state->rt[0].blend_enable) 185 { 186 unsigned eqRGB = state->rt[0].rgb_func; 187 unsigned srcRGB = state->rt[0].rgb_src_factor; 188 unsigned dstRGB = state->rt[0].rgb_dst_factor; 189 190 unsigned eqA = state->rt[0].alpha_func; 191 unsigned srcA = state->rt[0].alpha_src_factor; 192 unsigned dstA = state->rt[0].alpha_dst_factor; 193 194 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 195 * this is just the crappy D3D naming */ 196 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 197 r300_translate_blend_function(eqRGB) | 198 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 199 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 200 201 /* Optimization: some operations do not require the destination color. 202 * 203 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 204 * otherwise blending gives incorrect results. It seems to be 205 * a hardware bug. */ 206 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 207 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 208 dstRGB != PIPE_BLENDFACTOR_ZERO || 209 dstA != PIPE_BLENDFACTOR_ZERO || 210 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 211 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 212 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 213 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 214 srcA == PIPE_BLENDFACTOR_DST_COLOR || 215 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 216 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 217 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 218 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 219 /* Enable reading from the colorbuffer. */ 220 blend->blend_control |= R300_READ_ENABLE; 221 222 if (r300_screen(r300_context(pipe)->context.screen)->caps->is_r500) { 223 /* Optimization: Depending on incoming pixels, we can 224 * conditionally disable the reading in hardware... */ 225 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 226 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 227 /* Disable reading if SRC_ALPHA == 0. */ 228 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 229 dstRGB == PIPE_BLENDFACTOR_ZERO) && 230 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 231 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 232 dstA == PIPE_BLENDFACTOR_ZERO)) { 233 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ; 234 } 235 236 /* Disable reading if SRC_ALPHA == 1. */ 237 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 238 dstRGB == PIPE_BLENDFACTOR_ZERO) && 239 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 240 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 241 dstA == PIPE_BLENDFACTOR_ZERO)) { 242 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ; 243 } 244 } 245 } 246 } 247 248 /* Optimization: discard pixels which don't change the colorbuffer. 249 * 250 * The code below is non-trivial and some math is involved. 251 * 252 * Discarding pixels must be disabled when FP16 AA is enabled. 253 * This is a hardware bug. Also, this implementation wouldn't work 254 * with FP blending enabled and equation clamping disabled. 255 * 256 * Equations other than ADD are rarely used and therefore won't be 257 * optimized. */ 258 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 259 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 260 /* ADD: X+Y 261 * REVERSE_SUBTRACT: Y-X 262 * 263 * The idea is: 264 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 265 * then CB will not be changed. 266 * 267 * Given the srcFactor and dstFactor variables, we can derive 268 * what src and dst should be equal to and discard appropriate 269 * pixels. 270 */ 271 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 272 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 273 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 274 dstRGB, dstA)) { 275 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 276 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 277 dstRGB, dstA)) { 278 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 279 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 280 dstRGB, dstA)) { 281 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 282 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 283 dstRGB, dstA)) { 284 blend->blend_control |= 285 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 286 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 287 dstRGB, dstA)) { 288 blend->blend_control |= 289 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 290 } 291 } 292 293 /* separate alpha */ 294 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 295 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE; 296 blend->alpha_blend_control = 297 r300_translate_blend_function(eqA) | 298 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 299 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 300 } 301 } 302 303 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 304 if (state->logicop_enable) { 305 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 306 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 307 } 308 309 /* Color channel masks for all MRTs. */ 310 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask); 311 if (r300screen->caps->is_r500 && state->independent_blend_enable) { 312 if (state->rt[1].blend_enable) { 313 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; 314 } 315 if (state->rt[2].blend_enable) { 316 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8; 317 } 318 if (state->rt[3].blend_enable) { 319 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12; 320 } 321 } 322 323 if (state->dither) { 324 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 325 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 326 } 327 328 return (void*)blend; 329} 330 331/* Bind blend state. */ 332static void r300_bind_blend_state(struct pipe_context* pipe, 333 void* state) 334{ 335 struct r300_context* r300 = r300_context(pipe); 336 337 UPDATE_STATE(state, r300->blend_state); 338} 339 340/* Free blend state. */ 341static void r300_delete_blend_state(struct pipe_context* pipe, 342 void* state) 343{ 344 FREE(state); 345} 346 347/* Convert float to 10bit integer */ 348static unsigned float_to_fixed10(float f) 349{ 350 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 351} 352 353/* Set blend color. 354 * Setup both R300 and R500 registers, figure out later which one to write. */ 355static void r300_set_blend_color(struct pipe_context* pipe, 356 const struct pipe_blend_color* color) 357{ 358 struct r300_context* r300 = r300_context(pipe); 359 struct r300_screen* r300screen = r300_screen(pipe->screen); 360 struct r300_blend_color_state* state = 361 (struct r300_blend_color_state*)r300->blend_color_state.state; 362 union util_color uc; 363 364 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 365 state->blend_color = uc.ui; 366 367 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 368 state->blend_color_red_alpha = 369 float_to_fixed10(color->color[0]) | 370 (float_to_fixed10(color->color[3]) << 16); 371 state->blend_color_green_blue = 372 float_to_fixed10(color->color[2]) | 373 (float_to_fixed10(color->color[1]) << 16); 374 375 r300->blend_color_state.size = r300screen->caps->is_r500 ? 3 : 2; 376 r300->blend_color_state.dirty = TRUE; 377} 378 379static void r300_set_clip_state(struct pipe_context* pipe, 380 const struct pipe_clip_state* state) 381{ 382 struct r300_context* r300 = r300_context(pipe); 383 384 r300->clip = *state; 385 386 if (r300_screen(pipe->screen)->caps->has_tcl) { 387 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state)); 388 r300->clip_state.size = 29; 389 } else { 390 draw_flush(r300->draw); 391 draw_set_clip_state(r300->draw, state); 392 r300->clip_state.size = 2; 393 } 394 395 r300->clip_state.dirty = TRUE; 396} 397 398/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 399 * 400 * This contains the depth buffer, stencil buffer, alpha test, and such. 401 * On the Radeon, depth and stencil buffer setup are intertwined, which is 402 * the reason for some of the strange-looking assignments across registers. */ 403static void* 404 r300_create_dsa_state(struct pipe_context* pipe, 405 const struct pipe_depth_stencil_alpha_state* state) 406{ 407 struct r300_capabilities *caps = 408 r300_screen(r300_context(pipe)->context.screen)->caps; 409 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 410 411 /* Depth test setup. */ 412 if (state->depth.enabled) { 413 dsa->z_buffer_control |= R300_Z_ENABLE; 414 415 if (state->depth.writemask) { 416 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 417 } 418 419 dsa->z_stencil_control |= 420 (r300_translate_depth_stencil_function(state->depth.func) << 421 R300_Z_FUNC_SHIFT); 422 } 423 424 /* Stencil buffer setup. */ 425 if (state->stencil[0].enabled) { 426 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 427 dsa->z_stencil_control |= 428 (r300_translate_depth_stencil_function(state->stencil[0].func) << 429 R300_S_FRONT_FUNC_SHIFT) | 430 (r300_translate_stencil_op(state->stencil[0].fail_op) << 431 R300_S_FRONT_SFAIL_OP_SHIFT) | 432 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 433 R300_S_FRONT_ZPASS_OP_SHIFT) | 434 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 435 R300_S_FRONT_ZFAIL_OP_SHIFT); 436 437 dsa->stencil_ref_mask = 438 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 439 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 440 441 if (state->stencil[1].enabled) { 442 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 443 dsa->z_stencil_control |= 444 (r300_translate_depth_stencil_function(state->stencil[1].func) << 445 R300_S_BACK_FUNC_SHIFT) | 446 (r300_translate_stencil_op(state->stencil[1].fail_op) << 447 R300_S_BACK_SFAIL_OP_SHIFT) | 448 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 449 R300_S_BACK_ZPASS_OP_SHIFT) | 450 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 451 R300_S_BACK_ZFAIL_OP_SHIFT); 452 453 if (caps->is_r500) 454 { 455 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 456 dsa->stencil_ref_bf = 457 (state->stencil[1].valuemask << 458 R300_STENCILMASK_SHIFT) | 459 (state->stencil[1].writemask << 460 R300_STENCILWRITEMASK_SHIFT); 461 } 462 } 463 } 464 465 /* Alpha test setup. */ 466 if (state->alpha.enabled) { 467 dsa->alpha_function = 468 r300_translate_alpha_function(state->alpha.func) | 469 R300_FG_ALPHA_FUNC_ENABLE; 470 471 /* We could use 10bit alpha ref but who needs that? */ 472 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 473 474 if (caps->is_r500) 475 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 476 } 477 478 return (void*)dsa; 479} 480 481/* Bind DSA state. */ 482static void r300_bind_dsa_state(struct pipe_context* pipe, 483 void* state) 484{ 485 struct r300_context* r300 = r300_context(pipe); 486 487 UPDATE_STATE(state, r300->dsa_state); 488} 489 490/* Free DSA state. */ 491static void r300_delete_dsa_state(struct pipe_context* pipe, 492 void* state) 493{ 494 FREE(state); 495} 496 497static void r300_set_stencil_ref(struct pipe_context* pipe, 498 const struct pipe_stencil_ref* sr) 499{ 500 struct r300_context* r300 = r300_context(pipe); 501 r300->stencil_ref = *sr; 502 r300->dsa_state.dirty = TRUE; 503} 504 505/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 506static void r300_fb_update_tiling_flags(struct r300_context *r300, 507 const struct pipe_framebuffer_state *old_state, 508 const struct pipe_framebuffer_state *new_state) 509{ 510 struct r300_texture *tex; 511 unsigned i, j, level; 512 513 /* Reset tiling flags for old surfaces to default values. */ 514 for (i = 0; i < old_state->nr_cbufs; i++) { 515 for (j = 0; j < new_state->nr_cbufs; j++) { 516 if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) { 517 break; 518 } 519 } 520 /* If not binding the surface again... */ 521 if (j != new_state->nr_cbufs) { 522 continue; 523 } 524 525 tex = (struct r300_texture*)old_state->cbufs[i]->texture; 526 527 if (tex) { 528 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 529 tex->pitch[0], 530 tex->microtile, 531 tex->macrotile); 532 } 533 } 534 if (old_state->zsbuf && 535 (!new_state->zsbuf || 536 old_state->zsbuf->texture != new_state->zsbuf->texture)) { 537 tex = (struct r300_texture*)old_state->zsbuf->texture; 538 539 if (tex) { 540 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 541 tex->pitch[0], 542 tex->microtile, 543 tex->macrotile); 544 } 545 } 546 547 /* Set tiling flags for new surfaces. */ 548 for (i = 0; i < new_state->nr_cbufs; i++) { 549 tex = (struct r300_texture*)new_state->cbufs[i]->texture; 550 level = new_state->cbufs[i]->level; 551 552 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 553 tex->pitch[level], 554 tex->microtile, 555 tex->mip_macrotile[level]); 556 } 557 if (new_state->zsbuf) { 558 tex = (struct r300_texture*)new_state->zsbuf->texture; 559 level = new_state->zsbuf->level; 560 561 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 562 tex->pitch[level], 563 tex->microtile, 564 tex->mip_macrotile[level]); 565 } 566} 567 568static void 569 r300_set_framebuffer_state(struct pipe_context* pipe, 570 const struct pipe_framebuffer_state* state) 571{ 572 struct r300_context* r300 = r300_context(pipe); 573 struct r300_screen* r300screen = r300_screen(pipe->screen); 574 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 575 unsigned max_width, max_height; 576 uint32_t zbuffer_bpp = 0; 577 578 579 if (state->nr_cbufs > 4) { 580 debug_printf("r300: Implementation error: Too many MRTs in %s, " 581 "refusing to bind framebuffer state!\n", __FUNCTION__); 582 return; 583 } 584 585 if (r300screen->caps->is_r500) { 586 max_width = max_height = 4096; 587 } else if (r300screen->caps->is_r400) { 588 max_width = max_height = 4021; 589 } else { 590 max_width = max_height = 2560; 591 } 592 593 if (state->width > max_width || state->height > max_height) { 594 debug_printf("r300: Implementation error: Render targets are too " 595 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 596 return; 597 } 598 599 if (r300->draw) { 600 draw_flush(r300->draw); 601 } 602 603 r300->fb_state.dirty = TRUE; 604 605 /* If nr_cbufs is changed from zero to non-zero or vice versa... */ 606 if (!!old_state->nr_cbufs != !!state->nr_cbufs) { 607 r300->blend_state.dirty = TRUE; 608 } 609 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 610 if (!!old_state->zsbuf != !!state->zsbuf) { 611 r300->dsa_state.dirty = TRUE; 612 } 613 if (!r300->scissor_enabled) { 614 r300->scissor_state.dirty = TRUE; 615 } 616 617 r300_fb_update_tiling_flags(r300, r300->fb_state.state, state); 618 619 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); 620 621 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + 622 (state->zsbuf ? 10 : 0) + 8; 623 624 /* Polygon offset depends on the zbuffer bit depth. */ 625 if (state->zsbuf && r300->polygon_offset_enabled) { 626 switch (util_format_get_blocksize(state->zsbuf->texture->format)) { 627 case 2: 628 zbuffer_bpp = 16; 629 break; 630 case 4: 631 zbuffer_bpp = 24; 632 break; 633 } 634 635 if (r300->zbuffer_bpp != zbuffer_bpp) { 636 r300->zbuffer_bpp = zbuffer_bpp; 637 r300->rs_state.dirty = TRUE; 638 } 639 } 640} 641 642/* Create fragment shader state. */ 643static void* r300_create_fs_state(struct pipe_context* pipe, 644 const struct pipe_shader_state* shader) 645{ 646 struct r300_fragment_shader* fs = NULL; 647 648 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 649 650 /* Copy state directly into shader. */ 651 fs->state = *shader; 652 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 653 654 tgsi_scan_shader(shader->tokens, &fs->info); 655 r300_shader_read_fs_inputs(&fs->info, &fs->inputs); 656 657 return (void*)fs; 658} 659 660/* Bind fragment shader state. */ 661static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 662{ 663 struct r300_context* r300 = r300_context(pipe); 664 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 665 666 if (fs == NULL) { 667 r300->fs = NULL; 668 return; 669 } 670 671 r300->fs = fs; 672 r300_pick_fragment_shader(r300); 673 674 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 675 676 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) { 677 r300->vap_output_state.dirty = TRUE; 678 } 679 680 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS; 681} 682 683/* Delete fragment shader state. */ 684static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 685{ 686 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 687 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 688 689 while (ptr) { 690 tmp = ptr; 691 ptr = ptr->next; 692 rc_constants_destroy(&tmp->code.constants); 693 FREE(tmp); 694 } 695 FREE((void*)fs->state.tokens); 696 FREE(shader); 697} 698 699static void r300_set_polygon_stipple(struct pipe_context* pipe, 700 const struct pipe_poly_stipple* state) 701{ 702 /* XXX no idea how to set this up, but not terribly important */ 703} 704 705/* Create a new rasterizer state based on the CSO rasterizer state. 706 * 707 * This is a very large chunk of state, and covers most of the graphics 708 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 709 * 710 * In a not entirely unironic sidenote, this state has nearly nothing to do 711 * with the actual block on the Radeon called the rasterizer (RS). */ 712static void* r300_create_rs_state(struct pipe_context* pipe, 713 const struct pipe_rasterizer_state* state) 714{ 715 struct r300_screen* r300screen = r300_screen(pipe->screen); 716 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 717 unsigned coord_index; 718 719 /* Copy rasterizer state for Draw. */ 720 rs->rs = *state; 721 722#ifdef PIPE_ARCH_LITTLE_ENDIAN 723 rs->vap_control_status = R300_VC_NO_SWAP; 724#else 725 rs->vap_control_status = R300_VC_32BIT_SWAP; 726#endif 727 728 /* If no TCL engine is present, turn off the HW TCL. */ 729 if (!r300screen->caps->has_tcl) { 730 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 731 } 732 733 rs->point_size = pack_float_16_6x(state->point_size) | 734 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 735 736 rs->line_control = pack_float_16_6x(state->line_width) | 737 R300_GA_LINE_CNTL_END_TYPE_COMP; 738 739 /* Enable polygon mode */ 740 if (state->fill_cw != PIPE_POLYGON_MODE_FILL || 741 state->fill_ccw != PIPE_POLYGON_MODE_FILL) { 742 rs->polygon_mode = R300_GA_POLY_MODE_DUAL; 743 } 744 745 /* Radeons don't think in "CW/CCW", they think in "front/back". */ 746 if (state->front_winding == PIPE_WINDING_CW) { 747 rs->cull_mode = R300_FRONT_FACE_CW; 748 749 /* Polygon offset */ 750 if (state->offset_cw) { 751 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 752 } 753 if (state->offset_ccw) { 754 rs->polygon_offset_enable |= R300_BACK_ENABLE; 755 } 756 757 /* Polygon mode */ 758 if (rs->polygon_mode) { 759 rs->polygon_mode |= 760 r300_translate_polygon_mode_front(state->fill_cw); 761 rs->polygon_mode |= 762 r300_translate_polygon_mode_back(state->fill_ccw); 763 } 764 } else { 765 rs->cull_mode = R300_FRONT_FACE_CCW; 766 767 /* Polygon offset */ 768 if (state->offset_ccw) { 769 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 770 } 771 if (state->offset_cw) { 772 rs->polygon_offset_enable |= R300_BACK_ENABLE; 773 } 774 775 /* Polygon mode */ 776 if (rs->polygon_mode) { 777 rs->polygon_mode |= 778 r300_translate_polygon_mode_front(state->fill_ccw); 779 rs->polygon_mode |= 780 r300_translate_polygon_mode_back(state->fill_cw); 781 } 782 } 783 if (state->front_winding & state->cull_mode) { 784 rs->cull_mode |= R300_CULL_FRONT; 785 } 786 if (~(state->front_winding) & state->cull_mode) { 787 rs->cull_mode |= R300_CULL_BACK; 788 } 789 790 if (rs->polygon_offset_enable) { 791 rs->depth_offset = state->offset_units; 792 rs->depth_scale = state->offset_scale; 793 } 794 795 if (state->line_stipple_enable) { 796 rs->line_stipple_config = 797 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 798 (fui((float)state->line_stipple_factor) & 799 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 800 /* XXX this might need to be scaled up */ 801 rs->line_stipple_value = state->line_stipple_pattern; 802 } 803 804 if (state->flatshade) { 805 rs->color_control = R300_SHADE_MODEL_FLAT; 806 } else { 807 rs->color_control = R300_SHADE_MODEL_SMOOTH; 808 } 809 810 /* Point sprites */ 811 if (state->sprite_coord_enable) { 812 coord_index = ffs(state->sprite_coord_enable)-1; 813 814 SCREEN_DBG(r300screen, DBG_DRAW, 815 "r300: point sprite: shader coord=%d\n", coord_index); 816 817 rs->stuffing_enable = 818 R300_GB_POINT_STUFF_ENABLE | 819 R300_GB_TEX_ST << (R300_GB_TEX0_SOURCE_SHIFT + (coord_index*2)); 820 821 rs->point_texcoord_left = 0.0f; 822 rs->point_texcoord_right = 1.0f; 823 824 switch (state->sprite_coord_mode) { 825 case PIPE_SPRITE_COORD_UPPER_LEFT: 826 rs->point_texcoord_top = 0.0f; 827 rs->point_texcoord_bottom = 1.0f; 828 break; 829 case PIPE_SPRITE_COORD_LOWER_LEFT: 830 rs->point_texcoord_top = 1.0f; 831 rs->point_texcoord_bottom = 0.0f; 832 break; 833 } 834 } 835 836 return (void*)rs; 837} 838 839/* Bind rasterizer state. */ 840static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 841{ 842 struct r300_context* r300 = r300_context(pipe); 843 struct r300_rs_state* rs = (struct r300_rs_state*)state; 844 boolean scissor_was_enabled = r300->scissor_enabled; 845 int last_sprite_coord_index = r300->sprite_coord_index; 846 847 if (r300->draw) { 848 draw_flush(r300->draw); 849 draw_set_rasterizer_state(r300->draw, &rs->rs); 850 } 851 852 if (rs) { 853 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw; 854 r300->scissor_enabled = rs->rs.scissor; 855 r300->sprite_coord_index = ffs(rs->rs.sprite_coord_enable)-1; 856 } else { 857 r300->polygon_offset_enabled = FALSE; 858 r300->scissor_enabled = FALSE; 859 r300->sprite_coord_index = -1; 860 } 861 862 UPDATE_STATE(state, r300->rs_state); 863 r300->rs_state.size = 24 + (r300->polygon_offset_enabled ? 5 : 0); 864 865 if (scissor_was_enabled != r300->scissor_enabled) { 866 r300->scissor_state.dirty = TRUE; 867 } 868 if (last_sprite_coord_index != r300->sprite_coord_index) { 869 r300->rs_block_state.dirty = TRUE; 870 } 871} 872 873/* Free rasterizer state. */ 874static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 875{ 876 FREE(state); 877} 878 879static void* 880 r300_create_sampler_state(struct pipe_context* pipe, 881 const struct pipe_sampler_state* state) 882{ 883 struct r300_context* r300 = r300_context(pipe); 884 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 885 boolean is_r500 = r300_screen(pipe->screen)->caps->is_r500; 886 int lod_bias; 887 union util_color uc; 888 889 sampler->state = *state; 890 891 sampler->filter0 |= 892 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 893 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 894 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 895 896 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 897 state->mag_img_filter, 898 state->min_mip_filter, 899 state->max_anisotropy > 0); 900 901 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 902 903 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 904 /* We must pass these to the merge function to clamp them properly. */ 905 sampler->min_lod = MAX2((unsigned)state->min_lod, 0); 906 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0); 907 908 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); 909 910 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 911 912 /* This is very high quality anisotropic filtering for R5xx. 913 * It's good for benchmarking the performance of texturing but 914 * in practice we don't want to slow down the driver because it's 915 * a pretty good performance killer. Feel free to play with it. */ 916 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 917 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 918 } 919 920 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 921 sampler->border_color = uc.ui; 922 923 /* R500-specific fixups and optimizations */ 924 if (r300_screen(r300->context.screen)->caps->is_r500) { 925 sampler->filter1 |= R500_BORDER_FIX; 926 } 927 928 return (void*)sampler; 929} 930 931static void r300_bind_sampler_states(struct pipe_context* pipe, 932 unsigned count, 933 void** states) 934{ 935 struct r300_context* r300 = r300_context(pipe); 936 struct r300_textures_state* state = 937 (struct r300_textures_state*)r300->textures_state.state; 938 939 if (count > 8) { 940 return; 941 } 942 943 memcpy(state->sampler_states, states, sizeof(void*) * count); 944 state->sampler_count = count; 945 946 r300->textures_state.dirty = TRUE; 947 948 /* Pick a fragment shader based on the texture compare state. */ 949 if (r300->fs && count) { 950 if (r300_pick_fragment_shader(r300)) { 951 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | 952 R300_NEW_FRAGMENT_SHADER_CONSTANTS; 953 } 954 } 955} 956 957static void r300_lacks_vertex_textures(struct pipe_context* pipe, 958 unsigned count, 959 void** states) 960{ 961} 962 963static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 964{ 965 FREE(state); 966} 967 968static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 969 unsigned count, 970 struct pipe_sampler_view** views) 971{ 972 struct r300_context* r300 = r300_context(pipe); 973 struct r300_textures_state* state = 974 (struct r300_textures_state*)r300->textures_state.state; 975 struct r300_texture *texture; 976 unsigned i; 977 boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500; 978 boolean dirty_tex = FALSE; 979 980 /* XXX magic num */ 981 if (count > 8) { 982 return; 983 } 984 985 for (i = 0; i < count; i++) { 986 if (state->fragment_sampler_views[i] != views[i]) { 987 pipe_sampler_view_reference(&state->fragment_sampler_views[i], 988 views[i]); 989 990 if (!views[i]) { 991 continue; 992 } 993 994 /* A new sampler view (= texture)... */ 995 dirty_tex = TRUE; 996 997 /* R300-specific - set the texrect factor in the fragment shader */ 998 texture = (struct r300_texture *)views[i]->texture; 999 if (!is_r500 && texture->is_npot) { 1000 /* XXX It would be nice to re-emit just 1 constant, 1001 * XXX not all of them */ 1002 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1003 } 1004 } 1005 } 1006 1007 for (i = count; i < 8; i++) { 1008 if (state->fragment_sampler_views[i]) { 1009 pipe_sampler_view_reference(&state->fragment_sampler_views[i], 1010 NULL); 1011 } 1012 } 1013 1014 state->texture_count = count; 1015 1016 r300->textures_state.dirty = TRUE; 1017 1018 if (dirty_tex) { 1019 r300->texture_cache_inval.dirty = TRUE; 1020 } 1021} 1022 1023static struct pipe_sampler_view * 1024r300_create_sampler_view(struct pipe_context *pipe, 1025 struct pipe_texture *texture, 1026 const struct pipe_sampler_view *templ) 1027{ 1028 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); 1029 1030 if (view) { 1031 *view = *templ; 1032 view->reference.count = 1; 1033 view->texture = NULL; 1034 pipe_texture_reference(&view->texture, texture); 1035 view->context = pipe; 1036 } 1037 1038 return view; 1039} 1040 1041static void 1042r300_sampler_view_destroy(struct pipe_context *pipe, 1043 struct pipe_sampler_view *view) 1044{ 1045 pipe_texture_reference(&view->texture, NULL); 1046 FREE(view); 1047} 1048 1049static void r300_set_scissor_state(struct pipe_context* pipe, 1050 const struct pipe_scissor_state* state) 1051{ 1052 struct r300_context* r300 = r300_context(pipe); 1053 1054 memcpy(r300->scissor_state.state, state, 1055 sizeof(struct pipe_scissor_state)); 1056 1057 if (r300->scissor_enabled) { 1058 r300->scissor_state.dirty = TRUE; 1059 } 1060} 1061 1062static void r300_set_viewport_state(struct pipe_context* pipe, 1063 const struct pipe_viewport_state* state) 1064{ 1065 struct r300_context* r300 = r300_context(pipe); 1066 struct r300_viewport_state* viewport = 1067 (struct r300_viewport_state*)r300->viewport_state.state; 1068 1069 r300->viewport = *state; 1070 1071 /* Do the transform in HW. */ 1072 viewport->vte_control = R300_VTX_W0_FMT; 1073 1074 if (state->scale[0] != 1.0f) { 1075 viewport->xscale = state->scale[0]; 1076 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1077 } 1078 if (state->scale[1] != 1.0f) { 1079 viewport->yscale = state->scale[1]; 1080 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1081 } 1082 if (state->scale[2] != 1.0f) { 1083 viewport->zscale = state->scale[2]; 1084 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1085 } 1086 if (state->translate[0] != 0.0f) { 1087 viewport->xoffset = state->translate[0]; 1088 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1089 } 1090 if (state->translate[1] != 0.0f) { 1091 viewport->yoffset = state->translate[1]; 1092 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1093 } 1094 if (state->translate[2] != 0.0f) { 1095 viewport->zoffset = state->translate[2]; 1096 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1097 } 1098 1099 r300->viewport_state.dirty = TRUE; 1100 if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) { 1101 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1102 } 1103} 1104 1105static void r300_set_vertex_buffers(struct pipe_context* pipe, 1106 unsigned count, 1107 const struct pipe_vertex_buffer* buffers) 1108{ 1109 struct r300_context* r300 = r300_context(pipe); 1110 struct pipe_vertex_buffer *vbo; 1111 unsigned i, max_index = (1 << 24) - 1; 1112 boolean any_user_buffer = FALSE; 1113 1114 if (count == r300->vertex_buffer_count && 1115 memcmp(r300->vertex_buffer, buffers, 1116 sizeof(struct pipe_vertex_buffer) * count) == 0) { 1117 return; 1118 } 1119 1120 /* Check if the stride is aligned to the size of DWORD. */ 1121 for (i = 0; i < count; i++) { 1122 if (buffers[i].buffer) { 1123 if (buffers[i].stride % 4 != 0) { 1124 // XXX Shouldn't we align the buffer? 1125 fprintf(stderr, "r300_set_vertex_buffers: " 1126 "Unaligned buffer stride %i isn't supported.\n", 1127 buffers[i].stride); 1128 assert(0); 1129 abort(); 1130 } 1131 } 1132 } 1133 1134 for (i = 0; i < count; i++) { 1135 /* Why, yes, I AM casting away constness. How did you know? */ 1136 vbo = (struct pipe_vertex_buffer*)&buffers[i]; 1137 1138 /* Reference our buffer. */ 1139 pipe_buffer_reference(&r300->vertex_buffer[i].buffer, vbo->buffer); 1140 1141 /* Skip NULL buffers */ 1142 if (!buffers[i].buffer) { 1143 continue; 1144 } 1145 1146 if (r300_buffer_is_user_buffer(vbo->buffer)) { 1147 any_user_buffer = TRUE; 1148 } 1149 1150 if (vbo->max_index == ~0) { 1151 /* Bogus value from broken state tracker; hax it. */ 1152 vbo->max_index = 1153 (vbo->buffer->size - vbo->buffer_offset) / vbo->stride; 1154 } 1155 1156 max_index = MIN2(vbo->max_index, max_index); 1157 } 1158 1159 for (; i < r300->vertex_buffer_count; i++) { 1160 /* Dereference any old buffers. */ 1161 pipe_buffer_reference(&r300->vertex_buffer[i].buffer, NULL); 1162 } 1163 1164 memcpy(r300->vertex_buffer, buffers, 1165 sizeof(struct pipe_vertex_buffer) * count); 1166 1167 r300->vertex_buffer_count = count; 1168 r300->vertex_buffer_max_index = max_index; 1169 r300->any_user_vbs = any_user_buffer; 1170 1171 if (r300->draw) { 1172 draw_flush(r300->draw); 1173 draw_set_vertex_buffers(r300->draw, count, buffers); 1174 } 1175} 1176 1177static void r300_draw_emit_attrib(struct r300_context* r300, 1178 enum attrib_emit emit, 1179 enum interp_mode interp, 1180 int index) 1181{ 1182 struct r300_vertex_shader* vs = r300->vs_state.state; 1183 struct tgsi_shader_info* info = &vs->info; 1184 int output; 1185 1186 output = draw_find_shader_output(r300->draw, 1187 info->output_semantic_name[index], 1188 info->output_semantic_index[index]); 1189 draw_emit_vertex_attr(&r300->vertex_info, emit, interp, output); 1190} 1191 1192static void r300_draw_emit_all_attribs(struct r300_context* r300) 1193{ 1194 struct r300_vertex_shader* vs = r300->vs_state.state; 1195 struct r300_shader_semantics* vs_outputs = &vs->outputs; 1196 int i, gen_count; 1197 1198 /* Position. */ 1199 if (vs_outputs->pos != ATTR_UNUSED) { 1200 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 1201 vs_outputs->pos); 1202 } else { 1203 assert(0); 1204 } 1205 1206 /* Point size. */ 1207 if (vs_outputs->psize != ATTR_UNUSED) { 1208 r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS, 1209 vs_outputs->psize); 1210 } 1211 1212 /* Colors. */ 1213 for (i = 0; i < ATTR_COLOR_COUNT; i++) { 1214 if (vs_outputs->color[i] != ATTR_UNUSED) { 1215 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR, 1216 vs_outputs->color[i]); 1217 } 1218 } 1219 1220 /* XXX Back-face colors. */ 1221 1222 /* Texture coordinates. */ 1223 gen_count = 0; 1224 for (i = 0; i < ATTR_GENERIC_COUNT; i++) { 1225 if (vs_outputs->generic[i] != ATTR_UNUSED) { 1226 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 1227 vs_outputs->generic[i]); 1228 gen_count++; 1229 } 1230 } 1231 1232 /* Fog coordinates. */ 1233 if (vs_outputs->fog != ATTR_UNUSED) { 1234 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 1235 vs_outputs->fog); 1236 gen_count++; 1237 } 1238 1239 /* XXX magic */ 1240 assert(gen_count <= 8); 1241} 1242 1243/* Update the PSC tables. */ 1244static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1245{ 1246 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1247 uint16_t type, swizzle; 1248 enum pipe_format format; 1249 unsigned i; 1250 1251 assert(velems->count <= 16); 1252 1253 /* Vertex shaders have no semantics on their inputs, 1254 * so PSC should just route stuff based on the vertex elements, 1255 * and not on attrib information. */ 1256 for (i = 0; i < velems->count; i++) { 1257 format = velems->velem[i].src_format; 1258 1259 type = r300_translate_vertex_data_type(format) | 1260 (i << R300_DST_VEC_LOC_SHIFT); 1261 swizzle = r300_translate_vertex_data_swizzle(format); 1262 1263 if (i & 1) { 1264 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1265 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1266 } else { 1267 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1268 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1269 } 1270 } 1271 1272 /* Set the last vector in the PSC. */ 1273 if (i) { 1274 i -= 1; 1275 } 1276 vstream->vap_prog_stream_cntl[i >> 1] |= 1277 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1278 1279 vstream->count = (i >> 1) + 1; 1280} 1281 1282/* Update the PSC tables for SW TCL, using Draw. */ 1283static void r300_swtcl_vertex_psc(struct r300_context *r300, 1284 struct r300_vertex_element_state *velems) 1285{ 1286 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1287 struct r300_vertex_shader* vs = r300->vs_state.state; 1288 struct vertex_info* vinfo = &r300->vertex_info; 1289 uint16_t type, swizzle; 1290 enum pipe_format format; 1291 unsigned i, attrib_count; 1292 int* vs_output_tab = vs->stream_loc_notcl; 1293 1294 /* For each Draw attribute, route it to the fragment shader according 1295 * to the vs_output_tab. */ 1296 attrib_count = vinfo->num_attribs; 1297 DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count); 1298 for (i = 0; i < attrib_count; i++) { 1299 DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d," 1300 " vs_output_tab %d\n", vinfo->attrib[i].src_index, 1301 vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit, 1302 vs_output_tab[i]); 1303 } 1304 1305 for (i = 0; i < attrib_count; i++) { 1306 /* Make sure we have a proper destination for our attribute. */ 1307 assert(vs_output_tab[i] != -1); 1308 1309 format = draw_translate_vinfo_format(vinfo->attrib[i].emit); 1310 1311 /* Obtain the type of data in this attribute. */ 1312 type = r300_translate_vertex_data_type(format) | 1313 vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT; 1314 1315 /* Obtain the swizzle for this attribute. Note that the default 1316 * swizzle in the hardware is not XYZW! */ 1317 swizzle = r300_translate_vertex_data_swizzle(format); 1318 1319 /* Add the attribute to the PSC table. */ 1320 if (i & 1) { 1321 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1322 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1323 } else { 1324 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1325 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1326 } 1327 } 1328 1329 /* Set the last vector in the PSC. */ 1330 if (i) { 1331 i -= 1; 1332 } 1333 vstream->vap_prog_stream_cntl[i >> 1] |= 1334 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1335 1336 vstream->count = (i >> 1) + 1; 1337} 1338 1339static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1340 unsigned count, 1341 const struct pipe_vertex_element* attribs) 1342{ 1343 struct r300_context *r300 = r300_context(pipe); 1344 struct r300_screen* r300screen = r300_screen(pipe->screen); 1345 struct r300_vertex_element_state *velems; 1346 unsigned i, size; 1347 1348 assert(count <= PIPE_MAX_ATTRIBS); 1349 velems = CALLOC_STRUCT(r300_vertex_element_state); 1350 if (velems != NULL) { 1351 velems->count = count; 1352 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1353 1354 if (r300screen->caps->has_tcl) { 1355 /* Check if the format is aligned to the size of DWORD. */ 1356 for (i = 0; i < count; i++) { 1357 size = util_format_get_blocksize(attribs[i].src_format); 1358 1359 if (size % 4 != 0) { 1360 /* XXX Shouldn't we align the format? */ 1361 fprintf(stderr, "r300_create_vertex_elements_state: " 1362 "Unaligned format %s:%i isn't supported\n", 1363 util_format_name(attribs[i].src_format), size); 1364 assert(0); 1365 abort(); 1366 } 1367 } 1368 1369 r300_vertex_psc(velems); 1370 } else { 1371 memset(&r300->vertex_info, 0, sizeof(struct vertex_info)); 1372 r300_draw_emit_all_attribs(r300); 1373 draw_compute_vertex_size(&r300->vertex_info); 1374 r300_swtcl_vertex_psc(r300, velems); 1375 } 1376 } 1377 return velems; 1378} 1379 1380static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1381 void *state) 1382{ 1383 struct r300_context *r300 = r300_context(pipe); 1384 struct r300_vertex_element_state *velems = state; 1385 1386 if (velems == NULL) { 1387 return; 1388 } 1389 1390 r300->velems = velems; 1391 1392 if (r300->draw) { 1393 draw_flush(r300->draw); 1394 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1395 } 1396 1397 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1398 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1399} 1400 1401static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1402{ 1403 FREE(state); 1404} 1405 1406static void* r300_create_vs_state(struct pipe_context* pipe, 1407 const struct pipe_shader_state* shader) 1408{ 1409 struct r300_context* r300 = r300_context(pipe); 1410 1411 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1412 r300_vertex_shader_common_init(vs, shader); 1413 1414 if (r300_screen(pipe->screen)->caps->has_tcl) { 1415 r300_translate_vertex_shader(r300, vs); 1416 } else { 1417 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader); 1418 } 1419 1420 return vs; 1421} 1422 1423static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1424{ 1425 struct r300_context* r300 = r300_context(pipe); 1426 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1427 1428 if (vs == NULL) { 1429 r300->vs_state.state = NULL; 1430 return; 1431 } 1432 if (vs == r300->vs_state.state) { 1433 return; 1434 } 1435 r300->vs_state.state = vs; 1436 1437 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block 1438 if (r300->fs) { 1439 r300_vertex_shader_setup_wpos(r300); 1440 } 1441 memcpy(r300->vap_output_state.state, &vs->vap_out, 1442 sizeof(struct r300_vap_output_state)); 1443 r300->vap_output_state.dirty = TRUE; 1444 1445 /* The majority of the RS block bits is dependent on the vertex shader. */ 1446 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 1447 1448 if (r300_screen(pipe->screen)->caps->has_tcl) { 1449 r300->vs_state.dirty = TRUE; 1450 r300->vs_state.size = vs->code.length + 9; 1451 1452 r300->pvs_flush.dirty = TRUE; 1453 1454 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 1455 } else { 1456 draw_flush(r300->draw); 1457 draw_bind_vertex_shader(r300->draw, 1458 (struct draw_vertex_shader*)vs->draw_vs); 1459 } 1460} 1461 1462static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1463{ 1464 struct r300_context* r300 = r300_context(pipe); 1465 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1466 1467 if (r300_screen(pipe->screen)->caps->has_tcl) { 1468 rc_constants_destroy(&vs->code.constants); 1469 } else { 1470 draw_delete_vertex_shader(r300->draw, 1471 (struct draw_vertex_shader*)vs->draw_vs); 1472 } 1473 1474 FREE((void*)vs->state.tokens); 1475 FREE(shader); 1476} 1477 1478static void r300_set_constant_buffer(struct pipe_context *pipe, 1479 uint shader, uint index, 1480 struct pipe_buffer *buf) 1481{ 1482 struct r300_context* r300 = r300_context(pipe); 1483 struct r300_screen *r300screen = r300_screen(pipe->screen); 1484 void *mapped; 1485 int max_size = 0; 1486 1487 if (buf == NULL || buf->size == 0 || 1488 (mapped = pipe_buffer_map(pipe->screen, buf, PIPE_BUFFER_USAGE_CPU_READ)) == NULL) 1489 { 1490 r300->shader_constants[shader].count = 0; 1491 return; 1492 } 1493 1494 assert((buf->size % 4 * sizeof(float)) == 0); 1495 1496 /* Check the size of the constant buffer. */ 1497 switch (shader) { 1498 case PIPE_SHADER_VERTEX: 1499 max_size = 256; 1500 break; 1501 case PIPE_SHADER_FRAGMENT: 1502 if (r300screen->caps->is_r500) { 1503 max_size = 256; 1504 /* XXX Implement emission of r400's extended constant buffer. */ 1505 /*} else if (r300screen->caps->is_r400) { 1506 max_size = 64;*/ 1507 } else { 1508 max_size = 32; 1509 } 1510 break; 1511 default: 1512 assert(0); 1513 } 1514 1515 /* XXX Subtract immediates and RC_STATE_* variables. */ 1516 if (buf->size > (sizeof(float) * 4 * max_size)) { 1517 debug_printf("r300: Max size of the constant buffer is " 1518 "%i*4 floats.\n", max_size); 1519 abort(); 1520 } 1521 1522 memcpy(r300->shader_constants[shader].constants, mapped, buf->size); 1523 r300->shader_constants[shader].count = buf->size / (4 * sizeof(float)); 1524 pipe_buffer_unmap(pipe->screen, buf); 1525 1526 if (shader == PIPE_SHADER_VERTEX) { 1527 if (r300screen->caps->has_tcl) { 1528 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; 1529 r300->pvs_flush.dirty = TRUE; 1530 } 1531 } 1532 else if (shader == PIPE_SHADER_FRAGMENT) 1533 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; 1534} 1535 1536void r300_init_state_functions(struct r300_context* r300) 1537{ 1538 r300->context.create_blend_state = r300_create_blend_state; 1539 r300->context.bind_blend_state = r300_bind_blend_state; 1540 r300->context.delete_blend_state = r300_delete_blend_state; 1541 1542 r300->context.set_blend_color = r300_set_blend_color; 1543 1544 r300->context.set_clip_state = r300_set_clip_state; 1545 1546 r300->context.set_constant_buffer = r300_set_constant_buffer; 1547 1548 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1549 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1550 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1551 1552 r300->context.set_stencil_ref = r300_set_stencil_ref; 1553 1554 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1555 1556 r300->context.create_fs_state = r300_create_fs_state; 1557 r300->context.bind_fs_state = r300_bind_fs_state; 1558 r300->context.delete_fs_state = r300_delete_fs_state; 1559 1560 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1561 1562 r300->context.create_rasterizer_state = r300_create_rs_state; 1563 r300->context.bind_rasterizer_state = r300_bind_rs_state; 1564 r300->context.delete_rasterizer_state = r300_delete_rs_state; 1565 1566 r300->context.create_sampler_state = r300_create_sampler_state; 1567 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 1568 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 1569 r300->context.delete_sampler_state = r300_delete_sampler_state; 1570 1571 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 1572 r300->context.create_sampler_view = r300_create_sampler_view; 1573 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 1574 1575 r300->context.set_scissor_state = r300_set_scissor_state; 1576 1577 r300->context.set_viewport_state = r300_set_viewport_state; 1578 1579 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 1580 1581 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 1582 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 1583 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 1584 1585 r300->context.create_vs_state = r300_create_vs_state; 1586 r300->context.bind_vs_state = r300_bind_vs_state; 1587 r300->context.delete_vs_state = r300_delete_vs_state; 1588} 1589