r300_state.c revision 910bac63dfc5c6d9bf7162388c951784eba534f6
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_framebuffer.h" 27#include "util/u_half.h" 28#include "util/u_math.h" 29#include "util/u_mm.h" 30#include "util/u_memory.h" 31#include "util/u_pack_color.h" 32#include "util/u_transfer.h" 33 34#include "tgsi/tgsi_parse.h" 35 36#include "pipe/p_config.h" 37 38#include "r300_cb.h" 39#include "r300_context.h" 40#include "r300_emit.h" 41#include "r300_reg.h" 42#include "r300_screen.h" 43#include "r300_screen_buffer.h" 44#include "r300_state_inlines.h" 45#include "r300_fs.h" 46#include "r300_texture.h" 47#include "r300_vs.h" 48#include "r300_winsys.h" 49 50/* r300_state: Functions used to intialize state context by translating 51 * Gallium state objects into semi-native r300 state objects. */ 52 53#define UPDATE_STATE(cso, atom) \ 54 if (cso != atom.state) { \ 55 atom.state = cso; \ 56 r300_mark_atom_dirty(r300, &(atom)); \ 57 } 58 59static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 60 unsigned dstRGB, unsigned dstA) 61{ 62 /* If the blend equation is ADD or REVERSE_SUBTRACT, 63 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 64 * will not be changed. 65 * Notice that the dst factors are the src factors inverted. */ 66 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 67 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 68 srcRGB == PIPE_BLENDFACTOR_ZERO) && 69 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 70 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 71 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 72 srcA == PIPE_BLENDFACTOR_ZERO) && 73 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 74 dstRGB == PIPE_BLENDFACTOR_ONE) && 75 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 76 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 77 dstA == PIPE_BLENDFACTOR_ONE); 78} 79 80static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 81 unsigned dstRGB, unsigned dstA) 82{ 83 /* If the blend equation is ADD or REVERSE_SUBTRACT, 84 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 85 * will not be changed. 86 * Notice that the dst factors are the src factors inverted. */ 87 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 88 srcRGB == PIPE_BLENDFACTOR_ZERO) && 89 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 90 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 91 srcA == PIPE_BLENDFACTOR_ZERO) && 92 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 93 dstRGB == PIPE_BLENDFACTOR_ONE) && 94 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 95 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 96 dstA == PIPE_BLENDFACTOR_ONE); 97} 98 99static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 100 unsigned dstRGB, unsigned dstA) 101{ 102 /* If the blend equation is ADD or REVERSE_SUBTRACT, 103 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 104 * will not be changed. 105 * Notice that the dst factors are the src factors inverted. */ 106 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 107 srcRGB == PIPE_BLENDFACTOR_ZERO) && 108 (srcA == PIPE_BLENDFACTOR_ZERO) && 109 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 110 dstRGB == PIPE_BLENDFACTOR_ONE) && 111 (dstA == PIPE_BLENDFACTOR_ONE); 112} 113 114static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 115 unsigned dstRGB, unsigned dstA) 116{ 117 /* If the blend equation is ADD or REVERSE_SUBTRACT, 118 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 119 * will not be changed. 120 * Notice that the dst factors are the src factors inverted. */ 121 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 122 srcRGB == PIPE_BLENDFACTOR_ZERO) && 123 (srcA == PIPE_BLENDFACTOR_ZERO) && 124 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 125 dstRGB == PIPE_BLENDFACTOR_ONE) && 126 (dstA == PIPE_BLENDFACTOR_ONE); 127} 128 129static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 130 unsigned dstRGB, unsigned dstA) 131{ 132 /* If the blend equation is ADD or REVERSE_SUBTRACT, 133 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 134 * the colorbuffer will not be changed. 135 * Notice that the dst factors are the src factors inverted. */ 136 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 137 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 138 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 139 srcRGB == PIPE_BLENDFACTOR_ZERO) && 140 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 141 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 142 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 143 srcA == PIPE_BLENDFACTOR_ZERO) && 144 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 145 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 146 dstRGB == PIPE_BLENDFACTOR_ONE) && 147 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 148 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 149 dstA == PIPE_BLENDFACTOR_ONE); 150} 151 152static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 153 unsigned dstRGB, unsigned dstA) 154{ 155 /* If the blend equation is ADD or REVERSE_SUBTRACT, 156 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 157 * the colorbuffer will not be changed. 158 * Notice that the dst factors are the src factors inverted. */ 159 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 160 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 161 srcRGB == PIPE_BLENDFACTOR_ZERO) && 162 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 163 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 164 srcA == PIPE_BLENDFACTOR_ZERO) && 165 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 166 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 167 dstRGB == PIPE_BLENDFACTOR_ONE) && 168 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 169 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 170 dstA == PIPE_BLENDFACTOR_ONE); 171} 172 173static unsigned bgra_cmask(unsigned mask) 174{ 175 /* Gallium uses RGBA color ordering while R300 expects BGRA. */ 176 177 return ((mask & PIPE_MASK_R) << 2) | 178 ((mask & PIPE_MASK_B) >> 2) | 179 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 180} 181 182/* Create a new blend state based on the CSO blend state. 183 * 184 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 185static void* r300_create_blend_state(struct pipe_context* pipe, 186 const struct pipe_blend_state* state) 187{ 188 struct r300_screen* r300screen = r300_screen(pipe->screen); 189 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 190 uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */ 191 uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */ 192 uint32_t color_channel_mask = 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */ 193 uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */ 194 uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */ 195 CB_LOCALS; 196 197 if (state->rt[0].blend_enable) 198 { 199 unsigned eqRGB = state->rt[0].rgb_func; 200 unsigned srcRGB = state->rt[0].rgb_src_factor; 201 unsigned dstRGB = state->rt[0].rgb_dst_factor; 202 203 unsigned eqA = state->rt[0].alpha_func; 204 unsigned srcA = state->rt[0].alpha_src_factor; 205 unsigned dstA = state->rt[0].alpha_dst_factor; 206 207 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 208 * this is just the crappy D3D naming */ 209 blend_control = R300_ALPHA_BLEND_ENABLE | 210 r300_translate_blend_function(eqRGB) | 211 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 212 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 213 214 /* Optimization: some operations do not require the destination color. 215 * 216 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 217 * otherwise blending gives incorrect results. It seems to be 218 * a hardware bug. */ 219 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 220 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 221 dstRGB != PIPE_BLENDFACTOR_ZERO || 222 dstA != PIPE_BLENDFACTOR_ZERO || 223 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 224 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 225 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 226 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 227 srcA == PIPE_BLENDFACTOR_DST_COLOR || 228 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 229 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 230 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 231 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 232 /* Enable reading from the colorbuffer. */ 233 blend_control |= R300_READ_ENABLE; 234 235 if (r300screen->caps.is_r500) { 236 /* Optimization: Depending on incoming pixels, we can 237 * conditionally disable the reading in hardware... */ 238 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 239 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 240 /* Disable reading if SRC_ALPHA == 0. */ 241 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 242 dstRGB == PIPE_BLENDFACTOR_ZERO) && 243 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 244 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 245 dstA == PIPE_BLENDFACTOR_ZERO)) { 246 blend_control |= R500_SRC_ALPHA_0_NO_READ; 247 } 248 249 /* Disable reading if SRC_ALPHA == 1. */ 250 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 251 dstRGB == PIPE_BLENDFACTOR_ZERO) && 252 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 253 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 254 dstA == PIPE_BLENDFACTOR_ZERO)) { 255 blend_control |= R500_SRC_ALPHA_1_NO_READ; 256 } 257 } 258 } 259 } 260 261 /* Optimization: discard pixels which don't change the colorbuffer. 262 * 263 * The code below is non-trivial and some math is involved. 264 * 265 * Discarding pixels must be disabled when FP16 AA is enabled. 266 * This is a hardware bug. Also, this implementation wouldn't work 267 * with FP blending enabled and equation clamping disabled. 268 * 269 * Equations other than ADD are rarely used and therefore won't be 270 * optimized. */ 271 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 272 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 273 /* ADD: X+Y 274 * REVERSE_SUBTRACT: Y-X 275 * 276 * The idea is: 277 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 278 * then CB will not be changed. 279 * 280 * Given the srcFactor and dstFactor variables, we can derive 281 * what src and dst should be equal to and discard appropriate 282 * pixels. 283 */ 284 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 285 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 286 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 287 dstRGB, dstA)) { 288 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 289 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 290 dstRGB, dstA)) { 291 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 292 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 293 dstRGB, dstA)) { 294 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 295 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 296 dstRGB, dstA)) { 297 blend_control |= 298 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 299 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 300 dstRGB, dstA)) { 301 blend_control |= 302 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 303 } 304 } 305 306 /* separate alpha */ 307 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 308 blend_control |= R300_SEPARATE_ALPHA_ENABLE; 309 alpha_blend_control = 310 r300_translate_blend_function(eqA) | 311 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 312 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 313 } 314 } 315 316 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 317 if (state->logicop_enable) { 318 rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 319 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 320 } 321 322 /* Color channel masks for all MRTs. */ 323 color_channel_mask = bgra_cmask(state->rt[0].colormask); 324 if (r300screen->caps.is_r500 && state->independent_blend_enable) { 325 if (state->rt[1].blend_enable) { 326 color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; 327 } 328 if (state->rt[2].blend_enable) { 329 color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8; 330 } 331 if (state->rt[3].blend_enable) { 332 color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12; 333 } 334 } 335 336 /* Neither fglrx nor classic r300 ever set this, regardless of dithering 337 * state. Since it's an optional implementation detail, we can leave it 338 * out and never dither. 339 * 340 * This could be revisited if we ever get quality or conformance hints. 341 * 342 if (state->dither) { 343 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 344 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 345 } 346 */ 347 348 /* Build a command buffer. */ 349 BEGIN_CB(blend->cb, 8); 350 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 351 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 352 OUT_CB(blend_control); 353 OUT_CB(alpha_blend_control); 354 OUT_CB(color_channel_mask); 355 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 356 END_CB; 357 358 /* The same as above, but with no colorbuffer reads and writes. */ 359 BEGIN_CB(blend->cb_no_readwrite, 8); 360 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 361 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 362 OUT_CB(0); 363 OUT_CB(0); 364 OUT_CB(0); 365 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 366 END_CB; 367 368 return (void*)blend; 369} 370 371/* Bind blend state. */ 372static void r300_bind_blend_state(struct pipe_context* pipe, 373 void* state) 374{ 375 struct r300_context* r300 = r300_context(pipe); 376 377 UPDATE_STATE(state, r300->blend_state); 378} 379 380/* Free blend state. */ 381static void r300_delete_blend_state(struct pipe_context* pipe, 382 void* state) 383{ 384 FREE(state); 385} 386 387/* Convert float to 10bit integer */ 388static unsigned float_to_fixed10(float f) 389{ 390 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 391} 392 393/* Set blend color. 394 * Setup both R300 and R500 registers, figure out later which one to write. */ 395static void r300_set_blend_color(struct pipe_context* pipe, 396 const struct pipe_blend_color* color) 397{ 398 struct r300_context* r300 = r300_context(pipe); 399 struct pipe_framebuffer_state *fb = r300->fb_state.state; 400 struct r300_blend_color_state *state = 401 (struct r300_blend_color_state*)r300->blend_color_state.state; 402 struct pipe_blend_color c; 403 enum pipe_format format = fb->nr_cbufs ? fb->cbufs[0]->format : 0; 404 CB_LOCALS; 405 406 state->state = *color; /* Save it, so that we can reuse it in set_fb_state */ 407 c = *color; 408 409 /* The blend color is dependent on the colorbuffer format. */ 410 if (fb->nr_cbufs) { 411 switch (format) { 412 case PIPE_FORMAT_R8_UNORM: 413 case PIPE_FORMAT_L8_UNORM: 414 case PIPE_FORMAT_I8_UNORM: 415 c.color[1] = c.color[0]; 416 break; 417 418 case PIPE_FORMAT_A8_UNORM: 419 c.color[1] = c.color[3]; 420 break; 421 422 case PIPE_FORMAT_R8G8_UNORM: 423 c.color[2] = c.color[1]; 424 break; 425 426 case PIPE_FORMAT_L8A8_UNORM: 427 c.color[2] = c.color[3]; 428 break; 429 430 default:; 431 } 432 } 433 434 if (r300->screen->caps.is_r500) { 435 BEGIN_CB(state->cb, 3); 436 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2); 437 438 switch (format) { 439 case PIPE_FORMAT_R16G16B16A16_FLOAT: 440 OUT_CB(util_float_to_half(c.color[2]) | 441 (util_float_to_half(c.color[3]) << 16)); 442 OUT_CB(util_float_to_half(c.color[0]) | 443 (util_float_to_half(c.color[1]) << 16)); 444 break; 445 446 default: 447 OUT_CB(float_to_fixed10(c.color[0]) | 448 (float_to_fixed10(c.color[3]) << 16)); 449 OUT_CB(float_to_fixed10(c.color[2]) | 450 (float_to_fixed10(c.color[1]) << 16)); 451 } 452 453 END_CB; 454 } else { 455 union util_color uc; 456 util_pack_color(c.color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 457 458 BEGIN_CB(state->cb, 2); 459 OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui); 460 END_CB; 461 } 462 463 r300_mark_atom_dirty(r300, &r300->blend_color_state); 464} 465 466static void r300_set_clip_state(struct pipe_context* pipe, 467 const struct pipe_clip_state* state) 468{ 469 struct r300_context* r300 = r300_context(pipe); 470 struct r300_clip_state *clip = 471 (struct r300_clip_state*)r300->clip_state.state; 472 CB_LOCALS; 473 474 clip->clip = *state; 475 476 if (r300->screen->caps.has_tcl) { 477 r300->clip_state.size = 2 + !!state->nr * 3 + state->nr * 4; 478 479 BEGIN_CB(clip->cb, r300->clip_state.size); 480 if (state->nr) { 481 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG, 482 (r300->screen->caps.is_r500 ? 483 R500_PVS_UCP_START : R300_PVS_UCP_START)); 484 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, state->nr * 4); 485 OUT_CB_TABLE(state->ucp, state->nr * 4); 486 } 487 OUT_CB_REG(R300_VAP_CLIP_CNTL, ((1 << state->nr) - 1) | 488 R300_PS_UCP_MODE_CLIP_AS_TRIFAN); 489 END_CB; 490 491 r300_mark_atom_dirty(r300, &r300->clip_state); 492 } else { 493 draw_set_clip_state(r300->draw, state); 494 } 495} 496 497static void 498r300_set_sample_mask(struct pipe_context *pipe, 499 unsigned sample_mask) 500{ 501} 502 503 504/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 505 * 506 * This contains the depth buffer, stencil buffer, alpha test, and such. 507 * On the Radeon, depth and stencil buffer setup are intertwined, which is 508 * the reason for some of the strange-looking assignments across registers. */ 509static void* 510 r300_create_dsa_state(struct pipe_context* pipe, 511 const struct pipe_depth_stencil_alpha_state* state) 512{ 513 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps; 514 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 515 CB_LOCALS; 516 517 dsa->dsa = *state; 518 519 /* Depth test setup. - separate write mask depth for decomp flush */ 520 if (state->depth.writemask) { 521 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 522 } 523 524 if (state->depth.enabled) { 525 dsa->z_buffer_control |= R300_Z_ENABLE; 526 527 dsa->z_stencil_control |= 528 (r300_translate_depth_stencil_function(state->depth.func) << 529 R300_Z_FUNC_SHIFT); 530 } 531 532 /* Stencil buffer setup. */ 533 if (state->stencil[0].enabled) { 534 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 535 dsa->z_stencil_control |= 536 (r300_translate_depth_stencil_function(state->stencil[0].func) << 537 R300_S_FRONT_FUNC_SHIFT) | 538 (r300_translate_stencil_op(state->stencil[0].fail_op) << 539 R300_S_FRONT_SFAIL_OP_SHIFT) | 540 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 541 R300_S_FRONT_ZPASS_OP_SHIFT) | 542 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 543 R300_S_FRONT_ZFAIL_OP_SHIFT); 544 545 dsa->stencil_ref_mask = 546 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 547 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 548 549 if (state->stencil[1].enabled) { 550 dsa->two_sided = TRUE; 551 552 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 553 dsa->z_stencil_control |= 554 (r300_translate_depth_stencil_function(state->stencil[1].func) << 555 R300_S_BACK_FUNC_SHIFT) | 556 (r300_translate_stencil_op(state->stencil[1].fail_op) << 557 R300_S_BACK_SFAIL_OP_SHIFT) | 558 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 559 R300_S_BACK_ZPASS_OP_SHIFT) | 560 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 561 R300_S_BACK_ZFAIL_OP_SHIFT); 562 563 dsa->stencil_ref_bf = 564 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 565 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 566 567 if (caps->is_r500) { 568 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 569 } else { 570 dsa->two_sided_stencil_ref = 571 (state->stencil[0].valuemask != state->stencil[1].valuemask || 572 state->stencil[0].writemask != state->stencil[1].writemask); 573 } 574 } 575 } 576 577 /* Alpha test setup. */ 578 if (state->alpha.enabled) { 579 dsa->alpha_function = 580 r300_translate_alpha_function(state->alpha.func) | 581 R300_FG_ALPHA_FUNC_ENABLE; 582 583 /* We could use 10bit alpha ref but who needs that? */ 584 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 585 586 if (caps->is_r500) 587 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 588 } 589 590 BEGIN_CB(&dsa->cb_begin, 8); 591 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); 592 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3); 593 OUT_CB(dsa->z_buffer_control); 594 OUT_CB(dsa->z_stencil_control); 595 OUT_CB(dsa->stencil_ref_mask); 596 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); 597 END_CB; 598 599 BEGIN_CB(dsa->cb_no_readwrite, 8); 600 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); 601 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3); 602 OUT_CB(0); 603 OUT_CB(0); 604 OUT_CB(0); 605 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0); 606 END_CB; 607 608 return (void*)dsa; 609} 610 611static void r300_dsa_inject_stencilref(struct r300_context *r300) 612{ 613 struct r300_dsa_state *dsa = 614 (struct r300_dsa_state*)r300->dsa_state.state; 615 616 if (!dsa) 617 return; 618 619 dsa->stencil_ref_mask = 620 (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) | 621 r300->stencil_ref.ref_value[0]; 622 dsa->stencil_ref_bf = 623 (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) | 624 r300->stencil_ref.ref_value[1]; 625} 626 627/* Bind DSA state. */ 628static void r300_bind_dsa_state(struct pipe_context* pipe, 629 void* state) 630{ 631 struct r300_context* r300 = r300_context(pipe); 632 633 if (!state) { 634 return; 635 } 636 637 UPDATE_STATE(state, r300->dsa_state); 638 639 r300_mark_atom_dirty(r300, &r300->hyperz_state); /* Will be updated before the emission. */ 640 r300_dsa_inject_stencilref(r300); 641} 642 643/* Free DSA state. */ 644static void r300_delete_dsa_state(struct pipe_context* pipe, 645 void* state) 646{ 647 FREE(state); 648} 649 650static void r300_set_stencil_ref(struct pipe_context* pipe, 651 const struct pipe_stencil_ref* sr) 652{ 653 struct r300_context* r300 = r300_context(pipe); 654 655 r300->stencil_ref = *sr; 656 657 r300_dsa_inject_stencilref(r300); 658 r300_mark_atom_dirty(r300, &r300->dsa_state); 659} 660 661static void r300_tex_set_tiling_flags(struct r300_context *r300, 662 struct r300_resource *tex, 663 unsigned level) 664{ 665 /* Check if the macrotile flag needs to be changed. 666 * Skip changing the flags otherwise. */ 667 if (tex->tex.macrotile[tex->surface_level] != 668 tex->tex.macrotile[level]) { 669 r300->rws->buffer_set_tiling(tex->buf, r300->cs, 670 tex->tex.microtile, tex->tex.macrotile[level], 671 tex->tex.stride_in_bytes[0]); 672 673 tex->surface_level = level; 674 } 675} 676 677/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 678static void r300_fb_set_tiling_flags(struct r300_context *r300, 679 const struct pipe_framebuffer_state *state) 680{ 681 unsigned i; 682 683 /* Set tiling flags for new surfaces. */ 684 for (i = 0; i < state->nr_cbufs; i++) { 685 r300_tex_set_tiling_flags(r300, 686 r300_resource(state->cbufs[i]->texture), 687 state->cbufs[i]->u.tex.level); 688 } 689 if (state->zsbuf) { 690 r300_tex_set_tiling_flags(r300, 691 r300_resource(state->zsbuf->texture), 692 state->zsbuf->u.tex.level); 693 } 694} 695 696static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index, 697 const char *binding) 698{ 699 struct pipe_resource *tex = surf->texture; 700 struct r300_resource *rtex = r300_resource(tex); 701 702 fprintf(stderr, 703 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, " 704 "Lastlayer: %i, Level: %i, Format: %s\n" 705 706 "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, " 707 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n", 708 709 binding, index, surf->width, surf->height, 710 surf->u.tex.first_layer, surf->u.tex.last_layer, surf->u.tex.level, 711 util_format_short_name(surf->format), 712 713 rtex->tex.macrotile[0] ? "YES" : " NO", 714 rtex->tex.microtile ? "YES" : " NO", 715 rtex->tex.stride_in_pixels[0], 716 tex->width0, tex->height0, tex->depth0, 717 tex->last_level, util_format_short_name(tex->format)); 718} 719 720void r300_mark_fb_state_dirty(struct r300_context *r300, 721 enum r300_fb_state_change change) 722{ 723 struct pipe_framebuffer_state *state = r300->fb_state.state; 724 boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ); 725 726 r300_mark_atom_dirty(r300, &r300->gpu_flush); 727 r300_mark_atom_dirty(r300, &r300->fb_state); 728 729 /* What is marked as dirty depends on the enum r300_fb_state_change. */ 730 if (change == R300_CHANGED_FB_STATE) { 731 r300_mark_atom_dirty(r300, &r300->aa_state); 732 r300_set_blend_color(&r300->context, r300->blend_color_state.state); 733 } 734 735 if (change == R300_CHANGED_FB_STATE || 736 change == R300_CHANGED_HYPERZ_FLAG) { 737 r300_mark_atom_dirty(r300, &r300->hyperz_state); 738 } 739 740 if (change == R300_CHANGED_FB_STATE || 741 change == R300_CHANGED_MULTIWRITE) { 742 r300_mark_atom_dirty(r300, &r300->fb_state_pipelined); 743 } 744 745 /* Now compute the fb_state atom size. */ 746 r300->fb_state.size = 2 + (8 * state->nr_cbufs); 747 748 if (r300->cbzb_clear) 749 r300->fb_state.size += 10; 750 else if (state->zsbuf) { 751 r300->fb_state.size += 10; 752 if (can_hyperz) 753 r300->fb_state.size += 8; 754 } 755 756 /* The size of the rest of atoms stays the same. */ 757} 758 759static void 760r300_set_framebuffer_state(struct pipe_context* pipe, 761 const struct pipe_framebuffer_state* state) 762{ 763 struct r300_context* r300 = r300_context(pipe); 764 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state; 765 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 766 unsigned max_width, max_height, i; 767 uint32_t zbuffer_bpp = 0; 768 769 if (r300->screen->caps.is_r500) { 770 max_width = max_height = 4096; 771 } else if (r300->screen->caps.is_r400) { 772 max_width = max_height = 4021; 773 } else { 774 max_width = max_height = 2560; 775 } 776 777 if (state->width > max_width || state->height > max_height) { 778 fprintf(stderr, "r300: Implementation error: Render targets are too " 779 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 780 return; 781 } 782 783 if (old_state->zsbuf && r300->zmask_in_use && !r300->hyperz_locked) { 784 /* There is a zmask in use, what are we gonna do? */ 785 if (state->zsbuf) { 786 if (!pipe_surface_equal(old_state->zsbuf, state->zsbuf)) { 787 /* Decompress the currently bound zbuffer before we bind another one. */ 788 r300_decompress_zmask(r300); 789 r300->hiz_in_use = FALSE; 790 } 791 } else { 792 /* We don't bind another zbuffer, so lock the current one. */ 793 r300->hyperz_locked = TRUE; 794 pipe_surface_reference(&r300->locked_zbuffer, old_state->zsbuf); 795 } 796 } else if (r300->hyperz_locked && r300->locked_zbuffer) { 797 /* We have a locked zbuffer now, what are we gonna do? */ 798 if (state->zsbuf) { 799 if (!pipe_surface_equal(r300->locked_zbuffer, state->zsbuf)) { 800 /* We are binding some other zbuffer, so decompress the locked one, 801 * it gets unlocked automatically. */ 802 r300_decompress_zmask_locked_unsafe(r300); 803 r300->hiz_in_use = FALSE; 804 } else { 805 /* We are binding the locked zbuffer again, so unlock it. */ 806 r300->hyperz_locked = FALSE; 807 } 808 } 809 } 810 811 /* If nr_cbufs is changed from zero to non-zero or vice versa... */ 812 if (!!old_state->nr_cbufs != !!state->nr_cbufs) { 813 r300_mark_atom_dirty(r300, &r300->blend_state); 814 } 815 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 816 if (!!old_state->zsbuf != !!state->zsbuf) { 817 r300_mark_atom_dirty(r300, &r300->dsa_state); 818 } 819 820 /* The tiling flags are dependent on the surface miplevel, unfortunately. */ 821 r300_fb_set_tiling_flags(r300, state); 822 823 util_copy_framebuffer_state(r300->fb_state.state, state); 824 825 if (!r300->hyperz_locked) { 826 pipe_surface_reference(&r300->locked_zbuffer, NULL); 827 } 828 829 r300_mark_fb_state_dirty(r300, R300_CHANGED_FB_STATE); 830 831 if (state->zsbuf) { 832 switch (util_format_get_blocksize(state->zsbuf->texture->format)) { 833 case 2: 834 zbuffer_bpp = 16; 835 break; 836 case 4: 837 zbuffer_bpp = 24; 838 break; 839 } 840 841 /* Polygon offset depends on the zbuffer bit depth. */ 842 if (r300->zbuffer_bpp != zbuffer_bpp) { 843 r300->zbuffer_bpp = zbuffer_bpp; 844 845 if (r300->polygon_offset_enabled) 846 r300_mark_atom_dirty(r300, &r300->rs_state); 847 } 848 } 849 850 /* Set up AA config. */ 851 if (state->nr_cbufs && state->cbufs[0]->texture->nr_samples > 1) { 852 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE; 853 854 switch (state->cbufs[0]->texture->nr_samples) { 855 case 2: 856 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2; 857 break; 858 case 3: 859 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3; 860 break; 861 case 4: 862 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4; 863 break; 864 case 6: 865 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6; 866 break; 867 } 868 } else { 869 aa->aa_config = 0; 870 } 871 872 if (DBG_ON(r300, DBG_FB)) { 873 fprintf(stderr, "r300: set_framebuffer_state:\n"); 874 for (i = 0; i < state->nr_cbufs; i++) { 875 r300_print_fb_surf_info(state->cbufs[i], i, "CB"); 876 } 877 if (state->zsbuf) { 878 r300_print_fb_surf_info(state->zsbuf, 0, "ZB"); 879 } 880 } 881} 882 883/* Create fragment shader state. */ 884static void* r300_create_fs_state(struct pipe_context* pipe, 885 const struct pipe_shader_state* shader) 886{ 887 struct r300_fragment_shader* fs = NULL; 888 889 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 890 891 /* Copy state directly into shader. */ 892 fs->state = *shader; 893 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 894 895 return (void*)fs; 896} 897 898void r300_mark_fs_code_dirty(struct r300_context *r300) 899{ 900 struct r300_fragment_shader* fs = r300_fs(r300); 901 902 r300_mark_atom_dirty(r300, &r300->fs); 903 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state); 904 r300_mark_atom_dirty(r300, &r300->fs_constants); 905 r300->fs.size = fs->shader->cb_code_size; 906 907 if (r300->screen->caps.is_r500) { 908 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7; 909 r300->fs_constants.size = fs->shader->externals_count * 4 + 3; 910 } else { 911 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5; 912 r300->fs_constants.size = fs->shader->externals_count * 4 + 1; 913 } 914 915 ((struct r300_constant_buffer*)r300->fs_constants.state)->remap_table = 916 fs->shader->code.constants_remap_table; 917} 918 919/* Bind fragment shader state. */ 920static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 921{ 922 struct r300_context* r300 = r300_context(pipe); 923 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 924 struct pipe_framebuffer_state *fb = r300->fb_state.state; 925 boolean last_multi_write; 926 927 if (fs == NULL) { 928 r300->fs.state = NULL; 929 return; 930 } 931 932 last_multi_write = r300_fragment_shader_writes_all(r300_fs(r300)); 933 934 r300->fs.state = fs; 935 r300_pick_fragment_shader(r300); 936 r300_mark_fs_code_dirty(r300); 937 938 if (fb->nr_cbufs > 1 && 939 last_multi_write != r300_fragment_shader_writes_all(fs)) { 940 r300_mark_fb_state_dirty(r300, R300_CHANGED_MULTIWRITE); 941 } 942 943 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */ 944} 945 946/* Delete fragment shader state. */ 947static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 948{ 949 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 950 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 951 952 while (ptr) { 953 tmp = ptr; 954 ptr = ptr->next; 955 rc_constants_destroy(&tmp->code.constants); 956 FREE(tmp->cb_code); 957 FREE(tmp); 958 } 959 FREE((void*)fs->state.tokens); 960 FREE(shader); 961} 962 963static void r300_set_polygon_stipple(struct pipe_context* pipe, 964 const struct pipe_poly_stipple* state) 965{ 966 /* XXX no idea how to set this up, but not terribly important */ 967} 968 969/* Create a new rasterizer state based on the CSO rasterizer state. 970 * 971 * This is a very large chunk of state, and covers most of the graphics 972 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 973 * 974 * In a not entirely unironic sidenote, this state has nearly nothing to do 975 * with the actual block on the Radeon called the rasterizer (RS). */ 976static void* r300_create_rs_state(struct pipe_context* pipe, 977 const struct pipe_rasterizer_state* state) 978{ 979 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 980 float psiz; 981 uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ 982 uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */ 983 uint32_t point_minmax; /* R300_GA_POINT_MINMAX: 0x4230 */ 984 uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */ 985 uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */ 986 uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */ 987 uint32_t line_stipple_config; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */ 988 uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */ 989 uint32_t polygon_mode; /* R300_GA_POLY_MODE: 0x4288 */ 990 uint32_t clip_rule; /* R300_SC_CLIP_RULE: 0x43D0 */ 991 992 /* Point sprites texture coordinates, 0: lower left, 1: upper right */ 993 float point_texcoord_left = 0; /* R300_GA_POINT_S0: 0x4200 */ 994 float point_texcoord_bottom = 0;/* R300_GA_POINT_T0: 0x4204 */ 995 float point_texcoord_right = 1; /* R300_GA_POINT_S1: 0x4208 */ 996 float point_texcoord_top = 0; /* R300_GA_POINT_T1: 0x420c */ 997 CB_LOCALS; 998 999 /* Copy rasterizer state. */ 1000 rs->rs = *state; 1001 rs->rs_draw = *state; 1002 1003 rs->rs.sprite_coord_enable = state->point_quad_rasterization * 1004 state->sprite_coord_enable; 1005 1006 /* Override some states for Draw. */ 1007 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */ 1008 1009#ifdef PIPE_ARCH_LITTLE_ENDIAN 1010 vap_control_status = R300_VC_NO_SWAP; 1011#else 1012 vap_control_status = R300_VC_32BIT_SWAP; 1013#endif 1014 1015 /* If no TCL engine is present, turn off the HW TCL. */ 1016 if (!r300_screen(pipe->screen)->caps.has_tcl) { 1017 vap_control_status |= R300_VAP_TCL_BYPASS; 1018 } 1019 1020 /* Point size width and height. */ 1021 point_size = 1022 pack_float_16_6x(state->point_size) | 1023 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 1024 1025 /* Point size clamping. */ 1026 if (state->point_size_per_vertex) { 1027 /* Per-vertex point size. 1028 * Clamp to [0, max FB size] */ 1029 psiz = pipe->screen->get_paramf(pipe->screen, 1030 PIPE_CAP_MAX_POINT_WIDTH); 1031 point_minmax = 1032 pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT; 1033 } else { 1034 /* We cannot disable the point-size vertex output, 1035 * so clamp it. */ 1036 psiz = state->point_size; 1037 point_minmax = 1038 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) | 1039 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT); 1040 } 1041 1042 /* Line control. */ 1043 line_control = pack_float_16_6x(state->line_width) | 1044 R300_GA_LINE_CNTL_END_TYPE_COMP; 1045 1046 /* Enable polygon mode */ 1047 polygon_mode = 0; 1048 if (state->fill_front != PIPE_POLYGON_MODE_FILL || 1049 state->fill_back != PIPE_POLYGON_MODE_FILL) { 1050 polygon_mode = R300_GA_POLY_MODE_DUAL; 1051 } 1052 1053 /* Front face */ 1054 if (state->front_ccw) 1055 cull_mode = R300_FRONT_FACE_CCW; 1056 else 1057 cull_mode = R300_FRONT_FACE_CW; 1058 1059 /* Polygon offset */ 1060 polygon_offset_enable = 0; 1061 if (util_get_offset(state, state->fill_front)) { 1062 polygon_offset_enable |= R300_FRONT_ENABLE; 1063 } 1064 if (util_get_offset(state, state->fill_back)) { 1065 polygon_offset_enable |= R300_BACK_ENABLE; 1066 } 1067 1068 rs->polygon_offset_enable = polygon_offset_enable != 0; 1069 1070 /* Polygon mode */ 1071 if (polygon_mode) { 1072 polygon_mode |= 1073 r300_translate_polygon_mode_front(state->fill_front); 1074 polygon_mode |= 1075 r300_translate_polygon_mode_back(state->fill_back); 1076 } 1077 1078 if (state->cull_face & PIPE_FACE_FRONT) { 1079 cull_mode |= R300_CULL_FRONT; 1080 } 1081 if (state->cull_face & PIPE_FACE_BACK) { 1082 cull_mode |= R300_CULL_BACK; 1083 } 1084 1085 if (state->line_stipple_enable) { 1086 line_stipple_config = 1087 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 1088 (fui((float)state->line_stipple_factor) & 1089 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 1090 /* XXX this might need to be scaled up */ 1091 line_stipple_value = state->line_stipple_pattern; 1092 } else { 1093 line_stipple_config = 0; 1094 line_stipple_value = 0; 1095 } 1096 1097 if (state->flatshade) { 1098 rs->color_control = R300_SHADE_MODEL_FLAT; 1099 } else { 1100 rs->color_control = R300_SHADE_MODEL_SMOOTH; 1101 } 1102 1103 clip_rule = state->scissor ? 0xAAAA : 0xFFFF; 1104 1105 /* Point sprites coord mode */ 1106 if (rs->rs.sprite_coord_enable) { 1107 switch (state->sprite_coord_mode) { 1108 case PIPE_SPRITE_COORD_UPPER_LEFT: 1109 point_texcoord_top = 0.0f; 1110 point_texcoord_bottom = 1.0f; 1111 break; 1112 case PIPE_SPRITE_COORD_LOWER_LEFT: 1113 point_texcoord_top = 1.0f; 1114 point_texcoord_bottom = 0.0f; 1115 break; 1116 } 1117 } 1118 1119 /* Build the main command buffer. */ 1120 BEGIN_CB(rs->cb_main, RS_STATE_MAIN_SIZE); 1121 OUT_CB_REG(R300_VAP_CNTL_STATUS, vap_control_status); 1122 OUT_CB_REG(R300_GA_POINT_SIZE, point_size); 1123 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX, 2); 1124 OUT_CB(point_minmax); 1125 OUT_CB(line_control); 1126 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2); 1127 OUT_CB(polygon_offset_enable); 1128 rs->cull_mode_index = 9; 1129 OUT_CB(cull_mode); 1130 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG, line_stipple_config); 1131 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE, line_stipple_value); 1132 OUT_CB_REG(R300_GA_POLY_MODE, polygon_mode); 1133 OUT_CB_REG(R300_SC_CLIP_RULE, clip_rule); 1134 OUT_CB_REG_SEQ(R300_GA_POINT_S0, 4); 1135 OUT_CB_32F(point_texcoord_left); 1136 OUT_CB_32F(point_texcoord_bottom); 1137 OUT_CB_32F(point_texcoord_right); 1138 OUT_CB_32F(point_texcoord_top); 1139 END_CB; 1140 1141 /* Build the two command buffers for polygon offset setup. */ 1142 if (polygon_offset_enable) { 1143 float scale = state->offset_scale * 12; 1144 float offset = state->offset_units * 4; 1145 1146 BEGIN_CB(rs->cb_poly_offset_zb16, 5); 1147 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4); 1148 OUT_CB_32F(scale); 1149 OUT_CB_32F(offset); 1150 OUT_CB_32F(scale); 1151 OUT_CB_32F(offset); 1152 END_CB; 1153 1154 offset = state->offset_units * 2; 1155 1156 BEGIN_CB(rs->cb_poly_offset_zb24, 5); 1157 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4); 1158 OUT_CB_32F(scale); 1159 OUT_CB_32F(offset); 1160 OUT_CB_32F(scale); 1161 OUT_CB_32F(offset); 1162 END_CB; 1163 } 1164 1165 return (void*)rs; 1166} 1167 1168/* Bind rasterizer state. */ 1169static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 1170{ 1171 struct r300_context* r300 = r300_context(pipe); 1172 struct r300_rs_state* rs = (struct r300_rs_state*)state; 1173 int last_sprite_coord_enable = r300->sprite_coord_enable; 1174 boolean last_two_sided_color = r300->two_sided_color; 1175 1176 if (r300->draw && rs) { 1177 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state); 1178 } 1179 1180 if (rs) { 1181 r300->polygon_offset_enabled = rs->polygon_offset_enable; 1182 r300->sprite_coord_enable = rs->rs.sprite_coord_enable; 1183 r300->two_sided_color = rs->rs.light_twoside; 1184 } else { 1185 r300->polygon_offset_enabled = FALSE; 1186 r300->sprite_coord_enable = 0; 1187 r300->two_sided_color = FALSE; 1188 } 1189 1190 UPDATE_STATE(state, r300->rs_state); 1191 r300->rs_state.size = RS_STATE_MAIN_SIZE + (r300->polygon_offset_enabled ? 5 : 0); 1192 1193 if (last_sprite_coord_enable != r300->sprite_coord_enable || 1194 last_two_sided_color != r300->two_sided_color) { 1195 r300_mark_atom_dirty(r300, &r300->rs_block_state); 1196 } 1197} 1198 1199/* Free rasterizer state. */ 1200static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 1201{ 1202 FREE(state); 1203} 1204 1205static void* 1206 r300_create_sampler_state(struct pipe_context* pipe, 1207 const struct pipe_sampler_state* state) 1208{ 1209 struct r300_context* r300 = r300_context(pipe); 1210 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 1211 boolean is_r500 = r300->screen->caps.is_r500; 1212 int lod_bias; 1213 1214 sampler->state = *state; 1215 1216 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG 1217 * or MIN filter is NEAREST. Since texwrap produces same results 1218 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */ 1219 if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST || 1220 sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) { 1221 /* Wrap S. */ 1222 if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP) 1223 sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 1224 else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP) 1225 sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE; 1226 1227 /* Wrap T. */ 1228 if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP) 1229 sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 1230 else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP) 1231 sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE; 1232 1233 /* Wrap R. */ 1234 if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP) 1235 sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 1236 else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP) 1237 sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE; 1238 } 1239 1240 sampler->filter0 |= 1241 (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) | 1242 (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) | 1243 (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT); 1244 1245 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 1246 state->mag_img_filter, 1247 state->min_mip_filter, 1248 state->max_anisotropy > 0); 1249 1250 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 1251 1252 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 1253 /* We must pass these to the merge function to clamp them properly. */ 1254 sampler->min_lod = (unsigned)MAX2(state->min_lod, 0); 1255 sampler->max_lod = (unsigned)MAX2(ceilf(state->max_lod), 0); 1256 1257 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1); 1258 1259 sampler->filter1 |= (lod_bias << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK; 1260 1261 /* This is very high quality anisotropic filtering for R5xx. 1262 * It's good for benchmarking the performance of texturing but 1263 * in practice we don't want to slow down the driver because it's 1264 * a pretty good performance killer. Feel free to play with it. */ 1265 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 1266 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 1267 } 1268 1269 /* R500-specific fixups and optimizations */ 1270 if (r300->screen->caps.is_r500) { 1271 sampler->filter1 |= R500_BORDER_FIX; 1272 } 1273 1274 return (void*)sampler; 1275} 1276 1277static void r300_bind_sampler_states(struct pipe_context* pipe, 1278 unsigned count, 1279 void** states) 1280{ 1281 struct r300_context* r300 = r300_context(pipe); 1282 struct r300_textures_state* state = 1283 (struct r300_textures_state*)r300->textures_state.state; 1284 unsigned tex_units = r300->screen->caps.num_tex_units; 1285 1286 if (count > tex_units) { 1287 return; 1288 } 1289 1290 memcpy(state->sampler_states, states, sizeof(void*) * count); 1291 state->sampler_state_count = count; 1292 1293 r300_mark_atom_dirty(r300, &r300->textures_state); 1294} 1295 1296static void r300_lacks_vertex_textures(struct pipe_context* pipe, 1297 unsigned count, 1298 void** states) 1299{ 1300} 1301 1302static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 1303{ 1304 FREE(state); 1305} 1306 1307static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num) 1308{ 1309 /* This looks like a hack, but I believe it's suppose to work like 1310 * that. To illustrate how this works, let's assume you have 5 textures. 1311 * From docs, 5 and the successive numbers are: 1312 * 1313 * FOURTH_1 = 5 1314 * FOURTH_2 = 6 1315 * FOURTH_3 = 7 1316 * EIGHTH_0 = 8 1317 * EIGHTH_1 = 9 1318 * 1319 * First 3 textures will get 3/4 of size of the cache, divived evenly 1320 * between them. The last 1/4 of the cache must be divided between 1321 * the last 2 textures, each will therefore get 1/8 of the cache. 1322 * Why not just to use "5 + texture_index" ? 1323 * 1324 * This simple trick works for all "num" <= 16. 1325 */ 1326 if (num <= 1) 1327 return R300_TX_CACHE(R300_TX_CACHE_WHOLE); 1328 else 1329 return R300_TX_CACHE(num + index); 1330} 1331 1332static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 1333 unsigned count, 1334 struct pipe_sampler_view** views) 1335{ 1336 struct r300_context* r300 = r300_context(pipe); 1337 struct r300_textures_state* state = 1338 (struct r300_textures_state*)r300->textures_state.state; 1339 struct r300_resource *texture; 1340 unsigned i, real_num_views = 0, view_index = 0; 1341 unsigned tex_units = r300->screen->caps.num_tex_units; 1342 boolean dirty_tex = FALSE; 1343 1344 if (count > tex_units) { 1345 return; 1346 } 1347 1348 /* Calculate the real number of views. */ 1349 for (i = 0; i < count; i++) { 1350 if (views[i]) 1351 real_num_views++; 1352 } 1353 1354 for (i = 0; i < count; i++) { 1355 pipe_sampler_view_reference( 1356 (struct pipe_sampler_view**)&state->sampler_views[i], 1357 views[i]); 1358 1359 if (!views[i]) { 1360 continue; 1361 } 1362 1363 /* A new sampler view (= texture)... */ 1364 dirty_tex = TRUE; 1365 1366 /* Set the texrect factor in the fragment shader. 1367 * Needed for RECT and NPOT fallback. */ 1368 texture = r300_resource(views[i]->texture); 1369 if (texture->tex.is_npot) { 1370 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state); 1371 } 1372 1373 state->sampler_views[i]->texcache_region = 1374 r300_assign_texture_cache_region(view_index, real_num_views); 1375 view_index++; 1376 } 1377 1378 for (i = count; i < tex_units; i++) { 1379 if (state->sampler_views[i]) { 1380 pipe_sampler_view_reference( 1381 (struct pipe_sampler_view**)&state->sampler_views[i], 1382 NULL); 1383 } 1384 } 1385 1386 state->sampler_view_count = count; 1387 1388 r300_mark_atom_dirty(r300, &r300->textures_state); 1389 1390 if (dirty_tex) { 1391 r300_mark_atom_dirty(r300, &r300->texture_cache_inval); 1392 } 1393} 1394 1395static struct pipe_sampler_view * 1396r300_create_sampler_view(struct pipe_context *pipe, 1397 struct pipe_resource *texture, 1398 const struct pipe_sampler_view *templ) 1399{ 1400 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view); 1401 struct r300_resource *tex = r300_resource(texture); 1402 boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500; 1403 boolean dxtc_swizzle = r300_screen(pipe->screen)->caps.dxtc_swizzle; 1404 1405 if (view) { 1406 view->base = *templ; 1407 view->base.reference.count = 1; 1408 view->base.context = pipe; 1409 view->base.texture = NULL; 1410 pipe_resource_reference(&view->base.texture, texture); 1411 1412 view->swizzle[0] = templ->swizzle_r; 1413 view->swizzle[1] = templ->swizzle_g; 1414 view->swizzle[2] = templ->swizzle_b; 1415 view->swizzle[3] = templ->swizzle_a; 1416 1417 view->format = tex->tx_format; 1418 view->format.format1 |= r300_translate_texformat(templ->format, 1419 view->swizzle, 1420 is_r500, 1421 dxtc_swizzle); 1422 if (is_r500) { 1423 view->format.format2 |= r500_tx_format_msb_bit(templ->format); 1424 } 1425 } 1426 1427 return (struct pipe_sampler_view*)view; 1428} 1429 1430static void 1431r300_sampler_view_destroy(struct pipe_context *pipe, 1432 struct pipe_sampler_view *view) 1433{ 1434 pipe_resource_reference(&view->texture, NULL); 1435 FREE(view); 1436} 1437 1438static void r300_set_scissor_state(struct pipe_context* pipe, 1439 const struct pipe_scissor_state* state) 1440{ 1441 struct r300_context* r300 = r300_context(pipe); 1442 1443 memcpy(r300->scissor_state.state, state, 1444 sizeof(struct pipe_scissor_state)); 1445 1446 r300_mark_atom_dirty(r300, &r300->scissor_state); 1447} 1448 1449static void r300_set_viewport_state(struct pipe_context* pipe, 1450 const struct pipe_viewport_state* state) 1451{ 1452 struct r300_context* r300 = r300_context(pipe); 1453 struct r300_viewport_state* viewport = 1454 (struct r300_viewport_state*)r300->viewport_state.state; 1455 1456 r300->viewport = *state; 1457 1458 if (r300->draw) { 1459 draw_set_viewport_state(r300->draw, state); 1460 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT; 1461 return; 1462 } 1463 1464 /* Do the transform in HW. */ 1465 viewport->vte_control = R300_VTX_W0_FMT; 1466 1467 if (state->scale[0] != 1.0f) { 1468 viewport->xscale = state->scale[0]; 1469 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1470 } 1471 if (state->scale[1] != 1.0f) { 1472 viewport->yscale = state->scale[1]; 1473 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1474 } 1475 if (state->scale[2] != 1.0f) { 1476 viewport->zscale = state->scale[2]; 1477 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1478 } 1479 if (state->translate[0] != 0.0f) { 1480 viewport->xoffset = state->translate[0]; 1481 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1482 } 1483 if (state->translate[1] != 0.0f) { 1484 viewport->yoffset = state->translate[1]; 1485 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1486 } 1487 if (state->translate[2] != 0.0f) { 1488 viewport->zoffset = state->translate[2]; 1489 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1490 } 1491 1492 r300_mark_atom_dirty(r300, &r300->viewport_state); 1493 if (r300->fs.state && r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) { 1494 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state); 1495 } 1496} 1497 1498static void r300_set_vertex_buffers(struct pipe_context* pipe, 1499 unsigned count, 1500 const struct pipe_vertex_buffer* buffers) 1501{ 1502 struct r300_context* r300 = r300_context(pipe); 1503 unsigned i; 1504 struct pipe_vertex_buffer dummy_vb = {0}; 1505 1506 /* There must be at least one vertex buffer set, otherwise it locks up. */ 1507 if (!count) { 1508 dummy_vb.buffer = r300->dummy_vb; 1509 buffers = &dummy_vb; 1510 count = 1; 1511 } 1512 1513 u_vbuf_mgr_set_vertex_buffers(r300->vbuf_mgr, count, buffers); 1514 1515 if (r300->screen->caps.has_tcl) { 1516 /* HW TCL. */ 1517 for (i = 0; i < count; i++) { 1518 if (buffers[i].buffer && 1519 !r300_resource(buffers[i].buffer)->b.user_ptr) { 1520 } 1521 } 1522 r300->vertex_arrays_dirty = TRUE; 1523 } else { 1524 /* SW TCL. */ 1525 draw_set_vertex_buffers(r300->draw, count, buffers); 1526 } 1527} 1528 1529static void r300_set_index_buffer(struct pipe_context* pipe, 1530 const struct pipe_index_buffer *ib) 1531{ 1532 struct r300_context* r300 = r300_context(pipe); 1533 1534 if (ib && ib->buffer) { 1535 assert(ib->offset % ib->index_size == 0); 1536 1537 pipe_resource_reference(&r300->index_buffer.buffer, ib->buffer); 1538 memcpy(&r300->index_buffer, ib, sizeof(r300->index_buffer)); 1539 r300->index_buffer.offset /= r300->index_buffer.index_size; 1540 } 1541 else { 1542 pipe_resource_reference(&r300->index_buffer.buffer, NULL); 1543 memset(&r300->index_buffer, 0, sizeof(r300->index_buffer)); 1544 } 1545 1546 if (!r300->screen->caps.has_tcl) { 1547 draw_set_index_buffer(r300->draw, ib); 1548 } 1549} 1550 1551/* Initialize the PSC tables. */ 1552static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1553{ 1554 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1555 uint16_t type, swizzle; 1556 enum pipe_format format; 1557 unsigned i; 1558 1559 if (velems->count > 16) { 1560 fprintf(stderr, "r300: More than 16 vertex elements are not supported," 1561 " requested %i, using 16.\n", velems->count); 1562 velems->count = 16; 1563 } 1564 1565 /* Vertex shaders have no semantics on their inputs, 1566 * so PSC should just route stuff based on the vertex elements, 1567 * and not on attrib information. */ 1568 for (i = 0; i < velems->count; i++) { 1569 format = velems->velem[i].src_format; 1570 1571 type = r300_translate_vertex_data_type(format); 1572 if (type == R300_INVALID_FORMAT) { 1573 fprintf(stderr, "r300: Bad vertex format %s.\n", 1574 util_format_short_name(format)); 1575 assert(0); 1576 abort(); 1577 } 1578 1579 type |= i << R300_DST_VEC_LOC_SHIFT; 1580 swizzle = r300_translate_vertex_data_swizzle(format); 1581 1582 if (i & 1) { 1583 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1584 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1585 } else { 1586 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1587 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1588 } 1589 } 1590 1591 /* Set the last vector in the PSC. */ 1592 if (i) { 1593 i -= 1; 1594 } 1595 vstream->vap_prog_stream_cntl[i >> 1] |= 1596 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1597 1598 vstream->count = (i >> 1) + 1; 1599} 1600 1601static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1602 unsigned count, 1603 const struct pipe_vertex_element* attribs) 1604{ 1605 struct r300_context *r300 = r300_context(pipe); 1606 struct r300_vertex_element_state *velems; 1607 unsigned i; 1608 struct pipe_vertex_element dummy_attrib = {0}; 1609 1610 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */ 1611 if (!count) { 1612 dummy_attrib.src_format = PIPE_FORMAT_R8G8B8A8_UNORM; 1613 attribs = &dummy_attrib; 1614 count = 1; 1615 } 1616 1617 assert(count <= PIPE_MAX_ATTRIBS); 1618 velems = CALLOC_STRUCT(r300_vertex_element_state); 1619 if (!velems) 1620 return NULL; 1621 1622 velems->count = count; 1623 velems->vmgr_elements = 1624 u_vbuf_mgr_create_vertex_elements(r300->vbuf_mgr, count, attribs, 1625 velems->velem); 1626 1627 if (r300_screen(pipe->screen)->caps.has_tcl) { 1628 /* Setup PSC. 1629 * The unused components will be replaced by (..., 0, 1). */ 1630 r300_vertex_psc(velems); 1631 1632 for (i = 0; i < count; i++) { 1633 velems->format_size[i] = 1634 align(util_format_get_blocksize(velems->velem[i].src_format), 4); 1635 velems->vertex_size_dwords += velems->format_size[i] / 4; 1636 } 1637 } 1638 1639 return velems; 1640} 1641 1642static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1643 void *state) 1644{ 1645 struct r300_context *r300 = r300_context(pipe); 1646 struct r300_vertex_element_state *velems = state; 1647 1648 if (velems == NULL) { 1649 return; 1650 } 1651 1652 r300->velems = velems; 1653 1654 u_vbuf_mgr_bind_vertex_elements(r300->vbuf_mgr, state, velems->vmgr_elements); 1655 1656 if (r300->draw) { 1657 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1658 return; 1659 } 1660 1661 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1662 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1663 r300->vertex_arrays_dirty = TRUE; 1664} 1665 1666static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1667{ 1668 struct r300_context *r300 = r300_context(pipe); 1669 struct r300_vertex_element_state *velems = state; 1670 1671 u_vbuf_mgr_destroy_vertex_elements(r300->vbuf_mgr, velems->vmgr_elements); 1672 FREE(state); 1673} 1674 1675static void* r300_create_vs_state(struct pipe_context* pipe, 1676 const struct pipe_shader_state* shader) 1677{ 1678 struct r300_context* r300 = r300_context(pipe); 1679 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1680 1681 /* Copy state directly into shader. */ 1682 vs->state = *shader; 1683 vs->state.tokens = tgsi_dup_tokens(shader->tokens); 1684 1685 if (r300->screen->caps.has_tcl) { 1686 r300_init_vs_outputs(vs); 1687 r300_translate_vertex_shader(r300, vs); 1688 } else { 1689 r300_draw_init_vertex_shader(r300->draw, vs); 1690 } 1691 1692 return vs; 1693} 1694 1695static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1696{ 1697 struct r300_context* r300 = r300_context(pipe); 1698 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1699 1700 if (vs == NULL) { 1701 r300->vs_state.state = NULL; 1702 return; 1703 } 1704 if (vs == r300->vs_state.state) { 1705 return; 1706 } 1707 r300->vs_state.state = vs; 1708 1709 /* The majority of the RS block bits is dependent on the vertex shader. */ 1710 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */ 1711 1712 if (r300->screen->caps.has_tcl) { 1713 unsigned fc_op_dwords = r300->screen->caps.is_r500 ? 3 : 2; 1714 r300_mark_atom_dirty(r300, &r300->vs_state); 1715 r300->vs_state.size = 1716 vs->code.length + 9 + 1717 (vs->code.num_fc_ops ? vs->code.num_fc_ops * fc_op_dwords + 4 : 0); 1718 1719 r300_mark_atom_dirty(r300, &r300->vs_constants); 1720 r300->vs_constants.size = 1721 2 + 1722 (vs->externals_count ? vs->externals_count * 4 + 3 : 0) + 1723 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0); 1724 1725 ((struct r300_constant_buffer*)r300->vs_constants.state)->remap_table = 1726 vs->code.constants_remap_table; 1727 1728 r300_mark_atom_dirty(r300, &r300->pvs_flush); 1729 } else { 1730 draw_bind_vertex_shader(r300->draw, 1731 (struct draw_vertex_shader*)vs->draw_vs); 1732 } 1733} 1734 1735static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1736{ 1737 struct r300_context* r300 = r300_context(pipe); 1738 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1739 1740 if (r300->screen->caps.has_tcl) { 1741 rc_constants_destroy(&vs->code.constants); 1742 if (vs->code.constants_remap_table) 1743 FREE(vs->code.constants_remap_table); 1744 } else { 1745 draw_delete_vertex_shader(r300->draw, 1746 (struct draw_vertex_shader*)vs->draw_vs); 1747 } 1748 1749 FREE((void*)vs->state.tokens); 1750 FREE(shader); 1751} 1752 1753static void r300_set_constant_buffer(struct pipe_context *pipe, 1754 uint shader, uint index, 1755 struct pipe_resource *buf) 1756{ 1757 struct r300_context* r300 = r300_context(pipe); 1758 struct r300_constant_buffer *cbuf; 1759 struct r300_resource *rbuf = r300_resource(buf); 1760 uint32_t *mapped; 1761 1762 switch (shader) { 1763 case PIPE_SHADER_VERTEX: 1764 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state; 1765 break; 1766 case PIPE_SHADER_FRAGMENT: 1767 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state; 1768 break; 1769 default: 1770 return; 1771 } 1772 1773 if (buf == NULL || buf->width0 == 0) 1774 return; 1775 1776 if (rbuf->b.user_ptr) 1777 mapped = (uint32_t*)rbuf->b.user_ptr; 1778 else if (rbuf->constant_buffer) 1779 mapped = (uint32_t*)rbuf->constant_buffer; 1780 else 1781 return; 1782 1783 if (shader == PIPE_SHADER_FRAGMENT || 1784 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) { 1785 cbuf->ptr = mapped; 1786 } 1787 1788 if (shader == PIPE_SHADER_VERTEX) { 1789 if (r300->screen->caps.has_tcl) { 1790 struct r300_vertex_shader *vs = 1791 (struct r300_vertex_shader*)r300->vs_state.state; 1792 1793 if (!vs) { 1794 cbuf->buffer_base = 0; 1795 return; 1796 } 1797 1798 cbuf->buffer_base = r300->vs_const_base; 1799 r300->vs_const_base += vs->code.constants.Count; 1800 if (r300->vs_const_base > R500_MAX_PVS_CONST_VECS) { 1801 r300->vs_const_base = vs->code.constants.Count; 1802 cbuf->buffer_base = 0; 1803 r300_mark_atom_dirty(r300, &r300->pvs_flush); 1804 } 1805 r300_mark_atom_dirty(r300, &r300->vs_constants); 1806 } else if (r300->draw) { 1807 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX, 1808 0, mapped, buf->width0); 1809 } 1810 } else if (shader == PIPE_SHADER_FRAGMENT) { 1811 r300_mark_atom_dirty(r300, &r300->fs_constants); 1812 } 1813} 1814 1815void r300_init_state_functions(struct r300_context* r300) 1816{ 1817 r300->context.create_blend_state = r300_create_blend_state; 1818 r300->context.bind_blend_state = r300_bind_blend_state; 1819 r300->context.delete_blend_state = r300_delete_blend_state; 1820 1821 r300->context.set_blend_color = r300_set_blend_color; 1822 1823 r300->context.set_clip_state = r300_set_clip_state; 1824 r300->context.set_sample_mask = r300_set_sample_mask; 1825 1826 r300->context.set_constant_buffer = r300_set_constant_buffer; 1827 1828 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1829 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1830 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1831 1832 r300->context.set_stencil_ref = r300_set_stencil_ref; 1833 1834 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1835 1836 r300->context.create_fs_state = r300_create_fs_state; 1837 r300->context.bind_fs_state = r300_bind_fs_state; 1838 r300->context.delete_fs_state = r300_delete_fs_state; 1839 1840 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1841 1842 r300->context.create_rasterizer_state = r300_create_rs_state; 1843 r300->context.bind_rasterizer_state = r300_bind_rs_state; 1844 r300->context.delete_rasterizer_state = r300_delete_rs_state; 1845 1846 r300->context.create_sampler_state = r300_create_sampler_state; 1847 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 1848 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 1849 r300->context.delete_sampler_state = r300_delete_sampler_state; 1850 1851 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 1852 r300->context.create_sampler_view = r300_create_sampler_view; 1853 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 1854 1855 r300->context.set_scissor_state = r300_set_scissor_state; 1856 1857 r300->context.set_viewport_state = r300_set_viewport_state; 1858 1859 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 1860 r300->context.set_index_buffer = r300_set_index_buffer; 1861 r300->context.redefine_user_buffer = u_default_redefine_user_buffer; 1862 1863 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 1864 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 1865 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 1866 1867 r300->context.create_vs_state = r300_create_vs_state; 1868 r300->context.bind_vs_state = r300_bind_vs_state; 1869 r300->context.delete_vs_state = r300_delete_vs_state; 1870} 1871