r300_state.c revision 9dd50993c6540729fe7c7397b4a947b3068db162
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_math.h" 27#include "util/u_memory.h" 28#include "util/u_pack_color.h" 29 30#include "tgsi/tgsi_parse.h" 31 32#include "pipe/p_config.h" 33 34#include "r300_cb.h" 35#include "r300_context.h" 36#include "r300_emit.h" 37#include "r300_reg.h" 38#include "r300_screen.h" 39#include "r300_screen_buffer.h" 40#include "r300_state_inlines.h" 41#include "r300_fs.h" 42#include "r300_texture.h" 43#include "r300_vs.h" 44#include "r300_winsys.h" 45 46/* r300_state: Functions used to intialize state context by translating 47 * Gallium state objects into semi-native r300 state objects. */ 48 49#define UPDATE_STATE(cso, atom) \ 50 if (cso != atom.state) { \ 51 atom.state = cso; \ 52 atom.dirty = TRUE; \ 53 } 54 55static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 56 unsigned dstRGB, unsigned dstA) 57{ 58 /* If the blend equation is ADD or REVERSE_SUBTRACT, 59 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 60 * will not be changed. 61 * Notice that the dst factors are the src factors inverted. */ 62 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 63 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 64 srcRGB == PIPE_BLENDFACTOR_ZERO) && 65 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 66 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 67 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 68 srcA == PIPE_BLENDFACTOR_ZERO) && 69 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 70 dstRGB == PIPE_BLENDFACTOR_ONE) && 71 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 72 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 73 dstA == PIPE_BLENDFACTOR_ONE); 74} 75 76static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 77 unsigned dstRGB, unsigned dstA) 78{ 79 /* If the blend equation is ADD or REVERSE_SUBTRACT, 80 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 81 * will not be changed. 82 * Notice that the dst factors are the src factors inverted. */ 83 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 84 srcRGB == PIPE_BLENDFACTOR_ZERO) && 85 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 86 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 87 srcA == PIPE_BLENDFACTOR_ZERO) && 88 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 89 dstRGB == PIPE_BLENDFACTOR_ONE) && 90 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 91 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 92 dstA == PIPE_BLENDFACTOR_ONE); 93} 94 95static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 96 unsigned dstRGB, unsigned dstA) 97{ 98 /* If the blend equation is ADD or REVERSE_SUBTRACT, 99 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 100 * will not be changed. 101 * Notice that the dst factors are the src factors inverted. */ 102 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 103 srcRGB == PIPE_BLENDFACTOR_ZERO) && 104 (srcA == PIPE_BLENDFACTOR_ZERO) && 105 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 106 dstRGB == PIPE_BLENDFACTOR_ONE) && 107 (dstA == PIPE_BLENDFACTOR_ONE); 108} 109 110static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 111 unsigned dstRGB, unsigned dstA) 112{ 113 /* If the blend equation is ADD or REVERSE_SUBTRACT, 114 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 115 * will not be changed. 116 * Notice that the dst factors are the src factors inverted. */ 117 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 118 srcRGB == PIPE_BLENDFACTOR_ZERO) && 119 (srcA == PIPE_BLENDFACTOR_ZERO) && 120 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 121 dstRGB == PIPE_BLENDFACTOR_ONE) && 122 (dstA == PIPE_BLENDFACTOR_ONE); 123} 124 125static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 126 unsigned dstRGB, unsigned dstA) 127{ 128 /* If the blend equation is ADD or REVERSE_SUBTRACT, 129 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 130 * the colorbuffer will not be changed. 131 * Notice that the dst factors are the src factors inverted. */ 132 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 133 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 134 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 135 srcRGB == PIPE_BLENDFACTOR_ZERO) && 136 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 137 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 138 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 139 srcA == PIPE_BLENDFACTOR_ZERO) && 140 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 141 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 142 dstRGB == PIPE_BLENDFACTOR_ONE) && 143 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 144 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 145 dstA == PIPE_BLENDFACTOR_ONE); 146} 147 148static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 149 unsigned dstRGB, unsigned dstA) 150{ 151 /* If the blend equation is ADD or REVERSE_SUBTRACT, 152 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 153 * the colorbuffer will not be changed. 154 * Notice that the dst factors are the src factors inverted. */ 155 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 156 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 157 srcRGB == PIPE_BLENDFACTOR_ZERO) && 158 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 159 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 160 srcA == PIPE_BLENDFACTOR_ZERO) && 161 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 162 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 163 dstRGB == PIPE_BLENDFACTOR_ONE) && 164 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 165 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 166 dstA == PIPE_BLENDFACTOR_ONE); 167} 168 169static unsigned bgra_cmask(unsigned mask) 170{ 171 /* Gallium uses RGBA color ordering while R300 expects BGRA. */ 172 173 return ((mask & PIPE_MASK_R) << 2) | 174 ((mask & PIPE_MASK_B) >> 2) | 175 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 176} 177 178/* Create a new blend state based on the CSO blend state. 179 * 180 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 181static void* r300_create_blend_state(struct pipe_context* pipe, 182 const struct pipe_blend_state* state) 183{ 184 struct r300_screen* r300screen = r300_screen(pipe->screen); 185 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 186 uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */ 187 uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */ 188 uint32_t color_channel_mask = 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */ 189 uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */ 190 uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */ 191 CB_LOCALS; 192 193 if (state->rt[0].blend_enable) 194 { 195 unsigned eqRGB = state->rt[0].rgb_func; 196 unsigned srcRGB = state->rt[0].rgb_src_factor; 197 unsigned dstRGB = state->rt[0].rgb_dst_factor; 198 199 unsigned eqA = state->rt[0].alpha_func; 200 unsigned srcA = state->rt[0].alpha_src_factor; 201 unsigned dstA = state->rt[0].alpha_dst_factor; 202 203 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 204 * this is just the crappy D3D naming */ 205 blend_control = R300_ALPHA_BLEND_ENABLE | 206 r300_translate_blend_function(eqRGB) | 207 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 208 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 209 210 /* Optimization: some operations do not require the destination color. 211 * 212 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 213 * otherwise blending gives incorrect results. It seems to be 214 * a hardware bug. */ 215 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 216 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 217 dstRGB != PIPE_BLENDFACTOR_ZERO || 218 dstA != PIPE_BLENDFACTOR_ZERO || 219 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 220 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 221 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 222 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 223 srcA == PIPE_BLENDFACTOR_DST_COLOR || 224 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 225 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 226 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 227 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 228 /* Enable reading from the colorbuffer. */ 229 blend_control |= R300_READ_ENABLE; 230 231 if (r300screen->caps.is_r500) { 232 /* Optimization: Depending on incoming pixels, we can 233 * conditionally disable the reading in hardware... */ 234 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 235 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 236 /* Disable reading if SRC_ALPHA == 0. */ 237 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 238 dstRGB == PIPE_BLENDFACTOR_ZERO) && 239 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 240 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 241 dstA == PIPE_BLENDFACTOR_ZERO)) { 242 blend_control |= R500_SRC_ALPHA_0_NO_READ; 243 } 244 245 /* Disable reading if SRC_ALPHA == 1. */ 246 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 247 dstRGB == PIPE_BLENDFACTOR_ZERO) && 248 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 249 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 250 dstA == PIPE_BLENDFACTOR_ZERO)) { 251 blend_control |= R500_SRC_ALPHA_1_NO_READ; 252 } 253 } 254 } 255 } 256 257 /* Optimization: discard pixels which don't change the colorbuffer. 258 * 259 * The code below is non-trivial and some math is involved. 260 * 261 * Discarding pixels must be disabled when FP16 AA is enabled. 262 * This is a hardware bug. Also, this implementation wouldn't work 263 * with FP blending enabled and equation clamping disabled. 264 * 265 * Equations other than ADD are rarely used and therefore won't be 266 * optimized. */ 267 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 268 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 269 /* ADD: X+Y 270 * REVERSE_SUBTRACT: Y-X 271 * 272 * The idea is: 273 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 274 * then CB will not be changed. 275 * 276 * Given the srcFactor and dstFactor variables, we can derive 277 * what src and dst should be equal to and discard appropriate 278 * pixels. 279 */ 280 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 281 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 282 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 283 dstRGB, dstA)) { 284 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 285 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 286 dstRGB, dstA)) { 287 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 288 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 289 dstRGB, dstA)) { 290 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 291 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 292 dstRGB, dstA)) { 293 blend_control |= 294 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 295 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 296 dstRGB, dstA)) { 297 blend_control |= 298 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 299 } 300 } 301 302 /* separate alpha */ 303 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 304 blend_control |= R300_SEPARATE_ALPHA_ENABLE; 305 alpha_blend_control = 306 r300_translate_blend_function(eqA) | 307 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 308 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 309 } 310 } 311 312 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 313 if (state->logicop_enable) { 314 rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 315 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 316 } 317 318 /* Color channel masks for all MRTs. */ 319 color_channel_mask = bgra_cmask(state->rt[0].colormask); 320 if (r300screen->caps.is_r500 && state->independent_blend_enable) { 321 if (state->rt[1].blend_enable) { 322 color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; 323 } 324 if (state->rt[2].blend_enable) { 325 color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8; 326 } 327 if (state->rt[3].blend_enable) { 328 color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12; 329 } 330 } 331 332 /* Neither fglrx nor classic r300 ever set this, regardless of dithering 333 * state. Since it's an optional implementation detail, we can leave it 334 * out and never dither. 335 * 336 * This could be revisited if we ever get quality or conformance hints. 337 * 338 if (state->dither) { 339 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 340 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 341 } 342 */ 343 344 /* Build a command buffer. */ 345 BEGIN_CB(blend->cb, 8); 346 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 347 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 348 OUT_CB(blend_control); 349 OUT_CB(alpha_blend_control); 350 OUT_CB(color_channel_mask); 351 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 352 END_CB; 353 354 /* The same as above, but with no colorbuffer reads and writes. */ 355 BEGIN_CB(blend->cb_no_readwrite, 8); 356 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 357 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 358 OUT_CB(0); 359 OUT_CB(0); 360 OUT_CB(0); 361 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 362 END_CB; 363 364 return (void*)blend; 365} 366 367/* Bind blend state. */ 368static void r300_bind_blend_state(struct pipe_context* pipe, 369 void* state) 370{ 371 struct r300_context* r300 = r300_context(pipe); 372 373 UPDATE_STATE(state, r300->blend_state); 374} 375 376/* Free blend state. */ 377static void r300_delete_blend_state(struct pipe_context* pipe, 378 void* state) 379{ 380 FREE(state); 381} 382 383/* Convert float to 10bit integer */ 384static unsigned float_to_fixed10(float f) 385{ 386 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 387} 388 389/* Set blend color. 390 * Setup both R300 and R500 registers, figure out later which one to write. */ 391static void r300_set_blend_color(struct pipe_context* pipe, 392 const struct pipe_blend_color* color) 393{ 394 struct r300_context* r300 = r300_context(pipe); 395 struct r300_blend_color_state* state = 396 (struct r300_blend_color_state*)r300->blend_color_state.state; 397 CB_LOCALS; 398 399 if (r300->screen->caps.is_r500) { 400 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 401 BEGIN_CB(state->cb, 3); 402 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2); 403 OUT_CB(float_to_fixed10(color->color[0]) | 404 (float_to_fixed10(color->color[3]) << 16)); 405 OUT_CB(float_to_fixed10(color->color[2]) | 406 (float_to_fixed10(color->color[1]) << 16)); 407 END_CB; 408 } else { 409 union util_color uc; 410 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 411 412 BEGIN_CB(state->cb, 2); 413 OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui); 414 END_CB; 415 } 416 417 r300->blend_color_state.dirty = TRUE; 418} 419 420static void r300_set_clip_state(struct pipe_context* pipe, 421 const struct pipe_clip_state* state) 422{ 423 struct r300_context* r300 = r300_context(pipe); 424 425 r300->clip = *state; 426 427 if (r300->screen->caps.has_tcl) { 428 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state)); 429 r300->clip_state.size = 29; 430 431 r300->clip_state.dirty = TRUE; 432 } else { 433 draw_flush(r300->draw); 434 draw_set_clip_state(r300->draw, state); 435 r300->clip_state.size = 2; 436 } 437} 438 439static void 440r300_set_sample_mask(struct pipe_context *pipe, 441 unsigned sample_mask) 442{ 443} 444 445 446/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 447 * 448 * This contains the depth buffer, stencil buffer, alpha test, and such. 449 * On the Radeon, depth and stencil buffer setup are intertwined, which is 450 * the reason for some of the strange-looking assignments across registers. */ 451static void* 452 r300_create_dsa_state(struct pipe_context* pipe, 453 const struct pipe_depth_stencil_alpha_state* state) 454{ 455 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps; 456 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 457 458 /* Depth test setup. */ 459 if (state->depth.enabled) { 460 dsa->z_buffer_control |= R300_Z_ENABLE; 461 462 if (state->depth.writemask) { 463 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 464 } 465 466 dsa->z_stencil_control |= 467 (r300_translate_depth_stencil_function(state->depth.func) << 468 R300_Z_FUNC_SHIFT); 469 } 470 471 /* Stencil buffer setup. */ 472 if (state->stencil[0].enabled) { 473 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 474 dsa->z_stencil_control |= 475 (r300_translate_depth_stencil_function(state->stencil[0].func) << 476 R300_S_FRONT_FUNC_SHIFT) | 477 (r300_translate_stencil_op(state->stencil[0].fail_op) << 478 R300_S_FRONT_SFAIL_OP_SHIFT) | 479 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 480 R300_S_FRONT_ZPASS_OP_SHIFT) | 481 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 482 R300_S_FRONT_ZFAIL_OP_SHIFT); 483 484 dsa->stencil_ref_mask = 485 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 486 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 487 488 if (state->stencil[1].enabled) { 489 dsa->two_sided = TRUE; 490 491 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 492 dsa->z_stencil_control |= 493 (r300_translate_depth_stencil_function(state->stencil[1].func) << 494 R300_S_BACK_FUNC_SHIFT) | 495 (r300_translate_stencil_op(state->stencil[1].fail_op) << 496 R300_S_BACK_SFAIL_OP_SHIFT) | 497 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 498 R300_S_BACK_ZPASS_OP_SHIFT) | 499 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 500 R300_S_BACK_ZFAIL_OP_SHIFT); 501 502 dsa->stencil_ref_bf = 503 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 504 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 505 506 if (caps->is_r500) { 507 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 508 } else { 509 dsa->two_sided_stencil_ref = 510 (state->stencil[0].valuemask != state->stencil[1].valuemask || 511 state->stencil[0].writemask != state->stencil[1].writemask); 512 } 513 } 514 } 515 516 /* Alpha test setup. */ 517 if (state->alpha.enabled) { 518 dsa->alpha_function = 519 r300_translate_alpha_function(state->alpha.func) | 520 R300_FG_ALPHA_FUNC_ENABLE; 521 522 /* We could use 10bit alpha ref but who needs that? */ 523 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 524 525 if (caps->is_r500) 526 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 527 } 528 529 return (void*)dsa; 530} 531 532/* Bind DSA state. */ 533static void r300_bind_dsa_state(struct pipe_context* pipe, 534 void* state) 535{ 536 struct r300_context* r300 = r300_context(pipe); 537 538 if (!state) { 539 return; 540 } 541 542 UPDATE_STATE(state, r300->dsa_state); 543} 544 545/* Free DSA state. */ 546static void r300_delete_dsa_state(struct pipe_context* pipe, 547 void* state) 548{ 549 FREE(state); 550} 551 552static void r300_set_stencil_ref(struct pipe_context* pipe, 553 const struct pipe_stencil_ref* sr) 554{ 555 struct r300_context* r300 = r300_context(pipe); 556 557 r300->stencil_ref = *sr; 558 r300->dsa_state.dirty = TRUE; 559} 560 561/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 562static void r300_fb_set_tiling_flags(struct r300_context *r300, 563 const struct pipe_framebuffer_state *old_state, 564 const struct pipe_framebuffer_state *new_state) 565{ 566 struct r300_texture *tex; 567 unsigned i, level; 568 569 /* Set tiling flags for new surfaces. */ 570 for (i = 0; i < new_state->nr_cbufs; i++) { 571 tex = r300_texture(new_state->cbufs[i]->texture); 572 level = new_state->cbufs[i]->level; 573 574 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 575 tex->pitch[0] * util_format_get_blocksize(tex->b.b.format), 576 tex->microtile, 577 tex->mip_macrotile[level]); 578 } 579 if (new_state->zsbuf) { 580 tex = r300_texture(new_state->zsbuf->texture); 581 level = new_state->zsbuf->level; 582 583 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 584 tex->pitch[0] * util_format_get_blocksize(tex->b.b.format), 585 tex->microtile, 586 tex->mip_macrotile[level]); 587 } 588} 589 590static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index, 591 const char *binding) 592{ 593 struct pipe_resource *tex = surf->texture; 594 struct r300_texture *rtex = r300_texture(tex); 595 596 fprintf(stderr, 597 "r300: %s[%i] Dim: %ix%i, Offset: %i, ZSlice: %i, " 598 "Face: %i, Level: %i, Format: %s\n" 599 600 "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, " 601 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n", 602 603 binding, index, surf->width, surf->height, surf->offset, 604 surf->zslice, surf->face, surf->level, 605 util_format_short_name(surf->format), 606 607 rtex->macrotile ? "YES" : " NO", rtex->microtile ? "YES" : " NO", 608 rtex->hwpitch[0], tex->width0, tex->height0, tex->depth0, 609 tex->last_level, util_format_short_name(tex->format)); 610} 611 612static void 613 r300_set_framebuffer_state(struct pipe_context* pipe, 614 const struct pipe_framebuffer_state* state) 615{ 616 struct r300_context* r300 = r300_context(pipe); 617 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 618 unsigned max_width, max_height, i; 619 uint32_t zbuffer_bpp = 0; 620 621 if (state->nr_cbufs > 4) { 622 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, " 623 "refusing to bind framebuffer state!\n", __FUNCTION__); 624 return; 625 } 626 627 if (r300->screen->caps.is_r500) { 628 max_width = max_height = 4096; 629 } else if (r300->screen->caps.is_r400) { 630 max_width = max_height = 4021; 631 } else { 632 max_width = max_height = 2560; 633 } 634 635 if (state->width > max_width || state->height > max_height) { 636 fprintf(stderr, "r300: Implementation error: Render targets are too " 637 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 638 return; 639 } 640 641 if (r300->draw) { 642 draw_flush(r300->draw); 643 } 644 645 r300->fb_state.dirty = TRUE; 646 647 /* If nr_cbufs is changed from zero to non-zero or vice versa... */ 648 if (!!old_state->nr_cbufs != !!state->nr_cbufs) { 649 r300->blend_state.dirty = TRUE; 650 } 651 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 652 if (!!old_state->zsbuf != !!state->zsbuf) { 653 r300->dsa_state.dirty = TRUE; 654 } 655 656 /* The tiling flags are dependent on the surface miplevel, unfortunately. */ 657 r300_fb_set_tiling_flags(r300, r300->fb_state.state, state); 658 659 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); 660 661 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + 662 (state->zsbuf ? 10 : 0) + 9; 663 664 /* Polygon offset depends on the zbuffer bit depth. */ 665 if (state->zsbuf && r300->polygon_offset_enabled) { 666 switch (util_format_get_blocksize(state->zsbuf->texture->format)) { 667 case 2: 668 zbuffer_bpp = 16; 669 break; 670 case 4: 671 zbuffer_bpp = 24; 672 break; 673 } 674 675 if (r300->zbuffer_bpp != zbuffer_bpp) { 676 r300->zbuffer_bpp = zbuffer_bpp; 677 r300->rs_state.dirty = TRUE; 678 } 679 } 680 681 if (DBG_ON(r300, DBG_FB)) { 682 fprintf(stderr, "r300: set_framebuffer_state:\n"); 683 for (i = 0; i < state->nr_cbufs; i++) { 684 r300_print_fb_surf_info(state->cbufs[i], i, "CB"); 685 } 686 if (state->zsbuf) { 687 r300_print_fb_surf_info(state->zsbuf, 0, "ZB"); 688 } 689 } 690} 691 692/* Create fragment shader state. */ 693static void* r300_create_fs_state(struct pipe_context* pipe, 694 const struct pipe_shader_state* shader) 695{ 696 struct r300_fragment_shader* fs = NULL; 697 698 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 699 700 /* Copy state directly into shader. */ 701 fs->state = *shader; 702 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 703 704 return (void*)fs; 705} 706 707void r300_mark_fs_code_dirty(struct r300_context *r300) 708{ 709 struct r300_fragment_shader* fs = r300_fs(r300); 710 711 r300->fs.dirty = TRUE; 712 r300->fs_rc_constant_state.dirty = TRUE; 713 r300->fs_constants.dirty = TRUE; 714 715 if (r300->screen->caps.is_r500) { 716 r300->fs.size = r500_get_fs_atom_size(r300); 717 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7; 718 r300->fs_constants.size = fs->shader->externals_count * 4 + 3; 719 } else { 720 r300->fs.size = r300_get_fs_atom_size(r300); 721 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5; 722 r300->fs_constants.size = fs->shader->externals_count * 4 + 1; 723 } 724} 725 726/* Bind fragment shader state. */ 727static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 728{ 729 struct r300_context* r300 = r300_context(pipe); 730 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 731 732 if (fs == NULL) { 733 r300->fs.state = NULL; 734 return; 735 } 736 737 r300->fs.state = fs; 738 r300_pick_fragment_shader(r300); 739 r300_mark_fs_code_dirty(r300); 740 741 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 742} 743 744/* Delete fragment shader state. */ 745static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 746{ 747 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 748 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 749 750 while (ptr) { 751 tmp = ptr; 752 ptr = ptr->next; 753 rc_constants_destroy(&tmp->code.constants); 754 FREE(tmp); 755 } 756 FREE((void*)fs->state.tokens); 757 FREE(shader); 758} 759 760static void r300_set_polygon_stipple(struct pipe_context* pipe, 761 const struct pipe_poly_stipple* state) 762{ 763 /* XXX no idea how to set this up, but not terribly important */ 764} 765 766/* Create a new rasterizer state based on the CSO rasterizer state. 767 * 768 * This is a very large chunk of state, and covers most of the graphics 769 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 770 * 771 * In a not entirely unironic sidenote, this state has nearly nothing to do 772 * with the actual block on the Radeon called the rasterizer (RS). */ 773static void* r300_create_rs_state(struct pipe_context* pipe, 774 const struct pipe_rasterizer_state* state) 775{ 776 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 777 int i; 778 float psiz; 779 780 /* Copy rasterizer state. */ 781 rs->rs = *state; 782 rs->rs_draw = *state; 783 784 /* Override some states for Draw. */ 785 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */ 786 787#ifdef PIPE_ARCH_LITTLE_ENDIAN 788 rs->vap_control_status = R300_VC_NO_SWAP; 789#else 790 rs->vap_control_status = R300_VC_32BIT_SWAP; 791#endif 792 793 /* If no TCL engine is present, turn off the HW TCL. */ 794 if (!r300_screen(pipe->screen)->caps.has_tcl) { 795 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 796 } 797 798 /* Point size width and height. */ 799 rs->point_size = 800 pack_float_16_6x(state->point_size) | 801 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 802 803 /* Point size clamping. */ 804 if (state->point_size_per_vertex) { 805 /* Per-vertex point size. 806 * Clamp to [0, max FB size] */ 807 psiz = pipe->screen->get_paramf(pipe->screen, 808 PIPE_CAP_MAX_POINT_WIDTH); 809 rs->point_minmax = 810 pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT; 811 } else { 812 /* We cannot disable the point-size vertex output, 813 * so clamp it. */ 814 psiz = state->point_size; 815 rs->point_minmax = 816 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) | 817 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT); 818 } 819 820 /* Line control. */ 821 rs->line_control = pack_float_16_6x(state->line_width) | 822 R300_GA_LINE_CNTL_END_TYPE_COMP; 823 824 /* Enable polygon mode */ 825 if (state->fill_front != PIPE_POLYGON_MODE_FILL || 826 state->fill_back != PIPE_POLYGON_MODE_FILL) { 827 rs->polygon_mode = R300_GA_POLY_MODE_DUAL; 828 } 829 830 /* Front face */ 831 if (state->front_ccw) 832 rs->cull_mode = R300_FRONT_FACE_CCW; 833 else 834 rs->cull_mode = R300_FRONT_FACE_CW; 835 836 /* Polygon offset */ 837 if (util_get_offset(state, state->fill_front)) { 838 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 839 } 840 if (util_get_offset(state, state->fill_back)) { 841 rs->polygon_offset_enable |= R300_BACK_ENABLE; 842 } 843 844 /* Polygon mode */ 845 if (rs->polygon_mode) { 846 rs->polygon_mode |= 847 r300_translate_polygon_mode_front(state->fill_front); 848 rs->polygon_mode |= 849 r300_translate_polygon_mode_back(state->fill_back); 850 } 851 852 if (state->cull_face & PIPE_FACE_FRONT) { 853 rs->cull_mode |= R300_CULL_FRONT; 854 } 855 if (state->cull_face & PIPE_FACE_BACK) { 856 rs->cull_mode |= R300_CULL_BACK; 857 } 858 859 if (rs->polygon_offset_enable) { 860 rs->depth_offset = state->offset_units; 861 rs->depth_scale = state->offset_scale; 862 } 863 864 if (state->line_stipple_enable) { 865 rs->line_stipple_config = 866 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 867 (fui((float)state->line_stipple_factor) & 868 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 869 /* XXX this might need to be scaled up */ 870 rs->line_stipple_value = state->line_stipple_pattern; 871 } 872 873 if (state->flatshade) { 874 rs->color_control = R300_SHADE_MODEL_FLAT; 875 } else { 876 rs->color_control = R300_SHADE_MODEL_SMOOTH; 877 } 878 879 rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF; 880 881 /* Point sprites */ 882 if (state->sprite_coord_enable) { 883 rs->stuffing_enable = R300_GB_POINT_STUFF_ENABLE; 884 for (i = 0; i < 8; i++) { 885 if (state->sprite_coord_enable & (1 << i)) 886 rs->stuffing_enable |= 887 R300_GB_TEX_STR << (R300_GB_TEX0_SOURCE_SHIFT + (i*2)); 888 } 889 890 rs->point_texcoord_left = 0.0f; 891 rs->point_texcoord_right = 1.0f; 892 893 switch (state->sprite_coord_mode) { 894 case PIPE_SPRITE_COORD_UPPER_LEFT: 895 rs->point_texcoord_top = 0.0f; 896 rs->point_texcoord_bottom = 1.0f; 897 break; 898 case PIPE_SPRITE_COORD_LOWER_LEFT: 899 rs->point_texcoord_top = 1.0f; 900 rs->point_texcoord_bottom = 0.0f; 901 break; 902 } 903 } 904 905 return (void*)rs; 906} 907 908/* Bind rasterizer state. */ 909static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 910{ 911 struct r300_context* r300 = r300_context(pipe); 912 struct r300_rs_state* rs = (struct r300_rs_state*)state; 913 int last_sprite_coord_enable = r300->sprite_coord_enable; 914 boolean last_two_sided_color = r300->two_sided_color; 915 916 if (r300->draw && rs) { 917 draw_flush(r300->draw); 918 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state); 919 } 920 921 if (rs) { 922 r300->polygon_offset_enabled = (rs->rs.offset_point || 923 rs->rs.offset_line || 924 rs->rs.offset_tri); 925 r300->sprite_coord_enable = rs->rs.sprite_coord_enable; 926 r300->two_sided_color = rs->rs.light_twoside; 927 } else { 928 r300->polygon_offset_enabled = FALSE; 929 r300->sprite_coord_enable = 0; 930 r300->two_sided_color = FALSE; 931 } 932 933 UPDATE_STATE(state, r300->rs_state); 934 r300->rs_state.size = 27 + (r300->polygon_offset_enabled ? 5 : 0); 935 936 if (last_sprite_coord_enable != r300->sprite_coord_enable || 937 last_two_sided_color != r300->two_sided_color) { 938 r300->rs_block_state.dirty = TRUE; 939 } 940} 941 942/* Free rasterizer state. */ 943static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 944{ 945 FREE(state); 946} 947 948static void* 949 r300_create_sampler_state(struct pipe_context* pipe, 950 const struct pipe_sampler_state* state) 951{ 952 struct r300_context* r300 = r300_context(pipe); 953 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 954 boolean is_r500 = r300->screen->caps.is_r500; 955 int lod_bias; 956 union util_color uc; 957 958 sampler->state = *state; 959 960 sampler->filter0 |= 961 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 962 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 963 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 964 965 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 966 state->mag_img_filter, 967 state->min_mip_filter, 968 state->max_anisotropy > 0); 969 970 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 971 972 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 973 /* We must pass these to the merge function to clamp them properly. */ 974 sampler->min_lod = MAX2((unsigned)state->min_lod, 0); 975 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0); 976 977 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1); 978 979 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 980 981 /* This is very high quality anisotropic filtering for R5xx. 982 * It's good for benchmarking the performance of texturing but 983 * in practice we don't want to slow down the driver because it's 984 * a pretty good performance killer. Feel free to play with it. */ 985 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 986 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 987 } 988 989 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 990 sampler->border_color = uc.ui; 991 992 /* R500-specific fixups and optimizations */ 993 if (r300->screen->caps.is_r500) { 994 sampler->filter1 |= R500_BORDER_FIX; 995 } 996 997 return (void*)sampler; 998} 999 1000static void r300_bind_sampler_states(struct pipe_context* pipe, 1001 unsigned count, 1002 void** states) 1003{ 1004 struct r300_context* r300 = r300_context(pipe); 1005 struct r300_textures_state* state = 1006 (struct r300_textures_state*)r300->textures_state.state; 1007 unsigned tex_units = r300->screen->caps.num_tex_units; 1008 1009 if (count > tex_units) { 1010 return; 1011 } 1012 1013 memcpy(state->sampler_states, states, sizeof(void*) * count); 1014 state->sampler_state_count = count; 1015 1016 r300->textures_state.dirty = TRUE; 1017} 1018 1019static void r300_lacks_vertex_textures(struct pipe_context* pipe, 1020 unsigned count, 1021 void** states) 1022{ 1023} 1024 1025static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 1026{ 1027 FREE(state); 1028} 1029 1030static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 1031 unsigned count, 1032 struct pipe_sampler_view** views) 1033{ 1034 struct r300_context* r300 = r300_context(pipe); 1035 struct r300_textures_state* state = 1036 (struct r300_textures_state*)r300->textures_state.state; 1037 struct r300_texture *texture; 1038 unsigned i; 1039 unsigned tex_units = r300->screen->caps.num_tex_units; 1040 boolean dirty_tex = FALSE; 1041 1042 if (count > tex_units) { 1043 return; 1044 } 1045 1046 for (i = 0; i < count; i++) { 1047 if (&state->sampler_views[i]->base != views[i]) { 1048 pipe_sampler_view_reference( 1049 (struct pipe_sampler_view**)&state->sampler_views[i], 1050 views[i]); 1051 1052 if (!views[i]) { 1053 continue; 1054 } 1055 1056 /* A new sampler view (= texture)... */ 1057 dirty_tex = TRUE; 1058 1059 /* Set the texrect factor in the fragment shader. 1060 * Needed for RECT and NPOT fallback. */ 1061 texture = r300_texture(views[i]->texture); 1062 if (texture->uses_pitch) { 1063 r300->fs_rc_constant_state.dirty = TRUE; 1064 } 1065 } 1066 } 1067 1068 for (i = count; i < tex_units; i++) { 1069 if (state->sampler_views[i]) { 1070 pipe_sampler_view_reference( 1071 (struct pipe_sampler_view**)&state->sampler_views[i], 1072 NULL); 1073 } 1074 } 1075 1076 state->sampler_view_count = count; 1077 1078 r300->textures_state.dirty = TRUE; 1079 1080 if (dirty_tex) { 1081 r300->texture_cache_inval.dirty = TRUE; 1082 } 1083} 1084 1085static struct pipe_sampler_view * 1086r300_create_sampler_view(struct pipe_context *pipe, 1087 struct pipe_resource *texture, 1088 const struct pipe_sampler_view *templ) 1089{ 1090 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view); 1091 struct r300_texture *tex = r300_texture(texture); 1092 1093 if (view) { 1094 view->base = *templ; 1095 view->base.reference.count = 1; 1096 view->base.context = pipe; 1097 view->base.texture = NULL; 1098 pipe_resource_reference(&view->base.texture, texture); 1099 1100 view->swizzle[0] = templ->swizzle_r; 1101 view->swizzle[1] = templ->swizzle_g; 1102 view->swizzle[2] = templ->swizzle_b; 1103 view->swizzle[3] = templ->swizzle_a; 1104 1105 view->format = tex->tx_format; 1106 view->format.format1 |= r300_translate_texformat(templ->format, 1107 view->swizzle); 1108 if (r300_screen(pipe->screen)->caps.is_r500) { 1109 view->format.format2 |= r500_tx_format_msb_bit(templ->format); 1110 } 1111 } 1112 1113 return (struct pipe_sampler_view*)view; 1114} 1115 1116static void 1117r300_sampler_view_destroy(struct pipe_context *pipe, 1118 struct pipe_sampler_view *view) 1119{ 1120 pipe_resource_reference(&view->texture, NULL); 1121 FREE(view); 1122} 1123 1124static void r300_set_scissor_state(struct pipe_context* pipe, 1125 const struct pipe_scissor_state* state) 1126{ 1127 struct r300_context* r300 = r300_context(pipe); 1128 1129 memcpy(r300->scissor_state.state, state, 1130 sizeof(struct pipe_scissor_state)); 1131 1132 r300->scissor_state.dirty = TRUE; 1133} 1134 1135static void r300_set_viewport_state(struct pipe_context* pipe, 1136 const struct pipe_viewport_state* state) 1137{ 1138 struct r300_context* r300 = r300_context(pipe); 1139 struct r300_viewport_state* viewport = 1140 (struct r300_viewport_state*)r300->viewport_state.state; 1141 1142 r300->viewport = *state; 1143 1144 if (r300->draw) { 1145 draw_flush(r300->draw); 1146 draw_set_viewport_state(r300->draw, state); 1147 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT; 1148 return; 1149 } 1150 1151 /* Do the transform in HW. */ 1152 viewport->vte_control = R300_VTX_W0_FMT; 1153 1154 if (state->scale[0] != 1.0f) { 1155 viewport->xscale = state->scale[0]; 1156 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1157 } 1158 if (state->scale[1] != 1.0f) { 1159 viewport->yscale = state->scale[1]; 1160 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1161 } 1162 if (state->scale[2] != 1.0f) { 1163 viewport->zscale = state->scale[2]; 1164 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1165 } 1166 if (state->translate[0] != 0.0f) { 1167 viewport->xoffset = state->translate[0]; 1168 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1169 } 1170 if (state->translate[1] != 0.0f) { 1171 viewport->yoffset = state->translate[1]; 1172 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1173 } 1174 if (state->translate[2] != 0.0f) { 1175 viewport->zoffset = state->translate[2]; 1176 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1177 } 1178 1179 r300->viewport_state.dirty = TRUE; 1180 if (r300->fs.state && r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) { 1181 r300->fs_rc_constant_state.dirty = TRUE; 1182 } 1183} 1184 1185static void r300_set_vertex_buffers(struct pipe_context* pipe, 1186 unsigned count, 1187 const struct pipe_vertex_buffer* buffers) 1188{ 1189 struct r300_context* r300 = r300_context(pipe); 1190 struct pipe_vertex_buffer *vbo; 1191 unsigned i, max_index = (1 << 24) - 1; 1192 boolean any_user_buffer = FALSE; 1193 1194 if (count == r300->vertex_buffer_count && 1195 memcmp(r300->vertex_buffer, buffers, 1196 sizeof(struct pipe_vertex_buffer) * count) == 0) { 1197 return; 1198 } 1199 1200 if (r300->screen->caps.has_tcl) { 1201 /* HW TCL. */ 1202 r300->incompatible_vb_layout = FALSE; 1203 1204 /* Check if the strides and offsets are aligned to the size of DWORD. */ 1205 for (i = 0; i < count; i++) { 1206 if (buffers[i].buffer) { 1207 if (buffers[i].stride % 4 != 0 || 1208 buffers[i].buffer_offset % 4 != 0) { 1209 r300->incompatible_vb_layout = TRUE; 1210 break; 1211 } 1212 } 1213 } 1214 1215 for (i = 0; i < count; i++) { 1216 /* Why, yes, I AM casting away constness. How did you know? */ 1217 vbo = (struct pipe_vertex_buffer*)&buffers[i]; 1218 1219 /* Skip NULL buffers */ 1220 if (!buffers[i].buffer) { 1221 continue; 1222 } 1223 1224 if (r300_buffer_is_user_buffer(vbo->buffer)) { 1225 any_user_buffer = TRUE; 1226 } 1227 1228 if (vbo->max_index == ~0) { 1229 /* if no VBO stride then only one vertex value so max index is 1 */ 1230 /* should think about converting to VS constants like svga does */ 1231 if (!vbo->stride) 1232 vbo->max_index = 1; 1233 else 1234 vbo->max_index = 1235 (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride; 1236 } 1237 1238 max_index = MIN2(vbo->max_index, max_index); 1239 } 1240 1241 r300->any_user_vbs = any_user_buffer; 1242 r300->vertex_buffer_max_index = max_index; 1243 1244 } else { 1245 /* SW TCL. */ 1246 draw_flush(r300->draw); 1247 draw_set_vertex_buffers(r300->draw, count, buffers); 1248 } 1249 1250 /* Common code. */ 1251 for (i = 0; i < count; i++) { 1252 /* Reference our buffer. */ 1253 pipe_resource_reference(&r300->vertex_buffer[i].buffer, buffers[i].buffer); 1254 } 1255 for (; i < r300->vertex_buffer_count; i++) { 1256 /* Dereference any old buffers. */ 1257 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL); 1258 } 1259 1260 memcpy(r300->vertex_buffer, buffers, 1261 sizeof(struct pipe_vertex_buffer) * count); 1262 r300->vertex_buffer_count = count; 1263} 1264 1265/* Initialize the PSC tables. */ 1266static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1267{ 1268 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1269 uint16_t type, swizzle; 1270 enum pipe_format format; 1271 unsigned i; 1272 1273 if (velems->count > 16) { 1274 fprintf(stderr, "r300: More than 16 vertex elements are not supported," 1275 " requested %i, using 16.\n", velems->count); 1276 velems->count = 16; 1277 } 1278 1279 /* Vertex shaders have no semantics on their inputs, 1280 * so PSC should just route stuff based on the vertex elements, 1281 * and not on attrib information. */ 1282 for (i = 0; i < velems->count; i++) { 1283 format = velems->hw_format[i]; 1284 1285 type = r300_translate_vertex_data_type(format); 1286 if (type == R300_INVALID_FORMAT) { 1287 fprintf(stderr, "r300: Bad vertex format %s.\n", 1288 util_format_short_name(format)); 1289 assert(0); 1290 abort(); 1291 } 1292 1293 type |= i << R300_DST_VEC_LOC_SHIFT; 1294 swizzle = r300_translate_vertex_data_swizzle(format); 1295 1296 if (i & 1) { 1297 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1298 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1299 } else { 1300 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1301 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1302 } 1303 } 1304 1305 /* Set the last vector in the PSC. */ 1306 if (i) { 1307 i -= 1; 1308 } 1309 vstream->vap_prog_stream_cntl[i >> 1] |= 1310 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1311 1312 vstream->count = (i >> 1) + 1; 1313} 1314 1315#define FORMAT_REPLACE(what, withwhat) \ 1316 case PIPE_FORMAT_##what: *format = PIPE_FORMAT_##withwhat; break 1317 1318static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1319 unsigned count, 1320 const struct pipe_vertex_element* attribs) 1321{ 1322 struct r300_vertex_element_state *velems; 1323 unsigned i; 1324 enum pipe_format *format; 1325 1326 assert(count <= PIPE_MAX_ATTRIBS); 1327 velems = CALLOC_STRUCT(r300_vertex_element_state); 1328 if (velems != NULL) { 1329 velems->count = count; 1330 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1331 1332 if (r300_screen(pipe->screen)->caps.has_tcl) { 1333 /* Set the best hw format in case the original format is not 1334 * supported by hw. */ 1335 for (i = 0; i < count; i++) { 1336 velems->hw_format[i] = velems->velem[i].src_format; 1337 format = &velems->hw_format[i]; 1338 1339 /* This is basically the list of unsupported formats. 1340 * For now we don't care about the alignment, that's going to 1341 * be sorted out after the PSC setup. */ 1342 switch (*format) { 1343 FORMAT_REPLACE(R64_FLOAT, R32_FLOAT); 1344 FORMAT_REPLACE(R64G64_FLOAT, R32G32_FLOAT); 1345 FORMAT_REPLACE(R64G64B64_FLOAT, R32G32B32_FLOAT); 1346 FORMAT_REPLACE(R64G64B64A64_FLOAT, R32G32B32A32_FLOAT); 1347 1348 FORMAT_REPLACE(R32_UNORM, R32_FLOAT); 1349 FORMAT_REPLACE(R32G32_UNORM, R32G32_FLOAT); 1350 FORMAT_REPLACE(R32G32B32_UNORM, R32G32B32_FLOAT); 1351 FORMAT_REPLACE(R32G32B32A32_UNORM, R32G32B32A32_FLOAT); 1352 1353 FORMAT_REPLACE(R32_USCALED, R32_FLOAT); 1354 FORMAT_REPLACE(R32G32_USCALED, R32G32_FLOAT); 1355 FORMAT_REPLACE(R32G32B32_USCALED, R32G32B32_FLOAT); 1356 FORMAT_REPLACE(R32G32B32A32_USCALED,R32G32B32A32_FLOAT); 1357 1358 FORMAT_REPLACE(R32_SNORM, R32_FLOAT); 1359 FORMAT_REPLACE(R32G32_SNORM, R32G32_FLOAT); 1360 FORMAT_REPLACE(R32G32B32_SNORM, R32G32B32_FLOAT); 1361 FORMAT_REPLACE(R32G32B32A32_SNORM, R32G32B32A32_FLOAT); 1362 1363 FORMAT_REPLACE(R32_SSCALED, R32_FLOAT); 1364 FORMAT_REPLACE(R32G32_SSCALED, R32G32_FLOAT); 1365 FORMAT_REPLACE(R32G32B32_SSCALED, R32G32B32_FLOAT); 1366 FORMAT_REPLACE(R32G32B32A32_SSCALED,R32G32B32A32_FLOAT); 1367 1368 FORMAT_REPLACE(R32_FIXED, R32_FLOAT); 1369 FORMAT_REPLACE(R32G32_FIXED, R32G32_FLOAT); 1370 FORMAT_REPLACE(R32G32B32_FIXED, R32G32B32_FLOAT); 1371 FORMAT_REPLACE(R32G32B32A32_FIXED, R32G32B32A32_FLOAT); 1372 1373 default:; 1374 } 1375 1376 velems->incompatible_layout = 1377 velems->incompatible_layout || 1378 velems->velem[i].src_format != velems->hw_format[i] || 1379 velems->velem[i].src_offset % 4 != 0; 1380 } 1381 1382 /* Now setup PSC. 1383 * The unused components will be replaced by (..., 0, 1). */ 1384 r300_vertex_psc(velems); 1385 1386 /* Align the formats to the size of DWORD. 1387 * We only care about the blocksizes of the formats since 1388 * swizzles are already set up. */ 1389 for (i = 0; i < count; i++) { 1390 /* This is OK because we check for aligned strides too. */ 1391 velems->hw_format_size[i] = 1392 align(util_format_get_blocksize(velems->hw_format[i]), 4); 1393 } 1394 } 1395 } 1396 return velems; 1397} 1398 1399static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1400 void *state) 1401{ 1402 struct r300_context *r300 = r300_context(pipe); 1403 struct r300_vertex_element_state *velems = state; 1404 1405 if (velems == NULL) { 1406 return; 1407 } 1408 1409 r300->velems = velems; 1410 1411 if (r300->draw) { 1412 draw_flush(r300->draw); 1413 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1414 return; 1415 } 1416 1417 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1418 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1419} 1420 1421static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1422{ 1423 FREE(state); 1424} 1425 1426static void* r300_create_vs_state(struct pipe_context* pipe, 1427 const struct pipe_shader_state* shader) 1428{ 1429 struct r300_context* r300 = r300_context(pipe); 1430 1431 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1432 1433 /* Copy state directly into shader. */ 1434 vs->state = *shader; 1435 vs->state.tokens = tgsi_dup_tokens(shader->tokens); 1436 1437 if (r300->screen->caps.has_tcl) { 1438 r300_init_vs_outputs(vs); 1439 r300_translate_vertex_shader(r300, vs); 1440 } else { 1441 r300_draw_init_vertex_shader(r300->draw, vs); 1442 } 1443 1444 return vs; 1445} 1446 1447static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1448{ 1449 struct r300_context* r300 = r300_context(pipe); 1450 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1451 1452 if (vs == NULL) { 1453 r300->vs_state.state = NULL; 1454 return; 1455 } 1456 if (vs == r300->vs_state.state) { 1457 return; 1458 } 1459 r300->vs_state.state = vs; 1460 1461 /* The majority of the RS block bits is dependent on the vertex shader. */ 1462 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 1463 1464 if (r300->screen->caps.has_tcl) { 1465 r300->vs_state.dirty = TRUE; 1466 r300->vs_state.size = 1467 vs->code.length + 9 + 1468 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0); 1469 1470 if (vs->externals_count) { 1471 r300->vs_constants.dirty = TRUE; 1472 r300->vs_constants.size = vs->externals_count * 4 + 3; 1473 } else { 1474 r300->vs_constants.size = 0; 1475 } 1476 1477 r300->pvs_flush.dirty = TRUE; 1478 } else { 1479 draw_flush(r300->draw); 1480 draw_bind_vertex_shader(r300->draw, 1481 (struct draw_vertex_shader*)vs->draw_vs); 1482 } 1483} 1484 1485static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1486{ 1487 struct r300_context* r300 = r300_context(pipe); 1488 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1489 1490 if (r300->screen->caps.has_tcl) { 1491 rc_constants_destroy(&vs->code.constants); 1492 } else { 1493 draw_delete_vertex_shader(r300->draw, 1494 (struct draw_vertex_shader*)vs->draw_vs); 1495 } 1496 1497 FREE((void*)vs->state.tokens); 1498 FREE(shader); 1499} 1500 1501static void r300_set_constant_buffer(struct pipe_context *pipe, 1502 uint shader, uint index, 1503 struct pipe_resource *buf) 1504{ 1505 struct r300_context* r300 = r300_context(pipe); 1506 struct r300_constant_buffer *cbuf; 1507 struct pipe_transfer *tr; 1508 void *mapped; 1509 int max_size = 0, max_size_bytes = 0, clamped_size = 0; 1510 1511 switch (shader) { 1512 case PIPE_SHADER_VERTEX: 1513 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state; 1514 max_size = 256; 1515 break; 1516 case PIPE_SHADER_FRAGMENT: 1517 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state; 1518 if (r300->screen->caps.is_r500) { 1519 max_size = 256; 1520 } else { 1521 max_size = 32; 1522 } 1523 break; 1524 default: 1525 assert(0); 1526 return; 1527 } 1528 max_size_bytes = max_size * 4 * sizeof(float); 1529 1530 if (buf == NULL || buf->width0 == 0 || 1531 (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL) 1532 { 1533 cbuf->count = 0; 1534 return; 1535 } 1536 1537 if (shader == PIPE_SHADER_FRAGMENT || 1538 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) { 1539 assert((buf->width0 % (4 * sizeof(float))) == 0); 1540 1541 /* Check the size of the constant buffer. */ 1542 /* XXX Subtract immediates and RC_STATE_* variables. */ 1543 if (buf->width0 > max_size_bytes) { 1544 fprintf(stderr, "r300: Max size of the constant buffer is " 1545 "%i*4 floats.\n", max_size); 1546 } 1547 clamped_size = MIN2(buf->width0, max_size_bytes); 1548 1549 memcpy(cbuf->constants, mapped, clamped_size); 1550 cbuf->count = clamped_size / (4 * sizeof(float)); 1551 } 1552 1553 if (shader == PIPE_SHADER_VERTEX) { 1554 if (r300->screen->caps.has_tcl) { 1555 if (r300->vs_constants.size) { 1556 r300->vs_constants.dirty = TRUE; 1557 } 1558 r300->pvs_flush.dirty = TRUE; 1559 } else if (r300->draw) { 1560 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX, 1561 0, mapped, buf->width0); 1562 } 1563 } else if (shader == PIPE_SHADER_FRAGMENT) { 1564 r300->fs_constants.dirty = TRUE; 1565 } 1566 1567 pipe_buffer_unmap(pipe, buf, tr); 1568} 1569 1570void r300_init_state_functions(struct r300_context* r300) 1571{ 1572 r300->context.create_blend_state = r300_create_blend_state; 1573 r300->context.bind_blend_state = r300_bind_blend_state; 1574 r300->context.delete_blend_state = r300_delete_blend_state; 1575 1576 r300->context.set_blend_color = r300_set_blend_color; 1577 1578 r300->context.set_clip_state = r300_set_clip_state; 1579 r300->context.set_sample_mask = r300_set_sample_mask; 1580 1581 r300->context.set_constant_buffer = r300_set_constant_buffer; 1582 1583 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1584 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1585 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1586 1587 r300->context.set_stencil_ref = r300_set_stencil_ref; 1588 1589 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1590 1591 r300->context.create_fs_state = r300_create_fs_state; 1592 r300->context.bind_fs_state = r300_bind_fs_state; 1593 r300->context.delete_fs_state = r300_delete_fs_state; 1594 1595 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1596 1597 r300->context.create_rasterizer_state = r300_create_rs_state; 1598 r300->context.bind_rasterizer_state = r300_bind_rs_state; 1599 r300->context.delete_rasterizer_state = r300_delete_rs_state; 1600 1601 r300->context.create_sampler_state = r300_create_sampler_state; 1602 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 1603 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 1604 r300->context.delete_sampler_state = r300_delete_sampler_state; 1605 1606 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 1607 r300->context.create_sampler_view = r300_create_sampler_view; 1608 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 1609 1610 r300->context.set_scissor_state = r300_set_scissor_state; 1611 1612 r300->context.set_viewport_state = r300_set_viewport_state; 1613 1614 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 1615 1616 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 1617 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 1618 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 1619 1620 r300->context.create_vs_state = r300_create_vs_state; 1621 r300->context.bind_vs_state = r300_bind_vs_state; 1622 r300->context.delete_vs_state = r300_delete_vs_state; 1623} 1624