r300_state.c revision bcfde429139476c2d04baddaf671651cfc860145
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23#include "draw/draw_context.h" 24 25#include "util/u_math.h" 26#include "util/u_memory.h" 27#include "util/u_pack_color.h" 28 29#include "tgsi/tgsi_parse.h" 30 31#include "pipe/p_config.h" 32#include "pipe/internal/p_winsys_screen.h" 33 34#include "r300_context.h" 35#include "r300_reg.h" 36#include "r300_screen.h" 37#include "r300_state_inlines.h" 38#include "r300_fs.h" 39#include "r300_vs.h" 40 41/* r300_state: Functions used to intialize state context by translating 42 * Gallium state objects into semi-native r300 state objects. */ 43 44/* Create a new blend state based on the CSO blend state. 45 * 46 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 47static void* r300_create_blend_state(struct pipe_context* pipe, 48 const struct pipe_blend_state* state) 49{ 50 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 51 52 if (state->blend_enable) 53 { 54 unsigned eqRGB = state->rgb_func; 55 unsigned srcRGB = state->rgb_src_factor; 56 unsigned dstRGB = state->rgb_dst_factor; 57 58 unsigned eqA = state->alpha_func; 59 unsigned srcA = state->alpha_src_factor; 60 unsigned dstA = state->alpha_dst_factor; 61 62 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 63 * this is just the crappy D3D naming */ 64 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 65 r300_translate_blend_function(eqRGB) | 66 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 67 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 68 69 /* optimization: some operations do not require the destination color */ 70 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 71 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 72 dstRGB != PIPE_BLENDFACTOR_ZERO || 73 dstA != PIPE_BLENDFACTOR_ZERO || 74 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 75 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 76 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 77 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 78 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 79 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA) 80 blend->blend_control |= R300_READ_ENABLE; 81 82 /* XXX implement the optimization with DISCARD_SRC_PIXELS*/ 83 /* XXX implement the optimization with SRC_ALPHA_?_NO_READ */ 84 85 /* separate alpha */ 86 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 87 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE; 88 blend->alpha_blend_control = 89 r300_translate_blend_function(eqA) | 90 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 91 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 92 } 93 } 94 95 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 96 if (state->logicop_enable) { 97 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 98 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 99 } 100 101 if (state->dither) { 102 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 103 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 104 } 105 106 return (void*)blend; 107} 108 109/* Bind blend state. */ 110static void r300_bind_blend_state(struct pipe_context* pipe, 111 void* state) 112{ 113 struct r300_context* r300 = r300_context(pipe); 114 115 r300->blend_state = (struct r300_blend_state*)state; 116 r300->dirty_state |= R300_NEW_BLEND; 117} 118 119/* Free blend state. */ 120static void r300_delete_blend_state(struct pipe_context* pipe, 121 void* state) 122{ 123 FREE(state); 124} 125 126/* Convert float to 10bit integer */ 127static unsigned float_to_fixed10(float f) 128{ 129 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 130} 131 132/* Set blend color. 133 * Setup both R300 and R500 registers, figure out later which one to write. */ 134static void r300_set_blend_color(struct pipe_context* pipe, 135 const struct pipe_blend_color* color) 136{ 137 struct r300_context* r300 = r300_context(pipe); 138 139 util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM, 140 &r300->blend_color_state->blend_color); 141 142 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 143 r300->blend_color_state->blend_color_red_alpha = 144 float_to_fixed10(color->color[0]) | 145 (float_to_fixed10(color->color[3]) << 16); 146 r300->blend_color_state->blend_color_green_blue = 147 float_to_fixed10(color->color[2]) | 148 (float_to_fixed10(color->color[1]) << 16); 149 150 r300->dirty_state |= R300_NEW_BLEND_COLOR; 151} 152 153static void r300_set_clip_state(struct pipe_context* pipe, 154 const struct pipe_clip_state* state) 155{ 156 struct r300_context* r300 = r300_context(pipe); 157 158 if (r300_screen(pipe->screen)->caps->has_tcl) { 159 r300->clip_state = *state; 160 r300->dirty_state |= R300_NEW_CLIP; 161 } else { 162 draw_flush(r300->draw); 163 draw_set_clip_state(r300->draw, state); 164 } 165} 166 167static void 168 r300_set_constant_buffer(struct pipe_context* pipe, 169 uint shader, uint index, 170 const struct pipe_constant_buffer* buffer) 171{ 172 struct r300_context* r300 = r300_context(pipe); 173 174 /* This entire chunk of code seems ever-so-slightly baked. 175 * It's as if I've got pipe_buffer* matryoshkas... */ 176 if (buffer && buffer->buffer && buffer->buffer->size) { 177 void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer, 178 PIPE_BUFFER_USAGE_CPU_READ); 179 memcpy(r300->shader_constants[shader].constants, 180 map, buffer->buffer->size); 181 pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer); 182 183 r300->shader_constants[shader].count = 184 buffer->buffer->size / (sizeof(float) * 4); 185 } else { 186 r300->shader_constants[shader].count = 0; 187 } 188 189 r300->dirty_state |= R300_NEW_CONSTANTS; 190} 191 192/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 193 * 194 * This contains the depth buffer, stencil buffer, alpha test, and such. 195 * On the Radeon, depth and stencil buffer setup are intertwined, which is 196 * the reason for some of the strange-looking assignments across registers. */ 197static void* 198 r300_create_dsa_state(struct pipe_context* pipe, 199 const struct pipe_depth_stencil_alpha_state* state) 200{ 201 struct r300_capabilities *caps = 202 r300_screen(r300_context(pipe)->context.screen)->caps; 203 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 204 205 /* Depth test setup. */ 206 if (state->depth.enabled) { 207 dsa->z_buffer_control |= R300_Z_ENABLE; 208 209 if (state->depth.writemask) { 210 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 211 } 212 213 dsa->z_stencil_control |= 214 (r300_translate_depth_stencil_function(state->depth.func) << 215 R300_Z_FUNC_SHIFT); 216 } 217 218 /* Stencil buffer setup. */ 219 if (state->stencil[0].enabled) { 220 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 221 dsa->z_stencil_control |= 222 (r300_translate_depth_stencil_function(state->stencil[0].func) << 223 R300_S_FRONT_FUNC_SHIFT) | 224 (r300_translate_stencil_op(state->stencil[0].fail_op) << 225 R300_S_FRONT_SFAIL_OP_SHIFT) | 226 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 227 R300_S_FRONT_ZPASS_OP_SHIFT) | 228 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 229 R300_S_FRONT_ZFAIL_OP_SHIFT); 230 231 dsa->stencil_ref_mask = (state->stencil[0].ref_value) | 232 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 233 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 234 235 if (state->stencil[1].enabled) { 236 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 237 dsa->z_stencil_control |= 238 (r300_translate_depth_stencil_function(state->stencil[1].func) << 239 R300_S_BACK_FUNC_SHIFT) | 240 (r300_translate_stencil_op(state->stencil[1].fail_op) << 241 R300_S_BACK_SFAIL_OP_SHIFT) | 242 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 243 R300_S_BACK_ZPASS_OP_SHIFT) | 244 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 245 R300_S_BACK_ZFAIL_OP_SHIFT); 246 247 /* XXX it seems r3xx doesn't support STENCILREFMASK_BF */ 248 if (caps->is_r500) 249 { 250 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 251 dsa->stencil_ref_bf = (state->stencil[1].ref_value) | 252 (state->stencil[1].valuemask << 253 R300_STENCILMASK_SHIFT) | 254 (state->stencil[1].writemask << 255 R300_STENCILWRITEMASK_SHIFT); 256 } 257 } 258 } 259 260 /* Alpha test setup. */ 261 if (state->alpha.enabled) { 262 dsa->alpha_function = 263 r300_translate_alpha_function(state->alpha.func) | 264 R300_FG_ALPHA_FUNC_ENABLE; 265 266 /* XXX figure out why emitting 10bit alpha ref causes CS to dump */ 267 /* always use 8bit alpha ref */ 268 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 269 270 if (caps->is_r500) 271 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 272 } 273 274 return (void*)dsa; 275} 276 277/* Bind DSA state. */ 278static void r300_bind_dsa_state(struct pipe_context* pipe, 279 void* state) 280{ 281 struct r300_context* r300 = r300_context(pipe); 282 283 r300->dsa_state = (struct r300_dsa_state*)state; 284 r300->dirty_state |= R300_NEW_DSA; 285} 286 287/* Free DSA state. */ 288static void r300_delete_dsa_state(struct pipe_context* pipe, 289 void* state) 290{ 291 FREE(state); 292} 293 294static void r300_set_edgeflags(struct pipe_context* pipe, 295 const unsigned* bitfield) 296{ 297 /* XXX you know it's bad when i915 has this blank too */ 298 /* XXX and even worse, I have no idea WTF the bitfield is */ 299} 300 301static void 302 r300_set_framebuffer_state(struct pipe_context* pipe, 303 const struct pipe_framebuffer_state* state) 304{ 305 struct r300_context* r300 = r300_context(pipe); 306 307 draw_flush(r300->draw); 308 309 r300->framebuffer_state = *state; 310 311 r300->dirty_state |= R300_NEW_FRAMEBUFFERS; 312} 313 314/* Create fragment shader state. */ 315static void* r300_create_fs_state(struct pipe_context* pipe, 316 const struct pipe_shader_state* shader) 317{ 318 struct r300_fragment_shader* fs = NULL; 319 320 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 321 322 /* Copy state directly into shader. */ 323 fs->state = *shader; 324 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 325 326 tgsi_scan_shader(shader->tokens, &fs->info); 327 328 return (void*)fs; 329} 330 331/* Bind fragment shader state. */ 332static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 333{ 334 struct r300_context* r300 = r300_context(pipe); 335 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 336 337 if (fs == NULL) { 338 r300->fs = NULL; 339 return; 340 } else if (!fs->translated) { 341 r300_translate_fragment_shader(r300, fs); 342 } 343 344 r300->fs = fs; 345 346 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER; 347} 348 349/* Delete fragment shader state. */ 350static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 351{ 352 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 353 rc_constants_destroy(&fs->code.constants); 354 FREE((void*)fs->state.tokens); 355 FREE(shader); 356} 357 358static void r300_set_polygon_stipple(struct pipe_context* pipe, 359 const struct pipe_poly_stipple* state) 360{ 361 /* XXX no idea how to set this up, but not terribly important */ 362} 363 364/* Create a new rasterizer state based on the CSO rasterizer state. 365 * 366 * This is a very large chunk of state, and covers most of the graphics 367 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 368 * 369 * In a not entirely unironic sidenote, this state has nearly nothing to do 370 * with the actual block on the Radeon called the rasterizer (RS). */ 371static void* r300_create_rs_state(struct pipe_context* pipe, 372 const struct pipe_rasterizer_state* state) 373{ 374 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 375 376 /* Copy rasterizer state for Draw. */ 377 rs->rs = *state; 378 379 rs->enable_vte = !state->bypass_vs_clip_and_viewport; 380 381#ifdef PIPE_ARCH_LITTLE_ENDIAN 382 rs->vap_control_status = R300_VC_NO_SWAP; 383#else 384 rs->vap_control_status = R300_VC_32BIT_SWAP; 385#endif 386 387 /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL. 388 * Else, enable HW TCL and force Draw's TCL off. */ 389 if (state->bypass_vs_clip_and_viewport || 390 !r300_screen(pipe->screen)->caps->has_tcl) { 391 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 392 } else { 393 rs->rs.bypass_vs_clip_and_viewport = TRUE; 394 } 395 396 rs->point_size = pack_float_16_6x(state->point_size) | 397 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 398 399 rs->point_minmax = 400 ((int)(state->point_size_min * 6.0) << 401 R300_GA_POINT_MINMAX_MIN_SHIFT) | 402 ((int)(state->point_size_max * 6.0) << 403 R300_GA_POINT_MINMAX_MAX_SHIFT); 404 405 rs->line_control = pack_float_16_6x(state->line_width) | 406 R300_GA_LINE_CNTL_END_TYPE_COMP; 407 408 /* Radeons don't think in "CW/CCW", they think in "front/back". */ 409 if (state->front_winding == PIPE_WINDING_CW) { 410 rs->cull_mode = R300_FRONT_FACE_CW; 411 412 if (state->offset_cw) { 413 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 414 } 415 if (state->offset_ccw) { 416 rs->polygon_offset_enable |= R300_BACK_ENABLE; 417 } 418 } else { 419 rs->cull_mode = R300_FRONT_FACE_CCW; 420 421 if (state->offset_ccw) { 422 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 423 } 424 if (state->offset_cw) { 425 rs->polygon_offset_enable |= R300_BACK_ENABLE; 426 } 427 } 428 if (state->front_winding & state->cull_mode) { 429 rs->cull_mode |= R300_CULL_FRONT; 430 } 431 if (~(state->front_winding) & state->cull_mode) { 432 rs->cull_mode |= R300_CULL_BACK; 433 } 434 435 if (rs->polygon_offset_enable) { 436 rs->depth_offset_front = rs->depth_offset_back = 437 fui(state->offset_units); 438 rs->depth_scale_front = rs->depth_scale_back = 439 fui(state->offset_scale); 440 } 441 442 if (state->line_stipple_enable) { 443 rs->line_stipple_config = 444 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 445 (fui((float)state->line_stipple_factor) & 446 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 447 /* XXX this might need to be scaled up */ 448 rs->line_stipple_value = state->line_stipple_pattern; 449 } 450 451 if (state->flatshade) { 452 rs->color_control = R300_SHADE_MODEL_FLAT; 453 } else { 454 rs->color_control = R300_SHADE_MODEL_SMOOTH; 455 } 456 457 if (!state->flatshade_first) { 458 rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 459 } 460 461 return (void*)rs; 462} 463 464/* Bind rasterizer state. */ 465static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 466{ 467 struct r300_context* r300 = r300_context(pipe); 468 struct r300_rs_state* rs = (struct r300_rs_state*)state; 469 470 draw_flush(r300->draw); 471 draw_set_rasterizer_state(r300->draw, &rs->rs); 472 473 r300->rs_state = rs; 474 r300->dirty_state |= R300_NEW_RASTERIZER; 475 r300->dirty_state |= R300_NEW_RS_BLOCK; 476 r300->dirty_state |= R300_NEW_SCISSOR; 477 r300->dirty_state |= R300_NEW_VIEWPORT; 478} 479 480/* Free rasterizer state. */ 481static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 482{ 483 FREE(state); 484} 485 486static void* 487 r300_create_sampler_state(struct pipe_context* pipe, 488 const struct pipe_sampler_state* state) 489{ 490 struct r300_context* r300 = r300_context(pipe); 491 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 492 int lod_bias; 493 494 sampler->filter0 |= 495 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 496 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 497 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 498 499 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 500 state->mag_img_filter, 501 state->min_mip_filter); 502 503 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); 504 505 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 506 507 sampler->filter1 |= r300_anisotropy(state->max_anisotropy); 508 509 util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM, 510 &sampler->border_color); 511 512 /* R500-specific fixups and optimizations */ 513 if (r300_screen(r300->context.screen)->caps->is_r500) { 514 sampler->filter1 |= R500_BORDER_FIX; 515 } 516 517 return (void*)sampler; 518} 519 520static void r300_bind_sampler_states(struct pipe_context* pipe, 521 unsigned count, 522 void** states) 523{ 524 struct r300_context* r300 = r300_context(pipe); 525 int i; 526 527 if (count > 8) { 528 return; 529 } 530 531 for (i = 0; i < count; i++) { 532 if (r300->sampler_states[i] != states[i]) { 533 r300->sampler_states[i] = (struct r300_sampler_state*)states[i]; 534 r300->dirty_state |= (R300_NEW_SAMPLER << i); 535 } 536 } 537 538 r300->sampler_count = count; 539} 540 541static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 542{ 543 FREE(state); 544} 545 546static void r300_set_sampler_textures(struct pipe_context* pipe, 547 unsigned count, 548 struct pipe_texture** texture) 549{ 550 struct r300_context* r300 = r300_context(pipe); 551 int i; 552 553 /* XXX magic num */ 554 if (count > 8) { 555 return; 556 } 557 558 for (i = 0; i < count; i++) { 559 if (r300->textures[i] != (struct r300_texture*)texture[i]) { 560 pipe_texture_reference((struct pipe_texture**)&r300->textures[i], 561 texture[i]); 562 r300->dirty_state |= (R300_NEW_TEXTURE << i); 563 } 564 } 565 566 for (i = count; i < 8; i++) { 567 if (r300->textures[i]) { 568 pipe_texture_reference((struct pipe_texture**)&r300->textures[i], 569 NULL); 570 r300->dirty_state |= (R300_NEW_TEXTURE << i); 571 } 572 } 573 574 r300->texture_count = count; 575} 576 577static void r300_set_scissor_state(struct pipe_context* pipe, 578 const struct pipe_scissor_state* state) 579{ 580 struct r300_context* r300 = r300_context(pipe); 581 582 if (r300_screen(r300->context.screen)->caps->is_r500) { 583 r300->scissor_state->scissor_top_left = 584 (state->minx << R300_SCISSORS_X_SHIFT) | 585 (state->miny << R300_SCISSORS_Y_SHIFT); 586 r300->scissor_state->scissor_bottom_right = 587 ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) | 588 ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT); 589 } else { 590 /* Offset of 1440 in non-R500 chipsets. */ 591 r300->scissor_state->scissor_top_left = 592 ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) | 593 ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT); 594 r300->scissor_state->scissor_bottom_right = 595 (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) | 596 (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT); 597 } 598 599 r300->dirty_state |= R300_NEW_SCISSOR; 600} 601 602static void r300_set_viewport_state(struct pipe_context* pipe, 603 const struct pipe_viewport_state* state) 604{ 605 struct r300_context* r300 = r300_context(pipe); 606 607 /* Do the transform in HW. */ 608 r300->viewport_state->vte_control = R300_VTX_W0_FMT; 609 610 if (state->scale[0] != 1.0f) { 611 assert(state->scale[0] != 0.0f); 612 r300->viewport_state->xscale = state->scale[0]; 613 r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA; 614 } 615 if (state->scale[1] != 1.0f) { 616 assert(state->scale[1] != 0.0f); 617 r300->viewport_state->yscale = state->scale[1]; 618 r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA; 619 } 620 if (state->scale[2] != 1.0f) { 621 assert(state->scale[2] != 0.0f); 622 r300->viewport_state->zscale = state->scale[2]; 623 r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA; 624 } 625 if (state->translate[0] != 0.0f) { 626 r300->viewport_state->xoffset = state->translate[0]; 627 r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA; 628 } 629 if (state->translate[1] != 0.0f) { 630 r300->viewport_state->yoffset = state->translate[1]; 631 r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA; 632 } 633 if (state->translate[2] != 0.0f) { 634 r300->viewport_state->zoffset = state->translate[2]; 635 r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA; 636 } 637 638 r300->dirty_state |= R300_NEW_VIEWPORT; 639} 640 641static void r300_set_vertex_buffers(struct pipe_context* pipe, 642 unsigned count, 643 const struct pipe_vertex_buffer* buffers) 644{ 645 struct r300_context* r300 = r300_context(pipe); 646 647 memcpy(r300->vertex_buffers, buffers, 648 sizeof(struct pipe_vertex_buffer) * count); 649 650 r300->vertex_buffer_count = count; 651 652 draw_flush(r300->draw); 653 draw_set_vertex_buffers(r300->draw, count, buffers); 654} 655 656static void r300_set_vertex_elements(struct pipe_context* pipe, 657 unsigned count, 658 const struct pipe_vertex_element* elements) 659{ 660 struct r300_context* r300 = r300_context(pipe); 661 662 draw_flush(r300->draw); 663 draw_set_vertex_elements(r300->draw, count, elements); 664} 665 666static void* r300_create_vs_state(struct pipe_context* pipe, 667 const struct pipe_shader_state* shader) 668{ 669 struct r300_context* r300 = r300_context(pipe); 670 671 if (r300_screen(pipe->screen)->caps->has_tcl) { 672 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 673 /* Copy state directly into shader. */ 674 vs->state = *shader; 675 vs->state.tokens = tgsi_dup_tokens(shader->tokens); 676 677 tgsi_scan_shader(shader->tokens, &vs->info); 678 679 /* Appease Draw. */ 680 vs->draw = draw_create_vertex_shader(r300->draw, shader); 681 682 return (void*)vs; 683 } else { 684 return draw_create_vertex_shader(r300->draw, shader); 685 } 686} 687 688static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 689{ 690 struct r300_context* r300 = r300_context(pipe); 691 692 draw_flush(r300->draw); 693 694 if (r300_screen(pipe->screen)->caps->has_tcl) { 695 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 696 697 if (vs == NULL) { 698 r300->vs = NULL; 699 return; 700 } else if (!vs->translated) { 701 r300_translate_vertex_shader(r300, vs); 702 } 703 704 draw_bind_vertex_shader(r300->draw, vs->draw); 705 r300->vs = vs; 706 r300->dirty_state |= R300_NEW_VERTEX_SHADER; 707 } else { 708 draw_bind_vertex_shader(r300->draw, 709 (struct draw_vertex_shader*)shader); 710 } 711} 712 713static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 714{ 715 struct r300_context* r300 = r300_context(pipe); 716 717 if (r300_screen(pipe->screen)->caps->has_tcl) { 718 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 719 720 rc_constants_destroy(&vs->code.constants); 721 draw_delete_vertex_shader(r300->draw, vs->draw); 722 FREE((void*)vs->state.tokens); 723 FREE(shader); 724 } else { 725 draw_delete_vertex_shader(r300->draw, 726 (struct draw_vertex_shader*)shader); 727 } 728} 729 730void r300_init_state_functions(struct r300_context* r300) 731{ 732 r300->context.create_blend_state = r300_create_blend_state; 733 r300->context.bind_blend_state = r300_bind_blend_state; 734 r300->context.delete_blend_state = r300_delete_blend_state; 735 736 r300->context.set_blend_color = r300_set_blend_color; 737 738 r300->context.set_clip_state = r300_set_clip_state; 739 740 r300->context.set_constant_buffer = r300_set_constant_buffer; 741 742 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 743 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 744 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 745 746 r300->context.set_edgeflags = r300_set_edgeflags; 747 748 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 749 750 r300->context.create_fs_state = r300_create_fs_state; 751 r300->context.bind_fs_state = r300_bind_fs_state; 752 r300->context.delete_fs_state = r300_delete_fs_state; 753 754 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 755 756 r300->context.create_rasterizer_state = r300_create_rs_state; 757 r300->context.bind_rasterizer_state = r300_bind_rs_state; 758 r300->context.delete_rasterizer_state = r300_delete_rs_state; 759 760 r300->context.create_sampler_state = r300_create_sampler_state; 761 r300->context.bind_sampler_states = r300_bind_sampler_states; 762 r300->context.delete_sampler_state = r300_delete_sampler_state; 763 764 r300->context.set_sampler_textures = r300_set_sampler_textures; 765 766 r300->context.set_scissor_state = r300_set_scissor_state; 767 768 r300->context.set_viewport_state = r300_set_viewport_state; 769 770 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 771 r300->context.set_vertex_elements = r300_set_vertex_elements; 772 773 r300->context.create_vs_state = r300_create_vs_state; 774 r300->context.bind_vs_state = r300_bind_vs_state; 775 r300->context.delete_vs_state = r300_delete_vs_state; 776} 777