r300_state.c revision fccfb7b16512a36424370dc1942cdedd3d1c208a
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_math.h" 27#include "util/u_memory.h" 28#include "util/u_pack_color.h" 29 30#include "tgsi/tgsi_parse.h" 31 32#include "pipe/p_config.h" 33 34#include "r300_context.h" 35#include "r300_emit.h" 36#include "r300_reg.h" 37#include "r300_screen.h" 38#include "r300_screen_buffer.h" 39#include "r300_state.h" 40#include "r300_state_inlines.h" 41#include "r300_fs.h" 42#include "r300_texture.h" 43#include "r300_vs.h" 44#include "r300_winsys.h" 45 46/* r300_state: Functions used to intialize state context by translating 47 * Gallium state objects into semi-native r300 state objects. */ 48 49#define UPDATE_STATE(cso, atom) \ 50 if (cso != atom.state) { \ 51 atom.state = cso; \ 52 atom.dirty = TRUE; \ 53 } 54 55static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 56 unsigned dstRGB, unsigned dstA) 57{ 58 /* If the blend equation is ADD or REVERSE_SUBTRACT, 59 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 60 * will not be changed. 61 * Notice that the dst factors are the src factors inverted. */ 62 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 63 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 64 srcRGB == PIPE_BLENDFACTOR_ZERO) && 65 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 66 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 67 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 68 srcA == PIPE_BLENDFACTOR_ZERO) && 69 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 70 dstRGB == PIPE_BLENDFACTOR_ONE) && 71 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 72 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 73 dstA == PIPE_BLENDFACTOR_ONE); 74} 75 76static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 77 unsigned dstRGB, unsigned dstA) 78{ 79 /* If the blend equation is ADD or REVERSE_SUBTRACT, 80 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 81 * will not be changed. 82 * Notice that the dst factors are the src factors inverted. */ 83 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 84 srcRGB == PIPE_BLENDFACTOR_ZERO) && 85 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 86 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 87 srcA == PIPE_BLENDFACTOR_ZERO) && 88 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 89 dstRGB == PIPE_BLENDFACTOR_ONE) && 90 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 91 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 92 dstA == PIPE_BLENDFACTOR_ONE); 93} 94 95static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 96 unsigned dstRGB, unsigned dstA) 97{ 98 /* If the blend equation is ADD or REVERSE_SUBTRACT, 99 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 100 * will not be changed. 101 * Notice that the dst factors are the src factors inverted. */ 102 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 103 srcRGB == PIPE_BLENDFACTOR_ZERO) && 104 (srcA == PIPE_BLENDFACTOR_ZERO) && 105 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 106 dstRGB == PIPE_BLENDFACTOR_ONE) && 107 (dstA == PIPE_BLENDFACTOR_ONE); 108} 109 110static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 111 unsigned dstRGB, unsigned dstA) 112{ 113 /* If the blend equation is ADD or REVERSE_SUBTRACT, 114 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 115 * will not be changed. 116 * Notice that the dst factors are the src factors inverted. */ 117 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 118 srcRGB == PIPE_BLENDFACTOR_ZERO) && 119 (srcA == PIPE_BLENDFACTOR_ZERO) && 120 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 121 dstRGB == PIPE_BLENDFACTOR_ONE) && 122 (dstA == PIPE_BLENDFACTOR_ONE); 123} 124 125static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 126 unsigned dstRGB, unsigned dstA) 127{ 128 /* If the blend equation is ADD or REVERSE_SUBTRACT, 129 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 130 * the colorbuffer will not be changed. 131 * Notice that the dst factors are the src factors inverted. */ 132 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 133 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 134 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 135 srcRGB == PIPE_BLENDFACTOR_ZERO) && 136 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 137 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 138 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 139 srcA == PIPE_BLENDFACTOR_ZERO) && 140 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 141 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 142 dstRGB == PIPE_BLENDFACTOR_ONE) && 143 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 144 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 145 dstA == PIPE_BLENDFACTOR_ONE); 146} 147 148static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 149 unsigned dstRGB, unsigned dstA) 150{ 151 /* If the blend equation is ADD or REVERSE_SUBTRACT, 152 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 153 * the colorbuffer will not be changed. 154 * Notice that the dst factors are the src factors inverted. */ 155 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 156 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 157 srcRGB == PIPE_BLENDFACTOR_ZERO) && 158 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 159 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 160 srcA == PIPE_BLENDFACTOR_ZERO) && 161 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 162 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 163 dstRGB == PIPE_BLENDFACTOR_ONE) && 164 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 165 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 166 dstA == PIPE_BLENDFACTOR_ONE); 167} 168 169static unsigned bgra_cmask(unsigned mask) 170{ 171 /* Gallium uses RGBA color ordering while R300 expects BGRA. */ 172 173 return ((mask & PIPE_MASK_R) << 2) | 174 ((mask & PIPE_MASK_B) >> 2) | 175 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 176} 177 178/* Create a new blend state based on the CSO blend state. 179 * 180 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 181static void* r300_create_blend_state(struct pipe_context* pipe, 182 const struct pipe_blend_state* state) 183{ 184 struct r300_screen* r300screen = r300_screen(pipe->screen); 185 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 186 187 if (state->rt[0].blend_enable) 188 { 189 unsigned eqRGB = state->rt[0].rgb_func; 190 unsigned srcRGB = state->rt[0].rgb_src_factor; 191 unsigned dstRGB = state->rt[0].rgb_dst_factor; 192 193 unsigned eqA = state->rt[0].alpha_func; 194 unsigned srcA = state->rt[0].alpha_src_factor; 195 unsigned dstA = state->rt[0].alpha_dst_factor; 196 197 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 198 * this is just the crappy D3D naming */ 199 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 200 r300_translate_blend_function(eqRGB) | 201 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 202 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 203 204 /* Optimization: some operations do not require the destination color. 205 * 206 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 207 * otherwise blending gives incorrect results. It seems to be 208 * a hardware bug. */ 209 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 210 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 211 dstRGB != PIPE_BLENDFACTOR_ZERO || 212 dstA != PIPE_BLENDFACTOR_ZERO || 213 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 214 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 215 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 216 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 217 srcA == PIPE_BLENDFACTOR_DST_COLOR || 218 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 219 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 220 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 221 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 222 /* Enable reading from the colorbuffer. */ 223 blend->blend_control |= R300_READ_ENABLE; 224 225 if (r300screen->caps.is_r500) { 226 /* Optimization: Depending on incoming pixels, we can 227 * conditionally disable the reading in hardware... */ 228 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 229 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 230 /* Disable reading if SRC_ALPHA == 0. */ 231 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 232 dstRGB == PIPE_BLENDFACTOR_ZERO) && 233 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 234 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 235 dstA == PIPE_BLENDFACTOR_ZERO)) { 236 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ; 237 } 238 239 /* Disable reading if SRC_ALPHA == 1. */ 240 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 241 dstRGB == PIPE_BLENDFACTOR_ZERO) && 242 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 243 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 244 dstA == PIPE_BLENDFACTOR_ZERO)) { 245 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ; 246 } 247 } 248 } 249 } 250 251 /* Optimization: discard pixels which don't change the colorbuffer. 252 * 253 * The code below is non-trivial and some math is involved. 254 * 255 * Discarding pixels must be disabled when FP16 AA is enabled. 256 * This is a hardware bug. Also, this implementation wouldn't work 257 * with FP blending enabled and equation clamping disabled. 258 * 259 * Equations other than ADD are rarely used and therefore won't be 260 * optimized. */ 261 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 262 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 263 /* ADD: X+Y 264 * REVERSE_SUBTRACT: Y-X 265 * 266 * The idea is: 267 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 268 * then CB will not be changed. 269 * 270 * Given the srcFactor and dstFactor variables, we can derive 271 * what src and dst should be equal to and discard appropriate 272 * pixels. 273 */ 274 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 275 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 276 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 277 dstRGB, dstA)) { 278 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 279 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 280 dstRGB, dstA)) { 281 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 282 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 283 dstRGB, dstA)) { 284 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 285 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 286 dstRGB, dstA)) { 287 blend->blend_control |= 288 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 289 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 290 dstRGB, dstA)) { 291 blend->blend_control |= 292 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 293 } 294 } 295 296 /* separate alpha */ 297 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 298 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE; 299 blend->alpha_blend_control = 300 r300_translate_blend_function(eqA) | 301 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 302 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 303 } 304 } 305 306 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 307 if (state->logicop_enable) { 308 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 309 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 310 } 311 312 /* Color channel masks for all MRTs. */ 313 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask); 314 if (r300screen->caps.is_r500 && state->independent_blend_enable) { 315 if (state->rt[1].blend_enable) { 316 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; 317 } 318 if (state->rt[2].blend_enable) { 319 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8; 320 } 321 if (state->rt[3].blend_enable) { 322 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12; 323 } 324 } 325 326 /* Neither fglrx nor classic r300 ever set this, regardless of dithering 327 * state. Since it's an optional implementation detail, we can leave it 328 * out and never dither. 329 * 330 * This could be revisited if we ever get quality or conformance hints. 331 * 332 if (state->dither) { 333 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 334 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 335 } 336 */ 337 338 return (void*)blend; 339} 340 341/* Bind blend state. */ 342static void r300_bind_blend_state(struct pipe_context* pipe, 343 void* state) 344{ 345 struct r300_context* r300 = r300_context(pipe); 346 347 UPDATE_STATE(state, r300->blend_state); 348} 349 350/* Free blend state. */ 351static void r300_delete_blend_state(struct pipe_context* pipe, 352 void* state) 353{ 354 FREE(state); 355} 356 357/* Convert float to 10bit integer */ 358static unsigned float_to_fixed10(float f) 359{ 360 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 361} 362 363/* Set blend color. 364 * Setup both R300 and R500 registers, figure out later which one to write. */ 365static void r300_set_blend_color(struct pipe_context* pipe, 366 const struct pipe_blend_color* color) 367{ 368 struct r300_context* r300 = r300_context(pipe); 369 struct r300_blend_color_state* state = 370 (struct r300_blend_color_state*)r300->blend_color_state.state; 371 union util_color uc; 372 373 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 374 state->blend_color = uc.ui; 375 376 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 377 state->blend_color_red_alpha = 378 float_to_fixed10(color->color[0]) | 379 (float_to_fixed10(color->color[3]) << 16); 380 state->blend_color_green_blue = 381 float_to_fixed10(color->color[2]) | 382 (float_to_fixed10(color->color[1]) << 16); 383 384 r300->blend_color_state.size = r300->screen->caps.is_r500 ? 3 : 2; 385 r300->blend_color_state.dirty = TRUE; 386} 387 388static void r300_set_clip_state(struct pipe_context* pipe, 389 const struct pipe_clip_state* state) 390{ 391 struct r300_context* r300 = r300_context(pipe); 392 393 r300->clip = *state; 394 395 if (r300->screen->caps.has_tcl) { 396 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state)); 397 r300->clip_state.size = 29; 398 399 r300->clip_state.dirty = TRUE; 400 } else { 401 draw_flush(r300->draw); 402 draw_set_clip_state(r300->draw, state); 403 r300->clip_state.size = 2; 404 } 405} 406 407static void 408r300_set_sample_mask(struct pipe_context *pipe, 409 unsigned sample_mask) 410{ 411} 412 413 414/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 415 * 416 * This contains the depth buffer, stencil buffer, alpha test, and such. 417 * On the Radeon, depth and stencil buffer setup are intertwined, which is 418 * the reason for some of the strange-looking assignments across registers. */ 419static void* 420 r300_create_dsa_state(struct pipe_context* pipe, 421 const struct pipe_depth_stencil_alpha_state* state) 422{ 423 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps; 424 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 425 426 /* Depth test setup. */ 427 if (state->depth.enabled) { 428 dsa->z_buffer_control |= R300_Z_ENABLE; 429 430 if (state->depth.writemask) { 431 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 432 } 433 434 dsa->z_stencil_control |= 435 (r300_translate_depth_stencil_function(state->depth.func) << 436 R300_Z_FUNC_SHIFT); 437 } 438 439 /* Stencil buffer setup. */ 440 if (state->stencil[0].enabled) { 441 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 442 dsa->z_stencil_control |= 443 (r300_translate_depth_stencil_function(state->stencil[0].func) << 444 R300_S_FRONT_FUNC_SHIFT) | 445 (r300_translate_stencil_op(state->stencil[0].fail_op) << 446 R300_S_FRONT_SFAIL_OP_SHIFT) | 447 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 448 R300_S_FRONT_ZPASS_OP_SHIFT) | 449 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 450 R300_S_FRONT_ZFAIL_OP_SHIFT); 451 452 dsa->stencil_ref_mask = 453 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 454 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 455 456 if (state->stencil[1].enabled) { 457 dsa->two_sided = TRUE; 458 459 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 460 dsa->z_stencil_control |= 461 (r300_translate_depth_stencil_function(state->stencil[1].func) << 462 R300_S_BACK_FUNC_SHIFT) | 463 (r300_translate_stencil_op(state->stencil[1].fail_op) << 464 R300_S_BACK_SFAIL_OP_SHIFT) | 465 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 466 R300_S_BACK_ZPASS_OP_SHIFT) | 467 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 468 R300_S_BACK_ZFAIL_OP_SHIFT); 469 470 dsa->stencil_ref_bf = 471 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 472 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 473 474 if (caps->is_r500) { 475 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 476 } else { 477 dsa->two_sided_stencil_ref = 478 (state->stencil[0].valuemask != state->stencil[1].valuemask || 479 state->stencil[0].writemask != state->stencil[1].writemask); 480 } 481 } 482 } 483 484 /* Alpha test setup. */ 485 if (state->alpha.enabled) { 486 dsa->alpha_function = 487 r300_translate_alpha_function(state->alpha.func) | 488 R300_FG_ALPHA_FUNC_ENABLE; 489 490 /* We could use 10bit alpha ref but who needs that? */ 491 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 492 493 if (caps->is_r500) 494 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 495 } 496 497 return (void*)dsa; 498} 499 500/* Bind DSA state. */ 501static void r300_bind_dsa_state(struct pipe_context* pipe, 502 void* state) 503{ 504 struct r300_context* r300 = r300_context(pipe); 505 506 if (!state) { 507 return; 508 } 509 510 UPDATE_STATE(state, r300->dsa_state); 511} 512 513/* Free DSA state. */ 514static void r300_delete_dsa_state(struct pipe_context* pipe, 515 void* state) 516{ 517 FREE(state); 518} 519 520static void r300_set_stencil_ref(struct pipe_context* pipe, 521 const struct pipe_stencil_ref* sr) 522{ 523 struct r300_context* r300 = r300_context(pipe); 524 525 r300->stencil_ref = *sr; 526 r300->dsa_state.dirty = TRUE; 527} 528 529/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 530static void r300_fb_set_tiling_flags(struct r300_context *r300, 531 const struct pipe_framebuffer_state *old_state, 532 const struct pipe_framebuffer_state *new_state) 533{ 534 struct r300_texture *tex; 535 unsigned i, level; 536 537 /* Set tiling flags for new surfaces. */ 538 for (i = 0; i < new_state->nr_cbufs; i++) { 539 tex = r300_texture(new_state->cbufs[i]->texture); 540 level = new_state->cbufs[i]->level; 541 542 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 543 tex->pitch[0] * util_format_get_blocksize(tex->b.b.format), 544 tex->microtile, 545 tex->mip_macrotile[level]); 546 } 547 if (new_state->zsbuf) { 548 tex = r300_texture(new_state->zsbuf->texture); 549 level = new_state->zsbuf->level; 550 551 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 552 tex->pitch[0] * util_format_get_blocksize(tex->b.b.format), 553 tex->microtile, 554 tex->mip_macrotile[level]); 555 } 556} 557 558static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index, 559 const char *binding) 560{ 561 struct pipe_resource *tex = surf->texture; 562 struct r300_texture *rtex = r300_texture(tex); 563 564 fprintf(stderr, 565 "r300: %s[%i] Dim: %ix%i, Offset: %i, ZSlice: %i, " 566 "Face: %i, Level: %i, Format: %s\n" 567 568 "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, " 569 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n", 570 571 binding, index, surf->width, surf->height, surf->offset, 572 surf->zslice, surf->face, surf->level, 573 util_format_short_name(surf->format), 574 575 rtex->macrotile ? "YES" : " NO", rtex->microtile ? "YES" : " NO", 576 rtex->hwpitch[0], tex->width0, tex->height0, tex->depth0, 577 tex->last_level, util_format_short_name(tex->format)); 578} 579 580static void 581 r300_set_framebuffer_state(struct pipe_context* pipe, 582 const struct pipe_framebuffer_state* state) 583{ 584 struct r300_context* r300 = r300_context(pipe); 585 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 586 unsigned max_width, max_height, i; 587 uint32_t zbuffer_bpp = 0; 588 589 if (state->nr_cbufs > 4) { 590 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, " 591 "refusing to bind framebuffer state!\n", __FUNCTION__); 592 return; 593 } 594 595 if (r300->screen->caps.is_r500) { 596 max_width = max_height = 4096; 597 } else if (r300->screen->caps.is_r400) { 598 max_width = max_height = 4021; 599 } else { 600 max_width = max_height = 2560; 601 } 602 603 if (state->width > max_width || state->height > max_height) { 604 fprintf(stderr, "r300: Implementation error: Render targets are too " 605 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 606 return; 607 } 608 609 if (r300->draw) { 610 draw_flush(r300->draw); 611 } 612 613 r300->fb_state.dirty = TRUE; 614 615 /* If nr_cbufs is changed from zero to non-zero or vice versa... */ 616 if (!!old_state->nr_cbufs != !!state->nr_cbufs) { 617 r300->blend_state.dirty = TRUE; 618 } 619 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 620 if (!!old_state->zsbuf != !!state->zsbuf) { 621 r300->dsa_state.dirty = TRUE; 622 } 623 624 /* The tiling flags are dependent on the surface miplevel, unfortunately. */ 625 r300_fb_set_tiling_flags(r300, r300->fb_state.state, state); 626 627 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); 628 629 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + 630 (state->zsbuf ? 10 : 0) + 9; 631 632 /* Polygon offset depends on the zbuffer bit depth. */ 633 if (state->zsbuf && r300->polygon_offset_enabled) { 634 switch (util_format_get_blocksize(state->zsbuf->texture->format)) { 635 case 2: 636 zbuffer_bpp = 16; 637 break; 638 case 4: 639 zbuffer_bpp = 24; 640 break; 641 } 642 643 if (r300->zbuffer_bpp != zbuffer_bpp) { 644 r300->zbuffer_bpp = zbuffer_bpp; 645 r300->rs_state.dirty = TRUE; 646 } 647 } 648 649 if (DBG_ON(r300, DBG_FB)) { 650 fprintf(stderr, "r300: set_framebuffer_state:\n"); 651 for (i = 0; i < state->nr_cbufs; i++) { 652 r300_print_fb_surf_info(state->cbufs[i], i, "CB"); 653 } 654 if (state->zsbuf) { 655 r300_print_fb_surf_info(state->zsbuf, 0, "ZB"); 656 } 657 } 658} 659 660/* Create fragment shader state. */ 661static void* r300_create_fs_state(struct pipe_context* pipe, 662 const struct pipe_shader_state* shader) 663{ 664 struct r300_fragment_shader* fs = NULL; 665 666 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 667 668 /* Copy state directly into shader. */ 669 fs->state = *shader; 670 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 671 672 return (void*)fs; 673} 674 675void r300_mark_fs_code_dirty(struct r300_context *r300) 676{ 677 struct r300_fragment_shader* fs = r300_fs(r300); 678 679 r300->fs.dirty = TRUE; 680 r300->fs_rc_constant_state.dirty = TRUE; 681 r300->fs_constants.dirty = TRUE; 682 683 if (r300->screen->caps.is_r500) { 684 r300->fs.size = r500_get_fs_atom_size(r300); 685 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7; 686 r300->fs_constants.size = fs->shader->externals_count * 4 + 3; 687 } else { 688 r300->fs.size = r300_get_fs_atom_size(r300); 689 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5; 690 r300->fs_constants.size = fs->shader->externals_count * 4 + 1; 691 } 692} 693 694/* Bind fragment shader state. */ 695static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 696{ 697 struct r300_context* r300 = r300_context(pipe); 698 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 699 700 if (fs == NULL) { 701 r300->fs.state = NULL; 702 return; 703 } 704 705 r300->fs.state = fs; 706 r300_pick_fragment_shader(r300); 707 r300_mark_fs_code_dirty(r300); 708 709 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 710} 711 712/* Delete fragment shader state. */ 713static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 714{ 715 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 716 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 717 718 while (ptr) { 719 tmp = ptr; 720 ptr = ptr->next; 721 rc_constants_destroy(&tmp->code.constants); 722 FREE(tmp); 723 } 724 FREE((void*)fs->state.tokens); 725 FREE(shader); 726} 727 728static void r300_set_polygon_stipple(struct pipe_context* pipe, 729 const struct pipe_poly_stipple* state) 730{ 731 /* XXX no idea how to set this up, but not terribly important */ 732} 733 734/* Create a new rasterizer state based on the CSO rasterizer state. 735 * 736 * This is a very large chunk of state, and covers most of the graphics 737 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 738 * 739 * In a not entirely unironic sidenote, this state has nearly nothing to do 740 * with the actual block on the Radeon called the rasterizer (RS). */ 741static void* r300_create_rs_state(struct pipe_context* pipe, 742 const struct pipe_rasterizer_state* state) 743{ 744 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 745 int i; 746 float psiz; 747 748 /* Copy rasterizer state. */ 749 rs->rs = *state; 750 rs->rs_draw = *state; 751 752 /* Override some states for Draw. */ 753 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */ 754 755#ifdef PIPE_ARCH_LITTLE_ENDIAN 756 rs->vap_control_status = R300_VC_NO_SWAP; 757#else 758 rs->vap_control_status = R300_VC_32BIT_SWAP; 759#endif 760 761 /* If no TCL engine is present, turn off the HW TCL. */ 762 if (!r300_screen(pipe->screen)->caps.has_tcl) { 763 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 764 } 765 766 /* Point size width and height. */ 767 rs->point_size = 768 pack_float_16_6x(state->point_size) | 769 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 770 771 /* Point size clamping. */ 772 if (state->point_size_per_vertex) { 773 /* Per-vertex point size. 774 * Clamp to [0, max FB size] */ 775 psiz = pipe->screen->get_paramf(pipe->screen, 776 PIPE_CAP_MAX_POINT_WIDTH); 777 rs->point_minmax = 778 pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT; 779 } else { 780 /* We cannot disable the point-size vertex output, 781 * so clamp it. */ 782 psiz = state->point_size; 783 rs->point_minmax = 784 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) | 785 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT); 786 } 787 788 /* Line control. */ 789 rs->line_control = pack_float_16_6x(state->line_width) | 790 R300_GA_LINE_CNTL_END_TYPE_COMP; 791 792 /* Enable polygon mode */ 793 if (state->fill_front != PIPE_POLYGON_MODE_FILL || 794 state->fill_back != PIPE_POLYGON_MODE_FILL) { 795 rs->polygon_mode = R300_GA_POLY_MODE_DUAL; 796 } 797 798 /* Front face */ 799 if (state->front_ccw) 800 rs->cull_mode = R300_FRONT_FACE_CCW; 801 else 802 rs->cull_mode = R300_FRONT_FACE_CW; 803 804 /* Polygon offset */ 805 if (util_get_offset(state, state->fill_front)) { 806 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 807 } 808 if (util_get_offset(state, state->fill_back)) { 809 rs->polygon_offset_enable |= R300_BACK_ENABLE; 810 } 811 812 /* Polygon mode */ 813 if (rs->polygon_mode) { 814 rs->polygon_mode |= 815 r300_translate_polygon_mode_front(state->fill_front); 816 rs->polygon_mode |= 817 r300_translate_polygon_mode_back(state->fill_back); 818 } 819 820 if (state->cull_face & PIPE_FACE_FRONT) { 821 rs->cull_mode |= R300_CULL_FRONT; 822 } 823 if (state->cull_face & PIPE_FACE_BACK) { 824 rs->cull_mode |= R300_CULL_BACK; 825 } 826 827 if (rs->polygon_offset_enable) { 828 rs->depth_offset = state->offset_units; 829 rs->depth_scale = state->offset_scale; 830 } 831 832 if (state->line_stipple_enable) { 833 rs->line_stipple_config = 834 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 835 (fui((float)state->line_stipple_factor) & 836 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 837 /* XXX this might need to be scaled up */ 838 rs->line_stipple_value = state->line_stipple_pattern; 839 } 840 841 if (state->flatshade) { 842 rs->color_control = R300_SHADE_MODEL_FLAT; 843 } else { 844 rs->color_control = R300_SHADE_MODEL_SMOOTH; 845 } 846 847 rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF; 848 849 /* Point sprites */ 850 if (state->sprite_coord_enable) { 851 rs->stuffing_enable = R300_GB_POINT_STUFF_ENABLE; 852 for (i = 0; i < 8; i++) { 853 if (state->sprite_coord_enable & (1 << i)) 854 rs->stuffing_enable |= 855 R300_GB_TEX_STR << (R300_GB_TEX0_SOURCE_SHIFT + (i*2)); 856 } 857 858 rs->point_texcoord_left = 0.0f; 859 rs->point_texcoord_right = 1.0f; 860 861 switch (state->sprite_coord_mode) { 862 case PIPE_SPRITE_COORD_UPPER_LEFT: 863 rs->point_texcoord_top = 0.0f; 864 rs->point_texcoord_bottom = 1.0f; 865 break; 866 case PIPE_SPRITE_COORD_LOWER_LEFT: 867 rs->point_texcoord_top = 1.0f; 868 rs->point_texcoord_bottom = 0.0f; 869 break; 870 } 871 } 872 873 return (void*)rs; 874} 875 876/* Bind rasterizer state. */ 877static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 878{ 879 struct r300_context* r300 = r300_context(pipe); 880 struct r300_rs_state* rs = (struct r300_rs_state*)state; 881 int last_sprite_coord_enable = r300->sprite_coord_enable; 882 boolean last_two_sided_color = r300->two_sided_color; 883 884 if (r300->draw && rs) { 885 draw_flush(r300->draw); 886 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state); 887 } 888 889 if (rs) { 890 r300->polygon_offset_enabled = (rs->rs.offset_point || 891 rs->rs.offset_line || 892 rs->rs.offset_tri); 893 r300->sprite_coord_enable = rs->rs.sprite_coord_enable; 894 r300->two_sided_color = rs->rs.light_twoside; 895 } else { 896 r300->polygon_offset_enabled = FALSE; 897 r300->sprite_coord_enable = 0; 898 r300->two_sided_color = FALSE; 899 } 900 901 UPDATE_STATE(state, r300->rs_state); 902 r300->rs_state.size = 27 + (r300->polygon_offset_enabled ? 5 : 0); 903 904 if (last_sprite_coord_enable != r300->sprite_coord_enable || 905 last_two_sided_color != r300->two_sided_color) { 906 r300->rs_block_state.dirty = TRUE; 907 } 908} 909 910/* Free rasterizer state. */ 911static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 912{ 913 FREE(state); 914} 915 916static void* 917 r300_create_sampler_state(struct pipe_context* pipe, 918 const struct pipe_sampler_state* state) 919{ 920 struct r300_context* r300 = r300_context(pipe); 921 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 922 boolean is_r500 = r300->screen->caps.is_r500; 923 int lod_bias; 924 union util_color uc; 925 926 sampler->state = *state; 927 928 sampler->filter0 |= 929 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 930 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 931 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 932 933 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 934 state->mag_img_filter, 935 state->min_mip_filter, 936 state->max_anisotropy > 0); 937 938 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 939 940 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 941 /* We must pass these to the merge function to clamp them properly. */ 942 sampler->min_lod = MAX2((unsigned)state->min_lod, 0); 943 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0); 944 945 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1); 946 947 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 948 949 /* This is very high quality anisotropic filtering for R5xx. 950 * It's good for benchmarking the performance of texturing but 951 * in practice we don't want to slow down the driver because it's 952 * a pretty good performance killer. Feel free to play with it. */ 953 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 954 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 955 } 956 957 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 958 sampler->border_color = uc.ui; 959 960 /* R500-specific fixups and optimizations */ 961 if (r300->screen->caps.is_r500) { 962 sampler->filter1 |= R500_BORDER_FIX; 963 } 964 965 return (void*)sampler; 966} 967 968static void r300_bind_sampler_states(struct pipe_context* pipe, 969 unsigned count, 970 void** states) 971{ 972 struct r300_context* r300 = r300_context(pipe); 973 struct r300_textures_state* state = 974 (struct r300_textures_state*)r300->textures_state.state; 975 unsigned tex_units = r300->screen->caps.num_tex_units; 976 977 if (count > tex_units) { 978 return; 979 } 980 981 memcpy(state->sampler_states, states, sizeof(void*) * count); 982 state->sampler_state_count = count; 983 984 r300->textures_state.dirty = TRUE; 985} 986 987static void r300_lacks_vertex_textures(struct pipe_context* pipe, 988 unsigned count, 989 void** states) 990{ 991} 992 993static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 994{ 995 FREE(state); 996} 997 998static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 999 unsigned count, 1000 struct pipe_sampler_view** views) 1001{ 1002 struct r300_context* r300 = r300_context(pipe); 1003 struct r300_textures_state* state = 1004 (struct r300_textures_state*)r300->textures_state.state; 1005 struct r300_texture *texture; 1006 unsigned i; 1007 unsigned tex_units = r300->screen->caps.num_tex_units; 1008 boolean dirty_tex = FALSE; 1009 1010 if (count > tex_units) { 1011 return; 1012 } 1013 1014 for (i = 0; i < count; i++) { 1015 if (&state->sampler_views[i]->base != views[i]) { 1016 pipe_sampler_view_reference( 1017 (struct pipe_sampler_view**)&state->sampler_views[i], 1018 views[i]); 1019 1020 if (!views[i]) { 1021 continue; 1022 } 1023 1024 /* A new sampler view (= texture)... */ 1025 dirty_tex = TRUE; 1026 1027 /* Set the texrect factor in the fragment shader. 1028 * Needed for RECT and NPOT fallback. */ 1029 texture = r300_texture(views[i]->texture); 1030 if (texture->uses_pitch) { 1031 r300->fs_rc_constant_state.dirty = TRUE; 1032 } 1033 } 1034 } 1035 1036 for (i = count; i < tex_units; i++) { 1037 if (state->sampler_views[i]) { 1038 pipe_sampler_view_reference( 1039 (struct pipe_sampler_view**)&state->sampler_views[i], 1040 NULL); 1041 } 1042 } 1043 1044 state->sampler_view_count = count; 1045 1046 r300->textures_state.dirty = TRUE; 1047 1048 if (dirty_tex) { 1049 r300->texture_cache_inval.dirty = TRUE; 1050 } 1051} 1052 1053static struct pipe_sampler_view * 1054r300_create_sampler_view(struct pipe_context *pipe, 1055 struct pipe_resource *texture, 1056 const struct pipe_sampler_view *templ) 1057{ 1058 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view); 1059 struct r300_texture *tex = r300_texture(texture); 1060 1061 if (view) { 1062 view->base = *templ; 1063 view->base.reference.count = 1; 1064 view->base.context = pipe; 1065 view->base.texture = NULL; 1066 pipe_resource_reference(&view->base.texture, texture); 1067 1068 view->swizzle[0] = templ->swizzle_r; 1069 view->swizzle[1] = templ->swizzle_g; 1070 view->swizzle[2] = templ->swizzle_b; 1071 view->swizzle[3] = templ->swizzle_a; 1072 1073 view->format = tex->tx_format; 1074 view->format.format1 |= r300_translate_texformat(templ->format, 1075 view->swizzle); 1076 if (r300_screen(pipe->screen)->caps.is_r500) { 1077 view->format.format2 |= r500_tx_format_msb_bit(templ->format); 1078 } 1079 } 1080 1081 return (struct pipe_sampler_view*)view; 1082} 1083 1084static void 1085r300_sampler_view_destroy(struct pipe_context *pipe, 1086 struct pipe_sampler_view *view) 1087{ 1088 pipe_resource_reference(&view->texture, NULL); 1089 FREE(view); 1090} 1091 1092static void r300_set_scissor_state(struct pipe_context* pipe, 1093 const struct pipe_scissor_state* state) 1094{ 1095 struct r300_context* r300 = r300_context(pipe); 1096 1097 memcpy(r300->scissor_state.state, state, 1098 sizeof(struct pipe_scissor_state)); 1099 1100 r300->scissor_state.dirty = TRUE; 1101} 1102 1103static void r300_set_viewport_state(struct pipe_context* pipe, 1104 const struct pipe_viewport_state* state) 1105{ 1106 struct r300_context* r300 = r300_context(pipe); 1107 struct r300_viewport_state* viewport = 1108 (struct r300_viewport_state*)r300->viewport_state.state; 1109 1110 r300->viewport = *state; 1111 1112 if (r300->draw) { 1113 draw_flush(r300->draw); 1114 draw_set_viewport_state(r300->draw, state); 1115 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT; 1116 return; 1117 } 1118 1119 /* Do the transform in HW. */ 1120 viewport->vte_control = R300_VTX_W0_FMT; 1121 1122 if (state->scale[0] != 1.0f) { 1123 viewport->xscale = state->scale[0]; 1124 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1125 } 1126 if (state->scale[1] != 1.0f) { 1127 viewport->yscale = state->scale[1]; 1128 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1129 } 1130 if (state->scale[2] != 1.0f) { 1131 viewport->zscale = state->scale[2]; 1132 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1133 } 1134 if (state->translate[0] != 0.0f) { 1135 viewport->xoffset = state->translate[0]; 1136 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1137 } 1138 if (state->translate[1] != 0.0f) { 1139 viewport->yoffset = state->translate[1]; 1140 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1141 } 1142 if (state->translate[2] != 0.0f) { 1143 viewport->zoffset = state->translate[2]; 1144 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1145 } 1146 1147 r300->viewport_state.dirty = TRUE; 1148 if (r300->fs.state && r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) { 1149 r300->fs_rc_constant_state.dirty = TRUE; 1150 } 1151} 1152 1153static void r300_set_vertex_buffers(struct pipe_context* pipe, 1154 unsigned count, 1155 const struct pipe_vertex_buffer* buffers) 1156{ 1157 struct r300_context* r300 = r300_context(pipe); 1158 struct pipe_vertex_buffer *vbo; 1159 unsigned i, max_index = (1 << 24) - 1; 1160 boolean any_user_buffer = FALSE; 1161 1162 if (count == r300->vertex_buffer_count && 1163 memcmp(r300->vertex_buffer, buffers, 1164 sizeof(struct pipe_vertex_buffer) * count) == 0) { 1165 return; 1166 } 1167 1168 if (r300->screen->caps.has_tcl) { 1169 /* HW TCL. */ 1170 r300->incompatible_vb_layout = FALSE; 1171 1172 /* Check if the strides and offsets are aligned to the size of DWORD. */ 1173 for (i = 0; i < count; i++) { 1174 if (buffers[i].buffer) { 1175 if (buffers[i].stride % 4 != 0 || 1176 buffers[i].buffer_offset % 4 != 0) { 1177 r300->incompatible_vb_layout = TRUE; 1178 break; 1179 } 1180 } 1181 } 1182 1183 for (i = 0; i < count; i++) { 1184 /* Why, yes, I AM casting away constness. How did you know? */ 1185 vbo = (struct pipe_vertex_buffer*)&buffers[i]; 1186 1187 /* Skip NULL buffers */ 1188 if (!buffers[i].buffer) { 1189 continue; 1190 } 1191 1192 if (r300_buffer_is_user_buffer(vbo->buffer)) { 1193 any_user_buffer = TRUE; 1194 } 1195 1196 if (vbo->max_index == ~0) { 1197 /* if no VBO stride then only one vertex value so max index is 1 */ 1198 /* should think about converting to VS constants like svga does */ 1199 if (!vbo->stride) 1200 vbo->max_index = 1; 1201 else 1202 vbo->max_index = 1203 (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride; 1204 } 1205 1206 max_index = MIN2(vbo->max_index, max_index); 1207 } 1208 1209 r300->any_user_vbs = any_user_buffer; 1210 r300->vertex_buffer_max_index = max_index; 1211 1212 } else { 1213 /* SW TCL. */ 1214 draw_flush(r300->draw); 1215 draw_set_vertex_buffers(r300->draw, count, buffers); 1216 } 1217 1218 /* Common code. */ 1219 for (i = 0; i < count; i++) { 1220 /* Reference our buffer. */ 1221 pipe_resource_reference(&r300->vertex_buffer[i].buffer, buffers[i].buffer); 1222 } 1223 for (; i < r300->vertex_buffer_count; i++) { 1224 /* Dereference any old buffers. */ 1225 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL); 1226 } 1227 1228 memcpy(r300->vertex_buffer, buffers, 1229 sizeof(struct pipe_vertex_buffer) * count); 1230 r300->vertex_buffer_count = count; 1231} 1232 1233/* Initialize the PSC tables. */ 1234static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1235{ 1236 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1237 uint16_t type, swizzle; 1238 enum pipe_format format; 1239 unsigned i; 1240 1241 if (velems->count > 16) { 1242 fprintf(stderr, "r300: More than 16 vertex elements are not supported," 1243 " requested %i, using 16.\n", velems->count); 1244 velems->count = 16; 1245 } 1246 1247 /* Vertex shaders have no semantics on their inputs, 1248 * so PSC should just route stuff based on the vertex elements, 1249 * and not on attrib information. */ 1250 for (i = 0; i < velems->count; i++) { 1251 format = velems->hw_format[i]; 1252 1253 type = r300_translate_vertex_data_type(format); 1254 if (type == R300_INVALID_FORMAT) { 1255 fprintf(stderr, "r300: Bad vertex format %s.\n", 1256 util_format_short_name(format)); 1257 assert(0); 1258 abort(); 1259 } 1260 1261 type |= i << R300_DST_VEC_LOC_SHIFT; 1262 swizzle = r300_translate_vertex_data_swizzle(format); 1263 1264 if (i & 1) { 1265 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1266 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1267 } else { 1268 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1269 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1270 } 1271 } 1272 1273 /* Set the last vector in the PSC. */ 1274 if (i) { 1275 i -= 1; 1276 } 1277 vstream->vap_prog_stream_cntl[i >> 1] |= 1278 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1279 1280 vstream->count = (i >> 1) + 1; 1281} 1282 1283#define FORMAT_REPLACE(what, withwhat) \ 1284 case PIPE_FORMAT_##what: *format = PIPE_FORMAT_##withwhat; break 1285 1286static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1287 unsigned count, 1288 const struct pipe_vertex_element* attribs) 1289{ 1290 struct r300_vertex_element_state *velems; 1291 unsigned i; 1292 enum pipe_format *format; 1293 1294 assert(count <= PIPE_MAX_ATTRIBS); 1295 velems = CALLOC_STRUCT(r300_vertex_element_state); 1296 if (velems != NULL) { 1297 velems->count = count; 1298 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1299 velems->incompatible_layout = FALSE; 1300 1301 if (r300_screen(pipe->screen)->caps.has_tcl) { 1302 /* Set the best hw format in case the original format is not 1303 * supported by hw. */ 1304 for (i = 0; i < count; i++) { 1305 velems->hw_format[i] = velems->velem[i].src_format; 1306 format = &velems->hw_format[i]; 1307 1308 /* This is basically the list of unsupported formats. 1309 * For now we don't care about the alignment, that's going to 1310 * be sorted out after the PSC setup. */ 1311 switch (*format) { 1312 FORMAT_REPLACE(R64_FLOAT, R32_FLOAT); 1313 FORMAT_REPLACE(R64G64_FLOAT, R32G32_FLOAT); 1314 FORMAT_REPLACE(R64G64B64_FLOAT, R32G32B32_FLOAT); 1315 FORMAT_REPLACE(R64G64B64A64_FLOAT, R32G32B32A32_FLOAT); 1316 1317 FORMAT_REPLACE(R32_UNORM, R32_FLOAT); 1318 FORMAT_REPLACE(R32G32_UNORM, R32G32_FLOAT); 1319 FORMAT_REPLACE(R32G32B32_UNORM, R32G32B32_FLOAT); 1320 FORMAT_REPLACE(R32G32B32A32_UNORM, R32G32B32A32_FLOAT); 1321 1322 FORMAT_REPLACE(R32_USCALED, R32_FLOAT); 1323 FORMAT_REPLACE(R32G32_USCALED, R32G32_FLOAT); 1324 FORMAT_REPLACE(R32G32B32_USCALED, R32G32B32_FLOAT); 1325 FORMAT_REPLACE(R32G32B32A32_USCALED,R32G32B32A32_FLOAT); 1326 1327 FORMAT_REPLACE(R32_SNORM, R32_FLOAT); 1328 FORMAT_REPLACE(R32G32_SNORM, R32G32_FLOAT); 1329 FORMAT_REPLACE(R32G32B32_SNORM, R32G32B32_FLOAT); 1330 FORMAT_REPLACE(R32G32B32A32_SNORM, R32G32B32A32_FLOAT); 1331 1332 FORMAT_REPLACE(R32_SSCALED, R32_FLOAT); 1333 FORMAT_REPLACE(R32G32_SSCALED, R32G32_FLOAT); 1334 FORMAT_REPLACE(R32G32B32_SSCALED, R32G32B32_FLOAT); 1335 FORMAT_REPLACE(R32G32B32A32_SSCALED,R32G32B32A32_FLOAT); 1336 1337 FORMAT_REPLACE(R32_FIXED, R32_FLOAT); 1338 FORMAT_REPLACE(R32G32_FIXED, R32G32_FLOAT); 1339 FORMAT_REPLACE(R32G32B32_FIXED, R32G32B32_FLOAT); 1340 FORMAT_REPLACE(R32G32B32A32_FIXED, R32G32B32A32_FLOAT); 1341 1342 default:; 1343 } 1344 1345 velems->incompatible_layout = 1346 velems->incompatible_layout || 1347 velems->velem[i].src_format != velems->hw_format[i] || 1348 velems->velem[i].src_offset % 4 != 0; 1349 } 1350 1351 /* Now setup PSC. 1352 * The unused components will be replaced by (..., 0, 1). */ 1353 r300_vertex_psc(velems); 1354 1355 /* Align the formats to the size of DWORD. 1356 * We only care about the blocksizes of the formats since 1357 * swizzles are already set up. */ 1358 for (i = 0; i < count; i++) { 1359 /* This is OK because we check for aligned strides too. */ 1360 velems->hw_format_size[i] = 1361 align(util_format_get_blocksize(velems->hw_format[i]), 4); 1362 } 1363 } 1364 } 1365 return velems; 1366} 1367 1368static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1369 void *state) 1370{ 1371 struct r300_context *r300 = r300_context(pipe); 1372 struct r300_vertex_element_state *velems = state; 1373 1374 if (velems == NULL) { 1375 return; 1376 } 1377 1378 r300->velems = velems; 1379 1380 if (r300->draw) { 1381 draw_flush(r300->draw); 1382 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1383 return; 1384 } 1385 1386 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1387 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1388} 1389 1390static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1391{ 1392 FREE(state); 1393} 1394 1395static void* r300_create_vs_state(struct pipe_context* pipe, 1396 const struct pipe_shader_state* shader) 1397{ 1398 struct r300_context* r300 = r300_context(pipe); 1399 1400 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1401 1402 /* Copy state directly into shader. */ 1403 vs->state = *shader; 1404 vs->state.tokens = tgsi_dup_tokens(shader->tokens); 1405 1406 if (r300->screen->caps.has_tcl) { 1407 r300_init_vs_outputs(vs); 1408 r300_translate_vertex_shader(r300, vs); 1409 } else { 1410 r300_draw_init_vertex_shader(r300->draw, vs); 1411 } 1412 1413 return vs; 1414} 1415 1416static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1417{ 1418 struct r300_context* r300 = r300_context(pipe); 1419 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1420 1421 if (vs == NULL) { 1422 r300->vs_state.state = NULL; 1423 return; 1424 } 1425 if (vs == r300->vs_state.state) { 1426 return; 1427 } 1428 r300->vs_state.state = vs; 1429 1430 /* The majority of the RS block bits is dependent on the vertex shader. */ 1431 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 1432 1433 if (r300->screen->caps.has_tcl) { 1434 r300->vs_state.dirty = TRUE; 1435 r300->vs_state.size = 1436 vs->code.length + 9 + 1437 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0); 1438 1439 if (vs->externals_count) { 1440 r300->vs_constants.dirty = TRUE; 1441 r300->vs_constants.size = vs->externals_count * 4 + 3; 1442 } else { 1443 r300->vs_constants.size = 0; 1444 } 1445 1446 r300->pvs_flush.dirty = TRUE; 1447 } else { 1448 draw_flush(r300->draw); 1449 draw_bind_vertex_shader(r300->draw, 1450 (struct draw_vertex_shader*)vs->draw_vs); 1451 } 1452} 1453 1454static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1455{ 1456 struct r300_context* r300 = r300_context(pipe); 1457 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1458 1459 if (r300->screen->caps.has_tcl) { 1460 rc_constants_destroy(&vs->code.constants); 1461 } else { 1462 draw_delete_vertex_shader(r300->draw, 1463 (struct draw_vertex_shader*)vs->draw_vs); 1464 } 1465 1466 FREE((void*)vs->state.tokens); 1467 FREE(shader); 1468} 1469 1470static void r300_set_constant_buffer(struct pipe_context *pipe, 1471 uint shader, uint index, 1472 struct pipe_resource *buf) 1473{ 1474 struct r300_context* r300 = r300_context(pipe); 1475 struct r300_constant_buffer *cbuf; 1476 struct pipe_transfer *tr; 1477 void *mapped; 1478 int max_size = 0, max_size_bytes = 0, clamped_size = 0; 1479 1480 switch (shader) { 1481 case PIPE_SHADER_VERTEX: 1482 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state; 1483 max_size = 256; 1484 break; 1485 case PIPE_SHADER_FRAGMENT: 1486 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state; 1487 if (r300->screen->caps.is_r500) { 1488 max_size = 256; 1489 } else { 1490 max_size = 32; 1491 } 1492 break; 1493 default: 1494 assert(0); 1495 return; 1496 } 1497 max_size_bytes = max_size * 4 * sizeof(float); 1498 1499 if (buf == NULL || buf->width0 == 0 || 1500 (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL) 1501 { 1502 cbuf->count = 0; 1503 return; 1504 } 1505 1506 if (shader == PIPE_SHADER_FRAGMENT || 1507 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) { 1508 assert((buf->width0 % (4 * sizeof(float))) == 0); 1509 1510 /* Check the size of the constant buffer. */ 1511 /* XXX Subtract immediates and RC_STATE_* variables. */ 1512 if (buf->width0 > max_size_bytes) { 1513 fprintf(stderr, "r300: Max size of the constant buffer is " 1514 "%i*4 floats.\n", max_size); 1515 } 1516 clamped_size = MIN2(buf->width0, max_size_bytes); 1517 1518 memcpy(cbuf->constants, mapped, clamped_size); 1519 cbuf->count = clamped_size / (4 * sizeof(float)); 1520 } 1521 1522 if (shader == PIPE_SHADER_VERTEX) { 1523 if (r300->screen->caps.has_tcl) { 1524 if (r300->vs_constants.size) { 1525 r300->vs_constants.dirty = TRUE; 1526 } 1527 r300->pvs_flush.dirty = TRUE; 1528 } else if (r300->draw) { 1529 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX, 1530 0, mapped, buf->width0); 1531 } 1532 } else if (shader == PIPE_SHADER_FRAGMENT) { 1533 r300->fs_constants.dirty = TRUE; 1534 } 1535 1536 pipe_buffer_unmap(pipe, buf, tr); 1537} 1538 1539void r300_init_state_functions(struct r300_context* r300) 1540{ 1541 r300->context.create_blend_state = r300_create_blend_state; 1542 r300->context.bind_blend_state = r300_bind_blend_state; 1543 r300->context.delete_blend_state = r300_delete_blend_state; 1544 1545 r300->context.set_blend_color = r300_set_blend_color; 1546 1547 r300->context.set_clip_state = r300_set_clip_state; 1548 r300->context.set_sample_mask = r300_set_sample_mask; 1549 1550 r300->context.set_constant_buffer = r300_set_constant_buffer; 1551 1552 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1553 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1554 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1555 1556 r300->context.set_stencil_ref = r300_set_stencil_ref; 1557 1558 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1559 1560 r300->context.create_fs_state = r300_create_fs_state; 1561 r300->context.bind_fs_state = r300_bind_fs_state; 1562 r300->context.delete_fs_state = r300_delete_fs_state; 1563 1564 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1565 1566 r300->context.create_rasterizer_state = r300_create_rs_state; 1567 r300->context.bind_rasterizer_state = r300_bind_rs_state; 1568 r300->context.delete_rasterizer_state = r300_delete_rs_state; 1569 1570 r300->context.create_sampler_state = r300_create_sampler_state; 1571 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 1572 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 1573 r300->context.delete_sampler_state = r300_delete_sampler_state; 1574 1575 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 1576 r300->context.create_sampler_view = r300_create_sampler_view; 1577 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 1578 1579 r300->context.set_scissor_state = r300_set_scissor_state; 1580 1581 r300->context.set_viewport_state = r300_set_viewport_state; 1582 1583 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 1584 1585 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 1586 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 1587 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 1588 1589 r300->context.create_vs_state = r300_create_vs_state; 1590 r300->context.bind_vs_state = r300_bind_vs_state; 1591 r300->context.delete_vs_state = r300_delete_vs_state; 1592} 1593