1//===-- ARMMCInstLower.cpp - Convert ARM MachineInstr to an MCInst --------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains code to lower ARM MachineInstrs to their corresponding
11// MCInst records.
12//
13//===----------------------------------------------------------------------===//
14
15#include "ARM.h"
16#include "ARMAsmPrinter.h"
17#include "MCTargetDesc/ARMMCExpr.h"
18#include "llvm/Constants.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/MC/MCExpr.h"
21#include "llvm/MC/MCInst.h"
22#include "llvm/Target/Mangler.h"
23using namespace llvm;
24
25
26MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
27                                      const MCSymbol *Symbol) {
28  const MCExpr *Expr;
29  switch (MO.getTargetFlags()) {
30  default: {
31    Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
32                                   OutContext);
33    switch (MO.getTargetFlags()) {
34    default:
35      assert(0 && "Unknown target flag on symbol operand");
36    case 0:
37      break;
38    case ARMII::MO_LO16:
39      Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
40                                     OutContext);
41      Expr = ARMMCExpr::CreateLower16(Expr, OutContext);
42      break;
43    case ARMII::MO_HI16:
44      Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
45                                     OutContext);
46      Expr = ARMMCExpr::CreateUpper16(Expr, OutContext);
47      break;
48    }
49    break;
50  }
51
52  case ARMII::MO_PLT:
53    Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_ARM_PLT,
54                                   OutContext);
55    break;
56  }
57
58  if (!MO.isJTI() && MO.getOffset())
59    Expr = MCBinaryExpr::CreateAdd(Expr,
60                                   MCConstantExpr::Create(MO.getOffset(),
61                                                          OutContext),
62                                   OutContext);
63  return MCOperand::CreateExpr(Expr);
64
65}
66
67bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
68                                 MCOperand &MCOp) {
69  switch (MO.getType()) {
70  default:
71    assert(0 && "unknown operand type");
72    return false;
73  case MachineOperand::MO_Register:
74    // Ignore all non-CPSR implicit register operands.
75    if (MO.isImplicit() && MO.getReg() != ARM::CPSR)
76      return false;
77    assert(!MO.getSubReg() && "Subregs should be eliminated!");
78    MCOp = MCOperand::CreateReg(MO.getReg());
79    break;
80  case MachineOperand::MO_Immediate:
81    MCOp = MCOperand::CreateImm(MO.getImm());
82    break;
83  case MachineOperand::MO_MachineBasicBlock:
84    MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
85        MO.getMBB()->getSymbol(), OutContext));
86    break;
87  case MachineOperand::MO_GlobalAddress:
88    MCOp = GetSymbolRef(MO, Mang->getSymbol(MO.getGlobal()));
89    break;
90  case MachineOperand::MO_ExternalSymbol:
91   MCOp = GetSymbolRef(MO,
92                        GetExternalSymbolSymbol(MO.getSymbolName()));
93    break;
94  case MachineOperand::MO_JumpTableIndex:
95    MCOp = GetSymbolRef(MO, GetJTISymbol(MO.getIndex()));
96    break;
97  case MachineOperand::MO_ConstantPoolIndex:
98    MCOp = GetSymbolRef(MO, GetCPISymbol(MO.getIndex()));
99    break;
100  case MachineOperand::MO_BlockAddress:
101    MCOp = GetSymbolRef(MO, GetBlockAddressSymbol(MO.getBlockAddress()));
102    break;
103  case MachineOperand::MO_FPImmediate: {
104    APFloat Val = MO.getFPImm()->getValueAPF();
105    bool ignored;
106    Val.convert(APFloat::IEEEdouble, APFloat::rmTowardZero, &ignored);
107    MCOp = MCOperand::CreateFPImm(Val.convertToDouble());
108    break;
109  }
110  }
111  return true;
112}
113
114void llvm::LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
115                                        ARMAsmPrinter &AP) {
116  OutMI.setOpcode(MI->getOpcode());
117
118  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
119    const MachineOperand &MO = MI->getOperand(i);
120
121    MCOperand MCOp;
122    if (AP.lowerOperand(MO, MCOp))
123      OutMI.addOperand(MCOp);
124  }
125}
126