176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* -*- Mode:C; c-basic-offset:4; -*- */ 276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* 476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Tulip and clone Etherboot Driver 576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman By Marty Connor (mdc@etherboot.org) 776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Copyright (C) 2001 Entity Cyber, Inc. 876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman This software may be used and distributed according to the terms 1076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman of the GNU Public License, incorporated herein by reference. 1176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 1276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman As of April 2001 this driver should support most tulip cards that 1376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman the Linux tulip driver supports because Donald Becker's Linux media 1476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman detection code is now included. 1576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 1676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Based on Ken Yap's Tulip Etherboot Driver and Donald Becker's 1776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Linux Tulip Driver. Supports N-Way speed auto-configuration on 1876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman MX98715, MX98715A and MX98725. Support inexpensive PCI 10/100 cards 1976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman based on the Macronix MX987x5 chip, such as the SOHOware Fast 2076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman model SFA110A, and the LinkSYS model LNE100TX. The NetGear 2176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman model FA310X, based on the LC82C168 chip is supported. 2276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman The TRENDnet TE100-PCIA NIC which uses a genuine Intel 21143-PD 2376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman chipset is supported. Also, Davicom DM9102's. 2476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 2576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Documentation and source code used: 2676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Source for Etherboot driver at 2776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman http://etherboot.sourceforge.net/ 2876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman MX98715A Data Sheet and MX98715A Application Note 2976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman on http://www.macronix.com/ (PDF format files) 3076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Source for Linux tulip driver at 3176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman http://cesdis.gsfc.nasa.gov/linux/drivers/tulip.html 3276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 3376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Adapted by Ken Yap from 3476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman FreeBSD netboot DEC 21143 driver 3576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Author: David Sharp 3676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman date: Nov/98 3776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 3876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Some code fragments were taken from verious places, Ken Yap's 3976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman etherboot, FreeBSD's if_de.c, and various Linux related files. 4076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman DEC's manuals for the 21143 and SROM format were very helpful. 4176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman The Linux de driver development page has a number of links to 4276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman useful related information. Have a look at: 4376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman ftp://cesdis.gsfc.nasa.gov/pub/linux/drivers/tulip-devel.html 4476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman*/ 4576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 4676d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanFILE_LICENCE ( GPL_ANY ); 4776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 4876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 4976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Revision History */ 5076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 5176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 5276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* 5376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 08 Feb 2005 Ramesh Chander chhabaramesh at yahoo.co.in added table entries 5476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for SGThomson STE10/100A 5576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 07 Sep 2003 timlegge Multicast Support Added 5676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 11 Apr 2001 mdc [patch to etherboot 4.7.24] 5776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Major rewrite to include Linux tulip driver media detection 5876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman code. This driver should support a lot more cards now. 5976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 16 Jul 2000 mdc 0.75b11 6076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Added support for ADMtek 0985 Centaur-P, a "Comet" tulip clone 6176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman which is used on the LinkSYS LNE100TX v4.x cards. We already 6276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman support LNE100TX v2.0 cards, which use a different controller. 6376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 04 Jul 2000 jam ? 6476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Added test of status after receiving a packet from the card. 6576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Also uncommented the tulip_disable routine. Stray packets 6676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman seemed to be causing problems. 6776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 27 Apr 2000 njl ? 6876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 29 Feb 2000 mdc 0.75b7 6976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Increased reset delay to 3 seconds because Macronix cards seem to 7076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman need more reset time before card comes back to a usable state. 7176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 26 Feb 2000 mdc 0.75b6 7276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Added a 1 second delay after initializing the transmitter because 7376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman some cards seem to need the time or they drop the first packet 7476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman transmitted. 7576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 23 Feb 2000 mdc 0.75b5 7676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman removed udelay code and used currticks() for more reliable delay 7776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman code in reset pause and sanity timeouts. Added function prototypes 7876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman and TX debugging code. 7976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 21 Feb 2000 mdc patch to Etherboot 4.4.3 8076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Incorporated patches from Bob Edwards and Paul Mackerras of 8176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Linuxcare's OZLabs to deal with inefficiencies in tulip_transmit 8276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman and udelay. We now wait for packet transmission to complete 8376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman (or sanity timeout). 8476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 04 Feb 2000 Robert.Edwards@anu.edu.au patch to Etherboot 4.4.2 8576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman patch to tulip.c that implements the automatic selection of the MII 8676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman interface on cards using the Intel/DEC 21143 reference design, in 8776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman particular, the TRENDnet TE100-PCIA NIC which uses a genuine Intel 8876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 21143-PD chipset. 8976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 11 Jan 2000 mdc 0.75b4 9076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Added support for NetGear FA310TX card based on the LC82C168 9176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman chip. This should also support Lite-On LC82C168 boards. 9276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Added simple MII support. Re-arranged code to better modularize 9376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman initializations. 9476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 04 Dec 1999 mdc 0.75b3 9576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Added preliminary support for LNE100TX PCI cards. Should work for 9676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman PNIC2 cards. No MII support, but single interface (RJ45) tulip 9776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cards seem to not care. 9876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 03 Dec 1999 mdc 0.75b2 9976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Renamed from mx987x5 to tulip, merged in original tulip init code 10076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman from tulip.c to support other tulip compatible cards. 10176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 02 Dec 1999 mdc 0.75b1 10276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Released Beta MX987x5 Driver for code review and testing to netboot 10376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman and thinguin mailing lists. 10476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman*/ 10576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 10676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 10776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 10876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Declarations */ 10976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 11076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 11176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#include "etherboot.h" 11276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#include "nic.h" 11376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 11476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#include <gpxe/ethernet.h> 11576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#include <gpxe/pci.h> 11676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 11776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* User settable parameters */ 11876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 11976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#undef TULIP_DEBUG 12076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#undef TULIP_DEBUG_WHERE 12176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 12276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic int tulip_debug = 2; /* 1 normal messages, 0 quiet .. 7 verbose. */ 12376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 12476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 12576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define TX_TIME_OUT 2*TICKS_PER_SEC 12676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 12776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* helpful macros if on a big_endian machine for changing byte order. 12876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman not strictly needed on Intel */ 12976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define get_unaligned(ptr) (*(ptr)) 13076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define put_unaligned(val, ptr) ((void)( *(ptr) = (val) )) 13176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define get_u16(ptr) (*(u16 *)(ptr)) 13276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define virt_to_le32desc(addr) virt_to_bus(addr) 13376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 13476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define TULIP_IOTYPE PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0 13576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define TULIP_SIZE 0x80 13676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 13776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* This is a mysterious value that can be written to CSR11 in the 21040 (only) 13876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman to support a pre-NWay full-duplex signaling mechanism using short frames. 13976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman No one knows what it should be, but if left at its default value some 14076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 10base2(!) packets trigger a full-duplex-request interrupt. */ 14176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define FULL_DUPLEX_MAGIC 0x6969 14276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 14376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic const int csr0 = 0x01A00000 | 0x8000; 14476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 14576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* The possible media types that can be set in options[] are: */ 14676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define MEDIA_MASK 31 14776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic const char * const medianame[32] = { 14876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "10baseT", "10base2", "AUI", "100baseTx", 14976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx", 15076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII", 15176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4", 15276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19", 15376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 15476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 15576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* This much match tulip_tbl[]! Note 21142 == 21143. */ 15676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum tulip_chips { 15776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman DC21040=0, DC21041=1, DC21140=2, DC21142=3, DC21143=3, 15876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman LC82C168, MX98713, MX98715, MX98725, AX88141, AX88140, PNIC2, COMET, 15976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman COMPEX9881, I21145, XIRCOM, SGThomson, /*Ramesh Chander*/ 16076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 16176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 16276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum pci_id_flags_bits { 16376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Set PCI command register bits before calling probe1(). */ 16476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4, 16576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Read and map the single following PCI BAR. */ 16676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman PCI_ADDR0=0<<4, PCI_ADDR1=1<<4, PCI_ADDR2=2<<4, PCI_ADDR3=3<<4, 16776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman PCI_ADDR_64BITS=0x100, PCI_NO_ACPI_WAKE=0x200, PCI_NO_MIN_LATENCY=0x400, 16876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman PCI_UNUSED_IRQ=0x800, 16976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 17076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 17176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct pci_id_info { 17276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman char *name; 17376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct match_info { 17476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 pci, pci_mask, subsystem, subsystem_mask; 17576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 revision, revision_mask; /* Only 8 bits. */ 17676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } id; 17776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman enum pci_id_flags_bits pci_flags; 17876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int io_size; /* Needed for I/O region check or ioremap(). */ 17976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int drv_flags; /* Driver use, intended as capability flags. */ 18076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 18176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 18276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic const struct pci_id_info pci_id_tbl[] = { 18376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Digital DC21040 Tulip", { 0x00021011, 0xffffffff, 0, 0, 0, 0 }, 18476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 0x80, DC21040 }, 18576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Digital DC21041 Tulip", { 0x00141011, 0xffffffff, 0, 0, 0, 0 }, 18676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 0x80, DC21041 }, 18776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Digital DS21140A Tulip", { 0x00091011, 0xffffffff, 0,0, 0x20,0xf0 }, 18876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 0x80, DC21140 }, 18976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Digital DS21140 Tulip", { 0x00091011, 0xffffffff, 0, 0, 0, 0 }, 19076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 0x80, DC21140 }, 19176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Digital DS21143 Tulip", { 0x00191011, 0xffffffff, 0,0, 65,0xff }, 19276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, TULIP_SIZE, DC21142 }, 19376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Digital DS21142 Tulip", { 0x00191011, 0xffffffff, 0, 0, 0, 0 }, 19476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, TULIP_SIZE, DC21142 }, 19576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Kingston KNE110tx (PNIC)", { 0x000211AD, 0xffffffff, 0xf0022646, 0xffffffff, 0, 0 }, 19676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, LC82C168 }, 19776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Lite-On 82c168 PNIC", { 0x000211AD, 0xffffffff, 0, 0, 0, 0 }, 19876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, LC82C168 }, 19976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Macronix 98713 PMAC", { 0x051210d9, 0xffffffff, 0, 0, 0, 0 }, 20076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, MX98713 }, 20176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Macronix 98715 PMAC", { 0x053110d9, 0xffffffff, 0, 0, 0, 0 }, 20276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, MX98715 }, 20376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Macronix 98725 PMAC", { 0x053110d9, 0xffffffff, 0, 0, 0, 0 }, 20476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, MX98725 }, 20576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "ASIX AX88141", { 0x1400125B, 0xffffffff, 0,0, 0x10, 0xf0 }, 20676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 128, AX88141 }, 20776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "ASIX AX88140", { 0x1400125B, 0xffffffff, 0, 0, 0, 0 }, 20876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 128, AX88140 }, 20976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Lite-On LC82C115 PNIC-II", { 0xc11511AD, 0xffffffff, 0, 0, 0, 0 }, 21076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, PNIC2 }, 21176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "ADMtek AN981 Comet", { 0x09811317, 0xffffffff, 0, 0, 0, 0 }, 21276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, COMET }, 21376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "ADMTek AN983 Comet", { 0x12161113, 0xffffffff, 0, 0, 0, 0 }, 21476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, COMET }, 21576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "ADMTek Comet AN983b", { 0x95111317, 0xffffffff, 0, 0, 0, 0 }, 21676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, COMET }, 21776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "ADMtek Centaur-P", { 0x09851317, 0xffffffff, 0, 0, 0, 0 }, 21876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, COMET }, 21976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "ADMtek Centaur-C", { 0x19851317, 0xffffffff, 0, 0, 0, 0 }, 22076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, COMET }, 22176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Compex RL100-TX", { 0x988111F6, 0xffffffff, 0, 0, 0, 0 }, 22276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 128, COMPEX9881 }, 22376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Intel 21145 Tulip", { 0x00398086, 0xffffffff, 0, 0, 0, 0 }, 22476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 128, I21145 }, 22576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Xircom Tulip clone", { 0x0003115d, 0xffffffff, 0, 0, 0, 0 }, 22676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 128, XIRCOM }, 22776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Davicom DM9102", { 0x91021282, 0xffffffff, 0, 0, 0, 0 }, 22876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 0x80, DC21140 }, 22976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Davicom DM9100", { 0x91001282, 0xffffffff, 0, 0, 0, 0 }, 23076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 0x80, DC21140 }, 23176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Macronix mxic-98715 (EN1217)", { 0x12171113, 0xffffffff, 0, 0, 0, 0 }, 23276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, MX98715 }, 23376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "3Com 3cSOHO100B-TX (ADMtek Centuar)", { 0x930010b7, 0xffffffff, 0, 0, 0, 0 }, 23476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, TULIP_SIZE, COMET }, 23576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "SG Thomson STE10/100A", { 0x2774104a, 0xffffffff, 0, 0, 0, 0 }, 23676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TULIP_IOTYPE, 256, COMET }, /*Ramesh Chander*/ 23776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { 0, { 0, 0, 0, 0, 0, 0 }, 0, 0, 0 }, 23876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 23976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 24076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum tbl_flag { 24176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman HAS_MII=1, HAS_MEDIA_TABLE=2, CSR12_IN_SROM=4, ALWAYS_CHECK_MII=8, 24276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman HAS_PWRDWN=0x10, MC_HASH_ONLY=0x20, /* Hash-only multicast filter. */ 24376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman HAS_PNICNWAY=0x80, HAS_NWAY=0x40, /* Uses internal NWay xcvr. */ 24476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman HAS_INTR_MITIGATION=0x100, IS_ASIX=0x200, HAS_8023X=0x400, 24576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 24676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 24776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Note: this table must match enum tulip_chips above. */ 24876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic struct tulip_chip_table { 24976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman char *chip_name; 25076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int flags; 25176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} tulip_tbl[] = { 25276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Digital DC21040 Tulip", 0}, 25376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Digital DC21041 Tulip", HAS_MEDIA_TABLE | HAS_NWAY }, 25476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Digital DS21140 Tulip", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM }, 25576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Digital DS21143 Tulip", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII 25676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman | HAS_PWRDWN | HAS_NWAY | HAS_INTR_MITIGATION }, 25776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Lite-On 82c168 PNIC", HAS_MII | HAS_PNICNWAY }, 25876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Macronix 98713 PMAC", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM }, 25976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Macronix 98715 PMAC", HAS_MEDIA_TABLE }, 26076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Macronix 98725 PMAC", HAS_MEDIA_TABLE }, 26176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "ASIX AX88140", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM 26276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman | MC_HASH_ONLY | IS_ASIX }, 26376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "ASIX AX88141", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY 26476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman | IS_ASIX }, 26576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Lite-On PNIC-II", HAS_MII | HAS_NWAY | HAS_8023X }, 26676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "ADMtek Comet", HAS_MII | MC_HASH_ONLY }, 26776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Compex 9881 PMAC", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM }, 26876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Intel DS21145 Tulip", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII 26976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman | HAS_PWRDWN | HAS_NWAY }, 27076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "Xircom tulip work-alike", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII 27176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman | HAS_PWRDWN | HAS_NWAY }, 27276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { "SGThomson STE10/100A", HAS_MII | MC_HASH_ONLY }, /*Ramesh Chander*/ 27376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman { 0, 0 }, 27476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 27576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 27676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* A full-duplex map for media types. */ 27776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum MediaIs { 27876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman MediaIsFD = 1, MediaAlwaysFD=2, MediaIsMII=4, MediaIsFx=8, 27976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman MediaIs100=16}; 28076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 28176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic const char media_cap[32] = 28276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 20,31,0,0, }; 28376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic u8 t21040_csr13[] = {2,0x0C,8,4, 4,0,0,0, 0,0,0,0, 4,0,0,0}; 28476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 28576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* 21041 transceiver register settings: 10-T, 10-2, AUI, 10-T, 10T-FD */ 28676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic u16 t21041_csr13[] = { 0xEF01, 0xEF09, 0xEF09, 0xEF01, 0xEF09, }; 28776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic u16 t21041_csr14[] = { 0xFFFF, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, }; 28876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic u16 t21041_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, }; 28976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 29076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* not used 29176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic u16 t21142_csr13[] = { 0x0001, 0x0009, 0x0009, 0x0000, 0x0001, }; 29276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman*/ 29376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic u16 t21142_csr14[] = { 0xFFFF, 0x0705, 0x0705, 0x0000, 0x7F3D, }; 29476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* not used 29576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic u16 t21142_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, }; 29676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman*/ 29776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 29876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Offsets to the Command and Status Registers, "CSRs". All accesses 29976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman must be longword instructions and quadword aligned. */ 30076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum tulip_offsets { 30176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28, 30276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman CSR6=0x30, CSR7=0x38, CSR8=0x40, CSR9=0x48, CSR10=0x50, CSR11=0x58, 30376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman CSR12=0x60, CSR13=0x68, CSR14=0x70, CSR15=0x78, CSR16=0x80, CSR20=0xA0 30476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 30576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 30676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* The bits in the CSR5 status registers, mostly interrupt sources. */ 30776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum status_bits { 30876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TimerInt=0x800, TPLnkFail=0x1000, TPLnkPass=0x10, 30976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman NormalIntr=0x10000, AbnormalIntr=0x8000, 31076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman RxJabber=0x200, RxDied=0x100, RxNoBuf=0x80, RxIntr=0x40, 31176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TxFIFOUnderflow=0x20, TxJabber=0x08, TxNoBuf=0x04, TxDied=0x02, TxIntr=0x01, 31276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 31376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 31476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* The configuration bits in CSR6. */ 31576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum csr6_mode_bits { 31676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman TxOn=0x2000, RxOn=0x0002, FullDuplex=0x0200, 31776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman AcceptBroadcast=0x0100, AcceptAllMulticast=0x0080, 31876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman AcceptAllPhys=0x0040, AcceptRunt=0x0008, 31976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 32076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 32176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 32276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum desc_status_bits { 32376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman DescOwnded=0x80000000, RxDescFatalErr=0x8000, RxWholePkt=0x0300, 32476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 32576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 32676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct medialeaf { 32776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u8 type; 32876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u8 media; 32976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char *leafdata; 33076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 33176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 33276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct mediatable { 33376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 defaultmedia; 33476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u8 leafcount, csr12dir; /* General purpose pin directions. */ 33576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned has_mii:1, has_nonmii:1, has_reset:6; 33676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 csr15dir, csr15val; /* 21143 NWay setting. */ 33776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct medialeaf mleaf[0]; 33876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 33976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 34076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct mediainfo { 34176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct mediainfo *next; 34276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int info_type; 34376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int index; 34476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char *info; 34576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 34676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 34776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* EEPROM Address width definitions */ 34876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EEPROM_ADDRLEN 6 34976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EEPROM_SIZE 128 /* 2 << EEPROM_ADDRLEN */ 35076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 35176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* The EEPROM commands include the alway-set leading bit. */ 35276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EE_WRITE_CMD (5 << addr_len) 35376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EE_READ_CMD (6 << addr_len) 35476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EE_ERASE_CMD (7 << addr_len) 35576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 35676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* EEPROM_Ctrl bits. */ 35776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EE_SHIFT_CLK 0x02 /* EEPROM shift clock. */ 35876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EE_CS 0x01 /* EEPROM chip select. */ 35976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */ 36076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EE_WRITE_0 0x01 36176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EE_WRITE_1 0x05 36276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EE_DATA_READ 0x08 /* EEPROM chip data out. */ 36376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EE_ENB (0x4800 | EE_CS) 36476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 36576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Delay between EEPROM clock transitions. Even at 33Mhz current PCI 36676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman implementations don't overrun the EEPROM clock. We add a bus 36776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman turn-around to insure that this remains true. */ 36876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define eeprom_delay() inl(ee_addr) 36976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 37076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Size of transmit and receive buffers */ 37176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define BUFLEN 1536 37276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 37376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Ring-wrap flag in length field, use for last ring entry. 37476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x01000000 means chain on buffer2 address, 37576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x02000000 means use the ring start address in CSR2/3. 37676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Note: Some work-alike chips do not function correctly in chained mode. 37776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman The ASIX chip works only in chained mode. 37876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Thus we indicate ring mode, but always write the 'next' field for 37976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman chained mode as well. */ 38076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define DESC_RING_WRAP 0x02000000 38176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 38276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* transmit and receive descriptor format */ 38376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct tulip_rx_desc { 38476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman volatile u32 status; 38576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 length; 38676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 buffer1, buffer2; 38776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 38876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 38976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct tulip_tx_desc { 39076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman volatile u32 status; 39176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 length; 39276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 buffer1, buffer2; 39376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 39476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 39576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 39676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Global Storage */ 39776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 39876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 39976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic u32 ioaddr; 40076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 40176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct tulip_private { 40276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int cur_rx; 40376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int chip_id; /* index into tulip_tbl[] */ 40476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int pci_id_idx; /* index into pci_id_tbl[] */ 40576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int revision; 40676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int flags; 40776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned short vendor_id; /* PCI card vendor code */ 40876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned short dev_id; /* PCI card device code */ 40976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char ehdr[ETH_HLEN]; /* buffer for ethernet header */ 41076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman const char *nic_name; 41176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int csr0, csr6; /* Current CSR0, CSR6 settings. */ 41276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int if_port; 41376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int full_duplex; /* Full-duplex operation requested. */ 41476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int full_duplex_lock; 41576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int medialock; /* Do not sense media type. */ 41676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int mediasense; /* Media sensing in progress. */ 41776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int nway, nwayset; /* 21143 internal NWay. */ 41876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int default_port; 41976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char eeprom[EEPROM_SIZE]; /* Serial EEPROM contents. */ 42076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u8 media_table_storage[(sizeof(struct mediatable) + 32*sizeof(struct medialeaf))]; 42176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 sym_advertise, mii_advertise; /* NWay to-advertise. */ 42276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct mediatable *mtable; 42376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 lpar; /* 21143 Link partner ability. */ 42476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 advertising[4]; /* MII advertise, from SROM table. */ 42576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman signed char phys[4], mii_cnt; /* MII device addresses. */ 42676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int cur_index; /* Current media index. */ 42776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int saved_if_port; 42876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 42976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 43076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Note: transmit and receive buffers must be longword aligned and 43176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman longword divisable */ 43276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 43376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define TX_RING_SIZE 2 43476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define RX_RING_SIZE 4 43576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct { 43676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct tulip_tx_desc tx_ring[TX_RING_SIZE]; 43776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char txb[BUFLEN]; 43876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct tulip_rx_desc rx_ring[RX_RING_SIZE]; 43976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char rxb[RX_RING_SIZE * BUFLEN]; 44076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct tulip_private tpx; 44176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} tulip_bss __shared __attribute__ ((aligned(4))); 44276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define tx_ring tulip_bss.tx_ring 44376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define txb tulip_bss.txb 44476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define rx_ring tulip_bss.rx_ring 44576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define rxb tulip_bss.rxb 44676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 44776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic struct tulip_private *tp; 44876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 44976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Known cards that have old-style EEPROMs. 45076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Writing this table is described at 45176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman http://cesdis.gsfc.nasa.gov/linux/drivers/tulip-drivers/tulip-media.html */ 45276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic struct fixups { 45376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman char *name; 45476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char addr0, addr1, addr2; 45576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 newtable[32]; /* Max length below. */ 45676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} eeprom_fixups[] = { 45776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman {"Asante", 0, 0, 0x94, {0x1e00, 0x0000, 0x0800, 0x0100, 0x018c, 45876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0000, 0x0000, 0xe078, 0x0001, 0x0050, 0x0018 }}, 45976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman {"SMC9332DST", 0, 0, 0xC0, { 0x1e00, 0x0000, 0x0800, 0x041f, 46076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0000, 0x009E, /* 10baseT */ 46176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0004, 0x009E, /* 10baseT-FD */ 46276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0903, 0x006D, /* 100baseTx */ 46376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0905, 0x006D, /* 100baseTx-FD */ }}, 46476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman {"Cogent EM100", 0, 0, 0x92, { 0x1e00, 0x0000, 0x0800, 0x063f, 46576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0107, 0x8021, /* 100baseFx */ 46676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0108, 0x8021, /* 100baseFx-FD */ 46776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0100, 0x009E, /* 10baseT */ 46876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0104, 0x009E, /* 10baseT-FD */ 46976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0103, 0x006D, /* 100baseTx */ 47076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0105, 0x006D, /* 100baseTx-FD */ }}, 47176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman {"Maxtech NX-110", 0, 0, 0xE8, { 0x1e00, 0x0000, 0x0800, 0x0513, 47276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x1001, 0x009E, /* 10base2, CSR12 0x10*/ 47376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0000, 0x009E, /* 10baseT */ 47476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0004, 0x009E, /* 10baseT-FD */ 47576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0303, 0x006D, /* 100baseTx, CSR12 0x03 */ 47676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0305, 0x006D, /* 100baseTx-FD CSR12 0x03 */}}, 47776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman {"Accton EN1207", 0, 0, 0xE8, { 0x1e00, 0x0000, 0x0800, 0x051F, 47876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x1B01, 0x0000, /* 10base2, CSR12 0x1B */ 47976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0B00, 0x009E, /* 10baseT, CSR12 0x0B */ 48076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x0B04, 0x009E, /* 10baseT-FD,CSR12 0x0B */ 48176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x1B03, 0x006D, /* 100baseTx, CSR12 0x1B */ 48276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x1B05, 0x006D, /* 100baseTx-FD CSR12 0x1B */ 48376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman }}, 48476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman {0, 0, 0, 0, {}}}; 48576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 48676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic const char * block_name[] = {"21140 non-MII", "21140 MII PHY", 48776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "21142 Serial PHY", "21142 MII PHY", "21143 SYM PHY", "21143 reset method"}; 48876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 48976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 49076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 49176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Function Prototypes */ 49276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 49376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic int mdio_read(struct nic *nic, int phy_id, int location); 49476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void mdio_write(struct nic *nic, int phy_id, int location, int value); 49576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic int read_eeprom(unsigned long ioaddr, int location, int addr_len); 49676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void parse_eeprom(struct nic *nic); 49776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic int tulip_probe(struct nic *nic,struct pci_device *pci); 49876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_init_ring(struct nic *nic); 49976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_reset(struct nic *nic); 50076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_transmit(struct nic *nic, const char *d, unsigned int t, 50176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int s, const char *p); 50276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic int tulip_poll(struct nic *nic, int retrieve); 50376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_disable(struct nic *nic); 50476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void nway_start(struct nic *nic); 50576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void pnic_do_nway(struct nic *nic); 50676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void select_media(struct nic *nic, int startup); 50776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void init_media(struct nic *nic); 50876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void start_link(struct nic *nic); 50976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic int tulip_check_duplex(struct nic *nic); 51076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 51176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_wait(unsigned int nticks); 51276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 51376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 51476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void whereami(const char *str); 51576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 51676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 51776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 51876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_more(void); 51976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 52076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 52176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 52276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 52376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Utility Routines */ 52476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 52576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 52676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 52776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void whereami (const char *str, struct pci_device *pci) 52876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 52976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: %s\n", tp->nic_name, str); 53076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* sleep(2); */ 53176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 53276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 53376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 53476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 53576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_more(void) 53676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 53776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("\n\n-- more --"); 53876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman while (!iskey()) 53976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* wait */; 54076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman getchar(); 54176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("\n\n"); 54276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 54376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif /* TULIP_DEBUG */ 54476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 54576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_wait(unsigned int nticks) 54676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 54776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int to = currticks() + nticks; 54876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman while (currticks() < to) 54976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* wait */ ; 55076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 55176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 55276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 55376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 55476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Media Descriptor Code */ 55576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 55676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 55776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* MII transceiver control section. 55876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Read and write the MII registers using software-generated serial 55976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman MDIO protocol. See the MII specifications or DP83840A data sheet 56076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for details. */ 56176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 56276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually 56376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman met by back-to-back PCI I/O cycles, but we insert a delay to avoid 56476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "overclocking" issues or future 66Mhz PCI. */ 56576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define mdio_delay() inl(mdio_addr) 56676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 56776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Read and write the MII registers using software-generated serial 56876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman MDIO protocol. It is just different enough from the EEPROM protocol 56976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman to not share code. The maxium data clock rate is 2.5 Mhz. */ 57076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define MDIO_SHIFT_CLK 0x10000 57176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define MDIO_DATA_WRITE0 0x00000 57276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define MDIO_DATA_WRITE1 0x20000 57376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define MDIO_ENB 0x00000 /* Ignore the 0x02000 databook setting. */ 57476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define MDIO_ENB_IN 0x40000 57576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define MDIO_DATA_READ 0x80000 57676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 57776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* MII transceiver control section. 57876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Read and write the MII registers using software-generated serial 57976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman MDIO protocol. See the MII specifications or DP83840A data sheet 58076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for details. */ 58176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 58276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanint mdio_read(struct nic *nic __unused, int phy_id, int location) 58376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 58476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i; 58576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int read_cmd = (0xf6 << 10) | (phy_id << 5) | location; 58676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int retval = 0; 58776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman long mdio_addr = ioaddr + CSR9; 58876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 58976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 59076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("mdio_read\n"); 59176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 59276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 59376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->chip_id == LC82C168) { 59476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i = 1000; 59576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0); 59676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman inl(ioaddr + 0xA0); 59776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman inl(ioaddr + 0xA0); 59876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman while (--i > 0) 59976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ( ! ((retval = inl(ioaddr + 0xA0)) & 0x80000000)) 60076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return retval & 0xffff; 60176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 0xffff; 60276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 60376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 60476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->chip_id == COMET) { 60576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (phy_id == 1) { 60676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (location < 7) 60776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return inl(ioaddr + 0xB4 + (location<<2)); 60876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else if (location == 17) 60976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return inl(ioaddr + 0xD0); 61076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else if (location >= 29 && location <= 31) 61176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return inl(ioaddr + 0xD4 + ((location-29)<<2)); 61276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 61376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 0xffff; 61476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 61576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 61676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Establish sync by sending at least 32 logic ones. */ 61776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 32; i >= 0; i--) { 61876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr); 61976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 62076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr); 62176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 62276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 62376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Shift the read command bits out. */ 62476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 15; i >= 0; i--) { 62576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int dataval = (read_cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0; 62676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 62776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB | dataval, mdio_addr); 62876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 62976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr); 63076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 63176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 63276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Read the two transition, 16 data, and wire-idle bits. */ 63376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 19; i > 0; i--) { 63476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB_IN, mdio_addr); 63576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 63676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman retval = (retval << 1) | ((inl(mdio_addr) & MDIO_DATA_READ) ? 1 : 0); 63776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr); 63876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 63976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 64076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return (retval>>1) & 0xffff; 64176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 64276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 64376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanvoid mdio_write(struct nic *nic __unused, int phy_id, int location, int value) 64476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 64576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i; 64676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int cmd = (0x5002 << 16) | (phy_id << 23) | (location<<18) | value; 64776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman long mdio_addr = ioaddr + CSR9; 64876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 64976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 65076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("mdio_write\n"); 65176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 65276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 65376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->chip_id == LC82C168) { 65476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i = 1000; 65576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(cmd, ioaddr + 0xA0); 65676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman do 65776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ( ! (inl(ioaddr + 0xA0) & 0x80000000)) 65876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 65976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman while (--i > 0); 66076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return; 66176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 66276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 66376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->chip_id == COMET) { 66476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (phy_id != 1) 66576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return; 66676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (location < 7) 66776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(value, ioaddr + 0xB4 + (location<<2)); 66876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else if (location == 17) 66976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(value, ioaddr + 0xD0); 67076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else if (location >= 29 && location <= 31) 67176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(value, ioaddr + 0xD4 + ((location-29)<<2)); 67276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return; 67376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 67476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 67576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Establish sync by sending 32 logic ones. */ 67676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 32; i >= 0; i--) { 67776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr); 67876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 67976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr); 68076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 68176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 68276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Shift the command bits out. */ 68376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 31; i >= 0; i--) { 68476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int dataval = (cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0; 68576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB | dataval, mdio_addr); 68676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 68776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr); 68876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 68976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 69076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Clear out extra bits. */ 69176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 2; i > 0; i--) { 69276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB_IN, mdio_addr); 69376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 69476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr); 69576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_delay(); 69676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 69776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 69876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 69976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 70076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 70176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* EEPROM Reading Code */ 70276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 70376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* EEPROM routines adapted from the Linux Tulip Code */ 70476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Reading a serial EEPROM is a "bit" grungy, but we work our way 70576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman through:->. 70676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman*/ 70776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic int read_eeprom(unsigned long ioaddr, int location, int addr_len) 70876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 70976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i; 71076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned short retval = 0; 71176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman long ee_addr = ioaddr + CSR9; 71276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int read_cmd = location | EE_READ_CMD; 71376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 71476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 71576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("read_eeprom\n"); 71676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 71776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 71876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(EE_ENB & ~EE_CS, ee_addr); 71976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(EE_ENB, ee_addr); 72076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 72176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Shift the read command bits out. */ 72276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 4 + addr_len; i >= 0; i--) { 72376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; 72476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(EE_ENB | dataval, ee_addr); 72576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman eeprom_delay(); 72676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr); 72776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman eeprom_delay(); 72876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 72976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(EE_ENB, ee_addr); 73076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 73176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 16; i > 0; i--) { 73276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(EE_ENB | EE_SHIFT_CLK, ee_addr); 73376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman eeprom_delay(); 73476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0); 73576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(EE_ENB, ee_addr); 73676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman eeprom_delay(); 73776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 73876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 73976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Terminate the EEPROM access. */ 74076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(EE_ENB & ~EE_CS, ee_addr); 74176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return retval; 74276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 74376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 74476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 74576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 74676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* EEPROM Parsing Code */ 74776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 74876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void parse_eeprom(struct nic *nic) 74976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 75076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char *p, *ee_data = tp->eeprom; 75176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int new_advertise = 0; 75276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i; 75376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 75476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 75576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("parse_eeprom\n"); 75676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 75776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 75876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->mtable = 0; 75976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Detect an old-style (SA only) EEPROM layout: 76076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman memcmp(ee_data, ee_data+16, 8). */ 76176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < 8; i ++) 76276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (ee_data[i] != ee_data[16+i]) 76376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 76476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (i >= 8) { 76576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Do a fix-up based on the vendor half of the station address. */ 76676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; eeprom_fixups[i].name; i++) { 76776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (nic->node_addr[0] == eeprom_fixups[i].addr0 76876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman && nic->node_addr[1] == eeprom_fixups[i].addr1 76976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman && nic->node_addr[2] == eeprom_fixups[i].addr2) { 77076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (nic->node_addr[2] == 0xE8 && ee_data[0x1a] == 0x55) 77176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman i++; /* An Accton EN1207, not an outlaw Maxtech. */ 77276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman memcpy(ee_data + 26, eeprom_fixups[i].newtable, 77376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman sizeof(eeprom_fixups[i].newtable)); 77476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 77576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Old format EEPROM on '%s' board.\n%s: Using substitute media control info.\n", 77676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, eeprom_fixups[i].name, tp->nic_name); 77776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 77876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 77976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 78076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 78176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (eeprom_fixups[i].name == NULL) { /* No fixup found. */ 78276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 78376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Old style EEPROM with no media selection information.\n", 78476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name); 78576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 78676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return; 78776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 78876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 78976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 79076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (ee_data[19] > 1) { 79176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 79276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Multiport cards (%d ports) may not work correctly.\n", 79376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, ee_data[19]); 79476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 79576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 79676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 79776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman p = (void *)ee_data + ee_data[27]; 79876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 79976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (ee_data[27] == 0) { /* No valid media table. */ 80076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 80176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) { 80276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: No Valid Media Table. ee_data[27] = %hhX\n", 80376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, ee_data[27]); 80476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 80576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 80676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (tp->chip_id == DC21041) { 80776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int media = get_u16(p); 80876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int count = p[2]; 80976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman p += 3; 81076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 81176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: 21041 Media table, default media %hX (%s).\n", 81276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, media, 81376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman media & 0x0800 ? "Autosense" : medianame[media & 15]); 81476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < count; i++) { 81576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char media_block = *p++; 81676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int media_code = media_block & MEDIA_MASK; 81776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (media_block & 0x40) 81876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman p += 6; 81976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman switch(media_code) { 82076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 0: new_advertise |= 0x0020; break; 82176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 4: new_advertise |= 0x0040; break; 82276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 82376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: 21041 media #%d, %s.\n", 82476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, media_code, medianame[media_code]); 82576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 82676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else { 82776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char csr12dir = 0; 82876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int count; 82976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct mediatable *mtable; 83076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 media = get_u16(p); 83176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 83276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman p += 2; 83376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->flags & CSR12_IN_SROM) 83476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr12dir = *p++; 83576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman count = *p++; 83676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 83776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->mtable = mtable = (struct mediatable *)&tp->media_table_storage[0]; 83876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 83976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->defaultmedia = media; 84076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->leafcount = count; 84176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->csr12dir = csr12dir; 84276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->has_nonmii = mtable->has_mii = mtable->has_reset = 0; 84376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->csr15dir = mtable->csr15val = 0; 84476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 84576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: EEPROM default media type %s.\n", tp->nic_name, 84676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman media & 0x0800 ? "Autosense" : medianame[media & MEDIA_MASK]); 84776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 84876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < count; i++) { 84976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct medialeaf *leaf = &mtable->mleaf[i]; 85076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 85176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ((p[0] & 0x80) == 0) { /* 21140 Compact block. */ 85276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman leaf->type = 0; 85376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman leaf->media = p[0] & 0x3f; 85476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman leaf->leafdata = p; 85576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ((p[2] & 0x61) == 0x01) /* Bogus, but Znyx boards do it. */ 85676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->has_mii = 1; 85776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman p += 4; 85876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else { 85976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman switch(leaf->type = p[1]) { 86076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 5: 86176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->has_reset = i; 86276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman leaf->media = p[2] & 0x0f; 86376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 86476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 1: case 3: 86576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->has_mii = 1; 86676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman leaf->media = 11; 86776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 86876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 2: 86976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ((p[2] & 0x3f) == 0) { 87076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 base15 = (p[2] & 0x40) ? get_u16(p + 7) : 0x0008; 87176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 *p1 = (u16 *)(p + (p[2] & 0x40 ? 9 : 3)); 87276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->csr15dir = (get_unaligned(p1 + 0)<<16) + base15; 87376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->csr15val = (get_unaligned(p1 + 1)<<16) + base15; 87476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 87576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Fall through. */ 87676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 0: case 4: 87776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mtable->has_nonmii = 1; 87876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman leaf->media = p[2] & MEDIA_MASK; 87976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman switch (leaf->media) { 88076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 0: new_advertise |= 0x0020; break; 88176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 4: new_advertise |= 0x0040; break; 88276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 3: new_advertise |= 0x0080; break; 88376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 5: new_advertise |= 0x0100; break; 88476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 6: new_advertise |= 0x0200; break; 88576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 88676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 88776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman default: 88876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman leaf->media = 19; 88976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 89076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman leaf->leafdata = p + 2; 89176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman p += (p[0] & 0x3f) + 1; 89276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 89376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 89476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1 && leaf->media == 11) { 89576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char *bp = leaf->leafdata; 89676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: MII interface PHY %d, setup/reset sequences %d/%d long, capabilities %hhX %hhX.\n", 89776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, bp[0], bp[1], bp[2 + bp[1]*2], 89876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman bp[5 + bp[2 + bp[1]*2]*2], bp[4 + bp[2 + bp[1]*2]*2]); 89976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 90076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 90176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Index #%d - Media %s (#%d) described " 90276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "by a %s (%d) block.\n", 90376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, i, medianame[leaf->media], leaf->media, 90476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman leaf->type < 6 ? block_name[leaf->type] : "UNKNOWN", 90576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman leaf->type); 90676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 90776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (new_advertise) 90876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->sym_advertise = new_advertise; 90976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 91076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 91176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 91276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 91376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 91476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* tulip_init_ring - setup the tx and rx descriptors */ 91576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 91676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_init_ring(struct nic *nic __unused) 91776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 91876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i; 91976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 92076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 92176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("tulip_init_ring\n"); 92276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 92376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 92476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->cur_rx = 0; 92576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 92676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < RX_RING_SIZE; i++) { 92776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman rx_ring[i].status = cpu_to_le32(0x80000000); 92876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman rx_ring[i].length = cpu_to_le32(BUFLEN); 92976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman rx_ring[i].buffer1 = virt_to_le32desc(&rxb[i * BUFLEN]); 93076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman rx_ring[i].buffer2 = virt_to_le32desc(&rx_ring[i+1]); 93176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 93276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Mark the last entry as wrapping the ring. */ 93376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman rx_ring[i-1].length = cpu_to_le32(DESC_RING_WRAP | BUFLEN); 93476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman rx_ring[i-1].buffer2 = virt_to_le32desc(&rx_ring[0]); 93576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 93676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* We only use 1 transmit buffer, but we use 2 descriptors so 93776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman transmit engines have somewhere to point to if they feel the need */ 93876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 93976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[0].status = 0x00000000; 94076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[0].buffer1 = virt_to_le32desc(&txb[0]); 94176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[0].buffer2 = virt_to_le32desc(&tx_ring[1]); 94276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 94376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* this descriptor should never get used, since it will never be owned 94476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman by the machine (status will always == 0) */ 94576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[1].status = 0x00000000; 94676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[1].buffer1 = virt_to_le32desc(&txb[0]); 94776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[1].buffer2 = virt_to_le32desc(&tx_ring[0]); 94876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 94976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Mark the last entry as wrapping the ring, though this should never happen */ 95076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[1].length = cpu_to_le32(DESC_RING_WRAP | BUFLEN); 95176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 95276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 95376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 95476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void set_rx_mode(struct nic *nic __unused) { 95576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int csr6 = inl(ioaddr + CSR6) & ~0x00D5; 95676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 95776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 &= ~0x00D5; 95876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 95976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* !IFF_PROMISC */ 96076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 |= AcceptAllMulticast; 96176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr6 |= AcceptAllMulticast; 96276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 96376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr6, ioaddr + CSR6); 96476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 96576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 96676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 96776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 96876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 96976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 97076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* eth_reset - Reset adapter */ 97176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 97276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_reset(struct nic *nic) 97376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 97476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i; 97576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned long to; 97676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 97776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 97876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("tulip_reset\n"); 97976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 98076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 98176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Stop Tx and RX */ 98276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6); 98376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 98476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* On some chip revs we must set the MII/SYM port before the reset!? */ 98576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii)) { 98676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x814C0000, ioaddr + CSR6); 98776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 98876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 98976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */ 99076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000001, ioaddr + CSR0); 99176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tulip_wait(1); 99276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 99376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* turn off reset and set cache align=16lword, burst=unlimit */ 99476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(tp->csr0, ioaddr + CSR0); 99576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 99676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Wait the specified 50 PCI cycles after a reset */ 99776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tulip_wait(1); 99876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 99976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* set up transmit and receive descriptors */ 100076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tulip_init_ring(nic); 100176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 100276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->chip_id == PNIC2) { 100376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 addr_high = (nic->node_addr[1]<<8) + (nic->node_addr[0]<<0); 100476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* This address setting does not appear to impact chip operation?? */ 100576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl((nic->node_addr[5]<<8) + nic->node_addr[4] + 100676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman (nic->node_addr[3]<<24) + (nic->node_addr[2]<<16), 100776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman ioaddr + 0xB0); 100876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(addr_high + (addr_high<<16), ioaddr + 0xB8); 100976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 101076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 101176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* MC_HASH_ONLY boards don't support setup packets */ 101276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->flags & MC_HASH_ONLY) { 101376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 addr_low = cpu_to_le32(get_unaligned((u32 *)nic->node_addr)); 101476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 addr_high = cpu_to_le32(get_unaligned((u16 *)(nic->node_addr+4))); 101576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 101676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* clear multicast hash filters and setup MAC address filters */ 101776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->flags & IS_ASIX) { 101876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0, ioaddr + CSR13); 101976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(addr_low, ioaddr + CSR14); 102076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(1, ioaddr + CSR13); 102176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(addr_high, ioaddr + CSR14); 102276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(2, ioaddr + CSR13); 102376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0, ioaddr + CSR14); 102476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(3, ioaddr + CSR13); 102576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0, ioaddr + CSR14); 102676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (tp->chip_id == COMET) { 102776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(addr_low, ioaddr + 0xA4); 102876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(addr_high, ioaddr + 0xA8); 102976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0, ioaddr + 0xAC); 103076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0, ioaddr + 0xB0); 103176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 103276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else { 103376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* for other boards we send a setup packet to initialize 103476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman the filters */ 103576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 tx_flags = 0x08000000 | 192; 103676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 103776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* construct perfect filter frame with mac address as first match 103876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman and broadcast address for all others */ 103976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i=0; i<192; i++) 104076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman txb[i] = 0xFF; 104176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman txb[0] = nic->node_addr[0]; 104276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman txb[1] = nic->node_addr[1]; 104376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman txb[4] = nic->node_addr[2]; 104476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman txb[5] = nic->node_addr[3]; 104576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman txb[8] = nic->node_addr[4]; 104676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman txb[9] = nic->node_addr[5]; 104776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 104876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[0].length = cpu_to_le32(tx_flags); 104976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[0].buffer1 = virt_to_le32desc(&txb[0]); 105076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[0].status = cpu_to_le32(0x80000000); 105176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 105276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 105376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Point to rx and tx descriptors */ 105476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(virt_to_le32desc(&rx_ring[0]), ioaddr + CSR3); 105576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(virt_to_le32desc(&tx_ring[0]), ioaddr + CSR4); 105676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 105776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman init_media(nic); 105876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 105976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* set the chip's operating mode (but don't turn on xmit and recv yet) */ 106076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl((tp->csr6 & ~0x00002002), ioaddr + CSR6); 106176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 106276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* send setup packet for cards that support it */ 106376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (!(tp->flags & MC_HASH_ONLY)) { 106476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* enable transmit wait for completion */ 106576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(tp->csr6 | 0x00002000, ioaddr + CSR6); 106676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* immediate transmit demand */ 106776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0, ioaddr + CSR1); 106876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 106976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman to = currticks() + TX_TIME_OUT; 107076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman while ((tx_ring[0].status & 0x80000000) && (currticks() < to)) 107176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* wait */ ; 107276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 107376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (currticks() >= to) { 107476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf ("%s: TX Setup Timeout.\n", tp->nic_name); 107576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 107676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 107776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 107876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->chip_id == LC82C168) 107976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tulip_check_duplex(nic); 108076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 108176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman set_rx_mode(nic); 108276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 108376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* enable transmit and receive */ 108476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(tp->csr6 | 0x00002002, ioaddr + CSR6); 108576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 108676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 108776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 108876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 108976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* eth_transmit - Transmit a frame */ 109076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 109176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_transmit(struct nic *nic, const char *d, unsigned int t, 109276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int s, const char *p) 109376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 109476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 nstype; 109576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 to; 109676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 csr6 = inl(ioaddr + CSR6); 109776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 109876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 109976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("tulip_transmit\n"); 110076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 110176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 110276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Disable Tx */ 110376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr6 & ~0x00002000, ioaddr + CSR6); 110476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 110576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman memcpy(txb, d, ETH_ALEN); 110676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman memcpy(txb + ETH_ALEN, nic->node_addr, ETH_ALEN); 110776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nstype = htons((u16) t); 110876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman memcpy(txb + 2 * ETH_ALEN, (u8 *)&nstype, 2); 110976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman memcpy(txb + ETH_HLEN, p, s); 111076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 111176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman s += ETH_HLEN; 111276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman s &= 0x0FFF; 111376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 111476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* pad to minimum packet size */ 111576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman while (s < ETH_ZLEN) 111676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman txb[s++] = '\0'; 111776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 111876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 111976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 112076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: sending %d bytes ethtype %hX\n", tp->nic_name, s, t); 112176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 112276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 112376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* setup the transmit descriptor */ 112476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* 0x60000000 = no interrupt on completion */ 112576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[0].length = cpu_to_le32(0x60000000 | s); 112676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tx_ring[0].status = cpu_to_le32(0x80000000); 112776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 112876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Point to transmit descriptor */ 112976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(virt_to_le32desc(&tx_ring[0]), ioaddr + CSR4); 113076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 113176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Enable Tx */ 113276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr6 | 0x00002000, ioaddr + CSR6); 113376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* immediate transmit demand */ 113476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0, ioaddr + CSR1); 113576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 113676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman to = currticks() + TX_TIME_OUT; 113776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman while ((tx_ring[0].status & 0x80000000) && (currticks() < to)) 113876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* wait */ ; 113976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 114076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (currticks() >= to) { 114176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf ("TX Timeout!\n"); 114276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 114376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 114476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Disable Tx */ 114576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr6 & ~0x00002000, ioaddr + CSR6); 114676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 114776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 114876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 114976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* eth_poll - Wait for a frame */ 115076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 115176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic int tulip_poll(struct nic *nic, int retrieve) 115276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 115376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 115476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 115576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("tulip_poll\n"); 115676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 115776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 115876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* no packet waiting. packet still owned by NIC */ 115976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (rx_ring[tp->cur_rx].status & 0x80000000) 116076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 0; 116176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 116276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ( ! retrieve ) return 1; 116376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 116476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 116576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("tulip_poll got one\n"); 116676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 116776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 116876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nic->packetlen = (rx_ring[tp->cur_rx].status & 0x3FFF0000) >> 16; 116976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 117076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* if we get a corrupted packet. throw it away and move on */ 117176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (rx_ring[tp->cur_rx].status & 0x00008000) { 117276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* return the descriptor and buffer to receive ring */ 117376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman rx_ring[tp->cur_rx].status = 0x80000000; 117476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->cur_rx = (++tp->cur_rx) % RX_RING_SIZE; 117576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 0; 117676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 117776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 117876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* copy packet to working buffer */ 117976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman memcpy(nic->packet, rxb + tp->cur_rx * BUFLEN, nic->packetlen); 118076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 118176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* return the descriptor and buffer to receive ring */ 118276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman rx_ring[tp->cur_rx].status = 0x80000000; 118376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->cur_rx = (++tp->cur_rx) % RX_RING_SIZE; 118476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 118576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 1; 118676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 118776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 118876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 118976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* eth_disable - Disable the interface */ 119076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 119176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_disable ( struct nic *nic ) { 119276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 119376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 119476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("tulip_disable\n"); 119576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 119676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 119776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tulip_reset(nic); 119876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 119976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* disable interrupts */ 120076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000000, ioaddr + CSR7); 120176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 120276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Stop the chip's Tx and Rx processes. */ 120376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6); 120476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 120576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Clear the missed-packet counter. */ 120676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman inl(ioaddr + CSR8); 120776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 120876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 120976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 121076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*IRQ - Enable, Disable, or Force interrupts */ 121176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 121276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void tulip_irq(struct nic *nic __unused, irq_action_t action __unused) 121376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 121476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman switch ( action ) { 121576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case DISABLE : 121676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 121776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case ENABLE : 121876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 121976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case FORCE : 122076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 122176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 122276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 122376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 122476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic struct nic_operations tulip_operations = { 122576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman .connect = dummy_connect, 122676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman .poll = tulip_poll, 122776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman .transmit = tulip_transmit, 122876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman .irq = tulip_irq, 122976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 123076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 123176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 123276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 123376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* eth_probe - Look for an adapter */ 123476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/*********************************************************************/ 123576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic int tulip_probe ( struct nic *nic, struct pci_device *pci ) { 123676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 123776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 i; 123876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u8 chip_rev; 123976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u8 ee_data[EEPROM_SIZE]; 124076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned short sum; 124176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int chip_idx; 124276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman static unsigned char last_phys_addr[ETH_ALEN] = {0x00, 'L', 'i', 'n', 'u', 'x'}; 124376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 124476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (pci->ioaddr == 0) 124576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 0; 124676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 124776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman ioaddr = pci->ioaddr; 124876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nic->ioaddr = pci->ioaddr & ~3; 124976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nic->irqno = 0; 125076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 125176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* point to private storage */ 125276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp = &tulip_bss.tpx; 125376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 125476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->vendor_id = pci->vendor; 125576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->dev_id = pci->device; 125676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name = pci->driver_name; 125776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 125876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = 0; 125976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->default_port = 0; 126076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 126176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman adjust_pci_device(pci); 126276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 126376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* disable interrupts */ 126476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000000, ioaddr + CSR7); 126576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 126676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Stop the chip's Tx and Rx processes. */ 126776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6); 126876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 126976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Clear the missed-packet counter. */ 127076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman inl(ioaddr + CSR8); 127176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 127276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("\n"); /* so we start on a fresh line */ 127376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 127476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("tulip_probe\n"); 127576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 127676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 127776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 127876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 127976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf ("%s: Looking for Tulip Chip: Vendor=%hX Device=%hX\n", tp->nic_name, 128076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->vendor, tp->dev_id); 128176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 128276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 128376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Figure out which chip we're dealing with */ 128476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman i = 0; 128576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman chip_idx = -1; 128676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 128776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman while (pci_id_tbl[i].name) { 128876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ( (((u32) tp->dev_id << 16) | tp->vendor_id) == 128976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman (pci_id_tbl[i].id.pci & pci_id_tbl[i].id.pci_mask) ) { 129076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman chip_idx = pci_id_tbl[i].drv_flags; 129176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 129276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 129376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman i++; 129476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 129576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 129676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (chip_idx == -1) { 129776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf ("%s: Unknown Tulip Chip: Vendor=%hX Device=%hX\n", tp->nic_name, 129876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->vendor_id, tp->dev_id); 129976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 0; 130076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 130176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 130276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->pci_id_idx = i; 130376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->flags = tulip_tbl[chip_idx].flags; 130476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 130576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 130676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) { 130776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf ("%s: tp->pci_id_idx == %d, name == %s\n", tp->nic_name, 130876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->pci_id_idx, pci_id_tbl[tp->pci_id_idx].name); 130976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf ("%s: chip_idx == %d, name == %s\n", tp->nic_name, chip_idx, 131076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tulip_tbl[chip_idx].chip_name); 131176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 131276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 131376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 131476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Bring the 21041/21143 out of sleep mode. 131576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Caution: Snooze mode does not work with some boards! */ 131676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->flags & HAS_PWRDWN) 131776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman pci_write_config_dword(pci, 0x40, 0x00000000); 131876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 131976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (inl(ioaddr + CSR5) == 0xFFFFFFFF) { 132076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: The Tulip chip at %X is not functioning.\n", 132176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, (unsigned int) ioaddr); 132276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 0; 132376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 132476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 132576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman pci_read_config_byte(pci, PCI_REVISION, &chip_rev); 132676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 132776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: [chip: %s] rev %d at %hX\n", tp->nic_name, 132876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tulip_tbl[chip_idx].chip_name, chip_rev, (unsigned int) ioaddr); 132976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Vendor=%hX Device=%hX", tp->nic_name, tp->vendor_id, tp->dev_id); 133076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 133176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (chip_idx == DC21041 && inl(ioaddr + CSR9) & 0x8000) { 133276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf(" 21040 compatible mode."); 133376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman chip_idx = DC21040; 133476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 133576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 133676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("\n"); 133776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 133876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* The SROM/EEPROM interface varies dramatically. */ 133976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman sum = 0; 134076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (chip_idx == DC21040) { 134176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0, ioaddr + CSR9); /* Reset the pointer with a dummy write. */ 134276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < ETH_ALEN; i++) { 134376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int value, boguscnt = 100000; 134476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman do 134576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman value = inl(ioaddr + CSR9); 134676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman while (value < 0 && --boguscnt > 0); 134776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nic->node_addr[i] = value; 134876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman sum += value & 0xff; 134976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 135076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (chip_idx == LC82C168) { 135176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < 3; i++) { 135276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int value, boguscnt = 100000; 135376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x600 | i, ioaddr + 0x98); 135476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman do 135576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman value = inl(ioaddr + CSR9); 135676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman while (value < 0 && --boguscnt > 0); 135776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman put_unaligned(le16_to_cpu(value), ((u16*)nic->node_addr) + i); 135876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman sum += value & 0xffff; 135976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 136076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (chip_idx == COMET) { 136176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* No need to read the EEPROM. */ 136276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman put_unaligned(inl(ioaddr + 0xA4), (u32 *)nic->node_addr); 136376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman put_unaligned(inl(ioaddr + 0xA8), (u16 *)(nic->node_addr + 4)); 136476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < ETH_ALEN; i ++) 136576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman sum += nic->node_addr[i]; 136676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else { 136776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* A serial EEPROM interface, we read now and sort it out later. */ 136876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int sa_offset = 0; 136976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int ee_addr_size = read_eeprom(ioaddr, 0xff, 8) & 0x40000 ? 8 : 6; 137076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 137176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < sizeof(ee_data)/2; i++) 137276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman ((u16 *)ee_data)[i] = 137376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman le16_to_cpu(read_eeprom(ioaddr, i, ee_addr_size)); 137476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 137576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* DEC now has a specification (see Notes) but early board makers 137676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman just put the address in the first EEPROM locations. */ 137776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* This does memcmp(eedata, eedata+16, 8) */ 137876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < 8; i ++) 137976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (ee_data[i] != ee_data[16+i]) 138076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman sa_offset = 20; 138176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (ee_data[0] == 0xff && ee_data[1] == 0xff && ee_data[2] == 0) { 138276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman sa_offset = 2; /* Grrr, damn Matrox boards. */ 138376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 138476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < ETH_ALEN; i ++) { 138576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nic->node_addr[i] = ee_data[i + sa_offset]; 138676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman sum += ee_data[i + sa_offset]; 138776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 138876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 138976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Lite-On boards have the address byte-swapped. */ 139076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ((nic->node_addr[0] == 0xA0 || nic->node_addr[0] == 0xC0) 139176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman && nic->node_addr[1] == 0x00) 139276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < ETH_ALEN; i+=2) { 139376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman char tmp = nic->node_addr[i]; 139476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nic->node_addr[i] = nic->node_addr[i+1]; 139576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nic->node_addr[i+1] = tmp; 139676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 139776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 139876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (sum == 0 || sum == ETH_ALEN*0xff) { 139976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: EEPROM not present!\n", tp->nic_name); 140076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < ETH_ALEN-1; i++) 140176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nic->node_addr[i] = last_phys_addr[i]; 140276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nic->node_addr[i] = last_phys_addr[i] + 1; 140376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 140476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 140576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < ETH_ALEN; i++) 140676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman last_phys_addr[i] = nic->node_addr[i]; 140776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 140876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman DBG ( "%s: %s at ioaddr %hX\n", tp->nic_name, eth_ntoa ( nic->node_addr ), 140976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman (unsigned int) ioaddr ); 141076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 141176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->chip_id = chip_idx; 141276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->revision = chip_rev; 141376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr0 = csr0; 141476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 141576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* BugFixes: The 21143-TD hangs with PCI Write-and-Invalidate cycles. 141676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman And the ASIX must have a burst limit or horrible things happen. */ 141776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (chip_idx == DC21143 && chip_rev == 65) 141876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr0 &= ~0x01000000; 141976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else if (tp->flags & IS_ASIX) 142076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr0 |= 0x2000; 142176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 142276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (media_cap[tp->default_port] & MediaIsMII) { 142376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman static const u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 142476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 0x80, 0x100, 0x200 }; 142576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->mii_advertise = media2advert[tp->default_port - 9]; 142676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */ 142776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 142876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 142976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* This is logically part of the probe routine, but too complex 143076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman to write inline. */ 143176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->flags & HAS_MEDIA_TABLE) { 143276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman memcpy(tp->eeprom, ee_data, sizeof(tp->eeprom)); 143376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman parse_eeprom(nic); 143476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 143576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 143676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman start_link(nic); 143776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 143876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* reset the device and make ready for tx and rx of packets */ 143976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tulip_reset(nic); 144076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nic->nic_op = &tulip_operations; 144176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 144276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* give the board a chance to reset before returning */ 144376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tulip_wait(4*TICKS_PER_SEC); 144476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 144576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 1; 144676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 144776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 144876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void start_link(struct nic *nic) 144976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 145076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i; 145176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 145276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 145376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("start_link\n"); 145476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 145576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 145676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ((tp->flags & ALWAYS_CHECK_MII) || 145776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman (tp->mtable && tp->mtable->has_mii) || 145876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman ( ! tp->mtable && (tp->flags & HAS_MII))) { 145976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int phy, phy_idx; 146076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mtable && tp->mtable->has_mii) { 146176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < tp->mtable->leafcount; i++) 146276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mtable->mleaf[i].media == 11) { 146376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->cur_index = i; 146476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->saved_if_port = tp->if_port; 146576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman select_media(nic, 2); 146676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = tp->saved_if_port; 146776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 146876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 146976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 147076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 147176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Find the connected MII xcvrs. */ 147276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (phy = 0, phy_idx = 0; phy < 32 && phy_idx < sizeof(tp->phys); 147376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman phy++) { 147476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int mii_status = mdio_read(nic, phy, 1); 147576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ((mii_status & 0x8301) == 0x8001 || 147676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman ((mii_status & 0x8000) == 0 && (mii_status & 0x7800) != 0)) { 147776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int mii_reg0 = mdio_read(nic, phy, 0); 147876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int mii_advert = mdio_read(nic, phy, 4); 147976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int to_advert; 148076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 148176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mii_advertise) 148276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman to_advert = tp->mii_advertise; 148376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else if (tp->advertising[phy_idx]) 148476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman to_advert = tp->advertising[phy_idx]; 148576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else /* Leave unchanged. */ 148676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->mii_advertise = to_advert = mii_advert; 148776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 148876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->phys[phy_idx++] = phy; 148976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: MII transceiver %d config %hX status %hX advertising %hX.\n", 149076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, phy, mii_reg0, mii_status, mii_advert); 149176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Fixup for DLink with miswired PHY. */ 149276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (mii_advert != to_advert) { 149376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Advertising %hX on PHY %d previously advertising %hX.\n", 149476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, to_advert, phy, mii_advert); 149576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_write(nic, phy, 4, to_advert); 149676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 149776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Enable autonegotiation: some boards default to off. */ 149876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_write(nic, phy, 0, mii_reg0 | 149976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman (tp->full_duplex ? 0x1100 : 0x1000) | 150076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman (media_cap[tp->default_port]&MediaIs100 ? 0x2000:0)); 150176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 150276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 150376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->mii_cnt = phy_idx; 150476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mtable && tp->mtable->has_mii && phy_idx == 0) { 150576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: ***WARNING***: No MII transceiver found!\n", 150676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name); 150776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->phys[0] = 1; 150876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 150976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 151076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 151176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Reset the xcvr interface and turn on heartbeat. */ 151276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman switch (tp->chip_id) { 151376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case DC21040: 151476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000000, ioaddr + CSR13); 151576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000004, ioaddr + CSR13); 151676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 151776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case DC21041: 151876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* This is nway_start(). */ 151976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->sym_advertise == 0) 152076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->sym_advertise = 0x0061; 152176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000000, ioaddr + CSR13); 152276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0xFFFFFFFF, ioaddr + CSR14); 152376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000008, ioaddr + CSR15); /* Listen on AUI also. */ 152476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(inl(ioaddr + CSR6) | 0x0200, ioaddr + CSR6); 152576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0000EF01, ioaddr + CSR13); 152676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 152776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case DC21140: default: 152876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mtable) 152976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(tp->mtable->csr12dir | 0x100, ioaddr + CSR12); 153076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 153176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case DC21142: 153276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case PNIC2: 153376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mii_cnt || media_cap[tp->if_port] & MediaIsMII) { 153476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x82020000, ioaddr + CSR6); 153576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0000, ioaddr + CSR13); 153676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0000, ioaddr + CSR14); 153776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x820E0000, ioaddr + CSR6); 153876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else 153976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nway_start(nic); 154076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 154176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case LC82C168: 154276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ( ! tp->mii_cnt) { 154376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nway = 1; 154476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nwayset = 0; 154576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00420000, ioaddr + CSR6); 154676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x30, ioaddr + CSR12); 154776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0001F078, ioaddr + 0xB8); 154876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0201F078, ioaddr + 0xB8); /* Turn on autonegotiation. */ 154976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 155076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 155176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case MX98713: case COMPEX9881: 155276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000000, ioaddr + CSR6); 155376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */ 155476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000001, ioaddr + CSR13); 155576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 155676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case MX98715: case MX98725: 155776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x01a80000, ioaddr + CSR6); 155876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0xFFFFFFFF, ioaddr + CSR14); 155976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00001000, ioaddr + CSR12); 156076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 156176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case COMET: 156276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* No initialization necessary. */ 156376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 156476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 156576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 156676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 156776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void nway_start(struct nic *nic __unused) 156876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 156976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int csr14 = ((tp->sym_advertise & 0x0780) << 9) | 157076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman ((tp->sym_advertise&0x0020)<<1) | 0xffbf; 157176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 157276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 157376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("nway_start\n"); 157476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 157576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 157676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = 0; 157776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nway = tp->mediasense = 1; 157876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nwayset = tp->lpar = 0; 157976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->chip_id == PNIC2) { 158076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = 0x01000000 | (tp->sym_advertise & 0x0040 ? 0x0200 : 0); 158176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return; 158276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 158376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 158476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 158576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Restarting internal NWay autonegotiation, %X.\n", 158676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, csr14); 158776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 158876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0001, ioaddr + CSR13); 158976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr14, ioaddr + CSR14); 159076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = 0x82420000 | (tp->sym_advertise & 0x0040 ? 0x0200 : 0); 159176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(tp->csr6, ioaddr + CSR6); 159276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mtable && tp->mtable->csr15dir) { 159376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(tp->mtable->csr15dir, ioaddr + CSR15); 159476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(tp->mtable->csr15val, ioaddr + CSR15); 159576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (tp->chip_id != PNIC2) 159676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outw(0x0008, ioaddr + CSR15); 159776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->chip_id == DC21041) /* Trigger NWAY. */ 159876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0xEF01, ioaddr + CSR12); 159976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else 160076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x1301, ioaddr + CSR12); 160176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 160276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 160376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void init_media(struct nic *nic) 160476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 160576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i; 160676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 160776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 160876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("init_media\n"); 160976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 161076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 161176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->saved_if_port = tp->if_port; 161276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->if_port == 0) 161376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = tp->default_port; 161476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 161576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Allow selecting a default media. */ 161676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman i = 0; 161776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mtable == NULL) 161876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman goto media_picked; 161976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->if_port) { 162076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int looking_for = media_cap[tp->if_port] & MediaIsMII ? 11 : 162176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman (tp->if_port == 12 ? 0 : tp->if_port); 162276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < tp->mtable->leafcount; i++) 162376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mtable->mleaf[i].media == looking_for) { 162476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Using user-specified media %s.\n", 162576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, medianame[tp->if_port]); 162676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman goto media_picked; 162776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 162876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 162976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ((tp->mtable->defaultmedia & 0x0800) == 0) { 163076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int looking_for = tp->mtable->defaultmedia & 15; 163176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < tp->mtable->leafcount; i++) 163276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mtable->mleaf[i].media == looking_for) { 163376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Using EEPROM-set media %s.\n", 163476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, medianame[looking_for]); 163576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman goto media_picked; 163676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 163776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 163876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Start sensing first non-full-duplex media. */ 163976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = tp->mtable->leafcount - 1; 164076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman (media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--) 164176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman ; 164276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman media_picked: 164376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 164476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = 0; 164576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->cur_index = i; 164676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nwayset = 0; 164776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 164876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->if_port) { 164976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->chip_id == DC21143 && media_cap[tp->if_port] & MediaIsMII) { 165076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* We must reset the media CSRs when we force-select MII mode. */ 165176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0000, ioaddr + CSR13); 165276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0000, ioaddr + CSR14); 165376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0008, ioaddr + CSR15); 165476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 165576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman select_media(nic, 1); 165676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return; 165776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 165876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman switch(tp->chip_id) { 165976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case DC21041: 166076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* tp->nway = 1;*/ 166176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nway_start(nic); 166276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 166376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case DC21142: 166476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mii_cnt) { 166576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman select_media(nic, 1); 166676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 166776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 166876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Using MII transceiver %d, status %hX.\n", 166976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, tp->phys[0], mdio_read(nic, tp->phys[0], 1)); 167076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 167176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x82020000, ioaddr + CSR6); 167276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = 0x820E0000; 167376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = 11; 167476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0000, ioaddr + CSR13); 167576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0000, ioaddr + CSR14); 167676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else 167776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nway_start(nic); 167876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 167976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case PNIC2: 168076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman nway_start(nic); 168176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 168276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case LC82C168: 168376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mii_cnt) { 168476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = 11; 168576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0); 168676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0001, ioaddr + CSR15); 168776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (inl(ioaddr + CSR5) & TPLnkPass) 168876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman pnic_do_nway(nic); 168976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else { 169076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Start with 10mbps to do autonegotiation. */ 169176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x32, ioaddr + CSR12); 169276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = 0x00420000; 169376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0001B078, ioaddr + 0xB8); 169476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0201B078, ioaddr + 0xB8); 169576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 169676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 169776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case MX98713: case COMPEX9881: 169876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = 0; 169976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0); 170076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80); 170176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 170276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case MX98715: case MX98725: 170376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Provided by BOLO, Macronix - 12/10/1998. */ 170476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = 0; 170576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = 0x01a80200; 170676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80); 170776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x11000 | inw(ioaddr + 0xa0), ioaddr + 0xa0); 170876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 170976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case COMET: 171076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Enable automatic Tx underrun recovery */ 171176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(inl(ioaddr + 0x88) | 1, ioaddr + 0x88); 171276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = 0; 171376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = 0x00040000; 171476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 171576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case AX88140: case AX88141: 171676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100; 171776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 171876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman default: 171976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman select_media(nic, 1); 172076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 172176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 172276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 172376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void pnic_do_nway(struct nic *nic __unused) 172476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 172576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 phy_reg = inl(ioaddr + 0xB8); 172676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 new_csr6 = tp->csr6 & ~0x40C40200; 172776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 172876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 172976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("pnic_do_nway\n"); 173076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 173176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 173276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (phy_reg & 0x78000000) { /* Ignore baseT4 */ 173376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (phy_reg & 0x20000000) tp->if_port = 5; 173476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else if (phy_reg & 0x40000000) tp->if_port = 3; 173576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else if (phy_reg & 0x10000000) tp->if_port = 4; 173676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else if (phy_reg & 0x08000000) tp->if_port = 0; 173776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nwayset = 1; 173876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = (tp->if_port & 1) ? 0x01860000 : 0x00420000; 173976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x32 | (tp->if_port & 1), ioaddr + CSR12); 174076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->if_port & 1) 174176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x1F868, ioaddr + 0xB8); 174276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (phy_reg & 0x30000000) { 174376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->full_duplex = 1; 174476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 |= 0x00000200; 174576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 174676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 174776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 174876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: PNIC autonegotiated status %X, %s.\n", 174976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, phy_reg, medianame[tp->if_port]); 175076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 175176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->csr6 != new_csr6) { 175276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = new_csr6; 175376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(tp->csr6 | 0x0002, ioaddr + CSR6); /* Restart Tx */ 175476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(tp->csr6 | 0x2002, ioaddr + CSR6); 175576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 175676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 175776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 175876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 175976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Set up the transceiver control registers for the selected media type. */ 176076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic void select_media(struct nic *nic, int startup) 176176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 176276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct mediatable *mtable = tp->mtable; 176376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 new_csr6; 176476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int i; 176576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 176676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG_WHERE 176776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman whereami("select_media\n"); 176876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 176976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 177076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (mtable) { 177176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct medialeaf *mleaf = &mtable->mleaf[tp->cur_index]; 177276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char *p = mleaf->leafdata; 177376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman switch (mleaf->type) { 177476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 0: /* 21140 non-MII xcvr. */ 177576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 177676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 177776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Using a 21140 non-MII transceiver" 177876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman " with control setting %hhX.\n", 177976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, p[1]); 178076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 178176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = p[0]; 178276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (startup) 178376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(mtable->csr12dir | 0x100, ioaddr + CSR12); 178476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(p[1], ioaddr + CSR12); 178576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x02000000 | ((p[2] & 0x71) << 18); 178676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 178776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 2: case 4: { 178876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 setup[5]; 178976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u32 csr13val, csr14val, csr15dir, csr15val; 179076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < 5; i++) 179176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman setup[i] = get_u16(&p[i*2 + 1]); 179276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 179376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = p[0] & 15; 179476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (media_cap[tp->if_port] & MediaAlwaysFD) 179576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->full_duplex = 1; 179676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 179776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (startup && mtable->has_reset) { 179876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset]; 179976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char *rst = rleaf->leafdata; 180076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 180176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 180276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Resetting the transceiver.\n", 180376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name); 180476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 180576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < rst[0]; i++) 180676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15); 180776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 180876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 180976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 181076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: 21143 non-MII %s transceiver control " 181176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "%hX/%hX.\n", 181276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, medianame[tp->if_port], setup[0], setup[1]); 181376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 181476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (p[0] & 0x40) { /* SIA (CSR13-15) setup values are provided. */ 181576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr13val = setup[0]; 181676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr14val = setup[1]; 181776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr15dir = (setup[3]<<16) | setup[2]; 181876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr15val = (setup[4]<<16) | setup[2]; 181976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0, ioaddr + CSR13); 182076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr14val, ioaddr + CSR14); 182176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr15dir, ioaddr + CSR15); /* Direction */ 182276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr15val, ioaddr + CSR15); /* Data */ 182376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr13val, ioaddr + CSR13); 182476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else { 182576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr13val = 1; 182676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr14val = 0x0003FF7F; 182776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr15dir = (setup[0]<<16) | 0x0008; 182876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr15val = (setup[1]<<16) | 0x0008; 182976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->if_port <= 4) 183076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman csr14val = t21142_csr14[tp->if_port]; 183176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (startup) { 183276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0, ioaddr + CSR13); 183376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr14val, ioaddr + CSR14); 183476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 183576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr15dir, ioaddr + CSR15); /* Direction */ 183676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(csr15val, ioaddr + CSR15); /* Data */ 183776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (startup) outl(csr13val, ioaddr + CSR13); 183876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 183976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 184076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 184176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Setting CSR15 to %X/%X.\n", 184276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, csr15dir, csr15val); 184376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 184476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (mleaf->type == 4) 184576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x82020000 | ((setup[2] & 0x71) << 18); 184676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else 184776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x82420000; 184876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 184976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 185076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman case 1: case 3: { 185176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int phy_num = p[0]; 185276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int init_length = p[1]; 185376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 *misc_info; 185476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 185576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = 11; 185676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x020E0000; 185776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (mleaf->type == 3) { /* 21142 */ 185876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 *init_sequence = (u16*)(p+2); 185976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u16 *reset_sequence = &((u16*)(p+3))[init_length]; 186076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int reset_length = p[2 + init_length*2]; 186176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman misc_info = reset_sequence + reset_length; 186276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (startup) 186376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < reset_length; i++) 186476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(get_u16(&reset_sequence[i]) << 16, ioaddr + CSR15); 186576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < init_length; i++) 186676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(get_u16(&init_sequence[i]) << 16, ioaddr + CSR15); 186776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else { 186876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u8 *init_sequence = p + 2; 186976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman u8 *reset_sequence = p + 3 + init_length; 187076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int reset_length = p[2 + init_length]; 187176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman misc_info = (u16*)(reset_sequence + reset_length); 187276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (startup) { 187376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(mtable->csr12dir | 0x100, ioaddr + CSR12); 187476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < reset_length; i++) 187576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(reset_sequence[i], ioaddr + CSR12); 187676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 187776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman for (i = 0; i < init_length; i++) 187876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(init_sequence[i], ioaddr + CSR12); 187976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 188076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->advertising[phy_num] = get_u16(&misc_info[1]) | 1; 188176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (startup < 2) { 188276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mii_advertise == 0) 188376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->mii_advertise = tp->advertising[phy_num]; 188476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 188576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 188676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Advertising %hX on MII %d.\n", 188776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, tp->mii_advertise, tp->phys[phy_num]); 188876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 188976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman mdio_write(nic, tp->phys[phy_num], 4, tp->mii_advertise); 189076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 189176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman break; 189276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 189376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman default: 189476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Invalid media table selection %d.\n", 189576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, mleaf->type); 189676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x020E0000; 189776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 189876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 189976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 190076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Using media type %s, CSR12 is %hhX.\n", 190176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, medianame[tp->if_port], 190276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman inl(ioaddr + CSR12) & 0xff); 190376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 190476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (tp->chip_id == DC21041) { 190576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int port = tp->if_port <= 4 ? tp->if_port : 0; 190676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 190776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 190876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: 21041 using media %s, CSR12 is %hX.\n", 190976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, medianame[port == 3 ? 12: port], 191076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman inl(ioaddr + CSR12)); 191176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 191276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000000, ioaddr + CSR13); /* Reset the serial interface */ 191376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(t21041_csr14[port], ioaddr + CSR14); 191476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(t21041_csr15[port], ioaddr + CSR15); 191576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(t21041_csr13[port], ioaddr + CSR13); 191676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x80020000; 191776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (tp->chip_id == LC82C168) { 191876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (startup && ! tp->medialock) 191976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = tp->mii_cnt ? 11 : 0; 192076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 192176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 192276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: PNIC PHY status is %hX, media %s.\n", 192376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, inl(ioaddr + 0xB8), medianame[tp->if_port]); 192476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 192576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->mii_cnt) { 192676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x810C0000; 192776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0001, ioaddr + CSR15); 192876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0201B07A, ioaddr + 0xB8); 192976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (startup) { 193076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Start with 10mbps to do autonegotiation. */ 193176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x32, ioaddr + CSR12); 193276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x00420000; 193376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0001B078, ioaddr + 0xB8); 193476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0201B078, ioaddr + 0xB8); 193576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (tp->if_port == 3 || tp->if_port == 5) { 193676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x33, ioaddr + CSR12); 193776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x01860000; 193876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Trigger autonegotiation. */ 193976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(startup ? 0x0201F868 : 0x0001F868, ioaddr + 0xB8); 194076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else { 194176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x32, ioaddr + CSR12); 194276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x00420000; 194376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x1F078, ioaddr + 0xB8); 194476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 194576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (tp->chip_id == DC21040) { /* 21040 */ 194676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Turn on the xcvr interface. */ 194776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 194876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int csr12 = inl(ioaddr + CSR12); 194976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 195076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: 21040 media type is %s, CSR12 is %hhX.\n", 195176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, medianame[tp->if_port], csr12); 195276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 195376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (media_cap[tp->if_port] & MediaAlwaysFD) 195476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->full_duplex = 1; 195576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x20000; 195676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Set the full duplux match frame. */ 195776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(FULL_DUPLEX_MAGIC, ioaddr + CSR11); 195876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x00000000, ioaddr + CSR13); /* Reset the serial interface */ 195976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (t21040_csr13[tp->if_port] & 8) { 196076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0705, ioaddr + CSR14); 196176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0006, ioaddr + CSR15); 196276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else { 196376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0xffff, ioaddr + CSR14); 196476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x0000, ioaddr + CSR15); 196576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 196676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman outl(0x8f01 | t21040_csr13[tp->if_port], ioaddr + CSR13); 196776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else { /* Unknown chip type with no media table. */ 196876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->default_port == 0) 196976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->if_port = tp->mii_cnt ? 11 : 3; 197076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (media_cap[tp->if_port] & MediaIsMII) { 197176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x020E0000; 197276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else if (media_cap[tp->if_port] & MediaIsFx) { 197376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x028600000; 197476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } else 197576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = 0x038600000; 197676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 197776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 197876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: No media description table, assuming " 197976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "%s transceiver, CSR12 %hhX.\n", 198076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, medianame[tp->if_port], 198176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman inl(ioaddr + CSR12)); 198276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 198376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 198476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 198576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0); 198676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return; 198776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 198876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 198976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* 199076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Check the MII negotiated duplex and change the CSR6 setting if 199176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman required. 199276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Return 0 if everything is OK. 199376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman Return < 0 if the transceiver is missing or has no link beat. 199476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman*/ 199576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic int tulip_check_duplex(struct nic *nic) 199676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman{ 199776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int bmsr, lpa, negotiated, new_csr6; 199876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 199976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman bmsr = mdio_read(nic, tp->phys[0], 1); 200076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman lpa = mdio_read(nic, tp->phys[0], 5); 200176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 200276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 200376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 200476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: MII status %#x, Link partner report " 200576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "%#x.\n", tp->nic_name, bmsr, lpa); 200676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 200776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 200876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (bmsr == 0xffff) 200976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return -2; 201076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ((bmsr & 4) == 0) { 201176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman int new_bmsr = mdio_read(nic, tp->phys[0], 1); 201276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if ((new_bmsr & 4) == 0) { 201376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 201476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 1) 201576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: No link beat on the MII interface," 201676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman " status %#x.\n", tp->nic_name, 201776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_bmsr); 201876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 201976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return -1; 202076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 202176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 202276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->full_duplex = lpa & 0x140; 202376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 202476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman new_csr6 = tp->csr6; 202576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman negotiated = lpa & tp->advertising[0]; 202676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 202776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if(negotiated & 0x380) new_csr6 &= ~0x400000; 202876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else new_csr6 |= 0x400000; 202976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tp->full_duplex) new_csr6 |= 0x200; 203076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman else new_csr6 &= ~0x200; 203176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 203276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (new_csr6 != tp->csr6) { 203376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->csr6 = new_csr6; 203476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 203576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifdef TULIP_DEBUG 203676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman if (tulip_debug > 0) 203776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman printf("%s: Setting %s-duplex based on MII" 203876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman "#%d link partner capability of %#x.\n", 203976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->nic_name, 204076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->full_duplex ? "full" : "half", 204176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tp->phys[0], lpa); 204276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 204376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 1; 204476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman } 204576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 204676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman return 0; 204776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} 204876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 204976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic struct pci_device_id tulip_nics[] = { 205076d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1011, 0x0002, "dc21040", "Digital Tulip", 0), 205176d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1011, 0x0009, "ds21140", "Digital Tulip Fast", 0), 205276d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1011, 0x0014, "dc21041", "Digital Tulip+", 0), 205376d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1011, 0x0019, "ds21142", "Digital Tulip 21142", 0), 205476d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x10b7, 0x9300, "3csoho100b-tx","3ComSOHO100B-TX", 0), 205576d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x10b9, 0x5261, "ali1563", "ALi 1563 integrated ethernet", 0), 205676d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x10d9, 0x0512, "mx98713", "Macronix MX987x3", 0), 205776d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x10d9, 0x0531, "mx98715", "Macronix MX987x5", 0), 205876d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1113, 0x1217, "mxic-98715", "Macronix MX987x5", 0), 205976d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x11ad, 0xc115, "lc82c115", "LinkSys LNE100TX", 0), 206076d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x11ad, 0x0002, "82c168", "Netgear FA310TX", 0), 206176d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1282, 0x9100, "dm9100", "Davicom 9100", 0), 206276d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1282, 0x9102, "dm9102", "Davicom 9102", 0), 206376d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1282, 0x9009, "dm9009", "Davicom 9009", 0), 206476d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1282, 0x9132, "dm9132", "Davicom 9132", 0), 206576d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1317, 0x0985, "centaur-p", "ADMtek Centaur-P", 0), 206676d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1317, 0x0981, "an981", "ADMtek AN981 Comet", 0), /* ADMTek Centaur-P (stmicro) */ 206776d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1113, 0x1216, "an983", "ADMTek AN983 Comet", 0), 206876d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1317, 0x9511, "an983b", "ADMTek Comet 983b", 0), 206976d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1317, 0x1985, "centaur-c", "ADMTek Centaur-C", 0), 207076d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x8086, 0x0039, "intel21145", "Intel Tulip", 0), 207176d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x125b, 0x1400, "ax88140", "ASIX AX88140", 0), 207276d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x11f6, 0x9881, "rl100tx", "Compex RL100-TX", 0), 207376d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x115d, 0x0003, "xircomtulip", "Xircom Tulip", 0), 207476d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x104a, 0x0981, "tulip-0981", "Tulip 0x104a 0x0981", 0), 207576d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x104a, 0x2774, "SGThomson-STE10100A", "Tulip 0x104a 0x2774", 0), /*Modified by Ramesh Chander*/ 207676d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1113, 0x9511, "tulip-9511", "Tulip 0x1113 0x9511", 0), 207776d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1186, 0x1561, "tulip-1561", "Tulip 0x1186 0x1561", 0), 207876d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1259, 0xa120, "tulip-a120", "Tulip 0x1259 0xa120", 0), 207976d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x13d1, 0xab02, "tulip-ab02", "Tulip 0x13d1 0xab02", 0), 208076d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x13d1, 0xab03, "tulip-ab03", "Tulip 0x13d1 0xab03", 0), 208176d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x13d1, 0xab08, "tulip-ab08", "Tulip 0x13d1 0xab08", 0), 208276d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x14f1, 0x1803, "lanfinity", "Conexant LANfinity", 0), 208376d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1626, 0x8410, "tulip-8410", "Tulip 0x1626 0x8410", 0), 208476d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1737, 0xab08, "tulip-1737-ab08","Tulip 0x1737 0xab08", 0), 208576d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_ROM(0x1737, 0xab09, "tulip-ab09", "Tulip 0x1737 0xab09", 0), 208676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 208776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 208876d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanPCI_DRIVER ( tulip_driver, tulip_nics, PCI_NO_CLASS ); 208976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 209076d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanDRIVER ( "Tulip", nic_driver, pci_driver, tulip_driver, 209176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman tulip_probe, tulip_disable ); 209276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 209376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* 209476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * Local variables: 209576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * c-basic-offset: 8 209676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * c-indent-level: 8 209776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * tab-width: 8 209876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * End: 209976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman */ 2100