cpu-mips.cc revision 3100271588b61cbc1dc472a3f2f105d2eed8497f 
1// Copyright 2010 the V8 project authors. All rights reserved.
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3// modification, are permitted provided that the following conditions are
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5//
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15//
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27
28// CPU specific code for arm independent of OS goes here.
29
30#include <sys/syscall.h>
31#include <unistd.h>
32
33#ifdef __mips
34#include <asm/cachectl.h>
35#endif  // #ifdef __mips
36
37#include "v8.h"
38#include "cpu.h"
39
40namespace v8 {
41namespace internal {
42
43void CPU::Setup() {
44  // Nothing to do.
45}
46
47void CPU::FlushICache(void* start, size_t size) {
48#ifdef __mips
49  int res;
50
51  // See http://www.linux-mips.org/wiki/Cacheflush_Syscall
52  res = syscall(__NR_cacheflush, start, size, ICACHE);
53
54  if (res) {
55    V8_Fatal(__FILE__, __LINE__, "Failed to flush the instruction cache");
56  }
57
58#endif    // #ifdef __mips
59}
60
61
62void CPU::DebugBreak() {
63#ifdef __mips
64  asm volatile("break");
65#endif  // #ifdef __mips
66}
67
68} }  // namespace v8::internal
69
70