host_x86_defs.h revision 58a637b6675d4d68e13d18b75cea7eee2a2a91fe
1c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 2c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/*---------------------------------------------------------------*/ 3752f90673ebbb6b2f55fc5e46606dea371313713sewardj/*--- begin host_x86_defs.h ---*/ 4c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/*---------------------------------------------------------------*/ 5c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 6f8ed9d874a7b8651654591c68c6d431c758d787csewardj/* 7752f90673ebbb6b2f55fc5e46606dea371313713sewardj This file is part of Valgrind, a dynamic binary instrumentation 8752f90673ebbb6b2f55fc5e46606dea371313713sewardj framework. 9f8ed9d874a7b8651654591c68c6d431c758d787csewardj 1025e547391785959e81250091bf76d91ca30ef3bfsewardj Copyright (C) 2004-2012 OpenWorks LLP 11752f90673ebbb6b2f55fc5e46606dea371313713sewardj info@open-works.net 12f8ed9d874a7b8651654591c68c6d431c758d787csewardj 13752f90673ebbb6b2f55fc5e46606dea371313713sewardj This program is free software; you can redistribute it and/or 14752f90673ebbb6b2f55fc5e46606dea371313713sewardj modify it under the terms of the GNU General Public License as 15752f90673ebbb6b2f55fc5e46606dea371313713sewardj published by the Free Software Foundation; either version 2 of the 16752f90673ebbb6b2f55fc5e46606dea371313713sewardj License, or (at your option) any later version. 17f8ed9d874a7b8651654591c68c6d431c758d787csewardj 18752f90673ebbb6b2f55fc5e46606dea371313713sewardj This program is distributed in the hope that it will be useful, but 19752f90673ebbb6b2f55fc5e46606dea371313713sewardj WITHOUT ANY WARRANTY; without even the implied warranty of 20752f90673ebbb6b2f55fc5e46606dea371313713sewardj MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 21752f90673ebbb6b2f55fc5e46606dea371313713sewardj General Public License for more details. 22752f90673ebbb6b2f55fc5e46606dea371313713sewardj 23752f90673ebbb6b2f55fc5e46606dea371313713sewardj You should have received a copy of the GNU General Public License 24752f90673ebbb6b2f55fc5e46606dea371313713sewardj along with this program; if not, write to the Free Software 25752f90673ebbb6b2f55fc5e46606dea371313713sewardj Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 267bd6ffe203f3aa9e7b25f7eae40a9b9cf48710cfsewardj 02110-1301, USA. 277bd6ffe203f3aa9e7b25f7eae40a9b9cf48710cfsewardj 28752f90673ebbb6b2f55fc5e46606dea371313713sewardj The GNU General Public License is contained in the file COPYING. 29f8ed9d874a7b8651654591c68c6d431c758d787csewardj 30f8ed9d874a7b8651654591c68c6d431c758d787csewardj Neither the names of the U.S. Department of Energy nor the 31f8ed9d874a7b8651654591c68c6d431c758d787csewardj University of California nor the names of its contributors may be 32f8ed9d874a7b8651654591c68c6d431c758d787csewardj used to endorse or promote products derived from this software 33f8ed9d874a7b8651654591c68c6d431c758d787csewardj without prior written permission. 34f8ed9d874a7b8651654591c68c6d431c758d787csewardj*/ 35f8ed9d874a7b8651654591c68c6d431c758d787csewardj 36cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj#ifndef __VEX_HOST_X86_DEFS_H 37cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj#define __VEX_HOST_X86_DEFS_H 38c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 3958a637b6675d4d68e13d18b75cea7eee2a2a91feflorian#include "libvex_basictypes.h" 4058a637b6675d4d68e13d18b75cea7eee2a2a91feflorian#include "libvex.h" // VexArch 4158a637b6675d4d68e13d18b75cea7eee2a2a91feflorian#include "host_generic_regs.h" // HReg 42c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 43c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/* --------- Registers. --------- */ 44c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 45c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/* The usual HReg abstraction. There are 8 real int regs, 46c0250e4690e4d48d20f3379396dc30ce0ee4d98fsewardj 6 real float regs, and 8 real vector regs. 47c97096c44637ae5775ed305b19f16f0b505f17d8sewardj*/ 48c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 4935421a3cfd43bc829d27ee15bd34bbc7cb690805sewardjextern void ppHRegX86 ( HReg ); 50c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 5153f85a90d36368f5d045d0a5590054fe741dc042sewardjextern HReg hregX86_EAX ( void ); 522cd80dc9ea9dc0f30a2b2671125bbd2dc8fed85esewardjextern HReg hregX86_EBX ( void ); 5353f85a90d36368f5d045d0a5590054fe741dc042sewardjextern HReg hregX86_ECX ( void ); 542cd80dc9ea9dc0f30a2b2671125bbd2dc8fed85esewardjextern HReg hregX86_EDX ( void ); 55f13a16a82132fa2358899c7683193effecf9a56fsewardjextern HReg hregX86_ESP ( void ); 5653f85a90d36368f5d045d0a5590054fe741dc042sewardjextern HReg hregX86_EBP ( void ); 57f13a16a82132fa2358899c7683193effecf9a56fsewardjextern HReg hregX86_ESI ( void ); 58887a11a609f3e61d2ae8fe4e67f176207715da7esewardjextern HReg hregX86_EDI ( void ); 5953f85a90d36368f5d045d0a5590054fe741dc042sewardj 6070dff0c04b82b217ce16d4a96a7e8a5dd1a52108sewardjextern HReg hregX86_FAKE0 ( void ); 6170dff0c04b82b217ce16d4a96a7e8a5dd1a52108sewardjextern HReg hregX86_FAKE1 ( void ); 6270dff0c04b82b217ce16d4a96a7e8a5dd1a52108sewardjextern HReg hregX86_FAKE2 ( void ); 6370dff0c04b82b217ce16d4a96a7e8a5dd1a52108sewardjextern HReg hregX86_FAKE3 ( void ); 6470dff0c04b82b217ce16d4a96a7e8a5dd1a52108sewardjextern HReg hregX86_FAKE4 ( void ); 6570dff0c04b82b217ce16d4a96a7e8a5dd1a52108sewardjextern HReg hregX86_FAKE5 ( void ); 6670dff0c04b82b217ce16d4a96a7e8a5dd1a52108sewardj 67d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HReg hregX86_XMM0 ( void ); 68d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HReg hregX86_XMM1 ( void ); 69d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HReg hregX86_XMM2 ( void ); 70d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HReg hregX86_XMM3 ( void ); 71d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HReg hregX86_XMM4 ( void ); 72d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HReg hregX86_XMM5 ( void ); 73d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HReg hregX86_XMM6 ( void ); 74d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HReg hregX86_XMM7 ( void ); 75d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 76c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 77443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj/* --------- Condition codes, Intel encoding. --------- */ 78443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 79443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardjtypedef 80443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj enum { 81443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_O = 0, /* overflow */ 82443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NO = 1, /* no overflow */ 83443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 84443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_B = 2, /* below */ 85443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NB = 3, /* not below */ 86443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 87443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_Z = 4, /* zero */ 88443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NZ = 5, /* not zero */ 89443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 90443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_BE = 6, /* below or equal */ 91443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NBE = 7, /* not below or equal */ 92443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 93443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_S = 8, /* negative */ 94443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NS = 9, /* not negative */ 95443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 96443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_P = 10, /* parity even */ 97443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NP = 11, /* not parity even */ 98443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 99443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_L = 12, /* jump less */ 100443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NL = 13, /* not less */ 101443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 102443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_LE = 14, /* less or equal */ 103443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NLE = 15, /* not less or equal */ 104443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 105443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_ALWAYS = 16 /* the usual hack */ 106443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj } 107443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj X86CondCode; 108443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 109810dcf0bb3ba08c64a8af14536edb6469274c413sewardjextern HChar* showX86CondCode ( X86CondCode ); 110443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 111443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 112c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/* --------- Memory address expressions (amodes). --------- */ 113c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 114c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 115c97096c44637ae5775ed305b19f16f0b505f17d8sewardj enum { 11666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xam_IR, /* Immediate + Reg */ 11766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xam_IRRS /* Immediate + Reg1 + (Reg2 << Shift) */ 118c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 119c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86AModeTag; 120c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 121c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 122c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 123c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86AModeTag tag; 124c97096c44637ae5775ed305b19f16f0b505f17d8sewardj union { 125c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 126c97096c44637ae5775ed305b19f16f0b505f17d8sewardj UInt imm; 127c97096c44637ae5775ed305b19f16f0b505f17d8sewardj HReg reg; 128c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } IR; 129c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 130c97096c44637ae5775ed305b19f16f0b505f17d8sewardj UInt imm; 131c97096c44637ae5775ed305b19f16f0b505f17d8sewardj HReg base; 132c97096c44637ae5775ed305b19f16f0b505f17d8sewardj HReg index; 133c97096c44637ae5775ed305b19f16f0b505f17d8sewardj Int shift; /* 0, 1, 2 or 3 only */ 134c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } IRRS; 135c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } Xam; 136c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 137c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86AMode; 138c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 139c97096c44637ae5775ed305b19f16f0b505f17d8sewardjextern X86AMode* X86AMode_IR ( UInt, HReg ); 140c97096c44637ae5775ed305b19f16f0b505f17d8sewardjextern X86AMode* X86AMode_IRRS ( UInt, HReg, HReg, Int ); 141c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 142218e29f7dcb587332f9aacdc338762c7388f5f9bsewardjextern X86AMode* dopyX86AMode ( X86AMode* ); 143218e29f7dcb587332f9aacdc338762c7388f5f9bsewardj 14435421a3cfd43bc829d27ee15bd34bbc7cb690805sewardjextern void ppX86AMode ( X86AMode* ); 145c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 146c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 14766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- Operand, which can be reg, immediate or memory. --------- */ 148c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 149c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 150c97096c44637ae5775ed305b19f16f0b505f17d8sewardj enum { 15166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrmi_Imm, 15266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrmi_Reg, 15366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrmi_Mem 154c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 15566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMITag; 156c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 157c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 158c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 15966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMITag tag; 160c97096c44637ae5775ed305b19f16f0b505f17d8sewardj union { 161c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 162c97096c44637ae5775ed305b19f16f0b505f17d8sewardj UInt imm32; 163c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } Imm; 164c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 165c97096c44637ae5775ed305b19f16f0b505f17d8sewardj HReg reg; 166c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } Reg; 167c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 168c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86AMode* am; 169c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } Mem; 170c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 17166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrmi; 172c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 17366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMI; 174c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 17566f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RMI* X86RMI_Imm ( UInt ); 17666f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RMI* X86RMI_Reg ( HReg ); 17766f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RMI* X86RMI_Mem ( X86AMode* ); 178c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 17935421a3cfd43bc829d27ee15bd34bbc7cb690805sewardjextern void ppX86RMI ( X86RMI* ); 18066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 18166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 18266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- Operand, which can be reg or immediate only. --------- */ 18366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 18466f2f79812f39ed7cdeedd11d1d40711f3999106sewardjtypedef 18566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj enum { 18666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xri_Imm, 18766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xri_Reg 18866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 18966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RITag; 19066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 19166f2f79812f39ed7cdeedd11d1d40711f3999106sewardjtypedef 19266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 19366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RITag tag; 19466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj union { 19566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 19666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj UInt imm32; 19766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Imm; 19866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 19966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj HReg reg; 20066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Reg; 20166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 20266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xri; 20366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 20466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RI; 20566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 20666f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RI* X86RI_Imm ( UInt ); 20766f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RI* X86RI_Reg ( HReg ); 20866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 20935421a3cfd43bc829d27ee15bd34bbc7cb690805sewardjextern void ppX86RI ( X86RI* ); 21066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 21166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 21266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- Operand, which can be reg or memory only. --------- */ 21366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 21466f2f79812f39ed7cdeedd11d1d40711f3999106sewardjtypedef 21566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj enum { 21666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrm_Reg, 21766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrm_Mem 21866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 21966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMTag; 22066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 22166f2f79812f39ed7cdeedd11d1d40711f3999106sewardjtypedef 22266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 22366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMTag tag; 22466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj union { 22566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 22666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj HReg reg; 22766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Reg; 22866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 22966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86AMode* am; 23066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Mem; 23166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 23266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrm; 23366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 23466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RM; 23566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 23666f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RM* X86RM_Reg ( HReg ); 23766f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RM* X86RM_Mem ( X86AMode* ); 23866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 23935421a3cfd43bc829d27ee15bd34bbc7cb690805sewardjextern void ppX86RM ( X86RM* ); 240c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 241c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 242c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/* --------- Instructions. --------- */ 243c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 24466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- */ 24560f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardjtypedef 24660f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj enum { 247358b7d4fb879c7676c12cf09b91e5e1711fd4800sewardj Xun_NEG, 248358b7d4fb879c7676c12cf09b91e5e1711fd4800sewardj Xun_NOT 24960f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj } 25060f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj X86UnaryOp; 25160f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj 252d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HChar* showX86UnaryOp ( X86UnaryOp ); 25360f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj 25460f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj 25560f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj/* --------- */ 256c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 257e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj enum { 258e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj Xalu_INVALID, 25966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xalu_MOV, 2604042c7efbf90e46d98a0c868c02e1394fd701467sewardj Xalu_CMP, 26166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xalu_ADD, Xalu_SUB, Xalu_ADC, Xalu_SBB, 26260f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj Xalu_AND, Xalu_OR, Xalu_XOR, 26360f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj Xalu_MUL 26466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 265c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86AluOp; 266c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 267d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HChar* showX86AluOp ( X86AluOp ); 268c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 269c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 27066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- */ 27166f2f79812f39ed7cdeedd11d1d40711f3999106sewardjtypedef 27266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj enum { 273e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj Xsh_INVALID, 274df53045492d69220144c1cf2448eca92d71acf55sewardj Xsh_SHL, Xsh_SHR, Xsh_SAR 27566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 27666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86ShiftOp; 27766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 278d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HChar* showX86ShiftOp ( X86ShiftOp ); 27966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 28066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 28166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- */ 282c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 283c97096c44637ae5775ed305b19f16f0b505f17d8sewardj enum { 284bb53f8ccc58873ffe18bef04ba2a8d24fdc244b9sewardj Xfp_INVALID, 285bb53f8ccc58873ffe18bef04ba2a8d24fdc244b9sewardj /* Binary */ 28646de4076882d6a44ff0f76bd8b70c3d89b050293sewardj Xfp_ADD, Xfp_SUB, Xfp_MUL, Xfp_DIV, 287442d0be1e8050056c3f50a8c0f9e74ed1d522c84sewardj Xfp_SCALE, Xfp_ATAN, Xfp_YL2X, Xfp_YL2XP1, Xfp_PREM, Xfp_PREM1, 288bb53f8ccc58873ffe18bef04ba2a8d24fdc244b9sewardj /* Unary */ 28999016a7b2d31c50a02b4a3ae8c7b0cf4de2c22cfsewardj Xfp_SQRT, Xfp_ABS, Xfp_NEG, Xfp_MOV, Xfp_SIN, Xfp_COS, Xfp_TAN, 29006c32a0f13e91af2947dd01ebd4b81c01a64b15bsewardj Xfp_ROUND, Xfp_2XM1 291d1725d18b61bf7912a9099686179faef5815dba1sewardj } 292d1725d18b61bf7912a9099686179faef5815dba1sewardj X86FpOp; 293d1725d18b61bf7912a9099686179faef5815dba1sewardj 294d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HChar* showX86FpOp ( X86FpOp ); 295d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 296d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 297d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj/* --------- */ 298d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjtypedef 299d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj enum { 300d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj Xsse_INVALID, 301164f9275c465cd09ecd09276b8542282f5def250sewardj /* mov */ 302164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MOV, 303164f9275c465cd09ecd09276b8542282f5def250sewardj /* Floating point binary */ 304176a59c6eec21f8a0e8dbafdf85bb9af8109b0c6sewardj Xsse_ADDF, Xsse_SUBF, Xsse_MULF, Xsse_DIVF, 305176a59c6eec21f8a0e8dbafdf85bb9af8109b0c6sewardj Xsse_MAXF, Xsse_MINF, 306164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_CMPEQF, Xsse_CMPLTF, Xsse_CMPLEF, Xsse_CMPUNF, 307164f9275c465cd09ecd09276b8542282f5def250sewardj /* Floating point unary */ 308c1e7dfc9370ee70f7e9f52294c764d4233619927sewardj Xsse_RCPF, Xsse_RSQRTF, Xsse_SQRTF, 309164f9275c465cd09ecd09276b8542282f5def250sewardj /* Bitwise */ 310164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_AND, Xsse_OR, Xsse_XOR, Xsse_ANDN, 311164f9275c465cd09ecd09276b8542282f5def250sewardj /* Integer binary */ 312164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_ADD8, Xsse_ADD16, Xsse_ADD32, Xsse_ADD64, 313164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_QADD8U, Xsse_QADD16U, 314164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_QADD8S, Xsse_QADD16S, 315164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_SUB8, Xsse_SUB16, Xsse_SUB32, Xsse_SUB64, 316164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_QSUB8U, Xsse_QSUB16U, 317164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_QSUB8S, Xsse_QSUB16S, 318164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MUL16, 319164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MULHI16U, 320164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MULHI16S, 321164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_AVG8U, Xsse_AVG16U, 322164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MAX16S, 323164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MAX8U, 324164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MIN16S, 325164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MIN8U, 326164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_CMPEQ8, Xsse_CMPEQ16, Xsse_CMPEQ32, 327164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_CMPGT8S, Xsse_CMPGT16S, Xsse_CMPGT32S, 328164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_SHL16, Xsse_SHL32, Xsse_SHL64, 329164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_SHR16, Xsse_SHR32, Xsse_SHR64, 330164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_SAR16, Xsse_SAR32, 3319e20359bb34d2354a0726dde2b307e5d752a8ae6sewardj Xsse_PACKSSD, Xsse_PACKSSW, Xsse_PACKUSW, 3329e20359bb34d2354a0726dde2b307e5d752a8ae6sewardj Xsse_UNPCKHB, Xsse_UNPCKHW, Xsse_UNPCKHD, Xsse_UNPCKHQ, 3339e20359bb34d2354a0726dde2b307e5d752a8ae6sewardj Xsse_UNPCKLB, Xsse_UNPCKLW, Xsse_UNPCKLD, Xsse_UNPCKLQ 334d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj } 335d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj X86SseOp; 336d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 337d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern HChar* showX86SseOp ( X86SseOp ); 338d1725d18b61bf7912a9099686179faef5815dba1sewardj 339d1725d18b61bf7912a9099686179faef5815dba1sewardj 340d1725d18b61bf7912a9099686179faef5815dba1sewardj/* --------- */ 341d1725d18b61bf7912a9099686179faef5815dba1sewardjtypedef 342d1725d18b61bf7912a9099686179faef5815dba1sewardj enum { 34366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xin_Alu32R, /* 32-bit mov/arith/logical, dst=REG */ 34466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xin_Alu32M, /* 32-bit mov/arith/logical, dst=MEM */ 345eba63f874c83e0d2c9306574cddecd8de129095esewardj Xin_Sh32, /* 32-bit shift/rotate, dst=REG */ 346fb7373aee5e8a3039f2916ecf09870f3ec0c1805sewardj Xin_Test32, /* 32-bit test of REG or MEM against imm32 (AND, set 347eba63f874c83e0d2c9306574cddecd8de129095esewardj flags, discard result) */ 34860f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj Xin_Unary32, /* 32-bit not and neg */ 34979e04f8266ba458784fa8b8abd57a571c5984f53sewardj Xin_Lea32, /* 32-bit compute EA into a reg */ 350eba63f874c83e0d2c9306574cddecd8de129095esewardj Xin_MulL, /* 32 x 32 -> 64 multiply */ 351eba63f874c83e0d2c9306574cddecd8de129095esewardj Xin_Div, /* 64/32 -> (32,32) div and mod */ 3525c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj Xin_Sh3232, /* shldl or shrdl */ 353e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj Xin_Push, /* push (32-bit?) value on stack */ 354e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj Xin_Call, /* call to address in register */ 355c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_XDirect, /* direct transfer to GA */ 356c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_XIndir, /* indirect transfer to GA */ 357c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_XAssisted, /* assisted transfer to GA */ 3585c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj Xin_CMov32, /* conditional move */ 359443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xin_LoadEX, /* mov{s,z}{b,w}l from mem to reg */ 360d1725d18b61bf7912a9099686179faef5815dba1sewardj Xin_Store, /* store 16/8 bit value in memory */ 361d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj Xin_Set32, /* convert condition code to 32-bit value */ 362ce646f23d71ac432c340667387aa4a5ce7d18099sewardj Xin_Bsfr32, /* 32-bit bsf/bsr */ 3633e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj Xin_MFence, /* mem fence (not just sse2, but sse0 and 1 too) */ 364e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj Xin_ACAS, /* 8/16/32-bit lock;cmpxchg */ 365e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj Xin_DACAS, /* lock;cmpxchg8b (doubleword ACAS, 2 x 32-bit only) */ 366d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 367d1725d18b61bf7912a9099686179faef5815dba1sewardj Xin_FpUnary, /* FP fake unary op */ 368d1725d18b61bf7912a9099686179faef5815dba1sewardj Xin_FpBinary, /* FP fake binary op */ 369d1725d18b61bf7912a9099686179faef5815dba1sewardj Xin_FpLdSt, /* FP fake load/store */ 37089cd09353a584000edaaa61558b27253bdea7452sewardj Xin_FpLdStI, /* FP fake load/store, converting to/from Int */ 3713bca906f6e715c544eb49c278bedef093c14c0d7sewardj Xin_Fp64to32, /* FP round IEEE754 double to IEEE754 single */ 372b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj Xin_FpCMov, /* FP fake floating point conditional move */ 373eba63f874c83e0d2c9306574cddecd8de129095esewardj Xin_FpLdCW, /* fldcw */ 37446de4076882d6a44ff0f76bd8b70c3d89b050293sewardj Xin_FpStSW_AX, /* fstsw %ax */ 375d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj Xin_FpCmp, /* FP compare, generating a C320 value into int reg */ 376d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 3771e6ad745ebafd0524da1da27a4b85524fa84f777sewardj Xin_SseConst, /* Generate restricted SSE literal */ 378d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj Xin_SseLdSt, /* SSE load/store, no alignment constraints */ 379129b3d9da92af2ad2c58ffacb977aa5766211f08sewardj Xin_SseLdzLO, /* SSE load low 32/64 bits, zero remainder of reg */ 380d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj Xin_Sse32Fx4, /* SSE binary, 32Fx4 */ 381636ad762e49597ef608323f27c7b8eb66962cd90sewardj Xin_Sse32FLo, /* SSE binary, 32F in lowest lane only */ 382636ad762e49597ef608323f27c7b8eb66962cd90sewardj Xin_Sse64Fx2, /* SSE binary, 64Fx2 */ 383164f9275c465cd09ecd09276b8542282f5def250sewardj Xin_Sse64FLo, /* SSE binary, 64F in lowest lane only */ 384b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj Xin_SseReRg, /* SSE binary general reg-reg, Re, Rg */ 385109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj Xin_SseCMov, /* SSE conditional move */ 386c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_SseShuf, /* SSE2 shuffle (pshufd) */ 387c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_EvCheck, /* Event check */ 388c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_ProfInc /* 64-bit profile counter increment */ 389c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 390c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86InstrTag; 391c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 392d1725d18b61bf7912a9099686179faef5815dba1sewardj/* Destinations are on the RIGHT (second operand) */ 393c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 394c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 395c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 396c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86InstrTag tag; 397c97096c44637ae5775ed305b19f16f0b505f17d8sewardj union { 398c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 39966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86AluOp op; 40066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMI* src; 40166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj HReg dst; 40266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Alu32R; 403c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 40466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86AluOp op; 40566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RI* src; 40666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86AMode* dst; 40766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Alu32M; 408e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj struct { 409e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj X86ShiftOp op; 410eba63f874c83e0d2c9306574cddecd8de129095esewardj UInt src; /* shift amount, or 0 means %cl */ 411eba63f874c83e0d2c9306574cddecd8de129095esewardj HReg dst; 412e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj } Sh32; 413e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj struct { 414fb7373aee5e8a3039f2916ecf09870f3ec0c1805sewardj UInt imm32; 415fb7373aee5e8a3039f2916ecf09870f3ec0c1805sewardj X86RM* dst; /* not written, only read */ 416e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj } Test32; 41760f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj /* Not and Neg */ 418c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 41960f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj X86UnaryOp op; 420eba63f874c83e0d2c9306574cddecd8de129095esewardj HReg dst; 42160f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj } Unary32; 42279e04f8266ba458784fa8b8abd57a571c5984f53sewardj /* 32-bit compute EA into a reg */ 42379e04f8266ba458784fa8b8abd57a571c5984f53sewardj struct { 42479e04f8266ba458784fa8b8abd57a571c5984f53sewardj X86AMode* am; 42579e04f8266ba458784fa8b8abd57a571c5984f53sewardj HReg dst; 42679e04f8266ba458784fa8b8abd57a571c5984f53sewardj } Lea32; 427eba63f874c83e0d2c9306574cddecd8de129095esewardj /* EDX:EAX = EAX *s/u r/m32 */ 42860f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj struct { 429eba63f874c83e0d2c9306574cddecd8de129095esewardj Bool syned; 430eba63f874c83e0d2c9306574cddecd8de129095esewardj X86RM* src; 43160f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj } MulL; 4321f40a0a104034009e253675288ebefdcccf30da8sewardj /* x86 div/idiv instruction. Modifies EDX and EAX and reads src. */ 4335c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj struct { 434eba63f874c83e0d2c9306574cddecd8de129095esewardj Bool syned; 435eba63f874c83e0d2c9306574cddecd8de129095esewardj X86RM* src; 4365c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj } Div; 4375c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj /* shld/shrd. op may only be Xsh_SHL or Xsh_SHR */ 4385c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj struct { 4395c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj X86ShiftOp op; 440e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj UInt amt; /* shift amount, or 0 means %cl */ 441e5f384c12c014ed9e67a92f52fab18e6ac530412sewardj HReg src; 442e5f384c12c014ed9e67a92f52fab18e6ac530412sewardj HReg dst; 4435c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj } Sh3232; 444e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj struct { 445e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj X86RMI* src; 446e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj } Push; 4474b861de5057856808ec69590f0f0f7c301493272sewardj /* Pseudo-insn. Call target (an absolute address), on given 4484b861de5057856808ec69590f0f0f7c301493272sewardj condition (which could be Xcc_ALWAYS). */ 449e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj struct { 4504b861de5057856808ec69590f0f0f7c301493272sewardj X86CondCode cond; 4514b861de5057856808ec69590f0f0f7c301493272sewardj Addr32 target; 4524b861de5057856808ec69590f0f0f7c301493272sewardj Int regparms; /* 0 .. 3 */ 453e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj } Call; 454c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* Update the guest EIP value, then exit requesting to chain 455c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj to it. May be conditional. Urr, use of Addr32 implicitly 456c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj assumes that wordsize(guest) == wordsize(host). */ 457c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 458c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Addr32 dstGA; /* next guest address */ 459c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amEIP; /* amode in guest state for EIP */ 460c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond; /* can be Xcc_ALWAYS */ 461c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool toFastEP; /* chain to the slow or fast point? */ 462c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } XDirect; 463c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* Boring transfer to a guest address not known at JIT time. 464c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Not chainable. May be conditional. */ 465c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 466c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj HReg dstGA; 467c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amEIP; 468c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond; /* can be Xcc_ALWAYS */ 469c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } XIndir; 470c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* Assisted transfer to a guest address, most general case. 471c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Not chainable. May be conditional. */ 472c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 473c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj HReg dstGA; 474c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amEIP; 475c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond; /* can be Xcc_ALWAYS */ 476750f407b6be1aac303964a219acf0a6de8b8c4dasewardj IRJumpKind jk; 477c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } XAssisted; 4785c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj /* Mov src to dst on the given condition, which may not 4795c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj be the bogus Xcc_ALWAYS. */ 4804042c7efbf90e46d98a0c868c02e1394fd701467sewardj struct { 4815c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj X86CondCode cond; 482e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj X86RM* src; 483e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj HReg dst; 4845c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj } CMov32; 4854042c7efbf90e46d98a0c868c02e1394fd701467sewardj /* Sign/Zero extending loads. Dst size is always 32 bits. */ 4864042c7efbf90e46d98a0c868c02e1394fd701467sewardj struct { 4874042c7efbf90e46d98a0c868c02e1394fd701467sewardj UChar szSmall; 4884042c7efbf90e46d98a0c868c02e1394fd701467sewardj Bool syned; 4894042c7efbf90e46d98a0c868c02e1394fd701467sewardj X86AMode* src; 4904042c7efbf90e46d98a0c868c02e1394fd701467sewardj HReg dst; 4914042c7efbf90e46d98a0c868c02e1394fd701467sewardj } LoadEX; 492443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj /* 16/8 bit stores, which are troublesome (particularly 493443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 8-bit) */ 494443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj struct { 495e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj UChar sz; /* only 1 or 2 */ 496e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj HReg src; 497443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj X86AMode* dst; 498443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj } Store; 499d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj /* Convert a x86 condition code to a 32-bit value (0 or 1). */ 500d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj struct { 501d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj X86CondCode cond; 502d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj HReg dst; 503d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj } Set32; 504ce646f23d71ac432c340667387aa4a5ce7d18099sewardj /* 32-bit bsf or bsr. */ 505ce646f23d71ac432c340667387aa4a5ce7d18099sewardj struct { 506ce646f23d71ac432c340667387aa4a5ce7d18099sewardj Bool isFwds; 507ce646f23d71ac432c340667387aa4a5ce7d18099sewardj HReg src; 508ce646f23d71ac432c340667387aa4a5ce7d18099sewardj HReg dst; 509ce646f23d71ac432c340667387aa4a5ce7d18099sewardj } Bsfr32; 5103e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj /* Mem fence (not just sse2, but sse0 and 1 too). In short, 5113e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj an insn which flushes all preceding loads and stores as 5123e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj much as possible before continuing. On SSE2 we emit a 5133e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj real "mfence", on SSE1 "sfence ; lock addl $0,0(%esp)" and 5143e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj on SSE0 "lock addl $0,0(%esp)". This insn therefore 5155117ce116f47141cb23d1b49cc826e19323add97sewardj carries the host's hwcaps so the assembler knows what to 5163e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj emit. */ 5173e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj struct { 5185117ce116f47141cb23d1b49cc826e19323add97sewardj UInt hwcaps; 5193e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj } MFence; 520e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj /* "lock;cmpxchg": mem address in .addr, 521e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj expected value in %eax, new value in %ebx */ 522e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj struct { 523e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj X86AMode* addr; 524e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj UChar sz; /* 1, 2 or 4 */ 525e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj } ACAS; 526e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj /* "lock;cmpxchg8b": mem address in .addr, expected value in 527e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj %edx:%eax, new value in %ecx:%ebx */ 528e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj struct { 529e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj X86AMode* addr; 530e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj } DACAS; 531d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 532d1725d18b61bf7912a9099686179faef5815dba1sewardj /* X86 Floating point (fake 3-operand, "flat reg file" insns) */ 533d1725d18b61bf7912a9099686179faef5815dba1sewardj struct { 534d1725d18b61bf7912a9099686179faef5815dba1sewardj X86FpOp op; 535d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg src; 536d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg dst; 537d1725d18b61bf7912a9099686179faef5815dba1sewardj } FpUnary; 538d1725d18b61bf7912a9099686179faef5815dba1sewardj struct { 539d1725d18b61bf7912a9099686179faef5815dba1sewardj X86FpOp op; 540d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg srcL; 541d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg srcR; 542d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg dst; 543d1725d18b61bf7912a9099686179faef5815dba1sewardj } FpBinary; 544d1725d18b61bf7912a9099686179faef5815dba1sewardj struct { 545d1725d18b61bf7912a9099686179faef5815dba1sewardj Bool isLoad; 546d1725d18b61bf7912a9099686179faef5815dba1sewardj UChar sz; /* only 4 (IEEE single) or 8 (IEEE double) */ 547d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg reg; 548d1725d18b61bf7912a9099686179faef5815dba1sewardj X86AMode* addr; 549d1725d18b61bf7912a9099686179faef5815dba1sewardj } FpLdSt; 55089cd09353a584000edaaa61558b27253bdea7452sewardj /* Move 64-bit float to/from memory, converting to/from 5513bca906f6e715c544eb49c278bedef093c14c0d7sewardj signed int on the way. Note the conversions will observe 5523bca906f6e715c544eb49c278bedef093c14c0d7sewardj the host FPU rounding mode currently in force. */ 553d1725d18b61bf7912a9099686179faef5815dba1sewardj struct { 55489cd09353a584000edaaa61558b27253bdea7452sewardj Bool isLoad; 55589cd09353a584000edaaa61558b27253bdea7452sewardj UChar sz; /* only 2, 4 or 8 */ 55689cd09353a584000edaaa61558b27253bdea7452sewardj HReg reg; 55789cd09353a584000edaaa61558b27253bdea7452sewardj X86AMode* addr; 55889cd09353a584000edaaa61558b27253bdea7452sewardj } FpLdStI; 5593bca906f6e715c544eb49c278bedef093c14c0d7sewardj /* By observing the current FPU rounding mode, round (etc) 5603bca906f6e715c544eb49c278bedef093c14c0d7sewardj src into dst given that dst should be interpreted as an 5613bca906f6e715c544eb49c278bedef093c14c0d7sewardj IEEE754 32-bit (float) type. */ 5623bca906f6e715c544eb49c278bedef093c14c0d7sewardj struct { 5633bca906f6e715c544eb49c278bedef093c14c0d7sewardj HReg src; 5643bca906f6e715c544eb49c278bedef093c14c0d7sewardj HReg dst; 5653bca906f6e715c544eb49c278bedef093c14c0d7sewardj } Fp64to32; 56633124f613423b7298c1717ea7a6b5deafc80f0b2sewardj /* Mov src to dst on the given condition, which may not 56733124f613423b7298c1717ea7a6b5deafc80f0b2sewardj be the bogus Xcc_ALWAYS. */ 56833124f613423b7298c1717ea7a6b5deafc80f0b2sewardj struct { 56933124f613423b7298c1717ea7a6b5deafc80f0b2sewardj X86CondCode cond; 57033124f613423b7298c1717ea7a6b5deafc80f0b2sewardj HReg src; 57133124f613423b7298c1717ea7a6b5deafc80f0b2sewardj HReg dst; 57233124f613423b7298c1717ea7a6b5deafc80f0b2sewardj } FpCMov; 573eba63f874c83e0d2c9306574cddecd8de129095esewardj /* Load the FPU's 16-bit control word (fldcw) */ 5748f3debf52b76a050bc84997a0358c4aa86dfc88dsewardj struct { 5758f3debf52b76a050bc84997a0358c4aa86dfc88dsewardj X86AMode* addr; 5768f3debf52b76a050bc84997a0358c4aa86dfc88dsewardj } 577eba63f874c83e0d2c9306574cddecd8de129095esewardj FpLdCW; 57846de4076882d6a44ff0f76bd8b70c3d89b050293sewardj /* fstsw %ax */ 57946de4076882d6a44ff0f76bd8b70c3d89b050293sewardj struct { 58046de4076882d6a44ff0f76bd8b70c3d89b050293sewardj /* no fields */ 58146de4076882d6a44ff0f76bd8b70c3d89b050293sewardj } 58246de4076882d6a44ff0f76bd8b70c3d89b050293sewardj FpStSW_AX; 583bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj /* Do a compare, generating the C320 bits into the dst. */ 584bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj struct { 585bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj HReg srcL; 586bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj HReg srcR; 587bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj HReg dst; 588bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj } FpCmp; 589d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 590d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj /* Simplistic SSE[123] */ 591d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj struct { 5921e6ad745ebafd0524da1da27a4b85524fa84f777sewardj UShort con; 5931e6ad745ebafd0524da1da27a4b85524fa84f777sewardj HReg dst; 5941e6ad745ebafd0524da1da27a4b85524fa84f777sewardj } SseConst; 5951e6ad745ebafd0524da1da27a4b85524fa84f777sewardj struct { 596d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj Bool isLoad; 597d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj HReg reg; 598d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj X86AMode* addr; 599d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj } SseLdSt; 600d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj struct { 601eba63f874c83e0d2c9306574cddecd8de129095esewardj UChar sz; /* 4 or 8 only */ 602129b3d9da92af2ad2c58ffacb977aa5766211f08sewardj HReg reg; 603129b3d9da92af2ad2c58ffacb977aa5766211f08sewardj X86AMode* addr; 604129b3d9da92af2ad2c58ffacb977aa5766211f08sewardj } SseLdzLO; 605129b3d9da92af2ad2c58ffacb977aa5766211f08sewardj struct { 606d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj X86SseOp op; 607d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj HReg src; 608d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj HReg dst; 609d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj } Sse32Fx4; 610d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj struct { 611d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj X86SseOp op; 612d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj HReg src; 613d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj HReg dst; 614d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj } Sse32FLo; 615636ad762e49597ef608323f27c7b8eb66962cd90sewardj struct { 616636ad762e49597ef608323f27c7b8eb66962cd90sewardj X86SseOp op; 617636ad762e49597ef608323f27c7b8eb66962cd90sewardj HReg src; 618636ad762e49597ef608323f27c7b8eb66962cd90sewardj HReg dst; 619636ad762e49597ef608323f27c7b8eb66962cd90sewardj } Sse64Fx2; 620636ad762e49597ef608323f27c7b8eb66962cd90sewardj struct { 621636ad762e49597ef608323f27c7b8eb66962cd90sewardj X86SseOp op; 622636ad762e49597ef608323f27c7b8eb66962cd90sewardj HReg src; 623636ad762e49597ef608323f27c7b8eb66962cd90sewardj HReg dst; 624636ad762e49597ef608323f27c7b8eb66962cd90sewardj } Sse64FLo; 625164f9275c465cd09ecd09276b8542282f5def250sewardj struct { 626164f9275c465cd09ecd09276b8542282f5def250sewardj X86SseOp op; 627164f9275c465cd09ecd09276b8542282f5def250sewardj HReg src; 628164f9275c465cd09ecd09276b8542282f5def250sewardj HReg dst; 629164f9275c465cd09ecd09276b8542282f5def250sewardj } SseReRg; 630b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj /* Mov src to dst on the given condition, which may not 631b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj be the bogus Xcc_ALWAYS. */ 632b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj struct { 633b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj X86CondCode cond; 634b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj HReg src; 635b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj HReg dst; 636b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj } SseCMov; 637109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj struct { 638109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj Int order; /* 0 <= order <= 0xFF */ 639109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj HReg src; 640109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj HReg dst; 641109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj } SseShuf; 642c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 643c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amCounter; 644c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amFailAddr; 645c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } EvCheck; 646c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 647c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* No fields. The address of the counter to inc is 648c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj installed later, post-translation, by patching it in, 649c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj as it is not known at translation time. */ 650c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } ProfInc; 651d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 65233124f613423b7298c1717ea7a6b5deafc80f0b2sewardj } Xin; 653c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 654c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86Instr; 655c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 65646de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Alu32R ( X86AluOp, X86RMI*, HReg ); 65746de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Alu32M ( X86AluOp, X86RI*, X86AMode* ); 658eba63f874c83e0d2c9306574cddecd8de129095esewardjextern X86Instr* X86Instr_Unary32 ( X86UnaryOp op, HReg dst ); 65979e04f8266ba458784fa8b8abd57a571c5984f53sewardjextern X86Instr* X86Instr_Lea32 ( X86AMode* am, HReg dst ); 66079e04f8266ba458784fa8b8abd57a571c5984f53sewardj 661eba63f874c83e0d2c9306574cddecd8de129095esewardjextern X86Instr* X86Instr_Sh32 ( X86ShiftOp, UInt, HReg ); 662fb7373aee5e8a3039f2916ecf09870f3ec0c1805sewardjextern X86Instr* X86Instr_Test32 ( UInt imm32, X86RM* dst ); 663eba63f874c83e0d2c9306574cddecd8de129095esewardjextern X86Instr* X86Instr_MulL ( Bool syned, X86RM* ); 664eba63f874c83e0d2c9306574cddecd8de129095esewardjextern X86Instr* X86Instr_Div ( Bool syned, X86RM* ); 66546de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Sh3232 ( X86ShiftOp, UInt amt, HReg src, HReg dst ); 66646de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Push ( X86RMI* ); 6674b861de5057856808ec69590f0f0f7c301493272sewardjextern X86Instr* X86Instr_Call ( X86CondCode, Addr32, Int ); 668c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern X86Instr* X86Instr_XDirect ( Addr32 dstGA, X86AMode* amEIP, 669c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond, Bool toFastEP ); 670c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern X86Instr* X86Instr_XIndir ( HReg dstGA, X86AMode* amEIP, 671c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond ); 672c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern X86Instr* X86Instr_XAssisted ( HReg dstGA, X86AMode* amEIP, 673c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond, IRJumpKind jk ); 67446de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_CMov32 ( X86CondCode, X86RM* src, HReg dst ); 67546de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_LoadEX ( UChar szSmall, Bool syned, 67646de4076882d6a44ff0f76bd8b70c3d89b050293sewardj X86AMode* src, HReg dst ); 67746de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Store ( UChar sz, HReg src, X86AMode* dst ); 67846de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Set32 ( X86CondCode cond, HReg dst ); 67946de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Bsfr32 ( Bool isFwds, HReg src, HReg dst ); 6805117ce116f47141cb23d1b49cc826e19323add97sewardjextern X86Instr* X86Instr_MFence ( UInt hwcaps ); 681e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardjextern X86Instr* X86Instr_ACAS ( X86AMode* addr, UChar sz ); 682e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardjextern X86Instr* X86Instr_DACAS ( X86AMode* addr ); 683d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 68446de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpUnary ( X86FpOp op, HReg src, HReg dst ); 68546de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpBinary ( X86FpOp op, HReg srcL, HReg srcR, HReg dst ); 68646de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpLdSt ( Bool isLoad, UChar sz, HReg reg, X86AMode* ); 68746de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpLdStI ( Bool isLoad, UChar sz, HReg reg, X86AMode* ); 6883bca906f6e715c544eb49c278bedef093c14c0d7sewardjextern X86Instr* X86Instr_Fp64to32 ( HReg src, HReg dst ); 68946de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpCMov ( X86CondCode, HReg src, HReg dst ); 690eba63f874c83e0d2c9306574cddecd8de129095esewardjextern X86Instr* X86Instr_FpLdCW ( X86AMode* ); 69146de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpStSW_AX ( void ); 69246de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpCmp ( HReg srcL, HReg srcR, HReg dst ); 6938f3debf52b76a050bc84997a0358c4aa86dfc88dsewardj 6941e6ad745ebafd0524da1da27a4b85524fa84f777sewardjextern X86Instr* X86Instr_SseConst ( UShort con, HReg dst ); 695d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern X86Instr* X86Instr_SseLdSt ( Bool isLoad, HReg, X86AMode* ); 696129b3d9da92af2ad2c58ffacb977aa5766211f08sewardjextern X86Instr* X86Instr_SseLdzLO ( Int sz, HReg, X86AMode* ); 697d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern X86Instr* X86Instr_Sse32Fx4 ( X86SseOp, HReg, HReg ); 698d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern X86Instr* X86Instr_Sse32FLo ( X86SseOp, HReg, HReg ); 699636ad762e49597ef608323f27c7b8eb66962cd90sewardjextern X86Instr* X86Instr_Sse64Fx2 ( X86SseOp, HReg, HReg ); 700636ad762e49597ef608323f27c7b8eb66962cd90sewardjextern X86Instr* X86Instr_Sse64FLo ( X86SseOp, HReg, HReg ); 701164f9275c465cd09ecd09276b8542282f5def250sewardjextern X86Instr* X86Instr_SseReRg ( X86SseOp, HReg, HReg ); 702b9fa69b4047ef2a1fd822bab909437c920b9c297sewardjextern X86Instr* X86Instr_SseCMov ( X86CondCode, HReg src, HReg dst ); 703109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardjextern X86Instr* X86Instr_SseShuf ( Int order, HReg src, HReg dst ); 704c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern X86Instr* X86Instr_EvCheck ( X86AMode* amCounter, 705c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amFailAddr ); 706c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern X86Instr* X86Instr_ProfInc ( void ); 707d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 708c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 70992b643609c5fa432b11fc726c2706ae3f3296eb4cerionextern void ppX86Instr ( X86Instr*, Bool ); 710c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 711f13a16a82132fa2358899c7683193effecf9a56fsewardj/* Some functions that insulate the register allocator from details 712194d54a15ba7eb6b76afe56b8774689c50485354sewardj of the underlying instruction set. */ 71392b643609c5fa432b11fc726c2706ae3f3296eb4cerionextern void getRegUsage_X86Instr ( HRegUsage*, X86Instr*, Bool ); 71492b643609c5fa432b11fc726c2706ae3f3296eb4cerionextern void mapRegs_X86Instr ( HRegRemap*, X86Instr*, Bool ); 715f13a16a82132fa2358899c7683193effecf9a56fsewardjextern Bool isMove_X86Instr ( X86Instr*, HReg*, HReg* ); 716c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern Int emit_X86Instr ( /*MB_MOD*/Bool* is_profInc, 717c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj UChar* buf, Int nbuf, X86Instr* i, 718c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool mode64, 719c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj void* disp_cp_chain_me_to_slowEP, 720c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj void* disp_cp_chain_me_to_fastEP, 721c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj void* disp_cp_xindir, 722c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj void* disp_cp_xassisted ); 7232a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardj 7242a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardjextern void genSpill_X86 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, 7252a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardj HReg rreg, Int offset, Bool ); 7262a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardjextern void genReload_X86 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, 7272a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardj HReg rreg, Int offset, Bool ); 7282a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardj 729fb7373aee5e8a3039f2916ecf09870f3ec0c1805sewardjextern X86Instr* directReload_X86 ( X86Instr* i, 730fb7373aee5e8a3039f2916ecf09870f3ec0c1805sewardj HReg vreg, Short spill_off ); 731f13a16a82132fa2358899c7683193effecf9a56fsewardjextern void getAllocableRegs_X86 ( Int*, HReg** ); 732c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern HInstrArray* iselSB_X86 ( IRSB*, 733c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj VexArch, 734c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj VexArchInfo*, 735c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj VexAbiInfo*, 736c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Int offs_Host_EvC_Counter, 737c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Int offs_Host_EvC_FailAddr, 738c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool chainingAllowed, 739c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool addProfInc, 740c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Addr64 max_ga ); 741c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 742c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj/* How big is an event check? This is kind of a kludge because it 743c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj depends on the offsets of host_EvC_FAILADDR and host_EvC_COUNTER, 744c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj and so assumes that they are both <= 128, and so can use the short 745c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj offset encoding. This is all checked with assertions, so in the 746c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj worst case we will merely assert at startup. */ 747c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern Int evCheckSzB_X86 ( void ); 748c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 749c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj/* Perform a chaining and unchaining of an XDirect jump. */ 750c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern VexInvalRange chainXDirect_X86 ( void* place_to_chain, 751c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj void* disp_cp_chain_me_EXPECTED, 752c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj void* place_to_jump_to ); 753c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 754c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern VexInvalRange unchainXDirect_X86 ( void* place_to_unchain, 755c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj void* place_to_jump_to_EXPECTED, 756c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj void* disp_cp_chain_me ); 757c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 758c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj/* Patch the counter location into an existing ProfInc point. */ 759c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern VexInvalRange patchProfInc_X86 ( void* place_to_patch, 760c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj ULong* location_of_counter ); 761c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 7626c77c95467b9b9bbb24ac645ea1a167c9e25e33asewardj 763cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj#endif /* ndef __VEX_HOST_X86_DEFS_H */ 764887a11a609f3e61d2ae8fe4e67f176207715da7esewardj 765887a11a609f3e61d2ae8fe4e67f176207715da7esewardj/*---------------------------------------------------------------*/ 766cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj/*--- end host_x86_defs.h ---*/ 767887a11a609f3e61d2ae8fe4e67f176207715da7esewardj/*---------------------------------------------------------------*/ 768