disasm-aarch32.h revision 7f4a230cbb795755d24e1d4658e99a7ccf1eb24b
1// Copyright 2015, VIXL authors 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// * Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// * Redistributions in binary form must reproduce the above copyright notice, 10// this list of conditions and the following disclaimer in the documentation 11// and/or other materials provided with the distribution. 12// * Neither the name of ARM Limited nor the names of its contributors may be 13// used to endorse or promote products derived from this software without 14// specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27#ifndef VIXL_DISASM_AARCH32_H_ 28#define VIXL_DISASM_AARCH32_H_ 29 30extern "C" { 31#include <stdint.h> 32} 33 34#include "aarch32/constants-aarch32.h" 35#include "aarch32/label-aarch32.h" 36#include "aarch32/operand-aarch32.h" 37 38namespace vixl { 39namespace aarch32 { 40 41class ITBlock { 42 Condition first_condition_; 43 Condition condition_; 44 uint16_t it_mask_; 45 46 public: 47 ITBlock() : first_condition_(al), condition_(al), it_mask_(0) {} 48 void Advance() { 49 condition_ = Condition((condition_.GetCondition() & 0xe) | (it_mask_ >> 3)); 50 it_mask_ = (it_mask_ << 1) & 0xf; 51 } 52 bool InITBlock() const { return it_mask_ != 0; } 53 bool OutsideITBlock() const { return !InITBlock(); } 54 bool LastInITBlock() const { return it_mask_ == 0x8; } 55 bool OutsideITBlockOrLast() const { 56 return OutsideITBlock() || LastInITBlock(); 57 } 58 void Set(Condition first_condition, uint16_t mask) { 59 condition_ = first_condition_ = first_condition; 60 it_mask_ = mask; 61 } 62 Condition GetFirstCondition() const { return first_condition_; } 63 Condition GetCurrentCondition() const { return condition_; } 64}; 65 66class Disassembler { 67 public: 68 enum LocationType { 69 kAnyLocation, 70 kCodeLocation, 71 kDataLocation, 72 kCoprocLocation, 73 kLoadByteLocation, 74 kLoadHalfWordLocation, 75 kLoadWordLocation, 76 kLoadDoubleWordLocation, 77 kLoadSignedByteLocation, 78 kLoadSignedHalfWordLocation, 79 kLoadSinglePrecisionLocation, 80 kLoadDoublePrecisionLocation, 81 kStoreByteLocation, 82 kStoreHalfWordLocation, 83 kStoreWordLocation, 84 kStoreDoubleWordLocation, 85 kStoreSinglePrecisionLocation, 86 kStoreDoublePrecisionLocation, 87 kVld1Location, 88 kVld2Location, 89 kVld3Location, 90 kVld4Location, 91 kVst1Location, 92 kVst2Location, 93 kVst3Location, 94 kVst4Location 95 }; 96 97 class ConditionPrinter { 98 const ITBlock& it_block_; 99 Condition cond_; 100 101 public: 102 ConditionPrinter(const ITBlock& it_block, Condition cond) 103 : it_block_(it_block), cond_(cond) {} 104 friend std::ostream& operator<<(std::ostream& os, ConditionPrinter cond) { 105 if (cond.it_block_.InITBlock() && cond.cond_.Is(al) && 106 !cond.cond_.IsNone()) { 107 return os << "al"; 108 } 109 return os << cond.cond_; 110 } 111 }; 112 113 class PrintLabel { 114 LocationType location_type_; 115 Label* label_; 116 Label::Offset position_; 117 118 public: 119 PrintLabel(LocationType location_type, Label* label, Label::Offset position) 120 : location_type_(location_type), label_(label), position_(position) {} 121 LocationType GetLocationType() const { return location_type_; } 122 Label* GetLabel() const { return label_; } 123 Label::Offset GetPosition() const { return position_; } 124 friend inline std::ostream& operator<<(std::ostream& os, 125 const PrintLabel& label) { 126 if (label.label_->IsMinusZero()) { 127 os << "[pc, #-0]"; 128 } else { 129 os << "0x" << std::hex << std::setw(8) << std::setfill('0') 130 << static_cast<int32_t>(label.label_->GetLocation() + 131 label.position_) << std::dec; 132 } 133 return os; 134 } 135 }; 136 137 class PrintMemOperand { 138 LocationType location_type_; 139 const MemOperand& operand_; 140 141 public: 142 PrintMemOperand(LocationType location_type, const MemOperand& operand) 143 : location_type_(location_type), operand_(operand) {} 144 LocationType GetLocationType() const { return location_type_; } 145 const MemOperand& GetOperand() const { return operand_; } 146 }; 147 148 class PrintAlignedMemOperand { 149 LocationType location_type_; 150 const AlignedMemOperand& operand_; 151 152 public: 153 PrintAlignedMemOperand(LocationType location_type, 154 const AlignedMemOperand& operand) 155 : location_type_(location_type), operand_(operand) {} 156 LocationType GetLocationType() const { return location_type_; } 157 const AlignedMemOperand& GetOperand() const { return operand_; } 158 }; 159 160 class DisassemblerStream { 161 std::ostream& os_; 162 InstructionType current_instruction_type_; 163 InstructionAttribute current_instruction_attributes_; 164 165 public: 166 explicit DisassemblerStream( 167 std::ostream& os) // NOLINT [runtime/references] 168 : os_(os), 169 current_instruction_type_(kUndefInstructionType), 170 current_instruction_attributes_(kNoAttribute) {} 171 virtual ~DisassemblerStream() {} 172 std::ostream& os() const { return os_; } 173 void SetCurrentInstruction( 174 InstructionType current_instruction_type, 175 InstructionAttribute current_instruction_attributes) { 176 current_instruction_type_ = current_instruction_type; 177 current_instruction_attributes_ = current_instruction_attributes; 178 } 179 InstructionType GetCurrentInstructionType() const { 180 return current_instruction_type_; 181 } 182 InstructionAttribute GetCurrentInstructionAttributes() const { 183 return current_instruction_attributes_; 184 } 185 bool Has(InstructionAttribute attributes) const { 186 return (current_instruction_attributes_ & attributes) == attributes; 187 } 188 template <typename T> 189 DisassemblerStream& operator<<(T value) { 190 os_ << value; 191 return *this; 192 } 193 virtual DisassemblerStream& operator<<(const ConditionPrinter& cond) { 194 os_ << cond; 195 return *this; 196 } 197 virtual DisassemblerStream& operator<<(Condition cond) { 198 os_ << cond; 199 return *this; 200 } 201 virtual DisassemblerStream& operator<<(const EncodingSize& size) { 202 os_ << size; 203 return *this; 204 } 205 virtual DisassemblerStream& operator<<(const DataType& type) { 206 os_ << type; 207 return *this; 208 } 209 virtual DisassemblerStream& operator<<(Shift shift) { 210 os_ << shift; 211 return *this; 212 } 213 virtual DisassemblerStream& operator<<(Sign sign) { 214 os_ << sign; 215 return *this; 216 } 217 virtual DisassemblerStream& operator<<(Alignment alignment) { 218 os_ << alignment; 219 return *this; 220 } 221 virtual DisassemblerStream& operator<<(const PrintLabel& label) { 222 os_ << label; 223 return *this; 224 } 225 virtual DisassemblerStream& operator<<(const WriteBack& write_back) { 226 os_ << write_back; 227 return *this; 228 } 229 virtual DisassemblerStream& operator<<(const NeonImmediate& immediate) { 230 os_ << immediate; 231 return *this; 232 } 233 virtual DisassemblerStream& operator<<(Register reg) { 234 os_ << reg; 235 return *this; 236 } 237 virtual DisassemblerStream& operator<<(SRegister reg) { 238 os_ << reg; 239 return *this; 240 } 241 virtual DisassemblerStream& operator<<(DRegister reg) { 242 os_ << reg; 243 return *this; 244 } 245 virtual DisassemblerStream& operator<<(QRegister reg) { 246 os_ << reg; 247 return *this; 248 } 249 virtual DisassemblerStream& operator<<(SpecialRegister reg) { 250 os_ << reg; 251 return *this; 252 } 253 virtual DisassemblerStream& operator<<(MaskedSpecialRegister reg) { 254 os_ << reg; 255 return *this; 256 } 257 virtual DisassemblerStream& operator<<(SpecialFPRegister reg) { 258 os_ << reg; 259 return *this; 260 } 261 virtual DisassemblerStream& operator<<(BankedRegister reg) { 262 os_ << reg; 263 return *this; 264 } 265 virtual DisassemblerStream& operator<<(const RegisterList& list) { 266 os_ << list; 267 return *this; 268 } 269 virtual DisassemblerStream& operator<<(const SRegisterList& list) { 270 os_ << list; 271 return *this; 272 } 273 virtual DisassemblerStream& operator<<(const DRegisterList& list) { 274 os_ << list; 275 return *this; 276 } 277 virtual DisassemblerStream& operator<<(const NeonRegisterList& list) { 278 os_ << list; 279 return *this; 280 } 281 virtual DisassemblerStream& operator<<(Coprocessor coproc) { 282 os_ << coproc; 283 return *this; 284 } 285 virtual DisassemblerStream& operator<<(CRegister reg) { 286 os_ << reg; 287 return *this; 288 } 289 virtual DisassemblerStream& operator<<(Endianness endian_specifier) { 290 os_ << endian_specifier; 291 return *this; 292 } 293 virtual DisassemblerStream& operator<<(MemoryBarrier option) { 294 os_ << option; 295 return *this; 296 } 297 virtual DisassemblerStream& operator<<(InterruptFlags iflags) { 298 os_ << iflags; 299 return *this; 300 } 301 virtual DisassemblerStream& operator<<(const Operand& operand) { 302 if (operand.IsImmediate()) { 303 if (Has(kBitwise)) { 304 return *this << "#0x" << std::hex << operand.GetImmediate() 305 << std::dec; 306 } 307 return *this << "#" << operand.GetImmediate(); 308 } 309 if (operand.IsImmediateShiftedRegister()) { 310 if ((operand.GetShift().IsLSL() || operand.GetShift().IsROR()) && 311 (operand.GetShiftAmount() == 0)) { 312 return *this << operand.GetBaseRegister(); 313 } 314 if (operand.GetShift().IsRRX()) { 315 return *this << operand.GetBaseRegister() << ", rrx"; 316 } 317 return *this << operand.GetBaseRegister() << ", " << operand.GetShift() 318 << " #" << operand.GetShiftAmount(); 319 } 320 if (operand.IsRegisterShiftedRegister()) { 321 return *this << operand.GetBaseRegister() << ", " << operand.GetShift() 322 << " " << operand.GetShiftRegister(); 323 } 324 VIXL_UNREACHABLE(); 325 return *this; 326 } 327 virtual DisassemblerStream& operator<<(const SOperand& operand) { 328 if (operand.IsImmediate()) { 329 return *this << operand.GetNeonImmediate(); 330 } 331 return *this << operand.GetRegister(); 332 } 333 virtual DisassemblerStream& operator<<(const DOperand& operand) { 334 if (operand.IsImmediate()) { 335 return *this << operand.GetNeonImmediate(); 336 } 337 return *this << operand.GetRegister(); 338 } 339 virtual DisassemblerStream& operator<<(const QOperand& operand) { 340 if (operand.IsImmediate()) { 341 return *this << operand.GetNeonImmediate(); 342 } 343 return *this << operand.GetRegister(); 344 } 345 virtual DisassemblerStream& operator<<(const MemOperand& operand) { 346 *this << "[" << operand.GetBaseRegister(); 347 if (operand.GetAddrMode() == PostIndex) { 348 *this << "]"; 349 } 350 if (operand.IsImmediate()) { 351 if ((operand.GetOffsetImmediate() != 0) || 352 operand.GetSign().IsMinus() || 353 ((operand.GetAddrMode() != Offset) && !operand.IsRegisterOnly())) { 354 if (operand.GetOffsetImmediate() == 0) { 355 *this << ", #" << operand.GetSign() << operand.GetOffsetImmediate(); 356 } else { 357 *this << ", #" << operand.GetOffsetImmediate(); 358 } 359 } 360 } else if (operand.IsPlainRegister()) { 361 *this << ", " << operand.GetSign() << operand.GetOffsetRegister(); 362 } else if (operand.IsShiftedRegister()) { 363 *this << ", " << operand.GetSign() << operand.GetOffsetRegister() 364 << ImmediateShiftOperand(operand.GetShift(), 365 operand.GetShiftAmount()); 366 } else { 367 VIXL_UNREACHABLE(); 368 return *this; 369 } 370 if (operand.GetAddrMode() == Offset) { 371 *this << "]"; 372 } else if (operand.GetAddrMode() == PreIndex) { 373 *this << "]!"; 374 } 375 return *this; 376 } 377 virtual DisassemblerStream& operator<<(const PrintMemOperand& operand) { 378 return *this << operand.GetOperand(); 379 } 380 virtual DisassemblerStream& operator<<(const AlignedMemOperand& operand) { 381 *this << "[" << operand.GetBaseRegister() << operand.GetAlignment() 382 << "]"; 383 if (operand.GetAddrMode() == PostIndex) { 384 if (operand.IsPlainRegister()) { 385 *this << ", " << operand.GetOffsetRegister(); 386 } else { 387 *this << "!"; 388 } 389 } 390 return *this; 391 } 392 virtual DisassemblerStream& operator<<( 393 const PrintAlignedMemOperand& operand) { 394 return *this << operand.GetOperand(); 395 } 396 }; 397 398 private: 399 class ITBlockScope { 400 ITBlock* const it_block_; 401 bool inside_; 402 403 public: 404 explicit ITBlockScope(ITBlock* it_block) 405 : it_block_(it_block), inside_(it_block->InITBlock()) {} 406 ~ITBlockScope() { 407 if (inside_) it_block_->Advance(); 408 } 409 }; 410 411 ITBlock it_block_; 412 DisassemblerStream* os_; 413 bool owns_os_; 414 uint32_t pc_; 415 416 public: 417 explicit Disassembler(std::ostream& os, uint32_t pc = 0) // NOLINT 418 : os_(new DisassemblerStream(os)), 419 owns_os_(true), 420 pc_(pc) {} 421 explicit Disassembler(DisassemblerStream* os, uint32_t pc = 0) // NOLINT 422 : os_(os), 423 owns_os_(false), 424 pc_(pc) {} 425 virtual ~Disassembler() { 426 if (owns_os_) { 427 delete os_; 428 } 429 } 430 DisassemblerStream& os() const { return *os_; } 431 void SetIT(Condition first_condition, uint16_t it_mask) { 432 it_block_.Set(first_condition, it_mask); 433 } 434 const ITBlock& GetITBlock() const { return it_block_; } 435 bool InITBlock() const { return it_block_.InITBlock(); } 436 bool OutsideITBlock() const { return it_block_.OutsideITBlock(); } 437 bool OutsideITBlockOrLast() const { return it_block_.OutsideITBlockOrLast(); } 438 void CheckNotIT() const { VIXL_ASSERT(it_block_.OutsideITBlock()); } 439 // Return the current condition depending on the IT state for T32. 440 Condition CurrentCond() const { 441 if (it_block_.OutsideITBlock()) return al; 442 return it_block_.GetCurrentCondition(); 443 } 444 445 virtual void UnallocatedT32(uint32_t instruction) { 446 if (T32Size(instruction) == 2) { 447 os() << "unallocated " << std::hex << std::setw(4) << std::setfill('0') 448 << (instruction >> 16) << std::dec; 449 } else { 450 os() << "unallocated " << std::hex << std::setw(8) << std::setfill('0') 451 << instruction << std::dec; 452 } 453 } 454 virtual void UnallocatedA32(uint32_t instruction) { 455 os() << "unallocated " << std::hex << std::setw(8) << std::setfill('0') 456 << instruction << std::dec; 457 } 458 virtual void UnimplementedT32_16(const char* name, uint32_t instruction) { 459 os() << "unimplemented " << name << " T32:" << std::hex << std::setw(4) 460 << std::setfill('0') << (instruction >> 16) << std::dec; 461 } 462 virtual void UnimplementedT32_32(const char* name, uint32_t instruction) { 463 os() << "unimplemented " << name << " T32:" << std::hex << std::setw(8) 464 << std::setfill('0') << instruction << std::dec; 465 } 466 virtual void UnimplementedA32(const char* name, uint32_t instruction) { 467 os() << "unimplemented " << name << " ARM:" << std::hex << std::setw(8) 468 << std::setfill('0') << instruction << std::dec; 469 } 470 virtual void Unpredictable() { os() << " ; unpredictable"; } 471 virtual void UnpredictableT32(uint32_t /*instr*/) { return Unpredictable(); } 472 virtual void UnpredictableA32(uint32_t /*instr*/) { return Unpredictable(); } 473 474 static bool Is16BitEncoding(uint32_t instr) { return instr < 0xe8000000; } 475 uint32_t GetPc() const { return pc_; } 476 void JumpToPc(uint32_t pc) { pc_ = pc; } 477 478 // Start of generated code. 479 480 void adc(Condition cond, 481 EncodingSize size, 482 Register rd, 483 Register rn, 484 const Operand& operand); 485 486 void adcs(Condition cond, 487 EncodingSize size, 488 Register rd, 489 Register rn, 490 const Operand& operand); 491 492 void add(Condition cond, 493 EncodingSize size, 494 Register rd, 495 Register rn, 496 const Operand& operand); 497 498 void add(Condition cond, Register rd, const Operand& operand); 499 500 void adds(Condition cond, 501 EncodingSize size, 502 Register rd, 503 Register rn, 504 const Operand& operand); 505 506 void adds(Register rd, const Operand& operand); 507 508 void addw(Condition cond, Register rd, Register rn, const Operand& operand); 509 510 void adr(Condition cond, EncodingSize size, Register rd, Label* label); 511 512 void and_(Condition cond, 513 EncodingSize size, 514 Register rd, 515 Register rn, 516 const Operand& operand); 517 518 void ands(Condition cond, 519 EncodingSize size, 520 Register rd, 521 Register rn, 522 const Operand& operand); 523 524 void asr(Condition cond, 525 EncodingSize size, 526 Register rd, 527 Register rm, 528 const Operand& operand); 529 530 void asrs(Condition cond, 531 EncodingSize size, 532 Register rd, 533 Register rm, 534 const Operand& operand); 535 536 void b(Condition cond, EncodingSize size, Label* label); 537 538 void bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand); 539 540 void bfi(Condition cond, 541 Register rd, 542 Register rn, 543 uint32_t lsb, 544 const Operand& operand); 545 546 void bic(Condition cond, 547 EncodingSize size, 548 Register rd, 549 Register rn, 550 const Operand& operand); 551 552 void bics(Condition cond, 553 EncodingSize size, 554 Register rd, 555 Register rn, 556 const Operand& operand); 557 558 void bkpt(Condition cond, uint32_t imm); 559 560 void bl(Condition cond, Label* label); 561 562 void blx(Condition cond, Label* label); 563 564 void blx(Condition cond, Register rm); 565 566 void bx(Condition cond, Register rm); 567 568 void bxj(Condition cond, Register rm); 569 570 void cbnz(Register rn, Label* label); 571 572 void cbz(Register rn, Label* label); 573 574 void clrex(Condition cond); 575 576 void clz(Condition cond, Register rd, Register rm); 577 578 void cmn(Condition cond, 579 EncodingSize size, 580 Register rn, 581 const Operand& operand); 582 583 void cmp(Condition cond, 584 EncodingSize size, 585 Register rn, 586 const Operand& operand); 587 588 void crc32b(Condition cond, Register rd, Register rn, Register rm); 589 590 void crc32cb(Condition cond, Register rd, Register rn, Register rm); 591 592 void crc32ch(Condition cond, Register rd, Register rn, Register rm); 593 594 void crc32cw(Condition cond, Register rd, Register rn, Register rm); 595 596 void crc32h(Condition cond, Register rd, Register rn, Register rm); 597 598 void crc32w(Condition cond, Register rd, Register rn, Register rm); 599 600 void dmb(Condition cond, MemoryBarrier option); 601 602 void dsb(Condition cond, MemoryBarrier option); 603 604 void eor(Condition cond, 605 EncodingSize size, 606 Register rd, 607 Register rn, 608 const Operand& operand); 609 610 void eors(Condition cond, 611 EncodingSize size, 612 Register rd, 613 Register rn, 614 const Operand& operand); 615 616 void fldmdbx(Condition cond, 617 Register rn, 618 WriteBack write_back, 619 DRegisterList dreglist); 620 621 void fldmiax(Condition cond, 622 Register rn, 623 WriteBack write_back, 624 DRegisterList dreglist); 625 626 void fstmdbx(Condition cond, 627 Register rn, 628 WriteBack write_back, 629 DRegisterList dreglist); 630 631 void fstmiax(Condition cond, 632 Register rn, 633 WriteBack write_back, 634 DRegisterList dreglist); 635 636 void hlt(Condition cond, uint32_t imm); 637 638 void hvc(Condition cond, uint32_t imm); 639 640 void isb(Condition cond, MemoryBarrier option); 641 642 void it(Condition cond, uint16_t mask); 643 644 void lda(Condition cond, Register rt, const MemOperand& operand); 645 646 void ldab(Condition cond, Register rt, const MemOperand& operand); 647 648 void ldaex(Condition cond, Register rt, const MemOperand& operand); 649 650 void ldaexb(Condition cond, Register rt, const MemOperand& operand); 651 652 void ldaexd(Condition cond, 653 Register rt, 654 Register rt2, 655 const MemOperand& operand); 656 657 void ldaexh(Condition cond, Register rt, const MemOperand& operand); 658 659 void ldah(Condition cond, Register rt, const MemOperand& operand); 660 661 void ldm(Condition cond, 662 EncodingSize size, 663 Register rn, 664 WriteBack write_back, 665 RegisterList registers); 666 667 void ldmda(Condition cond, 668 Register rn, 669 WriteBack write_back, 670 RegisterList registers); 671 672 void ldmdb(Condition cond, 673 Register rn, 674 WriteBack write_back, 675 RegisterList registers); 676 677 void ldmea(Condition cond, 678 Register rn, 679 WriteBack write_back, 680 RegisterList registers); 681 682 void ldmed(Condition cond, 683 Register rn, 684 WriteBack write_back, 685 RegisterList registers); 686 687 void ldmfa(Condition cond, 688 Register rn, 689 WriteBack write_back, 690 RegisterList registers); 691 692 void ldmfd(Condition cond, 693 EncodingSize size, 694 Register rn, 695 WriteBack write_back, 696 RegisterList registers); 697 698 void ldmib(Condition cond, 699 Register rn, 700 WriteBack write_back, 701 RegisterList registers); 702 703 void ldr(Condition cond, 704 EncodingSize size, 705 Register rt, 706 const MemOperand& operand); 707 708 void ldr(Condition cond, EncodingSize size, Register rt, Label* label); 709 710 void ldrb(Condition cond, 711 EncodingSize size, 712 Register rt, 713 const MemOperand& operand); 714 715 void ldrb(Condition cond, Register rt, Label* label); 716 717 void ldrd(Condition cond, 718 Register rt, 719 Register rt2, 720 const MemOperand& operand); 721 722 void ldrd(Condition cond, Register rt, Register rt2, Label* label); 723 724 void ldrex(Condition cond, Register rt, const MemOperand& operand); 725 726 void ldrexb(Condition cond, Register rt, const MemOperand& operand); 727 728 void ldrexd(Condition cond, 729 Register rt, 730 Register rt2, 731 const MemOperand& operand); 732 733 void ldrexh(Condition cond, Register rt, const MemOperand& operand); 734 735 void ldrh(Condition cond, 736 EncodingSize size, 737 Register rt, 738 const MemOperand& operand); 739 740 void ldrh(Condition cond, Register rt, Label* label); 741 742 void ldrsb(Condition cond, 743 EncodingSize size, 744 Register rt, 745 const MemOperand& operand); 746 747 void ldrsb(Condition cond, Register rt, Label* label); 748 749 void ldrsh(Condition cond, 750 EncodingSize size, 751 Register rt, 752 const MemOperand& operand); 753 754 void ldrsh(Condition cond, Register rt, Label* label); 755 756 void lsl(Condition cond, 757 EncodingSize size, 758 Register rd, 759 Register rm, 760 const Operand& operand); 761 762 void lsls(Condition cond, 763 EncodingSize size, 764 Register rd, 765 Register rm, 766 const Operand& operand); 767 768 void lsr(Condition cond, 769 EncodingSize size, 770 Register rd, 771 Register rm, 772 const Operand& operand); 773 774 void lsrs(Condition cond, 775 EncodingSize size, 776 Register rd, 777 Register rm, 778 const Operand& operand); 779 780 void mla(Condition cond, Register rd, Register rn, Register rm, Register ra); 781 782 void mlas(Condition cond, Register rd, Register rn, Register rm, Register ra); 783 784 void mls(Condition cond, Register rd, Register rn, Register rm, Register ra); 785 786 void mov(Condition cond, 787 EncodingSize size, 788 Register rd, 789 const Operand& operand); 790 791 void movs(Condition cond, 792 EncodingSize size, 793 Register rd, 794 const Operand& operand); 795 796 void movt(Condition cond, Register rd, const Operand& operand); 797 798 void movw(Condition cond, Register rd, const Operand& operand); 799 800 void mrs(Condition cond, Register rd, SpecialRegister spec_reg); 801 802 void msr(Condition cond, 803 MaskedSpecialRegister spec_reg, 804 const Operand& operand); 805 806 void mul( 807 Condition cond, EncodingSize size, Register rd, Register rn, Register rm); 808 809 void muls(Condition cond, Register rd, Register rn, Register rm); 810 811 void mvn(Condition cond, 812 EncodingSize size, 813 Register rd, 814 const Operand& operand); 815 816 void mvns(Condition cond, 817 EncodingSize size, 818 Register rd, 819 const Operand& operand); 820 821 void nop(Condition cond, EncodingSize size); 822 823 void orn(Condition cond, Register rd, Register rn, const Operand& operand); 824 825 void orns(Condition cond, Register rd, Register rn, const Operand& operand); 826 827 void orr(Condition cond, 828 EncodingSize size, 829 Register rd, 830 Register rn, 831 const Operand& operand); 832 833 void orrs(Condition cond, 834 EncodingSize size, 835 Register rd, 836 Register rn, 837 const Operand& operand); 838 839 void pkhbt(Condition cond, Register rd, Register rn, const Operand& operand); 840 841 void pkhtb(Condition cond, Register rd, Register rn, const Operand& operand); 842 843 void pld(Condition cond, Label* label); 844 845 void pld(Condition cond, const MemOperand& operand); 846 847 void pldw(Condition cond, const MemOperand& operand); 848 849 void pli(Condition cond, const MemOperand& operand); 850 851 void pli(Condition cond, Label* label); 852 853 void pop(Condition cond, EncodingSize size, RegisterList registers); 854 855 void pop(Condition cond, EncodingSize size, Register rt); 856 857 void push(Condition cond, EncodingSize size, RegisterList registers); 858 859 void push(Condition cond, EncodingSize size, Register rt); 860 861 void qadd(Condition cond, Register rd, Register rm, Register rn); 862 863 void qadd16(Condition cond, Register rd, Register rn, Register rm); 864 865 void qadd8(Condition cond, Register rd, Register rn, Register rm); 866 867 void qasx(Condition cond, Register rd, Register rn, Register rm); 868 869 void qdadd(Condition cond, Register rd, Register rm, Register rn); 870 871 void qdsub(Condition cond, Register rd, Register rm, Register rn); 872 873 void qsax(Condition cond, Register rd, Register rn, Register rm); 874 875 void qsub(Condition cond, Register rd, Register rm, Register rn); 876 877 void qsub16(Condition cond, Register rd, Register rn, Register rm); 878 879 void qsub8(Condition cond, Register rd, Register rn, Register rm); 880 881 void rbit(Condition cond, Register rd, Register rm); 882 883 void rev(Condition cond, EncodingSize size, Register rd, Register rm); 884 885 void rev16(Condition cond, EncodingSize size, Register rd, Register rm); 886 887 void revsh(Condition cond, EncodingSize size, Register rd, Register rm); 888 889 void ror(Condition cond, 890 EncodingSize size, 891 Register rd, 892 Register rm, 893 const Operand& operand); 894 895 void rors(Condition cond, 896 EncodingSize size, 897 Register rd, 898 Register rm, 899 const Operand& operand); 900 901 void rrx(Condition cond, Register rd, Register rm); 902 903 void rrxs(Condition cond, Register rd, Register rm); 904 905 void rsb(Condition cond, 906 EncodingSize size, 907 Register rd, 908 Register rn, 909 const Operand& operand); 910 911 void rsbs(Condition cond, 912 EncodingSize size, 913 Register rd, 914 Register rn, 915 const Operand& operand); 916 917 void rsc(Condition cond, Register rd, Register rn, const Operand& operand); 918 919 void rscs(Condition cond, Register rd, Register rn, const Operand& operand); 920 921 void sadd16(Condition cond, Register rd, Register rn, Register rm); 922 923 void sadd8(Condition cond, Register rd, Register rn, Register rm); 924 925 void sasx(Condition cond, Register rd, Register rn, Register rm); 926 927 void sbc(Condition cond, 928 EncodingSize size, 929 Register rd, 930 Register rn, 931 const Operand& operand); 932 933 void sbcs(Condition cond, 934 EncodingSize size, 935 Register rd, 936 Register rn, 937 const Operand& operand); 938 939 void sbfx(Condition cond, 940 Register rd, 941 Register rn, 942 uint32_t lsb, 943 const Operand& operand); 944 945 void sdiv(Condition cond, Register rd, Register rn, Register rm); 946 947 void sel(Condition cond, Register rd, Register rn, Register rm); 948 949 void shadd16(Condition cond, Register rd, Register rn, Register rm); 950 951 void shadd8(Condition cond, Register rd, Register rn, Register rm); 952 953 void shasx(Condition cond, Register rd, Register rn, Register rm); 954 955 void shsax(Condition cond, Register rd, Register rn, Register rm); 956 957 void shsub16(Condition cond, Register rd, Register rn, Register rm); 958 959 void shsub8(Condition cond, Register rd, Register rn, Register rm); 960 961 void smlabb( 962 Condition cond, Register rd, Register rn, Register rm, Register ra); 963 964 void smlabt( 965 Condition cond, Register rd, Register rn, Register rm, Register ra); 966 967 void smlad( 968 Condition cond, Register rd, Register rn, Register rm, Register ra); 969 970 void smladx( 971 Condition cond, Register rd, Register rn, Register rm, Register ra); 972 973 void smlal( 974 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 975 976 void smlalbb( 977 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 978 979 void smlalbt( 980 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 981 982 void smlald( 983 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 984 985 void smlaldx( 986 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 987 988 void smlals( 989 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 990 991 void smlaltb( 992 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 993 994 void smlaltt( 995 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 996 997 void smlatb( 998 Condition cond, Register rd, Register rn, Register rm, Register ra); 999 1000 void smlatt( 1001 Condition cond, Register rd, Register rn, Register rm, Register ra); 1002 1003 void smlawb( 1004 Condition cond, Register rd, Register rn, Register rm, Register ra); 1005 1006 void smlawt( 1007 Condition cond, Register rd, Register rn, Register rm, Register ra); 1008 1009 void smlsd( 1010 Condition cond, Register rd, Register rn, Register rm, Register ra); 1011 1012 void smlsdx( 1013 Condition cond, Register rd, Register rn, Register rm, Register ra); 1014 1015 void smlsld( 1016 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 1017 1018 void smlsldx( 1019 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 1020 1021 void smmla( 1022 Condition cond, Register rd, Register rn, Register rm, Register ra); 1023 1024 void smmlar( 1025 Condition cond, Register rd, Register rn, Register rm, Register ra); 1026 1027 void smmls( 1028 Condition cond, Register rd, Register rn, Register rm, Register ra); 1029 1030 void smmlsr( 1031 Condition cond, Register rd, Register rn, Register rm, Register ra); 1032 1033 void smmul(Condition cond, Register rd, Register rn, Register rm); 1034 1035 void smmulr(Condition cond, Register rd, Register rn, Register rm); 1036 1037 void smuad(Condition cond, Register rd, Register rn, Register rm); 1038 1039 void smuadx(Condition cond, Register rd, Register rn, Register rm); 1040 1041 void smulbb(Condition cond, Register rd, Register rn, Register rm); 1042 1043 void smulbt(Condition cond, Register rd, Register rn, Register rm); 1044 1045 void smull( 1046 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 1047 1048 void smulls( 1049 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 1050 1051 void smultb(Condition cond, Register rd, Register rn, Register rm); 1052 1053 void smultt(Condition cond, Register rd, Register rn, Register rm); 1054 1055 void smulwb(Condition cond, Register rd, Register rn, Register rm); 1056 1057 void smulwt(Condition cond, Register rd, Register rn, Register rm); 1058 1059 void smusd(Condition cond, Register rd, Register rn, Register rm); 1060 1061 void smusdx(Condition cond, Register rd, Register rn, Register rm); 1062 1063 void ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand); 1064 1065 void ssat16(Condition cond, Register rd, uint32_t imm, Register rn); 1066 1067 void ssax(Condition cond, Register rd, Register rn, Register rm); 1068 1069 void ssub16(Condition cond, Register rd, Register rn, Register rm); 1070 1071 void ssub8(Condition cond, Register rd, Register rn, Register rm); 1072 1073 void stl(Condition cond, Register rt, const MemOperand& operand); 1074 1075 void stlb(Condition cond, Register rt, const MemOperand& operand); 1076 1077 void stlex(Condition cond, 1078 Register rd, 1079 Register rt, 1080 const MemOperand& operand); 1081 1082 void stlexb(Condition cond, 1083 Register rd, 1084 Register rt, 1085 const MemOperand& operand); 1086 1087 void stlexd(Condition cond, 1088 Register rd, 1089 Register rt, 1090 Register rt2, 1091 const MemOperand& operand); 1092 1093 void stlexh(Condition cond, 1094 Register rd, 1095 Register rt, 1096 const MemOperand& operand); 1097 1098 void stlh(Condition cond, Register rt, const MemOperand& operand); 1099 1100 void stm(Condition cond, 1101 EncodingSize size, 1102 Register rn, 1103 WriteBack write_back, 1104 RegisterList registers); 1105 1106 void stmda(Condition cond, 1107 Register rn, 1108 WriteBack write_back, 1109 RegisterList registers); 1110 1111 void stmdb(Condition cond, 1112 EncodingSize size, 1113 Register rn, 1114 WriteBack write_back, 1115 RegisterList registers); 1116 1117 void stmea(Condition cond, 1118 EncodingSize size, 1119 Register rn, 1120 WriteBack write_back, 1121 RegisterList registers); 1122 1123 void stmed(Condition cond, 1124 Register rn, 1125 WriteBack write_back, 1126 RegisterList registers); 1127 1128 void stmfa(Condition cond, 1129 Register rn, 1130 WriteBack write_back, 1131 RegisterList registers); 1132 1133 void stmfd(Condition cond, 1134 Register rn, 1135 WriteBack write_back, 1136 RegisterList registers); 1137 1138 void stmib(Condition cond, 1139 Register rn, 1140 WriteBack write_back, 1141 RegisterList registers); 1142 1143 void str(Condition cond, 1144 EncodingSize size, 1145 Register rt, 1146 const MemOperand& operand); 1147 1148 void strb(Condition cond, 1149 EncodingSize size, 1150 Register rt, 1151 const MemOperand& operand); 1152 1153 void strd(Condition cond, 1154 Register rt, 1155 Register rt2, 1156 const MemOperand& operand); 1157 1158 void strex(Condition cond, 1159 Register rd, 1160 Register rt, 1161 const MemOperand& operand); 1162 1163 void strexb(Condition cond, 1164 Register rd, 1165 Register rt, 1166 const MemOperand& operand); 1167 1168 void strexd(Condition cond, 1169 Register rd, 1170 Register rt, 1171 Register rt2, 1172 const MemOperand& operand); 1173 1174 void strexh(Condition cond, 1175 Register rd, 1176 Register rt, 1177 const MemOperand& operand); 1178 1179 void strh(Condition cond, 1180 EncodingSize size, 1181 Register rt, 1182 const MemOperand& operand); 1183 1184 void sub(Condition cond, 1185 EncodingSize size, 1186 Register rd, 1187 Register rn, 1188 const Operand& operand); 1189 1190 void sub(Condition cond, Register rd, const Operand& operand); 1191 1192 void subs(Condition cond, 1193 EncodingSize size, 1194 Register rd, 1195 Register rn, 1196 const Operand& operand); 1197 1198 void subs(Register rd, const Operand& operand); 1199 1200 void subw(Condition cond, Register rd, Register rn, const Operand& operand); 1201 1202 void svc(Condition cond, uint32_t imm); 1203 1204 void sxtab(Condition cond, Register rd, Register rn, const Operand& operand); 1205 1206 void sxtab16(Condition cond, 1207 Register rd, 1208 Register rn, 1209 const Operand& operand); 1210 1211 void sxtah(Condition cond, Register rd, Register rn, const Operand& operand); 1212 1213 void sxtb(Condition cond, 1214 EncodingSize size, 1215 Register rd, 1216 const Operand& operand); 1217 1218 void sxtb16(Condition cond, Register rd, const Operand& operand); 1219 1220 void sxth(Condition cond, 1221 EncodingSize size, 1222 Register rd, 1223 const Operand& operand); 1224 1225 void tbb(Condition cond, Register rn, Register rm); 1226 1227 void tbh(Condition cond, Register rn, Register rm); 1228 1229 void teq(Condition cond, Register rn, const Operand& operand); 1230 1231 void tst(Condition cond, 1232 EncodingSize size, 1233 Register rn, 1234 const Operand& operand); 1235 1236 void uadd16(Condition cond, Register rd, Register rn, Register rm); 1237 1238 void uadd8(Condition cond, Register rd, Register rn, Register rm); 1239 1240 void uasx(Condition cond, Register rd, Register rn, Register rm); 1241 1242 void ubfx(Condition cond, 1243 Register rd, 1244 Register rn, 1245 uint32_t lsb, 1246 const Operand& operand); 1247 1248 void udf(Condition cond, EncodingSize size, uint32_t imm); 1249 1250 void udiv(Condition cond, Register rd, Register rn, Register rm); 1251 1252 void uhadd16(Condition cond, Register rd, Register rn, Register rm); 1253 1254 void uhadd8(Condition cond, Register rd, Register rn, Register rm); 1255 1256 void uhasx(Condition cond, Register rd, Register rn, Register rm); 1257 1258 void uhsax(Condition cond, Register rd, Register rn, Register rm); 1259 1260 void uhsub16(Condition cond, Register rd, Register rn, Register rm); 1261 1262 void uhsub8(Condition cond, Register rd, Register rn, Register rm); 1263 1264 void umaal( 1265 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 1266 1267 void umlal( 1268 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 1269 1270 void umlals( 1271 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 1272 1273 void umull( 1274 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 1275 1276 void umulls( 1277 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm); 1278 1279 void uqadd16(Condition cond, Register rd, Register rn, Register rm); 1280 1281 void uqadd8(Condition cond, Register rd, Register rn, Register rm); 1282 1283 void uqasx(Condition cond, Register rd, Register rn, Register rm); 1284 1285 void uqsax(Condition cond, Register rd, Register rn, Register rm); 1286 1287 void uqsub16(Condition cond, Register rd, Register rn, Register rm); 1288 1289 void uqsub8(Condition cond, Register rd, Register rn, Register rm); 1290 1291 void usad8(Condition cond, Register rd, Register rn, Register rm); 1292 1293 void usada8( 1294 Condition cond, Register rd, Register rn, Register rm, Register ra); 1295 1296 void usat(Condition cond, Register rd, uint32_t imm, const Operand& operand); 1297 1298 void usat16(Condition cond, Register rd, uint32_t imm, Register rn); 1299 1300 void usax(Condition cond, Register rd, Register rn, Register rm); 1301 1302 void usub16(Condition cond, Register rd, Register rn, Register rm); 1303 1304 void usub8(Condition cond, Register rd, Register rn, Register rm); 1305 1306 void uxtab(Condition cond, Register rd, Register rn, const Operand& operand); 1307 1308 void uxtab16(Condition cond, 1309 Register rd, 1310 Register rn, 1311 const Operand& operand); 1312 1313 void uxtah(Condition cond, Register rd, Register rn, const Operand& operand); 1314 1315 void uxtb(Condition cond, 1316 EncodingSize size, 1317 Register rd, 1318 const Operand& operand); 1319 1320 void uxtb16(Condition cond, Register rd, const Operand& operand); 1321 1322 void uxth(Condition cond, 1323 EncodingSize size, 1324 Register rd, 1325 const Operand& operand); 1326 1327 void vaba( 1328 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1329 1330 void vaba( 1331 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1332 1333 void vabal( 1334 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm); 1335 1336 void vabd( 1337 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1338 1339 void vabd( 1340 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1341 1342 void vabdl( 1343 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm); 1344 1345 void vabs(Condition cond, DataType dt, DRegister rd, DRegister rm); 1346 1347 void vabs(Condition cond, DataType dt, QRegister rd, QRegister rm); 1348 1349 void vabs(Condition cond, DataType dt, SRegister rd, SRegister rm); 1350 1351 void vacge( 1352 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1353 1354 void vacge( 1355 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1356 1357 void vacgt( 1358 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1359 1360 void vacgt( 1361 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1362 1363 void vacle( 1364 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1365 1366 void vacle( 1367 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1368 1369 void vaclt( 1370 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1371 1372 void vaclt( 1373 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1374 1375 void vadd( 1376 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1377 1378 void vadd( 1379 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1380 1381 void vadd( 1382 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1383 1384 void vaddhn( 1385 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm); 1386 1387 void vaddl( 1388 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm); 1389 1390 void vaddw( 1391 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm); 1392 1393 void vand(Condition cond, 1394 DataType dt, 1395 DRegister rd, 1396 DRegister rn, 1397 const DOperand& operand); 1398 1399 void vand(Condition cond, 1400 DataType dt, 1401 QRegister rd, 1402 QRegister rn, 1403 const QOperand& operand); 1404 1405 void vbic(Condition cond, 1406 DataType dt, 1407 DRegister rd, 1408 DRegister rn, 1409 const DOperand& operand); 1410 1411 void vbic(Condition cond, 1412 DataType dt, 1413 QRegister rd, 1414 QRegister rn, 1415 const QOperand& operand); 1416 1417 void vbif( 1418 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1419 1420 void vbif( 1421 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1422 1423 void vbit( 1424 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1425 1426 void vbit( 1427 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1428 1429 void vbsl( 1430 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1431 1432 void vbsl( 1433 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1434 1435 void vceq(Condition cond, 1436 DataType dt, 1437 DRegister rd, 1438 DRegister rm, 1439 const DOperand& operand); 1440 1441 void vceq(Condition cond, 1442 DataType dt, 1443 QRegister rd, 1444 QRegister rm, 1445 const QOperand& operand); 1446 1447 void vceq( 1448 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1449 1450 void vceq( 1451 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1452 1453 void vcge(Condition cond, 1454 DataType dt, 1455 DRegister rd, 1456 DRegister rm, 1457 const DOperand& operand); 1458 1459 void vcge(Condition cond, 1460 DataType dt, 1461 QRegister rd, 1462 QRegister rm, 1463 const QOperand& operand); 1464 1465 void vcge( 1466 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1467 1468 void vcge( 1469 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1470 1471 void vcgt(Condition cond, 1472 DataType dt, 1473 DRegister rd, 1474 DRegister rm, 1475 const DOperand& operand); 1476 1477 void vcgt(Condition cond, 1478 DataType dt, 1479 QRegister rd, 1480 QRegister rm, 1481 const QOperand& operand); 1482 1483 void vcgt( 1484 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1485 1486 void vcgt( 1487 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1488 1489 void vcle(Condition cond, 1490 DataType dt, 1491 DRegister rd, 1492 DRegister rm, 1493 const DOperand& operand); 1494 1495 void vcle(Condition cond, 1496 DataType dt, 1497 QRegister rd, 1498 QRegister rm, 1499 const QOperand& operand); 1500 1501 void vcle( 1502 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1503 1504 void vcle( 1505 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1506 1507 void vcls(Condition cond, DataType dt, DRegister rd, DRegister rm); 1508 1509 void vcls(Condition cond, DataType dt, QRegister rd, QRegister rm); 1510 1511 void vclt(Condition cond, 1512 DataType dt, 1513 DRegister rd, 1514 DRegister rm, 1515 const DOperand& operand); 1516 1517 void vclt(Condition cond, 1518 DataType dt, 1519 QRegister rd, 1520 QRegister rm, 1521 const QOperand& operand); 1522 1523 void vclt( 1524 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1525 1526 void vclt( 1527 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1528 1529 void vclz(Condition cond, DataType dt, DRegister rd, DRegister rm); 1530 1531 void vclz(Condition cond, DataType dt, QRegister rd, QRegister rm); 1532 1533 void vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm); 1534 1535 void vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm); 1536 1537 void vcmp(Condition cond, DataType dt, SRegister rd, double imm); 1538 1539 void vcmp(Condition cond, DataType dt, DRegister rd, double imm); 1540 1541 void vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm); 1542 1543 void vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm); 1544 1545 void vcmpe(Condition cond, DataType dt, SRegister rd, double imm); 1546 1547 void vcmpe(Condition cond, DataType dt, DRegister rd, double imm); 1548 1549 void vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm); 1550 1551 void vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm); 1552 1553 void vcvt( 1554 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm); 1555 1556 void vcvt( 1557 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm); 1558 1559 void vcvt(Condition cond, 1560 DataType dt1, 1561 DataType dt2, 1562 DRegister rd, 1563 DRegister rm, 1564 int32_t fbits); 1565 1566 void vcvt(Condition cond, 1567 DataType dt1, 1568 DataType dt2, 1569 QRegister rd, 1570 QRegister rm, 1571 int32_t fbits); 1572 1573 void vcvt(Condition cond, 1574 DataType dt1, 1575 DataType dt2, 1576 SRegister rd, 1577 SRegister rm, 1578 int32_t fbits); 1579 1580 void vcvt( 1581 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm); 1582 1583 void vcvt( 1584 Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm); 1585 1586 void vcvt( 1587 Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm); 1588 1589 void vcvt( 1590 Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm); 1591 1592 void vcvt( 1593 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); 1594 1595 void vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm); 1596 1597 void vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 1598 1599 void vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm); 1600 1601 void vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm); 1602 1603 void vcvtb( 1604 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); 1605 1606 void vcvtb( 1607 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm); 1608 1609 void vcvtb( 1610 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm); 1611 1612 void vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm); 1613 1614 void vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 1615 1616 void vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm); 1617 1618 void vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm); 1619 1620 void vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm); 1621 1622 void vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 1623 1624 void vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm); 1625 1626 void vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm); 1627 1628 void vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm); 1629 1630 void vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 1631 1632 void vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm); 1633 1634 void vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm); 1635 1636 void vcvtr( 1637 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); 1638 1639 void vcvtr( 1640 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm); 1641 1642 void vcvtt( 1643 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); 1644 1645 void vcvtt( 1646 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm); 1647 1648 void vcvtt( 1649 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm); 1650 1651 void vdiv( 1652 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1653 1654 void vdiv( 1655 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1656 1657 void vdup(Condition cond, DataType dt, QRegister rd, Register rt); 1658 1659 void vdup(Condition cond, DataType dt, DRegister rd, Register rt); 1660 1661 void vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm); 1662 1663 void vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm); 1664 1665 void veor( 1666 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1667 1668 void veor( 1669 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1670 1671 void vext(Condition cond, 1672 DataType dt, 1673 DRegister rd, 1674 DRegister rn, 1675 DRegister rm, 1676 const DOperand& operand); 1677 1678 void vext(Condition cond, 1679 DataType dt, 1680 QRegister rd, 1681 QRegister rn, 1682 QRegister rm, 1683 const QOperand& operand); 1684 1685 void vfma( 1686 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1687 1688 void vfma( 1689 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1690 1691 void vfma( 1692 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1693 1694 void vfms( 1695 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1696 1697 void vfms( 1698 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1699 1700 void vfms( 1701 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1702 1703 void vfnma( 1704 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1705 1706 void vfnma( 1707 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1708 1709 void vfnms( 1710 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1711 1712 void vfnms( 1713 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1714 1715 void vhadd( 1716 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1717 1718 void vhadd( 1719 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1720 1721 void vhsub( 1722 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1723 1724 void vhsub( 1725 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1726 1727 void vld1(Condition cond, 1728 DataType dt, 1729 const NeonRegisterList& nreglist, 1730 const AlignedMemOperand& operand); 1731 1732 void vld2(Condition cond, 1733 DataType dt, 1734 const NeonRegisterList& nreglist, 1735 const AlignedMemOperand& operand); 1736 1737 void vld3(Condition cond, 1738 DataType dt, 1739 const NeonRegisterList& nreglist, 1740 const AlignedMemOperand& operand); 1741 1742 void vld3(Condition cond, 1743 DataType dt, 1744 const NeonRegisterList& nreglist, 1745 const MemOperand& operand); 1746 1747 void vld4(Condition cond, 1748 DataType dt, 1749 const NeonRegisterList& nreglist, 1750 const AlignedMemOperand& operand); 1751 1752 void vldm(Condition cond, 1753 DataType dt, 1754 Register rn, 1755 WriteBack write_back, 1756 DRegisterList dreglist); 1757 1758 void vldm(Condition cond, 1759 DataType dt, 1760 Register rn, 1761 WriteBack write_back, 1762 SRegisterList sreglist); 1763 1764 void vldmdb(Condition cond, 1765 DataType dt, 1766 Register rn, 1767 WriteBack write_back, 1768 DRegisterList dreglist); 1769 1770 void vldmdb(Condition cond, 1771 DataType dt, 1772 Register rn, 1773 WriteBack write_back, 1774 SRegisterList sreglist); 1775 1776 void vldmia(Condition cond, 1777 DataType dt, 1778 Register rn, 1779 WriteBack write_back, 1780 DRegisterList dreglist); 1781 1782 void vldmia(Condition cond, 1783 DataType dt, 1784 Register rn, 1785 WriteBack write_back, 1786 SRegisterList sreglist); 1787 1788 void vldr(Condition cond, DataType dt, DRegister rd, Label* label); 1789 1790 void vldr(Condition cond, 1791 DataType dt, 1792 DRegister rd, 1793 const MemOperand& operand); 1794 1795 void vldr(Condition cond, DataType dt, SRegister rd, Label* label); 1796 1797 void vldr(Condition cond, 1798 DataType dt, 1799 SRegister rd, 1800 const MemOperand& operand); 1801 1802 void vmax( 1803 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1804 1805 void vmax( 1806 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1807 1808 void vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm); 1809 1810 void vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm); 1811 1812 void vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm); 1813 1814 void vmin( 1815 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1816 1817 void vmin( 1818 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1819 1820 void vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm); 1821 1822 void vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm); 1823 1824 void vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm); 1825 1826 void vmla(Condition cond, 1827 DataType dt, 1828 DRegister rd, 1829 DRegister rn, 1830 DRegisterLane rm); 1831 1832 void vmla(Condition cond, 1833 DataType dt, 1834 QRegister rd, 1835 QRegister rn, 1836 DRegisterLane rm); 1837 1838 void vmla( 1839 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1840 1841 void vmla( 1842 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1843 1844 void vmla( 1845 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1846 1847 void vmlal(Condition cond, 1848 DataType dt, 1849 QRegister rd, 1850 DRegister rn, 1851 DRegisterLane rm); 1852 1853 void vmlal( 1854 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm); 1855 1856 void vmls(Condition cond, 1857 DataType dt, 1858 DRegister rd, 1859 DRegister rn, 1860 DRegisterLane rm); 1861 1862 void vmls(Condition cond, 1863 DataType dt, 1864 QRegister rd, 1865 QRegister rn, 1866 DRegisterLane rm); 1867 1868 void vmls( 1869 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1870 1871 void vmls( 1872 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1873 1874 void vmls( 1875 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1876 1877 void vmlsl(Condition cond, 1878 DataType dt, 1879 QRegister rd, 1880 DRegister rn, 1881 DRegisterLane rm); 1882 1883 void vmlsl( 1884 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm); 1885 1886 void vmov(Condition cond, Register rt, SRegister rn); 1887 1888 void vmov(Condition cond, SRegister rn, Register rt); 1889 1890 void vmov(Condition cond, Register rt, Register rt2, DRegister rm); 1891 1892 void vmov(Condition cond, DRegister rm, Register rt, Register rt2); 1893 1894 void vmov( 1895 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1); 1896 1897 void vmov( 1898 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2); 1899 1900 void vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt); 1901 1902 void vmov(Condition cond, DataType dt, DRegister rd, const DOperand& operand); 1903 1904 void vmov(Condition cond, DataType dt, QRegister rd, const QOperand& operand); 1905 1906 void vmov(Condition cond, DataType dt, SRegister rd, const SOperand& operand); 1907 1908 void vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn); 1909 1910 void vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm); 1911 1912 void vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm); 1913 1914 void vmrs(Condition cond, RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg); 1915 1916 void vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt); 1917 1918 void vmul(Condition cond, 1919 DataType dt, 1920 DRegister rd, 1921 DRegister rn, 1922 DRegister dm, 1923 unsigned index); 1924 1925 void vmul(Condition cond, 1926 DataType dt, 1927 QRegister rd, 1928 QRegister rn, 1929 DRegister dm, 1930 unsigned index); 1931 1932 void vmul( 1933 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1934 1935 void vmul( 1936 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 1937 1938 void vmul( 1939 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1940 1941 void vmull(Condition cond, 1942 DataType dt, 1943 QRegister rd, 1944 DRegister rn, 1945 DRegister dm, 1946 unsigned index); 1947 1948 void vmull( 1949 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm); 1950 1951 void vmvn(Condition cond, DataType dt, DRegister rd, const DOperand& operand); 1952 1953 void vmvn(Condition cond, DataType dt, QRegister rd, const QOperand& operand); 1954 1955 void vneg(Condition cond, DataType dt, DRegister rd, DRegister rm); 1956 1957 void vneg(Condition cond, DataType dt, QRegister rd, QRegister rm); 1958 1959 void vneg(Condition cond, DataType dt, SRegister rd, SRegister rm); 1960 1961 void vnmla( 1962 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1963 1964 void vnmla( 1965 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1966 1967 void vnmls( 1968 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1969 1970 void vnmls( 1971 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1972 1973 void vnmul( 1974 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 1975 1976 void vnmul( 1977 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 1978 1979 void vorn(Condition cond, 1980 DataType dt, 1981 DRegister rd, 1982 DRegister rn, 1983 const DOperand& operand); 1984 1985 void vorn(Condition cond, 1986 DataType dt, 1987 QRegister rd, 1988 QRegister rn, 1989 const QOperand& operand); 1990 1991 void vorr(Condition cond, 1992 DataType dt, 1993 DRegister rd, 1994 DRegister rn, 1995 const DOperand& operand); 1996 1997 void vorr(Condition cond, 1998 DataType dt, 1999 QRegister rd, 2000 QRegister rn, 2001 const QOperand& operand); 2002 2003 void vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm); 2004 2005 void vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm); 2006 2007 void vpadd( 2008 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2009 2010 void vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm); 2011 2012 void vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm); 2013 2014 void vpmax( 2015 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2016 2017 void vpmin( 2018 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2019 2020 void vpop(Condition cond, DataType dt, DRegisterList dreglist); 2021 2022 void vpop(Condition cond, DataType dt, SRegisterList sreglist); 2023 2024 void vpush(Condition cond, DataType dt, DRegisterList dreglist); 2025 2026 void vpush(Condition cond, DataType dt, SRegisterList sreglist); 2027 2028 void vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm); 2029 2030 void vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm); 2031 2032 void vqadd( 2033 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2034 2035 void vqadd( 2036 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 2037 2038 void vqdmlal( 2039 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm); 2040 2041 void vqdmlal(Condition cond, 2042 DataType dt, 2043 QRegister rd, 2044 DRegister rn, 2045 DRegister dm, 2046 unsigned index); 2047 2048 void vqdmlsl( 2049 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm); 2050 2051 void vqdmlsl(Condition cond, 2052 DataType dt, 2053 QRegister rd, 2054 DRegister rn, 2055 DRegister dm, 2056 unsigned index); 2057 2058 void vqdmulh( 2059 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2060 2061 void vqdmulh( 2062 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 2063 2064 void vqdmulh(Condition cond, 2065 DataType dt, 2066 DRegister rd, 2067 DRegister rn, 2068 DRegisterLane rm); 2069 2070 void vqdmulh(Condition cond, 2071 DataType dt, 2072 QRegister rd, 2073 QRegister rn, 2074 DRegisterLane rm); 2075 2076 void vqdmull( 2077 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm); 2078 2079 void vqdmull(Condition cond, 2080 DataType dt, 2081 QRegister rd, 2082 DRegister rn, 2083 DRegisterLane rm); 2084 2085 void vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm); 2086 2087 void vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm); 2088 2089 void vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm); 2090 2091 void vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm); 2092 2093 void vqrdmulh( 2094 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2095 2096 void vqrdmulh( 2097 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 2098 2099 void vqrdmulh(Condition cond, 2100 DataType dt, 2101 DRegister rd, 2102 DRegister rn, 2103 DRegisterLane rm); 2104 2105 void vqrdmulh(Condition cond, 2106 DataType dt, 2107 QRegister rd, 2108 QRegister rn, 2109 DRegisterLane rm); 2110 2111 void vqrshl( 2112 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn); 2113 2114 void vqrshl( 2115 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn); 2116 2117 void vqrshrn(Condition cond, 2118 DataType dt, 2119 DRegister rd, 2120 QRegister rm, 2121 const QOperand& operand); 2122 2123 void vqrshrun(Condition cond, 2124 DataType dt, 2125 DRegister rd, 2126 QRegister rm, 2127 const QOperand& operand); 2128 2129 void vqshl(Condition cond, 2130 DataType dt, 2131 DRegister rd, 2132 DRegister rm, 2133 const DOperand& operand); 2134 2135 void vqshl(Condition cond, 2136 DataType dt, 2137 QRegister rd, 2138 QRegister rm, 2139 const QOperand& operand); 2140 2141 void vqshlu(Condition cond, 2142 DataType dt, 2143 DRegister rd, 2144 DRegister rm, 2145 const DOperand& operand); 2146 2147 void vqshlu(Condition cond, 2148 DataType dt, 2149 QRegister rd, 2150 QRegister rm, 2151 const QOperand& operand); 2152 2153 void vqshrn(Condition cond, 2154 DataType dt, 2155 DRegister rd, 2156 QRegister rm, 2157 const QOperand& operand); 2158 2159 void vqshrun(Condition cond, 2160 DataType dt, 2161 DRegister rd, 2162 QRegister rm, 2163 const QOperand& operand); 2164 2165 void vqsub( 2166 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2167 2168 void vqsub( 2169 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 2170 2171 void vraddhn( 2172 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm); 2173 2174 void vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm); 2175 2176 void vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm); 2177 2178 void vrecps( 2179 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2180 2181 void vrecps( 2182 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 2183 2184 void vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm); 2185 2186 void vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm); 2187 2188 void vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm); 2189 2190 void vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm); 2191 2192 void vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm); 2193 2194 void vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm); 2195 2196 void vrhadd( 2197 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2198 2199 void vrhadd( 2200 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 2201 2202 void vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm); 2203 2204 void vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 2205 2206 void vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm); 2207 2208 void vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm); 2209 2210 void vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 2211 2212 void vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm); 2213 2214 void vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm); 2215 2216 void vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 2217 2218 void vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm); 2219 2220 void vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm); 2221 2222 void vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 2223 2224 void vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm); 2225 2226 void vrintr( 2227 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); 2228 2229 void vrintr( 2230 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm); 2231 2232 void vrintx( 2233 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm); 2234 2235 void vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 2236 2237 void vrintx( 2238 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); 2239 2240 void vrintz( 2241 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm); 2242 2243 void vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 2244 2245 void vrintz( 2246 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); 2247 2248 void vrshl( 2249 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn); 2250 2251 void vrshl( 2252 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn); 2253 2254 void vrshr(Condition cond, 2255 DataType dt, 2256 DRegister rd, 2257 DRegister rm, 2258 const DOperand& operand); 2259 2260 void vrshr(Condition cond, 2261 DataType dt, 2262 QRegister rd, 2263 QRegister rm, 2264 const QOperand& operand); 2265 2266 void vrshrn(Condition cond, 2267 DataType dt, 2268 DRegister rd, 2269 QRegister rm, 2270 const QOperand& operand); 2271 2272 void vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm); 2273 2274 void vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm); 2275 2276 void vrsqrts( 2277 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2278 2279 void vrsqrts( 2280 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 2281 2282 void vrsra(Condition cond, 2283 DataType dt, 2284 DRegister rd, 2285 DRegister rm, 2286 const DOperand& operand); 2287 2288 void vrsra(Condition cond, 2289 DataType dt, 2290 QRegister rd, 2291 QRegister rm, 2292 const QOperand& operand); 2293 2294 void vrsubhn( 2295 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm); 2296 2297 void vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm); 2298 2299 void vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm); 2300 2301 void vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm); 2302 2303 void vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm); 2304 2305 void vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm); 2306 2307 void vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm); 2308 2309 void vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm); 2310 2311 void vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm); 2312 2313 void vshl(Condition cond, 2314 DataType dt, 2315 DRegister rd, 2316 DRegister rm, 2317 const DOperand& operand); 2318 2319 void vshl(Condition cond, 2320 DataType dt, 2321 QRegister rd, 2322 QRegister rm, 2323 const QOperand& operand); 2324 2325 void vshll(Condition cond, 2326 DataType dt, 2327 QRegister rd, 2328 DRegister rm, 2329 const DOperand& operand); 2330 2331 void vshr(Condition cond, 2332 DataType dt, 2333 DRegister rd, 2334 DRegister rm, 2335 const DOperand& operand); 2336 2337 void vshr(Condition cond, 2338 DataType dt, 2339 QRegister rd, 2340 QRegister rm, 2341 const QOperand& operand); 2342 2343 void vshrn(Condition cond, 2344 DataType dt, 2345 DRegister rd, 2346 QRegister rm, 2347 const QOperand& operand); 2348 2349 void vsli(Condition cond, 2350 DataType dt, 2351 DRegister rd, 2352 DRegister rm, 2353 const DOperand& operand); 2354 2355 void vsli(Condition cond, 2356 DataType dt, 2357 QRegister rd, 2358 QRegister rm, 2359 const QOperand& operand); 2360 2361 void vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm); 2362 2363 void vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm); 2364 2365 void vsra(Condition cond, 2366 DataType dt, 2367 DRegister rd, 2368 DRegister rm, 2369 const DOperand& operand); 2370 2371 void vsra(Condition cond, 2372 DataType dt, 2373 QRegister rd, 2374 QRegister rm, 2375 const QOperand& operand); 2376 2377 void vsri(Condition cond, 2378 DataType dt, 2379 DRegister rd, 2380 DRegister rm, 2381 const DOperand& operand); 2382 2383 void vsri(Condition cond, 2384 DataType dt, 2385 QRegister rd, 2386 QRegister rm, 2387 const QOperand& operand); 2388 2389 void vst1(Condition cond, 2390 DataType dt, 2391 const NeonRegisterList& nreglist, 2392 const AlignedMemOperand& operand); 2393 2394 void vst2(Condition cond, 2395 DataType dt, 2396 const NeonRegisterList& nreglist, 2397 const AlignedMemOperand& operand); 2398 2399 void vst3(Condition cond, 2400 DataType dt, 2401 const NeonRegisterList& nreglist, 2402 const AlignedMemOperand& operand); 2403 2404 void vst3(Condition cond, 2405 DataType dt, 2406 const NeonRegisterList& nreglist, 2407 const MemOperand& operand); 2408 2409 void vst4(Condition cond, 2410 DataType dt, 2411 const NeonRegisterList& nreglist, 2412 const AlignedMemOperand& operand); 2413 2414 void vstm(Condition cond, 2415 DataType dt, 2416 Register rn, 2417 WriteBack write_back, 2418 DRegisterList dreglist); 2419 2420 void vstm(Condition cond, 2421 DataType dt, 2422 Register rn, 2423 WriteBack write_back, 2424 SRegisterList sreglist); 2425 2426 void vstmdb(Condition cond, 2427 DataType dt, 2428 Register rn, 2429 WriteBack write_back, 2430 DRegisterList dreglist); 2431 2432 void vstmdb(Condition cond, 2433 DataType dt, 2434 Register rn, 2435 WriteBack write_back, 2436 SRegisterList sreglist); 2437 2438 void vstmia(Condition cond, 2439 DataType dt, 2440 Register rn, 2441 WriteBack write_back, 2442 DRegisterList dreglist); 2443 2444 void vstmia(Condition cond, 2445 DataType dt, 2446 Register rn, 2447 WriteBack write_back, 2448 SRegisterList sreglist); 2449 2450 void vstr(Condition cond, 2451 DataType dt, 2452 DRegister rd, 2453 const MemOperand& operand); 2454 2455 void vstr(Condition cond, 2456 DataType dt, 2457 SRegister rd, 2458 const MemOperand& operand); 2459 2460 void vsub( 2461 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2462 2463 void vsub( 2464 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 2465 2466 void vsub( 2467 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm); 2468 2469 void vsubhn( 2470 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm); 2471 2472 void vsubl( 2473 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm); 2474 2475 void vsubw( 2476 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm); 2477 2478 void vswp(Condition cond, DataType dt, DRegister rd, DRegister rm); 2479 2480 void vswp(Condition cond, DataType dt, QRegister rd, QRegister rm); 2481 2482 void vtbl(Condition cond, 2483 DataType dt, 2484 DRegister rd, 2485 const NeonRegisterList& nreglist, 2486 DRegister rm); 2487 2488 void vtbx(Condition cond, 2489 DataType dt, 2490 DRegister rd, 2491 const NeonRegisterList& nreglist, 2492 DRegister rm); 2493 2494 void vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm); 2495 2496 void vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm); 2497 2498 void vtst( 2499 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm); 2500 2501 void vtst( 2502 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); 2503 2504 void vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm); 2505 2506 void vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm); 2507 2508 void vzip(Condition cond, DataType dt, DRegister rd, DRegister rm); 2509 2510 void vzip(Condition cond, DataType dt, QRegister rd, QRegister rm); 2511 2512 void yield(Condition cond, EncodingSize size); 2513 2514 int T32Size(uint32_t instr); 2515 void DecodeT32(uint32_t instr); 2516 void DecodeA32(uint32_t instr); 2517}; 2518 2519DataTypeValue Dt_L_imm6_1_Decode(uint32_t value, uint32_t type_value); 2520DataTypeValue Dt_L_imm6_2_Decode(uint32_t value, uint32_t type_value); 2521DataTypeValue Dt_L_imm6_3_Decode(uint32_t value); 2522DataTypeValue Dt_L_imm6_4_Decode(uint32_t value); 2523DataTypeValue Dt_imm6_1_Decode(uint32_t value, uint32_t type_value); 2524DataTypeValue Dt_imm6_2_Decode(uint32_t value, uint32_t type_value); 2525DataTypeValue Dt_imm6_3_Decode(uint32_t value); 2526DataTypeValue Dt_imm6_4_Decode(uint32_t value, uint32_t type_value); 2527DataTypeValue Dt_op_U_size_1_Decode(uint32_t value); 2528DataTypeValue Dt_op_size_1_Decode(uint32_t value); 2529DataTypeValue Dt_op_size_2_Decode(uint32_t value); 2530DataTypeValue Dt_op_size_3_Decode(uint32_t value); 2531DataTypeValue Dt_U_imm3H_1_Decode(uint32_t value); 2532DataTypeValue Dt_U_opc1_opc2_1_Decode(uint32_t value, unsigned* lane); 2533DataTypeValue Dt_opc1_opc2_1_Decode(uint32_t value, unsigned* lane); 2534DataTypeValue Dt_imm4_1_Decode(uint32_t value, unsigned* lane); 2535DataTypeValue Dt_B_E_1_Decode(uint32_t value); 2536DataTypeValue Dt_op_1_Decode1(uint32_t value); 2537DataTypeValue Dt_op_1_Decode2(uint32_t value); 2538DataTypeValue Dt_op_2_Decode(uint32_t value); 2539DataTypeValue Dt_op_3_Decode(uint32_t value); 2540DataTypeValue Dt_U_sx_1_Decode(uint32_t value); 2541DataTypeValue Dt_op_U_1_Decode1(uint32_t value); 2542DataTypeValue Dt_op_U_1_Decode2(uint32_t value); 2543DataTypeValue Dt_sz_1_Decode(uint32_t value); 2544DataTypeValue Dt_F_size_1_Decode(uint32_t value); 2545DataTypeValue Dt_F_size_2_Decode(uint32_t value); 2546DataTypeValue Dt_F_size_3_Decode(uint32_t value); 2547DataTypeValue Dt_F_size_4_Decode(uint32_t value); 2548DataTypeValue Dt_U_size_1_Decode(uint32_t value); 2549DataTypeValue Dt_U_size_2_Decode(uint32_t value); 2550DataTypeValue Dt_U_size_3_Decode(uint32_t value); 2551DataTypeValue Dt_size_1_Decode(uint32_t value); 2552DataTypeValue Dt_size_2_Decode(uint32_t value); 2553DataTypeValue Dt_size_3_Decode(uint32_t value); 2554DataTypeValue Dt_size_4_Decode(uint32_t value); 2555DataTypeValue Dt_size_5_Decode(uint32_t value); 2556DataTypeValue Dt_size_6_Decode(uint32_t value); 2557DataTypeValue Dt_size_7_Decode(uint32_t value); 2558DataTypeValue Dt_size_8_Decode(uint32_t value); 2559DataTypeValue Dt_size_9_Decode(uint32_t value, uint32_t type_value); 2560DataTypeValue Dt_size_10_Decode(uint32_t value); 2561DataTypeValue Dt_size_11_Decode(uint32_t value, uint32_t type_value); 2562DataTypeValue Dt_size_12_Decode(uint32_t value, uint32_t type_value); 2563DataTypeValue Dt_size_13_Decode(uint32_t value); 2564DataTypeValue Dt_size_14_Decode(uint32_t value); 2565DataTypeValue Dt_size_15_Decode(uint32_t value); 2566DataTypeValue Dt_size_16_Decode(uint32_t value); 2567// End of generated code. 2568 2569class PrintDisassembler : public Disassembler { 2570 public: 2571 explicit PrintDisassembler(std::ostream& os, uint32_t pc = 0) // NOLINT 2572 : Disassembler(os, pc) {} 2573 explicit PrintDisassembler(DisassemblerStream* os, uint32_t pc = 0) // NOLINT 2574 : Disassembler(os, pc) {} 2575 2576 virtual void PrintPc(uint32_t pc) { 2577 os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << pc << "\t"; 2578 } 2579 2580 virtual void PrintOpcode16(uint32_t opcode) { 2581 os() << std::hex << std::setw(4) << std::setfill('0') << opcode << " " 2582 << std::dec << "\t"; 2583 } 2584 2585 virtual void PrintOpcode32(uint32_t opcode) { 2586 os() << std::hex << std::setw(8) << std::setfill('0') << opcode << std::dec 2587 << "\t"; 2588 } 2589 2590 const uint32_t* DecodeA32At(const uint32_t* instruction_address) { 2591 DecodeA32(*instruction_address); 2592 return instruction_address + 1; 2593 } 2594 2595 // Returns the address of the next instruction. 2596 const uint16_t* DecodeT32At(const uint16_t* instruction_address, 2597 const uint16_t* buffer_end); 2598 void DecodeT32(uint32_t instruction); 2599 void DecodeA32(uint32_t instruction); 2600 void DisassembleA32Buffer(const uint32_t* buffer, size_t size_in_bytes); 2601 void DisassembleT32Buffer(const uint16_t* buffer, size_t size_in_bytes); 2602}; 2603 2604} // namespace aarch32 2605} // namespace vixl 2606 2607#endif // VIXL_DISASM_AARCH32_H_ 2608