disasm-aarch32.h revision 87c05f09dbb6cada9998bdaeacb5d87d7ad82917 
1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7//   * Redistributions of source code must retain the above copyright notice,
8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright notice,
10//     this list of conditions and the following disclaimer in the documentation
11//     and/or other materials provided with the distribution.
12//   * Neither the name of ARM Limited nor the names of its contributors may be
13//     used to endorse or promote products derived from this software without
14//     specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27#ifndef VIXL_DISASM_AARCH32_H_
28#define VIXL_DISASM_AARCH32_H_
29
30extern "C" {
31#include <stdint.h>
32}
33
34#include "aarch32/constants-aarch32.h"
35#include "aarch32/label-aarch32.h"
36#include "aarch32/operand-aarch32.h"
37
38namespace vixl {
39namespace aarch32 {
40
41class ITBlock {
42  Condition first_condition_;
43  Condition condition_;
44  uint16_t it_mask_;
45
46 public:
47  ITBlock() : first_condition_(al), condition_(al), it_mask_(0) {}
48  void Advance() {
49    condition_ = Condition((condition_.GetCondition() & 0xe) | (it_mask_ >> 3));
50    it_mask_ = (it_mask_ << 1) & 0xf;
51  }
52  bool InITBlock() const { return it_mask_ != 0; }
53  bool OutsideITBlock() const { return !InITBlock(); }
54  bool LastInITBlock() const { return it_mask_ == 0x8; }
55  bool OutsideITBlockOrLast() const {
56    return OutsideITBlock() || LastInITBlock();
57  }
58  void Set(Condition first_condition, uint16_t mask) {
59    condition_ = first_condition_ = first_condition;
60    it_mask_ = mask;
61  }
62  Condition GetFirstCondition() const { return first_condition_; }
63  Condition GetCurrentCondition() const { return condition_; }
64};
65
66class Disassembler {
67 public:
68  enum LocationType {
69    kAnyLocation,
70    kCodeLocation,
71    kDataLocation,
72    kCoprocLocation,
73    kLoadByteLocation,
74    kLoadHalfWordLocation,
75    kLoadWordLocation,
76    kLoadDoubleWordLocation,
77    kLoadSignedByteLocation,
78    kLoadSignedHalfWordLocation,
79    kLoadSinglePrecisionLocation,
80    kLoadDoublePrecisionLocation,
81    kStoreByteLocation,
82    kStoreHalfWordLocation,
83    kStoreWordLocation,
84    kStoreDoubleWordLocation,
85    kStoreSinglePrecisionLocation,
86    kStoreDoublePrecisionLocation,
87    kVld1Location,
88    kVld2Location,
89    kVld3Location,
90    kVld4Location,
91    kVst1Location,
92    kVst2Location,
93    kVst3Location,
94    kVst4Location
95  };
96
97  class ConditionPrinter {
98    const ITBlock& it_block_;
99    Condition cond_;
100
101   public:
102    ConditionPrinter(const ITBlock& it_block, Condition cond)
103        : it_block_(it_block), cond_(cond) {}
104    friend std::ostream& operator<<(std::ostream& os, ConditionPrinter cond) {
105      if (cond.it_block_.InITBlock() && cond.cond_.Is(al) &&
106          !cond.cond_.IsNone()) {
107        return os << "al";
108      }
109      return os << cond.cond_;
110    }
111  };
112
113  class PrintLabel {
114    LocationType location_type_;
115    Label* label_;
116    Label::Offset position_;
117
118   public:
119    PrintLabel(LocationType location_type, Label* label, Label::Offset position)
120        : location_type_(location_type), label_(label), position_(position) {}
121    LocationType GetLocationType() const { return location_type_; }
122    Label* GetLabel() const { return label_; }
123    Label::Offset GetPosition() const { return position_; }
124    friend inline std::ostream& operator<<(std::ostream& os,
125                                           const PrintLabel& label) {
126      if (label.label_->IsMinusZero()) {
127        os << "[pc, #-0]";
128      } else {
129        os << "0x" << std::hex << std::setw(8) << std::setfill('0')
130           << static_cast<int32_t>(label.label_->GetLocation() +
131                                   label.position_) << std::dec;
132      }
133      return os;
134    }
135  };
136
137  class PrintMemOperand {
138    LocationType location_type_;
139    const MemOperand& operand_;
140
141   public:
142    PrintMemOperand(LocationType location_type, const MemOperand& operand)
143        : location_type_(location_type), operand_(operand) {}
144    LocationType GetLocationType() const { return location_type_; }
145    const MemOperand& GetOperand() const { return operand_; }
146  };
147
148  class PrintAlignedMemOperand {
149    LocationType location_type_;
150    const AlignedMemOperand& operand_;
151
152   public:
153    PrintAlignedMemOperand(LocationType location_type,
154                           const AlignedMemOperand& operand)
155        : location_type_(location_type), operand_(operand) {}
156    LocationType GetLocationType() const { return location_type_; }
157    const AlignedMemOperand& GetOperand() const { return operand_; }
158  };
159
160  class DisassemblerStream {
161    std::ostream& os_;
162
163   public:
164    explicit DisassemblerStream(std::ostream& os) : os_(os) {}
165    virtual ~DisassemblerStream() {}
166    std::ostream& os() const { return os_; }
167    template <typename T>
168    DisassemblerStream& operator<<(T value) {
169      os_ << value;
170      return *this;
171    }
172    virtual DisassemblerStream& operator<<(const ConditionPrinter& cond) {
173      os_ << cond;
174      return *this;
175    }
176    virtual DisassemblerStream& operator<<(const Condition cond) {
177      os_ << cond;
178      return *this;
179    }
180    virtual DisassemblerStream& operator<<(const EncodingSize& size) {
181      os_ << size;
182      return *this;
183    }
184    virtual DisassemblerStream& operator<<(const DataType& type) {
185      os_ << type;
186      return *this;
187    }
188    virtual DisassemblerStream& operator<<(const Shift shift) {
189      os_ << shift;
190      return *this;
191    }
192    virtual DisassemblerStream& operator<<(const Sign sign) {
193      os_ << sign;
194      return *this;
195    }
196    virtual DisassemblerStream& operator<<(const Alignment alignment) {
197      os_ << alignment;
198      return *this;
199    }
200    virtual DisassemblerStream& operator<<(const PrintLabel& label) {
201      os_ << label;
202      return *this;
203    }
204    virtual DisassemblerStream& operator<<(const WriteBack& write_back) {
205      os_ << write_back;
206      return *this;
207    }
208    virtual DisassemblerStream& operator<<(const NeonImmediate& immediate) {
209      os_ << immediate;
210      return *this;
211    }
212    virtual DisassemblerStream& operator<<(const Register reg) {
213      os_ << reg;
214      return *this;
215    }
216    virtual DisassemblerStream& operator<<(const SRegister reg) {
217      os_ << reg;
218      return *this;
219    }
220    virtual DisassemblerStream& operator<<(const DRegister reg) {
221      os_ << reg;
222      return *this;
223    }
224    virtual DisassemblerStream& operator<<(const QRegister reg) {
225      os_ << reg;
226      return *this;
227    }
228    virtual DisassemblerStream& operator<<(const SpecialRegister reg) {
229      os_ << reg;
230      return *this;
231    }
232    virtual DisassemblerStream& operator<<(const MaskedSpecialRegister reg) {
233      os_ << reg;
234      return *this;
235    }
236    virtual DisassemblerStream& operator<<(const SpecialFPRegister reg) {
237      os_ << reg;
238      return *this;
239    }
240    virtual DisassemblerStream& operator<<(const BankedRegister reg) {
241      os_ << reg;
242      return *this;
243    }
244    virtual DisassemblerStream& operator<<(const RegisterList& list) {
245      os_ << list;
246      return *this;
247    }
248    virtual DisassemblerStream& operator<<(const SRegisterList& list) {
249      os_ << list;
250      return *this;
251    }
252    virtual DisassemblerStream& operator<<(const DRegisterList& list) {
253      os_ << list;
254      return *this;
255    }
256    virtual DisassemblerStream& operator<<(const NeonRegisterList& list) {
257      os_ << list;
258      return *this;
259    }
260    virtual DisassemblerStream& operator<<(const Coprocessor coproc) {
261      os_ << coproc;
262      return *this;
263    }
264    virtual DisassemblerStream& operator<<(const CRegister reg) {
265      os_ << reg;
266      return *this;
267    }
268    virtual DisassemblerStream& operator<<(const Endianness endian_specifier) {
269      os_ << endian_specifier;
270      return *this;
271    }
272    virtual DisassemblerStream& operator<<(const MemoryBarrier option) {
273      os_ << option;
274      return *this;
275    }
276    virtual DisassemblerStream& operator<<(const InterruptFlags iflags) {
277      os_ << iflags;
278      return *this;
279    }
280    virtual DisassemblerStream& operator<<(const Operand& operand) {
281      if (operand.IsImmediate()) {
282        return *this << "#" << operand.GetImmediate();
283      }
284      if (operand.IsImmediateShiftedRegister()) {
285        if ((operand.GetShift().IsLSL() || operand.GetShift().IsROR()) &&
286            (operand.GetShiftAmount() == 0)) {
287          return *this << operand.GetBaseRegister();
288        }
289        if (operand.GetShift().IsRRX()) {
290          return *this << operand.GetBaseRegister() << ", rrx";
291        }
292        return *this << operand.GetBaseRegister() << ", " << operand.GetShift()
293                     << " #" << operand.GetShiftAmount();
294      }
295      if (operand.IsRegisterShiftedRegister()) {
296        return *this << operand.GetBaseRegister() << ", " << operand.GetShift()
297                     << " " << operand.GetShiftRegister();
298      }
299      VIXL_UNREACHABLE();
300      return *this;
301    }
302    virtual DisassemblerStream& operator<<(const SOperand& operand) {
303      if (operand.IsImmediate()) {
304        return *this << operand.GetNeonImmediate();
305      }
306      return *this << operand.GetRegister();
307    }
308    virtual DisassemblerStream& operator<<(const DOperand& operand) {
309      if (operand.IsImmediate()) {
310        return *this << operand.GetNeonImmediate();
311      }
312      return *this << operand.GetRegister();
313    }
314    virtual DisassemblerStream& operator<<(const QOperand& operand) {
315      if (operand.IsImmediate()) {
316        return *this << operand.GetNeonImmediate();
317      }
318      return *this << operand.GetRegister();
319    }
320    virtual DisassemblerStream& operator<<(const MemOperand& operand) {
321      *this << "[" << operand.GetBaseRegister();
322      if (operand.GetAddrMode() == PostIndex) {
323        *this << "]";
324      }
325      if (operand.IsImmediate()) {
326        if ((operand.GetOffsetImmediate() != 0) ||
327            operand.GetSign().IsMinus() ||
328            ((operand.GetAddrMode() != Offset) && !operand.IsRegisterOnly())) {
329          if (operand.GetOffsetImmediate() == 0) {
330            *this << ", #" << operand.GetSign() << operand.GetOffsetImmediate();
331          } else {
332            *this << ", #" << operand.GetOffsetImmediate();
333          }
334        }
335      } else if (operand.IsPlainRegister()) {
336        *this << ", " << operand.GetSign() << operand.GetOffsetRegister();
337      } else if (operand.IsShiftedRegister()) {
338        *this << ", " << operand.GetSign() << operand.GetOffsetRegister()
339              << ImmediateShiftOperand(operand.GetShift(),
340                                       operand.GetShiftAmount());
341      } else {
342        VIXL_UNREACHABLE();
343        return *this;
344      }
345      if (operand.GetAddrMode() == Offset) {
346        *this << "]";
347      } else if (operand.GetAddrMode() == PreIndex) {
348        *this << "]!";
349      }
350      return *this;
351    }
352    virtual DisassemblerStream& operator<<(const PrintMemOperand& operand) {
353      return *this << operand.GetOperand();
354    }
355    virtual DisassemblerStream& operator<<(const AlignedMemOperand& operand) {
356      *this << "[" << operand.GetBaseRegister() << operand.GetAlignment()
357            << "]";
358      if (operand.GetAddrMode() == PostIndex) {
359        if (operand.IsPlainRegister()) {
360          *this << ", " << operand.GetOffsetRegister();
361        } else {
362          *this << "!";
363        }
364      }
365      return *this;
366    }
367    virtual DisassemblerStream& operator<<(
368        const PrintAlignedMemOperand& operand) {
369      return *this << operand.GetOperand();
370    }
371  };
372
373 private:
374  class ITBlockScope {
375    ITBlock* const it_block_;
376    bool inside_;
377
378   public:
379    explicit ITBlockScope(ITBlock* it_block)
380        : it_block_(it_block), inside_(it_block->InITBlock()) {}
381    ~ITBlockScope() {
382      if (inside_) it_block_->Advance();
383    }
384  };
385
386  ITBlock it_block_;
387  DisassemblerStream* os_;
388  bool owns_os_;
389  uint32_t pc_;
390
391 public:
392  explicit Disassembler(std::ostream& os, uint32_t pc = 0)  // NOLINT
393      : os_(new DisassemblerStream(os)),
394        owns_os_(true),
395        pc_(pc) {}
396  explicit Disassembler(DisassemblerStream* os, uint32_t pc = 0)  // NOLINT
397      : os_(os),
398        owns_os_(false),
399        pc_(pc) {}
400  virtual ~Disassembler() {
401    if (owns_os_) {
402      delete os_;
403    }
404  }
405  DisassemblerStream& os() const { return *os_; }
406  void SetIT(Condition first_condition, uint16_t it_mask) {
407    it_block_.Set(first_condition, it_mask);
408  }
409  const ITBlock& GetITBlock() const { return it_block_; }
410  bool InITBlock() const { return it_block_.InITBlock(); }
411  bool OutsideITBlock() const { return it_block_.OutsideITBlock(); }
412  bool OutsideITBlockOrLast() const { return it_block_.OutsideITBlockOrLast(); }
413  void CheckNotIT() const { VIXL_ASSERT(it_block_.OutsideITBlock()); }
414  // Return the current condition depending on the IT state for T32.
415  Condition CurrentCond() const {
416    if (it_block_.OutsideITBlock()) return al;
417    return it_block_.GetCurrentCondition();
418  }
419
420  virtual void UnallocatedT32(uint32_t instruction) {
421    if (T32Size(instruction) == 2) {
422      os() << "unallocated " << std::hex << std::setw(4) << std::setfill('0')
423           << (instruction >> 16) << std::dec;
424    } else {
425      os() << "unallocated " << std::hex << std::setw(8) << std::setfill('0')
426           << instruction << std::dec;
427    }
428  }
429  virtual void UnallocatedA32(uint32_t instruction) {
430    os() << "unallocated " << std::hex << std::setw(8) << std::setfill('0')
431         << instruction << std::dec;
432  }
433  virtual void UnimplementedT32_16(const char* name, uint32_t instruction) {
434    os() << "unimplemented " << name << " T32:" << std::hex << std::setw(4)
435         << std::setfill('0') << (instruction >> 16) << std::dec;
436  }
437  virtual void UnimplementedT32_32(const char* name, uint32_t instruction) {
438    os() << "unimplemented " << name << " T32:" << std::hex << std::setw(8)
439         << std::setfill('0') << instruction << std::dec;
440  }
441  virtual void UnimplementedA32(const char* name, uint32_t instruction) {
442    os() << "unimplemented " << name << " ARM:" << std::hex << std::setw(8)
443         << std::setfill('0') << instruction << std::dec;
444  }
445  virtual void Unpredictable() { os() << " ; unpredictable"; }
446  virtual void UnpredictableT32(uint32_t /*instr*/) { return Unpredictable(); }
447  virtual void UnpredictableA32(uint32_t /*instr*/) { return Unpredictable(); }
448
449  static bool Is16BitEncoding(uint32_t instr) { return instr < 0xe8000000; }
450  uint32_t GetPc() const { return pc_; }
451  void JumpToPc(uint32_t pc) { pc_ = pc; }
452
453  // Start of generated code.
454
455  void adc(Condition cond,
456           EncodingSize size,
457           Register rd,
458           Register rn,
459           const Operand& operand);
460
461  void adcs(Condition cond,
462            EncodingSize size,
463            Register rd,
464            Register rn,
465            const Operand& operand);
466
467  void add(Condition cond,
468           EncodingSize size,
469           Register rd,
470           Register rn,
471           const Operand& operand);
472
473  void add(Condition cond, Register rd, const Operand& operand);
474
475  void adds(Condition cond,
476            EncodingSize size,
477            Register rd,
478            Register rn,
479            const Operand& operand);
480
481  void adds(Register rd, const Operand& operand);
482
483  void addw(Condition cond, Register rd, Register rn, const Operand& operand);
484
485  void adr(Condition cond, EncodingSize size, Register rd, Label* label);
486
487  void and_(Condition cond,
488            EncodingSize size,
489            Register rd,
490            Register rn,
491            const Operand& operand);
492
493  void ands(Condition cond,
494            EncodingSize size,
495            Register rd,
496            Register rn,
497            const Operand& operand);
498
499  void asr(Condition cond,
500           EncodingSize size,
501           Register rd,
502           Register rm,
503           const Operand& operand);
504
505  void asrs(Condition cond,
506            EncodingSize size,
507            Register rd,
508            Register rm,
509            const Operand& operand);
510
511  void b(Condition cond, EncodingSize size, Label* label);
512
513  void bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand);
514
515  void bfi(Condition cond,
516           Register rd,
517           Register rn,
518           uint32_t lsb,
519           const Operand& operand);
520
521  void bic(Condition cond,
522           EncodingSize size,
523           Register rd,
524           Register rn,
525           const Operand& operand);
526
527  void bics(Condition cond,
528            EncodingSize size,
529            Register rd,
530            Register rn,
531            const Operand& operand);
532
533  void bkpt(Condition cond, uint32_t imm);
534
535  void bl(Condition cond, Label* label);
536
537  void blx(Condition cond, Label* label);
538
539  void blx(Condition cond, Register rm);
540
541  void bx(Condition cond, Register rm);
542
543  void bxj(Condition cond, Register rm);
544
545  void cbnz(Register rn, Label* label);
546
547  void cbz(Register rn, Label* label);
548
549  void clrex(Condition cond);
550
551  void clz(Condition cond, Register rd, Register rm);
552
553  void cmn(Condition cond,
554           EncodingSize size,
555           Register rn,
556           const Operand& operand);
557
558  void cmp(Condition cond,
559           EncodingSize size,
560           Register rn,
561           const Operand& operand);
562
563  void crc32b(Condition cond, Register rd, Register rn, Register rm);
564
565  void crc32cb(Condition cond, Register rd, Register rn, Register rm);
566
567  void crc32ch(Condition cond, Register rd, Register rn, Register rm);
568
569  void crc32cw(Condition cond, Register rd, Register rn, Register rm);
570
571  void crc32h(Condition cond, Register rd, Register rn, Register rm);
572
573  void crc32w(Condition cond, Register rd, Register rn, Register rm);
574
575  void dmb(Condition cond, MemoryBarrier option);
576
577  void dsb(Condition cond, MemoryBarrier option);
578
579  void eor(Condition cond,
580           EncodingSize size,
581           Register rd,
582           Register rn,
583           const Operand& operand);
584
585  void eors(Condition cond,
586            EncodingSize size,
587            Register rd,
588            Register rn,
589            const Operand& operand);
590
591  void fldmdbx(Condition cond,
592               Register rn,
593               WriteBack write_back,
594               DRegisterList dreglist);
595
596  void fldmiax(Condition cond,
597               Register rn,
598               WriteBack write_back,
599               DRegisterList dreglist);
600
601  void fstmdbx(Condition cond,
602               Register rn,
603               WriteBack write_back,
604               DRegisterList dreglist);
605
606  void fstmiax(Condition cond,
607               Register rn,
608               WriteBack write_back,
609               DRegisterList dreglist);
610
611  void hlt(Condition cond, uint32_t imm);
612
613  void hvc(Condition cond, uint32_t imm);
614
615  void isb(Condition cond, MemoryBarrier option);
616
617  void it(Condition cond, uint16_t mask);
618
619  void lda(Condition cond, Register rt, const MemOperand& operand);
620
621  void ldab(Condition cond, Register rt, const MemOperand& operand);
622
623  void ldaex(Condition cond, Register rt, const MemOperand& operand);
624
625  void ldaexb(Condition cond, Register rt, const MemOperand& operand);
626
627  void ldaexd(Condition cond,
628              Register rt,
629              Register rt2,
630              const MemOperand& operand);
631
632  void ldaexh(Condition cond, Register rt, const MemOperand& operand);
633
634  void ldah(Condition cond, Register rt, const MemOperand& operand);
635
636  void ldm(Condition cond,
637           EncodingSize size,
638           Register rn,
639           WriteBack write_back,
640           RegisterList registers);
641
642  void ldmda(Condition cond,
643             Register rn,
644             WriteBack write_back,
645             RegisterList registers);
646
647  void ldmdb(Condition cond,
648             Register rn,
649             WriteBack write_back,
650             RegisterList registers);
651
652  void ldmea(Condition cond,
653             Register rn,
654             WriteBack write_back,
655             RegisterList registers);
656
657  void ldmed(Condition cond,
658             Register rn,
659             WriteBack write_back,
660             RegisterList registers);
661
662  void ldmfa(Condition cond,
663             Register rn,
664             WriteBack write_back,
665             RegisterList registers);
666
667  void ldmfd(Condition cond,
668             EncodingSize size,
669             Register rn,
670             WriteBack write_back,
671             RegisterList registers);
672
673  void ldmib(Condition cond,
674             Register rn,
675             WriteBack write_back,
676             RegisterList registers);
677
678  void ldr(Condition cond,
679           EncodingSize size,
680           Register rt,
681           const MemOperand& operand);
682
683  void ldr(Condition cond, EncodingSize size, Register rt, Label* label);
684
685  void ldrb(Condition cond,
686            EncodingSize size,
687            Register rt,
688            const MemOperand& operand);
689
690  void ldrb(Condition cond, Register rt, Label* label);
691
692  void ldrd(Condition cond,
693            Register rt,
694            Register rt2,
695            const MemOperand& operand);
696
697  void ldrd(Condition cond, Register rt, Register rt2, Label* label);
698
699  void ldrex(Condition cond, Register rt, const MemOperand& operand);
700
701  void ldrexb(Condition cond, Register rt, const MemOperand& operand);
702
703  void ldrexd(Condition cond,
704              Register rt,
705              Register rt2,
706              const MemOperand& operand);
707
708  void ldrexh(Condition cond, Register rt, const MemOperand& operand);
709
710  void ldrh(Condition cond,
711            EncodingSize size,
712            Register rt,
713            const MemOperand& operand);
714
715  void ldrh(Condition cond, Register rt, Label* label);
716
717  void ldrsb(Condition cond,
718             EncodingSize size,
719             Register rt,
720             const MemOperand& operand);
721
722  void ldrsb(Condition cond, Register rt, Label* label);
723
724  void ldrsh(Condition cond,
725             EncodingSize size,
726             Register rt,
727             const MemOperand& operand);
728
729  void ldrsh(Condition cond, Register rt, Label* label);
730
731  void lsl(Condition cond,
732           EncodingSize size,
733           Register rd,
734           Register rm,
735           const Operand& operand);
736
737  void lsls(Condition cond,
738            EncodingSize size,
739            Register rd,
740            Register rm,
741            const Operand& operand);
742
743  void lsr(Condition cond,
744           EncodingSize size,
745           Register rd,
746           Register rm,
747           const Operand& operand);
748
749  void lsrs(Condition cond,
750            EncodingSize size,
751            Register rd,
752            Register rm,
753            const Operand& operand);
754
755  void mla(Condition cond, Register rd, Register rn, Register rm, Register ra);
756
757  void mlas(Condition cond, Register rd, Register rn, Register rm, Register ra);
758
759  void mls(Condition cond, Register rd, Register rn, Register rm, Register ra);
760
761  void mov(Condition cond,
762           EncodingSize size,
763           Register rd,
764           const Operand& operand);
765
766  void movs(Condition cond,
767            EncodingSize size,
768            Register rd,
769            const Operand& operand);
770
771  void movt(Condition cond, Register rd, const Operand& operand);
772
773  void movw(Condition cond, Register rd, const Operand& operand);
774
775  void mrs(Condition cond, Register rd, SpecialRegister spec_reg);
776
777  void msr(Condition cond,
778           MaskedSpecialRegister spec_reg,
779           const Operand& operand);
780
781  void mul(
782      Condition cond, EncodingSize size, Register rd, Register rn, Register rm);
783
784  void muls(Condition cond, Register rd, Register rn, Register rm);
785
786  void mvn(Condition cond,
787           EncodingSize size,
788           Register rd,
789           const Operand& operand);
790
791  void mvns(Condition cond,
792            EncodingSize size,
793            Register rd,
794            const Operand& operand);
795
796  void nop(Condition cond, EncodingSize size);
797
798  void orn(Condition cond, Register rd, Register rn, const Operand& operand);
799
800  void orns(Condition cond, Register rd, Register rn, const Operand& operand);
801
802  void orr(Condition cond,
803           EncodingSize size,
804           Register rd,
805           Register rn,
806           const Operand& operand);
807
808  void orrs(Condition cond,
809            EncodingSize size,
810            Register rd,
811            Register rn,
812            const Operand& operand);
813
814  void pkhbt(Condition cond, Register rd, Register rn, const Operand& operand);
815
816  void pkhtb(Condition cond, Register rd, Register rn, const Operand& operand);
817
818  void pld(Condition cond, Label* label);
819
820  void pld(Condition cond, const MemOperand& operand);
821
822  void pldw(Condition cond, const MemOperand& operand);
823
824  void pli(Condition cond, const MemOperand& operand);
825
826  void pli(Condition cond, Label* label);
827
828  void pop(Condition cond, EncodingSize size, RegisterList registers);
829
830  void pop(Condition cond, EncodingSize size, Register rt);
831
832  void push(Condition cond, EncodingSize size, RegisterList registers);
833
834  void push(Condition cond, EncodingSize size, Register rt);
835
836  void qadd(Condition cond, Register rd, Register rm, Register rn);
837
838  void qadd16(Condition cond, Register rd, Register rn, Register rm);
839
840  void qadd8(Condition cond, Register rd, Register rn, Register rm);
841
842  void qasx(Condition cond, Register rd, Register rn, Register rm);
843
844  void qdadd(Condition cond, Register rd, Register rm, Register rn);
845
846  void qdsub(Condition cond, Register rd, Register rm, Register rn);
847
848  void qsax(Condition cond, Register rd, Register rn, Register rm);
849
850  void qsub(Condition cond, Register rd, Register rm, Register rn);
851
852  void qsub16(Condition cond, Register rd, Register rn, Register rm);
853
854  void qsub8(Condition cond, Register rd, Register rn, Register rm);
855
856  void rbit(Condition cond, Register rd, Register rm);
857
858  void rev(Condition cond, EncodingSize size, Register rd, Register rm);
859
860  void rev16(Condition cond, EncodingSize size, Register rd, Register rm);
861
862  void revsh(Condition cond, EncodingSize size, Register rd, Register rm);
863
864  void ror(Condition cond,
865           EncodingSize size,
866           Register rd,
867           Register rm,
868           const Operand& operand);
869
870  void rors(Condition cond,
871            EncodingSize size,
872            Register rd,
873            Register rm,
874            const Operand& operand);
875
876  void rrx(Condition cond, Register rd, Register rm);
877
878  void rrxs(Condition cond, Register rd, Register rm);
879
880  void rsb(Condition cond,
881           EncodingSize size,
882           Register rd,
883           Register rn,
884           const Operand& operand);
885
886  void rsbs(Condition cond,
887            EncodingSize size,
888            Register rd,
889            Register rn,
890            const Operand& operand);
891
892  void rsc(Condition cond, Register rd, Register rn, const Operand& operand);
893
894  void rscs(Condition cond, Register rd, Register rn, const Operand& operand);
895
896  void sadd16(Condition cond, Register rd, Register rn, Register rm);
897
898  void sadd8(Condition cond, Register rd, Register rn, Register rm);
899
900  void sasx(Condition cond, Register rd, Register rn, Register rm);
901
902  void sbc(Condition cond,
903           EncodingSize size,
904           Register rd,
905           Register rn,
906           const Operand& operand);
907
908  void sbcs(Condition cond,
909            EncodingSize size,
910            Register rd,
911            Register rn,
912            const Operand& operand);
913
914  void sbfx(Condition cond,
915            Register rd,
916            Register rn,
917            uint32_t lsb,
918            const Operand& operand);
919
920  void sdiv(Condition cond, Register rd, Register rn, Register rm);
921
922  void sel(Condition cond, Register rd, Register rn, Register rm);
923
924  void shadd16(Condition cond, Register rd, Register rn, Register rm);
925
926  void shadd8(Condition cond, Register rd, Register rn, Register rm);
927
928  void shasx(Condition cond, Register rd, Register rn, Register rm);
929
930  void shsax(Condition cond, Register rd, Register rn, Register rm);
931
932  void shsub16(Condition cond, Register rd, Register rn, Register rm);
933
934  void shsub8(Condition cond, Register rd, Register rn, Register rm);
935
936  void smlabb(
937      Condition cond, Register rd, Register rn, Register rm, Register ra);
938
939  void smlabt(
940      Condition cond, Register rd, Register rn, Register rm, Register ra);
941
942  void smlad(
943      Condition cond, Register rd, Register rn, Register rm, Register ra);
944
945  void smladx(
946      Condition cond, Register rd, Register rn, Register rm, Register ra);
947
948  void smlal(
949      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
950
951  void smlalbb(
952      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
953
954  void smlalbt(
955      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
956
957  void smlald(
958      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
959
960  void smlaldx(
961      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
962
963  void smlals(
964      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
965
966  void smlaltb(
967      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
968
969  void smlaltt(
970      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
971
972  void smlatb(
973      Condition cond, Register rd, Register rn, Register rm, Register ra);
974
975  void smlatt(
976      Condition cond, Register rd, Register rn, Register rm, Register ra);
977
978  void smlawb(
979      Condition cond, Register rd, Register rn, Register rm, Register ra);
980
981  void smlawt(
982      Condition cond, Register rd, Register rn, Register rm, Register ra);
983
984  void smlsd(
985      Condition cond, Register rd, Register rn, Register rm, Register ra);
986
987  void smlsdx(
988      Condition cond, Register rd, Register rn, Register rm, Register ra);
989
990  void smlsld(
991      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
992
993  void smlsldx(
994      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
995
996  void smmla(
997      Condition cond, Register rd, Register rn, Register rm, Register ra);
998
999  void smmlar(
1000      Condition cond, Register rd, Register rn, Register rm, Register ra);
1001
1002  void smmls(
1003      Condition cond, Register rd, Register rn, Register rm, Register ra);
1004
1005  void smmlsr(
1006      Condition cond, Register rd, Register rn, Register rm, Register ra);
1007
1008  void smmul(Condition cond, Register rd, Register rn, Register rm);
1009
1010  void smmulr(Condition cond, Register rd, Register rn, Register rm);
1011
1012  void smuad(Condition cond, Register rd, Register rn, Register rm);
1013
1014  void smuadx(Condition cond, Register rd, Register rn, Register rm);
1015
1016  void smulbb(Condition cond, Register rd, Register rn, Register rm);
1017
1018  void smulbt(Condition cond, Register rd, Register rn, Register rm);
1019
1020  void smull(
1021      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1022
1023  void smulls(
1024      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1025
1026  void smultb(Condition cond, Register rd, Register rn, Register rm);
1027
1028  void smultt(Condition cond, Register rd, Register rn, Register rm);
1029
1030  void smulwb(Condition cond, Register rd, Register rn, Register rm);
1031
1032  void smulwt(Condition cond, Register rd, Register rn, Register rm);
1033
1034  void smusd(Condition cond, Register rd, Register rn, Register rm);
1035
1036  void smusdx(Condition cond, Register rd, Register rn, Register rm);
1037
1038  void ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand);
1039
1040  void ssat16(Condition cond, Register rd, uint32_t imm, Register rn);
1041
1042  void ssax(Condition cond, Register rd, Register rn, Register rm);
1043
1044  void ssub16(Condition cond, Register rd, Register rn, Register rm);
1045
1046  void ssub8(Condition cond, Register rd, Register rn, Register rm);
1047
1048  void stl(Condition cond, Register rt, const MemOperand& operand);
1049
1050  void stlb(Condition cond, Register rt, const MemOperand& operand);
1051
1052  void stlex(Condition cond,
1053             Register rd,
1054             Register rt,
1055             const MemOperand& operand);
1056
1057  void stlexb(Condition cond,
1058              Register rd,
1059              Register rt,
1060              const MemOperand& operand);
1061
1062  void stlexd(Condition cond,
1063              Register rd,
1064              Register rt,
1065              Register rt2,
1066              const MemOperand& operand);
1067
1068  void stlexh(Condition cond,
1069              Register rd,
1070              Register rt,
1071              const MemOperand& operand);
1072
1073  void stlh(Condition cond, Register rt, const MemOperand& operand);
1074
1075  void stm(Condition cond,
1076           EncodingSize size,
1077           Register rn,
1078           WriteBack write_back,
1079           RegisterList registers);
1080
1081  void stmda(Condition cond,
1082             Register rn,
1083             WriteBack write_back,
1084             RegisterList registers);
1085
1086  void stmdb(Condition cond,
1087             EncodingSize size,
1088             Register rn,
1089             WriteBack write_back,
1090             RegisterList registers);
1091
1092  void stmea(Condition cond,
1093             EncodingSize size,
1094             Register rn,
1095             WriteBack write_back,
1096             RegisterList registers);
1097
1098  void stmed(Condition cond,
1099             Register rn,
1100             WriteBack write_back,
1101             RegisterList registers);
1102
1103  void stmfa(Condition cond,
1104             Register rn,
1105             WriteBack write_back,
1106             RegisterList registers);
1107
1108  void stmfd(Condition cond,
1109             Register rn,
1110             WriteBack write_back,
1111             RegisterList registers);
1112
1113  void stmib(Condition cond,
1114             Register rn,
1115             WriteBack write_back,
1116             RegisterList registers);
1117
1118  void str(Condition cond,
1119           EncodingSize size,
1120           Register rt,
1121           const MemOperand& operand);
1122
1123  void strb(Condition cond,
1124            EncodingSize size,
1125            Register rt,
1126            const MemOperand& operand);
1127
1128  void strd(Condition cond,
1129            Register rt,
1130            Register rt2,
1131            const MemOperand& operand);
1132
1133  void strex(Condition cond,
1134             Register rd,
1135             Register rt,
1136             const MemOperand& operand);
1137
1138  void strexb(Condition cond,
1139              Register rd,
1140              Register rt,
1141              const MemOperand& operand);
1142
1143  void strexd(Condition cond,
1144              Register rd,
1145              Register rt,
1146              Register rt2,
1147              const MemOperand& operand);
1148
1149  void strexh(Condition cond,
1150              Register rd,
1151              Register rt,
1152              const MemOperand& operand);
1153
1154  void strh(Condition cond,
1155            EncodingSize size,
1156            Register rt,
1157            const MemOperand& operand);
1158
1159  void sub(Condition cond,
1160           EncodingSize size,
1161           Register rd,
1162           Register rn,
1163           const Operand& operand);
1164
1165  void sub(Condition cond, Register rd, const Operand& operand);
1166
1167  void subs(Condition cond,
1168            EncodingSize size,
1169            Register rd,
1170            Register rn,
1171            const Operand& operand);
1172
1173  void subs(Register rd, const Operand& operand);
1174
1175  void subw(Condition cond, Register rd, Register rn, const Operand& operand);
1176
1177  void svc(Condition cond, uint32_t imm);
1178
1179  void sxtab(Condition cond, Register rd, Register rn, const Operand& operand);
1180
1181  void sxtab16(Condition cond,
1182               Register rd,
1183               Register rn,
1184               const Operand& operand);
1185
1186  void sxtah(Condition cond, Register rd, Register rn, const Operand& operand);
1187
1188  void sxtb(Condition cond,
1189            EncodingSize size,
1190            Register rd,
1191            const Operand& operand);
1192
1193  void sxtb16(Condition cond, Register rd, const Operand& operand);
1194
1195  void sxth(Condition cond,
1196            EncodingSize size,
1197            Register rd,
1198            const Operand& operand);
1199
1200  void tbb(Condition cond, Register rn, Register rm);
1201
1202  void tbh(Condition cond, Register rn, Register rm);
1203
1204  void teq(Condition cond, Register rn, const Operand& operand);
1205
1206  void tst(Condition cond,
1207           EncodingSize size,
1208           Register rn,
1209           const Operand& operand);
1210
1211  void uadd16(Condition cond, Register rd, Register rn, Register rm);
1212
1213  void uadd8(Condition cond, Register rd, Register rn, Register rm);
1214
1215  void uasx(Condition cond, Register rd, Register rn, Register rm);
1216
1217  void ubfx(Condition cond,
1218            Register rd,
1219            Register rn,
1220            uint32_t lsb,
1221            const Operand& operand);
1222
1223  void udf(Condition cond, EncodingSize size, uint32_t imm);
1224
1225  void udiv(Condition cond, Register rd, Register rn, Register rm);
1226
1227  void uhadd16(Condition cond, Register rd, Register rn, Register rm);
1228
1229  void uhadd8(Condition cond, Register rd, Register rn, Register rm);
1230
1231  void uhasx(Condition cond, Register rd, Register rn, Register rm);
1232
1233  void uhsax(Condition cond, Register rd, Register rn, Register rm);
1234
1235  void uhsub16(Condition cond, Register rd, Register rn, Register rm);
1236
1237  void uhsub8(Condition cond, Register rd, Register rn, Register rm);
1238
1239  void umaal(
1240      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1241
1242  void umlal(
1243      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1244
1245  void umlals(
1246      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1247
1248  void umull(
1249      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1250
1251  void umulls(
1252      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1253
1254  void uqadd16(Condition cond, Register rd, Register rn, Register rm);
1255
1256  void uqadd8(Condition cond, Register rd, Register rn, Register rm);
1257
1258  void uqasx(Condition cond, Register rd, Register rn, Register rm);
1259
1260  void uqsax(Condition cond, Register rd, Register rn, Register rm);
1261
1262  void uqsub16(Condition cond, Register rd, Register rn, Register rm);
1263
1264  void uqsub8(Condition cond, Register rd, Register rn, Register rm);
1265
1266  void usad8(Condition cond, Register rd, Register rn, Register rm);
1267
1268  void usada8(
1269      Condition cond, Register rd, Register rn, Register rm, Register ra);
1270
1271  void usat(Condition cond, Register rd, uint32_t imm, const Operand& operand);
1272
1273  void usat16(Condition cond, Register rd, uint32_t imm, Register rn);
1274
1275  void usax(Condition cond, Register rd, Register rn, Register rm);
1276
1277  void usub16(Condition cond, Register rd, Register rn, Register rm);
1278
1279  void usub8(Condition cond, Register rd, Register rn, Register rm);
1280
1281  void uxtab(Condition cond, Register rd, Register rn, const Operand& operand);
1282
1283  void uxtab16(Condition cond,
1284               Register rd,
1285               Register rn,
1286               const Operand& operand);
1287
1288  void uxtah(Condition cond, Register rd, Register rn, const Operand& operand);
1289
1290  void uxtb(Condition cond,
1291            EncodingSize size,
1292            Register rd,
1293            const Operand& operand);
1294
1295  void uxtb16(Condition cond, Register rd, const Operand& operand);
1296
1297  void uxth(Condition cond,
1298            EncodingSize size,
1299            Register rd,
1300            const Operand& operand);
1301
1302  void vaba(
1303      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1304
1305  void vaba(
1306      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1307
1308  void vabal(
1309      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1310
1311  void vabd(
1312      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1313
1314  void vabd(
1315      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1316
1317  void vabdl(
1318      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1319
1320  void vabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
1321
1322  void vabs(Condition cond, DataType dt, QRegister rd, QRegister rm);
1323
1324  void vabs(Condition cond, DataType dt, SRegister rd, SRegister rm);
1325
1326  void vacge(
1327      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1328
1329  void vacge(
1330      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1331
1332  void vacgt(
1333      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1334
1335  void vacgt(
1336      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1337
1338  void vacle(
1339      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1340
1341  void vacle(
1342      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1343
1344  void vaclt(
1345      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1346
1347  void vaclt(
1348      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1349
1350  void vadd(
1351      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1352
1353  void vadd(
1354      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1355
1356  void vadd(
1357      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1358
1359  void vaddhn(
1360      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
1361
1362  void vaddl(
1363      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1364
1365  void vaddw(
1366      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
1367
1368  void vand(Condition cond,
1369            DataType dt,
1370            DRegister rd,
1371            DRegister rn,
1372            const DOperand& operand);
1373
1374  void vand(Condition cond,
1375            DataType dt,
1376            QRegister rd,
1377            QRegister rn,
1378            const QOperand& operand);
1379
1380  void vbic(Condition cond,
1381            DataType dt,
1382            DRegister rd,
1383            DRegister rn,
1384            const DOperand& operand);
1385
1386  void vbic(Condition cond,
1387            DataType dt,
1388            QRegister rd,
1389            QRegister rn,
1390            const QOperand& operand);
1391
1392  void vbif(
1393      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1394
1395  void vbif(
1396      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1397
1398  void vbit(
1399      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1400
1401  void vbit(
1402      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1403
1404  void vbsl(
1405      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1406
1407  void vbsl(
1408      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1409
1410  void vceq(Condition cond,
1411            DataType dt,
1412            DRegister rd,
1413            DRegister rm,
1414            const DOperand& operand);
1415
1416  void vceq(Condition cond,
1417            DataType dt,
1418            QRegister rd,
1419            QRegister rm,
1420            const QOperand& operand);
1421
1422  void vceq(
1423      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1424
1425  void vceq(
1426      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1427
1428  void vcge(Condition cond,
1429            DataType dt,
1430            DRegister rd,
1431            DRegister rm,
1432            const DOperand& operand);
1433
1434  void vcge(Condition cond,
1435            DataType dt,
1436            QRegister rd,
1437            QRegister rm,
1438            const QOperand& operand);
1439
1440  void vcge(
1441      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1442
1443  void vcge(
1444      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1445
1446  void vcgt(Condition cond,
1447            DataType dt,
1448            DRegister rd,
1449            DRegister rm,
1450            const DOperand& operand);
1451
1452  void vcgt(Condition cond,
1453            DataType dt,
1454            QRegister rd,
1455            QRegister rm,
1456            const QOperand& operand);
1457
1458  void vcgt(
1459      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1460
1461  void vcgt(
1462      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1463
1464  void vcle(Condition cond,
1465            DataType dt,
1466            DRegister rd,
1467            DRegister rm,
1468            const DOperand& operand);
1469
1470  void vcle(Condition cond,
1471            DataType dt,
1472            QRegister rd,
1473            QRegister rm,
1474            const QOperand& operand);
1475
1476  void vcle(
1477      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1478
1479  void vcle(
1480      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1481
1482  void vcls(Condition cond, DataType dt, DRegister rd, DRegister rm);
1483
1484  void vcls(Condition cond, DataType dt, QRegister rd, QRegister rm);
1485
1486  void vclt(Condition cond,
1487            DataType dt,
1488            DRegister rd,
1489            DRegister rm,
1490            const DOperand& operand);
1491
1492  void vclt(Condition cond,
1493            DataType dt,
1494            QRegister rd,
1495            QRegister rm,
1496            const QOperand& operand);
1497
1498  void vclt(
1499      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1500
1501  void vclt(
1502      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1503
1504  void vclz(Condition cond, DataType dt, DRegister rd, DRegister rm);
1505
1506  void vclz(Condition cond, DataType dt, QRegister rd, QRegister rm);
1507
1508  void vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm);
1509
1510  void vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm);
1511
1512  void vcmp(Condition cond, DataType dt, SRegister rd, double imm);
1513
1514  void vcmp(Condition cond, DataType dt, DRegister rd, double imm);
1515
1516  void vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm);
1517
1518  void vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm);
1519
1520  void vcmpe(Condition cond, DataType dt, SRegister rd, double imm);
1521
1522  void vcmpe(Condition cond, DataType dt, DRegister rd, double imm);
1523
1524  void vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm);
1525
1526  void vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm);
1527
1528  void vcvt(
1529      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1530
1531  void vcvt(
1532      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1533
1534  void vcvt(Condition cond,
1535            DataType dt1,
1536            DataType dt2,
1537            DRegister rd,
1538            DRegister rm,
1539            int32_t fbits);
1540
1541  void vcvt(Condition cond,
1542            DataType dt1,
1543            DataType dt2,
1544            QRegister rd,
1545            QRegister rm,
1546            int32_t fbits);
1547
1548  void vcvt(Condition cond,
1549            DataType dt1,
1550            DataType dt2,
1551            SRegister rd,
1552            SRegister rm,
1553            int32_t fbits);
1554
1555  void vcvt(
1556      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1557
1558  void vcvt(
1559      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1560
1561  void vcvt(
1562      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm);
1563
1564  void vcvt(
1565      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm);
1566
1567  void vcvt(
1568      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1569
1570  void vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1571
1572  void vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1573
1574  void vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1575
1576  void vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1577
1578  void vcvtb(
1579      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1580
1581  void vcvtb(
1582      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1583
1584  void vcvtb(
1585      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1586
1587  void vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1588
1589  void vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1590
1591  void vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1592
1593  void vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1594
1595  void vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1596
1597  void vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1598
1599  void vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1600
1601  void vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1602
1603  void vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1604
1605  void vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1606
1607  void vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1608
1609  void vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1610
1611  void vcvtr(
1612      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1613
1614  void vcvtr(
1615      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1616
1617  void vcvtt(
1618      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1619
1620  void vcvtt(
1621      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1622
1623  void vcvtt(
1624      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1625
1626  void vdiv(
1627      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1628
1629  void vdiv(
1630      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1631
1632  void vdup(Condition cond, DataType dt, QRegister rd, Register rt);
1633
1634  void vdup(Condition cond, DataType dt, DRegister rd, Register rt);
1635
1636  void vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm);
1637
1638  void vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm);
1639
1640  void veor(
1641      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1642
1643  void veor(
1644      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1645
1646  void vext(Condition cond,
1647            DataType dt,
1648            DRegister rd,
1649            DRegister rn,
1650            DRegister rm,
1651            const DOperand& operand);
1652
1653  void vext(Condition cond,
1654            DataType dt,
1655            QRegister rd,
1656            QRegister rn,
1657            QRegister rm,
1658            const QOperand& operand);
1659
1660  void vfma(
1661      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1662
1663  void vfma(
1664      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1665
1666  void vfma(
1667      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1668
1669  void vfms(
1670      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1671
1672  void vfms(
1673      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1674
1675  void vfms(
1676      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1677
1678  void vfnma(
1679      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1680
1681  void vfnma(
1682      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1683
1684  void vfnms(
1685      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1686
1687  void vfnms(
1688      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1689
1690  void vhadd(
1691      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1692
1693  void vhadd(
1694      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1695
1696  void vhsub(
1697      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1698
1699  void vhsub(
1700      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1701
1702  void vld1(Condition cond,
1703            DataType dt,
1704            const NeonRegisterList& nreglist,
1705            const AlignedMemOperand& operand);
1706
1707  void vld2(Condition cond,
1708            DataType dt,
1709            const NeonRegisterList& nreglist,
1710            const AlignedMemOperand& operand);
1711
1712  void vld3(Condition cond,
1713            DataType dt,
1714            const NeonRegisterList& nreglist,
1715            const AlignedMemOperand& operand);
1716
1717  void vld3(Condition cond,
1718            DataType dt,
1719            const NeonRegisterList& nreglist,
1720            const MemOperand& operand);
1721
1722  void vld4(Condition cond,
1723            DataType dt,
1724            const NeonRegisterList& nreglist,
1725            const AlignedMemOperand& operand);
1726
1727  void vldm(Condition cond,
1728            DataType dt,
1729            Register rn,
1730            WriteBack write_back,
1731            DRegisterList dreglist);
1732
1733  void vldm(Condition cond,
1734            DataType dt,
1735            Register rn,
1736            WriteBack write_back,
1737            SRegisterList sreglist);
1738
1739  void vldmdb(Condition cond,
1740              DataType dt,
1741              Register rn,
1742              WriteBack write_back,
1743              DRegisterList dreglist);
1744
1745  void vldmdb(Condition cond,
1746              DataType dt,
1747              Register rn,
1748              WriteBack write_back,
1749              SRegisterList sreglist);
1750
1751  void vldmia(Condition cond,
1752              DataType dt,
1753              Register rn,
1754              WriteBack write_back,
1755              DRegisterList dreglist);
1756
1757  void vldmia(Condition cond,
1758              DataType dt,
1759              Register rn,
1760              WriteBack write_back,
1761              SRegisterList sreglist);
1762
1763  void vldr(Condition cond, DataType dt, DRegister rd, Label* label);
1764
1765  void vldr(Condition cond,
1766            DataType dt,
1767            DRegister rd,
1768            const MemOperand& operand);
1769
1770  void vldr(Condition cond, DataType dt, SRegister rd, Label* label);
1771
1772  void vldr(Condition cond,
1773            DataType dt,
1774            SRegister rd,
1775            const MemOperand& operand);
1776
1777  void vmax(
1778      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1779
1780  void vmax(
1781      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1782
1783  void vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm);
1784
1785  void vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm);
1786
1787  void vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm);
1788
1789  void vmin(
1790      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1791
1792  void vmin(
1793      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1794
1795  void vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm);
1796
1797  void vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm);
1798
1799  void vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm);
1800
1801  void vmla(Condition cond,
1802            DataType dt,
1803            DRegister rd,
1804            DRegister rn,
1805            DRegisterLane rm);
1806
1807  void vmla(Condition cond,
1808            DataType dt,
1809            QRegister rd,
1810            QRegister rn,
1811            DRegisterLane rm);
1812
1813  void vmla(
1814      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1815
1816  void vmla(
1817      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1818
1819  void vmla(
1820      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1821
1822  void vmlal(Condition cond,
1823             DataType dt,
1824             QRegister rd,
1825             DRegister rn,
1826             DRegisterLane rm);
1827
1828  void vmlal(
1829      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1830
1831  void vmls(Condition cond,
1832            DataType dt,
1833            DRegister rd,
1834            DRegister rn,
1835            DRegisterLane rm);
1836
1837  void vmls(Condition cond,
1838            DataType dt,
1839            QRegister rd,
1840            QRegister rn,
1841            DRegisterLane rm);
1842
1843  void vmls(
1844      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1845
1846  void vmls(
1847      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1848
1849  void vmls(
1850      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1851
1852  void vmlsl(Condition cond,
1853             DataType dt,
1854             QRegister rd,
1855             DRegister rn,
1856             DRegisterLane rm);
1857
1858  void vmlsl(
1859      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1860
1861  void vmov(Condition cond, Register rt, SRegister rn);
1862
1863  void vmov(Condition cond, SRegister rn, Register rt);
1864
1865  void vmov(Condition cond, Register rt, Register rt2, DRegister rm);
1866
1867  void vmov(Condition cond, DRegister rm, Register rt, Register rt2);
1868
1869  void vmov(
1870      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
1871
1872  void vmov(
1873      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
1874
1875  void vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt);
1876
1877  void vmov(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
1878
1879  void vmov(Condition cond, DataType dt, QRegister rd, const QOperand& operand);
1880
1881  void vmov(Condition cond, DataType dt, SRegister rd, const SOperand& operand);
1882
1883  void vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn);
1884
1885  void vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm);
1886
1887  void vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
1888
1889  void vmrs(Condition cond, RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg);
1890
1891  void vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt);
1892
1893  void vmul(Condition cond,
1894            DataType dt,
1895            DRegister rd,
1896            DRegister rn,
1897            DRegister dm,
1898            unsigned index);
1899
1900  void vmul(Condition cond,
1901            DataType dt,
1902            QRegister rd,
1903            QRegister rn,
1904            DRegister dm,
1905            unsigned index);
1906
1907  void vmul(
1908      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1909
1910  void vmul(
1911      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1912
1913  void vmul(
1914      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1915
1916  void vmull(Condition cond,
1917             DataType dt,
1918             QRegister rd,
1919             DRegister rn,
1920             DRegister dm,
1921             unsigned index);
1922
1923  void vmull(
1924      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1925
1926  void vmvn(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
1927
1928  void vmvn(Condition cond, DataType dt, QRegister rd, const QOperand& operand);
1929
1930  void vneg(Condition cond, DataType dt, DRegister rd, DRegister rm);
1931
1932  void vneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
1933
1934  void vneg(Condition cond, DataType dt, SRegister rd, SRegister rm);
1935
1936  void vnmla(
1937      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1938
1939  void vnmla(
1940      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1941
1942  void vnmls(
1943      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1944
1945  void vnmls(
1946      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1947
1948  void vnmul(
1949      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1950
1951  void vnmul(
1952      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1953
1954  void vorn(Condition cond,
1955            DataType dt,
1956            DRegister rd,
1957            DRegister rn,
1958            const DOperand& operand);
1959
1960  void vorn(Condition cond,
1961            DataType dt,
1962            QRegister rd,
1963            QRegister rn,
1964            const QOperand& operand);
1965
1966  void vorr(Condition cond,
1967            DataType dt,
1968            DRegister rd,
1969            DRegister rn,
1970            const DOperand& operand);
1971
1972  void vorr(Condition cond,
1973            DataType dt,
1974            QRegister rd,
1975            QRegister rn,
1976            const QOperand& operand);
1977
1978  void vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm);
1979
1980  void vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm);
1981
1982  void vpadd(
1983      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1984
1985  void vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm);
1986
1987  void vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm);
1988
1989  void vpmax(
1990      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1991
1992  void vpmin(
1993      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1994
1995  void vpop(Condition cond, DataType dt, DRegisterList dreglist);
1996
1997  void vpop(Condition cond, DataType dt, SRegisterList sreglist);
1998
1999  void vpush(Condition cond, DataType dt, DRegisterList dreglist);
2000
2001  void vpush(Condition cond, DataType dt, SRegisterList sreglist);
2002
2003  void vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
2004
2005  void vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm);
2006
2007  void vqadd(
2008      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2009
2010  void vqadd(
2011      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2012
2013  void vqdmlal(
2014      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2015
2016  void vqdmlal(Condition cond,
2017               DataType dt,
2018               QRegister rd,
2019               DRegister rn,
2020               DRegister dm,
2021               unsigned index);
2022
2023  void vqdmlsl(
2024      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2025
2026  void vqdmlsl(Condition cond,
2027               DataType dt,
2028               QRegister rd,
2029               DRegister rn,
2030               DRegister dm,
2031               unsigned index);
2032
2033  void vqdmulh(
2034      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2035
2036  void vqdmulh(
2037      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2038
2039  void vqdmulh(Condition cond,
2040               DataType dt,
2041               DRegister rd,
2042               DRegister rn,
2043               DRegisterLane rm);
2044
2045  void vqdmulh(Condition cond,
2046               DataType dt,
2047               QRegister rd,
2048               QRegister rn,
2049               DRegisterLane rm);
2050
2051  void vqdmull(
2052      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2053
2054  void vqdmull(Condition cond,
2055               DataType dt,
2056               QRegister rd,
2057               DRegister rn,
2058               DRegisterLane rm);
2059
2060  void vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
2061
2062  void vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm);
2063
2064  void vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm);
2065
2066  void vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
2067
2068  void vqrdmulh(
2069      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2070
2071  void vqrdmulh(
2072      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2073
2074  void vqrdmulh(Condition cond,
2075                DataType dt,
2076                DRegister rd,
2077                DRegister rn,
2078                DRegisterLane rm);
2079
2080  void vqrdmulh(Condition cond,
2081                DataType dt,
2082                QRegister rd,
2083                QRegister rn,
2084                DRegisterLane rm);
2085
2086  void vqrshl(
2087      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn);
2088
2089  void vqrshl(
2090      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn);
2091
2092  void vqrshrn(Condition cond,
2093               DataType dt,
2094               DRegister rd,
2095               QRegister rm,
2096               const QOperand& operand);
2097
2098  void vqrshrun(Condition cond,
2099                DataType dt,
2100                DRegister rd,
2101                QRegister rm,
2102                const QOperand& operand);
2103
2104  void vqshl(Condition cond,
2105             DataType dt,
2106             DRegister rd,
2107             DRegister rm,
2108             const DOperand& operand);
2109
2110  void vqshl(Condition cond,
2111             DataType dt,
2112             QRegister rd,
2113             QRegister rm,
2114             const QOperand& operand);
2115
2116  void vqshlu(Condition cond,
2117              DataType dt,
2118              DRegister rd,
2119              DRegister rm,
2120              const DOperand& operand);
2121
2122  void vqshlu(Condition cond,
2123              DataType dt,
2124              QRegister rd,
2125              QRegister rm,
2126              const QOperand& operand);
2127
2128  void vqshrn(Condition cond,
2129              DataType dt,
2130              DRegister rd,
2131              QRegister rm,
2132              const QOperand& operand);
2133
2134  void vqshrun(Condition cond,
2135               DataType dt,
2136               DRegister rd,
2137               QRegister rm,
2138               const QOperand& operand);
2139
2140  void vqsub(
2141      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2142
2143  void vqsub(
2144      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2145
2146  void vraddhn(
2147      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2148
2149  void vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm);
2150
2151  void vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm);
2152
2153  void vrecps(
2154      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2155
2156  void vrecps(
2157      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2158
2159  void vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm);
2160
2161  void vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm);
2162
2163  void vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm);
2164
2165  void vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm);
2166
2167  void vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm);
2168
2169  void vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm);
2170
2171  void vrhadd(
2172      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2173
2174  void vrhadd(
2175      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2176
2177  void vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2178
2179  void vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2180
2181  void vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2182
2183  void vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2184
2185  void vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2186
2187  void vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2188
2189  void vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2190
2191  void vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2192
2193  void vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2194
2195  void vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2196
2197  void vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2198
2199  void vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2200
2201  void vrintr(
2202      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2203
2204  void vrintr(
2205      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2206
2207  void vrintx(
2208      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2209
2210  void vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2211
2212  void vrintx(
2213      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2214
2215  void vrintz(
2216      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2217
2218  void vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2219
2220  void vrintz(
2221      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2222
2223  void vrshl(
2224      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn);
2225
2226  void vrshl(
2227      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn);
2228
2229  void vrshr(Condition cond,
2230             DataType dt,
2231             DRegister rd,
2232             DRegister rm,
2233             const DOperand& operand);
2234
2235  void vrshr(Condition cond,
2236             DataType dt,
2237             QRegister rd,
2238             QRegister rm,
2239             const QOperand& operand);
2240
2241  void vrshrn(Condition cond,
2242              DataType dt,
2243              DRegister rd,
2244              QRegister rm,
2245              const QOperand& operand);
2246
2247  void vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm);
2248
2249  void vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm);
2250
2251  void vrsqrts(
2252      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2253
2254  void vrsqrts(
2255      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2256
2257  void vrsra(Condition cond,
2258             DataType dt,
2259             DRegister rd,
2260             DRegister rm,
2261             const DOperand& operand);
2262
2263  void vrsra(Condition cond,
2264             DataType dt,
2265             QRegister rd,
2266             QRegister rm,
2267             const QOperand& operand);
2268
2269  void vrsubhn(
2270      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2271
2272  void vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2273
2274  void vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2275
2276  void vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2277
2278  void vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2279
2280  void vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2281
2282  void vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2283
2284  void vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2285
2286  void vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2287
2288  void vshl(Condition cond,
2289            DataType dt,
2290            DRegister rd,
2291            DRegister rm,
2292            const DOperand& operand);
2293
2294  void vshl(Condition cond,
2295            DataType dt,
2296            QRegister rd,
2297            QRegister rm,
2298            const QOperand& operand);
2299
2300  void vshll(Condition cond,
2301             DataType dt,
2302             QRegister rd,
2303             DRegister rm,
2304             const DOperand& operand);
2305
2306  void vshr(Condition cond,
2307            DataType dt,
2308            DRegister rd,
2309            DRegister rm,
2310            const DOperand& operand);
2311
2312  void vshr(Condition cond,
2313            DataType dt,
2314            QRegister rd,
2315            QRegister rm,
2316            const QOperand& operand);
2317
2318  void vshrn(Condition cond,
2319             DataType dt,
2320             DRegister rd,
2321             QRegister rm,
2322             const QOperand& operand);
2323
2324  void vsli(Condition cond,
2325            DataType dt,
2326            DRegister rd,
2327            DRegister rm,
2328            const DOperand& operand);
2329
2330  void vsli(Condition cond,
2331            DataType dt,
2332            QRegister rd,
2333            QRegister rm,
2334            const QOperand& operand);
2335
2336  void vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm);
2337
2338  void vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm);
2339
2340  void vsra(Condition cond,
2341            DataType dt,
2342            DRegister rd,
2343            DRegister rm,
2344            const DOperand& operand);
2345
2346  void vsra(Condition cond,
2347            DataType dt,
2348            QRegister rd,
2349            QRegister rm,
2350            const QOperand& operand);
2351
2352  void vsri(Condition cond,
2353            DataType dt,
2354            DRegister rd,
2355            DRegister rm,
2356            const DOperand& operand);
2357
2358  void vsri(Condition cond,
2359            DataType dt,
2360            QRegister rd,
2361            QRegister rm,
2362            const QOperand& operand);
2363
2364  void vst1(Condition cond,
2365            DataType dt,
2366            const NeonRegisterList& nreglist,
2367            const AlignedMemOperand& operand);
2368
2369  void vst2(Condition cond,
2370            DataType dt,
2371            const NeonRegisterList& nreglist,
2372            const AlignedMemOperand& operand);
2373
2374  void vst3(Condition cond,
2375            DataType dt,
2376            const NeonRegisterList& nreglist,
2377            const AlignedMemOperand& operand);
2378
2379  void vst3(Condition cond,
2380            DataType dt,
2381            const NeonRegisterList& nreglist,
2382            const MemOperand& operand);
2383
2384  void vst4(Condition cond,
2385            DataType dt,
2386            const NeonRegisterList& nreglist,
2387            const AlignedMemOperand& operand);
2388
2389  void vstm(Condition cond,
2390            DataType dt,
2391            Register rn,
2392            WriteBack write_back,
2393            DRegisterList dreglist);
2394
2395  void vstm(Condition cond,
2396            DataType dt,
2397            Register rn,
2398            WriteBack write_back,
2399            SRegisterList sreglist);
2400
2401  void vstmdb(Condition cond,
2402              DataType dt,
2403              Register rn,
2404              WriteBack write_back,
2405              DRegisterList dreglist);
2406
2407  void vstmdb(Condition cond,
2408              DataType dt,
2409              Register rn,
2410              WriteBack write_back,
2411              SRegisterList sreglist);
2412
2413  void vstmia(Condition cond,
2414              DataType dt,
2415              Register rn,
2416              WriteBack write_back,
2417              DRegisterList dreglist);
2418
2419  void vstmia(Condition cond,
2420              DataType dt,
2421              Register rn,
2422              WriteBack write_back,
2423              SRegisterList sreglist);
2424
2425  void vstr(Condition cond,
2426            DataType dt,
2427            DRegister rd,
2428            const MemOperand& operand);
2429
2430  void vstr(Condition cond,
2431            DataType dt,
2432            SRegister rd,
2433            const MemOperand& operand);
2434
2435  void vsub(
2436      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2437
2438  void vsub(
2439      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2440
2441  void vsub(
2442      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
2443
2444  void vsubhn(
2445      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2446
2447  void vsubl(
2448      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2449
2450  void vsubw(
2451      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
2452
2453  void vswp(Condition cond, DataType dt, DRegister rd, DRegister rm);
2454
2455  void vswp(Condition cond, DataType dt, QRegister rd, QRegister rm);
2456
2457  void vtbl(Condition cond,
2458            DataType dt,
2459            DRegister rd,
2460            const NeonRegisterList& nreglist,
2461            DRegister rm);
2462
2463  void vtbx(Condition cond,
2464            DataType dt,
2465            DRegister rd,
2466            const NeonRegisterList& nreglist,
2467            DRegister rm);
2468
2469  void vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm);
2470
2471  void vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm);
2472
2473  void vtst(
2474      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2475
2476  void vtst(
2477      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2478
2479  void vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm);
2480
2481  void vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm);
2482
2483  void vzip(Condition cond, DataType dt, DRegister rd, DRegister rm);
2484
2485  void vzip(Condition cond, DataType dt, QRegister rd, QRegister rm);
2486
2487  void yield(Condition cond, EncodingSize size);
2488
2489  int T32Size(uint32_t instr);
2490  void DecodeT32(uint32_t instr);
2491  void DecodeA32(uint32_t instr);
2492};
2493
2494DataTypeValue Dt_L_imm6_1_Decode(uint32_t value, uint32_t type_value);
2495DataTypeValue Dt_L_imm6_2_Decode(uint32_t value, uint32_t type_value);
2496DataTypeValue Dt_L_imm6_3_Decode(uint32_t value);
2497DataTypeValue Dt_L_imm6_4_Decode(uint32_t value);
2498DataTypeValue Dt_imm6_1_Decode(uint32_t value, uint32_t type_value);
2499DataTypeValue Dt_imm6_2_Decode(uint32_t value, uint32_t type_value);
2500DataTypeValue Dt_imm6_3_Decode(uint32_t value);
2501DataTypeValue Dt_imm6_4_Decode(uint32_t value, uint32_t type_value);
2502DataTypeValue Dt_op_U_size_1_Decode(uint32_t value);
2503DataTypeValue Dt_op_size_1_Decode(uint32_t value);
2504DataTypeValue Dt_op_size_2_Decode(uint32_t value);
2505DataTypeValue Dt_op_size_3_Decode(uint32_t value);
2506DataTypeValue Dt_U_imm3H_1_Decode(uint32_t value);
2507DataTypeValue Dt_U_opc1_opc2_1_Decode(uint32_t value, unsigned* lane);
2508DataTypeValue Dt_opc1_opc2_1_Decode(uint32_t value, unsigned* lane);
2509DataTypeValue Dt_imm4_1_Decode(uint32_t value, unsigned* lane);
2510DataTypeValue Dt_B_E_1_Decode(uint32_t value);
2511DataTypeValue Dt_op_1_Decode1(uint32_t value);
2512DataTypeValue Dt_op_1_Decode2(uint32_t value);
2513DataTypeValue Dt_op_2_Decode(uint32_t value);
2514DataTypeValue Dt_op_3_Decode(uint32_t value);
2515DataTypeValue Dt_U_sx_1_Decode(uint32_t value);
2516DataTypeValue Dt_op_U_1_Decode1(uint32_t value);
2517DataTypeValue Dt_op_U_1_Decode2(uint32_t value);
2518DataTypeValue Dt_sz_1_Decode(uint32_t value);
2519DataTypeValue Dt_F_size_1_Decode(uint32_t value);
2520DataTypeValue Dt_F_size_2_Decode(uint32_t value);
2521DataTypeValue Dt_F_size_3_Decode(uint32_t value);
2522DataTypeValue Dt_F_size_4_Decode(uint32_t value);
2523DataTypeValue Dt_U_size_1_Decode(uint32_t value);
2524DataTypeValue Dt_U_size_2_Decode(uint32_t value);
2525DataTypeValue Dt_U_size_3_Decode(uint32_t value);
2526DataTypeValue Dt_size_1_Decode(uint32_t value);
2527DataTypeValue Dt_size_2_Decode(uint32_t value);
2528DataTypeValue Dt_size_3_Decode(uint32_t value);
2529DataTypeValue Dt_size_4_Decode(uint32_t value);
2530DataTypeValue Dt_size_5_Decode(uint32_t value);
2531DataTypeValue Dt_size_6_Decode(uint32_t value);
2532DataTypeValue Dt_size_7_Decode(uint32_t value);
2533DataTypeValue Dt_size_8_Decode(uint32_t value);
2534DataTypeValue Dt_size_9_Decode(uint32_t value, uint32_t type_value);
2535DataTypeValue Dt_size_10_Decode(uint32_t value);
2536DataTypeValue Dt_size_11_Decode(uint32_t value, uint32_t type_value);
2537DataTypeValue Dt_size_12_Decode(uint32_t value, uint32_t type_value);
2538DataTypeValue Dt_size_13_Decode(uint32_t value);
2539DataTypeValue Dt_size_14_Decode(uint32_t value);
2540DataTypeValue Dt_size_15_Decode(uint32_t value);
2541DataTypeValue Dt_size_16_Decode(uint32_t value);
2542// End of generated code.
2543
2544class PrintDisassembler : public Disassembler {
2545 public:
2546  explicit PrintDisassembler(std::ostream& os, uint32_t pc = 0)  // NOLINT
2547      : Disassembler(os, pc) {}
2548  explicit PrintDisassembler(DisassemblerStream* os, uint32_t pc = 0)  // NOLINT
2549      : Disassembler(os, pc) {}
2550
2551  virtual void PrintPc(uint32_t pc) {
2552    os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << pc << "\t";
2553  }
2554
2555  virtual void PrintOpcode16(uint32_t opcode) {
2556    os() << std::hex << std::setw(4) << std::setfill('0') << opcode << "    "
2557         << std::dec << "\t";
2558  }
2559
2560  virtual void PrintOpcode32(uint32_t opcode) {
2561    os() << std::hex << std::setw(8) << std::setfill('0') << opcode << std::dec
2562         << "\t";
2563  }
2564
2565  const uint32_t* DecodeA32At(const uint32_t* instruction_address) {
2566    DecodeA32(*instruction_address);
2567    return instruction_address + 1;
2568  }
2569
2570  // Returns the address of the next instruction.
2571  const uint16_t* DecodeT32At(const uint16_t* instruction_address,
2572                              const uint16_t* buffer_end);
2573  void DecodeT32(uint32_t instruction);
2574  void DecodeA32(uint32_t instruction);
2575  void DisassembleA32Buffer(const uint32_t* buffer, size_t size_in_bytes);
2576  void DisassembleT32Buffer(const uint16_t* buffer, size_t size_in_bytes);
2577};
2578
2579}  // namespace aarch32
2580}  // namespace vixl
2581
2582#endif  // VIXL_DISASM_AARCH32_H_
2583