disasm-aarch32.h revision 9cdd215b6b7b830619dd15f111d158a49a7d2367 
1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7//   * Redistributions of source code must retain the above copyright notice,
8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright notice,
10//     this list of conditions and the following disclaimer in the documentation
11//     and/or other materials provided with the distribution.
12//   * Neither the name of ARM Limited nor the names of its contributors may be
13//     used to endorse or promote products derived from this software without
14//     specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27#ifndef VIXL_DISASM_AARCH32_H_
28#define VIXL_DISASM_AARCH32_H_
29
30#include "aarch32/label-aarch32.h"
31#include "aarch32/operand-aarch32.h"
32
33namespace vixl {
34namespace aarch32 {
35
36class ITBlock {
37  Condition first_condition_;
38  Condition condition_;
39  uint16_t it_mask_;
40
41 public:
42  ITBlock() : first_condition_(al), condition_(al), it_mask_(0) {}
43  void Advance() {
44    condition_ = Condition((condition_.GetCondition() & 0xe) | (it_mask_ >> 3));
45    it_mask_ = (it_mask_ << 1) & 0xf;
46  }
47  bool InITBlock() const { return it_mask_ != 0; }
48  bool OutsideITBlock() const { return !InITBlock(); }
49  bool LastInITBlock() const { return it_mask_ == 0x8; }
50  bool OutsideITBlockOrLast() const {
51    return OutsideITBlock() || LastInITBlock();
52  }
53  void Set(Condition first_condition, uint16_t mask) {
54    condition_ = first_condition_ = first_condition;
55    it_mask_ = mask;
56  }
57  Condition GetFirstCondition() const { return first_condition_; }
58  Condition GetCurrentCondition() const { return condition_; }
59};
60
61class Disassembler : public Instructions {
62 public:
63  enum LocationType {
64    kAnyLocation,
65    kCodeLocation,
66    kDataLocation,
67    kCoprocLocation,
68    kLoadByteLocation,
69    kLoadHalfWordLocation,
70    kLoadWordLocation,
71    kLoadDoubleWordLocation,
72    kLoadSignedByteLocation,
73    kLoadSignedHalfWordLocation,
74    kLoadSinglePrecisionLocation,
75    kLoadDoublePrecisionLocation,
76    kStoreByteLocation,
77    kStoreHalfWordLocation,
78    kStoreWordLocation,
79    kStoreDoubleWordLocation,
80    kStoreSinglePrecisionLocation,
81    kStoreDoublePrecisionLocation,
82    kVld1Location,
83    kVld2Location,
84    kVld3Location,
85    kVld4Location,
86    kVst1Location,
87    kVst2Location,
88    kVst3Location,
89    kVst4Location
90  };
91
92  class ConditionPrinter {
93    const ITBlock& it_block_;
94    Condition cond_;
95
96   public:
97    ConditionPrinter(const ITBlock& it_block, Condition cond)
98        : it_block_(it_block), cond_(cond) {}
99    friend std::ostream& operator<<(std::ostream& os, ConditionPrinter cond) {
100      if (cond.it_block_.InITBlock() && cond.cond_.Is(al) &&
101          !cond.cond_.IsNone()) {
102        return os << "al";
103      }
104      return os << cond.cond_;
105    }
106  };
107
108  class PrintLabel {
109    LocationType location_type_;
110    Label* label_;
111    Label::Offset position_;
112
113   public:
114    PrintLabel(LocationType location_type, Label* label, Label::Offset position)
115        : location_type_(location_type), label_(label), position_(position) {}
116    LocationType GetLocationType() const { return location_type_; }
117    Label* GetLabel() const { return label_; }
118    Label::Offset GetPosition() const { return position_; }
119    friend inline std::ostream& operator<<(std::ostream& os,
120                                           const PrintLabel& label) {
121      if (label.label_->IsMinusZero()) {
122        os << "[pc, #-0]";
123      } else {
124        os << "0x" << std::hex << std::setw(8) << std::setfill('0')
125           << static_cast<int32_t>(label.label_->GetLocation() +
126                                   label.position_) << std::dec;
127      }
128      return os;
129    }
130  };
131
132  class PrintMemOperand {
133    LocationType location_type_;
134    const MemOperand& operand_;
135
136   public:
137    PrintMemOperand(LocationType location_type, const MemOperand& operand)
138        : location_type_(location_type), operand_(operand) {}
139    LocationType GetLocationType() const { return location_type_; }
140    const MemOperand& GetOperand() const { return operand_; }
141  };
142
143  class PrintAlignedMemOperand {
144    LocationType location_type_;
145    const AlignedMemOperand& operand_;
146
147   public:
148    PrintAlignedMemOperand(LocationType location_type,
149                           const AlignedMemOperand& operand)
150        : location_type_(location_type), operand_(operand) {}
151    LocationType GetLocationType() const { return location_type_; }
152    const AlignedMemOperand& GetOperand() const { return operand_; }
153  };
154
155  class DisassemblerStream {
156    std::ostream& os_;
157
158   public:
159    explicit DisassemblerStream(std::ostream& os) : os_(os) {}
160    virtual ~DisassemblerStream() {}
161    std::ostream& os() const { return os_; }
162    template <typename T>
163    DisassemblerStream& operator<<(T value) {
164      os_ << value;
165      return *this;
166    }
167    virtual DisassemblerStream& operator<<(const ConditionPrinter& cond) {
168      os_ << cond;
169      return *this;
170    }
171    virtual DisassemblerStream& operator<<(const Condition cond) {
172      os_ << cond;
173      return *this;
174    }
175    virtual DisassemblerStream& operator<<(const EncodingSize& size) {
176      os_ << size;
177      return *this;
178    }
179    virtual DisassemblerStream& operator<<(const DataType& type) {
180      os_ << type;
181      return *this;
182    }
183    virtual DisassemblerStream& operator<<(const Shift shift) {
184      os_ << shift;
185      return *this;
186    }
187    virtual DisassemblerStream& operator<<(const Sign sign) {
188      os_ << sign;
189      return *this;
190    }
191    virtual DisassemblerStream& operator<<(const Alignment alignment) {
192      os_ << alignment;
193      return *this;
194    }
195    virtual DisassemblerStream& operator<<(const PrintLabel& label) {
196      os_ << label;
197      return *this;
198    }
199    virtual DisassemblerStream& operator<<(const WriteBack& write_back) {
200      os_ << write_back;
201      return *this;
202    }
203    virtual DisassemblerStream& operator<<(const NeonImmediate& immediate) {
204      os_ << immediate;
205      return *this;
206    }
207    virtual DisassemblerStream& operator<<(const Register reg) {
208      os_ << reg;
209      return *this;
210    }
211    virtual DisassemblerStream& operator<<(const SRegister reg) {
212      os_ << reg;
213      return *this;
214    }
215    virtual DisassemblerStream& operator<<(const DRegister reg) {
216      os_ << reg;
217      return *this;
218    }
219    virtual DisassemblerStream& operator<<(const QRegister reg) {
220      os_ << reg;
221      return *this;
222    }
223    virtual DisassemblerStream& operator<<(const SpecialRegister reg) {
224      os_ << reg;
225      return *this;
226    }
227    virtual DisassemblerStream& operator<<(const MaskedSpecialRegister reg) {
228      os_ << reg;
229      return *this;
230    }
231    virtual DisassemblerStream& operator<<(const SpecialFPRegister reg) {
232      os_ << reg;
233      return *this;
234    }
235    virtual DisassemblerStream& operator<<(const BankedRegister reg) {
236      os_ << reg;
237      return *this;
238    }
239    virtual DisassemblerStream& operator<<(const RegisterList& list) {
240      os_ << list;
241      return *this;
242    }
243    virtual DisassemblerStream& operator<<(const SRegisterList& list) {
244      os_ << list;
245      return *this;
246    }
247    virtual DisassemblerStream& operator<<(const DRegisterList& list) {
248      os_ << list;
249      return *this;
250    }
251    virtual DisassemblerStream& operator<<(const NeonRegisterList& list) {
252      os_ << list;
253      return *this;
254    }
255    virtual DisassemblerStream& operator<<(const Coprocessor coproc) {
256      os_ << coproc;
257      return *this;
258    }
259    virtual DisassemblerStream& operator<<(const CRegister reg) {
260      os_ << reg;
261      return *this;
262    }
263    virtual DisassemblerStream& operator<<(const Endianness endian_specifier) {
264      os_ << endian_specifier;
265      return *this;
266    }
267    virtual DisassemblerStream& operator<<(const MemoryBarrier option) {
268      os_ << option;
269      return *this;
270    }
271    virtual DisassemblerStream& operator<<(const InterruptFlags iflags) {
272      os_ << iflags;
273      return *this;
274    }
275    virtual DisassemblerStream& operator<<(const Operand& operand) {
276      if (operand.IsImmediate()) {
277        return *this << "#" << operand.GetImmediate();
278      }
279      if (operand.IsImmediateShiftedRegister()) {
280        if ((operand.GetShift().IsLSL() || operand.GetShift().IsROR()) &&
281            (operand.GetShiftAmount() == 0)) {
282          return *this << operand.GetBaseRegister();
283        }
284        if (operand.GetShift().IsRRX()) {
285          return *this << operand.GetBaseRegister() << ", rrx";
286        }
287        return *this << operand.GetBaseRegister() << ", " << operand.GetShift()
288                     << " #" << operand.GetShiftAmount();
289      }
290      if (operand.IsRegisterShiftedRegister()) {
291        return *this << operand.GetBaseRegister() << ", " << operand.GetShift()
292                     << " " << operand.GetShiftRegister();
293      }
294      VIXL_UNREACHABLE();
295      return *this;
296    }
297    virtual DisassemblerStream& operator<<(const SOperand& operand) {
298      if (operand.IsImmediate()) {
299        return *this << operand.GetNeonImmediate();
300      }
301      return *this << operand.GetRegister();
302    }
303    virtual DisassemblerStream& operator<<(const DOperand& operand) {
304      if (operand.IsImmediate()) {
305        return *this << operand.GetNeonImmediate();
306      }
307      return *this << operand.GetRegister();
308    }
309    virtual DisassemblerStream& operator<<(const QOperand& operand) {
310      if (operand.IsImmediate()) {
311        return *this << operand.GetNeonImmediate();
312      }
313      return *this << operand.GetRegister();
314    }
315    virtual DisassemblerStream& operator<<(const MemOperand& operand) {
316      *this << "[" << operand.GetBaseRegister();
317      if (operand.GetAddrMode() == PostIndex) {
318        *this << "]";
319      }
320      if (operand.IsImmediate()) {
321        if ((operand.GetOffsetImmediate() != 0) ||
322            operand.GetSign().IsMinus() ||
323            ((operand.GetAddrMode() != Offset) && !operand.IsRegisterOnly())) {
324          if (operand.GetOffsetImmediate() == 0) {
325            *this << ", #" << operand.GetSign() << operand.GetOffsetImmediate();
326          } else {
327            *this << ", #" << operand.GetOffsetImmediate();
328          }
329        }
330      } else if (operand.IsPlainRegister()) {
331        *this << ", " << operand.GetSign() << operand.GetOffsetRegister();
332      } else if (operand.IsShiftedRegister()) {
333        *this << ", " << operand.GetSign() << operand.GetOffsetRegister()
334              << ImmediateShiftOperand(operand.GetShift(),
335                                       operand.GetShiftAmount());
336      } else {
337        VIXL_UNREACHABLE();
338        return *this;
339      }
340      if (operand.GetAddrMode() == Offset) {
341        *this << "]";
342      } else if (operand.GetAddrMode() == PreIndex) {
343        *this << "]!";
344      }
345      return *this;
346    }
347    virtual DisassemblerStream& operator<<(const PrintMemOperand& operand) {
348      return *this << operand.GetOperand();
349    }
350    virtual DisassemblerStream& operator<<(const AlignedMemOperand& operand) {
351      *this << "[" << operand.GetBaseRegister() << operand.GetAlignment()
352            << "]";
353      if (operand.GetAddrMode() == PostIndex) {
354        if (operand.IsPlainRegister()) {
355          *this << ", " << operand.GetOffsetRegister();
356        } else {
357          *this << "!";
358        }
359      }
360      return *this;
361    }
362    virtual DisassemblerStream& operator<<(
363        const PrintAlignedMemOperand& operand) {
364      return *this << operand.GetOperand();
365    }
366  };
367
368 private:
369  class ITBlockScope {
370    ITBlock* const it_block_;
371    bool inside_;
372
373   public:
374    explicit ITBlockScope(ITBlock* it_block)
375        : it_block_(it_block), inside_(it_block->InITBlock()) {}
376    ~ITBlockScope() {
377      if (inside_) it_block_->Advance();
378    }
379  };
380
381  ITBlock it_block_;
382  DisassemblerStream* os_;
383  uint32_t pc_;
384
385 public:
386  explicit Disassembler(std::ostream& os, uint32_t pc = 0)  // NOLINT
387      : os_(new DisassemblerStream(os)),
388        pc_(pc) {}
389  explicit Disassembler(DisassemblerStream* os, uint32_t pc = 0)  // NOLINT
390      : os_(os),
391        pc_(pc) {}
392  virtual ~Disassembler() { delete os_; }
393  DisassemblerStream& os() const { return *os_; }
394  void SetIT(Condition first_condition, uint16_t it_mask) {
395    it_block_.Set(first_condition, it_mask);
396  }
397  const ITBlock& GetITBlock() const { return it_block_; }
398  bool InITBlock() const { return it_block_.InITBlock(); }
399  bool OutsideITBlock() const { return it_block_.OutsideITBlock(); }
400  bool OutsideITBlockOrLast() const { return it_block_.OutsideITBlockOrLast(); }
401  void CheckNotIT() const { VIXL_ASSERT(it_block_.OutsideITBlock()); }
402  // Return the current condition depending on the IT state for T32.
403  Condition CurrentCond() const {
404    if (it_block_.OutsideITBlock()) return al;
405    return it_block_.GetCurrentCondition();
406  }
407
408  virtual void UnallocatedT32(uint32_t instruction) {
409    if (T32Size(instruction) == 2) {
410      os() << "unallocated " << std::hex << std::setw(4) << std::setfill('0')
411           << (instruction >> 16) << std::dec;
412    } else {
413      os() << "unallocated " << std::hex << std::setw(8) << std::setfill('0')
414           << instruction << std::dec;
415    }
416  }
417  virtual void UnallocatedA32(uint32_t instruction) {
418    os() << "unallocated " << std::hex << std::setw(8) << std::setfill('0')
419         << instruction << std::dec;
420  }
421  virtual void UnimplementedT32_16(const char* name, uint32_t instruction) {
422    os() << "unimplemented " << name << " T32:" << std::hex << std::setw(4)
423         << std::setfill('0') << (instruction >> 16) << std::dec;
424  }
425  virtual void UnimplementedT32_32(const char* name, uint32_t instruction) {
426    os() << "unimplemented " << name << " T32:" << std::hex << std::setw(8)
427         << std::setfill('0') << instruction << std::dec;
428  }
429  virtual void UnimplementedA32(const char* name, uint32_t instruction) {
430    os() << "unimplemented " << name << " ARM:" << std::hex << std::setw(8)
431         << std::setfill('0') << instruction << std::dec;
432  }
433  virtual void Unpredictable() { os() << " ; unpredictable"; }
434  virtual void UnpredictableT32(uint32_t /*instr*/) { return Unpredictable(); }
435  virtual void UnpredictableA32(uint32_t /*instr*/) { return Unpredictable(); }
436
437  static bool Is16BitEncoding(uint32_t instr) { return instr < 0xe8000000; }
438  uint32_t GetPc() const { return pc_; }
439  void JumpToPc(uint32_t pc) { pc_ = pc; }
440
441  // Start of generated code.
442
443  void adc(Condition cond,
444           EncodingSize size,
445           Register rd,
446           Register rn,
447           const Operand& operand);
448
449  void adcs(Condition cond,
450            EncodingSize size,
451            Register rd,
452            Register rn,
453            const Operand& operand);
454
455  void add(Condition cond,
456           EncodingSize size,
457           Register rd,
458           Register rn,
459           const Operand& operand);
460
461  void add(Condition cond, Register rd, const Operand& operand);
462
463  void adds(Condition cond,
464            EncodingSize size,
465            Register rd,
466            Register rn,
467            const Operand& operand);
468
469  void adds(Register rd, const Operand& operand);
470
471  void addw(Condition cond, Register rd, Register rn, const Operand& operand);
472
473  void adr(Condition cond, EncodingSize size, Register rd, Label* label);
474
475  void and_(Condition cond,
476            EncodingSize size,
477            Register rd,
478            Register rn,
479            const Operand& operand);
480
481  void ands(Condition cond,
482            EncodingSize size,
483            Register rd,
484            Register rn,
485            const Operand& operand);
486
487  void asr(Condition cond,
488           EncodingSize size,
489           Register rd,
490           Register rm,
491           const Operand& operand);
492
493  void asrs(Condition cond,
494            EncodingSize size,
495            Register rd,
496            Register rm,
497            const Operand& operand);
498
499  void b(Condition cond, EncodingSize size, Label* label);
500
501  void bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand);
502
503  void bfi(Condition cond,
504           Register rd,
505           Register rn,
506           uint32_t lsb,
507           const Operand& operand);
508
509  void bic(Condition cond,
510           EncodingSize size,
511           Register rd,
512           Register rn,
513           const Operand& operand);
514
515  void bics(Condition cond,
516            EncodingSize size,
517            Register rd,
518            Register rn,
519            const Operand& operand);
520
521  void bkpt(Condition cond, uint32_t imm);
522
523  void bl(Condition cond, Label* label);
524
525  void blx(Condition cond, Label* label);
526
527  void blx(Condition cond, Register rm);
528
529  void bx(Condition cond, Register rm);
530
531  void bxj(Condition cond, Register rm);
532
533  void cbnz(Register rn, Label* label);
534
535  void cbz(Register rn, Label* label);
536
537  void clrex(Condition cond);
538
539  void clz(Condition cond, Register rd, Register rm);
540
541  void cmn(Condition cond,
542           EncodingSize size,
543           Register rn,
544           const Operand& operand);
545
546  void cmp(Condition cond,
547           EncodingSize size,
548           Register rn,
549           const Operand& operand);
550
551  void crc32b(Condition cond, Register rd, Register rn, Register rm);
552
553  void crc32cb(Condition cond, Register rd, Register rn, Register rm);
554
555  void crc32ch(Condition cond, Register rd, Register rn, Register rm);
556
557  void crc32cw(Condition cond, Register rd, Register rn, Register rm);
558
559  void crc32h(Condition cond, Register rd, Register rn, Register rm);
560
561  void crc32w(Condition cond, Register rd, Register rn, Register rm);
562
563  void dmb(Condition cond, MemoryBarrier option);
564
565  void dsb(Condition cond, MemoryBarrier option);
566
567  void eor(Condition cond,
568           EncodingSize size,
569           Register rd,
570           Register rn,
571           const Operand& operand);
572
573  void eors(Condition cond,
574            EncodingSize size,
575            Register rd,
576            Register rn,
577            const Operand& operand);
578
579  void fldmdbx(Condition cond,
580               Register rn,
581               WriteBack write_back,
582               DRegisterList dreglist);
583
584  void fldmiax(Condition cond,
585               Register rn,
586               WriteBack write_back,
587               DRegisterList dreglist);
588
589  void fstmdbx(Condition cond,
590               Register rn,
591               WriteBack write_back,
592               DRegisterList dreglist);
593
594  void fstmiax(Condition cond,
595               Register rn,
596               WriteBack write_back,
597               DRegisterList dreglist);
598
599  void hlt(Condition cond, uint32_t imm);
600
601  void hvc(Condition cond, uint32_t imm);
602
603  void isb(Condition cond, MemoryBarrier option);
604
605  void it(Condition cond, uint16_t mask);
606
607  void lda(Condition cond, Register rt, const MemOperand& operand);
608
609  void ldab(Condition cond, Register rt, const MemOperand& operand);
610
611  void ldaex(Condition cond, Register rt, const MemOperand& operand);
612
613  void ldaexb(Condition cond, Register rt, const MemOperand& operand);
614
615  void ldaexd(Condition cond,
616              Register rt,
617              Register rt2,
618              const MemOperand& operand);
619
620  void ldaexh(Condition cond, Register rt, const MemOperand& operand);
621
622  void ldah(Condition cond, Register rt, const MemOperand& operand);
623
624  void ldm(Condition cond,
625           EncodingSize size,
626           Register rn,
627           WriteBack write_back,
628           RegisterList registers);
629
630  void ldmda(Condition cond,
631             Register rn,
632             WriteBack write_back,
633             RegisterList registers);
634
635  void ldmdb(Condition cond,
636             Register rn,
637             WriteBack write_back,
638             RegisterList registers);
639
640  void ldmea(Condition cond,
641             Register rn,
642             WriteBack write_back,
643             RegisterList registers);
644
645  void ldmed(Condition cond,
646             Register rn,
647             WriteBack write_back,
648             RegisterList registers);
649
650  void ldmfa(Condition cond,
651             Register rn,
652             WriteBack write_back,
653             RegisterList registers);
654
655  void ldmfd(Condition cond,
656             EncodingSize size,
657             Register rn,
658             WriteBack write_back,
659             RegisterList registers);
660
661  void ldmib(Condition cond,
662             Register rn,
663             WriteBack write_back,
664             RegisterList registers);
665
666  void ldr(Condition cond,
667           EncodingSize size,
668           Register rt,
669           const MemOperand& operand);
670
671  void ldr(Condition cond, EncodingSize size, Register rt, Label* label);
672
673  void ldrb(Condition cond,
674            EncodingSize size,
675            Register rt,
676            const MemOperand& operand);
677
678  void ldrb(Condition cond, Register rt, Label* label);
679
680  void ldrd(Condition cond,
681            Register rt,
682            Register rt2,
683            const MemOperand& operand);
684
685  void ldrd(Condition cond, Register rt, Register rt2, Label* label);
686
687  void ldrex(Condition cond, Register rt, const MemOperand& operand);
688
689  void ldrexb(Condition cond, Register rt, const MemOperand& operand);
690
691  void ldrexd(Condition cond,
692              Register rt,
693              Register rt2,
694              const MemOperand& operand);
695
696  void ldrexh(Condition cond, Register rt, const MemOperand& operand);
697
698  void ldrh(Condition cond,
699            EncodingSize size,
700            Register rt,
701            const MemOperand& operand);
702
703  void ldrh(Condition cond, Register rt, Label* label);
704
705  void ldrsb(Condition cond,
706             EncodingSize size,
707             Register rt,
708             const MemOperand& operand);
709
710  void ldrsb(Condition cond, Register rt, Label* label);
711
712  void ldrsh(Condition cond,
713             EncodingSize size,
714             Register rt,
715             const MemOperand& operand);
716
717  void ldrsh(Condition cond, Register rt, Label* label);
718
719  void lsl(Condition cond,
720           EncodingSize size,
721           Register rd,
722           Register rm,
723           const Operand& operand);
724
725  void lsls(Condition cond,
726            EncodingSize size,
727            Register rd,
728            Register rm,
729            const Operand& operand);
730
731  void lsr(Condition cond,
732           EncodingSize size,
733           Register rd,
734           Register rm,
735           const Operand& operand);
736
737  void lsrs(Condition cond,
738            EncodingSize size,
739            Register rd,
740            Register rm,
741            const Operand& operand);
742
743  void mla(Condition cond, Register rd, Register rn, Register rm, Register ra);
744
745  void mlas(Condition cond, Register rd, Register rn, Register rm, Register ra);
746
747  void mls(Condition cond, Register rd, Register rn, Register rm, Register ra);
748
749  void mov(Condition cond,
750           EncodingSize size,
751           Register rd,
752           const Operand& operand);
753
754  void movs(Condition cond,
755            EncodingSize size,
756            Register rd,
757            const Operand& operand);
758
759  void movt(Condition cond, Register rd, const Operand& operand);
760
761  void movw(Condition cond, Register rd, const Operand& operand);
762
763  void mrs(Condition cond, Register rd, SpecialRegister spec_reg);
764
765  void msr(Condition cond,
766           MaskedSpecialRegister spec_reg,
767           const Operand& operand);
768
769  void mul(
770      Condition cond, EncodingSize size, Register rd, Register rn, Register rm);
771
772  void muls(Condition cond, Register rd, Register rn, Register rm);
773
774  void mvn(Condition cond,
775           EncodingSize size,
776           Register rd,
777           const Operand& operand);
778
779  void mvns(Condition cond,
780            EncodingSize size,
781            Register rd,
782            const Operand& operand);
783
784  void nop(Condition cond, EncodingSize size);
785
786  void orn(Condition cond, Register rd, Register rn, const Operand& operand);
787
788  void orns(Condition cond, Register rd, Register rn, const Operand& operand);
789
790  void orr(Condition cond,
791           EncodingSize size,
792           Register rd,
793           Register rn,
794           const Operand& operand);
795
796  void orrs(Condition cond,
797            EncodingSize size,
798            Register rd,
799            Register rn,
800            const Operand& operand);
801
802  void pkhbt(Condition cond, Register rd, Register rn, const Operand& operand);
803
804  void pkhtb(Condition cond, Register rd, Register rn, const Operand& operand);
805
806  void pld(Condition cond, Label* label);
807
808  void pld(Condition cond, const MemOperand& operand);
809
810  void pldw(Condition cond, const MemOperand& operand);
811
812  void pli(Condition cond, const MemOperand& operand);
813
814  void pli(Condition cond, Label* label);
815
816  void pop(Condition cond, EncodingSize size, RegisterList registers);
817
818  void pop(Condition cond, EncodingSize size, Register rt);
819
820  void push(Condition cond, EncodingSize size, RegisterList registers);
821
822  void push(Condition cond, EncodingSize size, Register rt);
823
824  void qadd(Condition cond, Register rd, Register rm, Register rn);
825
826  void qadd16(Condition cond, Register rd, Register rn, Register rm);
827
828  void qadd8(Condition cond, Register rd, Register rn, Register rm);
829
830  void qasx(Condition cond, Register rd, Register rn, Register rm);
831
832  void qdadd(Condition cond, Register rd, Register rm, Register rn);
833
834  void qdsub(Condition cond, Register rd, Register rm, Register rn);
835
836  void qsax(Condition cond, Register rd, Register rn, Register rm);
837
838  void qsub(Condition cond, Register rd, Register rm, Register rn);
839
840  void qsub16(Condition cond, Register rd, Register rn, Register rm);
841
842  void qsub8(Condition cond, Register rd, Register rn, Register rm);
843
844  void rbit(Condition cond, Register rd, Register rm);
845
846  void rev(Condition cond, EncodingSize size, Register rd, Register rm);
847
848  void rev16(Condition cond, EncodingSize size, Register rd, Register rm);
849
850  void revsh(Condition cond, EncodingSize size, Register rd, Register rm);
851
852  void ror(Condition cond,
853           EncodingSize size,
854           Register rd,
855           Register rm,
856           const Operand& operand);
857
858  void rors(Condition cond,
859            EncodingSize size,
860            Register rd,
861            Register rm,
862            const Operand& operand);
863
864  void rrx(Condition cond, Register rd, Register rm);
865
866  void rrxs(Condition cond, Register rd, Register rm);
867
868  void rsb(Condition cond,
869           EncodingSize size,
870           Register rd,
871           Register rn,
872           const Operand& operand);
873
874  void rsbs(Condition cond,
875            EncodingSize size,
876            Register rd,
877            Register rn,
878            const Operand& operand);
879
880  void rsc(Condition cond, Register rd, Register rn, const Operand& operand);
881
882  void rscs(Condition cond, Register rd, Register rn, const Operand& operand);
883
884  void sadd16(Condition cond, Register rd, Register rn, Register rm);
885
886  void sadd8(Condition cond, Register rd, Register rn, Register rm);
887
888  void sasx(Condition cond, Register rd, Register rn, Register rm);
889
890  void sbc(Condition cond,
891           EncodingSize size,
892           Register rd,
893           Register rn,
894           const Operand& operand);
895
896  void sbcs(Condition cond,
897            EncodingSize size,
898            Register rd,
899            Register rn,
900            const Operand& operand);
901
902  void sbfx(Condition cond,
903            Register rd,
904            Register rn,
905            uint32_t lsb,
906            const Operand& operand);
907
908  void sdiv(Condition cond, Register rd, Register rn, Register rm);
909
910  void sel(Condition cond, Register rd, Register rn, Register rm);
911
912  void shadd16(Condition cond, Register rd, Register rn, Register rm);
913
914  void shadd8(Condition cond, Register rd, Register rn, Register rm);
915
916  void shasx(Condition cond, Register rd, Register rn, Register rm);
917
918  void shsax(Condition cond, Register rd, Register rn, Register rm);
919
920  void shsub16(Condition cond, Register rd, Register rn, Register rm);
921
922  void shsub8(Condition cond, Register rd, Register rn, Register rm);
923
924  void smlabb(
925      Condition cond, Register rd, Register rn, Register rm, Register ra);
926
927  void smlabt(
928      Condition cond, Register rd, Register rn, Register rm, Register ra);
929
930  void smlad(
931      Condition cond, Register rd, Register rn, Register rm, Register ra);
932
933  void smladx(
934      Condition cond, Register rd, Register rn, Register rm, Register ra);
935
936  void smlal(
937      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
938
939  void smlalbb(
940      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
941
942  void smlalbt(
943      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
944
945  void smlald(
946      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
947
948  void smlaldx(
949      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
950
951  void smlals(
952      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
953
954  void smlaltb(
955      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
956
957  void smlaltt(
958      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
959
960  void smlatb(
961      Condition cond, Register rd, Register rn, Register rm, Register ra);
962
963  void smlatt(
964      Condition cond, Register rd, Register rn, Register rm, Register ra);
965
966  void smlawb(
967      Condition cond, Register rd, Register rn, Register rm, Register ra);
968
969  void smlawt(
970      Condition cond, Register rd, Register rn, Register rm, Register ra);
971
972  void smlsd(
973      Condition cond, Register rd, Register rn, Register rm, Register ra);
974
975  void smlsdx(
976      Condition cond, Register rd, Register rn, Register rm, Register ra);
977
978  void smlsld(
979      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
980
981  void smlsldx(
982      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
983
984  void smmla(
985      Condition cond, Register rd, Register rn, Register rm, Register ra);
986
987  void smmlar(
988      Condition cond, Register rd, Register rn, Register rm, Register ra);
989
990  void smmls(
991      Condition cond, Register rd, Register rn, Register rm, Register ra);
992
993  void smmlsr(
994      Condition cond, Register rd, Register rn, Register rm, Register ra);
995
996  void smmul(Condition cond, Register rd, Register rn, Register rm);
997
998  void smmulr(Condition cond, Register rd, Register rn, Register rm);
999
1000  void smuad(Condition cond, Register rd, Register rn, Register rm);
1001
1002  void smuadx(Condition cond, Register rd, Register rn, Register rm);
1003
1004  void smulbb(Condition cond, Register rd, Register rn, Register rm);
1005
1006  void smulbt(Condition cond, Register rd, Register rn, Register rm);
1007
1008  void smull(
1009      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1010
1011  void smulls(
1012      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1013
1014  void smultb(Condition cond, Register rd, Register rn, Register rm);
1015
1016  void smultt(Condition cond, Register rd, Register rn, Register rm);
1017
1018  void smulwb(Condition cond, Register rd, Register rn, Register rm);
1019
1020  void smulwt(Condition cond, Register rd, Register rn, Register rm);
1021
1022  void smusd(Condition cond, Register rd, Register rn, Register rm);
1023
1024  void smusdx(Condition cond, Register rd, Register rn, Register rm);
1025
1026  void ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand);
1027
1028  void ssat16(Condition cond, Register rd, uint32_t imm, Register rn);
1029
1030  void ssax(Condition cond, Register rd, Register rn, Register rm);
1031
1032  void ssub16(Condition cond, Register rd, Register rn, Register rm);
1033
1034  void ssub8(Condition cond, Register rd, Register rn, Register rm);
1035
1036  void stl(Condition cond, Register rt, const MemOperand& operand);
1037
1038  void stlb(Condition cond, Register rt, const MemOperand& operand);
1039
1040  void stlex(Condition cond,
1041             Register rd,
1042             Register rt,
1043             const MemOperand& operand);
1044
1045  void stlexb(Condition cond,
1046              Register rd,
1047              Register rt,
1048              const MemOperand& operand);
1049
1050  void stlexd(Condition cond,
1051              Register rd,
1052              Register rt,
1053              Register rt2,
1054              const MemOperand& operand);
1055
1056  void stlexh(Condition cond,
1057              Register rd,
1058              Register rt,
1059              const MemOperand& operand);
1060
1061  void stlh(Condition cond, Register rt, const MemOperand& operand);
1062
1063  void stm(Condition cond,
1064           EncodingSize size,
1065           Register rn,
1066           WriteBack write_back,
1067           RegisterList registers);
1068
1069  void stmda(Condition cond,
1070             Register rn,
1071             WriteBack write_back,
1072             RegisterList registers);
1073
1074  void stmdb(Condition cond,
1075             EncodingSize size,
1076             Register rn,
1077             WriteBack write_back,
1078             RegisterList registers);
1079
1080  void stmea(Condition cond,
1081             EncodingSize size,
1082             Register rn,
1083             WriteBack write_back,
1084             RegisterList registers);
1085
1086  void stmed(Condition cond,
1087             Register rn,
1088             WriteBack write_back,
1089             RegisterList registers);
1090
1091  void stmfa(Condition cond,
1092             Register rn,
1093             WriteBack write_back,
1094             RegisterList registers);
1095
1096  void stmfd(Condition cond,
1097             Register rn,
1098             WriteBack write_back,
1099             RegisterList registers);
1100
1101  void stmib(Condition cond,
1102             Register rn,
1103             WriteBack write_back,
1104             RegisterList registers);
1105
1106  void str(Condition cond,
1107           EncodingSize size,
1108           Register rt,
1109           const MemOperand& operand);
1110
1111  void strb(Condition cond,
1112            EncodingSize size,
1113            Register rt,
1114            const MemOperand& operand);
1115
1116  void strd(Condition cond,
1117            Register rt,
1118            Register rt2,
1119            const MemOperand& operand);
1120
1121  void strex(Condition cond,
1122             Register rd,
1123             Register rt,
1124             const MemOperand& operand);
1125
1126  void strexb(Condition cond,
1127              Register rd,
1128              Register rt,
1129              const MemOperand& operand);
1130
1131  void strexd(Condition cond,
1132              Register rd,
1133              Register rt,
1134              Register rt2,
1135              const MemOperand& operand);
1136
1137  void strexh(Condition cond,
1138              Register rd,
1139              Register rt,
1140              const MemOperand& operand);
1141
1142  void strh(Condition cond,
1143            EncodingSize size,
1144            Register rt,
1145            const MemOperand& operand);
1146
1147  void sub(Condition cond,
1148           EncodingSize size,
1149           Register rd,
1150           Register rn,
1151           const Operand& operand);
1152
1153  void sub(Condition cond, Register rd, const Operand& operand);
1154
1155  void subs(Condition cond,
1156            EncodingSize size,
1157            Register rd,
1158            Register rn,
1159            const Operand& operand);
1160
1161  void subs(Register rd, const Operand& operand);
1162
1163  void subw(Condition cond, Register rd, Register rn, const Operand& operand);
1164
1165  void svc(Condition cond, uint32_t imm);
1166
1167  void sxtab(Condition cond, Register rd, Register rn, const Operand& operand);
1168
1169  void sxtab16(Condition cond,
1170               Register rd,
1171               Register rn,
1172               const Operand& operand);
1173
1174  void sxtah(Condition cond, Register rd, Register rn, const Operand& operand);
1175
1176  void sxtb(Condition cond,
1177            EncodingSize size,
1178            Register rd,
1179            const Operand& operand);
1180
1181  void sxtb16(Condition cond, Register rd, const Operand& operand);
1182
1183  void sxth(Condition cond,
1184            EncodingSize size,
1185            Register rd,
1186            const Operand& operand);
1187
1188  void tbb(Condition cond, Register rn, Register rm);
1189
1190  void tbh(Condition cond, Register rn, Register rm);
1191
1192  void teq(Condition cond, Register rn, const Operand& operand);
1193
1194  void tst(Condition cond,
1195           EncodingSize size,
1196           Register rn,
1197           const Operand& operand);
1198
1199  void uadd16(Condition cond, Register rd, Register rn, Register rm);
1200
1201  void uadd8(Condition cond, Register rd, Register rn, Register rm);
1202
1203  void uasx(Condition cond, Register rd, Register rn, Register rm);
1204
1205  void ubfx(Condition cond,
1206            Register rd,
1207            Register rn,
1208            uint32_t lsb,
1209            const Operand& operand);
1210
1211  void udf(Condition cond, EncodingSize size, uint32_t imm);
1212
1213  void udiv(Condition cond, Register rd, Register rn, Register rm);
1214
1215  void uhadd16(Condition cond, Register rd, Register rn, Register rm);
1216
1217  void uhadd8(Condition cond, Register rd, Register rn, Register rm);
1218
1219  void uhasx(Condition cond, Register rd, Register rn, Register rm);
1220
1221  void uhsax(Condition cond, Register rd, Register rn, Register rm);
1222
1223  void uhsub16(Condition cond, Register rd, Register rn, Register rm);
1224
1225  void uhsub8(Condition cond, Register rd, Register rn, Register rm);
1226
1227  void umaal(
1228      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1229
1230  void umlal(
1231      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1232
1233  void umlals(
1234      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1235
1236  void umull(
1237      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1238
1239  void umulls(
1240      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1241
1242  void uqadd16(Condition cond, Register rd, Register rn, Register rm);
1243
1244  void uqadd8(Condition cond, Register rd, Register rn, Register rm);
1245
1246  void uqasx(Condition cond, Register rd, Register rn, Register rm);
1247
1248  void uqsax(Condition cond, Register rd, Register rn, Register rm);
1249
1250  void uqsub16(Condition cond, Register rd, Register rn, Register rm);
1251
1252  void uqsub8(Condition cond, Register rd, Register rn, Register rm);
1253
1254  void usad8(Condition cond, Register rd, Register rn, Register rm);
1255
1256  void usada8(
1257      Condition cond, Register rd, Register rn, Register rm, Register ra);
1258
1259  void usat(Condition cond, Register rd, uint32_t imm, const Operand& operand);
1260
1261  void usat16(Condition cond, Register rd, uint32_t imm, Register rn);
1262
1263  void usax(Condition cond, Register rd, Register rn, Register rm);
1264
1265  void usub16(Condition cond, Register rd, Register rn, Register rm);
1266
1267  void usub8(Condition cond, Register rd, Register rn, Register rm);
1268
1269  void uxtab(Condition cond, Register rd, Register rn, const Operand& operand);
1270
1271  void uxtab16(Condition cond,
1272               Register rd,
1273               Register rn,
1274               const Operand& operand);
1275
1276  void uxtah(Condition cond, Register rd, Register rn, const Operand& operand);
1277
1278  void uxtb(Condition cond,
1279            EncodingSize size,
1280            Register rd,
1281            const Operand& operand);
1282
1283  void uxtb16(Condition cond, Register rd, const Operand& operand);
1284
1285  void uxth(Condition cond,
1286            EncodingSize size,
1287            Register rd,
1288            const Operand& operand);
1289
1290  void vaba(
1291      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1292
1293  void vaba(
1294      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1295
1296  void vabal(
1297      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1298
1299  void vabd(
1300      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1301
1302  void vabd(
1303      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1304
1305  void vabdl(
1306      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1307
1308  void vabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
1309
1310  void vabs(Condition cond, DataType dt, QRegister rd, QRegister rm);
1311
1312  void vabs(Condition cond, DataType dt, SRegister rd, SRegister rm);
1313
1314  void vacge(
1315      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1316
1317  void vacge(
1318      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1319
1320  void vacgt(
1321      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1322
1323  void vacgt(
1324      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1325
1326  void vacle(
1327      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1328
1329  void vacle(
1330      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1331
1332  void vaclt(
1333      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1334
1335  void vaclt(
1336      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1337
1338  void vadd(
1339      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1340
1341  void vadd(
1342      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1343
1344  void vadd(
1345      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1346
1347  void vaddhn(
1348      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
1349
1350  void vaddl(
1351      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1352
1353  void vaddw(
1354      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
1355
1356  void vand(Condition cond,
1357            DataType dt,
1358            DRegister rd,
1359            DRegister rn,
1360            const DOperand& operand);
1361
1362  void vand(Condition cond,
1363            DataType dt,
1364            QRegister rd,
1365            QRegister rn,
1366            const QOperand& operand);
1367
1368  void vbic(Condition cond,
1369            DataType dt,
1370            DRegister rd,
1371            DRegister rn,
1372            const DOperand& operand);
1373
1374  void vbic(Condition cond,
1375            DataType dt,
1376            QRegister rd,
1377            QRegister rn,
1378            const QOperand& operand);
1379
1380  void vbif(
1381      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1382
1383  void vbif(
1384      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1385
1386  void vbit(
1387      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1388
1389  void vbit(
1390      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1391
1392  void vbsl(
1393      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1394
1395  void vbsl(
1396      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1397
1398  void vceq(Condition cond,
1399            DataType dt,
1400            DRegister rd,
1401            DRegister rm,
1402            const DOperand& operand);
1403
1404  void vceq(Condition cond,
1405            DataType dt,
1406            QRegister rd,
1407            QRegister rm,
1408            const QOperand& operand);
1409
1410  void vceq(
1411      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1412
1413  void vceq(
1414      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1415
1416  void vcge(Condition cond,
1417            DataType dt,
1418            DRegister rd,
1419            DRegister rm,
1420            const DOperand& operand);
1421
1422  void vcge(Condition cond,
1423            DataType dt,
1424            QRegister rd,
1425            QRegister rm,
1426            const QOperand& operand);
1427
1428  void vcge(
1429      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1430
1431  void vcge(
1432      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1433
1434  void vcgt(Condition cond,
1435            DataType dt,
1436            DRegister rd,
1437            DRegister rm,
1438            const DOperand& operand);
1439
1440  void vcgt(Condition cond,
1441            DataType dt,
1442            QRegister rd,
1443            QRegister rm,
1444            const QOperand& operand);
1445
1446  void vcgt(
1447      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1448
1449  void vcgt(
1450      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1451
1452  void vcle(Condition cond,
1453            DataType dt,
1454            DRegister rd,
1455            DRegister rm,
1456            const DOperand& operand);
1457
1458  void vcle(Condition cond,
1459            DataType dt,
1460            QRegister rd,
1461            QRegister rm,
1462            const QOperand& operand);
1463
1464  void vcle(
1465      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1466
1467  void vcle(
1468      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1469
1470  void vcls(Condition cond, DataType dt, DRegister rd, DRegister rm);
1471
1472  void vcls(Condition cond, DataType dt, QRegister rd, QRegister rm);
1473
1474  void vclt(Condition cond,
1475            DataType dt,
1476            DRegister rd,
1477            DRegister rm,
1478            const DOperand& operand);
1479
1480  void vclt(Condition cond,
1481            DataType dt,
1482            QRegister rd,
1483            QRegister rm,
1484            const QOperand& operand);
1485
1486  void vclt(
1487      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1488
1489  void vclt(
1490      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1491
1492  void vclz(Condition cond, DataType dt, DRegister rd, DRegister rm);
1493
1494  void vclz(Condition cond, DataType dt, QRegister rd, QRegister rm);
1495
1496  void vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm);
1497
1498  void vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm);
1499
1500  void vcmp(Condition cond, DataType dt, SRegister rd, double imm);
1501
1502  void vcmp(Condition cond, DataType dt, DRegister rd, double imm);
1503
1504  void vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm);
1505
1506  void vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm);
1507
1508  void vcmpe(Condition cond, DataType dt, SRegister rd, double imm);
1509
1510  void vcmpe(Condition cond, DataType dt, DRegister rd, double imm);
1511
1512  void vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm);
1513
1514  void vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm);
1515
1516  void vcvt(
1517      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1518
1519  void vcvt(
1520      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1521
1522  void vcvt(Condition cond,
1523            DataType dt1,
1524            DataType dt2,
1525            DRegister rd,
1526            DRegister rm,
1527            int32_t fbits);
1528
1529  void vcvt(Condition cond,
1530            DataType dt1,
1531            DataType dt2,
1532            QRegister rd,
1533            QRegister rm,
1534            int32_t fbits);
1535
1536  void vcvt(Condition cond,
1537            DataType dt1,
1538            DataType dt2,
1539            SRegister rd,
1540            SRegister rm,
1541            int32_t fbits);
1542
1543  void vcvt(
1544      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1545
1546  void vcvt(
1547      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1548
1549  void vcvt(
1550      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm);
1551
1552  void vcvt(
1553      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm);
1554
1555  void vcvt(
1556      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1557
1558  void vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1559
1560  void vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1561
1562  void vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1563
1564  void vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1565
1566  void vcvtb(
1567      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1568
1569  void vcvtb(
1570      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1571
1572  void vcvtb(
1573      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1574
1575  void vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1576
1577  void vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1578
1579  void vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1580
1581  void vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1582
1583  void vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1584
1585  void vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1586
1587  void vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1588
1589  void vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1590
1591  void vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1592
1593  void vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1594
1595  void vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1596
1597  void vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1598
1599  void vcvtr(
1600      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1601
1602  void vcvtr(
1603      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1604
1605  void vcvtt(
1606      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1607
1608  void vcvtt(
1609      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1610
1611  void vcvtt(
1612      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1613
1614  void vdiv(
1615      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1616
1617  void vdiv(
1618      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1619
1620  void vdup(Condition cond, DataType dt, QRegister rd, Register rt);
1621
1622  void vdup(Condition cond, DataType dt, DRegister rd, Register rt);
1623
1624  void vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm);
1625
1626  void vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm);
1627
1628  void veor(
1629      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1630
1631  void veor(
1632      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1633
1634  void vext(Condition cond,
1635            DataType dt,
1636            DRegister rd,
1637            DRegister rn,
1638            DRegister rm,
1639            const DOperand& operand);
1640
1641  void vext(Condition cond,
1642            DataType dt,
1643            QRegister rd,
1644            QRegister rn,
1645            QRegister rm,
1646            const QOperand& operand);
1647
1648  void vfma(
1649      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1650
1651  void vfma(
1652      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1653
1654  void vfma(
1655      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1656
1657  void vfms(
1658      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1659
1660  void vfms(
1661      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1662
1663  void vfms(
1664      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1665
1666  void vfnma(
1667      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1668
1669  void vfnma(
1670      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1671
1672  void vfnms(
1673      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1674
1675  void vfnms(
1676      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1677
1678  void vhadd(
1679      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1680
1681  void vhadd(
1682      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1683
1684  void vhsub(
1685      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1686
1687  void vhsub(
1688      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1689
1690  void vld1(Condition cond,
1691            DataType dt,
1692            const NeonRegisterList& nreglist,
1693            const AlignedMemOperand& operand);
1694
1695  void vld2(Condition cond,
1696            DataType dt,
1697            const NeonRegisterList& nreglist,
1698            const AlignedMemOperand& operand);
1699
1700  void vld3(Condition cond,
1701            DataType dt,
1702            const NeonRegisterList& nreglist,
1703            const AlignedMemOperand& operand);
1704
1705  void vld3(Condition cond,
1706            DataType dt,
1707            const NeonRegisterList& nreglist,
1708            const MemOperand& operand);
1709
1710  void vld4(Condition cond,
1711            DataType dt,
1712            const NeonRegisterList& nreglist,
1713            const AlignedMemOperand& operand);
1714
1715  void vldm(Condition cond,
1716            DataType dt,
1717            Register rn,
1718            WriteBack write_back,
1719            DRegisterList dreglist);
1720
1721  void vldm(Condition cond,
1722            DataType dt,
1723            Register rn,
1724            WriteBack write_back,
1725            SRegisterList sreglist);
1726
1727  void vldmdb(Condition cond,
1728              DataType dt,
1729              Register rn,
1730              WriteBack write_back,
1731              DRegisterList dreglist);
1732
1733  void vldmdb(Condition cond,
1734              DataType dt,
1735              Register rn,
1736              WriteBack write_back,
1737              SRegisterList sreglist);
1738
1739  void vldmia(Condition cond,
1740              DataType dt,
1741              Register rn,
1742              WriteBack write_back,
1743              DRegisterList dreglist);
1744
1745  void vldmia(Condition cond,
1746              DataType dt,
1747              Register rn,
1748              WriteBack write_back,
1749              SRegisterList sreglist);
1750
1751  void vldr(Condition cond, DataType dt, DRegister rd, Label* label);
1752
1753  void vldr(Condition cond,
1754            DataType dt,
1755            DRegister rd,
1756            const MemOperand& operand);
1757
1758  void vldr(Condition cond, DataType dt, SRegister rd, Label* label);
1759
1760  void vldr(Condition cond,
1761            DataType dt,
1762            SRegister rd,
1763            const MemOperand& operand);
1764
1765  void vmax(
1766      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1767
1768  void vmax(
1769      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1770
1771  void vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm);
1772
1773  void vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm);
1774
1775  void vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm);
1776
1777  void vmin(
1778      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1779
1780  void vmin(
1781      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1782
1783  void vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm);
1784
1785  void vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm);
1786
1787  void vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm);
1788
1789  void vmla(Condition cond,
1790            DataType dt,
1791            DRegister rd,
1792            DRegister rn,
1793            DRegisterLane rm);
1794
1795  void vmla(Condition cond,
1796            DataType dt,
1797            QRegister rd,
1798            QRegister rn,
1799            DRegisterLane rm);
1800
1801  void vmla(
1802      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1803
1804  void vmla(
1805      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1806
1807  void vmla(
1808      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1809
1810  void vmlal(Condition cond,
1811             DataType dt,
1812             QRegister rd,
1813             DRegister rn,
1814             DRegisterLane rm);
1815
1816  void vmlal(
1817      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1818
1819  void vmls(Condition cond,
1820            DataType dt,
1821            DRegister rd,
1822            DRegister rn,
1823            DRegisterLane rm);
1824
1825  void vmls(Condition cond,
1826            DataType dt,
1827            QRegister rd,
1828            QRegister rn,
1829            DRegisterLane rm);
1830
1831  void vmls(
1832      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1833
1834  void vmls(
1835      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1836
1837  void vmls(
1838      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1839
1840  void vmlsl(Condition cond,
1841             DataType dt,
1842             QRegister rd,
1843             DRegister rn,
1844             DRegisterLane rm);
1845
1846  void vmlsl(
1847      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1848
1849  void vmov(Condition cond, Register rt, SRegister rn);
1850
1851  void vmov(Condition cond, SRegister rn, Register rt);
1852
1853  void vmov(Condition cond, Register rt, Register rt2, DRegister rm);
1854
1855  void vmov(Condition cond, DRegister rm, Register rt, Register rt2);
1856
1857  void vmov(
1858      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
1859
1860  void vmov(
1861      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
1862
1863  void vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt);
1864
1865  void vmov(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
1866
1867  void vmov(Condition cond, DataType dt, QRegister rd, const QOperand& operand);
1868
1869  void vmov(Condition cond, DataType dt, SRegister rd, const SOperand& operand);
1870
1871  void vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn);
1872
1873  void vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm);
1874
1875  void vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
1876
1877  void vmrs(Condition cond, RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg);
1878
1879  void vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt);
1880
1881  void vmul(Condition cond,
1882            DataType dt,
1883            DRegister rd,
1884            DRegister rn,
1885            DRegister dm,
1886            unsigned index);
1887
1888  void vmul(Condition cond,
1889            DataType dt,
1890            QRegister rd,
1891            QRegister rn,
1892            DRegister dm,
1893            unsigned index);
1894
1895  void vmul(
1896      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1897
1898  void vmul(
1899      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1900
1901  void vmul(
1902      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1903
1904  void vmull(Condition cond,
1905             DataType dt,
1906             QRegister rd,
1907             DRegister rn,
1908             DRegister dm,
1909             unsigned index);
1910
1911  void vmull(
1912      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1913
1914  void vmvn(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
1915
1916  void vmvn(Condition cond, DataType dt, QRegister rd, const QOperand& operand);
1917
1918  void vneg(Condition cond, DataType dt, DRegister rd, DRegister rm);
1919
1920  void vneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
1921
1922  void vneg(Condition cond, DataType dt, SRegister rd, SRegister rm);
1923
1924  void vnmla(
1925      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1926
1927  void vnmla(
1928      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1929
1930  void vnmls(
1931      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1932
1933  void vnmls(
1934      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1935
1936  void vnmul(
1937      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1938
1939  void vnmul(
1940      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1941
1942  void vorn(Condition cond,
1943            DataType dt,
1944            DRegister rd,
1945            DRegister rn,
1946            const DOperand& operand);
1947
1948  void vorn(Condition cond,
1949            DataType dt,
1950            QRegister rd,
1951            QRegister rn,
1952            const QOperand& operand);
1953
1954  void vorr(Condition cond,
1955            DataType dt,
1956            DRegister rd,
1957            DRegister rn,
1958            const DOperand& operand);
1959
1960  void vorr(Condition cond,
1961            DataType dt,
1962            QRegister rd,
1963            QRegister rn,
1964            const QOperand& operand);
1965
1966  void vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm);
1967
1968  void vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm);
1969
1970  void vpadd(
1971      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1972
1973  void vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm);
1974
1975  void vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm);
1976
1977  void vpmax(
1978      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1979
1980  void vpmin(
1981      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1982
1983  void vpop(Condition cond, DataType dt, DRegisterList dreglist);
1984
1985  void vpop(Condition cond, DataType dt, SRegisterList sreglist);
1986
1987  void vpush(Condition cond, DataType dt, DRegisterList dreglist);
1988
1989  void vpush(Condition cond, DataType dt, SRegisterList sreglist);
1990
1991  void vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
1992
1993  void vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm);
1994
1995  void vqadd(
1996      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1997
1998  void vqadd(
1999      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2000
2001  void vqdmlal(
2002      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2003
2004  void vqdmlal(Condition cond,
2005               DataType dt,
2006               QRegister rd,
2007               DRegister rn,
2008               DRegister dm,
2009               unsigned index);
2010
2011  void vqdmlsl(
2012      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2013
2014  void vqdmlsl(Condition cond,
2015               DataType dt,
2016               QRegister rd,
2017               DRegister rn,
2018               DRegister dm,
2019               unsigned index);
2020
2021  void vqdmulh(
2022      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2023
2024  void vqdmulh(
2025      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2026
2027  void vqdmulh(Condition cond,
2028               DataType dt,
2029               DRegister rd,
2030               DRegister rn,
2031               DRegisterLane rm);
2032
2033  void vqdmulh(Condition cond,
2034               DataType dt,
2035               QRegister rd,
2036               QRegister rn,
2037               DRegisterLane rm);
2038
2039  void vqdmull(
2040      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2041
2042  void vqdmull(Condition cond,
2043               DataType dt,
2044               QRegister rd,
2045               DRegister rn,
2046               DRegisterLane rm);
2047
2048  void vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
2049
2050  void vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm);
2051
2052  void vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm);
2053
2054  void vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
2055
2056  void vqrdmulh(
2057      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2058
2059  void vqrdmulh(
2060      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2061
2062  void vqrdmulh(Condition cond,
2063                DataType dt,
2064                DRegister rd,
2065                DRegister rn,
2066                DRegisterLane rm);
2067
2068  void vqrdmulh(Condition cond,
2069                DataType dt,
2070                QRegister rd,
2071                QRegister rn,
2072                DRegisterLane rm);
2073
2074  void vqrshl(
2075      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn);
2076
2077  void vqrshl(
2078      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn);
2079
2080  void vqrshrn(Condition cond,
2081               DataType dt,
2082               DRegister rd,
2083               QRegister rm,
2084               const QOperand& operand);
2085
2086  void vqrshrun(Condition cond,
2087                DataType dt,
2088                DRegister rd,
2089                QRegister rm,
2090                const QOperand& operand);
2091
2092  void vqshl(Condition cond,
2093             DataType dt,
2094             DRegister rd,
2095             DRegister rm,
2096             const DOperand& operand);
2097
2098  void vqshl(Condition cond,
2099             DataType dt,
2100             QRegister rd,
2101             QRegister rm,
2102             const QOperand& operand);
2103
2104  void vqshlu(Condition cond,
2105              DataType dt,
2106              DRegister rd,
2107              DRegister rm,
2108              const DOperand& operand);
2109
2110  void vqshlu(Condition cond,
2111              DataType dt,
2112              QRegister rd,
2113              QRegister rm,
2114              const QOperand& operand);
2115
2116  void vqshrn(Condition cond,
2117              DataType dt,
2118              DRegister rd,
2119              QRegister rm,
2120              const QOperand& operand);
2121
2122  void vqshrun(Condition cond,
2123               DataType dt,
2124               DRegister rd,
2125               QRegister rm,
2126               const QOperand& operand);
2127
2128  void vqsub(
2129      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2130
2131  void vqsub(
2132      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2133
2134  void vraddhn(
2135      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2136
2137  void vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm);
2138
2139  void vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm);
2140
2141  void vrecps(
2142      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2143
2144  void vrecps(
2145      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2146
2147  void vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm);
2148
2149  void vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm);
2150
2151  void vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm);
2152
2153  void vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm);
2154
2155  void vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm);
2156
2157  void vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm);
2158
2159  void vrhadd(
2160      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2161
2162  void vrhadd(
2163      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2164
2165  void vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2166
2167  void vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2168
2169  void vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2170
2171  void vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2172
2173  void vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2174
2175  void vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2176
2177  void vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2178
2179  void vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2180
2181  void vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2182
2183  void vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2184
2185  void vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2186
2187  void vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2188
2189  void vrintr(
2190      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2191
2192  void vrintr(
2193      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2194
2195  void vrintx(
2196      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2197
2198  void vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2199
2200  void vrintx(
2201      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2202
2203  void vrintz(
2204      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2205
2206  void vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2207
2208  void vrintz(
2209      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2210
2211  void vrshl(
2212      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn);
2213
2214  void vrshl(
2215      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn);
2216
2217  void vrshr(Condition cond,
2218             DataType dt,
2219             DRegister rd,
2220             DRegister rm,
2221             const DOperand& operand);
2222
2223  void vrshr(Condition cond,
2224             DataType dt,
2225             QRegister rd,
2226             QRegister rm,
2227             const QOperand& operand);
2228
2229  void vrshrn(Condition cond,
2230              DataType dt,
2231              DRegister rd,
2232              QRegister rm,
2233              const QOperand& operand);
2234
2235  void vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm);
2236
2237  void vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm);
2238
2239  void vrsqrts(
2240      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2241
2242  void vrsqrts(
2243      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2244
2245  void vrsra(Condition cond,
2246             DataType dt,
2247             DRegister rd,
2248             DRegister rm,
2249             const DOperand& operand);
2250
2251  void vrsra(Condition cond,
2252             DataType dt,
2253             QRegister rd,
2254             QRegister rm,
2255             const QOperand& operand);
2256
2257  void vrsubhn(
2258      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2259
2260  void vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2261
2262  void vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2263
2264  void vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2265
2266  void vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2267
2268  void vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2269
2270  void vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2271
2272  void vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2273
2274  void vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2275
2276  void vshl(Condition cond,
2277            DataType dt,
2278            DRegister rd,
2279            DRegister rm,
2280            const DOperand& operand);
2281
2282  void vshl(Condition cond,
2283            DataType dt,
2284            QRegister rd,
2285            QRegister rm,
2286            const QOperand& operand);
2287
2288  void vshll(Condition cond,
2289             DataType dt,
2290             QRegister rd,
2291             DRegister rm,
2292             const DOperand& operand);
2293
2294  void vshr(Condition cond,
2295            DataType dt,
2296            DRegister rd,
2297            DRegister rm,
2298            const DOperand& operand);
2299
2300  void vshr(Condition cond,
2301            DataType dt,
2302            QRegister rd,
2303            QRegister rm,
2304            const QOperand& operand);
2305
2306  void vshrn(Condition cond,
2307             DataType dt,
2308             DRegister rd,
2309             QRegister rm,
2310             const QOperand& operand);
2311
2312  void vsli(Condition cond,
2313            DataType dt,
2314            DRegister rd,
2315            DRegister rm,
2316            const DOperand& operand);
2317
2318  void vsli(Condition cond,
2319            DataType dt,
2320            QRegister rd,
2321            QRegister rm,
2322            const QOperand& operand);
2323
2324  void vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm);
2325
2326  void vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm);
2327
2328  void vsra(Condition cond,
2329            DataType dt,
2330            DRegister rd,
2331            DRegister rm,
2332            const DOperand& operand);
2333
2334  void vsra(Condition cond,
2335            DataType dt,
2336            QRegister rd,
2337            QRegister rm,
2338            const QOperand& operand);
2339
2340  void vsri(Condition cond,
2341            DataType dt,
2342            DRegister rd,
2343            DRegister rm,
2344            const DOperand& operand);
2345
2346  void vsri(Condition cond,
2347            DataType dt,
2348            QRegister rd,
2349            QRegister rm,
2350            const QOperand& operand);
2351
2352  void vst1(Condition cond,
2353            DataType dt,
2354            const NeonRegisterList& nreglist,
2355            const AlignedMemOperand& operand);
2356
2357  void vst2(Condition cond,
2358            DataType dt,
2359            const NeonRegisterList& nreglist,
2360            const AlignedMemOperand& operand);
2361
2362  void vst3(Condition cond,
2363            DataType dt,
2364            const NeonRegisterList& nreglist,
2365            const AlignedMemOperand& operand);
2366
2367  void vst3(Condition cond,
2368            DataType dt,
2369            const NeonRegisterList& nreglist,
2370            const MemOperand& operand);
2371
2372  void vst4(Condition cond,
2373            DataType dt,
2374            const NeonRegisterList& nreglist,
2375            const AlignedMemOperand& operand);
2376
2377  void vstm(Condition cond,
2378            DataType dt,
2379            Register rn,
2380            WriteBack write_back,
2381            DRegisterList dreglist);
2382
2383  void vstm(Condition cond,
2384            DataType dt,
2385            Register rn,
2386            WriteBack write_back,
2387            SRegisterList sreglist);
2388
2389  void vstmdb(Condition cond,
2390              DataType dt,
2391              Register rn,
2392              WriteBack write_back,
2393              DRegisterList dreglist);
2394
2395  void vstmdb(Condition cond,
2396              DataType dt,
2397              Register rn,
2398              WriteBack write_back,
2399              SRegisterList sreglist);
2400
2401  void vstmia(Condition cond,
2402              DataType dt,
2403              Register rn,
2404              WriteBack write_back,
2405              DRegisterList dreglist);
2406
2407  void vstmia(Condition cond,
2408              DataType dt,
2409              Register rn,
2410              WriteBack write_back,
2411              SRegisterList sreglist);
2412
2413  void vstr(Condition cond,
2414            DataType dt,
2415            DRegister rd,
2416            const MemOperand& operand);
2417
2418  void vstr(Condition cond,
2419            DataType dt,
2420            SRegister rd,
2421            const MemOperand& operand);
2422
2423  void vsub(
2424      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2425
2426  void vsub(
2427      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2428
2429  void vsub(
2430      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
2431
2432  void vsubhn(
2433      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2434
2435  void vsubl(
2436      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2437
2438  void vsubw(
2439      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
2440
2441  void vswp(Condition cond, DataType dt, DRegister rd, DRegister rm);
2442
2443  void vswp(Condition cond, DataType dt, QRegister rd, QRegister rm);
2444
2445  void vtbl(Condition cond,
2446            DataType dt,
2447            DRegister rd,
2448            const NeonRegisterList& nreglist,
2449            DRegister rm);
2450
2451  void vtbx(Condition cond,
2452            DataType dt,
2453            DRegister rd,
2454            const NeonRegisterList& nreglist,
2455            DRegister rm);
2456
2457  void vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm);
2458
2459  void vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm);
2460
2461  void vtst(
2462      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2463
2464  void vtst(
2465      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2466
2467  void vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm);
2468
2469  void vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm);
2470
2471  void vzip(Condition cond, DataType dt, DRegister rd, DRegister rm);
2472
2473  void vzip(Condition cond, DataType dt, QRegister rd, QRegister rm);
2474
2475  void yield(Condition cond, EncodingSize size);
2476
2477  int T32Size(uint32_t instr);
2478  void DecodeT32(uint32_t instr);
2479  void DecodeA32(uint32_t instr);
2480};
2481
2482DataTypeValue Dt_L_imm6_1_Decode(uint32_t value, uint32_t type_value);
2483DataTypeValue Dt_L_imm6_2_Decode(uint32_t value, uint32_t type_value);
2484DataTypeValue Dt_L_imm6_3_Decode(uint32_t value);
2485DataTypeValue Dt_L_imm6_4_Decode(uint32_t value);
2486DataTypeValue Dt_imm6_1_Decode(uint32_t value, uint32_t type_value);
2487DataTypeValue Dt_imm6_2_Decode(uint32_t value, uint32_t type_value);
2488DataTypeValue Dt_imm6_3_Decode(uint32_t value);
2489DataTypeValue Dt_imm6_4_Decode(uint32_t value, uint32_t type_value);
2490DataTypeValue Dt_op_U_size_1_Decode(uint32_t value);
2491DataTypeValue Dt_op_size_1_Decode(uint32_t value);
2492DataTypeValue Dt_op_size_2_Decode(uint32_t value);
2493DataTypeValue Dt_op_size_3_Decode(uint32_t value);
2494DataTypeValue Dt_U_imm3H_1_Decode(uint32_t value);
2495DataTypeValue Dt_U_opc1_opc2_1_Decode(uint32_t value, unsigned* lane);
2496DataTypeValue Dt_opc1_opc2_1_Decode(uint32_t value, unsigned* lane);
2497DataTypeValue Dt_imm4_1_Decode(uint32_t value, unsigned* lane);
2498DataTypeValue Dt_B_E_1_Decode(uint32_t value);
2499DataTypeValue Dt_op_1_Decode1(uint32_t value);
2500DataTypeValue Dt_op_1_Decode2(uint32_t value);
2501DataTypeValue Dt_op_2_Decode(uint32_t value);
2502DataTypeValue Dt_op_3_Decode(uint32_t value);
2503DataTypeValue Dt_U_sx_1_Decode(uint32_t value);
2504DataTypeValue Dt_op_U_1_Decode1(uint32_t value);
2505DataTypeValue Dt_op_U_1_Decode2(uint32_t value);
2506DataTypeValue Dt_sz_1_Decode(uint32_t value);
2507DataTypeValue Dt_F_size_1_Decode(uint32_t value);
2508DataTypeValue Dt_F_size_2_Decode(uint32_t value);
2509DataTypeValue Dt_F_size_3_Decode(uint32_t value);
2510DataTypeValue Dt_F_size_4_Decode(uint32_t value);
2511DataTypeValue Dt_U_size_1_Decode(uint32_t value);
2512DataTypeValue Dt_U_size_2_Decode(uint32_t value);
2513DataTypeValue Dt_U_size_3_Decode(uint32_t value);
2514DataTypeValue Dt_size_1_Decode(uint32_t value);
2515DataTypeValue Dt_size_2_Decode(uint32_t value);
2516DataTypeValue Dt_size_3_Decode(uint32_t value);
2517DataTypeValue Dt_size_4_Decode(uint32_t value);
2518DataTypeValue Dt_size_5_Decode(uint32_t value);
2519DataTypeValue Dt_size_6_Decode(uint32_t value);
2520DataTypeValue Dt_size_7_Decode(uint32_t value);
2521DataTypeValue Dt_size_8_Decode(uint32_t value);
2522DataTypeValue Dt_size_9_Decode(uint32_t value, uint32_t type_value);
2523DataTypeValue Dt_size_10_Decode(uint32_t value);
2524DataTypeValue Dt_size_11_Decode(uint32_t value, uint32_t type_value);
2525DataTypeValue Dt_size_12_Decode(uint32_t value, uint32_t type_value);
2526DataTypeValue Dt_size_13_Decode(uint32_t value);
2527DataTypeValue Dt_size_14_Decode(uint32_t value);
2528DataTypeValue Dt_size_15_Decode(uint32_t value);
2529DataTypeValue Dt_size_16_Decode(uint32_t value);
2530// End of generated code.
2531
2532class PrintDisassembler : public Disassembler {
2533 public:
2534  explicit PrintDisassembler(std::ostream& os, uint32_t pc = 0)  // NOLINT
2535      : Disassembler(os, pc) {}
2536  explicit PrintDisassembler(DisassemblerStream* os, uint32_t pc = 0)  // NOLINT
2537      : Disassembler(os, pc) {}
2538
2539  virtual void PrintPc(uint32_t pc) {
2540    os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << pc << "\t";
2541  }
2542
2543  virtual void PrintOpcode16(uint32_t opcode) {
2544    os() << std::hex << std::setw(4) << std::setfill('0') << opcode << "    "
2545         << std::dec << "\t";
2546  }
2547
2548  virtual void PrintOpcode32(uint32_t opcode) {
2549    os() << std::hex << std::setw(8) << std::setfill('0') << opcode << std::dec
2550         << "\t";
2551  }
2552
2553  void DecodeT32(uint32_t instruction);
2554  void DecodeA32(uint32_t instruction);
2555  void DisassembleA32Buffer(const uint32_t* buffer, uint32_t size_in_bytes);
2556  void DisassembleT32Buffer(const uint16_t* buffer, uint32_t size_in_bytes);
2557};
2558
2559}  // namespace aarch32
2560}  // namespace vixl
2561
2562#endif  // VIXL_DISASM_AARCH32_H_
2563