macro-assembler-aarch32.h revision 32929a7f73c3a103a2abe21f49258fba149a5157 
1// Copyright 2015, VIXL authors
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3//
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27
28#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
29#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
30
31#include "code-generation-scopes-vixl.h"
32#include "macro-assembler-interface.h"
33#include "utils-vixl.h"
34
35#include "aarch32/instructions-aarch32.h"
36#include "aarch32/assembler-aarch32.h"
37#include "aarch32/operands-aarch32.h"
38
39namespace vixl {
40namespace aarch32 {
41
42class UseScratchRegisterScope;
43
44enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 };
45
46// LiteralPool class, defined as a container for literals
47class LiteralPool {
48 public:
49  typedef std::list<RawLiteral*>::iterator RawLiteralListIterator;
50
51 public:
52  LiteralPool() : size_(0) {}
53  ~LiteralPool() {
54    VIXL_ASSERT(literals_.empty() && (size_ == 0));
55    for (RawLiteralListIterator literal_it = keep_until_delete_.begin();
56         literal_it != keep_until_delete_.end();
57         literal_it++) {
58      delete *literal_it;
59    }
60    keep_until_delete_.clear();
61  }
62
63  unsigned GetSize() const { return size_; }
64
65  // Add a literal to the literal container.
66  void AddLiteral(RawLiteral* literal) {
67    // Manually placed literals can't be added to a literal pool.
68    VIXL_ASSERT(!literal->IsManuallyPlaced());
69    VIXL_ASSERT(!literal->IsBound());
70    if (literal->GetPositionInPool() == Label::kMaxOffset) {
71      uint32_t position = GetSize();
72      literal->SetPositionInPool(position);
73      literals_.push_back(literal);
74      size_ += literal->GetAlignedSize();
75    }
76  }
77
78  // First literal to be emitted.
79  RawLiteralListIterator GetFirst() { return literals_.begin(); }
80
81  // Mark the end of the literal container.
82  RawLiteralListIterator GetEnd() { return literals_.end(); }
83
84  // Remove all the literals from the container.
85  // If the literal's memory management has been delegated to the container
86  // it will be delete'd.
87  void Clear() {
88    for (RawLiteralListIterator literal_it = GetFirst(); literal_it != GetEnd();
89         literal_it++) {
90      RawLiteral* literal = *literal_it;
91      switch (literal->GetDeletionPolicy()) {
92        case RawLiteral::kDeletedOnPlacementByPool:
93          delete literal;
94          break;
95        case RawLiteral::kDeletedOnPoolDestruction:
96          keep_until_delete_.push_back(literal);
97          break;
98        case RawLiteral::kManuallyDeleted:
99          break;
100      }
101    }
102    literals_.clear();
103    size_ = 0;
104  }
105
106 private:
107  // Size (in bytes and including alignments) of the literal pool.
108  unsigned size_;
109
110  // Literal container.
111  std::list<RawLiteral*> literals_;
112  // Already bound Literal container the app requested this pool to keep.
113  std::list<RawLiteral*> keep_until_delete_;
114};
115
116
117// Macro assembler for aarch32 instruction set.
118class MacroAssembler : public Assembler, public MacroAssemblerInterface {
119 public:
120  enum EmitOption { kBranchRequired, kNoBranchRequired };
121
122  virtual internal::AssemblerBase* AsAssemblerBase() VIXL_OVERRIDE {
123    return this;
124  }
125
126  virtual void BlockPools() VIXL_OVERRIDE {
127    literal_pool_manager_.Block();
128    veneer_pool_manager_.Block();
129  }
130  virtual void ReleasePools() VIXL_OVERRIDE {
131    literal_pool_manager_.Release();
132    veneer_pool_manager_.Release();
133  }
134  virtual void EnsureEmitPoolsFor(size_t size) VIXL_OVERRIDE {
135    // TODO: Optimise this. It also checks that there is space in the buffer,
136    // which we do not need to do here.
137    VIXL_ASSERT(IsUint32(size));
138    EnsureEmitFor(static_cast<uint32_t>(size));
139  }
140
141 private:
142  class MacroEmissionCheckScope : public EmissionCheckScope {
143   public:
144    explicit MacroEmissionCheckScope(MacroAssemblerInterface* masm)
145        : EmissionCheckScope(masm, kTypicalMacroInstructionMaxSize) {}
146
147   private:
148    static const size_t kTypicalMacroInstructionMaxSize =
149        8 * kMaxInstructionSizeInBytes;
150  };
151
152  class MacroAssemblerContext {
153   public:
154    MacroAssemblerContext() : count_(0) {}
155    ~MacroAssemblerContext() {}
156    unsigned GetRecursiveCount() const { return count_; }
157    void Up(const char* loc) {
158      location_stack_[count_] = loc;
159      count_++;
160      if (count_ >= kMaxRecursion) {
161        printf(
162            "Recursion limit reached; unable to resolve macro assembler "
163            "call.\n");
164        printf("Macro assembler context stack:\n");
165        for (unsigned i = 0; i < kMaxRecursion; i++) {
166          printf("%10s %s\n", (i == 0) ? "oldest -> " : "", location_stack_[i]);
167        }
168        VIXL_ABORT();
169      }
170    }
171    void Down() {
172      VIXL_ASSERT((count_ > 0) && (count_ < kMaxRecursion));
173      count_--;
174    }
175
176   private:
177    unsigned count_;
178    static const uint32_t kMaxRecursion = 6;
179    const char* location_stack_[kMaxRecursion];
180  };
181
182  // This scope is used at each Delegate entry to avoid infinite recursion of
183  // Delegate calls. The limit is defined by
184  // MacroAssemblerContext::kMaxRecursion.
185  class ContextScope {
186   public:
187    explicit ContextScope(MacroAssembler* const masm, const char* loc)
188        : masm_(masm) {
189      VIXL_ASSERT(masm_->AllowMacroInstructions());
190      masm_->GetContext()->Up(loc);
191    }
192    ~ContextScope() { masm_->GetContext()->Down(); }
193
194   private:
195    MacroAssembler* const masm_;
196  };
197
198  MacroAssemblerContext* GetContext() { return &context_; }
199
200  class ITScope {
201   public:
202    ITScope(MacroAssembler* masm, Condition* cond, bool can_use_it = false)
203        : masm_(masm), cond_(*cond), can_use_it_(can_use_it) {
204      if (!cond_.Is(al) && masm->IsUsingT32()) {
205        if (can_use_it_) {
206          // IT is not deprecated (that implies a 16 bit T32 instruction).
207          // We generate an IT instruction and a conditional instruction.
208          masm->it(cond_);
209        } else {
210          // The usage of IT is deprecated for the instruction.
211          // We generate a conditional branch and an unconditional instruction.
212          // TODO: Use a scope utility with a size check. To do that, we'd need
213          // one with Open() and Close() implemented.
214          masm_->EnsureEmitFor(kMaxT32MacroInstructionSizeInBytes);
215          // Generate the branch.
216          masm_->b(cond_.Negate(), Narrow, &label_);
217          // Tell the macro-assembler to generate unconditional instructions.
218          *cond = al;
219        }
220      }
221#ifdef VIXL_DEBUG
222      initial_cursor_offset_ = masm->GetCursorOffset();
223#else
224      USE(initial_cursor_offset_);
225#endif
226    }
227    ~ITScope() {
228      if (label_.IsReferenced()) {
229        // We only use the label for conditional T32 instructions for which we
230        // cannot use IT.
231        VIXL_ASSERT(!cond_.Is(al));
232        VIXL_ASSERT(masm_->IsUsingT32());
233        VIXL_ASSERT(!can_use_it_);
234        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
235                    kMaxT32MacroInstructionSizeInBytes);
236        masm_->BindHelper(&label_);
237      } else if (masm_->IsUsingT32() && !cond_.Is(al)) {
238        // If we've generated a conditional T32 instruction but haven't used the
239        // label, we must have used IT. Check that we did not generate a
240        // deprecated sequence.
241        VIXL_ASSERT(can_use_it_);
242        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
243                    k16BitT32InstructionSizeInBytes);
244      }
245    }
246
247   private:
248    MacroAssembler* masm_;
249    Condition cond_;
250    Label label_;
251    bool can_use_it_;
252    uint32_t initial_cursor_offset_;
253  };
254
255  template <Assembler::InstructionCondDtDL asmfn>
256  class EmitLiteralCondDtDL {
257   public:
258    EmitLiteralCondDtDL(DataType dt, DRegister rt) : dt_(dt), rt_(rt) {}
259    void emit(MacroAssembler* const masm,
260              Condition cond,
261              RawLiteral* const literal) {
262      (masm->*asmfn)(cond, dt_, rt_, literal);
263    }
264
265   private:
266    DataType dt_;
267    DRegister rt_;
268  };
269
270  template <Assembler::InstructionCondDtSL asmfn>
271  class EmitLiteralCondDtSL {
272   public:
273    EmitLiteralCondDtSL(DataType dt, SRegister rt) : dt_(dt), rt_(rt) {}
274    void emit(MacroAssembler* const masm,
275              Condition cond,
276              RawLiteral* const literal) {
277      (masm->*asmfn)(cond, dt_, rt_, literal);
278    }
279
280   private:
281    DataType dt_;
282    SRegister rt_;
283  };
284
285  template <Assembler::InstructionCondRL asmfn>
286  class EmitLiteralCondRL {
287   public:
288    explicit EmitLiteralCondRL(Register rt) : rt_(rt) {}
289    void emit(MacroAssembler* const masm,
290              Condition cond,
291              RawLiteral* const literal) {
292      (masm->*asmfn)(cond, rt_, literal);
293    }
294
295   private:
296    Register rt_;
297  };
298
299  template <Assembler::InstructionCondRRL asmfn>
300  class EmitLiteralCondRRL {
301   public:
302    EmitLiteralCondRRL(Register rt, Register rt2) : rt_(rt), rt2_(rt2) {}
303    void emit(MacroAssembler* const masm,
304              Condition cond,
305              RawLiteral* const literal) {
306      (masm->*asmfn)(cond, rt_, rt2_, literal);
307    }
308
309   private:
310    Register rt_, rt2_;
311  };
312
313  class LiteralPoolManager {
314   public:
315    explicit LiteralPoolManager(MacroAssembler* const masm)
316        : masm_(masm), monitor_(0) {
317      ResetCheckpoint();
318    }
319
320    void ResetCheckpoint() { checkpoint_ = Label::kMaxOffset; }
321
322    LiteralPool* GetLiteralPool() { return &literal_pool_; }
323    Label::Offset GetCheckpoint() const {
324      // Make room for a branch over the pools.
325      return checkpoint_ - kMaxInstructionSizeInBytes;
326    }
327    size_t GetLiteralPoolSize() const { return literal_pool_.GetSize(); }
328
329    // Checks if the insertion of the literal will put the forward reference
330    // too far in the literal pool.
331    // This function is called after generating an instruction with a literal.
332    // We want to know if the literal can be reached by the instruction.
333    // If not, we will unwind the instruction, generate the pool (without the
334    // last literal) and generate the instruction again.
335    // "literal" is the literal we want to insert into the pool.
336    // "from" is the location where the instruction which uses the literal has
337    // been generated.
338    bool WasInsertedTooFar(RawLiteral* literal) const {
339      // Last accessible location for the instruction we just generated, which
340      // uses the literal.
341      Label::ForwardReference& reference = literal->GetBackForwardRef();
342      Label::Offset new_checkpoint = AlignDown(reference.GetCheckpoint(), 4);
343
344      // TODO: We should not need to get the min of new_checkpoint and the
345      // existing checkpoint. The existing checkpoint should already have
346      // been checked when reserving space for this load literal instruction.
347      // The assertion below asserts that we don't need the min operation here.
348      Label::Offset checkpoint =
349          std::min(new_checkpoint, literal->GetAlignedCheckpoint(4));
350      bool literal_in_pool =
351          (literal->GetPositionInPool() != Label::kMaxOffset);
352      Label::Offset position_in_pool = literal_in_pool
353                                           ? literal->GetPositionInPool()
354                                           : literal_pool_.GetSize();
355      // Compare the checkpoint to the location where the literal should be
356      // added.
357      // We add space for two instructions: one branch and one potential veneer
358      // which may be added after the check. In this particular use case, no
359      // veneer can be added but, this way, we are consistent with all the
360      // literal pool checks.
361      int32_t from =
362          reference.GetLocation() + masm_->GetArchitectureStatePCOffset();
363      bool too_far =
364          checkpoint < from + position_in_pool +
365                           2 * static_cast<int32_t>(kMaxInstructionSizeInBytes);
366      // Assert if the literal is already in the pool and the existing
367      // checkpoint triggers a rewind here, as this means the pool should
368      // already have been emitted (perhaps we have not reserved enough space
369      // for the instruction we are about to rewind).
370      VIXL_ASSERT(!(too_far && (literal->GetCheckpoint() < new_checkpoint)));
371      return too_far;
372    }
373
374    // Set the different checkpoints where the literal pool has to be emited.
375    void UpdateCheckpoint(RawLiteral* literal) {
376      // The literal should have been placed somewhere in the literal pool
377      VIXL_ASSERT(literal->GetPositionInPool() != Label::kMaxOffset);
378      // TODO(all): Consider AddForwardRef as a  virtual so the checkpoint is
379      //   updated when inserted. Or move checkpoint_ into Label,
380      literal->UpdateCheckpoint();
381      Label::Offset tmp =
382          literal->GetAlignedCheckpoint(4) - literal->GetPositionInPool();
383      if (checkpoint_ > tmp) {
384        checkpoint_ = tmp;
385        masm_->ComputeCheckpoint();
386      }
387    }
388
389    bool IsEmpty() const { return GetLiteralPoolSize() == 0; }
390
391    void Block() { monitor_++; }
392    void Release() {
393      VIXL_ASSERT(IsBlocked());
394      if (--monitor_ == 0) {
395        // Ensure the pool has not been blocked for too long.
396        VIXL_ASSERT(masm_->GetCursorOffset() <= checkpoint_);
397      }
398    }
399    bool IsBlocked() const { return monitor_ != 0; }
400
401   private:
402    MacroAssembler* const masm_;
403    LiteralPool literal_pool_;
404
405    // Max offset in the code buffer where the literal needs to be
406    // emitted. A default value of Label::kMaxOffset means that the checkpoint
407    // is invalid.
408    Label::Offset checkpoint_;
409    // Indicates whether the emission of this pool is blocked.
410    int monitor_;
411  };
412
413  void PerformEnsureEmit(Label::Offset target, uint32_t extra_size);
414
415 protected:
416  void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm);
417  void PadToMinimumBranchRange(Label* label);
418
419  // Generate the instruction and if it's not possible revert the whole thing.
420  // emit the literal pool and regenerate the instruction.
421  // Note: The instruction is generated via
422  // void T::emit(MacroAssembler* const, RawLiteral* const)
423  template <typename T>
424  void GenerateInstruction(Condition cond,
425                           T instr_callback,
426                           RawLiteral* const literal) {
427    int32_t cursor = GetCursorOffset();
428    // Emit the instruction, via the assembler
429    {
430      MacroEmissionCheckScope guard(this);
431      // The ITScope can change the condition and we want to be able to revert
432      // this.
433      Condition c(cond);
434      ITScope it_scope(this, &c);
435      instr_callback.emit(this, c, literal);
436    }
437    if (!literal->IsManuallyPlaced() && !literal->IsBound() &&
438        !literal_pool_manager_.IsBlocked()) {
439      if (WasInsertedTooFar(literal)) {
440        // The instruction's data is too far: revert the emission
441        GetBuffer()->Rewind(cursor);
442        literal->InvalidateLastForwardReference(RawLiteral::kNoUpdateNecessary);
443        EmitLiteralPool(kBranchRequired);
444        MacroEmissionCheckScope guard(this);
445        ITScope it_scope(this, &cond);
446        instr_callback.emit(this, cond, literal);
447      }
448      // The literal pool above might have included the literal - in which
449      // case it will now be bound.
450      if (!literal->IsBound()) {
451        literal_pool_manager_.GetLiteralPool()->AddLiteral(literal);
452        literal_pool_manager_.UpdateCheckpoint(literal);
453      }
454    }
455  }
456
457 public:
458  explicit MacroAssembler(InstructionSet isa = kDefaultISA)
459      : Assembler(isa),
460        available_(r12),
461        current_scratch_scope_(NULL),
462        checkpoint_(Label::kMaxOffset),
463        literal_pool_manager_(this),
464        veneer_pool_manager_(this),
465        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) {
466#ifdef VIXL_DEBUG
467    SetAllowMacroInstructions(true);
468#else
469    USE(literal_pool_manager_);
470    USE(allow_macro_instructions_);
471#endif
472    ComputeCheckpoint();
473  }
474  explicit MacroAssembler(size_t size, InstructionSet isa = kDefaultISA)
475      : Assembler(size, isa),
476        available_(r12),
477        current_scratch_scope_(NULL),
478        checkpoint_(Label::kMaxOffset),
479        literal_pool_manager_(this),
480        veneer_pool_manager_(this),
481        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) {
482#ifdef VIXL_DEBUG
483    SetAllowMacroInstructions(true);
484#endif
485    ComputeCheckpoint();
486  }
487  MacroAssembler(byte* buffer, size_t size, InstructionSet isa = kDefaultISA)
488      : Assembler(buffer, size, isa),
489        available_(r12),
490        current_scratch_scope_(NULL),
491        checkpoint_(Label::kMaxOffset),
492        literal_pool_manager_(this),
493        veneer_pool_manager_(this),
494        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) {
495#ifdef VIXL_DEBUG
496    SetAllowMacroInstructions(true);
497#endif
498    ComputeCheckpoint();
499  }
500
501  bool GenerateSimulatorCode() const { return generate_simulator_code_; }
502
503  // Tell whether any of the macro instruction can be used. When false the
504  // MacroAssembler will assert if a method which can emit a variable number
505  // of instructions is called.
506  virtual void SetAllowMacroInstructions(bool value) VIXL_OVERRIDE {
507    allow_macro_instructions_ = value;
508  }
509  virtual bool AllowMacroInstructions() const VIXL_OVERRIDE {
510    return allow_macro_instructions_;
511  }
512
513  void FinalizeCode() {
514    EmitLiteralPool(kNoBranchRequired);
515    Assembler::FinalizeCode();
516  }
517
518  RegisterList* GetScratchRegisterList() { return &available_; }
519  VRegisterList* GetScratchVRegisterList() { return &available_vfp_; }
520
521  // Get or set the current (most-deeply-nested) UseScratchRegisterScope.
522  void SetCurrentScratchRegisterScope(UseScratchRegisterScope* scope) {
523    current_scratch_scope_ = scope;
524  }
525  UseScratchRegisterScope* GetCurrentScratchRegisterScope() {
526    return current_scratch_scope_;
527  }
528
529  // Given an address calculation (Register + immediate), generate code to
530  // partially compute the address. The returned MemOperand will perform any
531  // remaining computation in a subsequent load or store instruction.
532  //
533  // The offset provided should be the offset that would be used in a load or
534  // store instruction (if it had sufficient range). This only matters where
535  // base.Is(pc), since load and store instructions align the pc before
536  // dereferencing it.
537  //
538  // TODO: Improve the handling of negative offsets. They are not implemented
539  // precisely for now because they only have a marginal benefit for the
540  // existing uses (in delegates).
541  MemOperand MemOperandComputationHelper(Condition cond,
542                                         Register scratch,
543                                         Register base,
544                                         uint32_t offset,
545                                         uint32_t extra_offset_mask = 0);
546
547  MemOperand MemOperandComputationHelper(Register scratch,
548                                         Register base,
549                                         uint32_t offset,
550                                         uint32_t extra_offset_mask = 0) {
551    return MemOperandComputationHelper(al,
552                                       scratch,
553                                       base,
554                                       offset,
555                                       extra_offset_mask);
556  }
557  MemOperand MemOperandComputationHelper(Condition cond,
558                                         Register scratch,
559                                         Label* label,
560                                         uint32_t extra_offset_mask = 0) {
561    // Check for buffer space _before_ calculating the offset, in case we
562    // generate a pool that affects the offset calculation.
563    CodeBufferCheckScope scope(this, 4 * kMaxInstructionSizeInBytes);
564    Label::Offset offset =
565        label->GetLocation() -
566        AlignDown(GetCursorOffset() + GetArchitectureStatePCOffset(), 4);
567    return MemOperandComputationHelper(cond,
568                                       scratch,
569                                       pc,
570                                       offset,
571                                       extra_offset_mask);
572  }
573  MemOperand MemOperandComputationHelper(Register scratch,
574                                         Label* label,
575                                         uint32_t extra_offset_mask = 0) {
576    return MemOperandComputationHelper(al, scratch, label, extra_offset_mask);
577  }
578
579  // Determine the appropriate mask to pass into MemOperandComputationHelper.
580  uint32_t GetOffsetMask(InstructionType type, AddrMode addrmode);
581
582  // State and type helpers.
583  bool IsModifiedImmediate(uint32_t imm) {
584    return IsUsingT32() ? ImmediateT32::IsImmediateT32(imm)
585                        : ImmediateA32::IsImmediateA32(imm);
586  }
587
588  void Bind(Label* label) {
589    VIXL_ASSERT(allow_macro_instructions_);
590    PadToMinimumBranchRange(label);
591    BindHelper(label);
592  }
593
594  void AddBranchLabel(Label* label) {
595    if (label->IsBound()) return;
596    veneer_pool_manager_.AddLabel(label);
597  }
598
599  void Place(RawLiteral* literal) {
600    VIXL_ASSERT(allow_macro_instructions_);
601    VIXL_ASSERT(literal->IsManuallyPlaced());
602    // We have two calls to `GetBuffer()->Align()` below, that aligns on word
603    // (4 bytes) boundaries. Only one is taken into account in
604    // `GetAlignedSize()`.
605    static const size_t kMaxAlignSize = 3;
606    size_t size = literal->GetAlignedSize() + kMaxAlignSize;
607    VIXL_ASSERT(IsUint32(size));
608    // TODO: We should use a scope here to check the size of data emitted.  We
609    // currently cannot because `aarch32::CodeBufferCheckScope` currently checks
610    // for pools, so that could lead to an infinite loop.
611    EnsureEmitFor(static_cast<uint32_t>(size));
612    // Literals must be emitted aligned on word (4 bytes) boundaries.
613    GetBuffer()->Align();
614    PlaceHelper(literal);
615    GetBuffer()->Align();
616  }
617
618  void ComputeCheckpoint();
619
620  int32_t GetMarginBeforeVeneerEmission() const {
621    return veneer_pool_manager_.GetCheckpoint() - GetCursorOffset();
622  }
623
624  Label::Offset GetTargetForLiteralEmission() const {
625    if (literal_pool_manager_.IsEmpty()) return Label::kMaxOffset;
626    // We add an instruction to the size as the instruction which calls this
627    // function may add a veneer and, without this extra instruction, could put
628    // the literals out of range. For example, it's the case for a "B"
629    // instruction. At the beginning of the instruction we call EnsureEmitFor
630    // which calls this function. However, the target of the branch hasn't been
631    // inserted yet in the veneer pool.
632    size_t veneer_max_size =
633        veneer_pool_manager_.GetMaxSize() + kMaxInstructionSizeInBytes;
634    VIXL_ASSERT(IsInt32(veneer_max_size));
635    // We must be able to generate the veneer pool first.
636    Label::Offset tmp = literal_pool_manager_.GetCheckpoint() -
637                        static_cast<Label::Offset>(veneer_max_size);
638    VIXL_ASSERT(tmp >= 0);
639    return tmp;
640  }
641
642  int32_t GetMarginBeforeLiteralEmission() const {
643    Label::Offset tmp = GetTargetForLiteralEmission();
644    VIXL_ASSERT(tmp >= GetCursorOffset());
645    return tmp - GetCursorOffset();
646  }
647
648  bool VeneerPoolIsEmpty() const { return veneer_pool_manager_.IsEmpty(); }
649  bool LiteralPoolIsEmpty() const { return literal_pool_manager_.IsEmpty(); }
650
651  void EnsureEmitFor(uint32_t size) {
652    Label::Offset target = GetCursorOffset() + size;
653    if (target <= checkpoint_) return;
654    PerformEnsureEmit(target, size);
655  }
656
657  bool WasInsertedTooFar(RawLiteral* literal) {
658    return literal_pool_manager_.WasInsertedTooFar(literal);
659  }
660
661  bool AliasesAvailableScratchRegister(Register reg) {
662    return GetScratchRegisterList()->Includes(reg);
663  }
664
665  bool AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg) {
666    if (reg.IsAPSR_nzcv()) return false;
667    return GetScratchRegisterList()->Includes(reg.AsRegister());
668  }
669
670  bool AliasesAvailableScratchRegister(VRegister reg) {
671    return GetScratchVRegisterList()->IncludesAliasOf(reg);
672  }
673
674  bool AliasesAvailableScratchRegister(const Operand& operand) {
675    if (operand.IsImmediate()) return false;
676    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
677           (operand.IsRegisterShiftedRegister() &&
678            AliasesAvailableScratchRegister(operand.GetShiftRegister()));
679  }
680
681  bool AliasesAvailableScratchRegister(const NeonOperand& operand) {
682    if (operand.IsImmediate()) return false;
683    return AliasesAvailableScratchRegister(operand.GetRegister());
684  }
685
686  bool AliasesAvailableScratchRegister(SRegisterList list) {
687    for (int n = 0; n < list.GetLength(); n++) {
688      if (AliasesAvailableScratchRegister(list.GetSRegister(n))) return true;
689    }
690    return false;
691  }
692
693  bool AliasesAvailableScratchRegister(DRegisterList list) {
694    for (int n = 0; n < list.GetLength(); n++) {
695      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
696    }
697    return false;
698  }
699
700  bool AliasesAvailableScratchRegister(NeonRegisterList list) {
701    for (int n = 0; n < list.GetLength(); n++) {
702      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
703    }
704    return false;
705  }
706
707  bool AliasesAvailableScratchRegister(RegisterList list) {
708    return GetScratchRegisterList()->Overlaps(list);
709  }
710
711  bool AliasesAvailableScratchRegister(const MemOperand& operand) {
712    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
713           (operand.IsShiftedRegister() &&
714            AliasesAvailableScratchRegister(operand.GetOffsetRegister()));
715  }
716
717  // Emit the literal pool in the code buffer.
718  // Every literal is placed on a 32bit boundary
719  // All the literals in the pool will be removed from the pool and potentially
720  // delete'd.
721  void EmitLiteralPool(LiteralPool* const literal_pool, EmitOption option);
722  void EmitLiteralPool(EmitOption option = kBranchRequired) {
723    VIXL_ASSERT(!literal_pool_manager_.IsBlocked());
724    EmitLiteralPool(literal_pool_manager_.GetLiteralPool(), option);
725    literal_pool_manager_.ResetCheckpoint();
726    ComputeCheckpoint();
727  }
728
729  size_t GetLiteralPoolSize() const {
730    return literal_pool_manager_.GetLiteralPoolSize();
731  }
732
733  // Adr with a literal already constructed. Add the literal to the pool if it
734  // is not already done.
735  void Adr(Condition cond, Register rd, RawLiteral* literal) {
736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
737    VIXL_ASSERT(allow_macro_instructions_);
738    VIXL_ASSERT(OutsideITBlock());
739    EmitLiteralCondRL<&Assembler::adr> emit_helper(rd);
740    GenerateInstruction(cond, emit_helper, literal);
741  }
742  void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); }
743
744  // Loads with literals already constructed. Add the literal to the pool
745  // if it is not already done.
746  void Ldr(Condition cond, Register rt, RawLiteral* literal) {
747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
748    VIXL_ASSERT(allow_macro_instructions_);
749    VIXL_ASSERT(OutsideITBlock());
750    EmitLiteralCondRL<&Assembler::ldr> emit_helper(rt);
751    GenerateInstruction(cond, emit_helper, literal);
752  }
753  void Ldr(Register rt, RawLiteral* literal) { Ldr(al, rt, literal); }
754
755  void Ldrb(Condition cond, Register rt, RawLiteral* literal) {
756    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
757    VIXL_ASSERT(allow_macro_instructions_);
758    VIXL_ASSERT(OutsideITBlock());
759    EmitLiteralCondRL<&Assembler::ldrb> emit_helper(rt);
760    GenerateInstruction(cond, emit_helper, literal);
761  }
762  void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); }
763
764  void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) {
765    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
766    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
767    VIXL_ASSERT(allow_macro_instructions_);
768    VIXL_ASSERT(OutsideITBlock());
769    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(rt, rt2);
770    GenerateInstruction(cond, emit_helper, literal);
771  }
772  void Ldrd(Register rt, Register rt2, RawLiteral* literal) {
773    Ldrd(al, rt, rt2, literal);
774  }
775
776  void Ldrh(Condition cond, Register rt, RawLiteral* literal) {
777    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
778    VIXL_ASSERT(allow_macro_instructions_);
779    VIXL_ASSERT(OutsideITBlock());
780    EmitLiteralCondRL<&Assembler::ldrh> emit_helper(rt);
781    GenerateInstruction(cond, emit_helper, literal);
782  }
783  void Ldrh(Register rt, RawLiteral* literal) { Ldrh(al, rt, literal); }
784
785  void Ldrsb(Condition cond, Register rt, RawLiteral* literal) {
786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
787    VIXL_ASSERT(allow_macro_instructions_);
788    VIXL_ASSERT(OutsideITBlock());
789    EmitLiteralCondRL<&Assembler::ldrsb> emit_helper(rt);
790    GenerateInstruction(cond, emit_helper, literal);
791  }
792  void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); }
793
794  void Ldrsh(Condition cond, Register rt, RawLiteral* literal) {
795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
796    VIXL_ASSERT(allow_macro_instructions_);
797    VIXL_ASSERT(OutsideITBlock());
798    EmitLiteralCondRL<&Assembler::ldrsh> emit_helper(rt);
799    GenerateInstruction(cond, emit_helper, literal);
800  }
801  void Ldrsh(Register rt, RawLiteral* literal) { Ldrsh(al, rt, literal); }
802
803  void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) {
804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
805    VIXL_ASSERT(allow_macro_instructions_);
806    VIXL_ASSERT(OutsideITBlock());
807    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(dt, rd);
808    GenerateInstruction(cond, emit_helper, literal);
809  }
810  void Vldr(DataType dt, DRegister rd, RawLiteral* literal) {
811    Vldr(al, dt, rd, literal);
812  }
813  void Vldr(Condition cond, DRegister rd, RawLiteral* literal) {
814    Vldr(cond, Untyped64, rd, literal);
815  }
816  void Vldr(DRegister rd, RawLiteral* literal) {
817    Vldr(al, Untyped64, rd, literal);
818  }
819
820  void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) {
821    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
822    VIXL_ASSERT(allow_macro_instructions_);
823    VIXL_ASSERT(OutsideITBlock());
824    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(dt, rd);
825    GenerateInstruction(cond, emit_helper, literal);
826  }
827  void Vldr(DataType dt, SRegister rd, RawLiteral* literal) {
828    Vldr(al, dt, rd, literal);
829  }
830  void Vldr(Condition cond, SRegister rd, RawLiteral* literal) {
831    Vldr(cond, Untyped32, rd, literal);
832  }
833  void Vldr(SRegister rd, RawLiteral* literal) {
834    Vldr(al, Untyped32, rd, literal);
835  }
836
837  // Generic Ldr(register, data)
838  void Ldr(Condition cond, Register rt, uint32_t v) {
839    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
840    VIXL_ASSERT(allow_macro_instructions_);
841    VIXL_ASSERT(OutsideITBlock());
842    RawLiteral* literal =
843        new Literal<uint32_t>(v, RawLiteral::kDeletedOnPlacementByPool);
844    EmitLiteralCondRL<&Assembler::ldr> emit_helper(rt);
845    GenerateInstruction(cond, emit_helper, literal);
846  }
847  template <typename T>
848  void Ldr(Register rt, T v) {
849    Ldr(al, rt, v);
850  }
851
852  // Generic Ldrd(rt, rt2, data)
853  void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) {
854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
855    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
856    VIXL_ASSERT(allow_macro_instructions_);
857    VIXL_ASSERT(OutsideITBlock());
858    RawLiteral* literal =
859        new Literal<uint64_t>(v, RawLiteral::kDeletedOnPlacementByPool);
860    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(rt, rt2);
861    GenerateInstruction(cond, emit_helper, literal);
862  }
863  template <typename T>
864  void Ldrd(Register rt, Register rt2, T v) {
865    Ldrd(al, rt, rt2, v);
866  }
867
868  void Vldr(Condition cond, SRegister rd, float v) {
869    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
870    VIXL_ASSERT(allow_macro_instructions_);
871    VIXL_ASSERT(OutsideITBlock());
872    RawLiteral* literal =
873        new Literal<float>(v, RawLiteral::kDeletedOnPlacementByPool);
874    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(Untyped32, rd);
875    GenerateInstruction(cond, emit_helper, literal);
876  }
877  void Vldr(SRegister rd, float v) { Vldr(al, rd, v); }
878
879  void Vldr(Condition cond, DRegister rd, double v) {
880    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
881    VIXL_ASSERT(allow_macro_instructions_);
882    VIXL_ASSERT(OutsideITBlock());
883    RawLiteral* literal =
884        new Literal<double>(v, RawLiteral::kDeletedOnPlacementByPool);
885    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(Untyped64, rd);
886    GenerateInstruction(cond, emit_helper, literal);
887  }
888  void Vldr(DRegister rd, double v) { Vldr(al, rd, v); }
889
890  void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); }
891  void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); }
892  void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); }
893  void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); }
894
895  // Claim memory on the stack.
896  // Note that the Claim, Drop, and Peek helpers below ensure that offsets used
897  // are multiples of 32 bits to help maintain 32-bit SP alignment.
898  // We could `Align{Up,Down}(size, 4)`, but that's potentially problematic:
899  //     Claim(3)
900  //     Claim(1)
901  //     Drop(4)
902  // would seem correct, when in fact:
903  //    Claim(3) -> sp = sp - 4
904  //    Claim(1) -> sp = sp - 4
905  //    Drop(4)  -> sp = sp + 4
906  //
907  void Claim(int32_t size) {
908    if (size == 0) return;
909    // The stack must be kept 32bit aligned.
910    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
911    Sub(sp, sp, size);
912  }
913  // Release memory on the stack
914  void Drop(int32_t size) {
915    if (size == 0) return;
916    // The stack must be kept 32bit aligned.
917    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
918    Add(sp, sp, size);
919  }
920  void Peek(Register dst, int32_t offset) {
921    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
922    Ldr(dst, MemOperand(sp, offset));
923  }
924  void Poke(Register src, int32_t offset) {
925    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
926    Str(src, MemOperand(sp, offset));
927  }
928  void Printf(const char* format,
929              CPURegister reg1 = NoReg,
930              CPURegister reg2 = NoReg,
931              CPURegister reg3 = NoReg,
932              CPURegister reg4 = NoReg);
933  // Functions used by Printf for generation.
934  void PushRegister(CPURegister reg);
935  void PreparePrintfArgument(CPURegister reg,
936                             int* core_count,
937                             int* vfp_count,
938                             uint32_t* printf_type);
939  // Handlers for cases not handled by the assembler.
940  // ADD, MOVT, MOVW, SUB, SXTB16, TEQ, UXTB16
941  virtual void Delegate(InstructionType type,
942                        InstructionCondROp instruction,
943                        Condition cond,
944                        Register rn,
945                        const Operand& operand) VIXL_OVERRIDE;
946  // CMN, CMP, MOV, MOVS, MVN, MVNS, SXTB, SXTH, TST, UXTB, UXTH
947  virtual void Delegate(InstructionType type,
948                        InstructionCondSizeROp instruction,
949                        Condition cond,
950                        EncodingSize size,
951                        Register rn,
952                        const Operand& operand) VIXL_OVERRIDE;
953  // ADDW, ORN, ORNS, PKHBT, PKHTB, RSC, RSCS, SUBW, SXTAB, SXTAB16, SXTAH,
954  // UXTAB, UXTAB16, UXTAH
955  virtual void Delegate(InstructionType type,
956                        InstructionCondRROp instruction,
957                        Condition cond,
958                        Register rd,
959                        Register rn,
960                        const Operand& operand) VIXL_OVERRIDE;
961  // ADC, ADCS, ADD, ADDS, AND, ANDS, ASR, ASRS, BIC, BICS, EOR, EORS, LSL,
962  // LSLS, LSR, LSRS, ORR, ORRS, ROR, RORS, RSB, RSBS, SBC, SBCS, SUB, SUBS
963  virtual void Delegate(InstructionType type,
964                        InstructionCondSizeRL instruction,
965                        Condition cond,
966                        EncodingSize size,
967                        Register rd,
968                        Label* label) VIXL_OVERRIDE;
969  bool GenerateSplitInstruction(InstructionCondSizeRROp instruction,
970                                Condition cond,
971                                Register rd,
972                                Register rn,
973                                uint32_t imm,
974                                uint32_t mask);
975  virtual void Delegate(InstructionType type,
976                        InstructionCondSizeRROp instruction,
977                        Condition cond,
978                        EncodingSize size,
979                        Register rd,
980                        Register rn,
981                        const Operand& operand) VIXL_OVERRIDE;
982  // CBNZ, CBZ
983  virtual void Delegate(InstructionType type,
984                        InstructionRL instruction,
985                        Register rn,
986                        Label* label) VIXL_OVERRIDE;
987  // VMOV
988  virtual void Delegate(InstructionType type,
989                        InstructionCondDtSSop instruction,
990                        Condition cond,
991                        DataType dt,
992                        SRegister rd,
993                        const SOperand& operand) VIXL_OVERRIDE;
994  // VMOV, VMVN
995  virtual void Delegate(InstructionType type,
996                        InstructionCondDtDDop instruction,
997                        Condition cond,
998                        DataType dt,
999                        DRegister rd,
1000                        const DOperand& operand) VIXL_OVERRIDE;
1001  // VMOV, VMVN
1002  virtual void Delegate(InstructionType type,
1003                        InstructionCondDtQQop instruction,
1004                        Condition cond,
1005                        DataType dt,
1006                        QRegister rd,
1007                        const QOperand& operand) VIXL_OVERRIDE;
1008  // LDR, LDRB, LDRH, LDRSB, LDRSH, STR, STRB, STRH
1009  virtual void Delegate(InstructionType type,
1010                        InstructionCondSizeRMop instruction,
1011                        Condition cond,
1012                        EncodingSize size,
1013                        Register rd,
1014                        const MemOperand& operand) VIXL_OVERRIDE;
1015  // LDAEXD, LDRD, LDREXD, STLEX, STLEXB, STLEXH, STRD, STREX, STREXB, STREXH
1016  virtual void Delegate(InstructionType type,
1017                        InstructionCondRL instruction,
1018                        Condition cond,
1019                        Register rt,
1020                        Label* label) VIXL_OVERRIDE;
1021  virtual void Delegate(InstructionType type,
1022                        InstructionCondRRL instruction,
1023                        Condition cond,
1024                        Register rt,
1025                        Register rt2,
1026                        Label* label) VIXL_OVERRIDE;
1027  virtual void Delegate(InstructionType type,
1028                        InstructionCondRRMop instruction,
1029                        Condition cond,
1030                        Register rt,
1031                        Register rt2,
1032                        const MemOperand& operand) VIXL_OVERRIDE;
1033  // VLDR, VSTR
1034  virtual void Delegate(InstructionType type,
1035                        InstructionCondDtSMop instruction,
1036                        Condition cond,
1037                        DataType dt,
1038                        SRegister rd,
1039                        const MemOperand& operand) VIXL_OVERRIDE;
1040  // VLDR, VSTR
1041  virtual void Delegate(InstructionType type,
1042                        InstructionCondDtDMop instruction,
1043                        Condition cond,
1044                        DataType dt,
1045                        DRegister rd,
1046                        const MemOperand& operand) VIXL_OVERRIDE;
1047  // MSR
1048  virtual void Delegate(InstructionType type,
1049                        InstructionCondMsrOp instruction,
1050                        Condition cond,
1051                        MaskedSpecialRegister spec_reg,
1052                        const Operand& operand) VIXL_OVERRIDE;
1053  virtual void Delegate(InstructionType type,
1054                        InstructionCondDtDL instruction,
1055                        Condition cond,
1056                        DataType dt,
1057                        DRegister rd,
1058                        Label* label) VIXL_OVERRIDE;
1059  virtual void Delegate(InstructionType type,
1060                        InstructionCondDtSL instruction,
1061                        Condition cond,
1062                        DataType dt,
1063                        SRegister rd,
1064                        Label* label) VIXL_OVERRIDE;
1065
1066  // Start of generated code.
1067
1068  void Adc(Condition cond, Register rd, Register rn, const Operand& operand) {
1069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1070    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1071    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1072    VIXL_ASSERT(allow_macro_instructions_);
1073    VIXL_ASSERT(OutsideITBlock());
1074    MacroEmissionCheckScope guard(this);
1075    bool can_use_it =
1076        // ADC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1077        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
1078        operand.GetBaseRegister().IsLow();
1079    ITScope it_scope(this, &cond, can_use_it);
1080    adc(cond, rd, rn, operand);
1081  }
1082  void Adc(Register rd, Register rn, const Operand& operand) {
1083    Adc(al, rd, rn, operand);
1084  }
1085  void Adc(FlagsUpdate flags,
1086           Condition cond,
1087           Register rd,
1088           Register rn,
1089           const Operand& operand) {
1090    switch (flags) {
1091      case LeaveFlags:
1092        Adc(cond, rd, rn, operand);
1093        break;
1094      case SetFlags:
1095        Adcs(cond, rd, rn, operand);
1096        break;
1097      case DontCare:
1098        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1099                                   rn.Is(rd) && operand.IsPlainRegister() &&
1100                                   operand.GetBaseRegister().IsLow();
1101        if (setflags_is_smaller) {
1102          Adcs(cond, rd, rn, operand);
1103        } else {
1104          Adc(cond, rd, rn, operand);
1105        }
1106        break;
1107    }
1108  }
1109  void Adc(FlagsUpdate flags,
1110           Register rd,
1111           Register rn,
1112           const Operand& operand) {
1113    Adc(flags, al, rd, rn, operand);
1114  }
1115
1116  void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) {
1117    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1118    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1119    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1120    VIXL_ASSERT(allow_macro_instructions_);
1121    VIXL_ASSERT(OutsideITBlock());
1122    MacroEmissionCheckScope guard(this);
1123    ITScope it_scope(this, &cond);
1124    adcs(cond, rd, rn, operand);
1125  }
1126  void Adcs(Register rd, Register rn, const Operand& operand) {
1127    Adcs(al, rd, rn, operand);
1128  }
1129
1130  void Add(Condition cond, Register rd, Register rn, const Operand& operand) {
1131    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1132    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1133    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1134    VIXL_ASSERT(allow_macro_instructions_);
1135    VIXL_ASSERT(OutsideITBlock());
1136    MacroEmissionCheckScope guard(this);
1137    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1138      uint32_t immediate = operand.GetImmediate();
1139      if (immediate == 0) {
1140        return;
1141      }
1142    }
1143    bool can_use_it =
1144        // ADD<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
1145        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
1146         rd.IsLow()) ||
1147        // ADD<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
1148        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1149         rd.IsLow() && rn.Is(rd)) ||
1150        // ADD{<c>}{<q>} <Rd>, SP, #<imm8> ; T1
1151        (operand.IsImmediate() && (operand.GetImmediate() <= 1020) &&
1152         ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) ||
1153        // ADD<c>{<q>} <Rd>, <Rn>, <Rm>
1154        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1155         operand.GetBaseRegister().IsLow()) ||
1156        // ADD<c>{<q>} <Rdn>, <Rm> ; T2
1157        (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) &&
1158         !operand.GetBaseRegister().IsSP() &&
1159         !operand.GetBaseRegister().IsPC()) ||
1160        // ADD{<c>}{<q>} {<Rdm>,} SP, <Rdm> ; T1
1161        (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() &&
1162         operand.GetBaseRegister().Is(rd));
1163    ITScope it_scope(this, &cond, can_use_it);
1164    add(cond, rd, rn, operand);
1165  }
1166  void Add(Register rd, Register rn, const Operand& operand) {
1167    Add(al, rd, rn, operand);
1168  }
1169  void Add(FlagsUpdate flags,
1170           Condition cond,
1171           Register rd,
1172           Register rn,
1173           const Operand& operand) {
1174    switch (flags) {
1175      case LeaveFlags:
1176        Add(cond, rd, rn, operand);
1177        break;
1178      case SetFlags:
1179        Adds(cond, rd, rn, operand);
1180        break;
1181      case DontCare:
1182        bool setflags_is_smaller =
1183            IsUsingT32() && cond.Is(al) &&
1184            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1185              !rd.Is(rn) && operand.GetBaseRegister().IsLow()) ||
1186             (operand.IsImmediate() &&
1187              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
1188               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
1189        if (setflags_is_smaller) {
1190          Adds(cond, rd, rn, operand);
1191        } else {
1192          bool changed_op_is_smaller =
1193              operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
1194              ((rd.IsLow() && rn.IsLow() &&
1195                (operand.GetSignedImmediate() >= -7)) ||
1196               (rd.IsLow() && rn.Is(rd) &&
1197                (operand.GetSignedImmediate() >= -255)));
1198          if (changed_op_is_smaller) {
1199            Subs(cond, rd, rn, -operand.GetSignedImmediate());
1200          } else {
1201            Add(cond, rd, rn, operand);
1202          }
1203        }
1204        break;
1205    }
1206  }
1207  void Add(FlagsUpdate flags,
1208           Register rd,
1209           Register rn,
1210           const Operand& operand) {
1211    Add(flags, al, rd, rn, operand);
1212  }
1213
1214  void Adds(Condition cond, Register rd, Register rn, const Operand& operand) {
1215    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1216    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1217    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1218    VIXL_ASSERT(allow_macro_instructions_);
1219    VIXL_ASSERT(OutsideITBlock());
1220    MacroEmissionCheckScope guard(this);
1221    ITScope it_scope(this, &cond);
1222    adds(cond, rd, rn, operand);
1223  }
1224  void Adds(Register rd, Register rn, const Operand& operand) {
1225    Adds(al, rd, rn, operand);
1226  }
1227
1228  void Adr(Condition cond, Register rd, Label* label) {
1229    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1230    VIXL_ASSERT(allow_macro_instructions_);
1231    VIXL_ASSERT(OutsideITBlock());
1232    MacroEmissionCheckScope guard(this);
1233    ITScope it_scope(this, &cond);
1234    adr(cond, rd, label);
1235  }
1236  void Adr(Register rd, Label* label) { Adr(al, rd, label); }
1237
1238  void And(Condition cond, Register rd, Register rn, const Operand& operand) {
1239    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1240    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1241    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1242    VIXL_ASSERT(allow_macro_instructions_);
1243    VIXL_ASSERT(OutsideITBlock());
1244    MacroEmissionCheckScope guard(this);
1245    if (rd.Is(rn) && operand.IsPlainRegister() &&
1246        rd.Is(operand.GetBaseRegister())) {
1247      return;
1248    }
1249    if (cond.Is(al) && operand.IsImmediate()) {
1250      uint32_t immediate = operand.GetImmediate();
1251      if (immediate == 0) {
1252        mov(rd, 0);
1253        return;
1254      }
1255      if ((immediate == 0xffffffff) && rd.Is(rn)) {
1256        return;
1257      }
1258    }
1259    bool can_use_it =
1260        // AND<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1261        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1262        operand.GetBaseRegister().IsLow();
1263    ITScope it_scope(this, &cond, can_use_it);
1264    and_(cond, rd, rn, operand);
1265  }
1266  void And(Register rd, Register rn, const Operand& operand) {
1267    And(al, rd, rn, operand);
1268  }
1269  void And(FlagsUpdate flags,
1270           Condition cond,
1271           Register rd,
1272           Register rn,
1273           const Operand& operand) {
1274    switch (flags) {
1275      case LeaveFlags:
1276        And(cond, rd, rn, operand);
1277        break;
1278      case SetFlags:
1279        Ands(cond, rd, rn, operand);
1280        break;
1281      case DontCare:
1282        if (operand.IsPlainRegister() && rd.Is(rn) &&
1283            rd.Is(operand.GetBaseRegister())) {
1284          return;
1285        }
1286        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1287                                   rn.Is(rd) && operand.IsPlainRegister() &&
1288                                   operand.GetBaseRegister().IsLow();
1289        if (setflags_is_smaller) {
1290          Ands(cond, rd, rn, operand);
1291        } else {
1292          And(cond, rd, rn, operand);
1293        }
1294        break;
1295    }
1296  }
1297  void And(FlagsUpdate flags,
1298           Register rd,
1299           Register rn,
1300           const Operand& operand) {
1301    And(flags, al, rd, rn, operand);
1302  }
1303
1304  void Ands(Condition cond, Register rd, Register rn, const Operand& operand) {
1305    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1306    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1307    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1308    VIXL_ASSERT(allow_macro_instructions_);
1309    VIXL_ASSERT(OutsideITBlock());
1310    MacroEmissionCheckScope guard(this);
1311    ITScope it_scope(this, &cond);
1312    ands(cond, rd, rn, operand);
1313  }
1314  void Ands(Register rd, Register rn, const Operand& operand) {
1315    Ands(al, rd, rn, operand);
1316  }
1317
1318  void Asr(Condition cond, Register rd, Register rm, const Operand& operand) {
1319    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1320    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1321    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1322    VIXL_ASSERT(allow_macro_instructions_);
1323    VIXL_ASSERT(OutsideITBlock());
1324    MacroEmissionCheckScope guard(this);
1325    bool can_use_it =
1326        // ASR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
1327        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1328         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
1329        // ASR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
1330        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
1331         operand.GetBaseRegister().IsLow());
1332    ITScope it_scope(this, &cond, can_use_it);
1333    asr(cond, rd, rm, operand);
1334  }
1335  void Asr(Register rd, Register rm, const Operand& operand) {
1336    Asr(al, rd, rm, operand);
1337  }
1338  void Asr(FlagsUpdate flags,
1339           Condition cond,
1340           Register rd,
1341           Register rm,
1342           const Operand& operand) {
1343    switch (flags) {
1344      case LeaveFlags:
1345        Asr(cond, rd, rm, operand);
1346        break;
1347      case SetFlags:
1348        Asrs(cond, rd, rm, operand);
1349        break;
1350      case DontCare:
1351        bool setflags_is_smaller =
1352            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
1353            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1354              (operand.GetImmediate() <= 32)) ||
1355             (operand.IsPlainRegister() && rd.Is(rm)));
1356        if (setflags_is_smaller) {
1357          Asrs(cond, rd, rm, operand);
1358        } else {
1359          Asr(cond, rd, rm, operand);
1360        }
1361        break;
1362    }
1363  }
1364  void Asr(FlagsUpdate flags,
1365           Register rd,
1366           Register rm,
1367           const Operand& operand) {
1368    Asr(flags, al, rd, rm, operand);
1369  }
1370
1371  void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) {
1372    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1373    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1374    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1375    VIXL_ASSERT(allow_macro_instructions_);
1376    VIXL_ASSERT(OutsideITBlock());
1377    MacroEmissionCheckScope guard(this);
1378    ITScope it_scope(this, &cond);
1379    asrs(cond, rd, rm, operand);
1380  }
1381  void Asrs(Register rd, Register rm, const Operand& operand) {
1382    Asrs(al, rd, rm, operand);
1383  }
1384
1385  void B(Condition cond, Label* label, BranchHint hint = kBranchWithoutHint) {
1386    VIXL_ASSERT(allow_macro_instructions_);
1387    VIXL_ASSERT(OutsideITBlock());
1388    MacroEmissionCheckScope guard(this);
1389    if (hint == kNear) {
1390      if (label->IsBound()) {
1391        b(cond, label);
1392      } else {
1393        b(cond, Narrow, label);
1394      }
1395    } else {
1396      b(cond, label);
1397    }
1398    AddBranchLabel(label);
1399  }
1400  void B(Label* label, BranchHint hint = kBranchWithoutHint) {
1401    B(al, label, hint);
1402  }
1403  void BPreferNear(Condition cond, Label* label) { B(cond, label, kNear); }
1404  void BPreferNear(Label* label) { B(al, label, kNear); }
1405
1406  void Bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand) {
1407    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1408    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1409    VIXL_ASSERT(allow_macro_instructions_);
1410    VIXL_ASSERT(OutsideITBlock());
1411    MacroEmissionCheckScope guard(this);
1412    ITScope it_scope(this, &cond);
1413    bfc(cond, rd, lsb, operand);
1414  }
1415  void Bfc(Register rd, uint32_t lsb, const Operand& operand) {
1416    Bfc(al, rd, lsb, operand);
1417  }
1418
1419  void Bfi(Condition cond,
1420           Register rd,
1421           Register rn,
1422           uint32_t lsb,
1423           const Operand& operand) {
1424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1426    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1427    VIXL_ASSERT(allow_macro_instructions_);
1428    VIXL_ASSERT(OutsideITBlock());
1429    MacroEmissionCheckScope guard(this);
1430    ITScope it_scope(this, &cond);
1431    bfi(cond, rd, rn, lsb, operand);
1432  }
1433  void Bfi(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
1434    Bfi(al, rd, rn, lsb, operand);
1435  }
1436
1437  void Bic(Condition cond, Register rd, Register rn, const Operand& operand) {
1438    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1440    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1441    VIXL_ASSERT(allow_macro_instructions_);
1442    VIXL_ASSERT(OutsideITBlock());
1443    MacroEmissionCheckScope guard(this);
1444    if (cond.Is(al) && operand.IsImmediate()) {
1445      uint32_t immediate = operand.GetImmediate();
1446      if ((immediate == 0) && rd.Is(rn)) {
1447        return;
1448      }
1449      if (immediate == 0xffffffff) {
1450        mov(rd, 0);
1451        return;
1452      }
1453    }
1454    bool can_use_it =
1455        // BIC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1456        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1457        operand.GetBaseRegister().IsLow();
1458    ITScope it_scope(this, &cond, can_use_it);
1459    bic(cond, rd, rn, operand);
1460  }
1461  void Bic(Register rd, Register rn, const Operand& operand) {
1462    Bic(al, rd, rn, operand);
1463  }
1464  void Bic(FlagsUpdate flags,
1465           Condition cond,
1466           Register rd,
1467           Register rn,
1468           const Operand& operand) {
1469    switch (flags) {
1470      case LeaveFlags:
1471        Bic(cond, rd, rn, operand);
1472        break;
1473      case SetFlags:
1474        Bics(cond, rd, rn, operand);
1475        break;
1476      case DontCare:
1477        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1478                                   rn.Is(rd) && operand.IsPlainRegister() &&
1479                                   operand.GetBaseRegister().IsLow();
1480        if (setflags_is_smaller) {
1481          Bics(cond, rd, rn, operand);
1482        } else {
1483          Bic(cond, rd, rn, operand);
1484        }
1485        break;
1486    }
1487  }
1488  void Bic(FlagsUpdate flags,
1489           Register rd,
1490           Register rn,
1491           const Operand& operand) {
1492    Bic(flags, al, rd, rn, operand);
1493  }
1494
1495  void Bics(Condition cond, Register rd, Register rn, const Operand& operand) {
1496    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1497    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1498    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1499    VIXL_ASSERT(allow_macro_instructions_);
1500    VIXL_ASSERT(OutsideITBlock());
1501    MacroEmissionCheckScope guard(this);
1502    ITScope it_scope(this, &cond);
1503    bics(cond, rd, rn, operand);
1504  }
1505  void Bics(Register rd, Register rn, const Operand& operand) {
1506    Bics(al, rd, rn, operand);
1507  }
1508
1509  void Bkpt(Condition cond, uint32_t imm) {
1510    VIXL_ASSERT(allow_macro_instructions_);
1511    VIXL_ASSERT(OutsideITBlock());
1512    MacroEmissionCheckScope guard(this);
1513    ITScope it_scope(this, &cond);
1514    bkpt(cond, imm);
1515  }
1516  void Bkpt(uint32_t imm) { Bkpt(al, imm); }
1517
1518  void Bl(Condition cond, Label* label) {
1519    VIXL_ASSERT(allow_macro_instructions_);
1520    VIXL_ASSERT(OutsideITBlock());
1521    MacroEmissionCheckScope guard(this);
1522    ITScope it_scope(this, &cond);
1523    bl(cond, label);
1524    AddBranchLabel(label);
1525  }
1526  void Bl(Label* label) { Bl(al, label); }
1527
1528  void Blx(Condition cond, Label* label) {
1529    VIXL_ASSERT(allow_macro_instructions_);
1530    VIXL_ASSERT(OutsideITBlock());
1531    MacroEmissionCheckScope guard(this);
1532    ITScope it_scope(this, &cond);
1533    blx(cond, label);
1534    AddBranchLabel(label);
1535  }
1536  void Blx(Label* label) { Blx(al, label); }
1537
1538  void Blx(Condition cond, Register rm) {
1539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1540    VIXL_ASSERT(allow_macro_instructions_);
1541    VIXL_ASSERT(OutsideITBlock());
1542    MacroEmissionCheckScope guard(this);
1543    bool can_use_it =
1544        // BLX{<c>}{<q>} <Rm> ; T1
1545        !rm.IsPC();
1546    ITScope it_scope(this, &cond, can_use_it);
1547    blx(cond, rm);
1548  }
1549  void Blx(Register rm) { Blx(al, rm); }
1550
1551  void Bx(Condition cond, Register rm) {
1552    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1553    VIXL_ASSERT(allow_macro_instructions_);
1554    VIXL_ASSERT(OutsideITBlock());
1555    MacroEmissionCheckScope guard(this);
1556    bool can_use_it =
1557        // BX{<c>}{<q>} <Rm> ; T1
1558        !rm.IsPC();
1559    ITScope it_scope(this, &cond, can_use_it);
1560    bx(cond, rm);
1561  }
1562  void Bx(Register rm) { Bx(al, rm); }
1563
1564  void Bxj(Condition cond, Register rm) {
1565    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1566    VIXL_ASSERT(allow_macro_instructions_);
1567    VIXL_ASSERT(OutsideITBlock());
1568    MacroEmissionCheckScope guard(this);
1569    ITScope it_scope(this, &cond);
1570    bxj(cond, rm);
1571  }
1572  void Bxj(Register rm) { Bxj(al, rm); }
1573
1574  void Cbnz(Register rn, Label* label) {
1575    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1576    VIXL_ASSERT(allow_macro_instructions_);
1577    VIXL_ASSERT(OutsideITBlock());
1578    MacroEmissionCheckScope guard(this);
1579    cbnz(rn, label);
1580    AddBranchLabel(label);
1581  }
1582
1583  void Cbz(Register rn, Label* label) {
1584    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1585    VIXL_ASSERT(allow_macro_instructions_);
1586    VIXL_ASSERT(OutsideITBlock());
1587    MacroEmissionCheckScope guard(this);
1588    cbz(rn, label);
1589    AddBranchLabel(label);
1590  }
1591
1592  void Clrex(Condition cond) {
1593    VIXL_ASSERT(allow_macro_instructions_);
1594    VIXL_ASSERT(OutsideITBlock());
1595    MacroEmissionCheckScope guard(this);
1596    ITScope it_scope(this, &cond);
1597    clrex(cond);
1598  }
1599  void Clrex() { Clrex(al); }
1600
1601  void Clz(Condition cond, Register rd, Register rm) {
1602    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1604    VIXL_ASSERT(allow_macro_instructions_);
1605    VIXL_ASSERT(OutsideITBlock());
1606    MacroEmissionCheckScope guard(this);
1607    ITScope it_scope(this, &cond);
1608    clz(cond, rd, rm);
1609  }
1610  void Clz(Register rd, Register rm) { Clz(al, rd, rm); }
1611
1612  void Cmn(Condition cond, Register rn, const Operand& operand) {
1613    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1614    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1615    VIXL_ASSERT(allow_macro_instructions_);
1616    VIXL_ASSERT(OutsideITBlock());
1617    MacroEmissionCheckScope guard(this);
1618    bool can_use_it =
1619        // CMN{<c>}{<q>} <Rn>, <Rm> ; T1
1620        operand.IsPlainRegister() && rn.IsLow() &&
1621        operand.GetBaseRegister().IsLow();
1622    ITScope it_scope(this, &cond, can_use_it);
1623    cmn(cond, rn, operand);
1624  }
1625  void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); }
1626
1627  void Cmp(Condition cond, Register rn, const Operand& operand) {
1628    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1629    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1630    VIXL_ASSERT(allow_macro_instructions_);
1631    VIXL_ASSERT(OutsideITBlock());
1632    MacroEmissionCheckScope guard(this);
1633    bool can_use_it =
1634        // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1
1635        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1636         rn.IsLow()) ||
1637        // CMP{<c>}{<q>} <Rn>, <Rm> ; T1 T2
1638        (operand.IsPlainRegister() && !rn.IsPC() &&
1639         !operand.GetBaseRegister().IsPC());
1640    ITScope it_scope(this, &cond, can_use_it);
1641    cmp(cond, rn, operand);
1642  }
1643  void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); }
1644
1645  void Crc32b(Condition cond, Register rd, Register rn, Register rm) {
1646    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1647    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1648    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1649    VIXL_ASSERT(allow_macro_instructions_);
1650    VIXL_ASSERT(OutsideITBlock());
1651    MacroEmissionCheckScope guard(this);
1652    ITScope it_scope(this, &cond);
1653    crc32b(cond, rd, rn, rm);
1654  }
1655  void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); }
1656
1657  void Crc32cb(Condition cond, Register rd, Register rn, Register rm) {
1658    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1659    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1661    VIXL_ASSERT(allow_macro_instructions_);
1662    VIXL_ASSERT(OutsideITBlock());
1663    MacroEmissionCheckScope guard(this);
1664    ITScope it_scope(this, &cond);
1665    crc32cb(cond, rd, rn, rm);
1666  }
1667  void Crc32cb(Register rd, Register rn, Register rm) {
1668    Crc32cb(al, rd, rn, rm);
1669  }
1670
1671  void Crc32ch(Condition cond, Register rd, Register rn, Register rm) {
1672    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1673    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1674    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1675    VIXL_ASSERT(allow_macro_instructions_);
1676    VIXL_ASSERT(OutsideITBlock());
1677    MacroEmissionCheckScope guard(this);
1678    ITScope it_scope(this, &cond);
1679    crc32ch(cond, rd, rn, rm);
1680  }
1681  void Crc32ch(Register rd, Register rn, Register rm) {
1682    Crc32ch(al, rd, rn, rm);
1683  }
1684
1685  void Crc32cw(Condition cond, Register rd, Register rn, Register rm) {
1686    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1687    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1688    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1689    VIXL_ASSERT(allow_macro_instructions_);
1690    VIXL_ASSERT(OutsideITBlock());
1691    MacroEmissionCheckScope guard(this);
1692    ITScope it_scope(this, &cond);
1693    crc32cw(cond, rd, rn, rm);
1694  }
1695  void Crc32cw(Register rd, Register rn, Register rm) {
1696    Crc32cw(al, rd, rn, rm);
1697  }
1698
1699  void Crc32h(Condition cond, Register rd, Register rn, Register rm) {
1700    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1701    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1702    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1703    VIXL_ASSERT(allow_macro_instructions_);
1704    VIXL_ASSERT(OutsideITBlock());
1705    MacroEmissionCheckScope guard(this);
1706    ITScope it_scope(this, &cond);
1707    crc32h(cond, rd, rn, rm);
1708  }
1709  void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); }
1710
1711  void Crc32w(Condition cond, Register rd, Register rn, Register rm) {
1712    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1713    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1715    VIXL_ASSERT(allow_macro_instructions_);
1716    VIXL_ASSERT(OutsideITBlock());
1717    MacroEmissionCheckScope guard(this);
1718    ITScope it_scope(this, &cond);
1719    crc32w(cond, rd, rn, rm);
1720  }
1721  void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); }
1722
1723  void Dmb(Condition cond, MemoryBarrier option) {
1724    VIXL_ASSERT(allow_macro_instructions_);
1725    VIXL_ASSERT(OutsideITBlock());
1726    MacroEmissionCheckScope guard(this);
1727    ITScope it_scope(this, &cond);
1728    dmb(cond, option);
1729  }
1730  void Dmb(MemoryBarrier option) { Dmb(al, option); }
1731
1732  void Dsb(Condition cond, MemoryBarrier option) {
1733    VIXL_ASSERT(allow_macro_instructions_);
1734    VIXL_ASSERT(OutsideITBlock());
1735    MacroEmissionCheckScope guard(this);
1736    ITScope it_scope(this, &cond);
1737    dsb(cond, option);
1738  }
1739  void Dsb(MemoryBarrier option) { Dsb(al, option); }
1740
1741  void Eor(Condition cond, Register rd, Register rn, const Operand& operand) {
1742    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1743    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1744    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1745    VIXL_ASSERT(allow_macro_instructions_);
1746    VIXL_ASSERT(OutsideITBlock());
1747    MacroEmissionCheckScope guard(this);
1748    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1749      uint32_t immediate = operand.GetImmediate();
1750      if (immediate == 0) {
1751        return;
1752      }
1753      if (immediate == 0xffffffff) {
1754        mvn(rd, rn);
1755        return;
1756      }
1757    }
1758    bool can_use_it =
1759        // EOR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1760        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1761        operand.GetBaseRegister().IsLow();
1762    ITScope it_scope(this, &cond, can_use_it);
1763    eor(cond, rd, rn, operand);
1764  }
1765  void Eor(Register rd, Register rn, const Operand& operand) {
1766    Eor(al, rd, rn, operand);
1767  }
1768  void Eor(FlagsUpdate flags,
1769           Condition cond,
1770           Register rd,
1771           Register rn,
1772           const Operand& operand) {
1773    switch (flags) {
1774      case LeaveFlags:
1775        Eor(cond, rd, rn, operand);
1776        break;
1777      case SetFlags:
1778        Eors(cond, rd, rn, operand);
1779        break;
1780      case DontCare:
1781        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1782                                   rn.Is(rd) && operand.IsPlainRegister() &&
1783                                   operand.GetBaseRegister().IsLow();
1784        if (setflags_is_smaller) {
1785          Eors(cond, rd, rn, operand);
1786        } else {
1787          Eor(cond, rd, rn, operand);
1788        }
1789        break;
1790    }
1791  }
1792  void Eor(FlagsUpdate flags,
1793           Register rd,
1794           Register rn,
1795           const Operand& operand) {
1796    Eor(flags, al, rd, rn, operand);
1797  }
1798
1799  void Eors(Condition cond, Register rd, Register rn, const Operand& operand) {
1800    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1801    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1802    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1803    VIXL_ASSERT(allow_macro_instructions_);
1804    VIXL_ASSERT(OutsideITBlock());
1805    MacroEmissionCheckScope guard(this);
1806    ITScope it_scope(this, &cond);
1807    eors(cond, rd, rn, operand);
1808  }
1809  void Eors(Register rd, Register rn, const Operand& operand) {
1810    Eors(al, rd, rn, operand);
1811  }
1812
1813  void Fldmdbx(Condition cond,
1814               Register rn,
1815               WriteBack write_back,
1816               DRegisterList dreglist) {
1817    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1818    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1819    VIXL_ASSERT(allow_macro_instructions_);
1820    VIXL_ASSERT(OutsideITBlock());
1821    MacroEmissionCheckScope guard(this);
1822    ITScope it_scope(this, &cond);
1823    fldmdbx(cond, rn, write_back, dreglist);
1824  }
1825  void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1826    Fldmdbx(al, rn, write_back, dreglist);
1827  }
1828
1829  void Fldmiax(Condition cond,
1830               Register rn,
1831               WriteBack write_back,
1832               DRegisterList dreglist) {
1833    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1834    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1835    VIXL_ASSERT(allow_macro_instructions_);
1836    VIXL_ASSERT(OutsideITBlock());
1837    MacroEmissionCheckScope guard(this);
1838    ITScope it_scope(this, &cond);
1839    fldmiax(cond, rn, write_back, dreglist);
1840  }
1841  void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1842    Fldmiax(al, rn, write_back, dreglist);
1843  }
1844
1845  void Fstmdbx(Condition cond,
1846               Register rn,
1847               WriteBack write_back,
1848               DRegisterList dreglist) {
1849    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1850    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1851    VIXL_ASSERT(allow_macro_instructions_);
1852    VIXL_ASSERT(OutsideITBlock());
1853    MacroEmissionCheckScope guard(this);
1854    ITScope it_scope(this, &cond);
1855    fstmdbx(cond, rn, write_back, dreglist);
1856  }
1857  void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1858    Fstmdbx(al, rn, write_back, dreglist);
1859  }
1860
1861  void Fstmiax(Condition cond,
1862               Register rn,
1863               WriteBack write_back,
1864               DRegisterList dreglist) {
1865    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1866    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1867    VIXL_ASSERT(allow_macro_instructions_);
1868    VIXL_ASSERT(OutsideITBlock());
1869    MacroEmissionCheckScope guard(this);
1870    ITScope it_scope(this, &cond);
1871    fstmiax(cond, rn, write_back, dreglist);
1872  }
1873  void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1874    Fstmiax(al, rn, write_back, dreglist);
1875  }
1876
1877  void Hlt(Condition cond, uint32_t imm) {
1878    VIXL_ASSERT(allow_macro_instructions_);
1879    VIXL_ASSERT(OutsideITBlock());
1880    MacroEmissionCheckScope guard(this);
1881    ITScope it_scope(this, &cond);
1882    hlt(cond, imm);
1883  }
1884  void Hlt(uint32_t imm) { Hlt(al, imm); }
1885
1886  void Hvc(Condition cond, uint32_t imm) {
1887    VIXL_ASSERT(allow_macro_instructions_);
1888    VIXL_ASSERT(OutsideITBlock());
1889    MacroEmissionCheckScope guard(this);
1890    ITScope it_scope(this, &cond);
1891    hvc(cond, imm);
1892  }
1893  void Hvc(uint32_t imm) { Hvc(al, imm); }
1894
1895  void Isb(Condition cond, MemoryBarrier option) {
1896    VIXL_ASSERT(allow_macro_instructions_);
1897    VIXL_ASSERT(OutsideITBlock());
1898    MacroEmissionCheckScope guard(this);
1899    ITScope it_scope(this, &cond);
1900    isb(cond, option);
1901  }
1902  void Isb(MemoryBarrier option) { Isb(al, option); }
1903
1904  void Lda(Condition cond, Register rt, const MemOperand& operand) {
1905    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1906    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1907    VIXL_ASSERT(allow_macro_instructions_);
1908    VIXL_ASSERT(OutsideITBlock());
1909    MacroEmissionCheckScope guard(this);
1910    ITScope it_scope(this, &cond);
1911    lda(cond, rt, operand);
1912  }
1913  void Lda(Register rt, const MemOperand& operand) { Lda(al, rt, operand); }
1914
1915  void Ldab(Condition cond, Register rt, const MemOperand& operand) {
1916    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1917    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1918    VIXL_ASSERT(allow_macro_instructions_);
1919    VIXL_ASSERT(OutsideITBlock());
1920    MacroEmissionCheckScope guard(this);
1921    ITScope it_scope(this, &cond);
1922    ldab(cond, rt, operand);
1923  }
1924  void Ldab(Register rt, const MemOperand& operand) { Ldab(al, rt, operand); }
1925
1926  void Ldaex(Condition cond, Register rt, const MemOperand& operand) {
1927    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1928    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1929    VIXL_ASSERT(allow_macro_instructions_);
1930    VIXL_ASSERT(OutsideITBlock());
1931    MacroEmissionCheckScope guard(this);
1932    ITScope it_scope(this, &cond);
1933    ldaex(cond, rt, operand);
1934  }
1935  void Ldaex(Register rt, const MemOperand& operand) { Ldaex(al, rt, operand); }
1936
1937  void Ldaexb(Condition cond, Register rt, const MemOperand& operand) {
1938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1939    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1940    VIXL_ASSERT(allow_macro_instructions_);
1941    VIXL_ASSERT(OutsideITBlock());
1942    MacroEmissionCheckScope guard(this);
1943    ITScope it_scope(this, &cond);
1944    ldaexb(cond, rt, operand);
1945  }
1946  void Ldaexb(Register rt, const MemOperand& operand) {
1947    Ldaexb(al, rt, operand);
1948  }
1949
1950  void Ldaexd(Condition cond,
1951              Register rt,
1952              Register rt2,
1953              const MemOperand& operand) {
1954    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1955    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
1956    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1957    VIXL_ASSERT(allow_macro_instructions_);
1958    VIXL_ASSERT(OutsideITBlock());
1959    MacroEmissionCheckScope guard(this);
1960    ITScope it_scope(this, &cond);
1961    ldaexd(cond, rt, rt2, operand);
1962  }
1963  void Ldaexd(Register rt, Register rt2, const MemOperand& operand) {
1964    Ldaexd(al, rt, rt2, operand);
1965  }
1966
1967  void Ldaexh(Condition cond, Register rt, const MemOperand& operand) {
1968    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1969    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1970    VIXL_ASSERT(allow_macro_instructions_);
1971    VIXL_ASSERT(OutsideITBlock());
1972    MacroEmissionCheckScope guard(this);
1973    ITScope it_scope(this, &cond);
1974    ldaexh(cond, rt, operand);
1975  }
1976  void Ldaexh(Register rt, const MemOperand& operand) {
1977    Ldaexh(al, rt, operand);
1978  }
1979
1980  void Ldah(Condition cond, Register rt, const MemOperand& operand) {
1981    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1982    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1983    VIXL_ASSERT(allow_macro_instructions_);
1984    VIXL_ASSERT(OutsideITBlock());
1985    MacroEmissionCheckScope guard(this);
1986    ITScope it_scope(this, &cond);
1987    ldah(cond, rt, operand);
1988  }
1989  void Ldah(Register rt, const MemOperand& operand) { Ldah(al, rt, operand); }
1990
1991  void Ldm(Condition cond,
1992           Register rn,
1993           WriteBack write_back,
1994           RegisterList registers) {
1995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1996    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1997    VIXL_ASSERT(allow_macro_instructions_);
1998    VIXL_ASSERT(OutsideITBlock());
1999    MacroEmissionCheckScope guard(this);
2000    ITScope it_scope(this, &cond);
2001    ldm(cond, rn, write_back, registers);
2002  }
2003  void Ldm(Register rn, WriteBack write_back, RegisterList registers) {
2004    Ldm(al, rn, write_back, registers);
2005  }
2006
2007  void Ldmda(Condition cond,
2008             Register rn,
2009             WriteBack write_back,
2010             RegisterList registers) {
2011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2012    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2013    VIXL_ASSERT(allow_macro_instructions_);
2014    VIXL_ASSERT(OutsideITBlock());
2015    MacroEmissionCheckScope guard(this);
2016    ITScope it_scope(this, &cond);
2017    ldmda(cond, rn, write_back, registers);
2018  }
2019  void Ldmda(Register rn, WriteBack write_back, RegisterList registers) {
2020    Ldmda(al, rn, write_back, registers);
2021  }
2022
2023  void Ldmdb(Condition cond,
2024             Register rn,
2025             WriteBack write_back,
2026             RegisterList registers) {
2027    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2028    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2029    VIXL_ASSERT(allow_macro_instructions_);
2030    VIXL_ASSERT(OutsideITBlock());
2031    MacroEmissionCheckScope guard(this);
2032    ITScope it_scope(this, &cond);
2033    ldmdb(cond, rn, write_back, registers);
2034  }
2035  void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) {
2036    Ldmdb(al, rn, write_back, registers);
2037  }
2038
2039  void Ldmea(Condition cond,
2040             Register rn,
2041             WriteBack write_back,
2042             RegisterList registers) {
2043    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2044    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2045    VIXL_ASSERT(allow_macro_instructions_);
2046    VIXL_ASSERT(OutsideITBlock());
2047    MacroEmissionCheckScope guard(this);
2048    ITScope it_scope(this, &cond);
2049    ldmea(cond, rn, write_back, registers);
2050  }
2051  void Ldmea(Register rn, WriteBack write_back, RegisterList registers) {
2052    Ldmea(al, rn, write_back, registers);
2053  }
2054
2055  void Ldmed(Condition cond,
2056             Register rn,
2057             WriteBack write_back,
2058             RegisterList registers) {
2059    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2060    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2061    VIXL_ASSERT(allow_macro_instructions_);
2062    VIXL_ASSERT(OutsideITBlock());
2063    MacroEmissionCheckScope guard(this);
2064    ITScope it_scope(this, &cond);
2065    ldmed(cond, rn, write_back, registers);
2066  }
2067  void Ldmed(Register rn, WriteBack write_back, RegisterList registers) {
2068    Ldmed(al, rn, write_back, registers);
2069  }
2070
2071  void Ldmfa(Condition cond,
2072             Register rn,
2073             WriteBack write_back,
2074             RegisterList registers) {
2075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2076    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2077    VIXL_ASSERT(allow_macro_instructions_);
2078    VIXL_ASSERT(OutsideITBlock());
2079    MacroEmissionCheckScope guard(this);
2080    ITScope it_scope(this, &cond);
2081    ldmfa(cond, rn, write_back, registers);
2082  }
2083  void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) {
2084    Ldmfa(al, rn, write_back, registers);
2085  }
2086
2087  void Ldmfd(Condition cond,
2088             Register rn,
2089             WriteBack write_back,
2090             RegisterList registers) {
2091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2092    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2093    VIXL_ASSERT(allow_macro_instructions_);
2094    VIXL_ASSERT(OutsideITBlock());
2095    MacroEmissionCheckScope guard(this);
2096    ITScope it_scope(this, &cond);
2097    ldmfd(cond, rn, write_back, registers);
2098  }
2099  void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) {
2100    Ldmfd(al, rn, write_back, registers);
2101  }
2102
2103  void Ldmib(Condition cond,
2104             Register rn,
2105             WriteBack write_back,
2106             RegisterList registers) {
2107    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2108    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2109    VIXL_ASSERT(allow_macro_instructions_);
2110    VIXL_ASSERT(OutsideITBlock());
2111    MacroEmissionCheckScope guard(this);
2112    ITScope it_scope(this, &cond);
2113    ldmib(cond, rn, write_back, registers);
2114  }
2115  void Ldmib(Register rn, WriteBack write_back, RegisterList registers) {
2116    Ldmib(al, rn, write_back, registers);
2117  }
2118
2119  void Ldr(Condition cond, Register rt, const MemOperand& operand) {
2120    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2121    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2122    VIXL_ASSERT(allow_macro_instructions_);
2123    VIXL_ASSERT(OutsideITBlock());
2124    MacroEmissionCheckScope guard(this);
2125    bool can_use_it =
2126        // LDR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2127        (operand.IsImmediate() && rt.IsLow() &&
2128         operand.GetBaseRegister().IsLow() &&
2129         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
2130         (operand.GetAddrMode() == Offset)) ||
2131        // LDR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
2132        (operand.IsImmediate() && rt.IsLow() &&
2133         operand.GetBaseRegister().IsSP() &&
2134         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
2135         (operand.GetAddrMode() == Offset)) ||
2136        // LDR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2137        (operand.IsPlainRegister() && rt.IsLow() &&
2138         operand.GetBaseRegister().IsLow() &&
2139         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2140         (operand.GetAddrMode() == Offset));
2141    ITScope it_scope(this, &cond, can_use_it);
2142    ldr(cond, rt, operand);
2143  }
2144  void Ldr(Register rt, const MemOperand& operand) { Ldr(al, rt, operand); }
2145
2146  void Ldr(Condition cond, Register rt, Label* label) {
2147    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2148    VIXL_ASSERT(allow_macro_instructions_);
2149    VIXL_ASSERT(OutsideITBlock());
2150    MacroEmissionCheckScope guard(this);
2151    ITScope it_scope(this, &cond);
2152    ldr(cond, rt, label);
2153  }
2154  void Ldr(Register rt, Label* label) { Ldr(al, rt, label); }
2155
2156  void Ldrb(Condition cond, Register rt, const MemOperand& operand) {
2157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2158    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2159    VIXL_ASSERT(allow_macro_instructions_);
2160    VIXL_ASSERT(OutsideITBlock());
2161    MacroEmissionCheckScope guard(this);
2162    bool can_use_it =
2163        // LDRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2164        (operand.IsImmediate() && rt.IsLow() &&
2165         operand.GetBaseRegister().IsLow() &&
2166         operand.IsOffsetImmediateWithinRange(0, 31) &&
2167         (operand.GetAddrMode() == Offset)) ||
2168        // LDRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2169        (operand.IsPlainRegister() && rt.IsLow() &&
2170         operand.GetBaseRegister().IsLow() &&
2171         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2172         (operand.GetAddrMode() == Offset));
2173    ITScope it_scope(this, &cond, can_use_it);
2174    ldrb(cond, rt, operand);
2175  }
2176  void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); }
2177
2178  void Ldrb(Condition cond, Register rt, Label* label) {
2179    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2180    VIXL_ASSERT(allow_macro_instructions_);
2181    VIXL_ASSERT(OutsideITBlock());
2182    MacroEmissionCheckScope guard(this);
2183    ITScope it_scope(this, &cond);
2184    ldrb(cond, rt, label);
2185  }
2186  void Ldrb(Register rt, Label* label) { Ldrb(al, rt, label); }
2187
2188  void Ldrd(Condition cond,
2189            Register rt,
2190            Register rt2,
2191            const MemOperand& operand) {
2192    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2193    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2194    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2195    VIXL_ASSERT(allow_macro_instructions_);
2196    VIXL_ASSERT(OutsideITBlock());
2197    MacroEmissionCheckScope guard(this);
2198    ITScope it_scope(this, &cond);
2199    ldrd(cond, rt, rt2, operand);
2200  }
2201  void Ldrd(Register rt, Register rt2, const MemOperand& operand) {
2202    Ldrd(al, rt, rt2, operand);
2203  }
2204
2205  void Ldrd(Condition cond, Register rt, Register rt2, Label* label) {
2206    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2208    VIXL_ASSERT(allow_macro_instructions_);
2209    VIXL_ASSERT(OutsideITBlock());
2210    MacroEmissionCheckScope guard(this);
2211    ITScope it_scope(this, &cond);
2212    ldrd(cond, rt, rt2, label);
2213  }
2214  void Ldrd(Register rt, Register rt2, Label* label) {
2215    Ldrd(al, rt, rt2, label);
2216  }
2217
2218  void Ldrex(Condition cond, Register rt, const MemOperand& operand) {
2219    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2220    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2221    VIXL_ASSERT(allow_macro_instructions_);
2222    VIXL_ASSERT(OutsideITBlock());
2223    MacroEmissionCheckScope guard(this);
2224    ITScope it_scope(this, &cond);
2225    ldrex(cond, rt, operand);
2226  }
2227  void Ldrex(Register rt, const MemOperand& operand) { Ldrex(al, rt, operand); }
2228
2229  void Ldrexb(Condition cond, Register rt, const MemOperand& operand) {
2230    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2231    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2232    VIXL_ASSERT(allow_macro_instructions_);
2233    VIXL_ASSERT(OutsideITBlock());
2234    MacroEmissionCheckScope guard(this);
2235    ITScope it_scope(this, &cond);
2236    ldrexb(cond, rt, operand);
2237  }
2238  void Ldrexb(Register rt, const MemOperand& operand) {
2239    Ldrexb(al, rt, operand);
2240  }
2241
2242  void Ldrexd(Condition cond,
2243              Register rt,
2244              Register rt2,
2245              const MemOperand& operand) {
2246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2247    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2248    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2249    VIXL_ASSERT(allow_macro_instructions_);
2250    VIXL_ASSERT(OutsideITBlock());
2251    MacroEmissionCheckScope guard(this);
2252    ITScope it_scope(this, &cond);
2253    ldrexd(cond, rt, rt2, operand);
2254  }
2255  void Ldrexd(Register rt, Register rt2, const MemOperand& operand) {
2256    Ldrexd(al, rt, rt2, operand);
2257  }
2258
2259  void Ldrexh(Condition cond, Register rt, const MemOperand& operand) {
2260    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2261    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2262    VIXL_ASSERT(allow_macro_instructions_);
2263    VIXL_ASSERT(OutsideITBlock());
2264    MacroEmissionCheckScope guard(this);
2265    ITScope it_scope(this, &cond);
2266    ldrexh(cond, rt, operand);
2267  }
2268  void Ldrexh(Register rt, const MemOperand& operand) {
2269    Ldrexh(al, rt, operand);
2270  }
2271
2272  void Ldrh(Condition cond, Register rt, const MemOperand& operand) {
2273    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2274    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2275    VIXL_ASSERT(allow_macro_instructions_);
2276    VIXL_ASSERT(OutsideITBlock());
2277    MacroEmissionCheckScope guard(this);
2278    bool can_use_it =
2279        // LDRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2280        (operand.IsImmediate() && rt.IsLow() &&
2281         operand.GetBaseRegister().IsLow() &&
2282         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
2283         (operand.GetAddrMode() == Offset)) ||
2284        // LDRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2285        (operand.IsPlainRegister() && rt.IsLow() &&
2286         operand.GetBaseRegister().IsLow() &&
2287         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2288         (operand.GetAddrMode() == Offset));
2289    ITScope it_scope(this, &cond, can_use_it);
2290    ldrh(cond, rt, operand);
2291  }
2292  void Ldrh(Register rt, const MemOperand& operand) { Ldrh(al, rt, operand); }
2293
2294  void Ldrh(Condition cond, Register rt, Label* label) {
2295    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2296    VIXL_ASSERT(allow_macro_instructions_);
2297    VIXL_ASSERT(OutsideITBlock());
2298    MacroEmissionCheckScope guard(this);
2299    ITScope it_scope(this, &cond);
2300    ldrh(cond, rt, label);
2301  }
2302  void Ldrh(Register rt, Label* label) { Ldrh(al, rt, label); }
2303
2304  void Ldrsb(Condition cond, Register rt, const MemOperand& operand) {
2305    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2306    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2307    VIXL_ASSERT(allow_macro_instructions_);
2308    VIXL_ASSERT(OutsideITBlock());
2309    MacroEmissionCheckScope guard(this);
2310    bool can_use_it =
2311        // LDRSB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2312        operand.IsPlainRegister() && rt.IsLow() &&
2313        operand.GetBaseRegister().IsLow() &&
2314        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2315        (operand.GetAddrMode() == Offset);
2316    ITScope it_scope(this, &cond, can_use_it);
2317    ldrsb(cond, rt, operand);
2318  }
2319  void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); }
2320
2321  void Ldrsb(Condition cond, Register rt, Label* label) {
2322    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2323    VIXL_ASSERT(allow_macro_instructions_);
2324    VIXL_ASSERT(OutsideITBlock());
2325    MacroEmissionCheckScope guard(this);
2326    ITScope it_scope(this, &cond);
2327    ldrsb(cond, rt, label);
2328  }
2329  void Ldrsb(Register rt, Label* label) { Ldrsb(al, rt, label); }
2330
2331  void Ldrsh(Condition cond, Register rt, const MemOperand& operand) {
2332    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2333    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2334    VIXL_ASSERT(allow_macro_instructions_);
2335    VIXL_ASSERT(OutsideITBlock());
2336    MacroEmissionCheckScope guard(this);
2337    bool can_use_it =
2338        // LDRSH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2339        operand.IsPlainRegister() && rt.IsLow() &&
2340        operand.GetBaseRegister().IsLow() &&
2341        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2342        (operand.GetAddrMode() == Offset);
2343    ITScope it_scope(this, &cond, can_use_it);
2344    ldrsh(cond, rt, operand);
2345  }
2346  void Ldrsh(Register rt, const MemOperand& operand) { Ldrsh(al, rt, operand); }
2347
2348  void Ldrsh(Condition cond, Register rt, Label* label) {
2349    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2350    VIXL_ASSERT(allow_macro_instructions_);
2351    VIXL_ASSERT(OutsideITBlock());
2352    MacroEmissionCheckScope guard(this);
2353    ITScope it_scope(this, &cond);
2354    ldrsh(cond, rt, label);
2355  }
2356  void Ldrsh(Register rt, Label* label) { Ldrsh(al, rt, label); }
2357
2358  void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) {
2359    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2360    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2361    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2362    VIXL_ASSERT(allow_macro_instructions_);
2363    VIXL_ASSERT(OutsideITBlock());
2364    MacroEmissionCheckScope guard(this);
2365    bool can_use_it =
2366        // LSL<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2367        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2368         (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) ||
2369        // LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2370        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2371         operand.GetBaseRegister().IsLow());
2372    ITScope it_scope(this, &cond, can_use_it);
2373    lsl(cond, rd, rm, operand);
2374  }
2375  void Lsl(Register rd, Register rm, const Operand& operand) {
2376    Lsl(al, rd, rm, operand);
2377  }
2378  void Lsl(FlagsUpdate flags,
2379           Condition cond,
2380           Register rd,
2381           Register rm,
2382           const Operand& operand) {
2383    switch (flags) {
2384      case LeaveFlags:
2385        Lsl(cond, rd, rm, operand);
2386        break;
2387      case SetFlags:
2388        Lsls(cond, rd, rm, operand);
2389        break;
2390      case DontCare:
2391        bool setflags_is_smaller =
2392            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2393            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2394              (operand.GetImmediate() < 32)) ||
2395             (operand.IsPlainRegister() && rd.Is(rm)));
2396        if (setflags_is_smaller) {
2397          Lsls(cond, rd, rm, operand);
2398        } else {
2399          Lsl(cond, rd, rm, operand);
2400        }
2401        break;
2402    }
2403  }
2404  void Lsl(FlagsUpdate flags,
2405           Register rd,
2406           Register rm,
2407           const Operand& operand) {
2408    Lsl(flags, al, rd, rm, operand);
2409  }
2410
2411  void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) {
2412    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2413    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2414    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2415    VIXL_ASSERT(allow_macro_instructions_);
2416    VIXL_ASSERT(OutsideITBlock());
2417    MacroEmissionCheckScope guard(this);
2418    ITScope it_scope(this, &cond);
2419    lsls(cond, rd, rm, operand);
2420  }
2421  void Lsls(Register rd, Register rm, const Operand& operand) {
2422    Lsls(al, rd, rm, operand);
2423  }
2424
2425  void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) {
2426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2427    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2428    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2429    VIXL_ASSERT(allow_macro_instructions_);
2430    VIXL_ASSERT(OutsideITBlock());
2431    MacroEmissionCheckScope guard(this);
2432    bool can_use_it =
2433        // LSR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2434        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2435         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
2436        // LSR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2437        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2438         operand.GetBaseRegister().IsLow());
2439    ITScope it_scope(this, &cond, can_use_it);
2440    lsr(cond, rd, rm, operand);
2441  }
2442  void Lsr(Register rd, Register rm, const Operand& operand) {
2443    Lsr(al, rd, rm, operand);
2444  }
2445  void Lsr(FlagsUpdate flags,
2446           Condition cond,
2447           Register rd,
2448           Register rm,
2449           const Operand& operand) {
2450    switch (flags) {
2451      case LeaveFlags:
2452        Lsr(cond, rd, rm, operand);
2453        break;
2454      case SetFlags:
2455        Lsrs(cond, rd, rm, operand);
2456        break;
2457      case DontCare:
2458        bool setflags_is_smaller =
2459            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2460            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2461              (operand.GetImmediate() <= 32)) ||
2462             (operand.IsPlainRegister() && rd.Is(rm)));
2463        if (setflags_is_smaller) {
2464          Lsrs(cond, rd, rm, operand);
2465        } else {
2466          Lsr(cond, rd, rm, operand);
2467        }
2468        break;
2469    }
2470  }
2471  void Lsr(FlagsUpdate flags,
2472           Register rd,
2473           Register rm,
2474           const Operand& operand) {
2475    Lsr(flags, al, rd, rm, operand);
2476  }
2477
2478  void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) {
2479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2480    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2481    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2482    VIXL_ASSERT(allow_macro_instructions_);
2483    VIXL_ASSERT(OutsideITBlock());
2484    MacroEmissionCheckScope guard(this);
2485    ITScope it_scope(this, &cond);
2486    lsrs(cond, rd, rm, operand);
2487  }
2488  void Lsrs(Register rd, Register rm, const Operand& operand) {
2489    Lsrs(al, rd, rm, operand);
2490  }
2491
2492  void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2493    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2494    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2495    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2496    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2497    VIXL_ASSERT(allow_macro_instructions_);
2498    VIXL_ASSERT(OutsideITBlock());
2499    MacroEmissionCheckScope guard(this);
2500    ITScope it_scope(this, &cond);
2501    mla(cond, rd, rn, rm, ra);
2502  }
2503  void Mla(Register rd, Register rn, Register rm, Register ra) {
2504    Mla(al, rd, rn, rm, ra);
2505  }
2506  void Mla(FlagsUpdate flags,
2507           Condition cond,
2508           Register rd,
2509           Register rn,
2510           Register rm,
2511           Register ra) {
2512    switch (flags) {
2513      case LeaveFlags:
2514        Mla(cond, rd, rn, rm, ra);
2515        break;
2516      case SetFlags:
2517        Mlas(cond, rd, rn, rm, ra);
2518        break;
2519      case DontCare:
2520        Mla(cond, rd, rn, rm, ra);
2521        break;
2522    }
2523  }
2524  void Mla(
2525      FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) {
2526    Mla(flags, al, rd, rn, rm, ra);
2527  }
2528
2529  void Mlas(
2530      Condition cond, Register rd, Register rn, Register rm, Register ra) {
2531    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2532    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2533    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2534    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2535    VIXL_ASSERT(allow_macro_instructions_);
2536    VIXL_ASSERT(OutsideITBlock());
2537    MacroEmissionCheckScope guard(this);
2538    ITScope it_scope(this, &cond);
2539    mlas(cond, rd, rn, rm, ra);
2540  }
2541  void Mlas(Register rd, Register rn, Register rm, Register ra) {
2542    Mlas(al, rd, rn, rm, ra);
2543  }
2544
2545  void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2546    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2547    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2548    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2549    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2550    VIXL_ASSERT(allow_macro_instructions_);
2551    VIXL_ASSERT(OutsideITBlock());
2552    MacroEmissionCheckScope guard(this);
2553    ITScope it_scope(this, &cond);
2554    mls(cond, rd, rn, rm, ra);
2555  }
2556  void Mls(Register rd, Register rn, Register rm, Register ra) {
2557    Mls(al, rd, rn, rm, ra);
2558  }
2559
2560  void Mov(Condition cond, Register rd, const Operand& operand) {
2561    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2562    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2563    VIXL_ASSERT(allow_macro_instructions_);
2564    VIXL_ASSERT(OutsideITBlock());
2565    MacroEmissionCheckScope guard(this);
2566    if (operand.IsPlainRegister() && rd.Is(operand.GetBaseRegister())) {
2567      return;
2568    }
2569    bool can_use_it =
2570        // MOV<c>{<q>} <Rd>, #<imm8> ; T1
2571        (operand.IsImmediate() && rd.IsLow() &&
2572         (operand.GetImmediate() <= 255)) ||
2573        // MOV{<c>}{<q>} <Rd>, <Rm> ; T1
2574        (operand.IsPlainRegister() && !rd.IsPC() &&
2575         !operand.GetBaseRegister().IsPC()) ||
2576        // MOV<c>{<q>} <Rd>, <Rm> {, <shift> #<amount>} ; T2
2577        (operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2578         operand.GetBaseRegister().IsLow() &&
2579         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2580          operand.GetShift().Is(ASR))) ||
2581        // MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs> ; T1
2582        // MOV<c>{<q>} <Rdm>, <Rdm>, LSR <Rs> ; T1
2583        // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1
2584        // MOV<c>{<q>} <Rdm>, <Rdm>, ROR <Rs> ; T1
2585        (operand.IsRegisterShiftedRegister() &&
2586         rd.Is(operand.GetBaseRegister()) && rd.IsLow() &&
2587         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2588          operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) &&
2589         operand.GetShiftRegister().IsLow());
2590    ITScope it_scope(this, &cond, can_use_it);
2591    mov(cond, rd, operand);
2592  }
2593  void Mov(Register rd, const Operand& operand) { Mov(al, rd, operand); }
2594  void Mov(FlagsUpdate flags,
2595           Condition cond,
2596           Register rd,
2597           const Operand& operand) {
2598    switch (flags) {
2599      case LeaveFlags:
2600        Mov(cond, rd, operand);
2601        break;
2602      case SetFlags:
2603        Movs(cond, rd, operand);
2604        break;
2605      case DontCare:
2606        if (operand.IsPlainRegister() && rd.Is(operand.GetBaseRegister())) {
2607          return;
2608        }
2609        bool setflags_is_smaller =
2610            IsUsingT32() && cond.Is(al) &&
2611            ((operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2612              operand.GetBaseRegister().IsLow() &&
2613              (operand.GetShiftAmount() >= 1) &&
2614              (((operand.GetShiftAmount() <= 32) &&
2615                ((operand.GetShift().IsLSR() || operand.GetShift().IsASR()))) ||
2616               ((operand.GetShiftAmount() < 32) &&
2617                operand.GetShift().IsLSL()))) ||
2618             (operand.IsRegisterShiftedRegister() && rd.IsLow() &&
2619              operand.GetBaseRegister().Is(rd) &&
2620              operand.GetShiftRegister().IsLow() &&
2621              (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() ||
2622               operand.GetShift().IsASR() || operand.GetShift().IsROR())) ||
2623             (operand.IsImmediate() && rd.IsLow() &&
2624              (operand.GetImmediate() < 256)));
2625        if (setflags_is_smaller) {
2626          Movs(cond, rd, operand);
2627        } else {
2628          Mov(cond, rd, operand);
2629        }
2630        break;
2631    }
2632  }
2633  void Mov(FlagsUpdate flags, Register rd, const Operand& operand) {
2634    Mov(flags, al, rd, operand);
2635  }
2636
2637  void Movs(Condition cond, Register rd, const Operand& operand) {
2638    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2639    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2640    VIXL_ASSERT(allow_macro_instructions_);
2641    VIXL_ASSERT(OutsideITBlock());
2642    MacroEmissionCheckScope guard(this);
2643    ITScope it_scope(this, &cond);
2644    movs(cond, rd, operand);
2645  }
2646  void Movs(Register rd, const Operand& operand) { Movs(al, rd, operand); }
2647
2648  void Movt(Condition cond, Register rd, const Operand& operand) {
2649    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2650    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2651    VIXL_ASSERT(allow_macro_instructions_);
2652    VIXL_ASSERT(OutsideITBlock());
2653    MacroEmissionCheckScope guard(this);
2654    ITScope it_scope(this, &cond);
2655    movt(cond, rd, operand);
2656  }
2657  void Movt(Register rd, const Operand& operand) { Movt(al, rd, operand); }
2658
2659  void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
2660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2661    VIXL_ASSERT(allow_macro_instructions_);
2662    VIXL_ASSERT(OutsideITBlock());
2663    MacroEmissionCheckScope guard(this);
2664    ITScope it_scope(this, &cond);
2665    mrs(cond, rd, spec_reg);
2666  }
2667  void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); }
2668
2669  void Msr(Condition cond,
2670           MaskedSpecialRegister spec_reg,
2671           const Operand& operand) {
2672    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2673    VIXL_ASSERT(allow_macro_instructions_);
2674    VIXL_ASSERT(OutsideITBlock());
2675    MacroEmissionCheckScope guard(this);
2676    ITScope it_scope(this, &cond);
2677    msr(cond, spec_reg, operand);
2678  }
2679  void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) {
2680    Msr(al, spec_reg, operand);
2681  }
2682
2683  void Mul(Condition cond, Register rd, Register rn, Register rm) {
2684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2686    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2687    VIXL_ASSERT(allow_macro_instructions_);
2688    VIXL_ASSERT(OutsideITBlock());
2689    MacroEmissionCheckScope guard(this);
2690    bool can_use_it =
2691        // MUL<c>{<q>} <Rdm>, <Rn>{, <Rdm>} ; T1
2692        rd.Is(rm) && rn.IsLow() && rm.IsLow();
2693    ITScope it_scope(this, &cond, can_use_it);
2694    mul(cond, rd, rn, rm);
2695  }
2696  void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); }
2697  void Mul(FlagsUpdate flags,
2698           Condition cond,
2699           Register rd,
2700           Register rn,
2701           Register rm) {
2702    switch (flags) {
2703      case LeaveFlags:
2704        Mul(cond, rd, rn, rm);
2705        break;
2706      case SetFlags:
2707        Muls(cond, rd, rn, rm);
2708        break;
2709      case DontCare:
2710        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2711                                   rn.IsLow() && rm.Is(rd);
2712        if (setflags_is_smaller) {
2713          Muls(cond, rd, rn, rm);
2714        } else {
2715          Mul(cond, rd, rn, rm);
2716        }
2717        break;
2718    }
2719  }
2720  void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) {
2721    Mul(flags, al, rd, rn, rm);
2722  }
2723
2724  void Muls(Condition cond, Register rd, Register rn, Register rm) {
2725    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2726    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2727    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2728    VIXL_ASSERT(allow_macro_instructions_);
2729    VIXL_ASSERT(OutsideITBlock());
2730    MacroEmissionCheckScope guard(this);
2731    ITScope it_scope(this, &cond);
2732    muls(cond, rd, rn, rm);
2733  }
2734  void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); }
2735
2736  void Mvn(Condition cond, Register rd, const Operand& operand) {
2737    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2738    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2739    VIXL_ASSERT(allow_macro_instructions_);
2740    VIXL_ASSERT(OutsideITBlock());
2741    MacroEmissionCheckScope guard(this);
2742    bool can_use_it =
2743        // MVN<c>{<q>} <Rd>, <Rm> ; T1
2744        operand.IsPlainRegister() && rd.IsLow() &&
2745        operand.GetBaseRegister().IsLow();
2746    ITScope it_scope(this, &cond, can_use_it);
2747    mvn(cond, rd, operand);
2748  }
2749  void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); }
2750  void Mvn(FlagsUpdate flags,
2751           Condition cond,
2752           Register rd,
2753           const Operand& operand) {
2754    switch (flags) {
2755      case LeaveFlags:
2756        Mvn(cond, rd, operand);
2757        break;
2758      case SetFlags:
2759        Mvns(cond, rd, operand);
2760        break;
2761      case DontCare:
2762        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2763                                   operand.IsPlainRegister() &&
2764                                   operand.GetBaseRegister().IsLow();
2765        if (setflags_is_smaller) {
2766          Mvns(cond, rd, operand);
2767        } else {
2768          Mvn(cond, rd, operand);
2769        }
2770        break;
2771    }
2772  }
2773  void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) {
2774    Mvn(flags, al, rd, operand);
2775  }
2776
2777  void Mvns(Condition cond, Register rd, const Operand& operand) {
2778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2779    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2780    VIXL_ASSERT(allow_macro_instructions_);
2781    VIXL_ASSERT(OutsideITBlock());
2782    MacroEmissionCheckScope guard(this);
2783    ITScope it_scope(this, &cond);
2784    mvns(cond, rd, operand);
2785  }
2786  void Mvns(Register rd, const Operand& operand) { Mvns(al, rd, operand); }
2787
2788  void Nop(Condition cond) {
2789    VIXL_ASSERT(allow_macro_instructions_);
2790    VIXL_ASSERT(OutsideITBlock());
2791    MacroEmissionCheckScope guard(this);
2792    ITScope it_scope(this, &cond);
2793    nop(cond);
2794  }
2795  void Nop() { Nop(al); }
2796
2797  void Orn(Condition cond, Register rd, Register rn, const Operand& operand) {
2798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2799    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2800    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2801    VIXL_ASSERT(allow_macro_instructions_);
2802    VIXL_ASSERT(OutsideITBlock());
2803    MacroEmissionCheckScope guard(this);
2804    if (cond.Is(al) && operand.IsImmediate()) {
2805      uint32_t immediate = operand.GetImmediate();
2806      if (immediate == 0) {
2807        mvn(rd, 0);
2808        return;
2809      }
2810      if ((immediate == 0xffffffff) && rd.Is(rn)) {
2811        return;
2812      }
2813    }
2814    ITScope it_scope(this, &cond);
2815    orn(cond, rd, rn, operand);
2816  }
2817  void Orn(Register rd, Register rn, const Operand& operand) {
2818    Orn(al, rd, rn, operand);
2819  }
2820  void Orn(FlagsUpdate flags,
2821           Condition cond,
2822           Register rd,
2823           Register rn,
2824           const Operand& operand) {
2825    switch (flags) {
2826      case LeaveFlags:
2827        Orn(cond, rd, rn, operand);
2828        break;
2829      case SetFlags:
2830        Orns(cond, rd, rn, operand);
2831        break;
2832      case DontCare:
2833        Orn(cond, rd, rn, operand);
2834        break;
2835    }
2836  }
2837  void Orn(FlagsUpdate flags,
2838           Register rd,
2839           Register rn,
2840           const Operand& operand) {
2841    Orn(flags, al, rd, rn, operand);
2842  }
2843
2844  void Orns(Condition cond, Register rd, Register rn, const Operand& operand) {
2845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2846    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2847    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2848    VIXL_ASSERT(allow_macro_instructions_);
2849    VIXL_ASSERT(OutsideITBlock());
2850    MacroEmissionCheckScope guard(this);
2851    ITScope it_scope(this, &cond);
2852    orns(cond, rd, rn, operand);
2853  }
2854  void Orns(Register rd, Register rn, const Operand& operand) {
2855    Orns(al, rd, rn, operand);
2856  }
2857
2858  void Orr(Condition cond, Register rd, Register rn, const Operand& operand) {
2859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2861    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2862    VIXL_ASSERT(allow_macro_instructions_);
2863    VIXL_ASSERT(OutsideITBlock());
2864    MacroEmissionCheckScope guard(this);
2865    if (rd.Is(rn) && operand.IsPlainRegister() &&
2866        rd.Is(operand.GetBaseRegister())) {
2867      return;
2868    }
2869    if (cond.Is(al) && operand.IsImmediate()) {
2870      uint32_t immediate = operand.GetImmediate();
2871      if ((immediate == 0) && rd.Is(rn)) {
2872        return;
2873      }
2874      if (immediate == 0xffffffff) {
2875        mvn(rd, 0);
2876        return;
2877      }
2878    }
2879    bool can_use_it =
2880        // ORR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
2881        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
2882        operand.GetBaseRegister().IsLow();
2883    ITScope it_scope(this, &cond, can_use_it);
2884    orr(cond, rd, rn, operand);
2885  }
2886  void Orr(Register rd, Register rn, const Operand& operand) {
2887    Orr(al, rd, rn, operand);
2888  }
2889  void Orr(FlagsUpdate flags,
2890           Condition cond,
2891           Register rd,
2892           Register rn,
2893           const Operand& operand) {
2894    switch (flags) {
2895      case LeaveFlags:
2896        Orr(cond, rd, rn, operand);
2897        break;
2898      case SetFlags:
2899        Orrs(cond, rd, rn, operand);
2900        break;
2901      case DontCare:
2902        if (operand.IsPlainRegister() && rd.Is(rn) &&
2903            rd.Is(operand.GetBaseRegister())) {
2904          return;
2905        }
2906        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2907                                   rn.Is(rd) && operand.IsPlainRegister() &&
2908                                   operand.GetBaseRegister().IsLow();
2909        if (setflags_is_smaller) {
2910          Orrs(cond, rd, rn, operand);
2911        } else {
2912          Orr(cond, rd, rn, operand);
2913        }
2914        break;
2915    }
2916  }
2917  void Orr(FlagsUpdate flags,
2918           Register rd,
2919           Register rn,
2920           const Operand& operand) {
2921    Orr(flags, al, rd, rn, operand);
2922  }
2923
2924  void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) {
2925    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2926    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2927    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2928    VIXL_ASSERT(allow_macro_instructions_);
2929    VIXL_ASSERT(OutsideITBlock());
2930    MacroEmissionCheckScope guard(this);
2931    ITScope it_scope(this, &cond);
2932    orrs(cond, rd, rn, operand);
2933  }
2934  void Orrs(Register rd, Register rn, const Operand& operand) {
2935    Orrs(al, rd, rn, operand);
2936  }
2937
2938  void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) {
2939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2940    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2941    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2942    VIXL_ASSERT(allow_macro_instructions_);
2943    VIXL_ASSERT(OutsideITBlock());
2944    MacroEmissionCheckScope guard(this);
2945    ITScope it_scope(this, &cond);
2946    pkhbt(cond, rd, rn, operand);
2947  }
2948  void Pkhbt(Register rd, Register rn, const Operand& operand) {
2949    Pkhbt(al, rd, rn, operand);
2950  }
2951
2952  void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) {
2953    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2954    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2955    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2956    VIXL_ASSERT(allow_macro_instructions_);
2957    VIXL_ASSERT(OutsideITBlock());
2958    MacroEmissionCheckScope guard(this);
2959    ITScope it_scope(this, &cond);
2960    pkhtb(cond, rd, rn, operand);
2961  }
2962  void Pkhtb(Register rd, Register rn, const Operand& operand) {
2963    Pkhtb(al, rd, rn, operand);
2964  }
2965
2966  void Pld(Condition cond, Label* label) {
2967    VIXL_ASSERT(allow_macro_instructions_);
2968    VIXL_ASSERT(OutsideITBlock());
2969    MacroEmissionCheckScope guard(this);
2970    ITScope it_scope(this, &cond);
2971    pld(cond, label);
2972  }
2973  void Pld(Label* label) { Pld(al, label); }
2974
2975  void Pld(Condition cond, const MemOperand& operand) {
2976    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2977    VIXL_ASSERT(allow_macro_instructions_);
2978    VIXL_ASSERT(OutsideITBlock());
2979    MacroEmissionCheckScope guard(this);
2980    ITScope it_scope(this, &cond);
2981    pld(cond, operand);
2982  }
2983  void Pld(const MemOperand& operand) { Pld(al, operand); }
2984
2985  void Pldw(Condition cond, const MemOperand& operand) {
2986    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2987    VIXL_ASSERT(allow_macro_instructions_);
2988    VIXL_ASSERT(OutsideITBlock());
2989    MacroEmissionCheckScope guard(this);
2990    ITScope it_scope(this, &cond);
2991    pldw(cond, operand);
2992  }
2993  void Pldw(const MemOperand& operand) { Pldw(al, operand); }
2994
2995  void Pli(Condition cond, const MemOperand& operand) {
2996    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2997    VIXL_ASSERT(allow_macro_instructions_);
2998    VIXL_ASSERT(OutsideITBlock());
2999    MacroEmissionCheckScope guard(this);
3000    ITScope it_scope(this, &cond);
3001    pli(cond, operand);
3002  }
3003  void Pli(const MemOperand& operand) { Pli(al, operand); }
3004
3005  void Pli(Condition cond, Label* label) {
3006    VIXL_ASSERT(allow_macro_instructions_);
3007    VIXL_ASSERT(OutsideITBlock());
3008    MacroEmissionCheckScope guard(this);
3009    ITScope it_scope(this, &cond);
3010    pli(cond, label);
3011  }
3012  void Pli(Label* label) { Pli(al, label); }
3013
3014  void Pop(Condition cond, RegisterList registers) {
3015    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
3016    VIXL_ASSERT(allow_macro_instructions_);
3017    VIXL_ASSERT(OutsideITBlock());
3018    MacroEmissionCheckScope guard(this);
3019    ITScope it_scope(this, &cond);
3020    pop(cond, registers);
3021  }
3022  void Pop(RegisterList registers) { Pop(al, registers); }
3023
3024  void Pop(Condition cond, Register rt) {
3025    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
3026    VIXL_ASSERT(allow_macro_instructions_);
3027    VIXL_ASSERT(OutsideITBlock());
3028    MacroEmissionCheckScope guard(this);
3029    ITScope it_scope(this, &cond);
3030    pop(cond, rt);
3031  }
3032  void Pop(Register rt) { Pop(al, rt); }
3033
3034  void Push(Condition cond, RegisterList registers) {
3035    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
3036    VIXL_ASSERT(allow_macro_instructions_);
3037    VIXL_ASSERT(OutsideITBlock());
3038    MacroEmissionCheckScope guard(this);
3039    ITScope it_scope(this, &cond);
3040    push(cond, registers);
3041  }
3042  void Push(RegisterList registers) { Push(al, registers); }
3043
3044  void Push(Condition cond, Register rt) {
3045    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
3046    VIXL_ASSERT(allow_macro_instructions_);
3047    VIXL_ASSERT(OutsideITBlock());
3048    MacroEmissionCheckScope guard(this);
3049    ITScope it_scope(this, &cond);
3050    push(cond, rt);
3051  }
3052  void Push(Register rt) { Push(al, rt); }
3053
3054  void Qadd(Condition cond, Register rd, Register rm, Register rn) {
3055    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3056    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3057    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3058    VIXL_ASSERT(allow_macro_instructions_);
3059    VIXL_ASSERT(OutsideITBlock());
3060    MacroEmissionCheckScope guard(this);
3061    ITScope it_scope(this, &cond);
3062    qadd(cond, rd, rm, rn);
3063  }
3064  void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); }
3065
3066  void Qadd16(Condition cond, Register rd, Register rn, Register rm) {
3067    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3068    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3070    VIXL_ASSERT(allow_macro_instructions_);
3071    VIXL_ASSERT(OutsideITBlock());
3072    MacroEmissionCheckScope guard(this);
3073    ITScope it_scope(this, &cond);
3074    qadd16(cond, rd, rn, rm);
3075  }
3076  void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); }
3077
3078  void Qadd8(Condition cond, Register rd, Register rn, Register rm) {
3079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3081    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3082    VIXL_ASSERT(allow_macro_instructions_);
3083    VIXL_ASSERT(OutsideITBlock());
3084    MacroEmissionCheckScope guard(this);
3085    ITScope it_scope(this, &cond);
3086    qadd8(cond, rd, rn, rm);
3087  }
3088  void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); }
3089
3090  void Qasx(Condition cond, Register rd, Register rn, Register rm) {
3091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3092    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3093    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3094    VIXL_ASSERT(allow_macro_instructions_);
3095    VIXL_ASSERT(OutsideITBlock());
3096    MacroEmissionCheckScope guard(this);
3097    ITScope it_scope(this, &cond);
3098    qasx(cond, rd, rn, rm);
3099  }
3100  void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); }
3101
3102  void Qdadd(Condition cond, Register rd, Register rm, Register rn) {
3103    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3104    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3105    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3106    VIXL_ASSERT(allow_macro_instructions_);
3107    VIXL_ASSERT(OutsideITBlock());
3108    MacroEmissionCheckScope guard(this);
3109    ITScope it_scope(this, &cond);
3110    qdadd(cond, rd, rm, rn);
3111  }
3112  void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); }
3113
3114  void Qdsub(Condition cond, Register rd, Register rm, Register rn) {
3115    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3116    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3117    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3118    VIXL_ASSERT(allow_macro_instructions_);
3119    VIXL_ASSERT(OutsideITBlock());
3120    MacroEmissionCheckScope guard(this);
3121    ITScope it_scope(this, &cond);
3122    qdsub(cond, rd, rm, rn);
3123  }
3124  void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); }
3125
3126  void Qsax(Condition cond, Register rd, Register rn, Register rm) {
3127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3129    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3130    VIXL_ASSERT(allow_macro_instructions_);
3131    VIXL_ASSERT(OutsideITBlock());
3132    MacroEmissionCheckScope guard(this);
3133    ITScope it_scope(this, &cond);
3134    qsax(cond, rd, rn, rm);
3135  }
3136  void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); }
3137
3138  void Qsub(Condition cond, Register rd, Register rm, Register rn) {
3139    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3140    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3141    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3142    VIXL_ASSERT(allow_macro_instructions_);
3143    VIXL_ASSERT(OutsideITBlock());
3144    MacroEmissionCheckScope guard(this);
3145    ITScope it_scope(this, &cond);
3146    qsub(cond, rd, rm, rn);
3147  }
3148  void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); }
3149
3150  void Qsub16(Condition cond, Register rd, Register rn, Register rm) {
3151    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3152    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3153    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3154    VIXL_ASSERT(allow_macro_instructions_);
3155    VIXL_ASSERT(OutsideITBlock());
3156    MacroEmissionCheckScope guard(this);
3157    ITScope it_scope(this, &cond);
3158    qsub16(cond, rd, rn, rm);
3159  }
3160  void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); }
3161
3162  void Qsub8(Condition cond, Register rd, Register rn, Register rm) {
3163    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3164    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3165    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3166    VIXL_ASSERT(allow_macro_instructions_);
3167    VIXL_ASSERT(OutsideITBlock());
3168    MacroEmissionCheckScope guard(this);
3169    ITScope it_scope(this, &cond);
3170    qsub8(cond, rd, rn, rm);
3171  }
3172  void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); }
3173
3174  void Rbit(Condition cond, Register rd, Register rm) {
3175    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3176    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3177    VIXL_ASSERT(allow_macro_instructions_);
3178    VIXL_ASSERT(OutsideITBlock());
3179    MacroEmissionCheckScope guard(this);
3180    ITScope it_scope(this, &cond);
3181    rbit(cond, rd, rm);
3182  }
3183  void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); }
3184
3185  void Rev(Condition cond, Register rd, Register rm) {
3186    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3187    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3188    VIXL_ASSERT(allow_macro_instructions_);
3189    VIXL_ASSERT(OutsideITBlock());
3190    MacroEmissionCheckScope guard(this);
3191    ITScope it_scope(this, &cond);
3192    rev(cond, rd, rm);
3193  }
3194  void Rev(Register rd, Register rm) { Rev(al, rd, rm); }
3195
3196  void Rev16(Condition cond, Register rd, Register rm) {
3197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3198    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3199    VIXL_ASSERT(allow_macro_instructions_);
3200    VIXL_ASSERT(OutsideITBlock());
3201    MacroEmissionCheckScope guard(this);
3202    ITScope it_scope(this, &cond);
3203    rev16(cond, rd, rm);
3204  }
3205  void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); }
3206
3207  void Revsh(Condition cond, Register rd, Register rm) {
3208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3210    VIXL_ASSERT(allow_macro_instructions_);
3211    VIXL_ASSERT(OutsideITBlock());
3212    MacroEmissionCheckScope guard(this);
3213    ITScope it_scope(this, &cond);
3214    revsh(cond, rd, rm);
3215  }
3216  void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); }
3217
3218  void Ror(Condition cond, Register rd, Register rm, const Operand& operand) {
3219    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3220    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3221    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3222    VIXL_ASSERT(allow_macro_instructions_);
3223    VIXL_ASSERT(OutsideITBlock());
3224    MacroEmissionCheckScope guard(this);
3225    bool can_use_it =
3226        // ROR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
3227        operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
3228        operand.GetBaseRegister().IsLow();
3229    ITScope it_scope(this, &cond, can_use_it);
3230    ror(cond, rd, rm, operand);
3231  }
3232  void Ror(Register rd, Register rm, const Operand& operand) {
3233    Ror(al, rd, rm, operand);
3234  }
3235  void Ror(FlagsUpdate flags,
3236           Condition cond,
3237           Register rd,
3238           Register rm,
3239           const Operand& operand) {
3240    switch (flags) {
3241      case LeaveFlags:
3242        Ror(cond, rd, rm, operand);
3243        break;
3244      case SetFlags:
3245        Rors(cond, rd, rm, operand);
3246        break;
3247      case DontCare:
3248        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3249                                   rm.IsLow() && operand.IsPlainRegister() &&
3250                                   rd.Is(rm);
3251        if (setflags_is_smaller) {
3252          Rors(cond, rd, rm, operand);
3253        } else {
3254          Ror(cond, rd, rm, operand);
3255        }
3256        break;
3257    }
3258  }
3259  void Ror(FlagsUpdate flags,
3260           Register rd,
3261           Register rm,
3262           const Operand& operand) {
3263    Ror(flags, al, rd, rm, operand);
3264  }
3265
3266  void Rors(Condition cond, Register rd, Register rm, const Operand& operand) {
3267    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3268    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3269    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3270    VIXL_ASSERT(allow_macro_instructions_);
3271    VIXL_ASSERT(OutsideITBlock());
3272    MacroEmissionCheckScope guard(this);
3273    ITScope it_scope(this, &cond);
3274    rors(cond, rd, rm, operand);
3275  }
3276  void Rors(Register rd, Register rm, const Operand& operand) {
3277    Rors(al, rd, rm, operand);
3278  }
3279
3280  void Rrx(Condition cond, Register rd, Register rm) {
3281    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3282    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3283    VIXL_ASSERT(allow_macro_instructions_);
3284    VIXL_ASSERT(OutsideITBlock());
3285    MacroEmissionCheckScope guard(this);
3286    ITScope it_scope(this, &cond);
3287    rrx(cond, rd, rm);
3288  }
3289  void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); }
3290  void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) {
3291    switch (flags) {
3292      case LeaveFlags:
3293        Rrx(cond, rd, rm);
3294        break;
3295      case SetFlags:
3296        Rrxs(cond, rd, rm);
3297        break;
3298      case DontCare:
3299        Rrx(cond, rd, rm);
3300        break;
3301    }
3302  }
3303  void Rrx(FlagsUpdate flags, Register rd, Register rm) {
3304    Rrx(flags, al, rd, rm);
3305  }
3306
3307  void Rrxs(Condition cond, Register rd, Register rm) {
3308    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3310    VIXL_ASSERT(allow_macro_instructions_);
3311    VIXL_ASSERT(OutsideITBlock());
3312    MacroEmissionCheckScope guard(this);
3313    ITScope it_scope(this, &cond);
3314    rrxs(cond, rd, rm);
3315  }
3316  void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); }
3317
3318  void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) {
3319    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3320    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3321    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3322    VIXL_ASSERT(allow_macro_instructions_);
3323    VIXL_ASSERT(OutsideITBlock());
3324    MacroEmissionCheckScope guard(this);
3325    bool can_use_it =
3326        // RSB<c>{<q>} {<Rd>, }<Rn>, #0 ; T1
3327        operand.IsImmediate() && rd.IsLow() && rn.IsLow() &&
3328        (operand.GetImmediate() == 0);
3329    ITScope it_scope(this, &cond, can_use_it);
3330    rsb(cond, rd, rn, operand);
3331  }
3332  void Rsb(Register rd, Register rn, const Operand& operand) {
3333    Rsb(al, rd, rn, operand);
3334  }
3335  void Rsb(FlagsUpdate flags,
3336           Condition cond,
3337           Register rd,
3338           Register rn,
3339           const Operand& operand) {
3340    switch (flags) {
3341      case LeaveFlags:
3342        Rsb(cond, rd, rn, operand);
3343        break;
3344      case SetFlags:
3345        Rsbs(cond, rd, rn, operand);
3346        break;
3347      case DontCare:
3348        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3349                                   rn.IsLow() && operand.IsImmediate() &&
3350                                   (operand.GetImmediate() == 0);
3351        if (setflags_is_smaller) {
3352          Rsbs(cond, rd, rn, operand);
3353        } else {
3354          Rsb(cond, rd, rn, operand);
3355        }
3356        break;
3357    }
3358  }
3359  void Rsb(FlagsUpdate flags,
3360           Register rd,
3361           Register rn,
3362           const Operand& operand) {
3363    Rsb(flags, al, rd, rn, operand);
3364  }
3365
3366  void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) {
3367    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3368    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3369    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3370    VIXL_ASSERT(allow_macro_instructions_);
3371    VIXL_ASSERT(OutsideITBlock());
3372    MacroEmissionCheckScope guard(this);
3373    ITScope it_scope(this, &cond);
3374    rsbs(cond, rd, rn, operand);
3375  }
3376  void Rsbs(Register rd, Register rn, const Operand& operand) {
3377    Rsbs(al, rd, rn, operand);
3378  }
3379
3380  void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) {
3381    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3382    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3383    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3384    VIXL_ASSERT(allow_macro_instructions_);
3385    VIXL_ASSERT(OutsideITBlock());
3386    MacroEmissionCheckScope guard(this);
3387    ITScope it_scope(this, &cond);
3388    rsc(cond, rd, rn, operand);
3389  }
3390  void Rsc(Register rd, Register rn, const Operand& operand) {
3391    Rsc(al, rd, rn, operand);
3392  }
3393  void Rsc(FlagsUpdate flags,
3394           Condition cond,
3395           Register rd,
3396           Register rn,
3397           const Operand& operand) {
3398    switch (flags) {
3399      case LeaveFlags:
3400        Rsc(cond, rd, rn, operand);
3401        break;
3402      case SetFlags:
3403        Rscs(cond, rd, rn, operand);
3404        break;
3405      case DontCare:
3406        Rsc(cond, rd, rn, operand);
3407        break;
3408    }
3409  }
3410  void Rsc(FlagsUpdate flags,
3411           Register rd,
3412           Register rn,
3413           const Operand& operand) {
3414    Rsc(flags, al, rd, rn, operand);
3415  }
3416
3417  void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) {
3418    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3419    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3420    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3421    VIXL_ASSERT(allow_macro_instructions_);
3422    VIXL_ASSERT(OutsideITBlock());
3423    MacroEmissionCheckScope guard(this);
3424    ITScope it_scope(this, &cond);
3425    rscs(cond, rd, rn, operand);
3426  }
3427  void Rscs(Register rd, Register rn, const Operand& operand) {
3428    Rscs(al, rd, rn, operand);
3429  }
3430
3431  void Sadd16(Condition cond, Register rd, Register rn, Register rm) {
3432    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3433    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3434    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3435    VIXL_ASSERT(allow_macro_instructions_);
3436    VIXL_ASSERT(OutsideITBlock());
3437    MacroEmissionCheckScope guard(this);
3438    ITScope it_scope(this, &cond);
3439    sadd16(cond, rd, rn, rm);
3440  }
3441  void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); }
3442
3443  void Sadd8(Condition cond, Register rd, Register rn, Register rm) {
3444    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3445    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3446    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3447    VIXL_ASSERT(allow_macro_instructions_);
3448    VIXL_ASSERT(OutsideITBlock());
3449    MacroEmissionCheckScope guard(this);
3450    ITScope it_scope(this, &cond);
3451    sadd8(cond, rd, rn, rm);
3452  }
3453  void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); }
3454
3455  void Sasx(Condition cond, Register rd, Register rn, Register rm) {
3456    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3457    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3458    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3459    VIXL_ASSERT(allow_macro_instructions_);
3460    VIXL_ASSERT(OutsideITBlock());
3461    MacroEmissionCheckScope guard(this);
3462    ITScope it_scope(this, &cond);
3463    sasx(cond, rd, rn, rm);
3464  }
3465  void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); }
3466
3467  void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) {
3468    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3469    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3470    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3471    VIXL_ASSERT(allow_macro_instructions_);
3472    VIXL_ASSERT(OutsideITBlock());
3473    MacroEmissionCheckScope guard(this);
3474    bool can_use_it =
3475        // SBC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
3476        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
3477        operand.GetBaseRegister().IsLow();
3478    ITScope it_scope(this, &cond, can_use_it);
3479    sbc(cond, rd, rn, operand);
3480  }
3481  void Sbc(Register rd, Register rn, const Operand& operand) {
3482    Sbc(al, rd, rn, operand);
3483  }
3484  void Sbc(FlagsUpdate flags,
3485           Condition cond,
3486           Register rd,
3487           Register rn,
3488           const Operand& operand) {
3489    switch (flags) {
3490      case LeaveFlags:
3491        Sbc(cond, rd, rn, operand);
3492        break;
3493      case SetFlags:
3494        Sbcs(cond, rd, rn, operand);
3495        break;
3496      case DontCare:
3497        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3498                                   rn.Is(rd) && operand.IsPlainRegister() &&
3499                                   operand.GetBaseRegister().IsLow();
3500        if (setflags_is_smaller) {
3501          Sbcs(cond, rd, rn, operand);
3502        } else {
3503          Sbc(cond, rd, rn, operand);
3504        }
3505        break;
3506    }
3507  }
3508  void Sbc(FlagsUpdate flags,
3509           Register rd,
3510           Register rn,
3511           const Operand& operand) {
3512    Sbc(flags, al, rd, rn, operand);
3513  }
3514
3515  void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) {
3516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3517    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3518    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3519    VIXL_ASSERT(allow_macro_instructions_);
3520    VIXL_ASSERT(OutsideITBlock());
3521    MacroEmissionCheckScope guard(this);
3522    ITScope it_scope(this, &cond);
3523    sbcs(cond, rd, rn, operand);
3524  }
3525  void Sbcs(Register rd, Register rn, const Operand& operand) {
3526    Sbcs(al, rd, rn, operand);
3527  }
3528
3529  void Sbfx(Condition cond,
3530            Register rd,
3531            Register rn,
3532            uint32_t lsb,
3533            const Operand& operand) {
3534    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3535    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3536    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3537    VIXL_ASSERT(allow_macro_instructions_);
3538    VIXL_ASSERT(OutsideITBlock());
3539    MacroEmissionCheckScope guard(this);
3540    ITScope it_scope(this, &cond);
3541    sbfx(cond, rd, rn, lsb, operand);
3542  }
3543  void Sbfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
3544    Sbfx(al, rd, rn, lsb, operand);
3545  }
3546
3547  void Sdiv(Condition cond, Register rd, Register rn, Register rm) {
3548    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3549    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3550    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3551    VIXL_ASSERT(allow_macro_instructions_);
3552    VIXL_ASSERT(OutsideITBlock());
3553    MacroEmissionCheckScope guard(this);
3554    ITScope it_scope(this, &cond);
3555    sdiv(cond, rd, rn, rm);
3556  }
3557  void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); }
3558
3559  void Sel(Condition cond, Register rd, Register rn, Register rm) {
3560    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3561    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3562    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3563    VIXL_ASSERT(allow_macro_instructions_);
3564    VIXL_ASSERT(OutsideITBlock());
3565    MacroEmissionCheckScope guard(this);
3566    ITScope it_scope(this, &cond);
3567    sel(cond, rd, rn, rm);
3568  }
3569  void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); }
3570
3571  void Shadd16(Condition cond, Register rd, Register rn, Register rm) {
3572    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3573    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3574    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3575    VIXL_ASSERT(allow_macro_instructions_);
3576    VIXL_ASSERT(OutsideITBlock());
3577    MacroEmissionCheckScope guard(this);
3578    ITScope it_scope(this, &cond);
3579    shadd16(cond, rd, rn, rm);
3580  }
3581  void Shadd16(Register rd, Register rn, Register rm) {
3582    Shadd16(al, rd, rn, rm);
3583  }
3584
3585  void Shadd8(Condition cond, Register rd, Register rn, Register rm) {
3586    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3587    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3589    VIXL_ASSERT(allow_macro_instructions_);
3590    VIXL_ASSERT(OutsideITBlock());
3591    MacroEmissionCheckScope guard(this);
3592    ITScope it_scope(this, &cond);
3593    shadd8(cond, rd, rn, rm);
3594  }
3595  void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); }
3596
3597  void Shasx(Condition cond, Register rd, Register rn, Register rm) {
3598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3599    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3600    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3601    VIXL_ASSERT(allow_macro_instructions_);
3602    VIXL_ASSERT(OutsideITBlock());
3603    MacroEmissionCheckScope guard(this);
3604    ITScope it_scope(this, &cond);
3605    shasx(cond, rd, rn, rm);
3606  }
3607  void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); }
3608
3609  void Shsax(Condition cond, Register rd, Register rn, Register rm) {
3610    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3611    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3612    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3613    VIXL_ASSERT(allow_macro_instructions_);
3614    VIXL_ASSERT(OutsideITBlock());
3615    MacroEmissionCheckScope guard(this);
3616    ITScope it_scope(this, &cond);
3617    shsax(cond, rd, rn, rm);
3618  }
3619  void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); }
3620
3621  void Shsub16(Condition cond, Register rd, Register rn, Register rm) {
3622    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3623    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3624    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3625    VIXL_ASSERT(allow_macro_instructions_);
3626    VIXL_ASSERT(OutsideITBlock());
3627    MacroEmissionCheckScope guard(this);
3628    ITScope it_scope(this, &cond);
3629    shsub16(cond, rd, rn, rm);
3630  }
3631  void Shsub16(Register rd, Register rn, Register rm) {
3632    Shsub16(al, rd, rn, rm);
3633  }
3634
3635  void Shsub8(Condition cond, Register rd, Register rn, Register rm) {
3636    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3637    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3638    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3639    VIXL_ASSERT(allow_macro_instructions_);
3640    VIXL_ASSERT(OutsideITBlock());
3641    MacroEmissionCheckScope guard(this);
3642    ITScope it_scope(this, &cond);
3643    shsub8(cond, rd, rn, rm);
3644  }
3645  void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); }
3646
3647  void Smlabb(
3648      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3649    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3651    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3652    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3653    VIXL_ASSERT(allow_macro_instructions_);
3654    VIXL_ASSERT(OutsideITBlock());
3655    MacroEmissionCheckScope guard(this);
3656    ITScope it_scope(this, &cond);
3657    smlabb(cond, rd, rn, rm, ra);
3658  }
3659  void Smlabb(Register rd, Register rn, Register rm, Register ra) {
3660    Smlabb(al, rd, rn, rm, ra);
3661  }
3662
3663  void Smlabt(
3664      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3665    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3666    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3668    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3669    VIXL_ASSERT(allow_macro_instructions_);
3670    VIXL_ASSERT(OutsideITBlock());
3671    MacroEmissionCheckScope guard(this);
3672    ITScope it_scope(this, &cond);
3673    smlabt(cond, rd, rn, rm, ra);
3674  }
3675  void Smlabt(Register rd, Register rn, Register rm, Register ra) {
3676    Smlabt(al, rd, rn, rm, ra);
3677  }
3678
3679  void Smlad(
3680      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3681    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3684    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3685    VIXL_ASSERT(allow_macro_instructions_);
3686    VIXL_ASSERT(OutsideITBlock());
3687    MacroEmissionCheckScope guard(this);
3688    ITScope it_scope(this, &cond);
3689    smlad(cond, rd, rn, rm, ra);
3690  }
3691  void Smlad(Register rd, Register rn, Register rm, Register ra) {
3692    Smlad(al, rd, rn, rm, ra);
3693  }
3694
3695  void Smladx(
3696      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3700    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3701    VIXL_ASSERT(allow_macro_instructions_);
3702    VIXL_ASSERT(OutsideITBlock());
3703    MacroEmissionCheckScope guard(this);
3704    ITScope it_scope(this, &cond);
3705    smladx(cond, rd, rn, rm, ra);
3706  }
3707  void Smladx(Register rd, Register rn, Register rm, Register ra) {
3708    Smladx(al, rd, rn, rm, ra);
3709  }
3710
3711  void Smlal(
3712      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3713    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3716    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3717    VIXL_ASSERT(allow_macro_instructions_);
3718    VIXL_ASSERT(OutsideITBlock());
3719    MacroEmissionCheckScope guard(this);
3720    ITScope it_scope(this, &cond);
3721    smlal(cond, rdlo, rdhi, rn, rm);
3722  }
3723  void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
3724    Smlal(al, rdlo, rdhi, rn, rm);
3725  }
3726
3727  void Smlalbb(
3728      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3729    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3733    VIXL_ASSERT(allow_macro_instructions_);
3734    VIXL_ASSERT(OutsideITBlock());
3735    MacroEmissionCheckScope guard(this);
3736    ITScope it_scope(this, &cond);
3737    smlalbb(cond, rdlo, rdhi, rn, rm);
3738  }
3739  void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
3740    Smlalbb(al, rdlo, rdhi, rn, rm);
3741  }
3742
3743  void Smlalbt(
3744      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3745    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3746    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3748    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3749    VIXL_ASSERT(allow_macro_instructions_);
3750    VIXL_ASSERT(OutsideITBlock());
3751    MacroEmissionCheckScope guard(this);
3752    ITScope it_scope(this, &cond);
3753    smlalbt(cond, rdlo, rdhi, rn, rm);
3754  }
3755  void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
3756    Smlalbt(al, rdlo, rdhi, rn, rm);
3757  }
3758
3759  void Smlald(
3760      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3761    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3762    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3763    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3764    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3765    VIXL_ASSERT(allow_macro_instructions_);
3766    VIXL_ASSERT(OutsideITBlock());
3767    MacroEmissionCheckScope guard(this);
3768    ITScope it_scope(this, &cond);
3769    smlald(cond, rdlo, rdhi, rn, rm);
3770  }
3771  void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
3772    Smlald(al, rdlo, rdhi, rn, rm);
3773  }
3774
3775  void Smlaldx(
3776      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3777    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3779    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3780    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3781    VIXL_ASSERT(allow_macro_instructions_);
3782    VIXL_ASSERT(OutsideITBlock());
3783    MacroEmissionCheckScope guard(this);
3784    ITScope it_scope(this, &cond);
3785    smlaldx(cond, rdlo, rdhi, rn, rm);
3786  }
3787  void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3788    Smlaldx(al, rdlo, rdhi, rn, rm);
3789  }
3790
3791  void Smlals(
3792      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3793    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3797    VIXL_ASSERT(allow_macro_instructions_);
3798    VIXL_ASSERT(OutsideITBlock());
3799    MacroEmissionCheckScope guard(this);
3800    ITScope it_scope(this, &cond);
3801    smlals(cond, rdlo, rdhi, rn, rm);
3802  }
3803  void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
3804    Smlals(al, rdlo, rdhi, rn, rm);
3805  }
3806
3807  void Smlaltb(
3808      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3809    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3810    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3811    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3813    VIXL_ASSERT(allow_macro_instructions_);
3814    VIXL_ASSERT(OutsideITBlock());
3815    MacroEmissionCheckScope guard(this);
3816    ITScope it_scope(this, &cond);
3817    smlaltb(cond, rdlo, rdhi, rn, rm);
3818  }
3819  void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
3820    Smlaltb(al, rdlo, rdhi, rn, rm);
3821  }
3822
3823  void Smlaltt(
3824      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3825    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3826    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3827    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3829    VIXL_ASSERT(allow_macro_instructions_);
3830    VIXL_ASSERT(OutsideITBlock());
3831    MacroEmissionCheckScope guard(this);
3832    ITScope it_scope(this, &cond);
3833    smlaltt(cond, rdlo, rdhi, rn, rm);
3834  }
3835  void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
3836    Smlaltt(al, rdlo, rdhi, rn, rm);
3837  }
3838
3839  void Smlatb(
3840      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3841    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3844    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3845    VIXL_ASSERT(allow_macro_instructions_);
3846    VIXL_ASSERT(OutsideITBlock());
3847    MacroEmissionCheckScope guard(this);
3848    ITScope it_scope(this, &cond);
3849    smlatb(cond, rd, rn, rm, ra);
3850  }
3851  void Smlatb(Register rd, Register rn, Register rm, Register ra) {
3852    Smlatb(al, rd, rn, rm, ra);
3853  }
3854
3855  void Smlatt(
3856      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3857    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3860    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3861    VIXL_ASSERT(allow_macro_instructions_);
3862    VIXL_ASSERT(OutsideITBlock());
3863    MacroEmissionCheckScope guard(this);
3864    ITScope it_scope(this, &cond);
3865    smlatt(cond, rd, rn, rm, ra);
3866  }
3867  void Smlatt(Register rd, Register rn, Register rm, Register ra) {
3868    Smlatt(al, rd, rn, rm, ra);
3869  }
3870
3871  void Smlawb(
3872      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3873    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3874    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3876    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3877    VIXL_ASSERT(allow_macro_instructions_);
3878    VIXL_ASSERT(OutsideITBlock());
3879    MacroEmissionCheckScope guard(this);
3880    ITScope it_scope(this, &cond);
3881    smlawb(cond, rd, rn, rm, ra);
3882  }
3883  void Smlawb(Register rd, Register rn, Register rm, Register ra) {
3884    Smlawb(al, rd, rn, rm, ra);
3885  }
3886
3887  void Smlawt(
3888      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3889    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3892    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3893    VIXL_ASSERT(allow_macro_instructions_);
3894    VIXL_ASSERT(OutsideITBlock());
3895    MacroEmissionCheckScope guard(this);
3896    ITScope it_scope(this, &cond);
3897    smlawt(cond, rd, rn, rm, ra);
3898  }
3899  void Smlawt(Register rd, Register rn, Register rm, Register ra) {
3900    Smlawt(al, rd, rn, rm, ra);
3901  }
3902
3903  void Smlsd(
3904      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3905    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3906    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3907    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3908    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3909    VIXL_ASSERT(allow_macro_instructions_);
3910    VIXL_ASSERT(OutsideITBlock());
3911    MacroEmissionCheckScope guard(this);
3912    ITScope it_scope(this, &cond);
3913    smlsd(cond, rd, rn, rm, ra);
3914  }
3915  void Smlsd(Register rd, Register rn, Register rm, Register ra) {
3916    Smlsd(al, rd, rn, rm, ra);
3917  }
3918
3919  void Smlsdx(
3920      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3921    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3922    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3923    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3924    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3925    VIXL_ASSERT(allow_macro_instructions_);
3926    VIXL_ASSERT(OutsideITBlock());
3927    MacroEmissionCheckScope guard(this);
3928    ITScope it_scope(this, &cond);
3929    smlsdx(cond, rd, rn, rm, ra);
3930  }
3931  void Smlsdx(Register rd, Register rn, Register rm, Register ra) {
3932    Smlsdx(al, rd, rn, rm, ra);
3933  }
3934
3935  void Smlsld(
3936      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3937    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3940    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3941    VIXL_ASSERT(allow_macro_instructions_);
3942    VIXL_ASSERT(OutsideITBlock());
3943    MacroEmissionCheckScope guard(this);
3944    ITScope it_scope(this, &cond);
3945    smlsld(cond, rdlo, rdhi, rn, rm);
3946  }
3947  void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
3948    Smlsld(al, rdlo, rdhi, rn, rm);
3949  }
3950
3951  void Smlsldx(
3952      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3953    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3954    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3955    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3956    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3957    VIXL_ASSERT(allow_macro_instructions_);
3958    VIXL_ASSERT(OutsideITBlock());
3959    MacroEmissionCheckScope guard(this);
3960    ITScope it_scope(this, &cond);
3961    smlsldx(cond, rdlo, rdhi, rn, rm);
3962  }
3963  void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3964    Smlsldx(al, rdlo, rdhi, rn, rm);
3965  }
3966
3967  void Smmla(
3968      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3969    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3970    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3971    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3972    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3973    VIXL_ASSERT(allow_macro_instructions_);
3974    VIXL_ASSERT(OutsideITBlock());
3975    MacroEmissionCheckScope guard(this);
3976    ITScope it_scope(this, &cond);
3977    smmla(cond, rd, rn, rm, ra);
3978  }
3979  void Smmla(Register rd, Register rn, Register rm, Register ra) {
3980    Smmla(al, rd, rn, rm, ra);
3981  }
3982
3983  void Smmlar(
3984      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3985    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3986    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3987    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3988    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3989    VIXL_ASSERT(allow_macro_instructions_);
3990    VIXL_ASSERT(OutsideITBlock());
3991    MacroEmissionCheckScope guard(this);
3992    ITScope it_scope(this, &cond);
3993    smmlar(cond, rd, rn, rm, ra);
3994  }
3995  void Smmlar(Register rd, Register rn, Register rm, Register ra) {
3996    Smmlar(al, rd, rn, rm, ra);
3997  }
3998
3999  void Smmls(
4000      Condition cond, Register rd, Register rn, Register rm, Register ra) {
4001    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4002    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4003    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4004    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
4005    VIXL_ASSERT(allow_macro_instructions_);
4006    VIXL_ASSERT(OutsideITBlock());
4007    MacroEmissionCheckScope guard(this);
4008    ITScope it_scope(this, &cond);
4009    smmls(cond, rd, rn, rm, ra);
4010  }
4011  void Smmls(Register rd, Register rn, Register rm, Register ra) {
4012    Smmls(al, rd, rn, rm, ra);
4013  }
4014
4015  void Smmlsr(
4016      Condition cond, Register rd, Register rn, Register rm, Register ra) {
4017    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4018    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4019    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4020    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
4021    VIXL_ASSERT(allow_macro_instructions_);
4022    VIXL_ASSERT(OutsideITBlock());
4023    MacroEmissionCheckScope guard(this);
4024    ITScope it_scope(this, &cond);
4025    smmlsr(cond, rd, rn, rm, ra);
4026  }
4027  void Smmlsr(Register rd, Register rn, Register rm, Register ra) {
4028    Smmlsr(al, rd, rn, rm, ra);
4029  }
4030
4031  void Smmul(Condition cond, Register rd, Register rn, Register rm) {
4032    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4033    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4034    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4035    VIXL_ASSERT(allow_macro_instructions_);
4036    VIXL_ASSERT(OutsideITBlock());
4037    MacroEmissionCheckScope guard(this);
4038    ITScope it_scope(this, &cond);
4039    smmul(cond, rd, rn, rm);
4040  }
4041  void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); }
4042
4043  void Smmulr(Condition cond, Register rd, Register rn, Register rm) {
4044    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4045    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4046    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4047    VIXL_ASSERT(allow_macro_instructions_);
4048    VIXL_ASSERT(OutsideITBlock());
4049    MacroEmissionCheckScope guard(this);
4050    ITScope it_scope(this, &cond);
4051    smmulr(cond, rd, rn, rm);
4052  }
4053  void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); }
4054
4055  void Smuad(Condition cond, Register rd, Register rn, Register rm) {
4056    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4057    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4058    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4059    VIXL_ASSERT(allow_macro_instructions_);
4060    VIXL_ASSERT(OutsideITBlock());
4061    MacroEmissionCheckScope guard(this);
4062    ITScope it_scope(this, &cond);
4063    smuad(cond, rd, rn, rm);
4064  }
4065  void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); }
4066
4067  void Smuadx(Condition cond, Register rd, Register rn, Register rm) {
4068    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4070    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4071    VIXL_ASSERT(allow_macro_instructions_);
4072    VIXL_ASSERT(OutsideITBlock());
4073    MacroEmissionCheckScope guard(this);
4074    ITScope it_scope(this, &cond);
4075    smuadx(cond, rd, rn, rm);
4076  }
4077  void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); }
4078
4079  void Smulbb(Condition cond, Register rd, Register rn, Register rm) {
4080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4081    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4082    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4083    VIXL_ASSERT(allow_macro_instructions_);
4084    VIXL_ASSERT(OutsideITBlock());
4085    MacroEmissionCheckScope guard(this);
4086    ITScope it_scope(this, &cond);
4087    smulbb(cond, rd, rn, rm);
4088  }
4089  void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); }
4090
4091  void Smulbt(Condition cond, Register rd, Register rn, Register rm) {
4092    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4093    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4095    VIXL_ASSERT(allow_macro_instructions_);
4096    VIXL_ASSERT(OutsideITBlock());
4097    MacroEmissionCheckScope guard(this);
4098    ITScope it_scope(this, &cond);
4099    smulbt(cond, rd, rn, rm);
4100  }
4101  void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); }
4102
4103  void Smull(
4104      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4105    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4106    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4107    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4109    VIXL_ASSERT(allow_macro_instructions_);
4110    VIXL_ASSERT(OutsideITBlock());
4111    MacroEmissionCheckScope guard(this);
4112    ITScope it_scope(this, &cond);
4113    smull(cond, rdlo, rdhi, rn, rm);
4114  }
4115  void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
4116    Smull(al, rdlo, rdhi, rn, rm);
4117  }
4118  void Smull(FlagsUpdate flags,
4119             Condition cond,
4120             Register rdlo,
4121             Register rdhi,
4122             Register rn,
4123             Register rm) {
4124    switch (flags) {
4125      case LeaveFlags:
4126        Smull(cond, rdlo, rdhi, rn, rm);
4127        break;
4128      case SetFlags:
4129        Smulls(cond, rdlo, rdhi, rn, rm);
4130        break;
4131      case DontCare:
4132        Smull(cond, rdlo, rdhi, rn, rm);
4133        break;
4134    }
4135  }
4136  void Smull(FlagsUpdate flags,
4137             Register rdlo,
4138             Register rdhi,
4139             Register rn,
4140             Register rm) {
4141    Smull(flags, al, rdlo, rdhi, rn, rm);
4142  }
4143
4144  void Smulls(
4145      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4146    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4147    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4148    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4149    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4150    VIXL_ASSERT(allow_macro_instructions_);
4151    VIXL_ASSERT(OutsideITBlock());
4152    MacroEmissionCheckScope guard(this);
4153    ITScope it_scope(this, &cond);
4154    smulls(cond, rdlo, rdhi, rn, rm);
4155  }
4156  void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4157    Smulls(al, rdlo, rdhi, rn, rm);
4158  }
4159
4160  void Smultb(Condition cond, Register rd, Register rn, Register rm) {
4161    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4162    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4163    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4164    VIXL_ASSERT(allow_macro_instructions_);
4165    VIXL_ASSERT(OutsideITBlock());
4166    MacroEmissionCheckScope guard(this);
4167    ITScope it_scope(this, &cond);
4168    smultb(cond, rd, rn, rm);
4169  }
4170  void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); }
4171
4172  void Smultt(Condition cond, Register rd, Register rn, Register rm) {
4173    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4174    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4175    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4176    VIXL_ASSERT(allow_macro_instructions_);
4177    VIXL_ASSERT(OutsideITBlock());
4178    MacroEmissionCheckScope guard(this);
4179    ITScope it_scope(this, &cond);
4180    smultt(cond, rd, rn, rm);
4181  }
4182  void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); }
4183
4184  void Smulwb(Condition cond, Register rd, Register rn, Register rm) {
4185    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4186    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4187    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4188    VIXL_ASSERT(allow_macro_instructions_);
4189    VIXL_ASSERT(OutsideITBlock());
4190    MacroEmissionCheckScope guard(this);
4191    ITScope it_scope(this, &cond);
4192    smulwb(cond, rd, rn, rm);
4193  }
4194  void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); }
4195
4196  void Smulwt(Condition cond, Register rd, Register rn, Register rm) {
4197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4198    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4199    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4200    VIXL_ASSERT(allow_macro_instructions_);
4201    VIXL_ASSERT(OutsideITBlock());
4202    MacroEmissionCheckScope guard(this);
4203    ITScope it_scope(this, &cond);
4204    smulwt(cond, rd, rn, rm);
4205  }
4206  void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); }
4207
4208  void Smusd(Condition cond, Register rd, Register rn, Register rm) {
4209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4210    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4212    VIXL_ASSERT(allow_macro_instructions_);
4213    VIXL_ASSERT(OutsideITBlock());
4214    MacroEmissionCheckScope guard(this);
4215    ITScope it_scope(this, &cond);
4216    smusd(cond, rd, rn, rm);
4217  }
4218  void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); }
4219
4220  void Smusdx(Condition cond, Register rd, Register rn, Register rm) {
4221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4224    VIXL_ASSERT(allow_macro_instructions_);
4225    VIXL_ASSERT(OutsideITBlock());
4226    MacroEmissionCheckScope guard(this);
4227    ITScope it_scope(this, &cond);
4228    smusdx(cond, rd, rn, rm);
4229  }
4230  void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); }
4231
4232  void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
4233    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4234    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4235    VIXL_ASSERT(allow_macro_instructions_);
4236    VIXL_ASSERT(OutsideITBlock());
4237    MacroEmissionCheckScope guard(this);
4238    ITScope it_scope(this, &cond);
4239    ssat(cond, rd, imm, operand);
4240  }
4241  void Ssat(Register rd, uint32_t imm, const Operand& operand) {
4242    Ssat(al, rd, imm, operand);
4243  }
4244
4245  void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) {
4246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4247    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4248    VIXL_ASSERT(allow_macro_instructions_);
4249    VIXL_ASSERT(OutsideITBlock());
4250    MacroEmissionCheckScope guard(this);
4251    ITScope it_scope(this, &cond);
4252    ssat16(cond, rd, imm, rn);
4253  }
4254  void Ssat16(Register rd, uint32_t imm, Register rn) {
4255    Ssat16(al, rd, imm, rn);
4256  }
4257
4258  void Ssax(Condition cond, Register rd, Register rn, Register rm) {
4259    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4260    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4261    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4262    VIXL_ASSERT(allow_macro_instructions_);
4263    VIXL_ASSERT(OutsideITBlock());
4264    MacroEmissionCheckScope guard(this);
4265    ITScope it_scope(this, &cond);
4266    ssax(cond, rd, rn, rm);
4267  }
4268  void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); }
4269
4270  void Ssub16(Condition cond, Register rd, Register rn, Register rm) {
4271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4272    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4273    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4274    VIXL_ASSERT(allow_macro_instructions_);
4275    VIXL_ASSERT(OutsideITBlock());
4276    MacroEmissionCheckScope guard(this);
4277    ITScope it_scope(this, &cond);
4278    ssub16(cond, rd, rn, rm);
4279  }
4280  void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); }
4281
4282  void Ssub8(Condition cond, Register rd, Register rn, Register rm) {
4283    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4284    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4285    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4286    VIXL_ASSERT(allow_macro_instructions_);
4287    VIXL_ASSERT(OutsideITBlock());
4288    MacroEmissionCheckScope guard(this);
4289    ITScope it_scope(this, &cond);
4290    ssub8(cond, rd, rn, rm);
4291  }
4292  void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); }
4293
4294  void Stl(Condition cond, Register rt, const MemOperand& operand) {
4295    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4296    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4297    VIXL_ASSERT(allow_macro_instructions_);
4298    VIXL_ASSERT(OutsideITBlock());
4299    MacroEmissionCheckScope guard(this);
4300    ITScope it_scope(this, &cond);
4301    stl(cond, rt, operand);
4302  }
4303  void Stl(Register rt, const MemOperand& operand) { Stl(al, rt, operand); }
4304
4305  void Stlb(Condition cond, Register rt, const MemOperand& operand) {
4306    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4307    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4308    VIXL_ASSERT(allow_macro_instructions_);
4309    VIXL_ASSERT(OutsideITBlock());
4310    MacroEmissionCheckScope guard(this);
4311    ITScope it_scope(this, &cond);
4312    stlb(cond, rt, operand);
4313  }
4314  void Stlb(Register rt, const MemOperand& operand) { Stlb(al, rt, operand); }
4315
4316  void Stlex(Condition cond,
4317             Register rd,
4318             Register rt,
4319             const MemOperand& operand) {
4320    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4321    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4322    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4323    VIXL_ASSERT(allow_macro_instructions_);
4324    VIXL_ASSERT(OutsideITBlock());
4325    MacroEmissionCheckScope guard(this);
4326    ITScope it_scope(this, &cond);
4327    stlex(cond, rd, rt, operand);
4328  }
4329  void Stlex(Register rd, Register rt, const MemOperand& operand) {
4330    Stlex(al, rd, rt, operand);
4331  }
4332
4333  void Stlexb(Condition cond,
4334              Register rd,
4335              Register rt,
4336              const MemOperand& operand) {
4337    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4338    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4339    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4340    VIXL_ASSERT(allow_macro_instructions_);
4341    VIXL_ASSERT(OutsideITBlock());
4342    MacroEmissionCheckScope guard(this);
4343    ITScope it_scope(this, &cond);
4344    stlexb(cond, rd, rt, operand);
4345  }
4346  void Stlexb(Register rd, Register rt, const MemOperand& operand) {
4347    Stlexb(al, rd, rt, operand);
4348  }
4349
4350  void Stlexd(Condition cond,
4351              Register rd,
4352              Register rt,
4353              Register rt2,
4354              const MemOperand& operand) {
4355    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4356    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4357    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4358    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4359    VIXL_ASSERT(allow_macro_instructions_);
4360    VIXL_ASSERT(OutsideITBlock());
4361    MacroEmissionCheckScope guard(this);
4362    ITScope it_scope(this, &cond);
4363    stlexd(cond, rd, rt, rt2, operand);
4364  }
4365  void Stlexd(Register rd,
4366              Register rt,
4367              Register rt2,
4368              const MemOperand& operand) {
4369    Stlexd(al, rd, rt, rt2, operand);
4370  }
4371
4372  void Stlexh(Condition cond,
4373              Register rd,
4374              Register rt,
4375              const MemOperand& operand) {
4376    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4377    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4378    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4379    VIXL_ASSERT(allow_macro_instructions_);
4380    VIXL_ASSERT(OutsideITBlock());
4381    MacroEmissionCheckScope guard(this);
4382    ITScope it_scope(this, &cond);
4383    stlexh(cond, rd, rt, operand);
4384  }
4385  void Stlexh(Register rd, Register rt, const MemOperand& operand) {
4386    Stlexh(al, rd, rt, operand);
4387  }
4388
4389  void Stlh(Condition cond, Register rt, const MemOperand& operand) {
4390    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4391    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4392    VIXL_ASSERT(allow_macro_instructions_);
4393    VIXL_ASSERT(OutsideITBlock());
4394    MacroEmissionCheckScope guard(this);
4395    ITScope it_scope(this, &cond);
4396    stlh(cond, rt, operand);
4397  }
4398  void Stlh(Register rt, const MemOperand& operand) { Stlh(al, rt, operand); }
4399
4400  void Stm(Condition cond,
4401           Register rn,
4402           WriteBack write_back,
4403           RegisterList registers) {
4404    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4405    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4406    VIXL_ASSERT(allow_macro_instructions_);
4407    VIXL_ASSERT(OutsideITBlock());
4408    MacroEmissionCheckScope guard(this);
4409    ITScope it_scope(this, &cond);
4410    stm(cond, rn, write_back, registers);
4411  }
4412  void Stm(Register rn, WriteBack write_back, RegisterList registers) {
4413    Stm(al, rn, write_back, registers);
4414  }
4415
4416  void Stmda(Condition cond,
4417             Register rn,
4418             WriteBack write_back,
4419             RegisterList registers) {
4420    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4421    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4422    VIXL_ASSERT(allow_macro_instructions_);
4423    VIXL_ASSERT(OutsideITBlock());
4424    MacroEmissionCheckScope guard(this);
4425    ITScope it_scope(this, &cond);
4426    stmda(cond, rn, write_back, registers);
4427  }
4428  void Stmda(Register rn, WriteBack write_back, RegisterList registers) {
4429    Stmda(al, rn, write_back, registers);
4430  }
4431
4432  void Stmdb(Condition cond,
4433             Register rn,
4434             WriteBack write_back,
4435             RegisterList registers) {
4436    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4437    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4438    VIXL_ASSERT(allow_macro_instructions_);
4439    VIXL_ASSERT(OutsideITBlock());
4440    MacroEmissionCheckScope guard(this);
4441    ITScope it_scope(this, &cond);
4442    stmdb(cond, rn, write_back, registers);
4443  }
4444  void Stmdb(Register rn, WriteBack write_back, RegisterList registers) {
4445    Stmdb(al, rn, write_back, registers);
4446  }
4447
4448  void Stmea(Condition cond,
4449             Register rn,
4450             WriteBack write_back,
4451             RegisterList registers) {
4452    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4453    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4454    VIXL_ASSERT(allow_macro_instructions_);
4455    VIXL_ASSERT(OutsideITBlock());
4456    MacroEmissionCheckScope guard(this);
4457    ITScope it_scope(this, &cond);
4458    stmea(cond, rn, write_back, registers);
4459  }
4460  void Stmea(Register rn, WriteBack write_back, RegisterList registers) {
4461    Stmea(al, rn, write_back, registers);
4462  }
4463
4464  void Stmed(Condition cond,
4465             Register rn,
4466             WriteBack write_back,
4467             RegisterList registers) {
4468    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4469    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4470    VIXL_ASSERT(allow_macro_instructions_);
4471    VIXL_ASSERT(OutsideITBlock());
4472    MacroEmissionCheckScope guard(this);
4473    ITScope it_scope(this, &cond);
4474    stmed(cond, rn, write_back, registers);
4475  }
4476  void Stmed(Register rn, WriteBack write_back, RegisterList registers) {
4477    Stmed(al, rn, write_back, registers);
4478  }
4479
4480  void Stmfa(Condition cond,
4481             Register rn,
4482             WriteBack write_back,
4483             RegisterList registers) {
4484    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4485    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4486    VIXL_ASSERT(allow_macro_instructions_);
4487    VIXL_ASSERT(OutsideITBlock());
4488    MacroEmissionCheckScope guard(this);
4489    ITScope it_scope(this, &cond);
4490    stmfa(cond, rn, write_back, registers);
4491  }
4492  void Stmfa(Register rn, WriteBack write_back, RegisterList registers) {
4493    Stmfa(al, rn, write_back, registers);
4494  }
4495
4496  void Stmfd(Condition cond,
4497             Register rn,
4498             WriteBack write_back,
4499             RegisterList registers) {
4500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4501    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4502    VIXL_ASSERT(allow_macro_instructions_);
4503    VIXL_ASSERT(OutsideITBlock());
4504    MacroEmissionCheckScope guard(this);
4505    ITScope it_scope(this, &cond);
4506    stmfd(cond, rn, write_back, registers);
4507  }
4508  void Stmfd(Register rn, WriteBack write_back, RegisterList registers) {
4509    Stmfd(al, rn, write_back, registers);
4510  }
4511
4512  void Stmib(Condition cond,
4513             Register rn,
4514             WriteBack write_back,
4515             RegisterList registers) {
4516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4517    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4518    VIXL_ASSERT(allow_macro_instructions_);
4519    VIXL_ASSERT(OutsideITBlock());
4520    MacroEmissionCheckScope guard(this);
4521    ITScope it_scope(this, &cond);
4522    stmib(cond, rn, write_back, registers);
4523  }
4524  void Stmib(Register rn, WriteBack write_back, RegisterList registers) {
4525    Stmib(al, rn, write_back, registers);
4526  }
4527
4528  void Str(Condition cond, Register rt, const MemOperand& operand) {
4529    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4530    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4531    VIXL_ASSERT(allow_macro_instructions_);
4532    VIXL_ASSERT(OutsideITBlock());
4533    MacroEmissionCheckScope guard(this);
4534    bool can_use_it =
4535        // STR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4536        (operand.IsImmediate() && rt.IsLow() &&
4537         operand.GetBaseRegister().IsLow() &&
4538         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
4539         (operand.GetAddrMode() == Offset)) ||
4540        // STR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
4541        (operand.IsImmediate() && rt.IsLow() &&
4542         operand.GetBaseRegister().IsSP() &&
4543         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
4544         (operand.GetAddrMode() == Offset)) ||
4545        // STR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4546        (operand.IsPlainRegister() && rt.IsLow() &&
4547         operand.GetBaseRegister().IsLow() &&
4548         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4549         (operand.GetAddrMode() == Offset));
4550    ITScope it_scope(this, &cond, can_use_it);
4551    str(cond, rt, operand);
4552  }
4553  void Str(Register rt, const MemOperand& operand) { Str(al, rt, operand); }
4554
4555  void Strb(Condition cond, Register rt, const MemOperand& operand) {
4556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4557    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4558    VIXL_ASSERT(allow_macro_instructions_);
4559    VIXL_ASSERT(OutsideITBlock());
4560    MacroEmissionCheckScope guard(this);
4561    bool can_use_it =
4562        // STRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4563        (operand.IsImmediate() && rt.IsLow() &&
4564         operand.GetBaseRegister().IsLow() &&
4565         operand.IsOffsetImmediateWithinRange(0, 31) &&
4566         (operand.GetAddrMode() == Offset)) ||
4567        // STRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4568        (operand.IsPlainRegister() && rt.IsLow() &&
4569         operand.GetBaseRegister().IsLow() &&
4570         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4571         (operand.GetAddrMode() == Offset));
4572    ITScope it_scope(this, &cond, can_use_it);
4573    strb(cond, rt, operand);
4574  }
4575  void Strb(Register rt, const MemOperand& operand) { Strb(al, rt, operand); }
4576
4577  void Strd(Condition cond,
4578            Register rt,
4579            Register rt2,
4580            const MemOperand& operand) {
4581    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4583    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4584    VIXL_ASSERT(allow_macro_instructions_);
4585    VIXL_ASSERT(OutsideITBlock());
4586    MacroEmissionCheckScope guard(this);
4587    ITScope it_scope(this, &cond);
4588    strd(cond, rt, rt2, operand);
4589  }
4590  void Strd(Register rt, Register rt2, const MemOperand& operand) {
4591    Strd(al, rt, rt2, operand);
4592  }
4593
4594  void Strex(Condition cond,
4595             Register rd,
4596             Register rt,
4597             const MemOperand& operand) {
4598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4599    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4600    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4601    VIXL_ASSERT(allow_macro_instructions_);
4602    VIXL_ASSERT(OutsideITBlock());
4603    MacroEmissionCheckScope guard(this);
4604    ITScope it_scope(this, &cond);
4605    strex(cond, rd, rt, operand);
4606  }
4607  void Strex(Register rd, Register rt, const MemOperand& operand) {
4608    Strex(al, rd, rt, operand);
4609  }
4610
4611  void Strexb(Condition cond,
4612              Register rd,
4613              Register rt,
4614              const MemOperand& operand) {
4615    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4617    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4618    VIXL_ASSERT(allow_macro_instructions_);
4619    VIXL_ASSERT(OutsideITBlock());
4620    MacroEmissionCheckScope guard(this);
4621    ITScope it_scope(this, &cond);
4622    strexb(cond, rd, rt, operand);
4623  }
4624  void Strexb(Register rd, Register rt, const MemOperand& operand) {
4625    Strexb(al, rd, rt, operand);
4626  }
4627
4628  void Strexd(Condition cond,
4629              Register rd,
4630              Register rt,
4631              Register rt2,
4632              const MemOperand& operand) {
4633    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4636    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4637    VIXL_ASSERT(allow_macro_instructions_);
4638    VIXL_ASSERT(OutsideITBlock());
4639    MacroEmissionCheckScope guard(this);
4640    ITScope it_scope(this, &cond);
4641    strexd(cond, rd, rt, rt2, operand);
4642  }
4643  void Strexd(Register rd,
4644              Register rt,
4645              Register rt2,
4646              const MemOperand& operand) {
4647    Strexd(al, rd, rt, rt2, operand);
4648  }
4649
4650  void Strexh(Condition cond,
4651              Register rd,
4652              Register rt,
4653              const MemOperand& operand) {
4654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4655    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4656    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4657    VIXL_ASSERT(allow_macro_instructions_);
4658    VIXL_ASSERT(OutsideITBlock());
4659    MacroEmissionCheckScope guard(this);
4660    ITScope it_scope(this, &cond);
4661    strexh(cond, rd, rt, operand);
4662  }
4663  void Strexh(Register rd, Register rt, const MemOperand& operand) {
4664    Strexh(al, rd, rt, operand);
4665  }
4666
4667  void Strh(Condition cond, Register rt, const MemOperand& operand) {
4668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4669    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4670    VIXL_ASSERT(allow_macro_instructions_);
4671    VIXL_ASSERT(OutsideITBlock());
4672    MacroEmissionCheckScope guard(this);
4673    bool can_use_it =
4674        // STRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4675        (operand.IsImmediate() && rt.IsLow() &&
4676         operand.GetBaseRegister().IsLow() &&
4677         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
4678         (operand.GetAddrMode() == Offset)) ||
4679        // STRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4680        (operand.IsPlainRegister() && rt.IsLow() &&
4681         operand.GetBaseRegister().IsLow() &&
4682         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4683         (operand.GetAddrMode() == Offset));
4684    ITScope it_scope(this, &cond, can_use_it);
4685    strh(cond, rt, operand);
4686  }
4687  void Strh(Register rt, const MemOperand& operand) { Strh(al, rt, operand); }
4688
4689  void Sub(Condition cond, Register rd, Register rn, const Operand& operand) {
4690    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4691    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4692    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4693    VIXL_ASSERT(allow_macro_instructions_);
4694    VIXL_ASSERT(OutsideITBlock());
4695    MacroEmissionCheckScope guard(this);
4696    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
4697      uint32_t immediate = operand.GetImmediate();
4698      if (immediate == 0) {
4699        return;
4700      }
4701    }
4702    bool can_use_it =
4703        // SUB<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
4704        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
4705         rd.IsLow()) ||
4706        // SUB<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
4707        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
4708         rd.IsLow() && rn.Is(rd)) ||
4709        // SUB<c>{<q>} <Rd>, <Rn>, <Rm>
4710        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4711         operand.GetBaseRegister().IsLow());
4712    ITScope it_scope(this, &cond, can_use_it);
4713    sub(cond, rd, rn, operand);
4714  }
4715  void Sub(Register rd, Register rn, const Operand& operand) {
4716    Sub(al, rd, rn, operand);
4717  }
4718  void Sub(FlagsUpdate flags,
4719           Condition cond,
4720           Register rd,
4721           Register rn,
4722           const Operand& operand) {
4723    switch (flags) {
4724      case LeaveFlags:
4725        Sub(cond, rd, rn, operand);
4726        break;
4727      case SetFlags:
4728        Subs(cond, rd, rn, operand);
4729        break;
4730      case DontCare:
4731        bool setflags_is_smaller =
4732            IsUsingT32() && cond.Is(al) &&
4733            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4734              operand.GetBaseRegister().IsLow()) ||
4735             (operand.IsImmediate() &&
4736              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
4737               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
4738        if (setflags_is_smaller) {
4739          Subs(cond, rd, rn, operand);
4740        } else {
4741          bool changed_op_is_smaller =
4742              operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
4743              ((rd.IsLow() && rn.IsLow() &&
4744                (operand.GetSignedImmediate() >= -7)) ||
4745               (rd.IsLow() && rn.Is(rd) &&
4746                (operand.GetSignedImmediate() >= -255)));
4747          if (changed_op_is_smaller) {
4748            Adds(cond, rd, rn, -operand.GetSignedImmediate());
4749          } else {
4750            Sub(cond, rd, rn, operand);
4751          }
4752        }
4753        break;
4754    }
4755  }
4756  void Sub(FlagsUpdate flags,
4757           Register rd,
4758           Register rn,
4759           const Operand& operand) {
4760    Sub(flags, al, rd, rn, operand);
4761  }
4762
4763  void Subs(Condition cond, Register rd, Register rn, const Operand& operand) {
4764    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4765    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4766    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4767    VIXL_ASSERT(allow_macro_instructions_);
4768    VIXL_ASSERT(OutsideITBlock());
4769    MacroEmissionCheckScope guard(this);
4770    ITScope it_scope(this, &cond);
4771    subs(cond, rd, rn, operand);
4772  }
4773  void Subs(Register rd, Register rn, const Operand& operand) {
4774    Subs(al, rd, rn, operand);
4775  }
4776
4777  void Svc(Condition cond, uint32_t imm) {
4778    VIXL_ASSERT(allow_macro_instructions_);
4779    VIXL_ASSERT(OutsideITBlock());
4780    MacroEmissionCheckScope guard(this);
4781    ITScope it_scope(this, &cond);
4782    svc(cond, imm);
4783  }
4784  void Svc(uint32_t imm) { Svc(al, imm); }
4785
4786  void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
4787    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4788    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4789    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4790    VIXL_ASSERT(allow_macro_instructions_);
4791    VIXL_ASSERT(OutsideITBlock());
4792    MacroEmissionCheckScope guard(this);
4793    ITScope it_scope(this, &cond);
4794    sxtab(cond, rd, rn, operand);
4795  }
4796  void Sxtab(Register rd, Register rn, const Operand& operand) {
4797    Sxtab(al, rd, rn, operand);
4798  }
4799
4800  void Sxtab16(Condition cond,
4801               Register rd,
4802               Register rn,
4803               const Operand& operand) {
4804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4805    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4806    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4807    VIXL_ASSERT(allow_macro_instructions_);
4808    VIXL_ASSERT(OutsideITBlock());
4809    MacroEmissionCheckScope guard(this);
4810    ITScope it_scope(this, &cond);
4811    sxtab16(cond, rd, rn, operand);
4812  }
4813  void Sxtab16(Register rd, Register rn, const Operand& operand) {
4814    Sxtab16(al, rd, rn, operand);
4815  }
4816
4817  void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
4818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4820    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4821    VIXL_ASSERT(allow_macro_instructions_);
4822    VIXL_ASSERT(OutsideITBlock());
4823    MacroEmissionCheckScope guard(this);
4824    ITScope it_scope(this, &cond);
4825    sxtah(cond, rd, rn, operand);
4826  }
4827  void Sxtah(Register rd, Register rn, const Operand& operand) {
4828    Sxtah(al, rd, rn, operand);
4829  }
4830
4831  void Sxtb(Condition cond, Register rd, const Operand& operand) {
4832    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4833    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4834    VIXL_ASSERT(allow_macro_instructions_);
4835    VIXL_ASSERT(OutsideITBlock());
4836    MacroEmissionCheckScope guard(this);
4837    ITScope it_scope(this, &cond);
4838    sxtb(cond, rd, operand);
4839  }
4840  void Sxtb(Register rd, const Operand& operand) { Sxtb(al, rd, operand); }
4841
4842  void Sxtb16(Condition cond, Register rd, const Operand& operand) {
4843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4844    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4845    VIXL_ASSERT(allow_macro_instructions_);
4846    VIXL_ASSERT(OutsideITBlock());
4847    MacroEmissionCheckScope guard(this);
4848    ITScope it_scope(this, &cond);
4849    sxtb16(cond, rd, operand);
4850  }
4851  void Sxtb16(Register rd, const Operand& operand) { Sxtb16(al, rd, operand); }
4852
4853  void Sxth(Condition cond, Register rd, const Operand& operand) {
4854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4855    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4856    VIXL_ASSERT(allow_macro_instructions_);
4857    VIXL_ASSERT(OutsideITBlock());
4858    MacroEmissionCheckScope guard(this);
4859    ITScope it_scope(this, &cond);
4860    sxth(cond, rd, operand);
4861  }
4862  void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); }
4863
4864  void Teq(Condition cond, Register rn, const Operand& operand) {
4865    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4866    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4867    VIXL_ASSERT(allow_macro_instructions_);
4868    VIXL_ASSERT(OutsideITBlock());
4869    MacroEmissionCheckScope guard(this);
4870    ITScope it_scope(this, &cond);
4871    teq(cond, rn, operand);
4872  }
4873  void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); }
4874
4875  void Tst(Condition cond, Register rn, const Operand& operand) {
4876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4877    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4878    VIXL_ASSERT(allow_macro_instructions_);
4879    VIXL_ASSERT(OutsideITBlock());
4880    MacroEmissionCheckScope guard(this);
4881    bool can_use_it =
4882        // TST{<c>}{<q>} <Rn>, <Rm> ; T1
4883        operand.IsPlainRegister() && rn.IsLow() &&
4884        operand.GetBaseRegister().IsLow();
4885    ITScope it_scope(this, &cond, can_use_it);
4886    tst(cond, rn, operand);
4887  }
4888  void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); }
4889
4890  void Uadd16(Condition cond, Register rd, Register rn, Register rm) {
4891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4892    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4893    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4894    VIXL_ASSERT(allow_macro_instructions_);
4895    VIXL_ASSERT(OutsideITBlock());
4896    MacroEmissionCheckScope guard(this);
4897    ITScope it_scope(this, &cond);
4898    uadd16(cond, rd, rn, rm);
4899  }
4900  void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); }
4901
4902  void Uadd8(Condition cond, Register rd, Register rn, Register rm) {
4903    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4904    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4905    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4906    VIXL_ASSERT(allow_macro_instructions_);
4907    VIXL_ASSERT(OutsideITBlock());
4908    MacroEmissionCheckScope guard(this);
4909    ITScope it_scope(this, &cond);
4910    uadd8(cond, rd, rn, rm);
4911  }
4912  void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); }
4913
4914  void Uasx(Condition cond, Register rd, Register rn, Register rm) {
4915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4916    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4917    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4918    VIXL_ASSERT(allow_macro_instructions_);
4919    VIXL_ASSERT(OutsideITBlock());
4920    MacroEmissionCheckScope guard(this);
4921    ITScope it_scope(this, &cond);
4922    uasx(cond, rd, rn, rm);
4923  }
4924  void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); }
4925
4926  void Ubfx(Condition cond,
4927            Register rd,
4928            Register rn,
4929            uint32_t lsb,
4930            const Operand& operand) {
4931    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4932    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4933    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4934    VIXL_ASSERT(allow_macro_instructions_);
4935    VIXL_ASSERT(OutsideITBlock());
4936    MacroEmissionCheckScope guard(this);
4937    ITScope it_scope(this, &cond);
4938    ubfx(cond, rd, rn, lsb, operand);
4939  }
4940  void Ubfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
4941    Ubfx(al, rd, rn, lsb, operand);
4942  }
4943
4944  void Udf(Condition cond, uint32_t imm) {
4945    VIXL_ASSERT(allow_macro_instructions_);
4946    VIXL_ASSERT(OutsideITBlock());
4947    MacroEmissionCheckScope guard(this);
4948    ITScope it_scope(this, &cond);
4949    udf(cond, imm);
4950  }
4951  void Udf(uint32_t imm) { Udf(al, imm); }
4952
4953  void Udiv(Condition cond, Register rd, Register rn, Register rm) {
4954    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4955    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4956    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4957    VIXL_ASSERT(allow_macro_instructions_);
4958    VIXL_ASSERT(OutsideITBlock());
4959    MacroEmissionCheckScope guard(this);
4960    ITScope it_scope(this, &cond);
4961    udiv(cond, rd, rn, rm);
4962  }
4963  void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); }
4964
4965  void Uhadd16(Condition cond, Register rd, Register rn, Register rm) {
4966    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4967    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4968    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4969    VIXL_ASSERT(allow_macro_instructions_);
4970    VIXL_ASSERT(OutsideITBlock());
4971    MacroEmissionCheckScope guard(this);
4972    ITScope it_scope(this, &cond);
4973    uhadd16(cond, rd, rn, rm);
4974  }
4975  void Uhadd16(Register rd, Register rn, Register rm) {
4976    Uhadd16(al, rd, rn, rm);
4977  }
4978
4979  void Uhadd8(Condition cond, Register rd, Register rn, Register rm) {
4980    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4981    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4982    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4983    VIXL_ASSERT(allow_macro_instructions_);
4984    VIXL_ASSERT(OutsideITBlock());
4985    MacroEmissionCheckScope guard(this);
4986    ITScope it_scope(this, &cond);
4987    uhadd8(cond, rd, rn, rm);
4988  }
4989  void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); }
4990
4991  void Uhasx(Condition cond, Register rd, Register rn, Register rm) {
4992    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4993    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4995    VIXL_ASSERT(allow_macro_instructions_);
4996    VIXL_ASSERT(OutsideITBlock());
4997    MacroEmissionCheckScope guard(this);
4998    ITScope it_scope(this, &cond);
4999    uhasx(cond, rd, rn, rm);
5000  }
5001  void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); }
5002
5003  void Uhsax(Condition cond, Register rd, Register rn, Register rm) {
5004    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5005    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5006    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5007    VIXL_ASSERT(allow_macro_instructions_);
5008    VIXL_ASSERT(OutsideITBlock());
5009    MacroEmissionCheckScope guard(this);
5010    ITScope it_scope(this, &cond);
5011    uhsax(cond, rd, rn, rm);
5012  }
5013  void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); }
5014
5015  void Uhsub16(Condition cond, Register rd, Register rn, Register rm) {
5016    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5017    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5018    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5019    VIXL_ASSERT(allow_macro_instructions_);
5020    VIXL_ASSERT(OutsideITBlock());
5021    MacroEmissionCheckScope guard(this);
5022    ITScope it_scope(this, &cond);
5023    uhsub16(cond, rd, rn, rm);
5024  }
5025  void Uhsub16(Register rd, Register rn, Register rm) {
5026    Uhsub16(al, rd, rn, rm);
5027  }
5028
5029  void Uhsub8(Condition cond, Register rd, Register rn, Register rm) {
5030    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5031    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5032    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5033    VIXL_ASSERT(allow_macro_instructions_);
5034    VIXL_ASSERT(OutsideITBlock());
5035    MacroEmissionCheckScope guard(this);
5036    ITScope it_scope(this, &cond);
5037    uhsub8(cond, rd, rn, rm);
5038  }
5039  void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); }
5040
5041  void Umaal(
5042      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5043    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5044    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5045    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5046    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5047    VIXL_ASSERT(allow_macro_instructions_);
5048    VIXL_ASSERT(OutsideITBlock());
5049    MacroEmissionCheckScope guard(this);
5050    ITScope it_scope(this, &cond);
5051    umaal(cond, rdlo, rdhi, rn, rm);
5052  }
5053  void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
5054    Umaal(al, rdlo, rdhi, rn, rm);
5055  }
5056
5057  void Umlal(
5058      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5059    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5060    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5061    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5062    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5063    VIXL_ASSERT(allow_macro_instructions_);
5064    VIXL_ASSERT(OutsideITBlock());
5065    MacroEmissionCheckScope guard(this);
5066    ITScope it_scope(this, &cond);
5067    umlal(cond, rdlo, rdhi, rn, rm);
5068  }
5069  void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
5070    Umlal(al, rdlo, rdhi, rn, rm);
5071  }
5072  void Umlal(FlagsUpdate flags,
5073             Condition cond,
5074             Register rdlo,
5075             Register rdhi,
5076             Register rn,
5077             Register rm) {
5078    switch (flags) {
5079      case LeaveFlags:
5080        Umlal(cond, rdlo, rdhi, rn, rm);
5081        break;
5082      case SetFlags:
5083        Umlals(cond, rdlo, rdhi, rn, rm);
5084        break;
5085      case DontCare:
5086        Umlal(cond, rdlo, rdhi, rn, rm);
5087        break;
5088    }
5089  }
5090  void Umlal(FlagsUpdate flags,
5091             Register rdlo,
5092             Register rdhi,
5093             Register rn,
5094             Register rm) {
5095    Umlal(flags, al, rdlo, rdhi, rn, rm);
5096  }
5097
5098  void Umlals(
5099      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5100    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5101    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5103    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5104    VIXL_ASSERT(allow_macro_instructions_);
5105    VIXL_ASSERT(OutsideITBlock());
5106    MacroEmissionCheckScope guard(this);
5107    ITScope it_scope(this, &cond);
5108    umlals(cond, rdlo, rdhi, rn, rm);
5109  }
5110  void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
5111    Umlals(al, rdlo, rdhi, rn, rm);
5112  }
5113
5114  void Umull(
5115      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5116    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5117    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5118    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5119    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5120    VIXL_ASSERT(allow_macro_instructions_);
5121    VIXL_ASSERT(OutsideITBlock());
5122    MacroEmissionCheckScope guard(this);
5123    ITScope it_scope(this, &cond);
5124    umull(cond, rdlo, rdhi, rn, rm);
5125  }
5126  void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
5127    Umull(al, rdlo, rdhi, rn, rm);
5128  }
5129  void Umull(FlagsUpdate flags,
5130             Condition cond,
5131             Register rdlo,
5132             Register rdhi,
5133             Register rn,
5134             Register rm) {
5135    switch (flags) {
5136      case LeaveFlags:
5137        Umull(cond, rdlo, rdhi, rn, rm);
5138        break;
5139      case SetFlags:
5140        Umulls(cond, rdlo, rdhi, rn, rm);
5141        break;
5142      case DontCare:
5143        Umull(cond, rdlo, rdhi, rn, rm);
5144        break;
5145    }
5146  }
5147  void Umull(FlagsUpdate flags,
5148             Register rdlo,
5149             Register rdhi,
5150             Register rn,
5151             Register rm) {
5152    Umull(flags, al, rdlo, rdhi, rn, rm);
5153  }
5154
5155  void Umulls(
5156      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5158    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5159    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5160    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5161    VIXL_ASSERT(allow_macro_instructions_);
5162    VIXL_ASSERT(OutsideITBlock());
5163    MacroEmissionCheckScope guard(this);
5164    ITScope it_scope(this, &cond);
5165    umulls(cond, rdlo, rdhi, rn, rm);
5166  }
5167  void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
5168    Umulls(al, rdlo, rdhi, rn, rm);
5169  }
5170
5171  void Uqadd16(Condition cond, Register rd, Register rn, Register rm) {
5172    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5173    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5174    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5175    VIXL_ASSERT(allow_macro_instructions_);
5176    VIXL_ASSERT(OutsideITBlock());
5177    MacroEmissionCheckScope guard(this);
5178    ITScope it_scope(this, &cond);
5179    uqadd16(cond, rd, rn, rm);
5180  }
5181  void Uqadd16(Register rd, Register rn, Register rm) {
5182    Uqadd16(al, rd, rn, rm);
5183  }
5184
5185  void Uqadd8(Condition cond, Register rd, Register rn, Register rm) {
5186    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5187    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5188    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5189    VIXL_ASSERT(allow_macro_instructions_);
5190    VIXL_ASSERT(OutsideITBlock());
5191    MacroEmissionCheckScope guard(this);
5192    ITScope it_scope(this, &cond);
5193    uqadd8(cond, rd, rn, rm);
5194  }
5195  void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); }
5196
5197  void Uqasx(Condition cond, Register rd, Register rn, Register rm) {
5198    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5199    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5200    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5201    VIXL_ASSERT(allow_macro_instructions_);
5202    VIXL_ASSERT(OutsideITBlock());
5203    MacroEmissionCheckScope guard(this);
5204    ITScope it_scope(this, &cond);
5205    uqasx(cond, rd, rn, rm);
5206  }
5207  void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); }
5208
5209  void Uqsax(Condition cond, Register rd, Register rn, Register rm) {
5210    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5212    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5213    VIXL_ASSERT(allow_macro_instructions_);
5214    VIXL_ASSERT(OutsideITBlock());
5215    MacroEmissionCheckScope guard(this);
5216    ITScope it_scope(this, &cond);
5217    uqsax(cond, rd, rn, rm);
5218  }
5219  void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); }
5220
5221  void Uqsub16(Condition cond, Register rd, Register rn, Register rm) {
5222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5224    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5225    VIXL_ASSERT(allow_macro_instructions_);
5226    VIXL_ASSERT(OutsideITBlock());
5227    MacroEmissionCheckScope guard(this);
5228    ITScope it_scope(this, &cond);
5229    uqsub16(cond, rd, rn, rm);
5230  }
5231  void Uqsub16(Register rd, Register rn, Register rm) {
5232    Uqsub16(al, rd, rn, rm);
5233  }
5234
5235  void Uqsub8(Condition cond, Register rd, Register rn, Register rm) {
5236    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5237    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5238    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5239    VIXL_ASSERT(allow_macro_instructions_);
5240    VIXL_ASSERT(OutsideITBlock());
5241    MacroEmissionCheckScope guard(this);
5242    ITScope it_scope(this, &cond);
5243    uqsub8(cond, rd, rn, rm);
5244  }
5245  void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); }
5246
5247  void Usad8(Condition cond, Register rd, Register rn, Register rm) {
5248    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5249    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5250    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5251    VIXL_ASSERT(allow_macro_instructions_);
5252    VIXL_ASSERT(OutsideITBlock());
5253    MacroEmissionCheckScope guard(this);
5254    ITScope it_scope(this, &cond);
5255    usad8(cond, rd, rn, rm);
5256  }
5257  void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); }
5258
5259  void Usada8(
5260      Condition cond, Register rd, Register rn, Register rm, Register ra) {
5261    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5262    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5263    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5264    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
5265    VIXL_ASSERT(allow_macro_instructions_);
5266    VIXL_ASSERT(OutsideITBlock());
5267    MacroEmissionCheckScope guard(this);
5268    ITScope it_scope(this, &cond);
5269    usada8(cond, rd, rn, rm, ra);
5270  }
5271  void Usada8(Register rd, Register rn, Register rm, Register ra) {
5272    Usada8(al, rd, rn, rm, ra);
5273  }
5274
5275  void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
5276    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5277    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5278    VIXL_ASSERT(allow_macro_instructions_);
5279    VIXL_ASSERT(OutsideITBlock());
5280    MacroEmissionCheckScope guard(this);
5281    ITScope it_scope(this, &cond);
5282    usat(cond, rd, imm, operand);
5283  }
5284  void Usat(Register rd, uint32_t imm, const Operand& operand) {
5285    Usat(al, rd, imm, operand);
5286  }
5287
5288  void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) {
5289    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5290    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5291    VIXL_ASSERT(allow_macro_instructions_);
5292    VIXL_ASSERT(OutsideITBlock());
5293    MacroEmissionCheckScope guard(this);
5294    ITScope it_scope(this, &cond);
5295    usat16(cond, rd, imm, rn);
5296  }
5297  void Usat16(Register rd, uint32_t imm, Register rn) {
5298    Usat16(al, rd, imm, rn);
5299  }
5300
5301  void Usax(Condition cond, Register rd, Register rn, Register rm) {
5302    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5303    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5304    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5305    VIXL_ASSERT(allow_macro_instructions_);
5306    VIXL_ASSERT(OutsideITBlock());
5307    MacroEmissionCheckScope guard(this);
5308    ITScope it_scope(this, &cond);
5309    usax(cond, rd, rn, rm);
5310  }
5311  void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); }
5312
5313  void Usub16(Condition cond, Register rd, Register rn, Register rm) {
5314    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5315    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5316    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5317    VIXL_ASSERT(allow_macro_instructions_);
5318    VIXL_ASSERT(OutsideITBlock());
5319    MacroEmissionCheckScope guard(this);
5320    ITScope it_scope(this, &cond);
5321    usub16(cond, rd, rn, rm);
5322  }
5323  void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); }
5324
5325  void Usub8(Condition cond, Register rd, Register rn, Register rm) {
5326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5327    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5328    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5329    VIXL_ASSERT(allow_macro_instructions_);
5330    VIXL_ASSERT(OutsideITBlock());
5331    MacroEmissionCheckScope guard(this);
5332    ITScope it_scope(this, &cond);
5333    usub8(cond, rd, rn, rm);
5334  }
5335  void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); }
5336
5337  void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
5338    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5340    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5341    VIXL_ASSERT(allow_macro_instructions_);
5342    VIXL_ASSERT(OutsideITBlock());
5343    MacroEmissionCheckScope guard(this);
5344    ITScope it_scope(this, &cond);
5345    uxtab(cond, rd, rn, operand);
5346  }
5347  void Uxtab(Register rd, Register rn, const Operand& operand) {
5348    Uxtab(al, rd, rn, operand);
5349  }
5350
5351  void Uxtab16(Condition cond,
5352               Register rd,
5353               Register rn,
5354               const Operand& operand) {
5355    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5356    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5357    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5358    VIXL_ASSERT(allow_macro_instructions_);
5359    VIXL_ASSERT(OutsideITBlock());
5360    MacroEmissionCheckScope guard(this);
5361    ITScope it_scope(this, &cond);
5362    uxtab16(cond, rd, rn, operand);
5363  }
5364  void Uxtab16(Register rd, Register rn, const Operand& operand) {
5365    Uxtab16(al, rd, rn, operand);
5366  }
5367
5368  void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
5369    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5371    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5372    VIXL_ASSERT(allow_macro_instructions_);
5373    VIXL_ASSERT(OutsideITBlock());
5374    MacroEmissionCheckScope guard(this);
5375    ITScope it_scope(this, &cond);
5376    uxtah(cond, rd, rn, operand);
5377  }
5378  void Uxtah(Register rd, Register rn, const Operand& operand) {
5379    Uxtah(al, rd, rn, operand);
5380  }
5381
5382  void Uxtb(Condition cond, Register rd, const Operand& operand) {
5383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5384    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5385    VIXL_ASSERT(allow_macro_instructions_);
5386    VIXL_ASSERT(OutsideITBlock());
5387    MacroEmissionCheckScope guard(this);
5388    ITScope it_scope(this, &cond);
5389    uxtb(cond, rd, operand);
5390  }
5391  void Uxtb(Register rd, const Operand& operand) { Uxtb(al, rd, operand); }
5392
5393  void Uxtb16(Condition cond, Register rd, const Operand& operand) {
5394    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5395    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5396    VIXL_ASSERT(allow_macro_instructions_);
5397    VIXL_ASSERT(OutsideITBlock());
5398    MacroEmissionCheckScope guard(this);
5399    ITScope it_scope(this, &cond);
5400    uxtb16(cond, rd, operand);
5401  }
5402  void Uxtb16(Register rd, const Operand& operand) { Uxtb16(al, rd, operand); }
5403
5404  void Uxth(Condition cond, Register rd, const Operand& operand) {
5405    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5406    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5407    VIXL_ASSERT(allow_macro_instructions_);
5408    VIXL_ASSERT(OutsideITBlock());
5409    MacroEmissionCheckScope guard(this);
5410    ITScope it_scope(this, &cond);
5411    uxth(cond, rd, operand);
5412  }
5413  void Uxth(Register rd, const Operand& operand) { Uxth(al, rd, operand); }
5414
5415  void Vaba(
5416      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5417    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5418    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5419    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5420    VIXL_ASSERT(allow_macro_instructions_);
5421    VIXL_ASSERT(OutsideITBlock());
5422    MacroEmissionCheckScope guard(this);
5423    ITScope it_scope(this, &cond);
5424    vaba(cond, dt, rd, rn, rm);
5425  }
5426  void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5427    Vaba(al, dt, rd, rn, rm);
5428  }
5429
5430  void Vaba(
5431      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5432    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5433    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5434    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5435    VIXL_ASSERT(allow_macro_instructions_);
5436    VIXL_ASSERT(OutsideITBlock());
5437    MacroEmissionCheckScope guard(this);
5438    ITScope it_scope(this, &cond);
5439    vaba(cond, dt, rd, rn, rm);
5440  }
5441  void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5442    Vaba(al, dt, rd, rn, rm);
5443  }
5444
5445  void Vabal(
5446      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5447    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5448    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5450    VIXL_ASSERT(allow_macro_instructions_);
5451    VIXL_ASSERT(OutsideITBlock());
5452    MacroEmissionCheckScope guard(this);
5453    ITScope it_scope(this, &cond);
5454    vabal(cond, dt, rd, rn, rm);
5455  }
5456  void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5457    Vabal(al, dt, rd, rn, rm);
5458  }
5459
5460  void Vabd(
5461      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5462    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5464    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5465    VIXL_ASSERT(allow_macro_instructions_);
5466    VIXL_ASSERT(OutsideITBlock());
5467    MacroEmissionCheckScope guard(this);
5468    ITScope it_scope(this, &cond);
5469    vabd(cond, dt, rd, rn, rm);
5470  }
5471  void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5472    Vabd(al, dt, rd, rn, rm);
5473  }
5474
5475  void Vabd(
5476      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5477    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5478    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5480    VIXL_ASSERT(allow_macro_instructions_);
5481    VIXL_ASSERT(OutsideITBlock());
5482    MacroEmissionCheckScope guard(this);
5483    ITScope it_scope(this, &cond);
5484    vabd(cond, dt, rd, rn, rm);
5485  }
5486  void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5487    Vabd(al, dt, rd, rn, rm);
5488  }
5489
5490  void Vabdl(
5491      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5493    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5494    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5495    VIXL_ASSERT(allow_macro_instructions_);
5496    VIXL_ASSERT(OutsideITBlock());
5497    MacroEmissionCheckScope guard(this);
5498    ITScope it_scope(this, &cond);
5499    vabdl(cond, dt, rd, rn, rm);
5500  }
5501  void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5502    Vabdl(al, dt, rd, rn, rm);
5503  }
5504
5505  void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
5506    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5508    VIXL_ASSERT(allow_macro_instructions_);
5509    VIXL_ASSERT(OutsideITBlock());
5510    MacroEmissionCheckScope guard(this);
5511    ITScope it_scope(this, &cond);
5512    vabs(cond, dt, rd, rm);
5513  }
5514  void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); }
5515
5516  void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
5517    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5518    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5519    VIXL_ASSERT(allow_macro_instructions_);
5520    VIXL_ASSERT(OutsideITBlock());
5521    MacroEmissionCheckScope guard(this);
5522    ITScope it_scope(this, &cond);
5523    vabs(cond, dt, rd, rm);
5524  }
5525  void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); }
5526
5527  void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) {
5528    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5529    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5530    VIXL_ASSERT(allow_macro_instructions_);
5531    VIXL_ASSERT(OutsideITBlock());
5532    MacroEmissionCheckScope guard(this);
5533    ITScope it_scope(this, &cond);
5534    vabs(cond, dt, rd, rm);
5535  }
5536  void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); }
5537
5538  void Vacge(
5539      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5541    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5542    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5543    VIXL_ASSERT(allow_macro_instructions_);
5544    VIXL_ASSERT(OutsideITBlock());
5545    MacroEmissionCheckScope guard(this);
5546    ITScope it_scope(this, &cond);
5547    vacge(cond, dt, rd, rn, rm);
5548  }
5549  void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5550    Vacge(al, dt, rd, rn, rm);
5551  }
5552
5553  void Vacge(
5554      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5557    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5558    VIXL_ASSERT(allow_macro_instructions_);
5559    VIXL_ASSERT(OutsideITBlock());
5560    MacroEmissionCheckScope guard(this);
5561    ITScope it_scope(this, &cond);
5562    vacge(cond, dt, rd, rn, rm);
5563  }
5564  void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5565    Vacge(al, dt, rd, rn, rm);
5566  }
5567
5568  void Vacgt(
5569      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5571    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5572    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5573    VIXL_ASSERT(allow_macro_instructions_);
5574    VIXL_ASSERT(OutsideITBlock());
5575    MacroEmissionCheckScope guard(this);
5576    ITScope it_scope(this, &cond);
5577    vacgt(cond, dt, rd, rn, rm);
5578  }
5579  void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5580    Vacgt(al, dt, rd, rn, rm);
5581  }
5582
5583  void Vacgt(
5584      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5585    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5586    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5587    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5588    VIXL_ASSERT(allow_macro_instructions_);
5589    VIXL_ASSERT(OutsideITBlock());
5590    MacroEmissionCheckScope guard(this);
5591    ITScope it_scope(this, &cond);
5592    vacgt(cond, dt, rd, rn, rm);
5593  }
5594  void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5595    Vacgt(al, dt, rd, rn, rm);
5596  }
5597
5598  void Vacle(
5599      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5600    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5601    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5602    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5603    VIXL_ASSERT(allow_macro_instructions_);
5604    VIXL_ASSERT(OutsideITBlock());
5605    MacroEmissionCheckScope guard(this);
5606    ITScope it_scope(this, &cond);
5607    vacle(cond, dt, rd, rn, rm);
5608  }
5609  void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5610    Vacle(al, dt, rd, rn, rm);
5611  }
5612
5613  void Vacle(
5614      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5615    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5617    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5618    VIXL_ASSERT(allow_macro_instructions_);
5619    VIXL_ASSERT(OutsideITBlock());
5620    MacroEmissionCheckScope guard(this);
5621    ITScope it_scope(this, &cond);
5622    vacle(cond, dt, rd, rn, rm);
5623  }
5624  void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5625    Vacle(al, dt, rd, rn, rm);
5626  }
5627
5628  void Vaclt(
5629      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5630    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5631    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5632    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5633    VIXL_ASSERT(allow_macro_instructions_);
5634    VIXL_ASSERT(OutsideITBlock());
5635    MacroEmissionCheckScope guard(this);
5636    ITScope it_scope(this, &cond);
5637    vaclt(cond, dt, rd, rn, rm);
5638  }
5639  void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5640    Vaclt(al, dt, rd, rn, rm);
5641  }
5642
5643  void Vaclt(
5644      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5645    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5646    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5647    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5648    VIXL_ASSERT(allow_macro_instructions_);
5649    VIXL_ASSERT(OutsideITBlock());
5650    MacroEmissionCheckScope guard(this);
5651    ITScope it_scope(this, &cond);
5652    vaclt(cond, dt, rd, rn, rm);
5653  }
5654  void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5655    Vaclt(al, dt, rd, rn, rm);
5656  }
5657
5658  void Vadd(
5659      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5662    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5663    VIXL_ASSERT(allow_macro_instructions_);
5664    VIXL_ASSERT(OutsideITBlock());
5665    MacroEmissionCheckScope guard(this);
5666    ITScope it_scope(this, &cond);
5667    vadd(cond, dt, rd, rn, rm);
5668  }
5669  void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5670    Vadd(al, dt, rd, rn, rm);
5671  }
5672
5673  void Vadd(
5674      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5675    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5678    VIXL_ASSERT(allow_macro_instructions_);
5679    VIXL_ASSERT(OutsideITBlock());
5680    MacroEmissionCheckScope guard(this);
5681    ITScope it_scope(this, &cond);
5682    vadd(cond, dt, rd, rn, rm);
5683  }
5684  void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5685    Vadd(al, dt, rd, rn, rm);
5686  }
5687
5688  void Vadd(
5689      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5690    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5691    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5692    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5693    VIXL_ASSERT(allow_macro_instructions_);
5694    VIXL_ASSERT(OutsideITBlock());
5695    MacroEmissionCheckScope guard(this);
5696    ITScope it_scope(this, &cond);
5697    vadd(cond, dt, rd, rn, rm);
5698  }
5699  void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5700    Vadd(al, dt, rd, rn, rm);
5701  }
5702
5703  void Vaddhn(
5704      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5705    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5706    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5708    VIXL_ASSERT(allow_macro_instructions_);
5709    VIXL_ASSERT(OutsideITBlock());
5710    MacroEmissionCheckScope guard(this);
5711    ITScope it_scope(this, &cond);
5712    vaddhn(cond, dt, rd, rn, rm);
5713  }
5714  void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5715    Vaddhn(al, dt, rd, rn, rm);
5716  }
5717
5718  void Vaddl(
5719      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5720    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5721    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5722    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5723    VIXL_ASSERT(allow_macro_instructions_);
5724    VIXL_ASSERT(OutsideITBlock());
5725    MacroEmissionCheckScope guard(this);
5726    ITScope it_scope(this, &cond);
5727    vaddl(cond, dt, rd, rn, rm);
5728  }
5729  void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5730    Vaddl(al, dt, rd, rn, rm);
5731  }
5732
5733  void Vaddw(
5734      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5737    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5738    VIXL_ASSERT(allow_macro_instructions_);
5739    VIXL_ASSERT(OutsideITBlock());
5740    MacroEmissionCheckScope guard(this);
5741    ITScope it_scope(this, &cond);
5742    vaddw(cond, dt, rd, rn, rm);
5743  }
5744  void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5745    Vaddw(al, dt, rd, rn, rm);
5746  }
5747
5748  void Vand(Condition cond,
5749            DataType dt,
5750            DRegister rd,
5751            DRegister rn,
5752            const DOperand& operand) {
5753    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5754    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5755    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5756    VIXL_ASSERT(allow_macro_instructions_);
5757    VIXL_ASSERT(OutsideITBlock());
5758    MacroEmissionCheckScope guard(this);
5759    ITScope it_scope(this, &cond);
5760    vand(cond, dt, rd, rn, operand);
5761  }
5762  void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5763    Vand(al, dt, rd, rn, operand);
5764  }
5765
5766  void Vand(Condition cond,
5767            DataType dt,
5768            QRegister rd,
5769            QRegister rn,
5770            const QOperand& operand) {
5771    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5772    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5773    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5774    VIXL_ASSERT(allow_macro_instructions_);
5775    VIXL_ASSERT(OutsideITBlock());
5776    MacroEmissionCheckScope guard(this);
5777    ITScope it_scope(this, &cond);
5778    vand(cond, dt, rd, rn, operand);
5779  }
5780  void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5781    Vand(al, dt, rd, rn, operand);
5782  }
5783
5784  void Vbic(Condition cond,
5785            DataType dt,
5786            DRegister rd,
5787            DRegister rn,
5788            const DOperand& operand) {
5789    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5790    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5791    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5792    VIXL_ASSERT(allow_macro_instructions_);
5793    VIXL_ASSERT(OutsideITBlock());
5794    MacroEmissionCheckScope guard(this);
5795    ITScope it_scope(this, &cond);
5796    vbic(cond, dt, rd, rn, operand);
5797  }
5798  void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5799    Vbic(al, dt, rd, rn, operand);
5800  }
5801
5802  void Vbic(Condition cond,
5803            DataType dt,
5804            QRegister rd,
5805            QRegister rn,
5806            const QOperand& operand) {
5807    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5808    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5809    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5810    VIXL_ASSERT(allow_macro_instructions_);
5811    VIXL_ASSERT(OutsideITBlock());
5812    MacroEmissionCheckScope guard(this);
5813    ITScope it_scope(this, &cond);
5814    vbic(cond, dt, rd, rn, operand);
5815  }
5816  void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5817    Vbic(al, dt, rd, rn, operand);
5818  }
5819
5820  void Vbif(
5821      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5822    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5823    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5824    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5825    VIXL_ASSERT(allow_macro_instructions_);
5826    VIXL_ASSERT(OutsideITBlock());
5827    MacroEmissionCheckScope guard(this);
5828    ITScope it_scope(this, &cond);
5829    vbif(cond, dt, rd, rn, rm);
5830  }
5831  void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5832    Vbif(al, dt, rd, rn, rm);
5833  }
5834  void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5835    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5836  }
5837  void Vbif(DRegister rd, DRegister rn, DRegister rm) {
5838    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5839  }
5840
5841  void Vbif(
5842      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5844    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5846    VIXL_ASSERT(allow_macro_instructions_);
5847    VIXL_ASSERT(OutsideITBlock());
5848    MacroEmissionCheckScope guard(this);
5849    ITScope it_scope(this, &cond);
5850    vbif(cond, dt, rd, rn, rm);
5851  }
5852  void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5853    Vbif(al, dt, rd, rn, rm);
5854  }
5855  void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5856    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5857  }
5858  void Vbif(QRegister rd, QRegister rn, QRegister rm) {
5859    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5860  }
5861
5862  void Vbit(
5863      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5864    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5865    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5866    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5867    VIXL_ASSERT(allow_macro_instructions_);
5868    VIXL_ASSERT(OutsideITBlock());
5869    MacroEmissionCheckScope guard(this);
5870    ITScope it_scope(this, &cond);
5871    vbit(cond, dt, rd, rn, rm);
5872  }
5873  void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5874    Vbit(al, dt, rd, rn, rm);
5875  }
5876  void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5877    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5878  }
5879  void Vbit(DRegister rd, DRegister rn, DRegister rm) {
5880    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5881  }
5882
5883  void Vbit(
5884      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5885    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5886    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5887    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5888    VIXL_ASSERT(allow_macro_instructions_);
5889    VIXL_ASSERT(OutsideITBlock());
5890    MacroEmissionCheckScope guard(this);
5891    ITScope it_scope(this, &cond);
5892    vbit(cond, dt, rd, rn, rm);
5893  }
5894  void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5895    Vbit(al, dt, rd, rn, rm);
5896  }
5897  void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5898    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5899  }
5900  void Vbit(QRegister rd, QRegister rn, QRegister rm) {
5901    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5902  }
5903
5904  void Vbsl(
5905      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5906    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5907    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5909    VIXL_ASSERT(allow_macro_instructions_);
5910    VIXL_ASSERT(OutsideITBlock());
5911    MacroEmissionCheckScope guard(this);
5912    ITScope it_scope(this, &cond);
5913    vbsl(cond, dt, rd, rn, rm);
5914  }
5915  void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5916    Vbsl(al, dt, rd, rn, rm);
5917  }
5918  void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5919    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5920  }
5921  void Vbsl(DRegister rd, DRegister rn, DRegister rm) {
5922    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5923  }
5924
5925  void Vbsl(
5926      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5927    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5928    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5929    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5930    VIXL_ASSERT(allow_macro_instructions_);
5931    VIXL_ASSERT(OutsideITBlock());
5932    MacroEmissionCheckScope guard(this);
5933    ITScope it_scope(this, &cond);
5934    vbsl(cond, dt, rd, rn, rm);
5935  }
5936  void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5937    Vbsl(al, dt, rd, rn, rm);
5938  }
5939  void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5940    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5941  }
5942  void Vbsl(QRegister rd, QRegister rn, QRegister rm) {
5943    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5944  }
5945
5946  void Vceq(Condition cond,
5947            DataType dt,
5948            DRegister rd,
5949            DRegister rm,
5950            const DOperand& operand) {
5951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5952    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5953    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5954    VIXL_ASSERT(allow_macro_instructions_);
5955    VIXL_ASSERT(OutsideITBlock());
5956    MacroEmissionCheckScope guard(this);
5957    ITScope it_scope(this, &cond);
5958    vceq(cond, dt, rd, rm, operand);
5959  }
5960  void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5961    Vceq(al, dt, rd, rm, operand);
5962  }
5963
5964  void Vceq(Condition cond,
5965            DataType dt,
5966            QRegister rd,
5967            QRegister rm,
5968            const QOperand& operand) {
5969    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5970    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5971    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5972    VIXL_ASSERT(allow_macro_instructions_);
5973    VIXL_ASSERT(OutsideITBlock());
5974    MacroEmissionCheckScope guard(this);
5975    ITScope it_scope(this, &cond);
5976    vceq(cond, dt, rd, rm, operand);
5977  }
5978  void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5979    Vceq(al, dt, rd, rm, operand);
5980  }
5981
5982  void Vceq(
5983      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5984    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5985    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5986    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5987    VIXL_ASSERT(allow_macro_instructions_);
5988    VIXL_ASSERT(OutsideITBlock());
5989    MacroEmissionCheckScope guard(this);
5990    ITScope it_scope(this, &cond);
5991    vceq(cond, dt, rd, rn, rm);
5992  }
5993  void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5994    Vceq(al, dt, rd, rn, rm);
5995  }
5996
5997  void Vceq(
5998      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5999    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6000    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6001    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6002    VIXL_ASSERT(allow_macro_instructions_);
6003    VIXL_ASSERT(OutsideITBlock());
6004    MacroEmissionCheckScope guard(this);
6005    ITScope it_scope(this, &cond);
6006    vceq(cond, dt, rd, rn, rm);
6007  }
6008  void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6009    Vceq(al, dt, rd, rn, rm);
6010  }
6011
6012  void Vcge(Condition cond,
6013            DataType dt,
6014            DRegister rd,
6015            DRegister rm,
6016            const DOperand& operand) {
6017    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6018    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6019    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6020    VIXL_ASSERT(allow_macro_instructions_);
6021    VIXL_ASSERT(OutsideITBlock());
6022    MacroEmissionCheckScope guard(this);
6023    ITScope it_scope(this, &cond);
6024    vcge(cond, dt, rd, rm, operand);
6025  }
6026  void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6027    Vcge(al, dt, rd, rm, operand);
6028  }
6029
6030  void Vcge(Condition cond,
6031            DataType dt,
6032            QRegister rd,
6033            QRegister rm,
6034            const QOperand& operand) {
6035    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6036    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6037    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6038    VIXL_ASSERT(allow_macro_instructions_);
6039    VIXL_ASSERT(OutsideITBlock());
6040    MacroEmissionCheckScope guard(this);
6041    ITScope it_scope(this, &cond);
6042    vcge(cond, dt, rd, rm, operand);
6043  }
6044  void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6045    Vcge(al, dt, rd, rm, operand);
6046  }
6047
6048  void Vcge(
6049      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6050    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6051    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6052    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6053    VIXL_ASSERT(allow_macro_instructions_);
6054    VIXL_ASSERT(OutsideITBlock());
6055    MacroEmissionCheckScope guard(this);
6056    ITScope it_scope(this, &cond);
6057    vcge(cond, dt, rd, rn, rm);
6058  }
6059  void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6060    Vcge(al, dt, rd, rn, rm);
6061  }
6062
6063  void Vcge(
6064      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6066    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6067    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6068    VIXL_ASSERT(allow_macro_instructions_);
6069    VIXL_ASSERT(OutsideITBlock());
6070    MacroEmissionCheckScope guard(this);
6071    ITScope it_scope(this, &cond);
6072    vcge(cond, dt, rd, rn, rm);
6073  }
6074  void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6075    Vcge(al, dt, rd, rn, rm);
6076  }
6077
6078  void Vcgt(Condition cond,
6079            DataType dt,
6080            DRegister rd,
6081            DRegister rm,
6082            const DOperand& operand) {
6083    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6084    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6085    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6086    VIXL_ASSERT(allow_macro_instructions_);
6087    VIXL_ASSERT(OutsideITBlock());
6088    MacroEmissionCheckScope guard(this);
6089    ITScope it_scope(this, &cond);
6090    vcgt(cond, dt, rd, rm, operand);
6091  }
6092  void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6093    Vcgt(al, dt, rd, rm, operand);
6094  }
6095
6096  void Vcgt(Condition cond,
6097            DataType dt,
6098            QRegister rd,
6099            QRegister rm,
6100            const QOperand& operand) {
6101    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6103    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6104    VIXL_ASSERT(allow_macro_instructions_);
6105    VIXL_ASSERT(OutsideITBlock());
6106    MacroEmissionCheckScope guard(this);
6107    ITScope it_scope(this, &cond);
6108    vcgt(cond, dt, rd, rm, operand);
6109  }
6110  void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6111    Vcgt(al, dt, rd, rm, operand);
6112  }
6113
6114  void Vcgt(
6115      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6116    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6117    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6118    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6119    VIXL_ASSERT(allow_macro_instructions_);
6120    VIXL_ASSERT(OutsideITBlock());
6121    MacroEmissionCheckScope guard(this);
6122    ITScope it_scope(this, &cond);
6123    vcgt(cond, dt, rd, rn, rm);
6124  }
6125  void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6126    Vcgt(al, dt, rd, rn, rm);
6127  }
6128
6129  void Vcgt(
6130      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6131    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6132    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6133    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6134    VIXL_ASSERT(allow_macro_instructions_);
6135    VIXL_ASSERT(OutsideITBlock());
6136    MacroEmissionCheckScope guard(this);
6137    ITScope it_scope(this, &cond);
6138    vcgt(cond, dt, rd, rn, rm);
6139  }
6140  void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6141    Vcgt(al, dt, rd, rn, rm);
6142  }
6143
6144  void Vcle(Condition cond,
6145            DataType dt,
6146            DRegister rd,
6147            DRegister rm,
6148            const DOperand& operand) {
6149    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6150    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6151    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6152    VIXL_ASSERT(allow_macro_instructions_);
6153    VIXL_ASSERT(OutsideITBlock());
6154    MacroEmissionCheckScope guard(this);
6155    ITScope it_scope(this, &cond);
6156    vcle(cond, dt, rd, rm, operand);
6157  }
6158  void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6159    Vcle(al, dt, rd, rm, operand);
6160  }
6161
6162  void Vcle(Condition cond,
6163            DataType dt,
6164            QRegister rd,
6165            QRegister rm,
6166            const QOperand& operand) {
6167    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6168    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6169    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6170    VIXL_ASSERT(allow_macro_instructions_);
6171    VIXL_ASSERT(OutsideITBlock());
6172    MacroEmissionCheckScope guard(this);
6173    ITScope it_scope(this, &cond);
6174    vcle(cond, dt, rd, rm, operand);
6175  }
6176  void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6177    Vcle(al, dt, rd, rm, operand);
6178  }
6179
6180  void Vcle(
6181      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6182    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6183    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6184    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6185    VIXL_ASSERT(allow_macro_instructions_);
6186    VIXL_ASSERT(OutsideITBlock());
6187    MacroEmissionCheckScope guard(this);
6188    ITScope it_scope(this, &cond);
6189    vcle(cond, dt, rd, rn, rm);
6190  }
6191  void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6192    Vcle(al, dt, rd, rn, rm);
6193  }
6194
6195  void Vcle(
6196      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6198    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6199    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6200    VIXL_ASSERT(allow_macro_instructions_);
6201    VIXL_ASSERT(OutsideITBlock());
6202    MacroEmissionCheckScope guard(this);
6203    ITScope it_scope(this, &cond);
6204    vcle(cond, dt, rd, rn, rm);
6205  }
6206  void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6207    Vcle(al, dt, rd, rn, rm);
6208  }
6209
6210  void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6212    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6213    VIXL_ASSERT(allow_macro_instructions_);
6214    VIXL_ASSERT(OutsideITBlock());
6215    MacroEmissionCheckScope guard(this);
6216    ITScope it_scope(this, &cond);
6217    vcls(cond, dt, rd, rm);
6218  }
6219  void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); }
6220
6221  void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6224    VIXL_ASSERT(allow_macro_instructions_);
6225    VIXL_ASSERT(OutsideITBlock());
6226    MacroEmissionCheckScope guard(this);
6227    ITScope it_scope(this, &cond);
6228    vcls(cond, dt, rd, rm);
6229  }
6230  void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); }
6231
6232  void Vclt(Condition cond,
6233            DataType dt,
6234            DRegister rd,
6235            DRegister rm,
6236            const DOperand& operand) {
6237    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6238    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6239    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6240    VIXL_ASSERT(allow_macro_instructions_);
6241    VIXL_ASSERT(OutsideITBlock());
6242    MacroEmissionCheckScope guard(this);
6243    ITScope it_scope(this, &cond);
6244    vclt(cond, dt, rd, rm, operand);
6245  }
6246  void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6247    Vclt(al, dt, rd, rm, operand);
6248  }
6249
6250  void Vclt(Condition cond,
6251            DataType dt,
6252            QRegister rd,
6253            QRegister rm,
6254            const QOperand& operand) {
6255    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6256    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6257    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6258    VIXL_ASSERT(allow_macro_instructions_);
6259    VIXL_ASSERT(OutsideITBlock());
6260    MacroEmissionCheckScope guard(this);
6261    ITScope it_scope(this, &cond);
6262    vclt(cond, dt, rd, rm, operand);
6263  }
6264  void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6265    Vclt(al, dt, rd, rm, operand);
6266  }
6267
6268  void Vclt(
6269      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6270    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6272    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6273    VIXL_ASSERT(allow_macro_instructions_);
6274    VIXL_ASSERT(OutsideITBlock());
6275    MacroEmissionCheckScope guard(this);
6276    ITScope it_scope(this, &cond);
6277    vclt(cond, dt, rd, rn, rm);
6278  }
6279  void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6280    Vclt(al, dt, rd, rn, rm);
6281  }
6282
6283  void Vclt(
6284      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6285    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6286    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6287    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6288    VIXL_ASSERT(allow_macro_instructions_);
6289    VIXL_ASSERT(OutsideITBlock());
6290    MacroEmissionCheckScope guard(this);
6291    ITScope it_scope(this, &cond);
6292    vclt(cond, dt, rd, rn, rm);
6293  }
6294  void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6295    Vclt(al, dt, rd, rn, rm);
6296  }
6297
6298  void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6299    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6300    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6301    VIXL_ASSERT(allow_macro_instructions_);
6302    VIXL_ASSERT(OutsideITBlock());
6303    MacroEmissionCheckScope guard(this);
6304    ITScope it_scope(this, &cond);
6305    vclz(cond, dt, rd, rm);
6306  }
6307  void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); }
6308
6309  void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6311    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6312    VIXL_ASSERT(allow_macro_instructions_);
6313    VIXL_ASSERT(OutsideITBlock());
6314    MacroEmissionCheckScope guard(this);
6315    ITScope it_scope(this, &cond);
6316    vclz(cond, dt, rd, rm);
6317  }
6318  void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); }
6319
6320  void Vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6321    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6322    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6323    VIXL_ASSERT(allow_macro_instructions_);
6324    VIXL_ASSERT(OutsideITBlock());
6325    MacroEmissionCheckScope guard(this);
6326    ITScope it_scope(this, &cond);
6327    vcmp(cond, dt, rd, rm);
6328  }
6329  void Vcmp(DataType dt, SRegister rd, SRegister rm) { Vcmp(al, dt, rd, rm); }
6330
6331  void Vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6332    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6333    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6334    VIXL_ASSERT(allow_macro_instructions_);
6335    VIXL_ASSERT(OutsideITBlock());
6336    MacroEmissionCheckScope guard(this);
6337    ITScope it_scope(this, &cond);
6338    vcmp(cond, dt, rd, rm);
6339  }
6340  void Vcmp(DataType dt, DRegister rd, DRegister rm) { Vcmp(al, dt, rd, rm); }
6341
6342  void Vcmp(Condition cond, DataType dt, SRegister rd, double imm) {
6343    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6344    VIXL_ASSERT(allow_macro_instructions_);
6345    VIXL_ASSERT(OutsideITBlock());
6346    MacroEmissionCheckScope guard(this);
6347    ITScope it_scope(this, &cond);
6348    vcmp(cond, dt, rd, imm);
6349  }
6350  void Vcmp(DataType dt, SRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6351
6352  void Vcmp(Condition cond, DataType dt, DRegister rd, double imm) {
6353    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6354    VIXL_ASSERT(allow_macro_instructions_);
6355    VIXL_ASSERT(OutsideITBlock());
6356    MacroEmissionCheckScope guard(this);
6357    ITScope it_scope(this, &cond);
6358    vcmp(cond, dt, rd, imm);
6359  }
6360  void Vcmp(DataType dt, DRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6361
6362  void Vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6363    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6364    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6365    VIXL_ASSERT(allow_macro_instructions_);
6366    VIXL_ASSERT(OutsideITBlock());
6367    MacroEmissionCheckScope guard(this);
6368    ITScope it_scope(this, &cond);
6369    vcmpe(cond, dt, rd, rm);
6370  }
6371  void Vcmpe(DataType dt, SRegister rd, SRegister rm) { Vcmpe(al, dt, rd, rm); }
6372
6373  void Vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6374    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6375    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6376    VIXL_ASSERT(allow_macro_instructions_);
6377    VIXL_ASSERT(OutsideITBlock());
6378    MacroEmissionCheckScope guard(this);
6379    ITScope it_scope(this, &cond);
6380    vcmpe(cond, dt, rd, rm);
6381  }
6382  void Vcmpe(DataType dt, DRegister rd, DRegister rm) { Vcmpe(al, dt, rd, rm); }
6383
6384  void Vcmpe(Condition cond, DataType dt, SRegister rd, double imm) {
6385    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6386    VIXL_ASSERT(allow_macro_instructions_);
6387    VIXL_ASSERT(OutsideITBlock());
6388    MacroEmissionCheckScope guard(this);
6389    ITScope it_scope(this, &cond);
6390    vcmpe(cond, dt, rd, imm);
6391  }
6392  void Vcmpe(DataType dt, SRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6393
6394  void Vcmpe(Condition cond, DataType dt, DRegister rd, double imm) {
6395    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6396    VIXL_ASSERT(allow_macro_instructions_);
6397    VIXL_ASSERT(OutsideITBlock());
6398    MacroEmissionCheckScope guard(this);
6399    ITScope it_scope(this, &cond);
6400    vcmpe(cond, dt, rd, imm);
6401  }
6402  void Vcmpe(DataType dt, DRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6403
6404  void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6405    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6406    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6407    VIXL_ASSERT(allow_macro_instructions_);
6408    VIXL_ASSERT(OutsideITBlock());
6409    MacroEmissionCheckScope guard(this);
6410    ITScope it_scope(this, &cond);
6411    vcnt(cond, dt, rd, rm);
6412  }
6413  void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); }
6414
6415  void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6416    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6417    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6418    VIXL_ASSERT(allow_macro_instructions_);
6419    VIXL_ASSERT(OutsideITBlock());
6420    MacroEmissionCheckScope guard(this);
6421    ITScope it_scope(this, &cond);
6422    vcnt(cond, dt, rd, rm);
6423  }
6424  void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); }
6425
6426  void Vcvt(
6427      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6428    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6429    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6430    VIXL_ASSERT(allow_macro_instructions_);
6431    VIXL_ASSERT(OutsideITBlock());
6432    MacroEmissionCheckScope guard(this);
6433    ITScope it_scope(this, &cond);
6434    vcvt(cond, dt1, dt2, rd, rm);
6435  }
6436  void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6437    Vcvt(al, dt1, dt2, rd, rm);
6438  }
6439
6440  void Vcvt(
6441      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6442    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6443    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6444    VIXL_ASSERT(allow_macro_instructions_);
6445    VIXL_ASSERT(OutsideITBlock());
6446    MacroEmissionCheckScope guard(this);
6447    ITScope it_scope(this, &cond);
6448    vcvt(cond, dt1, dt2, rd, rm);
6449  }
6450  void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6451    Vcvt(al, dt1, dt2, rd, rm);
6452  }
6453
6454  void Vcvt(Condition cond,
6455            DataType dt1,
6456            DataType dt2,
6457            DRegister rd,
6458            DRegister rm,
6459            int32_t fbits) {
6460    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6461    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6462    VIXL_ASSERT(allow_macro_instructions_);
6463    VIXL_ASSERT(OutsideITBlock());
6464    MacroEmissionCheckScope guard(this);
6465    ITScope it_scope(this, &cond);
6466    vcvt(cond, dt1, dt2, rd, rm, fbits);
6467  }
6468  void Vcvt(
6469      DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) {
6470    Vcvt(al, dt1, dt2, rd, rm, fbits);
6471  }
6472
6473  void Vcvt(Condition cond,
6474            DataType dt1,
6475            DataType dt2,
6476            QRegister rd,
6477            QRegister rm,
6478            int32_t fbits) {
6479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6480    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6481    VIXL_ASSERT(allow_macro_instructions_);
6482    VIXL_ASSERT(OutsideITBlock());
6483    MacroEmissionCheckScope guard(this);
6484    ITScope it_scope(this, &cond);
6485    vcvt(cond, dt1, dt2, rd, rm, fbits);
6486  }
6487  void Vcvt(
6488      DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) {
6489    Vcvt(al, dt1, dt2, rd, rm, fbits);
6490  }
6491
6492  void Vcvt(Condition cond,
6493            DataType dt1,
6494            DataType dt2,
6495            SRegister rd,
6496            SRegister rm,
6497            int32_t fbits) {
6498    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6500    VIXL_ASSERT(allow_macro_instructions_);
6501    VIXL_ASSERT(OutsideITBlock());
6502    MacroEmissionCheckScope guard(this);
6503    ITScope it_scope(this, &cond);
6504    vcvt(cond, dt1, dt2, rd, rm, fbits);
6505  }
6506  void Vcvt(
6507      DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) {
6508    Vcvt(al, dt1, dt2, rd, rm, fbits);
6509  }
6510
6511  void Vcvt(
6512      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6513    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6514    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6515    VIXL_ASSERT(allow_macro_instructions_);
6516    VIXL_ASSERT(OutsideITBlock());
6517    MacroEmissionCheckScope guard(this);
6518    ITScope it_scope(this, &cond);
6519    vcvt(cond, dt1, dt2, rd, rm);
6520  }
6521  void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6522    Vcvt(al, dt1, dt2, rd, rm);
6523  }
6524
6525  void Vcvt(
6526      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6528    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6529    VIXL_ASSERT(allow_macro_instructions_);
6530    VIXL_ASSERT(OutsideITBlock());
6531    MacroEmissionCheckScope guard(this);
6532    ITScope it_scope(this, &cond);
6533    vcvt(cond, dt1, dt2, rd, rm);
6534  }
6535  void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6536    Vcvt(al, dt1, dt2, rd, rm);
6537  }
6538
6539  void Vcvt(
6540      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6541    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6542    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6543    VIXL_ASSERT(allow_macro_instructions_);
6544    VIXL_ASSERT(OutsideITBlock());
6545    MacroEmissionCheckScope guard(this);
6546    ITScope it_scope(this, &cond);
6547    vcvt(cond, dt1, dt2, rd, rm);
6548  }
6549  void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6550    Vcvt(al, dt1, dt2, rd, rm);
6551  }
6552
6553  void Vcvt(
6554      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6557    VIXL_ASSERT(allow_macro_instructions_);
6558    VIXL_ASSERT(OutsideITBlock());
6559    MacroEmissionCheckScope guard(this);
6560    ITScope it_scope(this, &cond);
6561    vcvt(cond, dt1, dt2, rd, rm);
6562  }
6563  void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6564    Vcvt(al, dt1, dt2, rd, rm);
6565  }
6566
6567  void Vcvt(
6568      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6571    VIXL_ASSERT(allow_macro_instructions_);
6572    VIXL_ASSERT(OutsideITBlock());
6573    MacroEmissionCheckScope guard(this);
6574    ITScope it_scope(this, &cond);
6575    vcvt(cond, dt1, dt2, rd, rm);
6576  }
6577  void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6578    Vcvt(al, dt1, dt2, rd, rm);
6579  }
6580
6581  void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6583    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6584    VIXL_ASSERT(allow_macro_instructions_);
6585    VIXL_ASSERT(OutsideITBlock());
6586    MacroEmissionCheckScope guard(this);
6587    vcvta(dt1, dt2, rd, rm);
6588  }
6589
6590  void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6591    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6592    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6593    VIXL_ASSERT(allow_macro_instructions_);
6594    VIXL_ASSERT(OutsideITBlock());
6595    MacroEmissionCheckScope guard(this);
6596    vcvta(dt1, dt2, rd, rm);
6597  }
6598
6599  void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6600    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6601    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6602    VIXL_ASSERT(allow_macro_instructions_);
6603    VIXL_ASSERT(OutsideITBlock());
6604    MacroEmissionCheckScope guard(this);
6605    vcvta(dt1, dt2, rd, rm);
6606  }
6607
6608  void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6609    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6610    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6611    VIXL_ASSERT(allow_macro_instructions_);
6612    VIXL_ASSERT(OutsideITBlock());
6613    MacroEmissionCheckScope guard(this);
6614    vcvta(dt1, dt2, rd, rm);
6615  }
6616
6617  void Vcvtb(
6618      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6621    VIXL_ASSERT(allow_macro_instructions_);
6622    VIXL_ASSERT(OutsideITBlock());
6623    MacroEmissionCheckScope guard(this);
6624    ITScope it_scope(this, &cond);
6625    vcvtb(cond, dt1, dt2, rd, rm);
6626  }
6627  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6628    Vcvtb(al, dt1, dt2, rd, rm);
6629  }
6630
6631  void Vcvtb(
6632      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6633    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6635    VIXL_ASSERT(allow_macro_instructions_);
6636    VIXL_ASSERT(OutsideITBlock());
6637    MacroEmissionCheckScope guard(this);
6638    ITScope it_scope(this, &cond);
6639    vcvtb(cond, dt1, dt2, rd, rm);
6640  }
6641  void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6642    Vcvtb(al, dt1, dt2, rd, rm);
6643  }
6644
6645  void Vcvtb(
6646      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6647    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6648    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6649    VIXL_ASSERT(allow_macro_instructions_);
6650    VIXL_ASSERT(OutsideITBlock());
6651    MacroEmissionCheckScope guard(this);
6652    ITScope it_scope(this, &cond);
6653    vcvtb(cond, dt1, dt2, rd, rm);
6654  }
6655  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6656    Vcvtb(al, dt1, dt2, rd, rm);
6657  }
6658
6659  void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6662    VIXL_ASSERT(allow_macro_instructions_);
6663    VIXL_ASSERT(OutsideITBlock());
6664    MacroEmissionCheckScope guard(this);
6665    vcvtm(dt1, dt2, rd, rm);
6666  }
6667
6668  void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6671    VIXL_ASSERT(allow_macro_instructions_);
6672    VIXL_ASSERT(OutsideITBlock());
6673    MacroEmissionCheckScope guard(this);
6674    vcvtm(dt1, dt2, rd, rm);
6675  }
6676
6677  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6678    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6679    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6680    VIXL_ASSERT(allow_macro_instructions_);
6681    VIXL_ASSERT(OutsideITBlock());
6682    MacroEmissionCheckScope guard(this);
6683    vcvtm(dt1, dt2, rd, rm);
6684  }
6685
6686  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6687    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6688    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6689    VIXL_ASSERT(allow_macro_instructions_);
6690    VIXL_ASSERT(OutsideITBlock());
6691    MacroEmissionCheckScope guard(this);
6692    vcvtm(dt1, dt2, rd, rm);
6693  }
6694
6695  void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6696    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6698    VIXL_ASSERT(allow_macro_instructions_);
6699    VIXL_ASSERT(OutsideITBlock());
6700    MacroEmissionCheckScope guard(this);
6701    vcvtn(dt1, dt2, rd, rm);
6702  }
6703
6704  void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6705    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6706    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6707    VIXL_ASSERT(allow_macro_instructions_);
6708    VIXL_ASSERT(OutsideITBlock());
6709    MacroEmissionCheckScope guard(this);
6710    vcvtn(dt1, dt2, rd, rm);
6711  }
6712
6713  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6716    VIXL_ASSERT(allow_macro_instructions_);
6717    VIXL_ASSERT(OutsideITBlock());
6718    MacroEmissionCheckScope guard(this);
6719    vcvtn(dt1, dt2, rd, rm);
6720  }
6721
6722  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6723    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6725    VIXL_ASSERT(allow_macro_instructions_);
6726    VIXL_ASSERT(OutsideITBlock());
6727    MacroEmissionCheckScope guard(this);
6728    vcvtn(dt1, dt2, rd, rm);
6729  }
6730
6731  void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6734    VIXL_ASSERT(allow_macro_instructions_);
6735    VIXL_ASSERT(OutsideITBlock());
6736    MacroEmissionCheckScope guard(this);
6737    vcvtp(dt1, dt2, rd, rm);
6738  }
6739
6740  void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6741    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6742    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6743    VIXL_ASSERT(allow_macro_instructions_);
6744    VIXL_ASSERT(OutsideITBlock());
6745    MacroEmissionCheckScope guard(this);
6746    vcvtp(dt1, dt2, rd, rm);
6747  }
6748
6749  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6750    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6752    VIXL_ASSERT(allow_macro_instructions_);
6753    VIXL_ASSERT(OutsideITBlock());
6754    MacroEmissionCheckScope guard(this);
6755    vcvtp(dt1, dt2, rd, rm);
6756  }
6757
6758  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6759    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6760    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6761    VIXL_ASSERT(allow_macro_instructions_);
6762    VIXL_ASSERT(OutsideITBlock());
6763    MacroEmissionCheckScope guard(this);
6764    vcvtp(dt1, dt2, rd, rm);
6765  }
6766
6767  void Vcvtr(
6768      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6769    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6770    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6771    VIXL_ASSERT(allow_macro_instructions_);
6772    VIXL_ASSERT(OutsideITBlock());
6773    MacroEmissionCheckScope guard(this);
6774    ITScope it_scope(this, &cond);
6775    vcvtr(cond, dt1, dt2, rd, rm);
6776  }
6777  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6778    Vcvtr(al, dt1, dt2, rd, rm);
6779  }
6780
6781  void Vcvtr(
6782      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6783    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6784    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6785    VIXL_ASSERT(allow_macro_instructions_);
6786    VIXL_ASSERT(OutsideITBlock());
6787    MacroEmissionCheckScope guard(this);
6788    ITScope it_scope(this, &cond);
6789    vcvtr(cond, dt1, dt2, rd, rm);
6790  }
6791  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6792    Vcvtr(al, dt1, dt2, rd, rm);
6793  }
6794
6795  void Vcvtt(
6796      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6799    VIXL_ASSERT(allow_macro_instructions_);
6800    VIXL_ASSERT(OutsideITBlock());
6801    MacroEmissionCheckScope guard(this);
6802    ITScope it_scope(this, &cond);
6803    vcvtt(cond, dt1, dt2, rd, rm);
6804  }
6805  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6806    Vcvtt(al, dt1, dt2, rd, rm);
6807  }
6808
6809  void Vcvtt(
6810      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6811    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6813    VIXL_ASSERT(allow_macro_instructions_);
6814    VIXL_ASSERT(OutsideITBlock());
6815    MacroEmissionCheckScope guard(this);
6816    ITScope it_scope(this, &cond);
6817    vcvtt(cond, dt1, dt2, rd, rm);
6818  }
6819  void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6820    Vcvtt(al, dt1, dt2, rd, rm);
6821  }
6822
6823  void Vcvtt(
6824      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6825    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6826    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6827    VIXL_ASSERT(allow_macro_instructions_);
6828    VIXL_ASSERT(OutsideITBlock());
6829    MacroEmissionCheckScope guard(this);
6830    ITScope it_scope(this, &cond);
6831    vcvtt(cond, dt1, dt2, rd, rm);
6832  }
6833  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6834    Vcvtt(al, dt1, dt2, rd, rm);
6835  }
6836
6837  void Vdiv(
6838      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6839    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6840    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6841    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6842    VIXL_ASSERT(allow_macro_instructions_);
6843    VIXL_ASSERT(OutsideITBlock());
6844    MacroEmissionCheckScope guard(this);
6845    ITScope it_scope(this, &cond);
6846    vdiv(cond, dt, rd, rn, rm);
6847  }
6848  void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6849    Vdiv(al, dt, rd, rn, rm);
6850  }
6851
6852  void Vdiv(
6853      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6855    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6856    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6857    VIXL_ASSERT(allow_macro_instructions_);
6858    VIXL_ASSERT(OutsideITBlock());
6859    MacroEmissionCheckScope guard(this);
6860    ITScope it_scope(this, &cond);
6861    vdiv(cond, dt, rd, rn, rm);
6862  }
6863  void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6864    Vdiv(al, dt, rd, rn, rm);
6865  }
6866
6867  void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) {
6868    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6869    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6870    VIXL_ASSERT(allow_macro_instructions_);
6871    VIXL_ASSERT(OutsideITBlock());
6872    MacroEmissionCheckScope guard(this);
6873    ITScope it_scope(this, &cond);
6874    vdup(cond, dt, rd, rt);
6875  }
6876  void Vdup(DataType dt, QRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6877
6878  void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) {
6879    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6880    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6881    VIXL_ASSERT(allow_macro_instructions_);
6882    VIXL_ASSERT(OutsideITBlock());
6883    MacroEmissionCheckScope guard(this);
6884    ITScope it_scope(this, &cond);
6885    vdup(cond, dt, rd, rt);
6886  }
6887  void Vdup(DataType dt, DRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6888
6889  void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) {
6890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6892    VIXL_ASSERT(allow_macro_instructions_);
6893    VIXL_ASSERT(OutsideITBlock());
6894    MacroEmissionCheckScope guard(this);
6895    ITScope it_scope(this, &cond);
6896    vdup(cond, dt, rd, rm);
6897  }
6898  void Vdup(DataType dt, DRegister rd, DRegisterLane rm) {
6899    Vdup(al, dt, rd, rm);
6900  }
6901
6902  void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) {
6903    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6904    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6905    VIXL_ASSERT(allow_macro_instructions_);
6906    VIXL_ASSERT(OutsideITBlock());
6907    MacroEmissionCheckScope guard(this);
6908    ITScope it_scope(this, &cond);
6909    vdup(cond, dt, rd, rm);
6910  }
6911  void Vdup(DataType dt, QRegister rd, DRegisterLane rm) {
6912    Vdup(al, dt, rd, rm);
6913  }
6914
6915  void Veor(
6916      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6917    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6918    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6919    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6920    VIXL_ASSERT(allow_macro_instructions_);
6921    VIXL_ASSERT(OutsideITBlock());
6922    MacroEmissionCheckScope guard(this);
6923    ITScope it_scope(this, &cond);
6924    veor(cond, dt, rd, rn, rm);
6925  }
6926  void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6927    Veor(al, dt, rd, rn, rm);
6928  }
6929  void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6930    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6931  }
6932  void Veor(DRegister rd, DRegister rn, DRegister rm) {
6933    Veor(al, kDataTypeValueNone, rd, rn, rm);
6934  }
6935
6936  void Veor(
6937      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6940    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6941    VIXL_ASSERT(allow_macro_instructions_);
6942    VIXL_ASSERT(OutsideITBlock());
6943    MacroEmissionCheckScope guard(this);
6944    ITScope it_scope(this, &cond);
6945    veor(cond, dt, rd, rn, rm);
6946  }
6947  void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6948    Veor(al, dt, rd, rn, rm);
6949  }
6950  void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
6951    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6952  }
6953  void Veor(QRegister rd, QRegister rn, QRegister rm) {
6954    Veor(al, kDataTypeValueNone, rd, rn, rm);
6955  }
6956
6957  void Vext(Condition cond,
6958            DataType dt,
6959            DRegister rd,
6960            DRegister rn,
6961            DRegister rm,
6962            const DOperand& operand) {
6963    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6965    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6966    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6967    VIXL_ASSERT(allow_macro_instructions_);
6968    VIXL_ASSERT(OutsideITBlock());
6969    MacroEmissionCheckScope guard(this);
6970    ITScope it_scope(this, &cond);
6971    vext(cond, dt, rd, rn, rm, operand);
6972  }
6973  void Vext(DataType dt,
6974            DRegister rd,
6975            DRegister rn,
6976            DRegister rm,
6977            const DOperand& operand) {
6978    Vext(al, dt, rd, rn, rm, operand);
6979  }
6980
6981  void Vext(Condition cond,
6982            DataType dt,
6983            QRegister rd,
6984            QRegister rn,
6985            QRegister rm,
6986            const QOperand& operand) {
6987    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6988    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6989    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6990    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6991    VIXL_ASSERT(allow_macro_instructions_);
6992    VIXL_ASSERT(OutsideITBlock());
6993    MacroEmissionCheckScope guard(this);
6994    ITScope it_scope(this, &cond);
6995    vext(cond, dt, rd, rn, rm, operand);
6996  }
6997  void Vext(DataType dt,
6998            QRegister rd,
6999            QRegister rn,
7000            QRegister rm,
7001            const QOperand& operand) {
7002    Vext(al, dt, rd, rn, rm, operand);
7003  }
7004
7005  void Vfma(
7006      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7007    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7008    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7010    VIXL_ASSERT(allow_macro_instructions_);
7011    VIXL_ASSERT(OutsideITBlock());
7012    MacroEmissionCheckScope guard(this);
7013    ITScope it_scope(this, &cond);
7014    vfma(cond, dt, rd, rn, rm);
7015  }
7016  void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7017    Vfma(al, dt, rd, rn, rm);
7018  }
7019
7020  void Vfma(
7021      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7022    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7023    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7024    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7025    VIXL_ASSERT(allow_macro_instructions_);
7026    VIXL_ASSERT(OutsideITBlock());
7027    MacroEmissionCheckScope guard(this);
7028    ITScope it_scope(this, &cond);
7029    vfma(cond, dt, rd, rn, rm);
7030  }
7031  void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7032    Vfma(al, dt, rd, rn, rm);
7033  }
7034
7035  void Vfma(
7036      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7037    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7038    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7039    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7040    VIXL_ASSERT(allow_macro_instructions_);
7041    VIXL_ASSERT(OutsideITBlock());
7042    MacroEmissionCheckScope guard(this);
7043    ITScope it_scope(this, &cond);
7044    vfma(cond, dt, rd, rn, rm);
7045  }
7046  void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7047    Vfma(al, dt, rd, rn, rm);
7048  }
7049
7050  void Vfms(
7051      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7052    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7053    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7054    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7055    VIXL_ASSERT(allow_macro_instructions_);
7056    VIXL_ASSERT(OutsideITBlock());
7057    MacroEmissionCheckScope guard(this);
7058    ITScope it_scope(this, &cond);
7059    vfms(cond, dt, rd, rn, rm);
7060  }
7061  void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7062    Vfms(al, dt, rd, rn, rm);
7063  }
7064
7065  void Vfms(
7066      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7067    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7068    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7070    VIXL_ASSERT(allow_macro_instructions_);
7071    VIXL_ASSERT(OutsideITBlock());
7072    MacroEmissionCheckScope guard(this);
7073    ITScope it_scope(this, &cond);
7074    vfms(cond, dt, rd, rn, rm);
7075  }
7076  void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7077    Vfms(al, dt, rd, rn, rm);
7078  }
7079
7080  void Vfms(
7081      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7082    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7083    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7084    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7085    VIXL_ASSERT(allow_macro_instructions_);
7086    VIXL_ASSERT(OutsideITBlock());
7087    MacroEmissionCheckScope guard(this);
7088    ITScope it_scope(this, &cond);
7089    vfms(cond, dt, rd, rn, rm);
7090  }
7091  void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7092    Vfms(al, dt, rd, rn, rm);
7093  }
7094
7095  void Vfnma(
7096      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7097    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7098    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7099    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7100    VIXL_ASSERT(allow_macro_instructions_);
7101    VIXL_ASSERT(OutsideITBlock());
7102    MacroEmissionCheckScope guard(this);
7103    ITScope it_scope(this, &cond);
7104    vfnma(cond, dt, rd, rn, rm);
7105  }
7106  void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7107    Vfnma(al, dt, rd, rn, rm);
7108  }
7109
7110  void Vfnma(
7111      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7112    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7113    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7115    VIXL_ASSERT(allow_macro_instructions_);
7116    VIXL_ASSERT(OutsideITBlock());
7117    MacroEmissionCheckScope guard(this);
7118    ITScope it_scope(this, &cond);
7119    vfnma(cond, dt, rd, rn, rm);
7120  }
7121  void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7122    Vfnma(al, dt, rd, rn, rm);
7123  }
7124
7125  void Vfnms(
7126      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7129    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7130    VIXL_ASSERT(allow_macro_instructions_);
7131    VIXL_ASSERT(OutsideITBlock());
7132    MacroEmissionCheckScope guard(this);
7133    ITScope it_scope(this, &cond);
7134    vfnms(cond, dt, rd, rn, rm);
7135  }
7136  void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7137    Vfnms(al, dt, rd, rn, rm);
7138  }
7139
7140  void Vfnms(
7141      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7142    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7143    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7144    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7145    VIXL_ASSERT(allow_macro_instructions_);
7146    VIXL_ASSERT(OutsideITBlock());
7147    MacroEmissionCheckScope guard(this);
7148    ITScope it_scope(this, &cond);
7149    vfnms(cond, dt, rd, rn, rm);
7150  }
7151  void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7152    Vfnms(al, dt, rd, rn, rm);
7153  }
7154
7155  void Vhadd(
7156      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7158    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7159    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7160    VIXL_ASSERT(allow_macro_instructions_);
7161    VIXL_ASSERT(OutsideITBlock());
7162    MacroEmissionCheckScope guard(this);
7163    ITScope it_scope(this, &cond);
7164    vhadd(cond, dt, rd, rn, rm);
7165  }
7166  void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7167    Vhadd(al, dt, rd, rn, rm);
7168  }
7169
7170  void Vhadd(
7171      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7172    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7173    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7174    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7175    VIXL_ASSERT(allow_macro_instructions_);
7176    VIXL_ASSERT(OutsideITBlock());
7177    MacroEmissionCheckScope guard(this);
7178    ITScope it_scope(this, &cond);
7179    vhadd(cond, dt, rd, rn, rm);
7180  }
7181  void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7182    Vhadd(al, dt, rd, rn, rm);
7183  }
7184
7185  void Vhsub(
7186      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7187    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7188    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7189    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7190    VIXL_ASSERT(allow_macro_instructions_);
7191    VIXL_ASSERT(OutsideITBlock());
7192    MacroEmissionCheckScope guard(this);
7193    ITScope it_scope(this, &cond);
7194    vhsub(cond, dt, rd, rn, rm);
7195  }
7196  void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7197    Vhsub(al, dt, rd, rn, rm);
7198  }
7199
7200  void Vhsub(
7201      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7202    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7203    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7204    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7205    VIXL_ASSERT(allow_macro_instructions_);
7206    VIXL_ASSERT(OutsideITBlock());
7207    MacroEmissionCheckScope guard(this);
7208    ITScope it_scope(this, &cond);
7209    vhsub(cond, dt, rd, rn, rm);
7210  }
7211  void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7212    Vhsub(al, dt, rd, rn, rm);
7213  }
7214
7215  void Vld1(Condition cond,
7216            DataType dt,
7217            const NeonRegisterList& nreglist,
7218            const AlignedMemOperand& operand) {
7219    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7220    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7221    VIXL_ASSERT(allow_macro_instructions_);
7222    VIXL_ASSERT(OutsideITBlock());
7223    MacroEmissionCheckScope guard(this);
7224    ITScope it_scope(this, &cond);
7225    vld1(cond, dt, nreglist, operand);
7226  }
7227  void Vld1(DataType dt,
7228            const NeonRegisterList& nreglist,
7229            const AlignedMemOperand& operand) {
7230    Vld1(al, dt, nreglist, operand);
7231  }
7232
7233  void Vld2(Condition cond,
7234            DataType dt,
7235            const NeonRegisterList& nreglist,
7236            const AlignedMemOperand& operand) {
7237    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7238    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7239    VIXL_ASSERT(allow_macro_instructions_);
7240    VIXL_ASSERT(OutsideITBlock());
7241    MacroEmissionCheckScope guard(this);
7242    ITScope it_scope(this, &cond);
7243    vld2(cond, dt, nreglist, operand);
7244  }
7245  void Vld2(DataType dt,
7246            const NeonRegisterList& nreglist,
7247            const AlignedMemOperand& operand) {
7248    Vld2(al, dt, nreglist, operand);
7249  }
7250
7251  void Vld3(Condition cond,
7252            DataType dt,
7253            const NeonRegisterList& nreglist,
7254            const AlignedMemOperand& operand) {
7255    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7256    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7257    VIXL_ASSERT(allow_macro_instructions_);
7258    VIXL_ASSERT(OutsideITBlock());
7259    MacroEmissionCheckScope guard(this);
7260    ITScope it_scope(this, &cond);
7261    vld3(cond, dt, nreglist, operand);
7262  }
7263  void Vld3(DataType dt,
7264            const NeonRegisterList& nreglist,
7265            const AlignedMemOperand& operand) {
7266    Vld3(al, dt, nreglist, operand);
7267  }
7268
7269  void Vld3(Condition cond,
7270            DataType dt,
7271            const NeonRegisterList& nreglist,
7272            const MemOperand& operand) {
7273    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7274    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7275    VIXL_ASSERT(allow_macro_instructions_);
7276    VIXL_ASSERT(OutsideITBlock());
7277    MacroEmissionCheckScope guard(this);
7278    ITScope it_scope(this, &cond);
7279    vld3(cond, dt, nreglist, operand);
7280  }
7281  void Vld3(DataType dt,
7282            const NeonRegisterList& nreglist,
7283            const MemOperand& operand) {
7284    Vld3(al, dt, nreglist, operand);
7285  }
7286
7287  void Vld4(Condition cond,
7288            DataType dt,
7289            const NeonRegisterList& nreglist,
7290            const AlignedMemOperand& operand) {
7291    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7292    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7293    VIXL_ASSERT(allow_macro_instructions_);
7294    VIXL_ASSERT(OutsideITBlock());
7295    MacroEmissionCheckScope guard(this);
7296    ITScope it_scope(this, &cond);
7297    vld4(cond, dt, nreglist, operand);
7298  }
7299  void Vld4(DataType dt,
7300            const NeonRegisterList& nreglist,
7301            const AlignedMemOperand& operand) {
7302    Vld4(al, dt, nreglist, operand);
7303  }
7304
7305  void Vldm(Condition cond,
7306            DataType dt,
7307            Register rn,
7308            WriteBack write_back,
7309            DRegisterList dreglist) {
7310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7311    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7312    VIXL_ASSERT(allow_macro_instructions_);
7313    VIXL_ASSERT(OutsideITBlock());
7314    MacroEmissionCheckScope guard(this);
7315    ITScope it_scope(this, &cond);
7316    vldm(cond, dt, rn, write_back, dreglist);
7317  }
7318  void Vldm(DataType dt,
7319            Register rn,
7320            WriteBack write_back,
7321            DRegisterList dreglist) {
7322    Vldm(al, dt, rn, write_back, dreglist);
7323  }
7324  void Vldm(Condition cond,
7325            Register rn,
7326            WriteBack write_back,
7327            DRegisterList dreglist) {
7328    Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist);
7329  }
7330  void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) {
7331    Vldm(al, kDataTypeValueNone, rn, write_back, dreglist);
7332  }
7333
7334  void Vldm(Condition cond,
7335            DataType dt,
7336            Register rn,
7337            WriteBack write_back,
7338            SRegisterList sreglist) {
7339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7340    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7341    VIXL_ASSERT(allow_macro_instructions_);
7342    VIXL_ASSERT(OutsideITBlock());
7343    MacroEmissionCheckScope guard(this);
7344    ITScope it_scope(this, &cond);
7345    vldm(cond, dt, rn, write_back, sreglist);
7346  }
7347  void Vldm(DataType dt,
7348            Register rn,
7349            WriteBack write_back,
7350            SRegisterList sreglist) {
7351    Vldm(al, dt, rn, write_back, sreglist);
7352  }
7353  void Vldm(Condition cond,
7354            Register rn,
7355            WriteBack write_back,
7356            SRegisterList sreglist) {
7357    Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist);
7358  }
7359  void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) {
7360    Vldm(al, kDataTypeValueNone, rn, write_back, sreglist);
7361  }
7362
7363  void Vldmdb(Condition cond,
7364              DataType dt,
7365              Register rn,
7366              WriteBack write_back,
7367              DRegisterList dreglist) {
7368    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7369    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7370    VIXL_ASSERT(allow_macro_instructions_);
7371    VIXL_ASSERT(OutsideITBlock());
7372    MacroEmissionCheckScope guard(this);
7373    ITScope it_scope(this, &cond);
7374    vldmdb(cond, dt, rn, write_back, dreglist);
7375  }
7376  void Vldmdb(DataType dt,
7377              Register rn,
7378              WriteBack write_back,
7379              DRegisterList dreglist) {
7380    Vldmdb(al, dt, rn, write_back, dreglist);
7381  }
7382  void Vldmdb(Condition cond,
7383              Register rn,
7384              WriteBack write_back,
7385              DRegisterList dreglist) {
7386    Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
7387  }
7388  void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
7389    Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
7390  }
7391
7392  void Vldmdb(Condition cond,
7393              DataType dt,
7394              Register rn,
7395              WriteBack write_back,
7396              SRegisterList sreglist) {
7397    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7398    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7399    VIXL_ASSERT(allow_macro_instructions_);
7400    VIXL_ASSERT(OutsideITBlock());
7401    MacroEmissionCheckScope guard(this);
7402    ITScope it_scope(this, &cond);
7403    vldmdb(cond, dt, rn, write_back, sreglist);
7404  }
7405  void Vldmdb(DataType dt,
7406              Register rn,
7407              WriteBack write_back,
7408              SRegisterList sreglist) {
7409    Vldmdb(al, dt, rn, write_back, sreglist);
7410  }
7411  void Vldmdb(Condition cond,
7412              Register rn,
7413              WriteBack write_back,
7414              SRegisterList sreglist) {
7415    Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
7416  }
7417  void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
7418    Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
7419  }
7420
7421  void Vldmia(Condition cond,
7422              DataType dt,
7423              Register rn,
7424              WriteBack write_back,
7425              DRegisterList dreglist) {
7426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7427    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7428    VIXL_ASSERT(allow_macro_instructions_);
7429    VIXL_ASSERT(OutsideITBlock());
7430    MacroEmissionCheckScope guard(this);
7431    ITScope it_scope(this, &cond);
7432    vldmia(cond, dt, rn, write_back, dreglist);
7433  }
7434  void Vldmia(DataType dt,
7435              Register rn,
7436              WriteBack write_back,
7437              DRegisterList dreglist) {
7438    Vldmia(al, dt, rn, write_back, dreglist);
7439  }
7440  void Vldmia(Condition cond,
7441              Register rn,
7442              WriteBack write_back,
7443              DRegisterList dreglist) {
7444    Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
7445  }
7446  void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
7447    Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist);
7448  }
7449
7450  void Vldmia(Condition cond,
7451              DataType dt,
7452              Register rn,
7453              WriteBack write_back,
7454              SRegisterList sreglist) {
7455    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7456    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7457    VIXL_ASSERT(allow_macro_instructions_);
7458    VIXL_ASSERT(OutsideITBlock());
7459    MacroEmissionCheckScope guard(this);
7460    ITScope it_scope(this, &cond);
7461    vldmia(cond, dt, rn, write_back, sreglist);
7462  }
7463  void Vldmia(DataType dt,
7464              Register rn,
7465              WriteBack write_back,
7466              SRegisterList sreglist) {
7467    Vldmia(al, dt, rn, write_back, sreglist);
7468  }
7469  void Vldmia(Condition cond,
7470              Register rn,
7471              WriteBack write_back,
7472              SRegisterList sreglist) {
7473    Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
7474  }
7475  void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
7476    Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist);
7477  }
7478
7479  void Vldr(Condition cond, DataType dt, DRegister rd, Label* label) {
7480    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7481    VIXL_ASSERT(allow_macro_instructions_);
7482    VIXL_ASSERT(OutsideITBlock());
7483    MacroEmissionCheckScope guard(this);
7484    ITScope it_scope(this, &cond);
7485    vldr(cond, dt, rd, label);
7486  }
7487  void Vldr(DataType dt, DRegister rd, Label* label) {
7488    Vldr(al, dt, rd, label);
7489  }
7490  void Vldr(Condition cond, DRegister rd, Label* label) {
7491    Vldr(cond, Untyped64, rd, label);
7492  }
7493  void Vldr(DRegister rd, Label* label) { Vldr(al, Untyped64, rd, label); }
7494
7495  void Vldr(Condition cond,
7496            DataType dt,
7497            DRegister rd,
7498            const MemOperand& operand) {
7499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7500    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7501    VIXL_ASSERT(allow_macro_instructions_);
7502    VIXL_ASSERT(OutsideITBlock());
7503    MacroEmissionCheckScope guard(this);
7504    ITScope it_scope(this, &cond);
7505    vldr(cond, dt, rd, operand);
7506  }
7507  void Vldr(DataType dt, DRegister rd, const MemOperand& operand) {
7508    Vldr(al, dt, rd, operand);
7509  }
7510  void Vldr(Condition cond, DRegister rd, const MemOperand& operand) {
7511    Vldr(cond, Untyped64, rd, operand);
7512  }
7513  void Vldr(DRegister rd, const MemOperand& operand) {
7514    Vldr(al, Untyped64, rd, operand);
7515  }
7516
7517  void Vldr(Condition cond, DataType dt, SRegister rd, Label* label) {
7518    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7519    VIXL_ASSERT(allow_macro_instructions_);
7520    VIXL_ASSERT(OutsideITBlock());
7521    MacroEmissionCheckScope guard(this);
7522    ITScope it_scope(this, &cond);
7523    vldr(cond, dt, rd, label);
7524  }
7525  void Vldr(DataType dt, SRegister rd, Label* label) {
7526    Vldr(al, dt, rd, label);
7527  }
7528  void Vldr(Condition cond, SRegister rd, Label* label) {
7529    Vldr(cond, Untyped32, rd, label);
7530  }
7531  void Vldr(SRegister rd, Label* label) { Vldr(al, Untyped32, rd, label); }
7532
7533  void Vldr(Condition cond,
7534            DataType dt,
7535            SRegister rd,
7536            const MemOperand& operand) {
7537    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7538    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7539    VIXL_ASSERT(allow_macro_instructions_);
7540    VIXL_ASSERT(OutsideITBlock());
7541    MacroEmissionCheckScope guard(this);
7542    ITScope it_scope(this, &cond);
7543    vldr(cond, dt, rd, operand);
7544  }
7545  void Vldr(DataType dt, SRegister rd, const MemOperand& operand) {
7546    Vldr(al, dt, rd, operand);
7547  }
7548  void Vldr(Condition cond, SRegister rd, const MemOperand& operand) {
7549    Vldr(cond, Untyped32, rd, operand);
7550  }
7551  void Vldr(SRegister rd, const MemOperand& operand) {
7552    Vldr(al, Untyped32, rd, operand);
7553  }
7554
7555  void Vmax(
7556      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7557    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7558    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7559    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7560    VIXL_ASSERT(allow_macro_instructions_);
7561    VIXL_ASSERT(OutsideITBlock());
7562    MacroEmissionCheckScope guard(this);
7563    ITScope it_scope(this, &cond);
7564    vmax(cond, dt, rd, rn, rm);
7565  }
7566  void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7567    Vmax(al, dt, rd, rn, rm);
7568  }
7569
7570  void Vmax(
7571      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7572    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7573    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7574    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7575    VIXL_ASSERT(allow_macro_instructions_);
7576    VIXL_ASSERT(OutsideITBlock());
7577    MacroEmissionCheckScope guard(this);
7578    ITScope it_scope(this, &cond);
7579    vmax(cond, dt, rd, rn, rm);
7580  }
7581  void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7582    Vmax(al, dt, rd, rn, rm);
7583  }
7584
7585  void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7586    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7587    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7589    VIXL_ASSERT(allow_macro_instructions_);
7590    VIXL_ASSERT(OutsideITBlock());
7591    MacroEmissionCheckScope guard(this);
7592    vmaxnm(dt, rd, rn, rm);
7593  }
7594
7595  void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7596    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7599    VIXL_ASSERT(allow_macro_instructions_);
7600    VIXL_ASSERT(OutsideITBlock());
7601    MacroEmissionCheckScope guard(this);
7602    vmaxnm(dt, rd, rn, rm);
7603  }
7604
7605  void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7607    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7608    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7609    VIXL_ASSERT(allow_macro_instructions_);
7610    VIXL_ASSERT(OutsideITBlock());
7611    MacroEmissionCheckScope guard(this);
7612    vmaxnm(dt, rd, rn, rm);
7613  }
7614
7615  void Vmin(
7616      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7617    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7620    VIXL_ASSERT(allow_macro_instructions_);
7621    VIXL_ASSERT(OutsideITBlock());
7622    MacroEmissionCheckScope guard(this);
7623    ITScope it_scope(this, &cond);
7624    vmin(cond, dt, rd, rn, rm);
7625  }
7626  void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7627    Vmin(al, dt, rd, rn, rm);
7628  }
7629
7630  void Vmin(
7631      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7632    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7633    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7635    VIXL_ASSERT(allow_macro_instructions_);
7636    VIXL_ASSERT(OutsideITBlock());
7637    MacroEmissionCheckScope guard(this);
7638    ITScope it_scope(this, &cond);
7639    vmin(cond, dt, rd, rn, rm);
7640  }
7641  void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7642    Vmin(al, dt, rd, rn, rm);
7643  }
7644
7645  void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7646    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7647    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7648    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7649    VIXL_ASSERT(allow_macro_instructions_);
7650    VIXL_ASSERT(OutsideITBlock());
7651    MacroEmissionCheckScope guard(this);
7652    vminnm(dt, rd, rn, rm);
7653  }
7654
7655  void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7656    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7657    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7658    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7659    VIXL_ASSERT(allow_macro_instructions_);
7660    VIXL_ASSERT(OutsideITBlock());
7661    MacroEmissionCheckScope guard(this);
7662    vminnm(dt, rd, rn, rm);
7663  }
7664
7665  void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7666    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7669    VIXL_ASSERT(allow_macro_instructions_);
7670    VIXL_ASSERT(OutsideITBlock());
7671    MacroEmissionCheckScope guard(this);
7672    vminnm(dt, rd, rn, rm);
7673  }
7674
7675  void Vmla(Condition cond,
7676            DataType dt,
7677            DRegister rd,
7678            DRegister rn,
7679            DRegisterLane rm) {
7680    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7681    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7683    VIXL_ASSERT(allow_macro_instructions_);
7684    VIXL_ASSERT(OutsideITBlock());
7685    MacroEmissionCheckScope guard(this);
7686    ITScope it_scope(this, &cond);
7687    vmla(cond, dt, rd, rn, rm);
7688  }
7689  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7690    Vmla(al, dt, rd, rn, rm);
7691  }
7692
7693  void Vmla(Condition cond,
7694            DataType dt,
7695            QRegister rd,
7696            QRegister rn,
7697            DRegisterLane rm) {
7698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7700    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7701    VIXL_ASSERT(allow_macro_instructions_);
7702    VIXL_ASSERT(OutsideITBlock());
7703    MacroEmissionCheckScope guard(this);
7704    ITScope it_scope(this, &cond);
7705    vmla(cond, dt, rd, rn, rm);
7706  }
7707  void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7708    Vmla(al, dt, rd, rn, rm);
7709  }
7710
7711  void Vmla(
7712      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7713    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7716    VIXL_ASSERT(allow_macro_instructions_);
7717    VIXL_ASSERT(OutsideITBlock());
7718    MacroEmissionCheckScope guard(this);
7719    ITScope it_scope(this, &cond);
7720    vmla(cond, dt, rd, rn, rm);
7721  }
7722  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7723    Vmla(al, dt, rd, rn, rm);
7724  }
7725
7726  void Vmla(
7727      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7728    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7729    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7731    VIXL_ASSERT(allow_macro_instructions_);
7732    VIXL_ASSERT(OutsideITBlock());
7733    MacroEmissionCheckScope guard(this);
7734    ITScope it_scope(this, &cond);
7735    vmla(cond, dt, rd, rn, rm);
7736  }
7737  void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7738    Vmla(al, dt, rd, rn, rm);
7739  }
7740
7741  void Vmla(
7742      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7743    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7744    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7745    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7746    VIXL_ASSERT(allow_macro_instructions_);
7747    VIXL_ASSERT(OutsideITBlock());
7748    MacroEmissionCheckScope guard(this);
7749    ITScope it_scope(this, &cond);
7750    vmla(cond, dt, rd, rn, rm);
7751  }
7752  void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7753    Vmla(al, dt, rd, rn, rm);
7754  }
7755
7756  void Vmlal(Condition cond,
7757             DataType dt,
7758             QRegister rd,
7759             DRegister rn,
7760             DRegisterLane rm) {
7761    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7762    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7763    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7764    VIXL_ASSERT(allow_macro_instructions_);
7765    VIXL_ASSERT(OutsideITBlock());
7766    MacroEmissionCheckScope guard(this);
7767    ITScope it_scope(this, &cond);
7768    vmlal(cond, dt, rd, rn, rm);
7769  }
7770  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7771    Vmlal(al, dt, rd, rn, rm);
7772  }
7773
7774  void Vmlal(
7775      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7776    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7777    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7779    VIXL_ASSERT(allow_macro_instructions_);
7780    VIXL_ASSERT(OutsideITBlock());
7781    MacroEmissionCheckScope guard(this);
7782    ITScope it_scope(this, &cond);
7783    vmlal(cond, dt, rd, rn, rm);
7784  }
7785  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7786    Vmlal(al, dt, rd, rn, rm);
7787  }
7788
7789  void Vmls(Condition cond,
7790            DataType dt,
7791            DRegister rd,
7792            DRegister rn,
7793            DRegisterLane rm) {
7794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7797    VIXL_ASSERT(allow_macro_instructions_);
7798    VIXL_ASSERT(OutsideITBlock());
7799    MacroEmissionCheckScope guard(this);
7800    ITScope it_scope(this, &cond);
7801    vmls(cond, dt, rd, rn, rm);
7802  }
7803  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7804    Vmls(al, dt, rd, rn, rm);
7805  }
7806
7807  void Vmls(Condition cond,
7808            DataType dt,
7809            QRegister rd,
7810            QRegister rn,
7811            DRegisterLane rm) {
7812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7813    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7814    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7815    VIXL_ASSERT(allow_macro_instructions_);
7816    VIXL_ASSERT(OutsideITBlock());
7817    MacroEmissionCheckScope guard(this);
7818    ITScope it_scope(this, &cond);
7819    vmls(cond, dt, rd, rn, rm);
7820  }
7821  void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7822    Vmls(al, dt, rd, rn, rm);
7823  }
7824
7825  void Vmls(
7826      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7827    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7829    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7830    VIXL_ASSERT(allow_macro_instructions_);
7831    VIXL_ASSERT(OutsideITBlock());
7832    MacroEmissionCheckScope guard(this);
7833    ITScope it_scope(this, &cond);
7834    vmls(cond, dt, rd, rn, rm);
7835  }
7836  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7837    Vmls(al, dt, rd, rn, rm);
7838  }
7839
7840  void Vmls(
7841      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7844    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7845    VIXL_ASSERT(allow_macro_instructions_);
7846    VIXL_ASSERT(OutsideITBlock());
7847    MacroEmissionCheckScope guard(this);
7848    ITScope it_scope(this, &cond);
7849    vmls(cond, dt, rd, rn, rm);
7850  }
7851  void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7852    Vmls(al, dt, rd, rn, rm);
7853  }
7854
7855  void Vmls(
7856      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7857    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7860    VIXL_ASSERT(allow_macro_instructions_);
7861    VIXL_ASSERT(OutsideITBlock());
7862    MacroEmissionCheckScope guard(this);
7863    ITScope it_scope(this, &cond);
7864    vmls(cond, dt, rd, rn, rm);
7865  }
7866  void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7867    Vmls(al, dt, rd, rn, rm);
7868  }
7869
7870  void Vmlsl(Condition cond,
7871             DataType dt,
7872             QRegister rd,
7873             DRegister rn,
7874             DRegisterLane rm) {
7875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7877    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7878    VIXL_ASSERT(allow_macro_instructions_);
7879    VIXL_ASSERT(OutsideITBlock());
7880    MacroEmissionCheckScope guard(this);
7881    ITScope it_scope(this, &cond);
7882    vmlsl(cond, dt, rd, rn, rm);
7883  }
7884  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7885    Vmlsl(al, dt, rd, rn, rm);
7886  }
7887
7888  void Vmlsl(
7889      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7892    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7893    VIXL_ASSERT(allow_macro_instructions_);
7894    VIXL_ASSERT(OutsideITBlock());
7895    MacroEmissionCheckScope guard(this);
7896    ITScope it_scope(this, &cond);
7897    vmlsl(cond, dt, rd, rn, rm);
7898  }
7899  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7900    Vmlsl(al, dt, rd, rn, rm);
7901  }
7902
7903  void Vmov(Condition cond, Register rt, SRegister rn) {
7904    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7905    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7906    VIXL_ASSERT(allow_macro_instructions_);
7907    VIXL_ASSERT(OutsideITBlock());
7908    MacroEmissionCheckScope guard(this);
7909    ITScope it_scope(this, &cond);
7910    vmov(cond, rt, rn);
7911  }
7912  void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); }
7913
7914  void Vmov(Condition cond, SRegister rn, Register rt) {
7915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7916    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7917    VIXL_ASSERT(allow_macro_instructions_);
7918    VIXL_ASSERT(OutsideITBlock());
7919    MacroEmissionCheckScope guard(this);
7920    ITScope it_scope(this, &cond);
7921    vmov(cond, rn, rt);
7922  }
7923  void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); }
7924
7925  void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) {
7926    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7927    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7928    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7929    VIXL_ASSERT(allow_macro_instructions_);
7930    VIXL_ASSERT(OutsideITBlock());
7931    MacroEmissionCheckScope guard(this);
7932    ITScope it_scope(this, &cond);
7933    vmov(cond, rt, rt2, rm);
7934  }
7935  void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); }
7936
7937  void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) {
7938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7940    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7941    VIXL_ASSERT(allow_macro_instructions_);
7942    VIXL_ASSERT(OutsideITBlock());
7943    MacroEmissionCheckScope guard(this);
7944    ITScope it_scope(this, &cond);
7945    vmov(cond, rm, rt, rt2);
7946  }
7947  void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); }
7948
7949  void Vmov(
7950      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) {
7951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7952    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7953    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7954    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7955    VIXL_ASSERT(allow_macro_instructions_);
7956    VIXL_ASSERT(OutsideITBlock());
7957    MacroEmissionCheckScope guard(this);
7958    ITScope it_scope(this, &cond);
7959    vmov(cond, rt, rt2, rm, rm1);
7960  }
7961  void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) {
7962    Vmov(al, rt, rt2, rm, rm1);
7963  }
7964
7965  void Vmov(
7966      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) {
7967    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7968    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7969    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7970    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7971    VIXL_ASSERT(allow_macro_instructions_);
7972    VIXL_ASSERT(OutsideITBlock());
7973    MacroEmissionCheckScope guard(this);
7974    ITScope it_scope(this, &cond);
7975    vmov(cond, rm, rm1, rt, rt2);
7976  }
7977  void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) {
7978    Vmov(al, rm, rm1, rt, rt2);
7979  }
7980
7981  void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) {
7982    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7983    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7984    VIXL_ASSERT(allow_macro_instructions_);
7985    VIXL_ASSERT(OutsideITBlock());
7986    MacroEmissionCheckScope guard(this);
7987    ITScope it_scope(this, &cond);
7988    vmov(cond, dt, rd, rt);
7989  }
7990  void Vmov(DataType dt, DRegisterLane rd, Register rt) {
7991    Vmov(al, dt, rd, rt);
7992  }
7993  void Vmov(Condition cond, DRegisterLane rd, Register rt) {
7994    Vmov(cond, kDataTypeValueNone, rd, rt);
7995  }
7996  void Vmov(DRegisterLane rd, Register rt) {
7997    Vmov(al, kDataTypeValueNone, rd, rt);
7998  }
7999
8000  void Vmov(Condition cond,
8001            DataType dt,
8002            DRegister rd,
8003            const DOperand& operand) {
8004    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8005    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8006    VIXL_ASSERT(allow_macro_instructions_);
8007    VIXL_ASSERT(OutsideITBlock());
8008    MacroEmissionCheckScope guard(this);
8009    ITScope it_scope(this, &cond);
8010    vmov(cond, dt, rd, operand);
8011  }
8012  void Vmov(DataType dt, DRegister rd, const DOperand& operand) {
8013    Vmov(al, dt, rd, operand);
8014  }
8015
8016  void Vmov(Condition cond,
8017            DataType dt,
8018            QRegister rd,
8019            const QOperand& operand) {
8020    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8021    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8022    VIXL_ASSERT(allow_macro_instructions_);
8023    VIXL_ASSERT(OutsideITBlock());
8024    MacroEmissionCheckScope guard(this);
8025    ITScope it_scope(this, &cond);
8026    vmov(cond, dt, rd, operand);
8027  }
8028  void Vmov(DataType dt, QRegister rd, const QOperand& operand) {
8029    Vmov(al, dt, rd, operand);
8030  }
8031
8032  void Vmov(Condition cond,
8033            DataType dt,
8034            SRegister rd,
8035            const SOperand& operand) {
8036    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8037    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8038    VIXL_ASSERT(allow_macro_instructions_);
8039    VIXL_ASSERT(OutsideITBlock());
8040    MacroEmissionCheckScope guard(this);
8041    ITScope it_scope(this, &cond);
8042    vmov(cond, dt, rd, operand);
8043  }
8044  void Vmov(DataType dt, SRegister rd, const SOperand& operand) {
8045    Vmov(al, dt, rd, operand);
8046  }
8047
8048  void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) {
8049    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8050    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8051    VIXL_ASSERT(allow_macro_instructions_);
8052    VIXL_ASSERT(OutsideITBlock());
8053    MacroEmissionCheckScope guard(this);
8054    ITScope it_scope(this, &cond);
8055    vmov(cond, dt, rt, rn);
8056  }
8057  void Vmov(DataType dt, Register rt, DRegisterLane rn) {
8058    Vmov(al, dt, rt, rn);
8059  }
8060  void Vmov(Condition cond, Register rt, DRegisterLane rn) {
8061    Vmov(cond, kDataTypeValueNone, rt, rn);
8062  }
8063  void Vmov(Register rt, DRegisterLane rn) {
8064    Vmov(al, kDataTypeValueNone, rt, rn);
8065  }
8066
8067  void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) {
8068    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8070    VIXL_ASSERT(allow_macro_instructions_);
8071    VIXL_ASSERT(OutsideITBlock());
8072    MacroEmissionCheckScope guard(this);
8073    ITScope it_scope(this, &cond);
8074    vmovl(cond, dt, rd, rm);
8075  }
8076  void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); }
8077
8078  void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8081    VIXL_ASSERT(allow_macro_instructions_);
8082    VIXL_ASSERT(OutsideITBlock());
8083    MacroEmissionCheckScope guard(this);
8084    ITScope it_scope(this, &cond);
8085    vmovn(cond, dt, rd, rm);
8086  }
8087  void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); }
8088
8089  void Vmrs(Condition cond,
8090            RegisterOrAPSR_nzcv rt,
8091            SpecialFPRegister spec_reg) {
8092    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8093    VIXL_ASSERT(allow_macro_instructions_);
8094    VIXL_ASSERT(OutsideITBlock());
8095    MacroEmissionCheckScope guard(this);
8096    ITScope it_scope(this, &cond);
8097    vmrs(cond, rt, spec_reg);
8098  }
8099  void Vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) {
8100    Vmrs(al, rt, spec_reg);
8101  }
8102
8103  void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) {
8104    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8105    VIXL_ASSERT(allow_macro_instructions_);
8106    VIXL_ASSERT(OutsideITBlock());
8107    MacroEmissionCheckScope guard(this);
8108    ITScope it_scope(this, &cond);
8109    vmsr(cond, spec_reg, rt);
8110  }
8111  void Vmsr(SpecialFPRegister spec_reg, Register rt) { Vmsr(al, spec_reg, rt); }
8112
8113  void Vmul(Condition cond,
8114            DataType dt,
8115            DRegister rd,
8116            DRegister rn,
8117            DRegister dm,
8118            unsigned index) {
8119    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8120    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8121    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8122    VIXL_ASSERT(allow_macro_instructions_);
8123    VIXL_ASSERT(OutsideITBlock());
8124    MacroEmissionCheckScope guard(this);
8125    ITScope it_scope(this, &cond);
8126    vmul(cond, dt, rd, rn, dm, index);
8127  }
8128  void Vmul(
8129      DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) {
8130    Vmul(al, dt, rd, rn, dm, index);
8131  }
8132
8133  void Vmul(Condition cond,
8134            DataType dt,
8135            QRegister rd,
8136            QRegister rn,
8137            DRegister dm,
8138            unsigned index) {
8139    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8140    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8141    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8142    VIXL_ASSERT(allow_macro_instructions_);
8143    VIXL_ASSERT(OutsideITBlock());
8144    MacroEmissionCheckScope guard(this);
8145    ITScope it_scope(this, &cond);
8146    vmul(cond, dt, rd, rn, dm, index);
8147  }
8148  void Vmul(
8149      DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) {
8150    Vmul(al, dt, rd, rn, dm, index);
8151  }
8152
8153  void Vmul(
8154      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8155    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8156    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8158    VIXL_ASSERT(allow_macro_instructions_);
8159    VIXL_ASSERT(OutsideITBlock());
8160    MacroEmissionCheckScope guard(this);
8161    ITScope it_scope(this, &cond);
8162    vmul(cond, dt, rd, rn, rm);
8163  }
8164  void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8165    Vmul(al, dt, rd, rn, rm);
8166  }
8167
8168  void Vmul(
8169      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8170    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8171    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8172    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8173    VIXL_ASSERT(allow_macro_instructions_);
8174    VIXL_ASSERT(OutsideITBlock());
8175    MacroEmissionCheckScope guard(this);
8176    ITScope it_scope(this, &cond);
8177    vmul(cond, dt, rd, rn, rm);
8178  }
8179  void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8180    Vmul(al, dt, rd, rn, rm);
8181  }
8182
8183  void Vmul(
8184      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8185    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8186    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8187    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8188    VIXL_ASSERT(allow_macro_instructions_);
8189    VIXL_ASSERT(OutsideITBlock());
8190    MacroEmissionCheckScope guard(this);
8191    ITScope it_scope(this, &cond);
8192    vmul(cond, dt, rd, rn, rm);
8193  }
8194  void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8195    Vmul(al, dt, rd, rn, rm);
8196  }
8197
8198  void Vmull(Condition cond,
8199             DataType dt,
8200             QRegister rd,
8201             DRegister rn,
8202             DRegister dm,
8203             unsigned index) {
8204    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8205    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8206    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8207    VIXL_ASSERT(allow_macro_instructions_);
8208    VIXL_ASSERT(OutsideITBlock());
8209    MacroEmissionCheckScope guard(this);
8210    ITScope it_scope(this, &cond);
8211    vmull(cond, dt, rd, rn, dm, index);
8212  }
8213  void Vmull(
8214      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8215    Vmull(al, dt, rd, rn, dm, index);
8216  }
8217
8218  void Vmull(
8219      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8220    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8223    VIXL_ASSERT(allow_macro_instructions_);
8224    VIXL_ASSERT(OutsideITBlock());
8225    MacroEmissionCheckScope guard(this);
8226    ITScope it_scope(this, &cond);
8227    vmull(cond, dt, rd, rn, rm);
8228  }
8229  void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8230    Vmull(al, dt, rd, rn, rm);
8231  }
8232
8233  void Vmvn(Condition cond,
8234            DataType dt,
8235            DRegister rd,
8236            const DOperand& operand) {
8237    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8238    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8239    VIXL_ASSERT(allow_macro_instructions_);
8240    VIXL_ASSERT(OutsideITBlock());
8241    MacroEmissionCheckScope guard(this);
8242    ITScope it_scope(this, &cond);
8243    vmvn(cond, dt, rd, operand);
8244  }
8245  void Vmvn(DataType dt, DRegister rd, const DOperand& operand) {
8246    Vmvn(al, dt, rd, operand);
8247  }
8248
8249  void Vmvn(Condition cond,
8250            DataType dt,
8251            QRegister rd,
8252            const QOperand& operand) {
8253    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8254    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8255    VIXL_ASSERT(allow_macro_instructions_);
8256    VIXL_ASSERT(OutsideITBlock());
8257    MacroEmissionCheckScope guard(this);
8258    ITScope it_scope(this, &cond);
8259    vmvn(cond, dt, rd, operand);
8260  }
8261  void Vmvn(DataType dt, QRegister rd, const QOperand& operand) {
8262    Vmvn(al, dt, rd, operand);
8263  }
8264
8265  void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8266    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8267    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8268    VIXL_ASSERT(allow_macro_instructions_);
8269    VIXL_ASSERT(OutsideITBlock());
8270    MacroEmissionCheckScope guard(this);
8271    ITScope it_scope(this, &cond);
8272    vneg(cond, dt, rd, rm);
8273  }
8274  void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); }
8275
8276  void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8277    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8278    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8279    VIXL_ASSERT(allow_macro_instructions_);
8280    VIXL_ASSERT(OutsideITBlock());
8281    MacroEmissionCheckScope guard(this);
8282    ITScope it_scope(this, &cond);
8283    vneg(cond, dt, rd, rm);
8284  }
8285  void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); }
8286
8287  void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) {
8288    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8289    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8290    VIXL_ASSERT(allow_macro_instructions_);
8291    VIXL_ASSERT(OutsideITBlock());
8292    MacroEmissionCheckScope guard(this);
8293    ITScope it_scope(this, &cond);
8294    vneg(cond, dt, rd, rm);
8295  }
8296  void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); }
8297
8298  void Vnmla(
8299      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8300    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8301    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8302    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8303    VIXL_ASSERT(allow_macro_instructions_);
8304    VIXL_ASSERT(OutsideITBlock());
8305    MacroEmissionCheckScope guard(this);
8306    ITScope it_scope(this, &cond);
8307    vnmla(cond, dt, rd, rn, rm);
8308  }
8309  void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8310    Vnmla(al, dt, rd, rn, rm);
8311  }
8312
8313  void Vnmla(
8314      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8315    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8316    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8317    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8318    VIXL_ASSERT(allow_macro_instructions_);
8319    VIXL_ASSERT(OutsideITBlock());
8320    MacroEmissionCheckScope guard(this);
8321    ITScope it_scope(this, &cond);
8322    vnmla(cond, dt, rd, rn, rm);
8323  }
8324  void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8325    Vnmla(al, dt, rd, rn, rm);
8326  }
8327
8328  void Vnmls(
8329      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8330    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8331    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8332    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8333    VIXL_ASSERT(allow_macro_instructions_);
8334    VIXL_ASSERT(OutsideITBlock());
8335    MacroEmissionCheckScope guard(this);
8336    ITScope it_scope(this, &cond);
8337    vnmls(cond, dt, rd, rn, rm);
8338  }
8339  void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8340    Vnmls(al, dt, rd, rn, rm);
8341  }
8342
8343  void Vnmls(
8344      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8345    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8346    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8347    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8348    VIXL_ASSERT(allow_macro_instructions_);
8349    VIXL_ASSERT(OutsideITBlock());
8350    MacroEmissionCheckScope guard(this);
8351    ITScope it_scope(this, &cond);
8352    vnmls(cond, dt, rd, rn, rm);
8353  }
8354  void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8355    Vnmls(al, dt, rd, rn, rm);
8356  }
8357
8358  void Vnmul(
8359      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8360    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8361    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8362    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8363    VIXL_ASSERT(allow_macro_instructions_);
8364    VIXL_ASSERT(OutsideITBlock());
8365    MacroEmissionCheckScope guard(this);
8366    ITScope it_scope(this, &cond);
8367    vnmul(cond, dt, rd, rn, rm);
8368  }
8369  void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8370    Vnmul(al, dt, rd, rn, rm);
8371  }
8372
8373  void Vnmul(
8374      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8375    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8376    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8377    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8378    VIXL_ASSERT(allow_macro_instructions_);
8379    VIXL_ASSERT(OutsideITBlock());
8380    MacroEmissionCheckScope guard(this);
8381    ITScope it_scope(this, &cond);
8382    vnmul(cond, dt, rd, rn, rm);
8383  }
8384  void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8385    Vnmul(al, dt, rd, rn, rm);
8386  }
8387
8388  void Vorn(Condition cond,
8389            DataType dt,
8390            DRegister rd,
8391            DRegister rn,
8392            const DOperand& operand) {
8393    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8394    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8395    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8396    VIXL_ASSERT(allow_macro_instructions_);
8397    VIXL_ASSERT(OutsideITBlock());
8398    MacroEmissionCheckScope guard(this);
8399    ITScope it_scope(this, &cond);
8400    vorn(cond, dt, rd, rn, operand);
8401  }
8402  void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8403    Vorn(al, dt, rd, rn, operand);
8404  }
8405
8406  void Vorn(Condition cond,
8407            DataType dt,
8408            QRegister rd,
8409            QRegister rn,
8410            const QOperand& operand) {
8411    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8412    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8413    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8414    VIXL_ASSERT(allow_macro_instructions_);
8415    VIXL_ASSERT(OutsideITBlock());
8416    MacroEmissionCheckScope guard(this);
8417    ITScope it_scope(this, &cond);
8418    vorn(cond, dt, rd, rn, operand);
8419  }
8420  void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8421    Vorn(al, dt, rd, rn, operand);
8422  }
8423
8424  void Vorr(Condition cond,
8425            DataType dt,
8426            DRegister rd,
8427            DRegister rn,
8428            const DOperand& operand) {
8429    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8430    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8431    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8432    VIXL_ASSERT(allow_macro_instructions_);
8433    VIXL_ASSERT(OutsideITBlock());
8434    MacroEmissionCheckScope guard(this);
8435    ITScope it_scope(this, &cond);
8436    vorr(cond, dt, rd, rn, operand);
8437  }
8438  void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8439    Vorr(al, dt, rd, rn, operand);
8440  }
8441  void Vorr(Condition cond,
8442            DRegister rd,
8443            DRegister rn,
8444            const DOperand& operand) {
8445    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8446  }
8447  void Vorr(DRegister rd, DRegister rn, const DOperand& operand) {
8448    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8449  }
8450
8451  void Vorr(Condition cond,
8452            DataType dt,
8453            QRegister rd,
8454            QRegister rn,
8455            const QOperand& operand) {
8456    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8457    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8458    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8459    VIXL_ASSERT(allow_macro_instructions_);
8460    VIXL_ASSERT(OutsideITBlock());
8461    MacroEmissionCheckScope guard(this);
8462    ITScope it_scope(this, &cond);
8463    vorr(cond, dt, rd, rn, operand);
8464  }
8465  void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8466    Vorr(al, dt, rd, rn, operand);
8467  }
8468  void Vorr(Condition cond,
8469            QRegister rd,
8470            QRegister rn,
8471            const QOperand& operand) {
8472    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8473  }
8474  void Vorr(QRegister rd, QRegister rn, const QOperand& operand) {
8475    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8476  }
8477
8478  void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8480    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8481    VIXL_ASSERT(allow_macro_instructions_);
8482    VIXL_ASSERT(OutsideITBlock());
8483    MacroEmissionCheckScope guard(this);
8484    ITScope it_scope(this, &cond);
8485    vpadal(cond, dt, rd, rm);
8486  }
8487  void Vpadal(DataType dt, DRegister rd, DRegister rm) {
8488    Vpadal(al, dt, rd, rm);
8489  }
8490
8491  void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8493    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8494    VIXL_ASSERT(allow_macro_instructions_);
8495    VIXL_ASSERT(OutsideITBlock());
8496    MacroEmissionCheckScope guard(this);
8497    ITScope it_scope(this, &cond);
8498    vpadal(cond, dt, rd, rm);
8499  }
8500  void Vpadal(DataType dt, QRegister rd, QRegister rm) {
8501    Vpadal(al, dt, rd, rm);
8502  }
8503
8504  void Vpadd(
8505      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8506    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8508    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8509    VIXL_ASSERT(allow_macro_instructions_);
8510    VIXL_ASSERT(OutsideITBlock());
8511    MacroEmissionCheckScope guard(this);
8512    ITScope it_scope(this, &cond);
8513    vpadd(cond, dt, rd, rn, rm);
8514  }
8515  void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8516    Vpadd(al, dt, rd, rn, rm);
8517  }
8518
8519  void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8520    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8521    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8522    VIXL_ASSERT(allow_macro_instructions_);
8523    VIXL_ASSERT(OutsideITBlock());
8524    MacroEmissionCheckScope guard(this);
8525    ITScope it_scope(this, &cond);
8526    vpaddl(cond, dt, rd, rm);
8527  }
8528  void Vpaddl(DataType dt, DRegister rd, DRegister rm) {
8529    Vpaddl(al, dt, rd, rm);
8530  }
8531
8532  void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8533    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8534    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8535    VIXL_ASSERT(allow_macro_instructions_);
8536    VIXL_ASSERT(OutsideITBlock());
8537    MacroEmissionCheckScope guard(this);
8538    ITScope it_scope(this, &cond);
8539    vpaddl(cond, dt, rd, rm);
8540  }
8541  void Vpaddl(DataType dt, QRegister rd, QRegister rm) {
8542    Vpaddl(al, dt, rd, rm);
8543  }
8544
8545  void Vpmax(
8546      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8547    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8548    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8549    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8550    VIXL_ASSERT(allow_macro_instructions_);
8551    VIXL_ASSERT(OutsideITBlock());
8552    MacroEmissionCheckScope guard(this);
8553    ITScope it_scope(this, &cond);
8554    vpmax(cond, dt, rd, rn, rm);
8555  }
8556  void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8557    Vpmax(al, dt, rd, rn, rm);
8558  }
8559
8560  void Vpmin(
8561      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8562    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8563    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8564    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8565    VIXL_ASSERT(allow_macro_instructions_);
8566    VIXL_ASSERT(OutsideITBlock());
8567    MacroEmissionCheckScope guard(this);
8568    ITScope it_scope(this, &cond);
8569    vpmin(cond, dt, rd, rn, rm);
8570  }
8571  void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8572    Vpmin(al, dt, rd, rn, rm);
8573  }
8574
8575  void Vpop(Condition cond, DataType dt, DRegisterList dreglist) {
8576    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8577    VIXL_ASSERT(allow_macro_instructions_);
8578    VIXL_ASSERT(OutsideITBlock());
8579    MacroEmissionCheckScope guard(this);
8580    ITScope it_scope(this, &cond);
8581    vpop(cond, dt, dreglist);
8582  }
8583  void Vpop(DataType dt, DRegisterList dreglist) { Vpop(al, dt, dreglist); }
8584  void Vpop(Condition cond, DRegisterList dreglist) {
8585    Vpop(cond, kDataTypeValueNone, dreglist);
8586  }
8587  void Vpop(DRegisterList dreglist) { Vpop(al, kDataTypeValueNone, dreglist); }
8588
8589  void Vpop(Condition cond, DataType dt, SRegisterList sreglist) {
8590    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8591    VIXL_ASSERT(allow_macro_instructions_);
8592    VIXL_ASSERT(OutsideITBlock());
8593    MacroEmissionCheckScope guard(this);
8594    ITScope it_scope(this, &cond);
8595    vpop(cond, dt, sreglist);
8596  }
8597  void Vpop(DataType dt, SRegisterList sreglist) { Vpop(al, dt, sreglist); }
8598  void Vpop(Condition cond, SRegisterList sreglist) {
8599    Vpop(cond, kDataTypeValueNone, sreglist);
8600  }
8601  void Vpop(SRegisterList sreglist) { Vpop(al, kDataTypeValueNone, sreglist); }
8602
8603  void Vpush(Condition cond, DataType dt, DRegisterList dreglist) {
8604    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8605    VIXL_ASSERT(allow_macro_instructions_);
8606    VIXL_ASSERT(OutsideITBlock());
8607    MacroEmissionCheckScope guard(this);
8608    ITScope it_scope(this, &cond);
8609    vpush(cond, dt, dreglist);
8610  }
8611  void Vpush(DataType dt, DRegisterList dreglist) { Vpush(al, dt, dreglist); }
8612  void Vpush(Condition cond, DRegisterList dreglist) {
8613    Vpush(cond, kDataTypeValueNone, dreglist);
8614  }
8615  void Vpush(DRegisterList dreglist) {
8616    Vpush(al, kDataTypeValueNone, dreglist);
8617  }
8618
8619  void Vpush(Condition cond, DataType dt, SRegisterList sreglist) {
8620    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8621    VIXL_ASSERT(allow_macro_instructions_);
8622    VIXL_ASSERT(OutsideITBlock());
8623    MacroEmissionCheckScope guard(this);
8624    ITScope it_scope(this, &cond);
8625    vpush(cond, dt, sreglist);
8626  }
8627  void Vpush(DataType dt, SRegisterList sreglist) { Vpush(al, dt, sreglist); }
8628  void Vpush(Condition cond, SRegisterList sreglist) {
8629    Vpush(cond, kDataTypeValueNone, sreglist);
8630  }
8631  void Vpush(SRegisterList sreglist) {
8632    Vpush(al, kDataTypeValueNone, sreglist);
8633  }
8634
8635  void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8636    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8637    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8638    VIXL_ASSERT(allow_macro_instructions_);
8639    VIXL_ASSERT(OutsideITBlock());
8640    MacroEmissionCheckScope guard(this);
8641    ITScope it_scope(this, &cond);
8642    vqabs(cond, dt, rd, rm);
8643  }
8644  void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); }
8645
8646  void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8647    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8648    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8649    VIXL_ASSERT(allow_macro_instructions_);
8650    VIXL_ASSERT(OutsideITBlock());
8651    MacroEmissionCheckScope guard(this);
8652    ITScope it_scope(this, &cond);
8653    vqabs(cond, dt, rd, rm);
8654  }
8655  void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); }
8656
8657  void Vqadd(
8658      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8659    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8662    VIXL_ASSERT(allow_macro_instructions_);
8663    VIXL_ASSERT(OutsideITBlock());
8664    MacroEmissionCheckScope guard(this);
8665    ITScope it_scope(this, &cond);
8666    vqadd(cond, dt, rd, rn, rm);
8667  }
8668  void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8669    Vqadd(al, dt, rd, rn, rm);
8670  }
8671
8672  void Vqadd(
8673      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8674    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8675    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8677    VIXL_ASSERT(allow_macro_instructions_);
8678    VIXL_ASSERT(OutsideITBlock());
8679    MacroEmissionCheckScope guard(this);
8680    ITScope it_scope(this, &cond);
8681    vqadd(cond, dt, rd, rn, rm);
8682  }
8683  void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8684    Vqadd(al, dt, rd, rn, rm);
8685  }
8686
8687  void Vqdmlal(
8688      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8689    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8690    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8691    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8692    VIXL_ASSERT(allow_macro_instructions_);
8693    VIXL_ASSERT(OutsideITBlock());
8694    MacroEmissionCheckScope guard(this);
8695    ITScope it_scope(this, &cond);
8696    vqdmlal(cond, dt, rd, rn, rm);
8697  }
8698  void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8699    Vqdmlal(al, dt, rd, rn, rm);
8700  }
8701
8702  void Vqdmlal(Condition cond,
8703               DataType dt,
8704               QRegister rd,
8705               DRegister rn,
8706               DRegister dm,
8707               unsigned index) {
8708    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8709    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8710    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8711    VIXL_ASSERT(allow_macro_instructions_);
8712    VIXL_ASSERT(OutsideITBlock());
8713    MacroEmissionCheckScope guard(this);
8714    ITScope it_scope(this, &cond);
8715    vqdmlal(cond, dt, rd, rn, dm, index);
8716  }
8717  void Vqdmlal(
8718      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8719    Vqdmlal(al, dt, rd, rn, dm, index);
8720  }
8721
8722  void Vqdmlsl(
8723      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8725    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8726    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8727    VIXL_ASSERT(allow_macro_instructions_);
8728    VIXL_ASSERT(OutsideITBlock());
8729    MacroEmissionCheckScope guard(this);
8730    ITScope it_scope(this, &cond);
8731    vqdmlsl(cond, dt, rd, rn, rm);
8732  }
8733  void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8734    Vqdmlsl(al, dt, rd, rn, rm);
8735  }
8736
8737  void Vqdmlsl(Condition cond,
8738               DataType dt,
8739               QRegister rd,
8740               DRegister rn,
8741               DRegister dm,
8742               unsigned index) {
8743    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8744    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8745    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8746    VIXL_ASSERT(allow_macro_instructions_);
8747    VIXL_ASSERT(OutsideITBlock());
8748    MacroEmissionCheckScope guard(this);
8749    ITScope it_scope(this, &cond);
8750    vqdmlsl(cond, dt, rd, rn, dm, index);
8751  }
8752  void Vqdmlsl(
8753      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8754    Vqdmlsl(al, dt, rd, rn, dm, index);
8755  }
8756
8757  void Vqdmulh(
8758      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8759    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8760    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8761    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8762    VIXL_ASSERT(allow_macro_instructions_);
8763    VIXL_ASSERT(OutsideITBlock());
8764    MacroEmissionCheckScope guard(this);
8765    ITScope it_scope(this, &cond);
8766    vqdmulh(cond, dt, rd, rn, rm);
8767  }
8768  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8769    Vqdmulh(al, dt, rd, rn, rm);
8770  }
8771
8772  void Vqdmulh(
8773      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8774    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8775    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8776    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8777    VIXL_ASSERT(allow_macro_instructions_);
8778    VIXL_ASSERT(OutsideITBlock());
8779    MacroEmissionCheckScope guard(this);
8780    ITScope it_scope(this, &cond);
8781    vqdmulh(cond, dt, rd, rn, rm);
8782  }
8783  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8784    Vqdmulh(al, dt, rd, rn, rm);
8785  }
8786
8787  void Vqdmulh(Condition cond,
8788               DataType dt,
8789               DRegister rd,
8790               DRegister rn,
8791               DRegisterLane rm) {
8792    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8793    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8795    VIXL_ASSERT(allow_macro_instructions_);
8796    VIXL_ASSERT(OutsideITBlock());
8797    MacroEmissionCheckScope guard(this);
8798    ITScope it_scope(this, &cond);
8799    vqdmulh(cond, dt, rd, rn, rm);
8800  }
8801  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8802    Vqdmulh(al, dt, rd, rn, rm);
8803  }
8804
8805  void Vqdmulh(Condition cond,
8806               DataType dt,
8807               QRegister rd,
8808               QRegister rn,
8809               DRegisterLane rm) {
8810    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8811    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8813    VIXL_ASSERT(allow_macro_instructions_);
8814    VIXL_ASSERT(OutsideITBlock());
8815    MacroEmissionCheckScope guard(this);
8816    ITScope it_scope(this, &cond);
8817    vqdmulh(cond, dt, rd, rn, rm);
8818  }
8819  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8820    Vqdmulh(al, dt, rd, rn, rm);
8821  }
8822
8823  void Vqdmull(
8824      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8825    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8826    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8827    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8828    VIXL_ASSERT(allow_macro_instructions_);
8829    VIXL_ASSERT(OutsideITBlock());
8830    MacroEmissionCheckScope guard(this);
8831    ITScope it_scope(this, &cond);
8832    vqdmull(cond, dt, rd, rn, rm);
8833  }
8834  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8835    Vqdmull(al, dt, rd, rn, rm);
8836  }
8837
8838  void Vqdmull(Condition cond,
8839               DataType dt,
8840               QRegister rd,
8841               DRegister rn,
8842               DRegisterLane rm) {
8843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8844    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8846    VIXL_ASSERT(allow_macro_instructions_);
8847    VIXL_ASSERT(OutsideITBlock());
8848    MacroEmissionCheckScope guard(this);
8849    ITScope it_scope(this, &cond);
8850    vqdmull(cond, dt, rd, rn, rm);
8851  }
8852  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
8853    Vqdmull(al, dt, rd, rn, rm);
8854  }
8855
8856  void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8857    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8859    VIXL_ASSERT(allow_macro_instructions_);
8860    VIXL_ASSERT(OutsideITBlock());
8861    MacroEmissionCheckScope guard(this);
8862    ITScope it_scope(this, &cond);
8863    vqmovn(cond, dt, rd, rm);
8864  }
8865  void Vqmovn(DataType dt, DRegister rd, QRegister rm) {
8866    Vqmovn(al, dt, rd, rm);
8867  }
8868
8869  void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8870    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8871    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8872    VIXL_ASSERT(allow_macro_instructions_);
8873    VIXL_ASSERT(OutsideITBlock());
8874    MacroEmissionCheckScope guard(this);
8875    ITScope it_scope(this, &cond);
8876    vqmovun(cond, dt, rd, rm);
8877  }
8878  void Vqmovun(DataType dt, DRegister rd, QRegister rm) {
8879    Vqmovun(al, dt, rd, rm);
8880  }
8881
8882  void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8883    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8884    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8885    VIXL_ASSERT(allow_macro_instructions_);
8886    VIXL_ASSERT(OutsideITBlock());
8887    MacroEmissionCheckScope guard(this);
8888    ITScope it_scope(this, &cond);
8889    vqneg(cond, dt, rd, rm);
8890  }
8891  void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); }
8892
8893  void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8894    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8895    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8896    VIXL_ASSERT(allow_macro_instructions_);
8897    VIXL_ASSERT(OutsideITBlock());
8898    MacroEmissionCheckScope guard(this);
8899    ITScope it_scope(this, &cond);
8900    vqneg(cond, dt, rd, rm);
8901  }
8902  void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); }
8903
8904  void Vqrdmulh(
8905      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8906    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8907    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8909    VIXL_ASSERT(allow_macro_instructions_);
8910    VIXL_ASSERT(OutsideITBlock());
8911    MacroEmissionCheckScope guard(this);
8912    ITScope it_scope(this, &cond);
8913    vqrdmulh(cond, dt, rd, rn, rm);
8914  }
8915  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8916    Vqrdmulh(al, dt, rd, rn, rm);
8917  }
8918
8919  void Vqrdmulh(
8920      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8921    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8922    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8923    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8924    VIXL_ASSERT(allow_macro_instructions_);
8925    VIXL_ASSERT(OutsideITBlock());
8926    MacroEmissionCheckScope guard(this);
8927    ITScope it_scope(this, &cond);
8928    vqrdmulh(cond, dt, rd, rn, rm);
8929  }
8930  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8931    Vqrdmulh(al, dt, rd, rn, rm);
8932  }
8933
8934  void Vqrdmulh(Condition cond,
8935                DataType dt,
8936                DRegister rd,
8937                DRegister rn,
8938                DRegisterLane rm) {
8939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8940    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8941    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8942    VIXL_ASSERT(allow_macro_instructions_);
8943    VIXL_ASSERT(OutsideITBlock());
8944    MacroEmissionCheckScope guard(this);
8945    ITScope it_scope(this, &cond);
8946    vqrdmulh(cond, dt, rd, rn, rm);
8947  }
8948  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8949    Vqrdmulh(al, dt, rd, rn, rm);
8950  }
8951
8952  void Vqrdmulh(Condition cond,
8953                DataType dt,
8954                QRegister rd,
8955                QRegister rn,
8956                DRegisterLane rm) {
8957    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8958    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8959    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8960    VIXL_ASSERT(allow_macro_instructions_);
8961    VIXL_ASSERT(OutsideITBlock());
8962    MacroEmissionCheckScope guard(this);
8963    ITScope it_scope(this, &cond);
8964    vqrdmulh(cond, dt, rd, rn, rm);
8965  }
8966  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8967    Vqrdmulh(al, dt, rd, rn, rm);
8968  }
8969
8970  void Vqrshl(
8971      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8972    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8973    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8975    VIXL_ASSERT(allow_macro_instructions_);
8976    VIXL_ASSERT(OutsideITBlock());
8977    MacroEmissionCheckScope guard(this);
8978    ITScope it_scope(this, &cond);
8979    vqrshl(cond, dt, rd, rm, rn);
8980  }
8981  void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8982    Vqrshl(al, dt, rd, rm, rn);
8983  }
8984
8985  void Vqrshl(
8986      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8987    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8988    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8989    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8990    VIXL_ASSERT(allow_macro_instructions_);
8991    VIXL_ASSERT(OutsideITBlock());
8992    MacroEmissionCheckScope guard(this);
8993    ITScope it_scope(this, &cond);
8994    vqrshl(cond, dt, rd, rm, rn);
8995  }
8996  void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8997    Vqrshl(al, dt, rd, rm, rn);
8998  }
8999
9000  void Vqrshrn(Condition cond,
9001               DataType dt,
9002               DRegister rd,
9003               QRegister rm,
9004               const QOperand& operand) {
9005    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9006    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9007    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9008    VIXL_ASSERT(allow_macro_instructions_);
9009    VIXL_ASSERT(OutsideITBlock());
9010    MacroEmissionCheckScope guard(this);
9011    ITScope it_scope(this, &cond);
9012    vqrshrn(cond, dt, rd, rm, operand);
9013  }
9014  void Vqrshrn(DataType dt,
9015               DRegister rd,
9016               QRegister rm,
9017               const QOperand& operand) {
9018    Vqrshrn(al, dt, rd, rm, operand);
9019  }
9020
9021  void Vqrshrun(Condition cond,
9022                DataType dt,
9023                DRegister rd,
9024                QRegister rm,
9025                const QOperand& operand) {
9026    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9027    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9028    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9029    VIXL_ASSERT(allow_macro_instructions_);
9030    VIXL_ASSERT(OutsideITBlock());
9031    MacroEmissionCheckScope guard(this);
9032    ITScope it_scope(this, &cond);
9033    vqrshrun(cond, dt, rd, rm, operand);
9034  }
9035  void Vqrshrun(DataType dt,
9036                DRegister rd,
9037                QRegister rm,
9038                const QOperand& operand) {
9039    Vqrshrun(al, dt, rd, rm, operand);
9040  }
9041
9042  void Vqshl(Condition cond,
9043             DataType dt,
9044             DRegister rd,
9045             DRegister rm,
9046             const DOperand& operand) {
9047    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9048    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9049    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9050    VIXL_ASSERT(allow_macro_instructions_);
9051    VIXL_ASSERT(OutsideITBlock());
9052    MacroEmissionCheckScope guard(this);
9053    ITScope it_scope(this, &cond);
9054    vqshl(cond, dt, rd, rm, operand);
9055  }
9056  void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9057    Vqshl(al, dt, rd, rm, operand);
9058  }
9059
9060  void Vqshl(Condition cond,
9061             DataType dt,
9062             QRegister rd,
9063             QRegister rm,
9064             const QOperand& operand) {
9065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9066    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9067    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9068    VIXL_ASSERT(allow_macro_instructions_);
9069    VIXL_ASSERT(OutsideITBlock());
9070    MacroEmissionCheckScope guard(this);
9071    ITScope it_scope(this, &cond);
9072    vqshl(cond, dt, rd, rm, operand);
9073  }
9074  void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9075    Vqshl(al, dt, rd, rm, operand);
9076  }
9077
9078  void Vqshlu(Condition cond,
9079              DataType dt,
9080              DRegister rd,
9081              DRegister rm,
9082              const DOperand& operand) {
9083    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9084    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9085    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9086    VIXL_ASSERT(allow_macro_instructions_);
9087    VIXL_ASSERT(OutsideITBlock());
9088    MacroEmissionCheckScope guard(this);
9089    ITScope it_scope(this, &cond);
9090    vqshlu(cond, dt, rd, rm, operand);
9091  }
9092  void Vqshlu(DataType dt,
9093              DRegister rd,
9094              DRegister rm,
9095              const DOperand& operand) {
9096    Vqshlu(al, dt, rd, rm, operand);
9097  }
9098
9099  void Vqshlu(Condition cond,
9100              DataType dt,
9101              QRegister rd,
9102              QRegister rm,
9103              const QOperand& operand) {
9104    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9105    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9106    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9107    VIXL_ASSERT(allow_macro_instructions_);
9108    VIXL_ASSERT(OutsideITBlock());
9109    MacroEmissionCheckScope guard(this);
9110    ITScope it_scope(this, &cond);
9111    vqshlu(cond, dt, rd, rm, operand);
9112  }
9113  void Vqshlu(DataType dt,
9114              QRegister rd,
9115              QRegister rm,
9116              const QOperand& operand) {
9117    Vqshlu(al, dt, rd, rm, operand);
9118  }
9119
9120  void Vqshrn(Condition cond,
9121              DataType dt,
9122              DRegister rd,
9123              QRegister rm,
9124              const QOperand& operand) {
9125    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9126    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9127    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9128    VIXL_ASSERT(allow_macro_instructions_);
9129    VIXL_ASSERT(OutsideITBlock());
9130    MacroEmissionCheckScope guard(this);
9131    ITScope it_scope(this, &cond);
9132    vqshrn(cond, dt, rd, rm, operand);
9133  }
9134  void Vqshrn(DataType dt,
9135              DRegister rd,
9136              QRegister rm,
9137              const QOperand& operand) {
9138    Vqshrn(al, dt, rd, rm, operand);
9139  }
9140
9141  void Vqshrun(Condition cond,
9142               DataType dt,
9143               DRegister rd,
9144               QRegister rm,
9145               const QOperand& operand) {
9146    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9147    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9148    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9149    VIXL_ASSERT(allow_macro_instructions_);
9150    VIXL_ASSERT(OutsideITBlock());
9151    MacroEmissionCheckScope guard(this);
9152    ITScope it_scope(this, &cond);
9153    vqshrun(cond, dt, rd, rm, operand);
9154  }
9155  void Vqshrun(DataType dt,
9156               DRegister rd,
9157               QRegister rm,
9158               const QOperand& operand) {
9159    Vqshrun(al, dt, rd, rm, operand);
9160  }
9161
9162  void Vqsub(
9163      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9164    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9165    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9166    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9167    VIXL_ASSERT(allow_macro_instructions_);
9168    VIXL_ASSERT(OutsideITBlock());
9169    MacroEmissionCheckScope guard(this);
9170    ITScope it_scope(this, &cond);
9171    vqsub(cond, dt, rd, rn, rm);
9172  }
9173  void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9174    Vqsub(al, dt, rd, rn, rm);
9175  }
9176
9177  void Vqsub(
9178      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9179    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9180    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9181    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9182    VIXL_ASSERT(allow_macro_instructions_);
9183    VIXL_ASSERT(OutsideITBlock());
9184    MacroEmissionCheckScope guard(this);
9185    ITScope it_scope(this, &cond);
9186    vqsub(cond, dt, rd, rn, rm);
9187  }
9188  void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9189    Vqsub(al, dt, rd, rn, rm);
9190  }
9191
9192  void Vraddhn(
9193      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9194    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9196    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9197    VIXL_ASSERT(allow_macro_instructions_);
9198    VIXL_ASSERT(OutsideITBlock());
9199    MacroEmissionCheckScope guard(this);
9200    ITScope it_scope(this, &cond);
9201    vraddhn(cond, dt, rd, rn, rm);
9202  }
9203  void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9204    Vraddhn(al, dt, rd, rn, rm);
9205  }
9206
9207  void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9210    VIXL_ASSERT(allow_macro_instructions_);
9211    VIXL_ASSERT(OutsideITBlock());
9212    MacroEmissionCheckScope guard(this);
9213    ITScope it_scope(this, &cond);
9214    vrecpe(cond, dt, rd, rm);
9215  }
9216  void Vrecpe(DataType dt, DRegister rd, DRegister rm) {
9217    Vrecpe(al, dt, rd, rm);
9218  }
9219
9220  void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9223    VIXL_ASSERT(allow_macro_instructions_);
9224    VIXL_ASSERT(OutsideITBlock());
9225    MacroEmissionCheckScope guard(this);
9226    ITScope it_scope(this, &cond);
9227    vrecpe(cond, dt, rd, rm);
9228  }
9229  void Vrecpe(DataType dt, QRegister rd, QRegister rm) {
9230    Vrecpe(al, dt, rd, rm);
9231  }
9232
9233  void Vrecps(
9234      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9235    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9236    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9237    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9238    VIXL_ASSERT(allow_macro_instructions_);
9239    VIXL_ASSERT(OutsideITBlock());
9240    MacroEmissionCheckScope guard(this);
9241    ITScope it_scope(this, &cond);
9242    vrecps(cond, dt, rd, rn, rm);
9243  }
9244  void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9245    Vrecps(al, dt, rd, rn, rm);
9246  }
9247
9248  void Vrecps(
9249      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9250    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9251    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9252    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9253    VIXL_ASSERT(allow_macro_instructions_);
9254    VIXL_ASSERT(OutsideITBlock());
9255    MacroEmissionCheckScope guard(this);
9256    ITScope it_scope(this, &cond);
9257    vrecps(cond, dt, rd, rn, rm);
9258  }
9259  void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9260    Vrecps(al, dt, rd, rn, rm);
9261  }
9262
9263  void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9264    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9265    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9266    VIXL_ASSERT(allow_macro_instructions_);
9267    VIXL_ASSERT(OutsideITBlock());
9268    MacroEmissionCheckScope guard(this);
9269    ITScope it_scope(this, &cond);
9270    vrev16(cond, dt, rd, rm);
9271  }
9272  void Vrev16(DataType dt, DRegister rd, DRegister rm) {
9273    Vrev16(al, dt, rd, rm);
9274  }
9275
9276  void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9277    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9278    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9279    VIXL_ASSERT(allow_macro_instructions_);
9280    VIXL_ASSERT(OutsideITBlock());
9281    MacroEmissionCheckScope guard(this);
9282    ITScope it_scope(this, &cond);
9283    vrev16(cond, dt, rd, rm);
9284  }
9285  void Vrev16(DataType dt, QRegister rd, QRegister rm) {
9286    Vrev16(al, dt, rd, rm);
9287  }
9288
9289  void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9290    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9291    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9292    VIXL_ASSERT(allow_macro_instructions_);
9293    VIXL_ASSERT(OutsideITBlock());
9294    MacroEmissionCheckScope guard(this);
9295    ITScope it_scope(this, &cond);
9296    vrev32(cond, dt, rd, rm);
9297  }
9298  void Vrev32(DataType dt, DRegister rd, DRegister rm) {
9299    Vrev32(al, dt, rd, rm);
9300  }
9301
9302  void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9303    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9304    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9305    VIXL_ASSERT(allow_macro_instructions_);
9306    VIXL_ASSERT(OutsideITBlock());
9307    MacroEmissionCheckScope guard(this);
9308    ITScope it_scope(this, &cond);
9309    vrev32(cond, dt, rd, rm);
9310  }
9311  void Vrev32(DataType dt, QRegister rd, QRegister rm) {
9312    Vrev32(al, dt, rd, rm);
9313  }
9314
9315  void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9316    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9317    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9318    VIXL_ASSERT(allow_macro_instructions_);
9319    VIXL_ASSERT(OutsideITBlock());
9320    MacroEmissionCheckScope guard(this);
9321    ITScope it_scope(this, &cond);
9322    vrev64(cond, dt, rd, rm);
9323  }
9324  void Vrev64(DataType dt, DRegister rd, DRegister rm) {
9325    Vrev64(al, dt, rd, rm);
9326  }
9327
9328  void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9329    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9330    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9331    VIXL_ASSERT(allow_macro_instructions_);
9332    VIXL_ASSERT(OutsideITBlock());
9333    MacroEmissionCheckScope guard(this);
9334    ITScope it_scope(this, &cond);
9335    vrev64(cond, dt, rd, rm);
9336  }
9337  void Vrev64(DataType dt, QRegister rd, QRegister rm) {
9338    Vrev64(al, dt, rd, rm);
9339  }
9340
9341  void Vrhadd(
9342      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9343    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9344    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9345    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9346    VIXL_ASSERT(allow_macro_instructions_);
9347    VIXL_ASSERT(OutsideITBlock());
9348    MacroEmissionCheckScope guard(this);
9349    ITScope it_scope(this, &cond);
9350    vrhadd(cond, dt, rd, rn, rm);
9351  }
9352  void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9353    Vrhadd(al, dt, rd, rn, rm);
9354  }
9355
9356  void Vrhadd(
9357      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9358    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9359    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9360    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9361    VIXL_ASSERT(allow_macro_instructions_);
9362    VIXL_ASSERT(OutsideITBlock());
9363    MacroEmissionCheckScope guard(this);
9364    ITScope it_scope(this, &cond);
9365    vrhadd(cond, dt, rd, rn, rm);
9366  }
9367  void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9368    Vrhadd(al, dt, rd, rn, rm);
9369  }
9370
9371  void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9372    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9373    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9374    VIXL_ASSERT(allow_macro_instructions_);
9375    VIXL_ASSERT(OutsideITBlock());
9376    MacroEmissionCheckScope guard(this);
9377    vrinta(dt1, dt2, rd, rm);
9378  }
9379
9380  void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9381    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9382    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9383    VIXL_ASSERT(allow_macro_instructions_);
9384    VIXL_ASSERT(OutsideITBlock());
9385    MacroEmissionCheckScope guard(this);
9386    vrinta(dt1, dt2, rd, rm);
9387  }
9388
9389  void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9390    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9391    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9392    VIXL_ASSERT(allow_macro_instructions_);
9393    VIXL_ASSERT(OutsideITBlock());
9394    MacroEmissionCheckScope guard(this);
9395    vrinta(dt1, dt2, rd, rm);
9396  }
9397
9398  void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9399    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9401    VIXL_ASSERT(allow_macro_instructions_);
9402    VIXL_ASSERT(OutsideITBlock());
9403    MacroEmissionCheckScope guard(this);
9404    vrintm(dt1, dt2, rd, rm);
9405  }
9406
9407  void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9408    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9409    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9410    VIXL_ASSERT(allow_macro_instructions_);
9411    VIXL_ASSERT(OutsideITBlock());
9412    MacroEmissionCheckScope guard(this);
9413    vrintm(dt1, dt2, rd, rm);
9414  }
9415
9416  void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9417    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9418    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9419    VIXL_ASSERT(allow_macro_instructions_);
9420    VIXL_ASSERT(OutsideITBlock());
9421    MacroEmissionCheckScope guard(this);
9422    vrintm(dt1, dt2, rd, rm);
9423  }
9424
9425  void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9427    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9428    VIXL_ASSERT(allow_macro_instructions_);
9429    VIXL_ASSERT(OutsideITBlock());
9430    MacroEmissionCheckScope guard(this);
9431    vrintn(dt1, dt2, rd, rm);
9432  }
9433
9434  void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9435    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9436    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9437    VIXL_ASSERT(allow_macro_instructions_);
9438    VIXL_ASSERT(OutsideITBlock());
9439    MacroEmissionCheckScope guard(this);
9440    vrintn(dt1, dt2, rd, rm);
9441  }
9442
9443  void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9444    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9445    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9446    VIXL_ASSERT(allow_macro_instructions_);
9447    VIXL_ASSERT(OutsideITBlock());
9448    MacroEmissionCheckScope guard(this);
9449    vrintn(dt1, dt2, rd, rm);
9450  }
9451
9452  void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9453    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9454    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9455    VIXL_ASSERT(allow_macro_instructions_);
9456    VIXL_ASSERT(OutsideITBlock());
9457    MacroEmissionCheckScope guard(this);
9458    vrintp(dt1, dt2, rd, rm);
9459  }
9460
9461  void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9462    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9464    VIXL_ASSERT(allow_macro_instructions_);
9465    VIXL_ASSERT(OutsideITBlock());
9466    MacroEmissionCheckScope guard(this);
9467    vrintp(dt1, dt2, rd, rm);
9468  }
9469
9470  void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9471    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9472    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9473    VIXL_ASSERT(allow_macro_instructions_);
9474    VIXL_ASSERT(OutsideITBlock());
9475    MacroEmissionCheckScope guard(this);
9476    vrintp(dt1, dt2, rd, rm);
9477  }
9478
9479  void Vrintr(
9480      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9481    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9482    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9483    VIXL_ASSERT(allow_macro_instructions_);
9484    VIXL_ASSERT(OutsideITBlock());
9485    MacroEmissionCheckScope guard(this);
9486    ITScope it_scope(this, &cond);
9487    vrintr(cond, dt1, dt2, rd, rm);
9488  }
9489  void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9490    Vrintr(al, dt1, dt2, rd, rm);
9491  }
9492
9493  void Vrintr(
9494      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9495    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9496    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9497    VIXL_ASSERT(allow_macro_instructions_);
9498    VIXL_ASSERT(OutsideITBlock());
9499    MacroEmissionCheckScope guard(this);
9500    ITScope it_scope(this, &cond);
9501    vrintr(cond, dt1, dt2, rd, rm);
9502  }
9503  void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9504    Vrintr(al, dt1, dt2, rd, rm);
9505  }
9506
9507  void Vrintx(
9508      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9509    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9510    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9511    VIXL_ASSERT(allow_macro_instructions_);
9512    VIXL_ASSERT(OutsideITBlock());
9513    MacroEmissionCheckScope guard(this);
9514    ITScope it_scope(this, &cond);
9515    vrintx(cond, dt1, dt2, rd, rm);
9516  }
9517  void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9518    Vrintx(al, dt1, dt2, rd, rm);
9519  }
9520
9521  void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9522    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9523    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9524    VIXL_ASSERT(allow_macro_instructions_);
9525    VIXL_ASSERT(OutsideITBlock());
9526    MacroEmissionCheckScope guard(this);
9527    vrintx(dt1, dt2, rd, rm);
9528  }
9529
9530  void Vrintx(
9531      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9532    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9533    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9534    VIXL_ASSERT(allow_macro_instructions_);
9535    VIXL_ASSERT(OutsideITBlock());
9536    MacroEmissionCheckScope guard(this);
9537    ITScope it_scope(this, &cond);
9538    vrintx(cond, dt1, dt2, rd, rm);
9539  }
9540  void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9541    Vrintx(al, dt1, dt2, rd, rm);
9542  }
9543
9544  void Vrintz(
9545      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9546    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9547    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9548    VIXL_ASSERT(allow_macro_instructions_);
9549    VIXL_ASSERT(OutsideITBlock());
9550    MacroEmissionCheckScope guard(this);
9551    ITScope it_scope(this, &cond);
9552    vrintz(cond, dt1, dt2, rd, rm);
9553  }
9554  void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9555    Vrintz(al, dt1, dt2, rd, rm);
9556  }
9557
9558  void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9559    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9560    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9561    VIXL_ASSERT(allow_macro_instructions_);
9562    VIXL_ASSERT(OutsideITBlock());
9563    MacroEmissionCheckScope guard(this);
9564    vrintz(dt1, dt2, rd, rm);
9565  }
9566
9567  void Vrintz(
9568      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9571    VIXL_ASSERT(allow_macro_instructions_);
9572    VIXL_ASSERT(OutsideITBlock());
9573    MacroEmissionCheckScope guard(this);
9574    ITScope it_scope(this, &cond);
9575    vrintz(cond, dt1, dt2, rd, rm);
9576  }
9577  void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9578    Vrintz(al, dt1, dt2, rd, rm);
9579  }
9580
9581  void Vrshl(
9582      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9583    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9584    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9585    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9586    VIXL_ASSERT(allow_macro_instructions_);
9587    VIXL_ASSERT(OutsideITBlock());
9588    MacroEmissionCheckScope guard(this);
9589    ITScope it_scope(this, &cond);
9590    vrshl(cond, dt, rd, rm, rn);
9591  }
9592  void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9593    Vrshl(al, dt, rd, rm, rn);
9594  }
9595
9596  void Vrshl(
9597      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9599    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9600    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9601    VIXL_ASSERT(allow_macro_instructions_);
9602    VIXL_ASSERT(OutsideITBlock());
9603    MacroEmissionCheckScope guard(this);
9604    ITScope it_scope(this, &cond);
9605    vrshl(cond, dt, rd, rm, rn);
9606  }
9607  void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9608    Vrshl(al, dt, rd, rm, rn);
9609  }
9610
9611  void Vrshr(Condition cond,
9612             DataType dt,
9613             DRegister rd,
9614             DRegister rm,
9615             const DOperand& operand) {
9616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9617    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9618    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9619    VIXL_ASSERT(allow_macro_instructions_);
9620    VIXL_ASSERT(OutsideITBlock());
9621    MacroEmissionCheckScope guard(this);
9622    ITScope it_scope(this, &cond);
9623    vrshr(cond, dt, rd, rm, operand);
9624  }
9625  void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9626    Vrshr(al, dt, rd, rm, operand);
9627  }
9628
9629  void Vrshr(Condition cond,
9630             DataType dt,
9631             QRegister rd,
9632             QRegister rm,
9633             const QOperand& operand) {
9634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9636    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9637    VIXL_ASSERT(allow_macro_instructions_);
9638    VIXL_ASSERT(OutsideITBlock());
9639    MacroEmissionCheckScope guard(this);
9640    ITScope it_scope(this, &cond);
9641    vrshr(cond, dt, rd, rm, operand);
9642  }
9643  void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9644    Vrshr(al, dt, rd, rm, operand);
9645  }
9646
9647  void Vrshrn(Condition cond,
9648              DataType dt,
9649              DRegister rd,
9650              QRegister rm,
9651              const QOperand& operand) {
9652    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9654    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9655    VIXL_ASSERT(allow_macro_instructions_);
9656    VIXL_ASSERT(OutsideITBlock());
9657    MacroEmissionCheckScope guard(this);
9658    ITScope it_scope(this, &cond);
9659    vrshrn(cond, dt, rd, rm, operand);
9660  }
9661  void Vrshrn(DataType dt,
9662              DRegister rd,
9663              QRegister rm,
9664              const QOperand& operand) {
9665    Vrshrn(al, dt, rd, rm, operand);
9666  }
9667
9668  void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9671    VIXL_ASSERT(allow_macro_instructions_);
9672    VIXL_ASSERT(OutsideITBlock());
9673    MacroEmissionCheckScope guard(this);
9674    ITScope it_scope(this, &cond);
9675    vrsqrte(cond, dt, rd, rm);
9676  }
9677  void Vrsqrte(DataType dt, DRegister rd, DRegister rm) {
9678    Vrsqrte(al, dt, rd, rm);
9679  }
9680
9681  void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9684    VIXL_ASSERT(allow_macro_instructions_);
9685    VIXL_ASSERT(OutsideITBlock());
9686    MacroEmissionCheckScope guard(this);
9687    ITScope it_scope(this, &cond);
9688    vrsqrte(cond, dt, rd, rm);
9689  }
9690  void Vrsqrte(DataType dt, QRegister rd, QRegister rm) {
9691    Vrsqrte(al, dt, rd, rm);
9692  }
9693
9694  void Vrsqrts(
9695      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9696    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9699    VIXL_ASSERT(allow_macro_instructions_);
9700    VIXL_ASSERT(OutsideITBlock());
9701    MacroEmissionCheckScope guard(this);
9702    ITScope it_scope(this, &cond);
9703    vrsqrts(cond, dt, rd, rn, rm);
9704  }
9705  void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9706    Vrsqrts(al, dt, rd, rn, rm);
9707  }
9708
9709  void Vrsqrts(
9710      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9711    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9712    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9713    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9714    VIXL_ASSERT(allow_macro_instructions_);
9715    VIXL_ASSERT(OutsideITBlock());
9716    MacroEmissionCheckScope guard(this);
9717    ITScope it_scope(this, &cond);
9718    vrsqrts(cond, dt, rd, rn, rm);
9719  }
9720  void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9721    Vrsqrts(al, dt, rd, rn, rm);
9722  }
9723
9724  void Vrsra(Condition cond,
9725             DataType dt,
9726             DRegister rd,
9727             DRegister rm,
9728             const DOperand& operand) {
9729    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9731    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9732    VIXL_ASSERT(allow_macro_instructions_);
9733    VIXL_ASSERT(OutsideITBlock());
9734    MacroEmissionCheckScope guard(this);
9735    ITScope it_scope(this, &cond);
9736    vrsra(cond, dt, rd, rm, operand);
9737  }
9738  void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9739    Vrsra(al, dt, rd, rm, operand);
9740  }
9741
9742  void Vrsra(Condition cond,
9743             DataType dt,
9744             QRegister rd,
9745             QRegister rm,
9746             const QOperand& operand) {
9747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9748    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9749    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9750    VIXL_ASSERT(allow_macro_instructions_);
9751    VIXL_ASSERT(OutsideITBlock());
9752    MacroEmissionCheckScope guard(this);
9753    ITScope it_scope(this, &cond);
9754    vrsra(cond, dt, rd, rm, operand);
9755  }
9756  void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9757    Vrsra(al, dt, rd, rm, operand);
9758  }
9759
9760  void Vrsubhn(
9761      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9762    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9763    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9764    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9765    VIXL_ASSERT(allow_macro_instructions_);
9766    VIXL_ASSERT(OutsideITBlock());
9767    MacroEmissionCheckScope guard(this);
9768    ITScope it_scope(this, &cond);
9769    vrsubhn(cond, dt, rd, rn, rm);
9770  }
9771  void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9772    Vrsubhn(al, dt, rd, rn, rm);
9773  }
9774
9775  void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9776    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9777    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9779    VIXL_ASSERT(allow_macro_instructions_);
9780    VIXL_ASSERT(OutsideITBlock());
9781    MacroEmissionCheckScope guard(this);
9782    vseleq(dt, rd, rn, rm);
9783  }
9784
9785  void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9787    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9788    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9789    VIXL_ASSERT(allow_macro_instructions_);
9790    VIXL_ASSERT(OutsideITBlock());
9791    MacroEmissionCheckScope guard(this);
9792    vseleq(dt, rd, rn, rm);
9793  }
9794
9795  void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9799    VIXL_ASSERT(allow_macro_instructions_);
9800    VIXL_ASSERT(OutsideITBlock());
9801    MacroEmissionCheckScope guard(this);
9802    vselge(dt, rd, rn, rm);
9803  }
9804
9805  void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9806    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9807    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9808    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9809    VIXL_ASSERT(allow_macro_instructions_);
9810    VIXL_ASSERT(OutsideITBlock());
9811    MacroEmissionCheckScope guard(this);
9812    vselge(dt, rd, rn, rm);
9813  }
9814
9815  void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9816    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9817    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9819    VIXL_ASSERT(allow_macro_instructions_);
9820    VIXL_ASSERT(OutsideITBlock());
9821    MacroEmissionCheckScope guard(this);
9822    vselgt(dt, rd, rn, rm);
9823  }
9824
9825  void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9826    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9827    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9829    VIXL_ASSERT(allow_macro_instructions_);
9830    VIXL_ASSERT(OutsideITBlock());
9831    MacroEmissionCheckScope guard(this);
9832    vselgt(dt, rd, rn, rm);
9833  }
9834
9835  void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9836    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9837    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9838    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9839    VIXL_ASSERT(allow_macro_instructions_);
9840    VIXL_ASSERT(OutsideITBlock());
9841    MacroEmissionCheckScope guard(this);
9842    vselvs(dt, rd, rn, rm);
9843  }
9844
9845  void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9846    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9847    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9848    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9849    VIXL_ASSERT(allow_macro_instructions_);
9850    VIXL_ASSERT(OutsideITBlock());
9851    MacroEmissionCheckScope guard(this);
9852    vselvs(dt, rd, rn, rm);
9853  }
9854
9855  void Vshl(Condition cond,
9856            DataType dt,
9857            DRegister rd,
9858            DRegister rm,
9859            const DOperand& operand) {
9860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9861    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9862    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9863    VIXL_ASSERT(allow_macro_instructions_);
9864    VIXL_ASSERT(OutsideITBlock());
9865    MacroEmissionCheckScope guard(this);
9866    ITScope it_scope(this, &cond);
9867    vshl(cond, dt, rd, rm, operand);
9868  }
9869  void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9870    Vshl(al, dt, rd, rm, operand);
9871  }
9872
9873  void Vshl(Condition cond,
9874            DataType dt,
9875            QRegister rd,
9876            QRegister rm,
9877            const QOperand& operand) {
9878    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9879    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9880    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9881    VIXL_ASSERT(allow_macro_instructions_);
9882    VIXL_ASSERT(OutsideITBlock());
9883    MacroEmissionCheckScope guard(this);
9884    ITScope it_scope(this, &cond);
9885    vshl(cond, dt, rd, rm, operand);
9886  }
9887  void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9888    Vshl(al, dt, rd, rm, operand);
9889  }
9890
9891  void Vshll(Condition cond,
9892             DataType dt,
9893             QRegister rd,
9894             DRegister rm,
9895             const DOperand& operand) {
9896    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9897    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9898    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9899    VIXL_ASSERT(allow_macro_instructions_);
9900    VIXL_ASSERT(OutsideITBlock());
9901    MacroEmissionCheckScope guard(this);
9902    ITScope it_scope(this, &cond);
9903    vshll(cond, dt, rd, rm, operand);
9904  }
9905  void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) {
9906    Vshll(al, dt, rd, rm, operand);
9907  }
9908
9909  void Vshr(Condition cond,
9910            DataType dt,
9911            DRegister rd,
9912            DRegister rm,
9913            const DOperand& operand) {
9914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9916    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9917    VIXL_ASSERT(allow_macro_instructions_);
9918    VIXL_ASSERT(OutsideITBlock());
9919    MacroEmissionCheckScope guard(this);
9920    ITScope it_scope(this, &cond);
9921    vshr(cond, dt, rd, rm, operand);
9922  }
9923  void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9924    Vshr(al, dt, rd, rm, operand);
9925  }
9926
9927  void Vshr(Condition cond,
9928            DataType dt,
9929            QRegister rd,
9930            QRegister rm,
9931            const QOperand& operand) {
9932    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9933    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9934    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9935    VIXL_ASSERT(allow_macro_instructions_);
9936    VIXL_ASSERT(OutsideITBlock());
9937    MacroEmissionCheckScope guard(this);
9938    ITScope it_scope(this, &cond);
9939    vshr(cond, dt, rd, rm, operand);
9940  }
9941  void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9942    Vshr(al, dt, rd, rm, operand);
9943  }
9944
9945  void Vshrn(Condition cond,
9946             DataType dt,
9947             DRegister rd,
9948             QRegister rm,
9949             const QOperand& operand) {
9950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9952    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9953    VIXL_ASSERT(allow_macro_instructions_);
9954    VIXL_ASSERT(OutsideITBlock());
9955    MacroEmissionCheckScope guard(this);
9956    ITScope it_scope(this, &cond);
9957    vshrn(cond, dt, rd, rm, operand);
9958  }
9959  void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) {
9960    Vshrn(al, dt, rd, rm, operand);
9961  }
9962
9963  void Vsli(Condition cond,
9964            DataType dt,
9965            DRegister rd,
9966            DRegister rm,
9967            const DOperand& operand) {
9968    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9969    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9970    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9971    VIXL_ASSERT(allow_macro_instructions_);
9972    VIXL_ASSERT(OutsideITBlock());
9973    MacroEmissionCheckScope guard(this);
9974    ITScope it_scope(this, &cond);
9975    vsli(cond, dt, rd, rm, operand);
9976  }
9977  void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9978    Vsli(al, dt, rd, rm, operand);
9979  }
9980
9981  void Vsli(Condition cond,
9982            DataType dt,
9983            QRegister rd,
9984            QRegister rm,
9985            const QOperand& operand) {
9986    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9987    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9988    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9989    VIXL_ASSERT(allow_macro_instructions_);
9990    VIXL_ASSERT(OutsideITBlock());
9991    MacroEmissionCheckScope guard(this);
9992    ITScope it_scope(this, &cond);
9993    vsli(cond, dt, rd, rm, operand);
9994  }
9995  void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9996    Vsli(al, dt, rd, rm, operand);
9997  }
9998
9999  void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) {
10000    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10001    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10002    VIXL_ASSERT(allow_macro_instructions_);
10003    VIXL_ASSERT(OutsideITBlock());
10004    MacroEmissionCheckScope guard(this);
10005    ITScope it_scope(this, &cond);
10006    vsqrt(cond, dt, rd, rm);
10007  }
10008  void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); }
10009
10010  void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10012    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10013    VIXL_ASSERT(allow_macro_instructions_);
10014    VIXL_ASSERT(OutsideITBlock());
10015    MacroEmissionCheckScope guard(this);
10016    ITScope it_scope(this, &cond);
10017    vsqrt(cond, dt, rd, rm);
10018  }
10019  void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); }
10020
10021  void Vsra(Condition cond,
10022            DataType dt,
10023            DRegister rd,
10024            DRegister rm,
10025            const DOperand& operand) {
10026    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10027    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10028    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10029    VIXL_ASSERT(allow_macro_instructions_);
10030    VIXL_ASSERT(OutsideITBlock());
10031    MacroEmissionCheckScope guard(this);
10032    ITScope it_scope(this, &cond);
10033    vsra(cond, dt, rd, rm, operand);
10034  }
10035  void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
10036    Vsra(al, dt, rd, rm, operand);
10037  }
10038
10039  void Vsra(Condition cond,
10040            DataType dt,
10041            QRegister rd,
10042            QRegister rm,
10043            const QOperand& operand) {
10044    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10045    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10046    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10047    VIXL_ASSERT(allow_macro_instructions_);
10048    VIXL_ASSERT(OutsideITBlock());
10049    MacroEmissionCheckScope guard(this);
10050    ITScope it_scope(this, &cond);
10051    vsra(cond, dt, rd, rm, operand);
10052  }
10053  void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
10054    Vsra(al, dt, rd, rm, operand);
10055  }
10056
10057  void Vsri(Condition cond,
10058            DataType dt,
10059            DRegister rd,
10060            DRegister rm,
10061            const DOperand& operand) {
10062    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10064    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10065    VIXL_ASSERT(allow_macro_instructions_);
10066    VIXL_ASSERT(OutsideITBlock());
10067    MacroEmissionCheckScope guard(this);
10068    ITScope it_scope(this, &cond);
10069    vsri(cond, dt, rd, rm, operand);
10070  }
10071  void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
10072    Vsri(al, dt, rd, rm, operand);
10073  }
10074
10075  void Vsri(Condition cond,
10076            DataType dt,
10077            QRegister rd,
10078            QRegister rm,
10079            const QOperand& operand) {
10080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10081    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10082    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10083    VIXL_ASSERT(allow_macro_instructions_);
10084    VIXL_ASSERT(OutsideITBlock());
10085    MacroEmissionCheckScope guard(this);
10086    ITScope it_scope(this, &cond);
10087    vsri(cond, dt, rd, rm, operand);
10088  }
10089  void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
10090    Vsri(al, dt, rd, rm, operand);
10091  }
10092
10093  void Vst1(Condition cond,
10094            DataType dt,
10095            const NeonRegisterList& nreglist,
10096            const AlignedMemOperand& operand) {
10097    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10098    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10099    VIXL_ASSERT(allow_macro_instructions_);
10100    VIXL_ASSERT(OutsideITBlock());
10101    MacroEmissionCheckScope guard(this);
10102    ITScope it_scope(this, &cond);
10103    vst1(cond, dt, nreglist, operand);
10104  }
10105  void Vst1(DataType dt,
10106            const NeonRegisterList& nreglist,
10107            const AlignedMemOperand& operand) {
10108    Vst1(al, dt, nreglist, operand);
10109  }
10110
10111  void Vst2(Condition cond,
10112            DataType dt,
10113            const NeonRegisterList& nreglist,
10114            const AlignedMemOperand& operand) {
10115    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10116    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10117    VIXL_ASSERT(allow_macro_instructions_);
10118    VIXL_ASSERT(OutsideITBlock());
10119    MacroEmissionCheckScope guard(this);
10120    ITScope it_scope(this, &cond);
10121    vst2(cond, dt, nreglist, operand);
10122  }
10123  void Vst2(DataType dt,
10124            const NeonRegisterList& nreglist,
10125            const AlignedMemOperand& operand) {
10126    Vst2(al, dt, nreglist, operand);
10127  }
10128
10129  void Vst3(Condition cond,
10130            DataType dt,
10131            const NeonRegisterList& nreglist,
10132            const AlignedMemOperand& operand) {
10133    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10134    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10135    VIXL_ASSERT(allow_macro_instructions_);
10136    VIXL_ASSERT(OutsideITBlock());
10137    MacroEmissionCheckScope guard(this);
10138    ITScope it_scope(this, &cond);
10139    vst3(cond, dt, nreglist, operand);
10140  }
10141  void Vst3(DataType dt,
10142            const NeonRegisterList& nreglist,
10143            const AlignedMemOperand& operand) {
10144    Vst3(al, dt, nreglist, operand);
10145  }
10146
10147  void Vst3(Condition cond,
10148            DataType dt,
10149            const NeonRegisterList& nreglist,
10150            const MemOperand& operand) {
10151    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10152    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10153    VIXL_ASSERT(allow_macro_instructions_);
10154    VIXL_ASSERT(OutsideITBlock());
10155    MacroEmissionCheckScope guard(this);
10156    ITScope it_scope(this, &cond);
10157    vst3(cond, dt, nreglist, operand);
10158  }
10159  void Vst3(DataType dt,
10160            const NeonRegisterList& nreglist,
10161            const MemOperand& operand) {
10162    Vst3(al, dt, nreglist, operand);
10163  }
10164
10165  void Vst4(Condition cond,
10166            DataType dt,
10167            const NeonRegisterList& nreglist,
10168            const AlignedMemOperand& operand) {
10169    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10170    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10171    VIXL_ASSERT(allow_macro_instructions_);
10172    VIXL_ASSERT(OutsideITBlock());
10173    MacroEmissionCheckScope guard(this);
10174    ITScope it_scope(this, &cond);
10175    vst4(cond, dt, nreglist, operand);
10176  }
10177  void Vst4(DataType dt,
10178            const NeonRegisterList& nreglist,
10179            const AlignedMemOperand& operand) {
10180    Vst4(al, dt, nreglist, operand);
10181  }
10182
10183  void Vstm(Condition cond,
10184            DataType dt,
10185            Register rn,
10186            WriteBack write_back,
10187            DRegisterList dreglist) {
10188    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10189    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10190    VIXL_ASSERT(allow_macro_instructions_);
10191    VIXL_ASSERT(OutsideITBlock());
10192    MacroEmissionCheckScope guard(this);
10193    ITScope it_scope(this, &cond);
10194    vstm(cond, dt, rn, write_back, dreglist);
10195  }
10196  void Vstm(DataType dt,
10197            Register rn,
10198            WriteBack write_back,
10199            DRegisterList dreglist) {
10200    Vstm(al, dt, rn, write_back, dreglist);
10201  }
10202  void Vstm(Condition cond,
10203            Register rn,
10204            WriteBack write_back,
10205            DRegisterList dreglist) {
10206    Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist);
10207  }
10208  void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) {
10209    Vstm(al, kDataTypeValueNone, rn, write_back, dreglist);
10210  }
10211
10212  void Vstm(Condition cond,
10213            DataType dt,
10214            Register rn,
10215            WriteBack write_back,
10216            SRegisterList sreglist) {
10217    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10218    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10219    VIXL_ASSERT(allow_macro_instructions_);
10220    VIXL_ASSERT(OutsideITBlock());
10221    MacroEmissionCheckScope guard(this);
10222    ITScope it_scope(this, &cond);
10223    vstm(cond, dt, rn, write_back, sreglist);
10224  }
10225  void Vstm(DataType dt,
10226            Register rn,
10227            WriteBack write_back,
10228            SRegisterList sreglist) {
10229    Vstm(al, dt, rn, write_back, sreglist);
10230  }
10231  void Vstm(Condition cond,
10232            Register rn,
10233            WriteBack write_back,
10234            SRegisterList sreglist) {
10235    Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist);
10236  }
10237  void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) {
10238    Vstm(al, kDataTypeValueNone, rn, write_back, sreglist);
10239  }
10240
10241  void Vstmdb(Condition cond,
10242              DataType dt,
10243              Register rn,
10244              WriteBack write_back,
10245              DRegisterList dreglist) {
10246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10247    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10248    VIXL_ASSERT(allow_macro_instructions_);
10249    VIXL_ASSERT(OutsideITBlock());
10250    MacroEmissionCheckScope guard(this);
10251    ITScope it_scope(this, &cond);
10252    vstmdb(cond, dt, rn, write_back, dreglist);
10253  }
10254  void Vstmdb(DataType dt,
10255              Register rn,
10256              WriteBack write_back,
10257              DRegisterList dreglist) {
10258    Vstmdb(al, dt, rn, write_back, dreglist);
10259  }
10260  void Vstmdb(Condition cond,
10261              Register rn,
10262              WriteBack write_back,
10263              DRegisterList dreglist) {
10264    Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
10265  }
10266  void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
10267    Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
10268  }
10269
10270  void Vstmdb(Condition cond,
10271              DataType dt,
10272              Register rn,
10273              WriteBack write_back,
10274              SRegisterList sreglist) {
10275    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10276    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10277    VIXL_ASSERT(allow_macro_instructions_);
10278    VIXL_ASSERT(OutsideITBlock());
10279    MacroEmissionCheckScope guard(this);
10280    ITScope it_scope(this, &cond);
10281    vstmdb(cond, dt, rn, write_back, sreglist);
10282  }
10283  void Vstmdb(DataType dt,
10284              Register rn,
10285              WriteBack write_back,
10286              SRegisterList sreglist) {
10287    Vstmdb(al, dt, rn, write_back, sreglist);
10288  }
10289  void Vstmdb(Condition cond,
10290              Register rn,
10291              WriteBack write_back,
10292              SRegisterList sreglist) {
10293    Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
10294  }
10295  void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
10296    Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
10297  }
10298
10299  void Vstmia(Condition cond,
10300              DataType dt,
10301              Register rn,
10302              WriteBack write_back,
10303              DRegisterList dreglist) {
10304    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10305    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10306    VIXL_ASSERT(allow_macro_instructions_);
10307    VIXL_ASSERT(OutsideITBlock());
10308    MacroEmissionCheckScope guard(this);
10309    ITScope it_scope(this, &cond);
10310    vstmia(cond, dt, rn, write_back, dreglist);
10311  }
10312  void Vstmia(DataType dt,
10313              Register rn,
10314              WriteBack write_back,
10315              DRegisterList dreglist) {
10316    Vstmia(al, dt, rn, write_back, dreglist);
10317  }
10318  void Vstmia(Condition cond,
10319              Register rn,
10320              WriteBack write_back,
10321              DRegisterList dreglist) {
10322    Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
10323  }
10324  void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
10325    Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist);
10326  }
10327
10328  void Vstmia(Condition cond,
10329              DataType dt,
10330              Register rn,
10331              WriteBack write_back,
10332              SRegisterList sreglist) {
10333    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10334    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10335    VIXL_ASSERT(allow_macro_instructions_);
10336    VIXL_ASSERT(OutsideITBlock());
10337    MacroEmissionCheckScope guard(this);
10338    ITScope it_scope(this, &cond);
10339    vstmia(cond, dt, rn, write_back, sreglist);
10340  }
10341  void Vstmia(DataType dt,
10342              Register rn,
10343              WriteBack write_back,
10344              SRegisterList sreglist) {
10345    Vstmia(al, dt, rn, write_back, sreglist);
10346  }
10347  void Vstmia(Condition cond,
10348              Register rn,
10349              WriteBack write_back,
10350              SRegisterList sreglist) {
10351    Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
10352  }
10353  void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
10354    Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist);
10355  }
10356
10357  void Vstr(Condition cond,
10358            DataType dt,
10359            DRegister rd,
10360            const MemOperand& operand) {
10361    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10362    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10363    VIXL_ASSERT(allow_macro_instructions_);
10364    VIXL_ASSERT(OutsideITBlock());
10365    MacroEmissionCheckScope guard(this);
10366    ITScope it_scope(this, &cond);
10367    vstr(cond, dt, rd, operand);
10368  }
10369  void Vstr(DataType dt, DRegister rd, const MemOperand& operand) {
10370    Vstr(al, dt, rd, operand);
10371  }
10372  void Vstr(Condition cond, DRegister rd, const MemOperand& operand) {
10373    Vstr(cond, Untyped64, rd, operand);
10374  }
10375  void Vstr(DRegister rd, const MemOperand& operand) {
10376    Vstr(al, Untyped64, rd, operand);
10377  }
10378
10379  void Vstr(Condition cond,
10380            DataType dt,
10381            SRegister rd,
10382            const MemOperand& operand) {
10383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10384    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10385    VIXL_ASSERT(allow_macro_instructions_);
10386    VIXL_ASSERT(OutsideITBlock());
10387    MacroEmissionCheckScope guard(this);
10388    ITScope it_scope(this, &cond);
10389    vstr(cond, dt, rd, operand);
10390  }
10391  void Vstr(DataType dt, SRegister rd, const MemOperand& operand) {
10392    Vstr(al, dt, rd, operand);
10393  }
10394  void Vstr(Condition cond, SRegister rd, const MemOperand& operand) {
10395    Vstr(cond, Untyped32, rd, operand);
10396  }
10397  void Vstr(SRegister rd, const MemOperand& operand) {
10398    Vstr(al, Untyped32, rd, operand);
10399  }
10400
10401  void Vsub(
10402      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10403    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10404    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10405    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10406    VIXL_ASSERT(allow_macro_instructions_);
10407    VIXL_ASSERT(OutsideITBlock());
10408    MacroEmissionCheckScope guard(this);
10409    ITScope it_scope(this, &cond);
10410    vsub(cond, dt, rd, rn, rm);
10411  }
10412  void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10413    Vsub(al, dt, rd, rn, rm);
10414  }
10415
10416  void Vsub(
10417      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10418    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10419    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10420    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10421    VIXL_ASSERT(allow_macro_instructions_);
10422    VIXL_ASSERT(OutsideITBlock());
10423    MacroEmissionCheckScope guard(this);
10424    ITScope it_scope(this, &cond);
10425    vsub(cond, dt, rd, rn, rm);
10426  }
10427  void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10428    Vsub(al, dt, rd, rn, rm);
10429  }
10430
10431  void Vsub(
10432      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10433    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10434    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10435    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10436    VIXL_ASSERT(allow_macro_instructions_);
10437    VIXL_ASSERT(OutsideITBlock());
10438    MacroEmissionCheckScope guard(this);
10439    ITScope it_scope(this, &cond);
10440    vsub(cond, dt, rd, rn, rm);
10441  }
10442  void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10443    Vsub(al, dt, rd, rn, rm);
10444  }
10445
10446  void Vsubhn(
10447      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10448    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10450    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10451    VIXL_ASSERT(allow_macro_instructions_);
10452    VIXL_ASSERT(OutsideITBlock());
10453    MacroEmissionCheckScope guard(this);
10454    ITScope it_scope(this, &cond);
10455    vsubhn(cond, dt, rd, rn, rm);
10456  }
10457  void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10458    Vsubhn(al, dt, rd, rn, rm);
10459  }
10460
10461  void Vsubl(
10462      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10464    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10465    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10466    VIXL_ASSERT(allow_macro_instructions_);
10467    VIXL_ASSERT(OutsideITBlock());
10468    MacroEmissionCheckScope guard(this);
10469    ITScope it_scope(this, &cond);
10470    vsubl(cond, dt, rd, rn, rm);
10471  }
10472  void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10473    Vsubl(al, dt, rd, rn, rm);
10474  }
10475
10476  void Vsubw(
10477      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10478    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10480    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10481    VIXL_ASSERT(allow_macro_instructions_);
10482    VIXL_ASSERT(OutsideITBlock());
10483    MacroEmissionCheckScope guard(this);
10484    ITScope it_scope(this, &cond);
10485    vsubw(cond, dt, rd, rn, rm);
10486  }
10487  void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10488    Vsubw(al, dt, rd, rn, rm);
10489  }
10490
10491  void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10493    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10494    VIXL_ASSERT(allow_macro_instructions_);
10495    VIXL_ASSERT(OutsideITBlock());
10496    MacroEmissionCheckScope guard(this);
10497    ITScope it_scope(this, &cond);
10498    vswp(cond, dt, rd, rm);
10499  }
10500  void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); }
10501  void Vswp(Condition cond, DRegister rd, DRegister rm) {
10502    Vswp(cond, kDataTypeValueNone, rd, rm);
10503  }
10504  void Vswp(DRegister rd, DRegister rm) {
10505    Vswp(al, kDataTypeValueNone, rd, rm);
10506  }
10507
10508  void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10509    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10510    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10511    VIXL_ASSERT(allow_macro_instructions_);
10512    VIXL_ASSERT(OutsideITBlock());
10513    MacroEmissionCheckScope guard(this);
10514    ITScope it_scope(this, &cond);
10515    vswp(cond, dt, rd, rm);
10516  }
10517  void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); }
10518  void Vswp(Condition cond, QRegister rd, QRegister rm) {
10519    Vswp(cond, kDataTypeValueNone, rd, rm);
10520  }
10521  void Vswp(QRegister rd, QRegister rm) {
10522    Vswp(al, kDataTypeValueNone, rd, rm);
10523  }
10524
10525  void Vtbl(Condition cond,
10526            DataType dt,
10527            DRegister rd,
10528            const NeonRegisterList& nreglist,
10529            DRegister rm) {
10530    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10531    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10532    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10533    VIXL_ASSERT(allow_macro_instructions_);
10534    VIXL_ASSERT(OutsideITBlock());
10535    MacroEmissionCheckScope guard(this);
10536    ITScope it_scope(this, &cond);
10537    vtbl(cond, dt, rd, nreglist, rm);
10538  }
10539  void Vtbl(DataType dt,
10540            DRegister rd,
10541            const NeonRegisterList& nreglist,
10542            DRegister rm) {
10543    Vtbl(al, dt, rd, nreglist, rm);
10544  }
10545
10546  void Vtbx(Condition cond,
10547            DataType dt,
10548            DRegister rd,
10549            const NeonRegisterList& nreglist,
10550            DRegister rm) {
10551    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10552    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10553    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10554    VIXL_ASSERT(allow_macro_instructions_);
10555    VIXL_ASSERT(OutsideITBlock());
10556    MacroEmissionCheckScope guard(this);
10557    ITScope it_scope(this, &cond);
10558    vtbx(cond, dt, rd, nreglist, rm);
10559  }
10560  void Vtbx(DataType dt,
10561            DRegister rd,
10562            const NeonRegisterList& nreglist,
10563            DRegister rm) {
10564    Vtbx(al, dt, rd, nreglist, rm);
10565  }
10566
10567  void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10570    VIXL_ASSERT(allow_macro_instructions_);
10571    VIXL_ASSERT(OutsideITBlock());
10572    MacroEmissionCheckScope guard(this);
10573    ITScope it_scope(this, &cond);
10574    vtrn(cond, dt, rd, rm);
10575  }
10576  void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); }
10577
10578  void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10581    VIXL_ASSERT(allow_macro_instructions_);
10582    VIXL_ASSERT(OutsideITBlock());
10583    MacroEmissionCheckScope guard(this);
10584    ITScope it_scope(this, &cond);
10585    vtrn(cond, dt, rd, rm);
10586  }
10587  void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); }
10588
10589  void Vtst(
10590      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10591    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10592    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10593    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10594    VIXL_ASSERT(allow_macro_instructions_);
10595    VIXL_ASSERT(OutsideITBlock());
10596    MacroEmissionCheckScope guard(this);
10597    ITScope it_scope(this, &cond);
10598    vtst(cond, dt, rd, rn, rm);
10599  }
10600  void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10601    Vtst(al, dt, rd, rn, rm);
10602  }
10603
10604  void Vtst(
10605      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10607    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10608    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10609    VIXL_ASSERT(allow_macro_instructions_);
10610    VIXL_ASSERT(OutsideITBlock());
10611    MacroEmissionCheckScope guard(this);
10612    ITScope it_scope(this, &cond);
10613    vtst(cond, dt, rd, rn, rm);
10614  }
10615  void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10616    Vtst(al, dt, rd, rn, rm);
10617  }
10618
10619  void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10621    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10622    VIXL_ASSERT(allow_macro_instructions_);
10623    VIXL_ASSERT(OutsideITBlock());
10624    MacroEmissionCheckScope guard(this);
10625    ITScope it_scope(this, &cond);
10626    vuzp(cond, dt, rd, rm);
10627  }
10628  void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); }
10629
10630  void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10631    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10632    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10633    VIXL_ASSERT(allow_macro_instructions_);
10634    VIXL_ASSERT(OutsideITBlock());
10635    MacroEmissionCheckScope guard(this);
10636    ITScope it_scope(this, &cond);
10637    vuzp(cond, dt, rd, rm);
10638  }
10639  void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); }
10640
10641  void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10642    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10643    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10644    VIXL_ASSERT(allow_macro_instructions_);
10645    VIXL_ASSERT(OutsideITBlock());
10646    MacroEmissionCheckScope guard(this);
10647    ITScope it_scope(this, &cond);
10648    vzip(cond, dt, rd, rm);
10649  }
10650  void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); }
10651
10652  void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10655    VIXL_ASSERT(allow_macro_instructions_);
10656    VIXL_ASSERT(OutsideITBlock());
10657    MacroEmissionCheckScope guard(this);
10658    ITScope it_scope(this, &cond);
10659    vzip(cond, dt, rd, rm);
10660  }
10661  void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); }
10662
10663  void Yield(Condition cond) {
10664    VIXL_ASSERT(allow_macro_instructions_);
10665    VIXL_ASSERT(OutsideITBlock());
10666    MacroEmissionCheckScope guard(this);
10667    ITScope it_scope(this, &cond);
10668    yield(cond);
10669  }
10670  void Yield() { Yield(al); }
10671  void Vabs(Condition cond, VRegister rd, VRegister rm) {
10672    VIXL_ASSERT(rd.IsS() || rd.IsD());
10673    VIXL_ASSERT(rd.GetType() == rm.GetType());
10674    if (rd.IsS()) {
10675      Vabs(cond, F32, rd.S(), rm.S());
10676    } else {
10677      Vabs(cond, F64, rd.D(), rm.D());
10678    }
10679  }
10680  void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); }
10681  void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10682    VIXL_ASSERT(rd.IsS() || rd.IsD());
10683    VIXL_ASSERT(rd.GetType() == rn.GetType());
10684    VIXL_ASSERT(rd.GetType() == rm.GetType());
10685    if (rd.IsS()) {
10686      Vadd(cond, F32, rd.S(), rn.S(), rm.S());
10687    } else {
10688      Vadd(cond, F64, rd.D(), rn.D(), rm.D());
10689    }
10690  }
10691  void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); }
10692  void Vcmp(Condition cond, VRegister rd, VRegister rm) {
10693    VIXL_ASSERT(rd.IsS() || rd.IsD());
10694    VIXL_ASSERT(rd.GetType() == rm.GetType());
10695    if (rd.IsS()) {
10696      Vcmp(cond, F32, rd.S(), rm.S());
10697    } else {
10698      Vcmp(cond, F64, rd.D(), rm.D());
10699    }
10700  }
10701  void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); }
10702  void Vcmpe(Condition cond, VRegister rd, VRegister rm) {
10703    VIXL_ASSERT(rd.IsS() || rd.IsD());
10704    VIXL_ASSERT(rd.GetType() == rm.GetType());
10705    if (rd.IsS()) {
10706      Vcmpe(cond, F32, rd.S(), rm.S());
10707    } else {
10708      Vcmpe(cond, F64, rd.D(), rm.D());
10709    }
10710  }
10711  void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); }
10712  void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10713    VIXL_ASSERT(rd.IsS() || rd.IsD());
10714    VIXL_ASSERT(rd.GetType() == rn.GetType());
10715    VIXL_ASSERT(rd.GetType() == rm.GetType());
10716    if (rd.IsS()) {
10717      Vdiv(cond, F32, rd.S(), rn.S(), rm.S());
10718    } else {
10719      Vdiv(cond, F64, rd.D(), rn.D(), rm.D());
10720    }
10721  }
10722  void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); }
10723  void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10724    VIXL_ASSERT(rd.IsS() || rd.IsD());
10725    VIXL_ASSERT(rd.GetType() == rn.GetType());
10726    VIXL_ASSERT(rd.GetType() == rm.GetType());
10727    if (rd.IsS()) {
10728      Vfma(cond, F32, rd.S(), rn.S(), rm.S());
10729    } else {
10730      Vfma(cond, F64, rd.D(), rn.D(), rm.D());
10731    }
10732  }
10733  void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); }
10734  void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10735    VIXL_ASSERT(rd.IsS() || rd.IsD());
10736    VIXL_ASSERT(rd.GetType() == rn.GetType());
10737    VIXL_ASSERT(rd.GetType() == rm.GetType());
10738    if (rd.IsS()) {
10739      Vfms(cond, F32, rd.S(), rn.S(), rm.S());
10740    } else {
10741      Vfms(cond, F64, rd.D(), rn.D(), rm.D());
10742    }
10743  }
10744  void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); }
10745  void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10746    VIXL_ASSERT(rd.IsS() || rd.IsD());
10747    VIXL_ASSERT(rd.GetType() == rn.GetType());
10748    VIXL_ASSERT(rd.GetType() == rm.GetType());
10749    if (rd.IsS()) {
10750      Vfnma(cond, F32, rd.S(), rn.S(), rm.S());
10751    } else {
10752      Vfnma(cond, F64, rd.D(), rn.D(), rm.D());
10753    }
10754  }
10755  void Vfnma(VRegister rd, VRegister rn, VRegister rm) {
10756    Vfnma(al, rd, rn, rm);
10757  }
10758  void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10759    VIXL_ASSERT(rd.IsS() || rd.IsD());
10760    VIXL_ASSERT(rd.GetType() == rn.GetType());
10761    VIXL_ASSERT(rd.GetType() == rm.GetType());
10762    if (rd.IsS()) {
10763      Vfnms(cond, F32, rd.S(), rn.S(), rm.S());
10764    } else {
10765      Vfnms(cond, F64, rd.D(), rn.D(), rm.D());
10766    }
10767  }
10768  void Vfnms(VRegister rd, VRegister rn, VRegister rm) {
10769    Vfnms(al, rd, rn, rm);
10770  }
10771  void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) {
10772    VIXL_ASSERT(rd.IsS() || rd.IsD());
10773    VIXL_ASSERT(rd.GetType() == rn.GetType());
10774    VIXL_ASSERT(rd.GetType() == rm.GetType());
10775    if (rd.IsS()) {
10776      Vmaxnm(F32, rd.S(), rn.S(), rm.S());
10777    } else {
10778      Vmaxnm(F64, rd.D(), rn.D(), rm.D());
10779    }
10780  }
10781  void Vminnm(VRegister rd, VRegister rn, VRegister rm) {
10782    VIXL_ASSERT(rd.IsS() || rd.IsD());
10783    VIXL_ASSERT(rd.GetType() == rn.GetType());
10784    VIXL_ASSERT(rd.GetType() == rm.GetType());
10785    if (rd.IsS()) {
10786      Vminnm(F32, rd.S(), rn.S(), rm.S());
10787    } else {
10788      Vminnm(F64, rd.D(), rn.D(), rm.D());
10789    }
10790  }
10791  void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10792    VIXL_ASSERT(rd.IsS() || rd.IsD());
10793    VIXL_ASSERT(rd.GetType() == rn.GetType());
10794    VIXL_ASSERT(rd.GetType() == rm.GetType());
10795    if (rd.IsS()) {
10796      Vmla(cond, F32, rd.S(), rn.S(), rm.S());
10797    } else {
10798      Vmla(cond, F64, rd.D(), rn.D(), rm.D());
10799    }
10800  }
10801  void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); }
10802  void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10803    VIXL_ASSERT(rd.IsS() || rd.IsD());
10804    VIXL_ASSERT(rd.GetType() == rn.GetType());
10805    VIXL_ASSERT(rd.GetType() == rm.GetType());
10806    if (rd.IsS()) {
10807      Vmls(cond, F32, rd.S(), rn.S(), rm.S());
10808    } else {
10809      Vmls(cond, F64, rd.D(), rn.D(), rm.D());
10810    }
10811  }
10812  void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); }
10813  void Vmov(Condition cond, VRegister rd, VRegister rm) {
10814    VIXL_ASSERT(rd.IsS() || rd.IsD());
10815    VIXL_ASSERT(rd.GetType() == rm.GetType());
10816    if (rd.IsS()) {
10817      Vmov(cond, F32, rd.S(), rm.S());
10818    } else {
10819      Vmov(cond, F64, rd.D(), rm.D());
10820    }
10821  }
10822  void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); }
10823  void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10824    VIXL_ASSERT(rd.IsS() || rd.IsD());
10825    VIXL_ASSERT(rd.GetType() == rn.GetType());
10826    VIXL_ASSERT(rd.GetType() == rm.GetType());
10827    if (rd.IsS()) {
10828      Vmul(cond, F32, rd.S(), rn.S(), rm.S());
10829    } else {
10830      Vmul(cond, F64, rd.D(), rn.D(), rm.D());
10831    }
10832  }
10833  void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); }
10834  void Vneg(Condition cond, VRegister rd, VRegister rm) {
10835    VIXL_ASSERT(rd.IsS() || rd.IsD());
10836    VIXL_ASSERT(rd.GetType() == rm.GetType());
10837    if (rd.IsS()) {
10838      Vneg(cond, F32, rd.S(), rm.S());
10839    } else {
10840      Vneg(cond, F64, rd.D(), rm.D());
10841    }
10842  }
10843  void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); }
10844  void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10845    VIXL_ASSERT(rd.IsS() || rd.IsD());
10846    VIXL_ASSERT(rd.GetType() == rn.GetType());
10847    VIXL_ASSERT(rd.GetType() == rm.GetType());
10848    if (rd.IsS()) {
10849      Vnmla(cond, F32, rd.S(), rn.S(), rm.S());
10850    } else {
10851      Vnmla(cond, F64, rd.D(), rn.D(), rm.D());
10852    }
10853  }
10854  void Vnmla(VRegister rd, VRegister rn, VRegister rm) {
10855    Vnmla(al, rd, rn, rm);
10856  }
10857  void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10858    VIXL_ASSERT(rd.IsS() || rd.IsD());
10859    VIXL_ASSERT(rd.GetType() == rn.GetType());
10860    VIXL_ASSERT(rd.GetType() == rm.GetType());
10861    if (rd.IsS()) {
10862      Vnmls(cond, F32, rd.S(), rn.S(), rm.S());
10863    } else {
10864      Vnmls(cond, F64, rd.D(), rn.D(), rm.D());
10865    }
10866  }
10867  void Vnmls(VRegister rd, VRegister rn, VRegister rm) {
10868    Vnmls(al, rd, rn, rm);
10869  }
10870  void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10871    VIXL_ASSERT(rd.IsS() || rd.IsD());
10872    VIXL_ASSERT(rd.GetType() == rn.GetType());
10873    VIXL_ASSERT(rd.GetType() == rm.GetType());
10874    if (rd.IsS()) {
10875      Vnmul(cond, F32, rd.S(), rn.S(), rm.S());
10876    } else {
10877      Vnmul(cond, F64, rd.D(), rn.D(), rm.D());
10878    }
10879  }
10880  void Vnmul(VRegister rd, VRegister rn, VRegister rm) {
10881    Vnmul(al, rd, rn, rm);
10882  }
10883  void Vseleq(VRegister rd, VRegister rn, VRegister rm) {
10884    VIXL_ASSERT(rd.IsS() || rd.IsD());
10885    VIXL_ASSERT(rd.GetType() == rn.GetType());
10886    VIXL_ASSERT(rd.GetType() == rm.GetType());
10887    if (rd.IsS()) {
10888      Vseleq(F32, rd.S(), rn.S(), rm.S());
10889    } else {
10890      Vseleq(F64, rd.D(), rn.D(), rm.D());
10891    }
10892  }
10893  void Vselge(VRegister rd, VRegister rn, VRegister rm) {
10894    VIXL_ASSERT(rd.IsS() || rd.IsD());
10895    VIXL_ASSERT(rd.GetType() == rn.GetType());
10896    VIXL_ASSERT(rd.GetType() == rm.GetType());
10897    if (rd.IsS()) {
10898      Vselge(F32, rd.S(), rn.S(), rm.S());
10899    } else {
10900      Vselge(F64, rd.D(), rn.D(), rm.D());
10901    }
10902  }
10903  void Vselgt(VRegister rd, VRegister rn, VRegister rm) {
10904    VIXL_ASSERT(rd.IsS() || rd.IsD());
10905    VIXL_ASSERT(rd.GetType() == rn.GetType());
10906    VIXL_ASSERT(rd.GetType() == rm.GetType());
10907    if (rd.IsS()) {
10908      Vselgt(F32, rd.S(), rn.S(), rm.S());
10909    } else {
10910      Vselgt(F64, rd.D(), rn.D(), rm.D());
10911    }
10912  }
10913  void Vselvs(VRegister rd, VRegister rn, VRegister rm) {
10914    VIXL_ASSERT(rd.IsS() || rd.IsD());
10915    VIXL_ASSERT(rd.GetType() == rn.GetType());
10916    VIXL_ASSERT(rd.GetType() == rm.GetType());
10917    if (rd.IsS()) {
10918      Vselvs(F32, rd.S(), rn.S(), rm.S());
10919    } else {
10920      Vselvs(F64, rd.D(), rn.D(), rm.D());
10921    }
10922  }
10923  void Vsqrt(Condition cond, VRegister rd, VRegister rm) {
10924    VIXL_ASSERT(rd.IsS() || rd.IsD());
10925    VIXL_ASSERT(rd.GetType() == rm.GetType());
10926    if (rd.IsS()) {
10927      Vsqrt(cond, F32, rd.S(), rm.S());
10928    } else {
10929      Vsqrt(cond, F64, rd.D(), rm.D());
10930    }
10931  }
10932  void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); }
10933  void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10934    VIXL_ASSERT(rd.IsS() || rd.IsD());
10935    VIXL_ASSERT(rd.GetType() == rn.GetType());
10936    VIXL_ASSERT(rd.GetType() == rm.GetType());
10937    if (rd.IsS()) {
10938      Vsub(cond, F32, rd.S(), rn.S(), rm.S());
10939    } else {
10940      Vsub(cond, F64, rd.D(), rn.D(), rm.D());
10941    }
10942  }
10943  void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); }
10944  // End of generated code.
10945
10946  virtual bool AllowUnpredictable() VIXL_OVERRIDE {
10947    VIXL_ABORT_WITH_MSG("Unpredictable instruction.\n");
10948    return false;
10949  }
10950  virtual bool AllowStronglyDiscouraged() VIXL_OVERRIDE {
10951    VIXL_ABORT_WITH_MSG(
10952        "ARM strongly recommends to not use this instruction.\n");
10953    return false;
10954  }
10955
10956 private:
10957  RegisterList available_;
10958  VRegisterList available_vfp_;
10959  UseScratchRegisterScope* current_scratch_scope_;
10960  MacroAssemblerContext context_;
10961  Label::Offset checkpoint_;
10962  LiteralPoolManager literal_pool_manager_;
10963  VeneerPoolManager veneer_pool_manager_;
10964  bool generate_simulator_code_;
10965  bool allow_macro_instructions_;
10966};
10967
10968// This scope utility allows scratch registers to be managed safely. The
10969// MacroAssembler's GetScratchRegisterList() is used as a pool of scratch
10970// registers. These registers can be allocated on demand, and will be returned
10971// at the end of the scope.
10972//
10973// When the scope ends, the MacroAssembler's lists will be restored to their
10974// original state, even if the lists were modified by some other means.
10975//
10976// Scopes must nest perfectly. That is, they must be destructed in reverse
10977// construction order. Otherwise, it is not clear how to handle cases where one
10978// scope acquires a register that was included in a now-closing scope. With
10979// perfect nesting, this cannot occur.
10980class UseScratchRegisterScope {
10981 public:
10982  // This constructor implicitly calls the `Open` function to initialise the
10983  // scope, so it is ready to use immediately after it has been constructed.
10984  explicit UseScratchRegisterScope(MacroAssembler* masm)
10985      : masm_(NULL), parent_(NULL), old_available_(0), old_available_vfp_(0) {
10986    Open(masm);
10987  }
10988  // This constructor allows deferred and optional initialisation of the scope.
10989  // The user is required to explicitly call the `Open` function before using
10990  // the scope.
10991  UseScratchRegisterScope()
10992      : masm_(NULL), parent_(NULL), old_available_(0), old_available_vfp_(0) {}
10993
10994  // This function performs the actual initialisation work.
10995  void Open(MacroAssembler* masm);
10996
10997  // The destructor always implicitly calls the `Close` function.
10998  ~UseScratchRegisterScope() { Close(); }
10999
11000  // This function performs the cleaning-up work. It must succeed even if the
11001  // scope has not been opened. It is safe to call multiple times.
11002  void Close();
11003
11004  bool IsAvailable(const Register& reg) const;
11005  bool IsAvailable(const VRegister& reg) const;
11006
11007  // Take a register from the temp list. It will be returned automatically when
11008  // the scope ends.
11009  Register Acquire();
11010  VRegister AcquireV(unsigned size_in_bits);
11011  QRegister AcquireQ();
11012  DRegister AcquireD();
11013  SRegister AcquireS();
11014
11015  // Explicitly release an acquired (or excluded) register, putting it back in
11016  // the temp list.
11017  void Release(const Register& reg);
11018  void Release(const VRegister& reg);
11019
11020  // Make the specified registers available as scratch registers for the
11021  // duration of this scope.
11022  void Include(const RegisterList& list);
11023  void Include(const Register& reg1,
11024               const Register& reg2 = NoReg,
11025               const Register& reg3 = NoReg,
11026               const Register& reg4 = NoReg) {
11027    Include(RegisterList(reg1, reg2, reg3, reg4));
11028  }
11029  void Include(const VRegisterList& list);
11030  void Include(const VRegister& reg1,
11031               const VRegister& reg2 = NoVReg,
11032               const VRegister& reg3 = NoVReg,
11033               const VRegister& reg4 = NoVReg) {
11034    Include(VRegisterList(reg1, reg2, reg3, reg4));
11035  }
11036
11037  // Make sure that the specified registers are not available in this scope.
11038  // This can be used to prevent helper functions from using sensitive
11039  // registers, for example.
11040  void Exclude(const RegisterList& list);
11041  void Exclude(const Register& reg1,
11042               const Register& reg2 = NoReg,
11043               const Register& reg3 = NoReg,
11044               const Register& reg4 = NoReg) {
11045    Exclude(RegisterList(reg1, reg2, reg3, reg4));
11046  }
11047  void Exclude(const VRegisterList& list);
11048  void Exclude(const VRegister& reg1,
11049               const VRegister& reg2 = NoVReg,
11050               const VRegister& reg3 = NoVReg,
11051               const VRegister& reg4 = NoVReg) {
11052    Exclude(VRegisterList(reg1, reg2, reg3, reg4));
11053  }
11054
11055  // A convenience helper to exclude any registers used by the operand.
11056  void Exclude(const Operand& operand);
11057
11058  // Prevent any scratch registers from being used in this scope.
11059  void ExcludeAll();
11060
11061 private:
11062  // The MacroAssembler maintains a list of available scratch registers, and
11063  // also keeps track of the most recently-opened scope so that on destruction
11064  // we can check that scopes do not outlive their parents.
11065  MacroAssembler* masm_;
11066  UseScratchRegisterScope* parent_;
11067
11068  // The state of the available lists at the start of this scope.
11069  uint32_t old_available_;      // kRRegister
11070  uint64_t old_available_vfp_;  // kVRegister
11071
11072  VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) {
11073    VIXL_UNREACHABLE();
11074  }
11075  VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) {
11076    VIXL_UNREACHABLE();
11077  }
11078};
11079
11080
11081}  // namespace aarch32
11082}  // namespace vixl
11083
11084#endif  // VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
11085