macro-assembler-aarch32.h revision 4a30c5d68ebbc271d6d876d828ffa96db53d8d7c
1// Copyright 2015, VIXL authors 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// * Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// * Redistributions in binary form must reproduce the above copyright 10// notice, this list of conditions and the following disclaimer in the 11// documentation and/or other materials provided with the distribution. 12// * Neither the name of ARM Limited nor the names of its contributors may 13// be used to endorse or promote products derived from this software 14// without specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26// POSSIBILITY OF SUCH DAMAGE. 27 28#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_ 29#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_ 30 31#include "code-generation-scopes-vixl.h" 32#include "macro-assembler-interface.h" 33#include "utils-vixl.h" 34 35#include "aarch32/instructions-aarch32.h" 36#include "aarch32/assembler-aarch32.h" 37#include "aarch32/operands-aarch32.h" 38 39namespace vixl { 40namespace aarch32 { 41 42class JumpTableBase; 43 44enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 }; 45 46// LiteralPool class, defined as a container for literals 47class LiteralPool { 48 public: 49 typedef std::list<RawLiteral*>::iterator RawLiteralListIterator; 50 51 public: 52 LiteralPool() : size_(0) {} 53 ~LiteralPool() { 54 VIXL_ASSERT(literals_.empty() && (size_ == 0)); 55 for (RawLiteralListIterator literal_it = keep_until_delete_.begin(); 56 literal_it != keep_until_delete_.end(); 57 literal_it++) { 58 delete *literal_it; 59 } 60 keep_until_delete_.clear(); 61 } 62 63 unsigned GetSize() const { return size_; } 64 65 // Add a literal to the literal container. 66 void AddLiteral(RawLiteral* literal) { 67 // Manually placed literals can't be added to a literal pool. 68 VIXL_ASSERT(!literal->IsManuallyPlaced()); 69 VIXL_ASSERT(!literal->IsBound()); 70 if (literal->GetPositionInPool() == Label::kMaxOffset) { 71 uint32_t position = GetSize(); 72 literal->SetPositionInPool(position); 73 literals_.push_back(literal); 74 size_ += literal->GetAlignedSize(); 75 } 76 } 77 78 // First literal to be emitted. 79 RawLiteralListIterator GetFirst() { return literals_.begin(); } 80 81 // Mark the end of the literal container. 82 RawLiteralListIterator GetEnd() { return literals_.end(); } 83 84 // Remove all the literals from the container. 85 // If the literal's memory management has been delegated to the container 86 // it will be delete'd. 87 void Clear() { 88 for (RawLiteralListIterator literal_it = GetFirst(); literal_it != GetEnd(); 89 literal_it++) { 90 RawLiteral* literal = *literal_it; 91 switch (literal->GetDeletionPolicy()) { 92 case RawLiteral::kDeletedOnPlacementByPool: 93 delete literal; 94 break; 95 case RawLiteral::kDeletedOnPoolDestruction: 96 keep_until_delete_.push_back(literal); 97 break; 98 case RawLiteral::kManuallyDeleted: 99 break; 100 } 101 } 102 literals_.clear(); 103 size_ = 0; 104 } 105 106 private: 107 // Size (in bytes and including alignments) of the literal pool. 108 unsigned size_; 109 110 // Literal container. 111 std::list<RawLiteral*> literals_; 112 // Already bound Literal container the app requested this pool to keep. 113 std::list<RawLiteral*> keep_until_delete_; 114}; 115 116 117// Macro assembler for aarch32 instruction set. 118class MacroAssembler : public Assembler, public MacroAssemblerInterface { 119 public: 120 enum EmitOption { kBranchRequired, kNoBranchRequired }; 121 122 virtual internal::AssemblerBase* AsAssemblerBase() VIXL_OVERRIDE { 123 return this; 124 } 125 126 virtual void BlockPools() VIXL_OVERRIDE { 127 literal_pool_manager_.Block(); 128 veneer_pool_manager_.Block(); 129 } 130 virtual void ReleasePools() VIXL_OVERRIDE { 131 literal_pool_manager_.Release(); 132 veneer_pool_manager_.Release(); 133 } 134 virtual void EnsureEmitPoolsFor(size_t size) VIXL_OVERRIDE { 135 // TODO: Optimise this. It also checks that there is space in the buffer, 136 // which we do not need to do here. 137 VIXL_ASSERT(IsUint32(size)); 138 EnsureEmitFor(static_cast<uint32_t>(size)); 139 } 140 141 private: 142 class MacroEmissionCheckScope : public EmissionCheckScope { 143 public: 144 explicit MacroEmissionCheckScope(MacroAssemblerInterface* masm) 145 : EmissionCheckScope(masm, kTypicalMacroInstructionMaxSize) {} 146 147 private: 148 static const size_t kTypicalMacroInstructionMaxSize = 149 8 * kMaxInstructionSizeInBytes; 150 }; 151 152 class MacroAssemblerContext { 153 public: 154 MacroAssemblerContext() : count_(0) {} 155 ~MacroAssemblerContext() {} 156 unsigned GetRecursiveCount() const { return count_; } 157 void Up(const char* loc) { 158 location_stack_[count_] = loc; 159 count_++; 160 if (count_ >= kMaxRecursion) { 161 printf( 162 "Recursion limit reached; unable to resolve macro assembler " 163 "call.\n"); 164 printf("Macro assembler context stack:\n"); 165 for (unsigned i = 0; i < kMaxRecursion; i++) { 166 printf("%10s %s\n", (i == 0) ? "oldest -> " : "", location_stack_[i]); 167 } 168 VIXL_ABORT(); 169 } 170 } 171 void Down() { 172 VIXL_ASSERT((count_ > 0) && (count_ < kMaxRecursion)); 173 count_--; 174 } 175 176 private: 177 unsigned count_; 178 static const uint32_t kMaxRecursion = 5; 179 const char* location_stack_[kMaxRecursion]; 180 }; 181 182 // This scope is used at each Delegate entry to avoid infinite recursion of 183 // Delegate calls. The limit is defined by 184 // MacroAssemblerContext::kMaxRecursion. 185 class ContextScope { 186 public: 187 explicit ContextScope(MacroAssembler* const masm, const char* loc) 188 : masm_(masm) { 189 VIXL_ASSERT(masm_->AllowMacroInstructions()); 190 masm_->GetContext()->Up(loc); 191 } 192 ~ContextScope() { masm_->GetContext()->Down(); } 193 194 private: 195 MacroAssembler* const masm_; 196 }; 197 198 MacroAssemblerContext* GetContext() { return &context_; } 199 200 class ITScope { 201 public: 202 ITScope(MacroAssembler* masm, Condition* cond, bool can_use_it = false) 203 : masm_(masm), cond_(*cond), can_use_it_(can_use_it) { 204 if (!cond_.Is(al) && masm->IsUsingT32()) { 205 if (can_use_it_) { 206 // IT is not deprecated (that implies a 16 bit T32 instruction). 207 // We generate an IT instruction and a conditional instruction. 208 masm->it(cond_); 209 } else { 210 // The usage of IT is deprecated for the instruction. 211 // We generate a conditional branch and an unconditional instruction. 212 // TODO: Use a scope utility with a size check. To do that, we'd need 213 // one with Open() and Close() implemented. 214 masm_->EnsureEmitFor(kMaxT32MacroInstructionSizeInBytes); 215 // Generate the branch. 216 masm_->b(cond_.Negate(), Narrow, &label_); 217 // Tell the macro-assembler to generate unconditional instructions. 218 *cond = al; 219 } 220 } 221#ifdef VIXL_DEBUG 222 initial_cursor_offset_ = masm->GetCursorOffset(); 223#else 224 USE(initial_cursor_offset_); 225#endif 226 } 227 ~ITScope() { 228 if (label_.IsReferenced()) { 229 // We only use the label for conditional T32 instructions for which we 230 // cannot use IT. 231 VIXL_ASSERT(!cond_.Is(al)); 232 VIXL_ASSERT(masm_->IsUsingT32()); 233 VIXL_ASSERT(!can_use_it_); 234 VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <= 235 kMaxT32MacroInstructionSizeInBytes); 236 masm_->BindHelper(&label_); 237 } else if (masm_->IsUsingT32() && !cond_.Is(al)) { 238 // If we've generated a conditional T32 instruction but haven't used the 239 // label, we must have used IT. Check that we did not generate a 240 // deprecated sequence. 241 VIXL_ASSERT(can_use_it_); 242 VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <= 243 k16BitT32InstructionSizeInBytes); 244 } 245 } 246 247 private: 248 MacroAssembler* masm_; 249 Condition cond_; 250 Label label_; 251 bool can_use_it_; 252 uint32_t initial_cursor_offset_; 253 }; 254 255 template <Assembler::InstructionCondDtDL asmfn> 256 class EmitLiteralCondDtDL { 257 public: 258 EmitLiteralCondDtDL(Condition cond, DataType dt, DRegister rt) 259 : cond_(cond), dt_(dt), rt_(rt) {} 260 void emit(MacroAssembler* const masm, RawLiteral* const literal) { 261 (masm->*asmfn)(cond_, dt_, rt_, literal); 262 } 263 264 private: 265 Condition cond_; 266 DataType dt_; 267 DRegister rt_; 268 }; 269 270 template <Assembler::InstructionCondDtSL asmfn> 271 class EmitLiteralCondDtSL { 272 public: 273 EmitLiteralCondDtSL(Condition cond, DataType dt, SRegister rt) 274 : cond_(cond), dt_(dt), rt_(rt) {} 275 void emit(MacroAssembler* const masm, RawLiteral* const literal) { 276 (masm->*asmfn)(cond_, dt_, rt_, literal); 277 } 278 279 private: 280 Condition cond_; 281 DataType dt_; 282 SRegister rt_; 283 }; 284 285 template <Assembler::InstructionCondRL asmfn> 286 class EmitLiteralCondRL { 287 public: 288 EmitLiteralCondRL(Condition cond, Register rt) : cond_(cond), rt_(rt) {} 289 void emit(MacroAssembler* const masm, RawLiteral* const literal) { 290 (masm->*asmfn)(cond_, rt_, literal); 291 } 292 293 private: 294 Condition cond_; 295 Register rt_; 296 }; 297 298 template <Assembler::InstructionCondRRL asmfn> 299 class EmitLiteralCondRRL { 300 public: 301 EmitLiteralCondRRL(Condition cond, Register rt, Register rt2) 302 : cond_(cond), rt_(rt), rt2_(rt2) {} 303 void emit(MacroAssembler* const masm, RawLiteral* const literal) { 304 (masm->*asmfn)(cond_, rt_, rt2_, literal); 305 } 306 307 private: 308 Condition cond_; 309 Register rt_, rt2_; 310 }; 311 312 class LiteralPoolManager { 313 public: 314 explicit LiteralPoolManager(MacroAssembler* const masm) 315 : masm_(masm), monitor_(0) { 316 ResetCheckpoint(); 317 } 318 319 void ResetCheckpoint() { checkpoint_ = Label::kMaxOffset; } 320 321 LiteralPool* GetLiteralPool() { return &literal_pool_; } 322 Label::Offset GetCheckpoint() const { 323 // Make room for a branch over the pools. 324 return checkpoint_ - kMaxInstructionSizeInBytes; 325 } 326 size_t GetLiteralPoolSize() const { return literal_pool_.GetSize(); } 327 328 // Checks if the insertion of the literal will put the forward reference 329 // too far in the literal pool. 330 // This function is called after generating an instruction with a literal. 331 // We want to know if the literal can be reached by the instruction. 332 // If not, we will unwind the instruction, generate the pool (without the 333 // last literal) and generate the instruction again. 334 // "literal" is the literal we want to insert into the pool. 335 // "from" is the location where the instruction which uses the literal has 336 // been generated. 337 bool IsInsertTooFar(RawLiteral* literal, uint32_t from) const { 338 // Last accessible location for the instruction which uses the literal. 339 uint32_t checkpoint = from + literal->GetLastInsertForwardDistance(); 340 checkpoint = 341 std::min(checkpoint, static_cast<uint32_t>(literal->GetCheckpoint())); 342 // Compare the checkpoint to the location where the literal should be 343 // added. 344 // We add space for two instructions: one branch and one potential veneer 345 // which may be added after the check. In this particular use case, no 346 // veneer can be added but, this way, we are consistent with all the 347 // literal pool checks. 348 bool too_far = 349 AlignDown(checkpoint, 4) < 350 from + literal_pool_.GetSize() + 2 * kMaxInstructionSizeInBytes; 351 return too_far; 352 } 353 354 // Set the different checkpoints where the literal pool has to be emited. 355 void UpdateCheckpoint(RawLiteral* literal) { 356 // The literal should have been placed somewhere in the literal pool 357 VIXL_ASSERT(literal->GetPositionInPool() != Label::kMaxOffset); 358 // TODO(all): Consider AddForwardRef as a virtual so the checkpoint is 359 // updated when inserted. Or move checkpoint_ into Label, 360 literal->UpdateCheckpoint(); 361 Label::Offset tmp = 362 literal->GetAlignedCheckpoint(4) - literal->GetPositionInPool(); 363 if (checkpoint_ > tmp) { 364 checkpoint_ = tmp; 365 masm_->ComputeCheckpoint(); 366 } 367 } 368 369 bool IsEmpty() const { return GetLiteralPoolSize() == 0; } 370 371 void Block() { monitor_++; } 372 void Release() { 373 VIXL_ASSERT(IsBlocked()); 374 if (--monitor_ == 0) { 375 // Ensure the pool has not been blocked for too long. 376 VIXL_ASSERT(masm_->GetCursorOffset() <= checkpoint_); 377 } 378 } 379 bool IsBlocked() const { return monitor_ != 0; } 380 381 private: 382 MacroAssembler* const masm_; 383 LiteralPool literal_pool_; 384 385 // Max offset in the code buffer where the literal needs to be 386 // emitted. A default value of Label::kMaxOffset means that the checkpoint 387 // is invalid. 388 Label::Offset checkpoint_; 389 // Indicates whether the emission of this pool is blocked. 390 int monitor_; 391 }; 392 393 void PerformEnsureEmit(Label::Offset target, uint32_t extra_size); 394 395 protected: 396 void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm); 397 void PadToMinimumBranchRange(Label* label); 398 399 // Generate the instruction and if it's not possible revert the whole thing. 400 // emit the literal pool and regenerate the instruction. 401 // Note: The instruction is generated via 402 // void T::emit(MacroAssembler* const, RawLiteral* const) 403 template <typename T> 404 void GenerateInstruction(T instr_callback, RawLiteral* const literal) { 405 int32_t cursor = GetCursorOffset(); 406 uint32_t where = cursor + GetArchitectureStatePCOffset(); 407 // Emit the instruction, via the assembler 408 { 409 MacroEmissionCheckScope guard(this); 410 instr_callback.emit(this, literal); 411 } 412 if (!literal->IsManuallyPlaced() && !literal->IsBound()) { 413 if (IsInsertTooFar(literal, where)) { 414 // The instruction's data is too far: revert the emission 415 GetBuffer()->Rewind(cursor); 416 literal->InvalidateLastForwardReference(RawLiteral::kNoUpdateNecessary); 417 EmitLiteralPool(kBranchRequired); 418 MacroEmissionCheckScope guard(this); 419 instr_callback.emit(this, literal); 420 } 421 literal_pool_manager_.GetLiteralPool()->AddLiteral(literal); 422 literal_pool_manager_.UpdateCheckpoint(literal); 423 } 424 } 425 426 public: 427 explicit MacroAssembler(InstructionSet isa = A32) 428 : Assembler(isa), 429 available_(r12), 430 checkpoint_(Label::kMaxOffset), 431 literal_pool_manager_(this), 432 veneer_pool_manager_(this), 433 generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE), 434 doing_veneer_pool_generation_(false) { 435#ifdef VIXL_DEBUG 436 SetAllowMacroInstructions(true); 437#else 438 USE(literal_pool_manager_); 439 USE(allow_macro_instructions_); 440#endif 441 ComputeCheckpoint(); 442 } 443 explicit MacroAssembler(size_t size, InstructionSet isa = A32) 444 : Assembler(size, isa), 445 available_(r12), 446 checkpoint_(Label::kMaxOffset), 447 literal_pool_manager_(this), 448 veneer_pool_manager_(this), 449 generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE), 450 doing_veneer_pool_generation_(false) { 451#ifdef VIXL_DEBUG 452 SetAllowMacroInstructions(true); 453#endif 454 ComputeCheckpoint(); 455 } 456 MacroAssembler(byte* buffer, size_t size, InstructionSet isa = A32) 457 : Assembler(buffer, size, isa), 458 available_(r12), 459 checkpoint_(Label::kMaxOffset), 460 literal_pool_manager_(this), 461 veneer_pool_manager_(this), 462 generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE), 463 doing_veneer_pool_generation_(false) { 464#ifdef VIXL_DEBUG 465 SetAllowMacroInstructions(true); 466#endif 467 ComputeCheckpoint(); 468 } 469 470 bool GenerateSimulatorCode() const { return generate_simulator_code_; } 471 472 // Tell whether any of the macro instruction can be used. When false the 473 // MacroAssembler will assert if a method which can emit a variable number 474 // of instructions is called. 475 virtual void SetAllowMacroInstructions(bool value) VIXL_OVERRIDE { 476 allow_macro_instructions_ = value; 477 } 478 virtual bool AllowMacroInstructions() const VIXL_OVERRIDE { 479 return allow_macro_instructions_; 480 } 481 482 void FinalizeCode() { 483 EmitLiteralPool(kNoBranchRequired); 484 Assembler::FinalizeCode(); 485 } 486 487 RegisterList* GetScratchRegisterList() { return &available_; } 488 VRegisterList* GetScratchVRegisterList() { return &available_vfp_; } 489 490 // Given an address calculation (Register + immediate), generate code to 491 // partially compute the address. The returned MemOperand will perform any 492 // remaining computation in a subsequent load or store instruction. 493 // 494 // The offset provided should be the offset that would be used in a load or 495 // store instruction (if it had sufficient range). This only matters where 496 // base.Is(pc), since load and store instructions align the pc before 497 // dereferencing it. 498 // 499 // TODO: Improve the handling of negative offsets. They are not implemented 500 // precisely for now because they only have a marginal benefit for the 501 // existing uses (in delegates). 502 MemOperand MemOperandComputationHelper(Condition cond, 503 Register scratch, 504 Register base, 505 uint32_t offset, 506 uint32_t extra_offset_mask = 0); 507 508 MemOperand MemOperandComputationHelper(Register scratch, 509 Register base, 510 uint32_t offset, 511 uint32_t extra_offset_mask = 0) { 512 return MemOperandComputationHelper(al, 513 scratch, 514 base, 515 offset, 516 extra_offset_mask); 517 } 518 MemOperand MemOperandComputationHelper(Condition cond, 519 Register scratch, 520 Label* label, 521 uint32_t extra_offset_mask = 0) { 522 // Check for buffer space _before_ calculating the offset, in case we 523 // generate a pool that affects the offset calculation. 524 CodeBufferCheckScope scope(this, 4 * kMaxInstructionSizeInBytes); 525 Label::Offset offset = 526 label->GetLocation() - 527 AlignDown(GetCursorOffset() + GetArchitectureStatePCOffset(), 4); 528 return MemOperandComputationHelper(cond, 529 scratch, 530 pc, 531 offset, 532 extra_offset_mask); 533 } 534 MemOperand MemOperandComputationHelper(Register scratch, 535 Label* label, 536 uint32_t extra_offset_mask = 0) { 537 return MemOperandComputationHelper(al, scratch, label, extra_offset_mask); 538 } 539 540 // Determine the appropriate mask to pass into MemOperandComputationHelper. 541 uint32_t GetOffsetMask(InstructionType type, AddrMode addrmode); 542 543 // State and type helpers. 544 bool IsModifiedImmediate(uint32_t imm) { 545 return (IsUsingT32() && ImmediateT32(imm).IsValid()) || 546 ImmediateA32(imm).IsValid(); 547 } 548 549 void Bind(Label* label) { 550 VIXL_ASSERT(allow_macro_instructions_); 551 PadToMinimumBranchRange(label); 552 BindHelper(label); 553 } 554 555 void AddBranchLabel(Label* label) { 556 if (label->IsBound()) return; 557 veneer_pool_manager_.AddLabel(label); 558 } 559 560 void Place(RawLiteral* literal) { 561 VIXL_ASSERT(allow_macro_instructions_); 562 VIXL_ASSERT(literal->IsManuallyPlaced()); 563 // We have two calls to `GetBuffer()->Align()` below, that aligns on word 564 // (4 bytes) boundaries. Only one is taken into account in 565 // `GetAlignedSize()`. 566 static const size_t kMaxAlignSize = 3; 567 size_t size = literal->GetAlignedSize() + kMaxAlignSize; 568 VIXL_ASSERT(IsUint32(size)); 569 // TODO: We should use a scope here to check the size of data emitted. We 570 // currently cannot because `aarch32::CodeBufferCheckScope` currently checks 571 // for pools, so that could lead to an infinite loop. 572 EnsureEmitFor(static_cast<uint32_t>(size)); 573 // Literals must be emitted aligned on word (4 bytes) boundaries. 574 GetBuffer()->Align(); 575 PlaceHelper(literal); 576 GetBuffer()->Align(); 577 } 578 579 void ComputeCheckpoint(); 580 581 int32_t GetMarginBeforeVeneerEmission() const { 582 return veneer_pool_manager_.GetCheckpoint() - GetCursorOffset(); 583 } 584 585 Label::Offset GetTargetForLiteralEmission() const { 586 if (literal_pool_manager_.IsEmpty()) return Label::kMaxOffset; 587 // We add an instruction to the size as the instruction which calls this 588 // function may add a veneer and, without this extra instruction, could put 589 // the literals out of range. For example, it's the case for a "B" 590 // instruction. At the beginning of the instruction we call EnsureEmitFor 591 // which calls this function. However, the target of the branch hasn't been 592 // inserted yet in the veneer pool. 593 size_t veneer_max_size = 594 veneer_pool_manager_.GetMaxSize() + kMaxInstructionSizeInBytes; 595 VIXL_ASSERT(IsInt32(veneer_max_size)); 596 // We must be able to generate the veneer pool first. 597 Label::Offset tmp = literal_pool_manager_.GetCheckpoint() - 598 static_cast<Label::Offset>(veneer_max_size); 599 VIXL_ASSERT(tmp >= 0); 600 return tmp; 601 } 602 603 int32_t GetMarginBeforeLiteralEmission() const { 604 Label::Offset tmp = GetTargetForLiteralEmission(); 605 VIXL_ASSERT(tmp >= GetCursorOffset()); 606 return tmp - GetCursorOffset(); 607 } 608 609 bool VeneerPoolIsEmpty() const { return veneer_pool_manager_.IsEmpty(); } 610 bool LiteralPoolIsEmpty() const { return literal_pool_manager_.IsEmpty(); } 611 612 void EnsureEmitFor(uint32_t size) { 613 Label::Offset target = GetCursorOffset() + size; 614 if (target <= checkpoint_) return; 615 PerformEnsureEmit(target, size); 616 } 617 618 bool IsInsertTooFar(RawLiteral* literal, uint32_t where) { 619 return literal_pool_manager_.IsInsertTooFar(literal, where); 620 } 621 622 bool AliasesAvailableScratchRegister(Register reg) { 623 return GetScratchRegisterList()->Includes(reg); 624 } 625 626 bool AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg) { 627 if (reg.IsAPSR_nzcv()) return false; 628 return GetScratchRegisterList()->Includes(reg.AsRegister()); 629 } 630 631 bool AliasesAvailableScratchRegister(VRegister reg) { 632 return GetScratchVRegisterList()->IncludesAliasOf(reg); 633 } 634 635 bool AliasesAvailableScratchRegister(const Operand& operand) { 636 if (operand.IsImmediate()) return false; 637 return AliasesAvailableScratchRegister(operand.GetBaseRegister()) || 638 (operand.IsRegisterShiftedRegister() && 639 AliasesAvailableScratchRegister(operand.GetShiftRegister())); 640 } 641 642 bool AliasesAvailableScratchRegister(const NeonOperand& operand) { 643 if (operand.IsImmediate()) return false; 644 return AliasesAvailableScratchRegister(operand.GetRegister()); 645 } 646 647 bool AliasesAvailableScratchRegister(SRegisterList list) { 648 for (int n = 0; n < list.GetLength(); n++) { 649 if (AliasesAvailableScratchRegister(list.GetSRegister(n))) return true; 650 } 651 return false; 652 } 653 654 bool AliasesAvailableScratchRegister(DRegisterList list) { 655 for (int n = 0; n < list.GetLength(); n++) { 656 if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true; 657 } 658 return false; 659 } 660 661 bool AliasesAvailableScratchRegister(NeonRegisterList list) { 662 for (int n = 0; n < list.GetLength(); n++) { 663 if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true; 664 } 665 return false; 666 } 667 668 bool AliasesAvailableScratchRegister(RegisterList list) { 669 return GetScratchRegisterList()->Overlaps(list); 670 } 671 672 bool AliasesAvailableScratchRegister(const MemOperand& operand) { 673 return AliasesAvailableScratchRegister(operand.GetBaseRegister()) || 674 (operand.IsShiftedRegister() && 675 AliasesAvailableScratchRegister(operand.GetOffsetRegister())); 676 } 677 678 // Emit the literal pool in the code buffer. 679 // Every literal is placed on a 32bit boundary 680 // All the literals in the pool will be removed from the pool and potentially 681 // delete'd. 682 void EmitLiteralPool(LiteralPool* const literal_pool, EmitOption option); 683 void EmitLiteralPool(EmitOption option = kBranchRequired) { 684 VIXL_ASSERT(!literal_pool_manager_.IsBlocked()); 685 EmitLiteralPool(literal_pool_manager_.GetLiteralPool(), option); 686 literal_pool_manager_.ResetCheckpoint(); 687 ComputeCheckpoint(); 688 } 689 690 size_t GetLiteralPoolSize() const { 691 return literal_pool_manager_.GetLiteralPoolSize(); 692 } 693 694 // Adr with a literal already constructed. Add the literal to the pool if it 695 // is not already done. 696 void Adr(Condition cond, Register rd, RawLiteral* literal) { 697 EmitLiteralCondRL<&Assembler::adr> emit_helper(cond, rd); 698 GenerateInstruction(emit_helper, literal); 699 } 700 void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); } 701 702 // Loads with literals already constructed. Add the literal to the pool 703 // if it is not already done. 704 void Ldr(Condition cond, Register rt, RawLiteral* literal) { 705 EmitLiteralCondRL<&Assembler::ldr> emit_helper(cond, rt); 706 GenerateInstruction(emit_helper, literal); 707 } 708 void Ldr(Register rt, RawLiteral* literal) { Ldr(al, rt, literal); } 709 710 void Ldrb(Condition cond, Register rt, RawLiteral* literal) { 711 EmitLiteralCondRL<&Assembler::ldrb> emit_helper(cond, rt); 712 GenerateInstruction(emit_helper, literal); 713 } 714 void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); } 715 716 void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) { 717 EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(cond, rt, rt2); 718 GenerateInstruction(emit_helper, literal); 719 } 720 void Ldrd(Register rt, Register rt2, RawLiteral* literal) { 721 Ldrd(al, rt, rt2, literal); 722 } 723 724 void Ldrh(Condition cond, Register rt, RawLiteral* literal) { 725 EmitLiteralCondRL<&Assembler::ldrh> emit_helper(cond, rt); 726 GenerateInstruction(emit_helper, literal); 727 } 728 void Ldrh(Register rt, RawLiteral* literal) { Ldrh(al, rt, literal); } 729 730 void Ldrsb(Condition cond, Register rt, RawLiteral* literal) { 731 EmitLiteralCondRL<&Assembler::ldrsb> emit_helper(cond, rt); 732 GenerateInstruction(emit_helper, literal); 733 } 734 void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); } 735 736 void Ldrsh(Condition cond, Register rt, RawLiteral* literal) { 737 EmitLiteralCondRL<&Assembler::ldrsh> emit_helper(cond, rt); 738 GenerateInstruction(emit_helper, literal); 739 } 740 void Ldrsh(Register rt, RawLiteral* literal) { Ldrsh(al, rt, literal); } 741 742 void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) { 743 EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(cond, dt, rd); 744 GenerateInstruction(emit_helper, literal); 745 } 746 void Vldr(DataType dt, DRegister rd, RawLiteral* literal) { 747 Vldr(al, dt, rd, literal); 748 } 749 void Vldr(Condition cond, DRegister rd, RawLiteral* literal) { 750 Vldr(cond, Untyped64, rd, literal); 751 } 752 void Vldr(DRegister rd, RawLiteral* literal) { 753 Vldr(al, Untyped64, rd, literal); 754 } 755 756 void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) { 757 EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(cond, dt, rd); 758 GenerateInstruction(emit_helper, literal); 759 } 760 void Vldr(DataType dt, SRegister rd, RawLiteral* literal) { 761 Vldr(al, dt, rd, literal); 762 } 763 void Vldr(Condition cond, SRegister rd, RawLiteral* literal) { 764 Vldr(cond, Untyped32, rd, literal); 765 } 766 void Vldr(SRegister rd, RawLiteral* literal) { 767 Vldr(al, Untyped32, rd, literal); 768 } 769 770 // Generic Ldr(register, data) 771 void Ldr(Condition cond, Register rt, uint32_t v) { 772 RawLiteral* literal = 773 new Literal<uint32_t>(v, RawLiteral::kDeletedOnPlacementByPool); 774 EmitLiteralCondRL<&Assembler::ldr> emit_helper(cond, rt); 775 GenerateInstruction(emit_helper, literal); 776 } 777 template <typename T> 778 void Ldr(Register rt, T v) { 779 Ldr(al, rt, v); 780 } 781 782 // Generic Ldrd(rt, rt2, data) 783 void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) { 784 RawLiteral* literal = 785 new Literal<uint64_t>(v, RawLiteral::kDeletedOnPlacementByPool); 786 EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(cond, rt, rt2); 787 GenerateInstruction(emit_helper, literal); 788 } 789 template <typename T> 790 void Ldrd(Register rt, Register rt2, T v) { 791 Ldrd(al, rt, rt2, v); 792 } 793 794 void Vldr(Condition cond, SRegister rd, float v) { 795 RawLiteral* literal = 796 new Literal<float>(v, RawLiteral::kDeletedOnPlacementByPool); 797 EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(cond, Untyped32, rd); 798 GenerateInstruction(emit_helper, literal); 799 } 800 void Vldr(SRegister rd, float v) { Vldr(al, rd, v); } 801 802 void Vldr(Condition cond, DRegister rd, double v) { 803 RawLiteral* literal = 804 new Literal<double>(v, RawLiteral::kDeletedOnPlacementByPool); 805 EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(cond, Untyped64, rd); 806 GenerateInstruction(emit_helper, literal); 807 } 808 void Vldr(DRegister rd, double v) { Vldr(al, rd, v); } 809 810 void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); } 811 void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); } 812 void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); } 813 void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); } 814 815 void Switch(Register reg, JumpTableBase* table); 816 void GenerateSwitchTable(JumpTableBase* table, int table_size); 817 void Case(JumpTableBase* table, int case_index); 818 void Break(JumpTableBase* table); 819 void Default(JumpTableBase* table); 820 void EndSwitch(JumpTableBase* table); 821 822 // Claim memory on the stack. 823 // Note that the Claim, Drop, and Peek helpers below ensure that offsets used 824 // are multiples of 32 bits to help maintain 32-bit SP alignment. 825 // We could `Align{Up,Down}(size, 4)`, but that's potentially problematic: 826 // Claim(3) 827 // Claim(1) 828 // Drop(4) 829 // would seem correct, when in fact: 830 // Claim(3) -> sp = sp - 4 831 // Claim(1) -> sp = sp - 4 832 // Drop(4) -> sp = sp + 4 833 // 834 void Claim(int32_t size) { 835 if (size == 0) return; 836 // The stack must be kept 32bit aligned. 837 VIXL_ASSERT((size > 0) && ((size % 4) == 0)); 838 Sub(sp, sp, size); 839 } 840 // Release memory on the stack 841 void Drop(int32_t size) { 842 if (size == 0) return; 843 // The stack must be kept 32bit aligned. 844 VIXL_ASSERT((size > 0) && ((size % 4) == 0)); 845 Add(sp, sp, size); 846 } 847 void Peek(Register dst, int32_t offset) { 848 VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0)); 849 Ldr(dst, MemOperand(sp, offset)); 850 } 851 void Poke(Register src, int32_t offset) { 852 VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0)); 853 Str(src, MemOperand(sp, offset)); 854 } 855 void Printf(const char* format, 856 CPURegister reg1 = NoReg, 857 CPURegister reg2 = NoReg, 858 CPURegister reg3 = NoReg, 859 CPURegister reg4 = NoReg); 860 // Functions used by Printf for generation. 861 void PushRegister(CPURegister reg); 862 void PreparePrintfArgument(CPURegister reg, 863 int* core_count, 864 int* vfp_count, 865 uint32_t* printf_type); 866 // Handlers for cases not handled by the assembler. 867 // ADD, MOVT, MOVW, SUB, SXTB16, TEQ, UXTB16 868 virtual void Delegate(InstructionType type, 869 InstructionCondROp instruction, 870 Condition cond, 871 Register rn, 872 const Operand& operand) VIXL_OVERRIDE; 873 // CMN, CMP, MOV, MOVS, MVN, MVNS, SXTB, SXTH, TST, UXTB, UXTH 874 virtual void Delegate(InstructionType type, 875 InstructionCondSizeROp instruction, 876 Condition cond, 877 EncodingSize size, 878 Register rn, 879 const Operand& operand) VIXL_OVERRIDE; 880 // ADDW, ORN, ORNS, PKHBT, PKHTB, RSC, RSCS, SUBW, SXTAB, SXTAB16, SXTAH, 881 // UXTAB, UXTAB16, UXTAH 882 virtual void Delegate(InstructionType type, 883 InstructionCondRROp instruction, 884 Condition cond, 885 Register rd, 886 Register rn, 887 const Operand& operand) VIXL_OVERRIDE; 888 // ADC, ADCS, ADD, ADDS, AND, ANDS, ASR, ASRS, BIC, BICS, EOR, EORS, LSL, 889 // LSLS, LSR, LSRS, ORR, ORRS, ROR, RORS, RSB, RSBS, SBC, SBCS, SUB, SUBS 890 virtual void Delegate(InstructionType type, 891 InstructionCondSizeRL instruction, 892 Condition cond, 893 EncodingSize size, 894 Register rd, 895 Label* label) VIXL_OVERRIDE; 896 virtual void Delegate(InstructionType type, 897 InstructionCondSizeRROp instruction, 898 Condition cond, 899 EncodingSize size, 900 Register rd, 901 Register rn, 902 const Operand& operand) VIXL_OVERRIDE; 903 // CBNZ, CBZ 904 virtual void Delegate(InstructionType type, 905 InstructionRL instruction, 906 Register rn, 907 Label* label) VIXL_OVERRIDE; 908 // VMOV 909 virtual void Delegate(InstructionType type, 910 InstructionCondDtSSop instruction, 911 Condition cond, 912 DataType dt, 913 SRegister rd, 914 const SOperand& operand) VIXL_OVERRIDE; 915 // VMOV, VMVN 916 virtual void Delegate(InstructionType type, 917 InstructionCondDtDDop instruction, 918 Condition cond, 919 DataType dt, 920 DRegister rd, 921 const DOperand& operand) VIXL_OVERRIDE; 922 // VMOV, VMVN 923 virtual void Delegate(InstructionType type, 924 InstructionCondDtQQop instruction, 925 Condition cond, 926 DataType dt, 927 QRegister rd, 928 const QOperand& operand) VIXL_OVERRIDE; 929 // LDR, LDRB, LDRH, LDRSB, LDRSH, STR, STRB, STRH 930 virtual void Delegate(InstructionType type, 931 InstructionCondSizeRMop instruction, 932 Condition cond, 933 EncodingSize size, 934 Register rd, 935 const MemOperand& operand) VIXL_OVERRIDE; 936 // LDAEXD, LDRD, LDREXD, STLEX, STLEXB, STLEXH, STRD, STREX, STREXB, STREXH 937 virtual void Delegate(InstructionType type, 938 InstructionCondRL instruction, 939 Condition cond, 940 Register rt, 941 Label* label) VIXL_OVERRIDE; 942 virtual void Delegate(InstructionType type, 943 InstructionCondRRL instruction, 944 Condition cond, 945 Register rt, 946 Register rt2, 947 Label* label) VIXL_OVERRIDE; 948 virtual void Delegate(InstructionType type, 949 InstructionCondRRMop instruction, 950 Condition cond, 951 Register rt, 952 Register rt2, 953 const MemOperand& operand) VIXL_OVERRIDE; 954 // VLDR, VSTR 955 virtual void Delegate(InstructionType type, 956 InstructionCondDtSMop instruction, 957 Condition cond, 958 DataType dt, 959 SRegister rd, 960 const MemOperand& operand) VIXL_OVERRIDE; 961 // VLDR, VSTR 962 virtual void Delegate(InstructionType type, 963 InstructionCondDtDMop instruction, 964 Condition cond, 965 DataType dt, 966 DRegister rd, 967 const MemOperand& operand) VIXL_OVERRIDE; 968 // MSR 969 virtual void Delegate(InstructionType type, 970 InstructionCondMsrOp instruction, 971 Condition cond, 972 MaskedSpecialRegister spec_reg, 973 const Operand& operand) VIXL_OVERRIDE; 974 virtual void Delegate(InstructionType type, 975 InstructionCondDtDL instruction, 976 Condition cond, 977 DataType dt, 978 DRegister rd, 979 Label* label) VIXL_OVERRIDE; 980 virtual void Delegate(InstructionType type, 981 InstructionCondDtSL instruction, 982 Condition cond, 983 DataType dt, 984 SRegister rd, 985 Label* label) VIXL_OVERRIDE; 986 987 // Start of generated code. 988 989 void Adc(Condition cond, Register rd, Register rn, const Operand& operand) { 990 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 992 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 993 VIXL_ASSERT(allow_macro_instructions_); 994 VIXL_ASSERT(OutsideITBlock()); 995 MacroEmissionCheckScope guard(this); 996 bool can_use_it = 997 // ADC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 998 operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) && 999 operand.GetBaseRegister().IsLow(); 1000 ITScope it_scope(this, &cond, can_use_it); 1001 adc(cond, rd, rn, operand); 1002 } 1003 void Adc(Register rd, Register rn, const Operand& operand) { 1004 Adc(al, rd, rn, operand); 1005 } 1006 void Adc(FlagsUpdate flags, 1007 Condition cond, 1008 Register rd, 1009 Register rn, 1010 const Operand& operand) { 1011 switch (flags) { 1012 case LeaveFlags: 1013 Adc(cond, rd, rn, operand); 1014 break; 1015 case SetFlags: 1016 Adcs(cond, rd, rn, operand); 1017 break; 1018 case DontCare: 1019 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1020 rn.Is(rd) && operand.IsPlainRegister() && 1021 operand.GetBaseRegister().IsLow(); 1022 if (setflags_is_smaller) { 1023 Adcs(cond, rd, rn, operand); 1024 } else { 1025 Adc(cond, rd, rn, operand); 1026 } 1027 break; 1028 } 1029 } 1030 void Adc(FlagsUpdate flags, 1031 Register rd, 1032 Register rn, 1033 const Operand& operand) { 1034 Adc(flags, al, rd, rn, operand); 1035 } 1036 1037 void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) { 1038 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1039 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1040 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1041 VIXL_ASSERT(allow_macro_instructions_); 1042 VIXL_ASSERT(OutsideITBlock()); 1043 MacroEmissionCheckScope guard(this); 1044 ITScope it_scope(this, &cond); 1045 adcs(cond, rd, rn, operand); 1046 } 1047 void Adcs(Register rd, Register rn, const Operand& operand) { 1048 Adcs(al, rd, rn, operand); 1049 } 1050 1051 void Add(Condition cond, Register rd, Register rn, const Operand& operand) { 1052 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1053 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1054 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1055 VIXL_ASSERT(allow_macro_instructions_); 1056 VIXL_ASSERT(OutsideITBlock()); 1057 MacroEmissionCheckScope guard(this); 1058 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) { 1059 uint32_t immediate = operand.GetImmediate(); 1060 if (immediate == 0) { 1061 return; 1062 } 1063 } 1064 bool can_use_it = 1065 // ADD<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1 1066 (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() && 1067 rd.IsLow()) || 1068 // ADD<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2 1069 (operand.IsImmediate() && (operand.GetImmediate() <= 255) && 1070 rd.IsLow() && rn.Is(rd)) || 1071 // ADD{<c>}{<q>} <Rd>, SP, #<imm8> ; T1 1072 (operand.IsImmediate() && (operand.GetImmediate() <= 1020) && 1073 ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) || 1074 // ADD<c>{<q>} <Rd>, <Rn>, <Rm> 1075 (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 1076 operand.GetBaseRegister().IsLow()) || 1077 // ADD<c>{<q>} <Rdn>, <Rm> ; T2 1078 (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) && 1079 !operand.GetBaseRegister().IsSP() && 1080 !operand.GetBaseRegister().IsPC()) || 1081 // ADD{<c>}{<q>} {<Rdm>,} SP, <Rdm> ; T1 1082 (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() && 1083 operand.GetBaseRegister().Is(rd)); 1084 ITScope it_scope(this, &cond, can_use_it); 1085 add(cond, rd, rn, operand); 1086 } 1087 void Add(Register rd, Register rn, const Operand& operand) { 1088 Add(al, rd, rn, operand); 1089 } 1090 void Add(FlagsUpdate flags, 1091 Condition cond, 1092 Register rd, 1093 Register rn, 1094 const Operand& operand) { 1095 switch (flags) { 1096 case LeaveFlags: 1097 Add(cond, rd, rn, operand); 1098 break; 1099 case SetFlags: 1100 Adds(cond, rd, rn, operand); 1101 break; 1102 case DontCare: 1103 bool setflags_is_smaller = 1104 IsUsingT32() && cond.Is(al) && 1105 ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 1106 operand.GetBaseRegister().IsLow()) || 1107 (operand.IsImmediate() && 1108 ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) || 1109 (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256))))); 1110 if (setflags_is_smaller) { 1111 Adds(cond, rd, rn, operand); 1112 } else { 1113 bool changed_op_is_smaller = 1114 operand.IsImmediate() && (operand.GetSignedImmediate() < 0) && 1115 ((rd.IsLow() && rn.IsLow() && 1116 (operand.GetSignedImmediate() >= -7)) || 1117 (rd.IsLow() && rn.Is(rd) && 1118 (operand.GetSignedImmediate() >= -255))); 1119 if (changed_op_is_smaller) { 1120 Subs(cond, rd, rn, -operand.GetSignedImmediate()); 1121 } else { 1122 Add(cond, rd, rn, operand); 1123 } 1124 } 1125 break; 1126 } 1127 } 1128 void Add(FlagsUpdate flags, 1129 Register rd, 1130 Register rn, 1131 const Operand& operand) { 1132 Add(flags, al, rd, rn, operand); 1133 } 1134 1135 void Adds(Condition cond, Register rd, Register rn, const Operand& operand) { 1136 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1137 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1138 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1139 VIXL_ASSERT(allow_macro_instructions_); 1140 VIXL_ASSERT(OutsideITBlock()); 1141 MacroEmissionCheckScope guard(this); 1142 ITScope it_scope(this, &cond); 1143 adds(cond, rd, rn, operand); 1144 } 1145 void Adds(Register rd, Register rn, const Operand& operand) { 1146 Adds(al, rd, rn, operand); 1147 } 1148 1149 1150 void Adr(Condition cond, Register rd, Label* label) { 1151 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1152 VIXL_ASSERT(allow_macro_instructions_); 1153 VIXL_ASSERT(OutsideITBlock()); 1154 MacroEmissionCheckScope guard(this); 1155 ITScope it_scope(this, &cond); 1156 adr(cond, rd, label); 1157 } 1158 void Adr(Register rd, Label* label) { Adr(al, rd, label); } 1159 1160 void And(Condition cond, Register rd, Register rn, const Operand& operand) { 1161 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1162 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1163 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1164 VIXL_ASSERT(allow_macro_instructions_); 1165 VIXL_ASSERT(OutsideITBlock()); 1166 MacroEmissionCheckScope guard(this); 1167 if (cond.Is(al) && operand.IsImmediate()) { 1168 uint32_t immediate = operand.GetImmediate(); 1169 if (immediate == 0) { 1170 mov(rd, 0); 1171 return; 1172 } 1173 if ((immediate == 0xffffffff) && rd.Is(rn)) { 1174 return; 1175 } 1176 } 1177 bool can_use_it = 1178 // AND<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 1179 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 1180 operand.GetBaseRegister().IsLow(); 1181 ITScope it_scope(this, &cond, can_use_it); 1182 and_(cond, rd, rn, operand); 1183 } 1184 void And(Register rd, Register rn, const Operand& operand) { 1185 And(al, rd, rn, operand); 1186 } 1187 void And(FlagsUpdate flags, 1188 Condition cond, 1189 Register rd, 1190 Register rn, 1191 const Operand& operand) { 1192 switch (flags) { 1193 case LeaveFlags: 1194 And(cond, rd, rn, operand); 1195 break; 1196 case SetFlags: 1197 Ands(cond, rd, rn, operand); 1198 break; 1199 case DontCare: 1200 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1201 rn.Is(rd) && operand.IsPlainRegister() && 1202 operand.GetBaseRegister().IsLow(); 1203 if (setflags_is_smaller) { 1204 Ands(cond, rd, rn, operand); 1205 } else { 1206 And(cond, rd, rn, operand); 1207 } 1208 break; 1209 } 1210 } 1211 void And(FlagsUpdate flags, 1212 Register rd, 1213 Register rn, 1214 const Operand& operand) { 1215 And(flags, al, rd, rn, operand); 1216 } 1217 1218 void Ands(Condition cond, Register rd, Register rn, const Operand& operand) { 1219 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1220 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1221 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1222 VIXL_ASSERT(allow_macro_instructions_); 1223 VIXL_ASSERT(OutsideITBlock()); 1224 MacroEmissionCheckScope guard(this); 1225 ITScope it_scope(this, &cond); 1226 ands(cond, rd, rn, operand); 1227 } 1228 void Ands(Register rd, Register rn, const Operand& operand) { 1229 Ands(al, rd, rn, operand); 1230 } 1231 1232 void Asr(Condition cond, Register rd, Register rm, const Operand& operand) { 1233 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1234 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1235 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1236 VIXL_ASSERT(allow_macro_instructions_); 1237 VIXL_ASSERT(OutsideITBlock()); 1238 MacroEmissionCheckScope guard(this); 1239 bool can_use_it = 1240 // ASR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2 1241 (operand.IsImmediate() && (operand.GetImmediate() >= 1) && 1242 (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) || 1243 // ASR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 1244 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 1245 operand.GetBaseRegister().IsLow()); 1246 ITScope it_scope(this, &cond, can_use_it); 1247 asr(cond, rd, rm, operand); 1248 } 1249 void Asr(Register rd, Register rm, const Operand& operand) { 1250 Asr(al, rd, rm, operand); 1251 } 1252 void Asr(FlagsUpdate flags, 1253 Condition cond, 1254 Register rd, 1255 Register rm, 1256 const Operand& operand) { 1257 switch (flags) { 1258 case LeaveFlags: 1259 Asr(cond, rd, rm, operand); 1260 break; 1261 case SetFlags: 1262 Asrs(cond, rd, rm, operand); 1263 break; 1264 case DontCare: 1265 bool setflags_is_smaller = 1266 IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() && 1267 ((operand.IsImmediate() && (operand.GetImmediate() >= 1) && 1268 (operand.GetImmediate() <= 32)) || 1269 (operand.IsPlainRegister() && rd.Is(rm))); 1270 if (setflags_is_smaller) { 1271 Asrs(cond, rd, rm, operand); 1272 } else { 1273 Asr(cond, rd, rm, operand); 1274 } 1275 break; 1276 } 1277 } 1278 void Asr(FlagsUpdate flags, 1279 Register rd, 1280 Register rm, 1281 const Operand& operand) { 1282 Asr(flags, al, rd, rm, operand); 1283 } 1284 1285 void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) { 1286 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1287 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1288 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1289 VIXL_ASSERT(allow_macro_instructions_); 1290 VIXL_ASSERT(OutsideITBlock()); 1291 MacroEmissionCheckScope guard(this); 1292 ITScope it_scope(this, &cond); 1293 asrs(cond, rd, rm, operand); 1294 } 1295 void Asrs(Register rd, Register rm, const Operand& operand) { 1296 Asrs(al, rd, rm, operand); 1297 } 1298 1299 void B(Condition cond, Label* label, BranchHint hint = kBranchWithoutHint) { 1300 VIXL_ASSERT(allow_macro_instructions_); 1301 VIXL_ASSERT(OutsideITBlock()); 1302 MacroEmissionCheckScope guard(this); 1303 if (hint == kNear) { 1304 if (label->IsBound()) { 1305 b(cond, label); 1306 } else { 1307 b(cond, Narrow, label); 1308 } 1309 } else { 1310 b(cond, label); 1311 } 1312 AddBranchLabel(label); 1313 } 1314 void B(Label* label, BranchHint hint = kBranchWithoutHint) { 1315 B(al, label, hint); 1316 } 1317 void BPreferNear(Condition cond, Label* label) { B(cond, label, kNear); } 1318 void BPreferNear(Label* label) { B(al, label, kNear); } 1319 1320 void Bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand) { 1321 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1322 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1323 VIXL_ASSERT(allow_macro_instructions_); 1324 VIXL_ASSERT(OutsideITBlock()); 1325 MacroEmissionCheckScope guard(this); 1326 ITScope it_scope(this, &cond); 1327 bfc(cond, rd, lsb, operand); 1328 } 1329 void Bfc(Register rd, uint32_t lsb, const Operand& operand) { 1330 Bfc(al, rd, lsb, operand); 1331 } 1332 1333 void Bfi(Condition cond, 1334 Register rd, 1335 Register rn, 1336 uint32_t lsb, 1337 const Operand& operand) { 1338 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1339 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1340 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1341 VIXL_ASSERT(allow_macro_instructions_); 1342 VIXL_ASSERT(OutsideITBlock()); 1343 MacroEmissionCheckScope guard(this); 1344 ITScope it_scope(this, &cond); 1345 bfi(cond, rd, rn, lsb, operand); 1346 } 1347 void Bfi(Register rd, Register rn, uint32_t lsb, const Operand& operand) { 1348 Bfi(al, rd, rn, lsb, operand); 1349 } 1350 1351 void Bic(Condition cond, Register rd, Register rn, const Operand& operand) { 1352 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1353 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1354 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1355 VIXL_ASSERT(allow_macro_instructions_); 1356 VIXL_ASSERT(OutsideITBlock()); 1357 MacroEmissionCheckScope guard(this); 1358 if (cond.Is(al) && operand.IsImmediate()) { 1359 uint32_t immediate = operand.GetImmediate(); 1360 if ((immediate == 0) && rd.Is(rn)) { 1361 return; 1362 } 1363 if (immediate == 0xffffffff) { 1364 mov(rd, 0); 1365 return; 1366 } 1367 } 1368 bool can_use_it = 1369 // BIC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 1370 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 1371 operand.GetBaseRegister().IsLow(); 1372 ITScope it_scope(this, &cond, can_use_it); 1373 bic(cond, rd, rn, operand); 1374 } 1375 void Bic(Register rd, Register rn, const Operand& operand) { 1376 Bic(al, rd, rn, operand); 1377 } 1378 void Bic(FlagsUpdate flags, 1379 Condition cond, 1380 Register rd, 1381 Register rn, 1382 const Operand& operand) { 1383 switch (flags) { 1384 case LeaveFlags: 1385 Bic(cond, rd, rn, operand); 1386 break; 1387 case SetFlags: 1388 Bics(cond, rd, rn, operand); 1389 break; 1390 case DontCare: 1391 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1392 rn.Is(rd) && operand.IsPlainRegister() && 1393 operand.GetBaseRegister().IsLow(); 1394 if (setflags_is_smaller) { 1395 Bics(cond, rd, rn, operand); 1396 } else { 1397 Bic(cond, rd, rn, operand); 1398 } 1399 break; 1400 } 1401 } 1402 void Bic(FlagsUpdate flags, 1403 Register rd, 1404 Register rn, 1405 const Operand& operand) { 1406 Bic(flags, al, rd, rn, operand); 1407 } 1408 1409 void Bics(Condition cond, Register rd, Register rn, const Operand& operand) { 1410 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1411 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1412 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1413 VIXL_ASSERT(allow_macro_instructions_); 1414 VIXL_ASSERT(OutsideITBlock()); 1415 MacroEmissionCheckScope guard(this); 1416 ITScope it_scope(this, &cond); 1417 bics(cond, rd, rn, operand); 1418 } 1419 void Bics(Register rd, Register rn, const Operand& operand) { 1420 Bics(al, rd, rn, operand); 1421 } 1422 1423 void Bkpt(Condition cond, uint32_t imm) { 1424 VIXL_ASSERT(allow_macro_instructions_); 1425 VIXL_ASSERT(OutsideITBlock()); 1426 MacroEmissionCheckScope guard(this); 1427 ITScope it_scope(this, &cond); 1428 bkpt(cond, imm); 1429 } 1430 void Bkpt(uint32_t imm) { Bkpt(al, imm); } 1431 1432 void Bl(Condition cond, Label* label) { 1433 VIXL_ASSERT(allow_macro_instructions_); 1434 VIXL_ASSERT(OutsideITBlock()); 1435 MacroEmissionCheckScope guard(this); 1436 ITScope it_scope(this, &cond); 1437 bl(cond, label); 1438 AddBranchLabel(label); 1439 } 1440 void Bl(Label* label) { Bl(al, label); } 1441 1442 void Blx(Condition cond, Label* label) { 1443 VIXL_ASSERT(allow_macro_instructions_); 1444 VIXL_ASSERT(OutsideITBlock()); 1445 MacroEmissionCheckScope guard(this); 1446 ITScope it_scope(this, &cond); 1447 blx(cond, label); 1448 AddBranchLabel(label); 1449 } 1450 void Blx(Label* label) { Blx(al, label); } 1451 1452 void Blx(Condition cond, Register rm) { 1453 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1454 VIXL_ASSERT(allow_macro_instructions_); 1455 VIXL_ASSERT(OutsideITBlock()); 1456 MacroEmissionCheckScope guard(this); 1457 bool can_use_it = 1458 // BLX{<c>}{<q>} <Rm> ; T1 1459 !rm.IsPC(); 1460 ITScope it_scope(this, &cond, can_use_it); 1461 blx(cond, rm); 1462 } 1463 void Blx(Register rm) { Blx(al, rm); } 1464 1465 void Bx(Condition cond, Register rm) { 1466 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1467 VIXL_ASSERT(allow_macro_instructions_); 1468 VIXL_ASSERT(OutsideITBlock()); 1469 MacroEmissionCheckScope guard(this); 1470 bool can_use_it = 1471 // BX{<c>}{<q>} <Rm> ; T1 1472 !rm.IsPC(); 1473 ITScope it_scope(this, &cond, can_use_it); 1474 bx(cond, rm); 1475 } 1476 void Bx(Register rm) { Bx(al, rm); } 1477 1478 void Bxj(Condition cond, Register rm) { 1479 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1480 VIXL_ASSERT(allow_macro_instructions_); 1481 VIXL_ASSERT(OutsideITBlock()); 1482 MacroEmissionCheckScope guard(this); 1483 ITScope it_scope(this, &cond); 1484 bxj(cond, rm); 1485 } 1486 void Bxj(Register rm) { Bxj(al, rm); } 1487 1488 void Cbnz(Register rn, Label* label) { 1489 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1490 VIXL_ASSERT(allow_macro_instructions_); 1491 VIXL_ASSERT(OutsideITBlock()); 1492 MacroEmissionCheckScope guard(this); 1493 cbnz(rn, label); 1494 AddBranchLabel(label); 1495 } 1496 1497 void Cbz(Register rn, Label* label) { 1498 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1499 VIXL_ASSERT(allow_macro_instructions_); 1500 VIXL_ASSERT(OutsideITBlock()); 1501 MacroEmissionCheckScope guard(this); 1502 cbz(rn, label); 1503 AddBranchLabel(label); 1504 } 1505 1506 void Clrex(Condition cond) { 1507 VIXL_ASSERT(allow_macro_instructions_); 1508 VIXL_ASSERT(OutsideITBlock()); 1509 MacroEmissionCheckScope guard(this); 1510 ITScope it_scope(this, &cond); 1511 clrex(cond); 1512 } 1513 void Clrex() { Clrex(al); } 1514 1515 void Clz(Condition cond, Register rd, Register rm) { 1516 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1517 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1518 VIXL_ASSERT(allow_macro_instructions_); 1519 VIXL_ASSERT(OutsideITBlock()); 1520 MacroEmissionCheckScope guard(this); 1521 ITScope it_scope(this, &cond); 1522 clz(cond, rd, rm); 1523 } 1524 void Clz(Register rd, Register rm) { Clz(al, rd, rm); } 1525 1526 void Cmn(Condition cond, Register rn, const Operand& operand) { 1527 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1528 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1529 VIXL_ASSERT(allow_macro_instructions_); 1530 VIXL_ASSERT(OutsideITBlock()); 1531 MacroEmissionCheckScope guard(this); 1532 bool can_use_it = 1533 // CMN{<c>}{<q>} <Rn>, <Rm> ; T1 1534 operand.IsPlainRegister() && rn.IsLow() && 1535 operand.GetBaseRegister().IsLow(); 1536 ITScope it_scope(this, &cond, can_use_it); 1537 cmn(cond, rn, operand); 1538 } 1539 void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); } 1540 1541 void Cmp(Condition cond, Register rn, const Operand& operand) { 1542 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1543 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1544 VIXL_ASSERT(allow_macro_instructions_); 1545 VIXL_ASSERT(OutsideITBlock()); 1546 MacroEmissionCheckScope guard(this); 1547 bool can_use_it = 1548 // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1 1549 (operand.IsImmediate() && (operand.GetImmediate() <= 255) && 1550 rn.IsLow()) || 1551 // CMP{<c>}{<q>} <Rn>, <Rm> ; T1 T2 1552 (operand.IsPlainRegister() && !rn.IsPC() && 1553 !operand.GetBaseRegister().IsPC()); 1554 ITScope it_scope(this, &cond, can_use_it); 1555 cmp(cond, rn, operand); 1556 } 1557 void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); } 1558 1559 void Crc32b(Condition cond, Register rd, Register rn, Register rm) { 1560 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1561 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1562 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1563 VIXL_ASSERT(allow_macro_instructions_); 1564 VIXL_ASSERT(OutsideITBlock()); 1565 MacroEmissionCheckScope guard(this); 1566 ITScope it_scope(this, &cond); 1567 crc32b(cond, rd, rn, rm); 1568 } 1569 void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); } 1570 1571 void Crc32cb(Condition cond, Register rd, Register rn, Register rm) { 1572 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1573 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1574 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1575 VIXL_ASSERT(allow_macro_instructions_); 1576 VIXL_ASSERT(OutsideITBlock()); 1577 MacroEmissionCheckScope guard(this); 1578 ITScope it_scope(this, &cond); 1579 crc32cb(cond, rd, rn, rm); 1580 } 1581 void Crc32cb(Register rd, Register rn, Register rm) { 1582 Crc32cb(al, rd, rn, rm); 1583 } 1584 1585 void Crc32ch(Condition cond, Register rd, Register rn, Register rm) { 1586 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1587 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1588 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1589 VIXL_ASSERT(allow_macro_instructions_); 1590 VIXL_ASSERT(OutsideITBlock()); 1591 MacroEmissionCheckScope guard(this); 1592 ITScope it_scope(this, &cond); 1593 crc32ch(cond, rd, rn, rm); 1594 } 1595 void Crc32ch(Register rd, Register rn, Register rm) { 1596 Crc32ch(al, rd, rn, rm); 1597 } 1598 1599 void Crc32cw(Condition cond, Register rd, Register rn, Register rm) { 1600 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1601 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1602 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1603 VIXL_ASSERT(allow_macro_instructions_); 1604 VIXL_ASSERT(OutsideITBlock()); 1605 MacroEmissionCheckScope guard(this); 1606 ITScope it_scope(this, &cond); 1607 crc32cw(cond, rd, rn, rm); 1608 } 1609 void Crc32cw(Register rd, Register rn, Register rm) { 1610 Crc32cw(al, rd, rn, rm); 1611 } 1612 1613 void Crc32h(Condition cond, Register rd, Register rn, Register rm) { 1614 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1615 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1616 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1617 VIXL_ASSERT(allow_macro_instructions_); 1618 VIXL_ASSERT(OutsideITBlock()); 1619 MacroEmissionCheckScope guard(this); 1620 ITScope it_scope(this, &cond); 1621 crc32h(cond, rd, rn, rm); 1622 } 1623 void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); } 1624 1625 void Crc32w(Condition cond, Register rd, Register rn, Register rm) { 1626 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1627 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1628 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1629 VIXL_ASSERT(allow_macro_instructions_); 1630 VIXL_ASSERT(OutsideITBlock()); 1631 MacroEmissionCheckScope guard(this); 1632 ITScope it_scope(this, &cond); 1633 crc32w(cond, rd, rn, rm); 1634 } 1635 void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); } 1636 1637 void Dmb(Condition cond, MemoryBarrier option) { 1638 VIXL_ASSERT(allow_macro_instructions_); 1639 VIXL_ASSERT(OutsideITBlock()); 1640 MacroEmissionCheckScope guard(this); 1641 ITScope it_scope(this, &cond); 1642 dmb(cond, option); 1643 } 1644 void Dmb(MemoryBarrier option) { Dmb(al, option); } 1645 1646 void Dsb(Condition cond, MemoryBarrier option) { 1647 VIXL_ASSERT(allow_macro_instructions_); 1648 VIXL_ASSERT(OutsideITBlock()); 1649 MacroEmissionCheckScope guard(this); 1650 ITScope it_scope(this, &cond); 1651 dsb(cond, option); 1652 } 1653 void Dsb(MemoryBarrier option) { Dsb(al, option); } 1654 1655 void Eor(Condition cond, Register rd, Register rn, const Operand& operand) { 1656 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1657 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1658 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1659 VIXL_ASSERT(allow_macro_instructions_); 1660 VIXL_ASSERT(OutsideITBlock()); 1661 MacroEmissionCheckScope guard(this); 1662 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) { 1663 uint32_t immediate = operand.GetImmediate(); 1664 if (immediate == 0) { 1665 return; 1666 } 1667 if (immediate == 0xffffffff) { 1668 mvn(rd, rn); 1669 return; 1670 } 1671 } 1672 bool can_use_it = 1673 // EOR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 1674 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 1675 operand.GetBaseRegister().IsLow(); 1676 ITScope it_scope(this, &cond, can_use_it); 1677 eor(cond, rd, rn, operand); 1678 } 1679 void Eor(Register rd, Register rn, const Operand& operand) { 1680 Eor(al, rd, rn, operand); 1681 } 1682 void Eor(FlagsUpdate flags, 1683 Condition cond, 1684 Register rd, 1685 Register rn, 1686 const Operand& operand) { 1687 switch (flags) { 1688 case LeaveFlags: 1689 Eor(cond, rd, rn, operand); 1690 break; 1691 case SetFlags: 1692 Eors(cond, rd, rn, operand); 1693 break; 1694 case DontCare: 1695 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1696 rn.Is(rd) && operand.IsPlainRegister() && 1697 operand.GetBaseRegister().IsLow(); 1698 if (setflags_is_smaller) { 1699 Eors(cond, rd, rn, operand); 1700 } else { 1701 Eor(cond, rd, rn, operand); 1702 } 1703 break; 1704 } 1705 } 1706 void Eor(FlagsUpdate flags, 1707 Register rd, 1708 Register rn, 1709 const Operand& operand) { 1710 Eor(flags, al, rd, rn, operand); 1711 } 1712 1713 void Eors(Condition cond, Register rd, Register rn, const Operand& operand) { 1714 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1715 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1716 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1717 VIXL_ASSERT(allow_macro_instructions_); 1718 VIXL_ASSERT(OutsideITBlock()); 1719 MacroEmissionCheckScope guard(this); 1720 ITScope it_scope(this, &cond); 1721 eors(cond, rd, rn, operand); 1722 } 1723 void Eors(Register rd, Register rn, const Operand& operand) { 1724 Eors(al, rd, rn, operand); 1725 } 1726 1727 void Fldmdbx(Condition cond, 1728 Register rn, 1729 WriteBack write_back, 1730 DRegisterList dreglist) { 1731 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1732 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1733 VIXL_ASSERT(allow_macro_instructions_); 1734 VIXL_ASSERT(OutsideITBlock()); 1735 MacroEmissionCheckScope guard(this); 1736 ITScope it_scope(this, &cond); 1737 fldmdbx(cond, rn, write_back, dreglist); 1738 } 1739 void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) { 1740 Fldmdbx(al, rn, write_back, dreglist); 1741 } 1742 1743 void Fldmiax(Condition cond, 1744 Register rn, 1745 WriteBack write_back, 1746 DRegisterList dreglist) { 1747 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1748 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1749 VIXL_ASSERT(allow_macro_instructions_); 1750 VIXL_ASSERT(OutsideITBlock()); 1751 MacroEmissionCheckScope guard(this); 1752 ITScope it_scope(this, &cond); 1753 fldmiax(cond, rn, write_back, dreglist); 1754 } 1755 void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) { 1756 Fldmiax(al, rn, write_back, dreglist); 1757 } 1758 1759 void Fstmdbx(Condition cond, 1760 Register rn, 1761 WriteBack write_back, 1762 DRegisterList dreglist) { 1763 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1764 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1765 VIXL_ASSERT(allow_macro_instructions_); 1766 VIXL_ASSERT(OutsideITBlock()); 1767 MacroEmissionCheckScope guard(this); 1768 ITScope it_scope(this, &cond); 1769 fstmdbx(cond, rn, write_back, dreglist); 1770 } 1771 void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) { 1772 Fstmdbx(al, rn, write_back, dreglist); 1773 } 1774 1775 void Fstmiax(Condition cond, 1776 Register rn, 1777 WriteBack write_back, 1778 DRegisterList dreglist) { 1779 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1780 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1781 VIXL_ASSERT(allow_macro_instructions_); 1782 VIXL_ASSERT(OutsideITBlock()); 1783 MacroEmissionCheckScope guard(this); 1784 ITScope it_scope(this, &cond); 1785 fstmiax(cond, rn, write_back, dreglist); 1786 } 1787 void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) { 1788 Fstmiax(al, rn, write_back, dreglist); 1789 } 1790 1791 void Hlt(Condition cond, uint32_t imm) { 1792 VIXL_ASSERT(allow_macro_instructions_); 1793 VIXL_ASSERT(OutsideITBlock()); 1794 MacroEmissionCheckScope guard(this); 1795 ITScope it_scope(this, &cond); 1796 hlt(cond, imm); 1797 } 1798 void Hlt(uint32_t imm) { Hlt(al, imm); } 1799 1800 void Hvc(Condition cond, uint32_t imm) { 1801 VIXL_ASSERT(allow_macro_instructions_); 1802 VIXL_ASSERT(OutsideITBlock()); 1803 MacroEmissionCheckScope guard(this); 1804 ITScope it_scope(this, &cond); 1805 hvc(cond, imm); 1806 } 1807 void Hvc(uint32_t imm) { Hvc(al, imm); } 1808 1809 void Isb(Condition cond, MemoryBarrier option) { 1810 VIXL_ASSERT(allow_macro_instructions_); 1811 VIXL_ASSERT(OutsideITBlock()); 1812 MacroEmissionCheckScope guard(this); 1813 ITScope it_scope(this, &cond); 1814 isb(cond, option); 1815 } 1816 void Isb(MemoryBarrier option) { Isb(al, option); } 1817 1818 void Lda(Condition cond, Register rt, const MemOperand& operand) { 1819 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1820 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1821 VIXL_ASSERT(allow_macro_instructions_); 1822 VIXL_ASSERT(OutsideITBlock()); 1823 MacroEmissionCheckScope guard(this); 1824 ITScope it_scope(this, &cond); 1825 lda(cond, rt, operand); 1826 } 1827 void Lda(Register rt, const MemOperand& operand) { Lda(al, rt, operand); } 1828 1829 void Ldab(Condition cond, Register rt, const MemOperand& operand) { 1830 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1831 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1832 VIXL_ASSERT(allow_macro_instructions_); 1833 VIXL_ASSERT(OutsideITBlock()); 1834 MacroEmissionCheckScope guard(this); 1835 ITScope it_scope(this, &cond); 1836 ldab(cond, rt, operand); 1837 } 1838 void Ldab(Register rt, const MemOperand& operand) { Ldab(al, rt, operand); } 1839 1840 void Ldaex(Condition cond, Register rt, const MemOperand& operand) { 1841 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1842 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1843 VIXL_ASSERT(allow_macro_instructions_); 1844 VIXL_ASSERT(OutsideITBlock()); 1845 MacroEmissionCheckScope guard(this); 1846 ITScope it_scope(this, &cond); 1847 ldaex(cond, rt, operand); 1848 } 1849 void Ldaex(Register rt, const MemOperand& operand) { Ldaex(al, rt, operand); } 1850 1851 void Ldaexb(Condition cond, Register rt, const MemOperand& operand) { 1852 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1853 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1854 VIXL_ASSERT(allow_macro_instructions_); 1855 VIXL_ASSERT(OutsideITBlock()); 1856 MacroEmissionCheckScope guard(this); 1857 ITScope it_scope(this, &cond); 1858 ldaexb(cond, rt, operand); 1859 } 1860 void Ldaexb(Register rt, const MemOperand& operand) { 1861 Ldaexb(al, rt, operand); 1862 } 1863 1864 void Ldaexd(Condition cond, 1865 Register rt, 1866 Register rt2, 1867 const MemOperand& operand) { 1868 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1869 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 1870 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1871 VIXL_ASSERT(allow_macro_instructions_); 1872 VIXL_ASSERT(OutsideITBlock()); 1873 MacroEmissionCheckScope guard(this); 1874 ITScope it_scope(this, &cond); 1875 ldaexd(cond, rt, rt2, operand); 1876 } 1877 void Ldaexd(Register rt, Register rt2, const MemOperand& operand) { 1878 Ldaexd(al, rt, rt2, operand); 1879 } 1880 1881 void Ldaexh(Condition cond, Register rt, const MemOperand& operand) { 1882 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1883 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1884 VIXL_ASSERT(allow_macro_instructions_); 1885 VIXL_ASSERT(OutsideITBlock()); 1886 MacroEmissionCheckScope guard(this); 1887 ITScope it_scope(this, &cond); 1888 ldaexh(cond, rt, operand); 1889 } 1890 void Ldaexh(Register rt, const MemOperand& operand) { 1891 Ldaexh(al, rt, operand); 1892 } 1893 1894 void Ldah(Condition cond, Register rt, const MemOperand& operand) { 1895 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1896 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1897 VIXL_ASSERT(allow_macro_instructions_); 1898 VIXL_ASSERT(OutsideITBlock()); 1899 MacroEmissionCheckScope guard(this); 1900 ITScope it_scope(this, &cond); 1901 ldah(cond, rt, operand); 1902 } 1903 void Ldah(Register rt, const MemOperand& operand) { Ldah(al, rt, operand); } 1904 1905 void Ldm(Condition cond, 1906 Register rn, 1907 WriteBack write_back, 1908 RegisterList registers) { 1909 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1910 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1911 VIXL_ASSERT(allow_macro_instructions_); 1912 VIXL_ASSERT(OutsideITBlock()); 1913 MacroEmissionCheckScope guard(this); 1914 ITScope it_scope(this, &cond); 1915 ldm(cond, rn, write_back, registers); 1916 } 1917 void Ldm(Register rn, WriteBack write_back, RegisterList registers) { 1918 Ldm(al, rn, write_back, registers); 1919 } 1920 1921 void Ldmda(Condition cond, 1922 Register rn, 1923 WriteBack write_back, 1924 RegisterList registers) { 1925 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1926 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1927 VIXL_ASSERT(allow_macro_instructions_); 1928 VIXL_ASSERT(OutsideITBlock()); 1929 MacroEmissionCheckScope guard(this); 1930 ITScope it_scope(this, &cond); 1931 ldmda(cond, rn, write_back, registers); 1932 } 1933 void Ldmda(Register rn, WriteBack write_back, RegisterList registers) { 1934 Ldmda(al, rn, write_back, registers); 1935 } 1936 1937 void Ldmdb(Condition cond, 1938 Register rn, 1939 WriteBack write_back, 1940 RegisterList registers) { 1941 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1942 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1943 VIXL_ASSERT(allow_macro_instructions_); 1944 VIXL_ASSERT(OutsideITBlock()); 1945 MacroEmissionCheckScope guard(this); 1946 ITScope it_scope(this, &cond); 1947 ldmdb(cond, rn, write_back, registers); 1948 } 1949 void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) { 1950 Ldmdb(al, rn, write_back, registers); 1951 } 1952 1953 void Ldmea(Condition cond, 1954 Register rn, 1955 WriteBack write_back, 1956 RegisterList registers) { 1957 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1958 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1959 VIXL_ASSERT(allow_macro_instructions_); 1960 VIXL_ASSERT(OutsideITBlock()); 1961 MacroEmissionCheckScope guard(this); 1962 ITScope it_scope(this, &cond); 1963 ldmea(cond, rn, write_back, registers); 1964 } 1965 void Ldmea(Register rn, WriteBack write_back, RegisterList registers) { 1966 Ldmea(al, rn, write_back, registers); 1967 } 1968 1969 void Ldmed(Condition cond, 1970 Register rn, 1971 WriteBack write_back, 1972 RegisterList registers) { 1973 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1974 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1975 VIXL_ASSERT(allow_macro_instructions_); 1976 VIXL_ASSERT(OutsideITBlock()); 1977 MacroEmissionCheckScope guard(this); 1978 ITScope it_scope(this, &cond); 1979 ldmed(cond, rn, write_back, registers); 1980 } 1981 void Ldmed(Register rn, WriteBack write_back, RegisterList registers) { 1982 Ldmed(al, rn, write_back, registers); 1983 } 1984 1985 void Ldmfa(Condition cond, 1986 Register rn, 1987 WriteBack write_back, 1988 RegisterList registers) { 1989 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1990 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1991 VIXL_ASSERT(allow_macro_instructions_); 1992 VIXL_ASSERT(OutsideITBlock()); 1993 MacroEmissionCheckScope guard(this); 1994 ITScope it_scope(this, &cond); 1995 ldmfa(cond, rn, write_back, registers); 1996 } 1997 void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) { 1998 Ldmfa(al, rn, write_back, registers); 1999 } 2000 2001 void Ldmfd(Condition cond, 2002 Register rn, 2003 WriteBack write_back, 2004 RegisterList registers) { 2005 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2006 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2007 VIXL_ASSERT(allow_macro_instructions_); 2008 VIXL_ASSERT(OutsideITBlock()); 2009 MacroEmissionCheckScope guard(this); 2010 ITScope it_scope(this, &cond); 2011 ldmfd(cond, rn, write_back, registers); 2012 } 2013 void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) { 2014 Ldmfd(al, rn, write_back, registers); 2015 } 2016 2017 void Ldmib(Condition cond, 2018 Register rn, 2019 WriteBack write_back, 2020 RegisterList registers) { 2021 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2022 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2023 VIXL_ASSERT(allow_macro_instructions_); 2024 VIXL_ASSERT(OutsideITBlock()); 2025 MacroEmissionCheckScope guard(this); 2026 ITScope it_scope(this, &cond); 2027 ldmib(cond, rn, write_back, registers); 2028 } 2029 void Ldmib(Register rn, WriteBack write_back, RegisterList registers) { 2030 Ldmib(al, rn, write_back, registers); 2031 } 2032 2033 void Ldr(Condition cond, Register rt, const MemOperand& operand) { 2034 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2035 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2036 VIXL_ASSERT(allow_macro_instructions_); 2037 VIXL_ASSERT(OutsideITBlock()); 2038 MacroEmissionCheckScope guard(this); 2039 bool can_use_it = 2040 // LDR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 2041 (operand.IsImmediate() && rt.IsLow() && 2042 operand.GetBaseRegister().IsLow() && 2043 operand.IsOffsetImmediateWithinRange(0, 124, 4) && 2044 (operand.GetAddrMode() == Offset)) || 2045 // LDR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2 2046 (operand.IsImmediate() && rt.IsLow() && 2047 operand.GetBaseRegister().IsSP() && 2048 operand.IsOffsetImmediateWithinRange(0, 1020, 4) && 2049 (operand.GetAddrMode() == Offset)) || 2050 // LDR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2051 (operand.IsPlainRegister() && rt.IsLow() && 2052 operand.GetBaseRegister().IsLow() && 2053 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2054 (operand.GetAddrMode() == Offset)); 2055 ITScope it_scope(this, &cond, can_use_it); 2056 ldr(cond, rt, operand); 2057 } 2058 void Ldr(Register rt, const MemOperand& operand) { Ldr(al, rt, operand); } 2059 2060 void Ldr(Condition cond, Register rt, Label* label) { 2061 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2062 VIXL_ASSERT(allow_macro_instructions_); 2063 VIXL_ASSERT(OutsideITBlock()); 2064 MacroEmissionCheckScope guard(this); 2065 ITScope it_scope(this, &cond); 2066 ldr(cond, rt, label); 2067 } 2068 void Ldr(Register rt, Label* label) { Ldr(al, rt, label); } 2069 2070 void Ldrb(Condition cond, Register rt, const MemOperand& operand) { 2071 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2072 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2073 VIXL_ASSERT(allow_macro_instructions_); 2074 VIXL_ASSERT(OutsideITBlock()); 2075 MacroEmissionCheckScope guard(this); 2076 bool can_use_it = 2077 // LDRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 2078 (operand.IsImmediate() && rt.IsLow() && 2079 operand.GetBaseRegister().IsLow() && 2080 operand.IsOffsetImmediateWithinRange(0, 31) && 2081 (operand.GetAddrMode() == Offset)) || 2082 // LDRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2083 (operand.IsPlainRegister() && rt.IsLow() && 2084 operand.GetBaseRegister().IsLow() && 2085 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2086 (operand.GetAddrMode() == Offset)); 2087 ITScope it_scope(this, &cond, can_use_it); 2088 ldrb(cond, rt, operand); 2089 } 2090 void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); } 2091 2092 void Ldrb(Condition cond, Register rt, Label* label) { 2093 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2094 VIXL_ASSERT(allow_macro_instructions_); 2095 VIXL_ASSERT(OutsideITBlock()); 2096 MacroEmissionCheckScope guard(this); 2097 ITScope it_scope(this, &cond); 2098 ldrb(cond, rt, label); 2099 } 2100 void Ldrb(Register rt, Label* label) { Ldrb(al, rt, label); } 2101 2102 void Ldrd(Condition cond, 2103 Register rt, 2104 Register rt2, 2105 const MemOperand& operand) { 2106 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2107 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 2108 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2109 VIXL_ASSERT(allow_macro_instructions_); 2110 VIXL_ASSERT(OutsideITBlock()); 2111 MacroEmissionCheckScope guard(this); 2112 ITScope it_scope(this, &cond); 2113 ldrd(cond, rt, rt2, operand); 2114 } 2115 void Ldrd(Register rt, Register rt2, const MemOperand& operand) { 2116 Ldrd(al, rt, rt2, operand); 2117 } 2118 2119 void Ldrd(Condition cond, Register rt, Register rt2, Label* label) { 2120 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2121 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 2122 VIXL_ASSERT(allow_macro_instructions_); 2123 VIXL_ASSERT(OutsideITBlock()); 2124 MacroEmissionCheckScope guard(this); 2125 ITScope it_scope(this, &cond); 2126 ldrd(cond, rt, rt2, label); 2127 } 2128 void Ldrd(Register rt, Register rt2, Label* label) { 2129 Ldrd(al, rt, rt2, label); 2130 } 2131 2132 void Ldrex(Condition cond, Register rt, const MemOperand& operand) { 2133 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2134 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2135 VIXL_ASSERT(allow_macro_instructions_); 2136 VIXL_ASSERT(OutsideITBlock()); 2137 MacroEmissionCheckScope guard(this); 2138 ITScope it_scope(this, &cond); 2139 ldrex(cond, rt, operand); 2140 } 2141 void Ldrex(Register rt, const MemOperand& operand) { Ldrex(al, rt, operand); } 2142 2143 void Ldrexb(Condition cond, Register rt, const MemOperand& operand) { 2144 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2145 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2146 VIXL_ASSERT(allow_macro_instructions_); 2147 VIXL_ASSERT(OutsideITBlock()); 2148 MacroEmissionCheckScope guard(this); 2149 ITScope it_scope(this, &cond); 2150 ldrexb(cond, rt, operand); 2151 } 2152 void Ldrexb(Register rt, const MemOperand& operand) { 2153 Ldrexb(al, rt, operand); 2154 } 2155 2156 void Ldrexd(Condition cond, 2157 Register rt, 2158 Register rt2, 2159 const MemOperand& operand) { 2160 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2161 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 2162 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2163 VIXL_ASSERT(allow_macro_instructions_); 2164 VIXL_ASSERT(OutsideITBlock()); 2165 MacroEmissionCheckScope guard(this); 2166 ITScope it_scope(this, &cond); 2167 ldrexd(cond, rt, rt2, operand); 2168 } 2169 void Ldrexd(Register rt, Register rt2, const MemOperand& operand) { 2170 Ldrexd(al, rt, rt2, operand); 2171 } 2172 2173 void Ldrexh(Condition cond, Register rt, const MemOperand& operand) { 2174 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2175 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2176 VIXL_ASSERT(allow_macro_instructions_); 2177 VIXL_ASSERT(OutsideITBlock()); 2178 MacroEmissionCheckScope guard(this); 2179 ITScope it_scope(this, &cond); 2180 ldrexh(cond, rt, operand); 2181 } 2182 void Ldrexh(Register rt, const MemOperand& operand) { 2183 Ldrexh(al, rt, operand); 2184 } 2185 2186 void Ldrh(Condition cond, Register rt, const MemOperand& operand) { 2187 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2188 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2189 VIXL_ASSERT(allow_macro_instructions_); 2190 VIXL_ASSERT(OutsideITBlock()); 2191 MacroEmissionCheckScope guard(this); 2192 bool can_use_it = 2193 // LDRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 2194 (operand.IsImmediate() && rt.IsLow() && 2195 operand.GetBaseRegister().IsLow() && 2196 operand.IsOffsetImmediateWithinRange(0, 62, 2) && 2197 (operand.GetAddrMode() == Offset)) || 2198 // LDRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2199 (operand.IsPlainRegister() && rt.IsLow() && 2200 operand.GetBaseRegister().IsLow() && 2201 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2202 (operand.GetAddrMode() == Offset)); 2203 ITScope it_scope(this, &cond, can_use_it); 2204 ldrh(cond, rt, operand); 2205 } 2206 void Ldrh(Register rt, const MemOperand& operand) { Ldrh(al, rt, operand); } 2207 2208 void Ldrh(Condition cond, Register rt, Label* label) { 2209 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2210 VIXL_ASSERT(allow_macro_instructions_); 2211 VIXL_ASSERT(OutsideITBlock()); 2212 MacroEmissionCheckScope guard(this); 2213 ITScope it_scope(this, &cond); 2214 ldrh(cond, rt, label); 2215 } 2216 void Ldrh(Register rt, Label* label) { Ldrh(al, rt, label); } 2217 2218 void Ldrsb(Condition cond, Register rt, const MemOperand& operand) { 2219 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2220 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2221 VIXL_ASSERT(allow_macro_instructions_); 2222 VIXL_ASSERT(OutsideITBlock()); 2223 MacroEmissionCheckScope guard(this); 2224 bool can_use_it = 2225 // LDRSB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2226 operand.IsPlainRegister() && rt.IsLow() && 2227 operand.GetBaseRegister().IsLow() && 2228 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2229 (operand.GetAddrMode() == Offset); 2230 ITScope it_scope(this, &cond, can_use_it); 2231 ldrsb(cond, rt, operand); 2232 } 2233 void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); } 2234 2235 void Ldrsb(Condition cond, Register rt, Label* label) { 2236 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2237 VIXL_ASSERT(allow_macro_instructions_); 2238 VIXL_ASSERT(OutsideITBlock()); 2239 MacroEmissionCheckScope guard(this); 2240 ITScope it_scope(this, &cond); 2241 ldrsb(cond, rt, label); 2242 } 2243 void Ldrsb(Register rt, Label* label) { Ldrsb(al, rt, label); } 2244 2245 void Ldrsh(Condition cond, Register rt, const MemOperand& operand) { 2246 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2247 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2248 VIXL_ASSERT(allow_macro_instructions_); 2249 VIXL_ASSERT(OutsideITBlock()); 2250 MacroEmissionCheckScope guard(this); 2251 bool can_use_it = 2252 // LDRSH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2253 operand.IsPlainRegister() && rt.IsLow() && 2254 operand.GetBaseRegister().IsLow() && 2255 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2256 (operand.GetAddrMode() == Offset); 2257 ITScope it_scope(this, &cond, can_use_it); 2258 ldrsh(cond, rt, operand); 2259 } 2260 void Ldrsh(Register rt, const MemOperand& operand) { Ldrsh(al, rt, operand); } 2261 2262 void Ldrsh(Condition cond, Register rt, Label* label) { 2263 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2264 VIXL_ASSERT(allow_macro_instructions_); 2265 VIXL_ASSERT(OutsideITBlock()); 2266 MacroEmissionCheckScope guard(this); 2267 ITScope it_scope(this, &cond); 2268 ldrsh(cond, rt, label); 2269 } 2270 void Ldrsh(Register rt, Label* label) { Ldrsh(al, rt, label); } 2271 2272 void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) { 2273 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2274 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2275 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2276 VIXL_ASSERT(allow_macro_instructions_); 2277 VIXL_ASSERT(OutsideITBlock()); 2278 MacroEmissionCheckScope guard(this); 2279 bool can_use_it = 2280 // LSL<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2 2281 (operand.IsImmediate() && (operand.GetImmediate() >= 1) && 2282 (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) || 2283 // LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 2284 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 2285 operand.GetBaseRegister().IsLow()); 2286 ITScope it_scope(this, &cond, can_use_it); 2287 lsl(cond, rd, rm, operand); 2288 } 2289 void Lsl(Register rd, Register rm, const Operand& operand) { 2290 Lsl(al, rd, rm, operand); 2291 } 2292 void Lsl(FlagsUpdate flags, 2293 Condition cond, 2294 Register rd, 2295 Register rm, 2296 const Operand& operand) { 2297 switch (flags) { 2298 case LeaveFlags: 2299 Lsl(cond, rd, rm, operand); 2300 break; 2301 case SetFlags: 2302 Lsls(cond, rd, rm, operand); 2303 break; 2304 case DontCare: 2305 bool setflags_is_smaller = 2306 IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() && 2307 ((operand.IsImmediate() && (operand.GetImmediate() >= 1) && 2308 (operand.GetImmediate() < 32)) || 2309 (operand.IsPlainRegister() && rd.Is(rm))); 2310 if (setflags_is_smaller) { 2311 Lsls(cond, rd, rm, operand); 2312 } else { 2313 Lsl(cond, rd, rm, operand); 2314 } 2315 break; 2316 } 2317 } 2318 void Lsl(FlagsUpdate flags, 2319 Register rd, 2320 Register rm, 2321 const Operand& operand) { 2322 Lsl(flags, al, rd, rm, operand); 2323 } 2324 2325 void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) { 2326 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2327 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2328 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2329 VIXL_ASSERT(allow_macro_instructions_); 2330 VIXL_ASSERT(OutsideITBlock()); 2331 MacroEmissionCheckScope guard(this); 2332 ITScope it_scope(this, &cond); 2333 lsls(cond, rd, rm, operand); 2334 } 2335 void Lsls(Register rd, Register rm, const Operand& operand) { 2336 Lsls(al, rd, rm, operand); 2337 } 2338 2339 void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) { 2340 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2341 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2342 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2343 VIXL_ASSERT(allow_macro_instructions_); 2344 VIXL_ASSERT(OutsideITBlock()); 2345 MacroEmissionCheckScope guard(this); 2346 bool can_use_it = 2347 // LSR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2 2348 (operand.IsImmediate() && (operand.GetImmediate() >= 1) && 2349 (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) || 2350 // LSR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 2351 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 2352 operand.GetBaseRegister().IsLow()); 2353 ITScope it_scope(this, &cond, can_use_it); 2354 lsr(cond, rd, rm, operand); 2355 } 2356 void Lsr(Register rd, Register rm, const Operand& operand) { 2357 Lsr(al, rd, rm, operand); 2358 } 2359 void Lsr(FlagsUpdate flags, 2360 Condition cond, 2361 Register rd, 2362 Register rm, 2363 const Operand& operand) { 2364 switch (flags) { 2365 case LeaveFlags: 2366 Lsr(cond, rd, rm, operand); 2367 break; 2368 case SetFlags: 2369 Lsrs(cond, rd, rm, operand); 2370 break; 2371 case DontCare: 2372 bool setflags_is_smaller = 2373 IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() && 2374 ((operand.IsImmediate() && (operand.GetImmediate() >= 1) && 2375 (operand.GetImmediate() <= 32)) || 2376 (operand.IsPlainRegister() && rd.Is(rm))); 2377 if (setflags_is_smaller) { 2378 Lsrs(cond, rd, rm, operand); 2379 } else { 2380 Lsr(cond, rd, rm, operand); 2381 } 2382 break; 2383 } 2384 } 2385 void Lsr(FlagsUpdate flags, 2386 Register rd, 2387 Register rm, 2388 const Operand& operand) { 2389 Lsr(flags, al, rd, rm, operand); 2390 } 2391 2392 void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) { 2393 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2394 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2395 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2396 VIXL_ASSERT(allow_macro_instructions_); 2397 VIXL_ASSERT(OutsideITBlock()); 2398 MacroEmissionCheckScope guard(this); 2399 ITScope it_scope(this, &cond); 2400 lsrs(cond, rd, rm, operand); 2401 } 2402 void Lsrs(Register rd, Register rm, const Operand& operand) { 2403 Lsrs(al, rd, rm, operand); 2404 } 2405 2406 void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) { 2407 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2408 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2409 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2410 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 2411 VIXL_ASSERT(allow_macro_instructions_); 2412 VIXL_ASSERT(OutsideITBlock()); 2413 MacroEmissionCheckScope guard(this); 2414 ITScope it_scope(this, &cond); 2415 mla(cond, rd, rn, rm, ra); 2416 } 2417 void Mla(Register rd, Register rn, Register rm, Register ra) { 2418 Mla(al, rd, rn, rm, ra); 2419 } 2420 void Mla(FlagsUpdate flags, 2421 Condition cond, 2422 Register rd, 2423 Register rn, 2424 Register rm, 2425 Register ra) { 2426 switch (flags) { 2427 case LeaveFlags: 2428 Mla(cond, rd, rn, rm, ra); 2429 break; 2430 case SetFlags: 2431 Mlas(cond, rd, rn, rm, ra); 2432 break; 2433 case DontCare: 2434 Mla(cond, rd, rn, rm, ra); 2435 break; 2436 } 2437 } 2438 void Mla( 2439 FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) { 2440 Mla(flags, al, rd, rn, rm, ra); 2441 } 2442 2443 void Mlas( 2444 Condition cond, Register rd, Register rn, Register rm, Register ra) { 2445 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2446 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2447 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2448 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 2449 VIXL_ASSERT(allow_macro_instructions_); 2450 VIXL_ASSERT(OutsideITBlock()); 2451 MacroEmissionCheckScope guard(this); 2452 ITScope it_scope(this, &cond); 2453 mlas(cond, rd, rn, rm, ra); 2454 } 2455 void Mlas(Register rd, Register rn, Register rm, Register ra) { 2456 Mlas(al, rd, rn, rm, ra); 2457 } 2458 2459 void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) { 2460 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2461 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2462 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2463 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 2464 VIXL_ASSERT(allow_macro_instructions_); 2465 VIXL_ASSERT(OutsideITBlock()); 2466 MacroEmissionCheckScope guard(this); 2467 ITScope it_scope(this, &cond); 2468 mls(cond, rd, rn, rm, ra); 2469 } 2470 void Mls(Register rd, Register rn, Register rm, Register ra) { 2471 Mls(al, rd, rn, rm, ra); 2472 } 2473 2474 void Mov(Condition cond, Register rd, const Operand& operand) { 2475 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2476 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2477 VIXL_ASSERT(allow_macro_instructions_); 2478 VIXL_ASSERT(OutsideITBlock()); 2479 MacroEmissionCheckScope guard(this); 2480 bool can_use_it = 2481 // MOV<c>{<q>} <Rd>, #<imm8> ; T1 2482 (operand.IsImmediate() && rd.IsLow() && 2483 (operand.GetImmediate() <= 255)) || 2484 // MOV{<c>}{<q>} <Rd>, <Rm> ; T1 2485 (operand.IsPlainRegister() && !rd.IsPC() && 2486 !operand.GetBaseRegister().IsPC()) || 2487 // MOV<c>{<q>} <Rd>, <Rm> {, <shift> #<amount>} ; T2 2488 (operand.IsImmediateShiftedRegister() && rd.IsLow() && 2489 operand.GetBaseRegister().IsLow() && 2490 (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) || 2491 operand.GetShift().Is(ASR))) || 2492 // MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs> ; T1 2493 // MOV<c>{<q>} <Rdm>, <Rdm>, LSR <Rs> ; T1 2494 // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1 2495 // MOV<c>{<q>} <Rdm>, <Rdm>, ROR <Rs> ; T1 2496 (operand.IsRegisterShiftedRegister() && 2497 rd.Is(operand.GetBaseRegister()) && rd.IsLow() && 2498 (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) || 2499 operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) && 2500 operand.GetShiftRegister().IsLow()); 2501 ITScope it_scope(this, &cond, can_use_it); 2502 mov(cond, rd, operand); 2503 } 2504 void Mov(Register rd, const Operand& operand) { Mov(al, rd, operand); } 2505 void Mov(FlagsUpdate flags, 2506 Condition cond, 2507 Register rd, 2508 const Operand& operand) { 2509 switch (flags) { 2510 case LeaveFlags: 2511 Mov(cond, rd, operand); 2512 break; 2513 case SetFlags: 2514 Movs(cond, rd, operand); 2515 break; 2516 case DontCare: 2517 bool setflags_is_smaller = 2518 IsUsingT32() && cond.Is(al) && 2519 ((operand.IsImmediateShiftedRegister() && rd.IsLow() && 2520 operand.GetBaseRegister().IsLow() && 2521 (operand.GetShiftAmount() >= 1) && 2522 (((operand.GetShiftAmount() <= 32) && 2523 ((operand.GetShift().IsLSR() || operand.GetShift().IsASR()))) || 2524 ((operand.GetShiftAmount() < 32) && 2525 operand.GetShift().IsLSL()))) || 2526 (operand.IsRegisterShiftedRegister() && rd.IsLow() && 2527 operand.GetBaseRegister().Is(rd) && 2528 operand.GetShiftRegister().IsLow() && 2529 (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() || 2530 operand.GetShift().IsASR() || operand.GetShift().IsROR())) || 2531 (operand.IsImmediate() && rd.IsLow() && 2532 (operand.GetImmediate() < 256))); 2533 if (setflags_is_smaller) { 2534 Movs(cond, rd, operand); 2535 } else { 2536 Mov(cond, rd, operand); 2537 } 2538 break; 2539 } 2540 } 2541 void Mov(FlagsUpdate flags, Register rd, const Operand& operand) { 2542 Mov(flags, al, rd, operand); 2543 } 2544 2545 void Movs(Condition cond, Register rd, const Operand& operand) { 2546 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2547 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2548 VIXL_ASSERT(allow_macro_instructions_); 2549 VIXL_ASSERT(OutsideITBlock()); 2550 MacroEmissionCheckScope guard(this); 2551 ITScope it_scope(this, &cond); 2552 movs(cond, rd, operand); 2553 } 2554 void Movs(Register rd, const Operand& operand) { Movs(al, rd, operand); } 2555 2556 void Movt(Condition cond, Register rd, const Operand& operand) { 2557 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2558 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2559 VIXL_ASSERT(allow_macro_instructions_); 2560 VIXL_ASSERT(OutsideITBlock()); 2561 MacroEmissionCheckScope guard(this); 2562 ITScope it_scope(this, &cond); 2563 movt(cond, rd, operand); 2564 } 2565 void Movt(Register rd, const Operand& operand) { Movt(al, rd, operand); } 2566 2567 2568 void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) { 2569 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2570 VIXL_ASSERT(allow_macro_instructions_); 2571 VIXL_ASSERT(OutsideITBlock()); 2572 MacroEmissionCheckScope guard(this); 2573 ITScope it_scope(this, &cond); 2574 mrs(cond, rd, spec_reg); 2575 } 2576 void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); } 2577 2578 void Msr(Condition cond, 2579 MaskedSpecialRegister spec_reg, 2580 const Operand& operand) { 2581 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2582 VIXL_ASSERT(allow_macro_instructions_); 2583 VIXL_ASSERT(OutsideITBlock()); 2584 MacroEmissionCheckScope guard(this); 2585 ITScope it_scope(this, &cond); 2586 msr(cond, spec_reg, operand); 2587 } 2588 void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) { 2589 Msr(al, spec_reg, operand); 2590 } 2591 2592 void Mul(Condition cond, Register rd, Register rn, Register rm) { 2593 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2594 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2595 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2596 VIXL_ASSERT(allow_macro_instructions_); 2597 VIXL_ASSERT(OutsideITBlock()); 2598 MacroEmissionCheckScope guard(this); 2599 bool can_use_it = 2600 // MUL<c>{<q>} <Rdm>, <Rn>{, <Rdm>} ; T1 2601 rd.Is(rm) && rn.IsLow() && rm.IsLow(); 2602 ITScope it_scope(this, &cond, can_use_it); 2603 mul(cond, rd, rn, rm); 2604 } 2605 void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); } 2606 void Mul(FlagsUpdate flags, 2607 Condition cond, 2608 Register rd, 2609 Register rn, 2610 Register rm) { 2611 switch (flags) { 2612 case LeaveFlags: 2613 Mul(cond, rd, rn, rm); 2614 break; 2615 case SetFlags: 2616 Muls(cond, rd, rn, rm); 2617 break; 2618 case DontCare: 2619 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2620 rn.IsLow() && rm.Is(rd); 2621 if (setflags_is_smaller) { 2622 Muls(cond, rd, rn, rm); 2623 } else { 2624 Mul(cond, rd, rn, rm); 2625 } 2626 break; 2627 } 2628 } 2629 void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) { 2630 Mul(flags, al, rd, rn, rm); 2631 } 2632 2633 void Muls(Condition cond, Register rd, Register rn, Register rm) { 2634 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2635 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2636 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2637 VIXL_ASSERT(allow_macro_instructions_); 2638 VIXL_ASSERT(OutsideITBlock()); 2639 MacroEmissionCheckScope guard(this); 2640 ITScope it_scope(this, &cond); 2641 muls(cond, rd, rn, rm); 2642 } 2643 void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); } 2644 2645 void Mvn(Condition cond, Register rd, const Operand& operand) { 2646 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2647 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2648 VIXL_ASSERT(allow_macro_instructions_); 2649 VIXL_ASSERT(OutsideITBlock()); 2650 MacroEmissionCheckScope guard(this); 2651 bool can_use_it = 2652 // MVN<c>{<q>} <Rd>, <Rm> ; T1 2653 operand.IsPlainRegister() && rd.IsLow() && 2654 operand.GetBaseRegister().IsLow(); 2655 ITScope it_scope(this, &cond, can_use_it); 2656 mvn(cond, rd, operand); 2657 } 2658 void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); } 2659 void Mvn(FlagsUpdate flags, 2660 Condition cond, 2661 Register rd, 2662 const Operand& operand) { 2663 switch (flags) { 2664 case LeaveFlags: 2665 Mvn(cond, rd, operand); 2666 break; 2667 case SetFlags: 2668 Mvns(cond, rd, operand); 2669 break; 2670 case DontCare: 2671 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2672 operand.IsPlainRegister() && 2673 operand.GetBaseRegister().IsLow(); 2674 if (setflags_is_smaller) { 2675 Mvns(cond, rd, operand); 2676 } else { 2677 Mvn(cond, rd, operand); 2678 } 2679 break; 2680 } 2681 } 2682 void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) { 2683 Mvn(flags, al, rd, operand); 2684 } 2685 2686 void Mvns(Condition cond, Register rd, const Operand& operand) { 2687 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2688 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2689 VIXL_ASSERT(allow_macro_instructions_); 2690 VIXL_ASSERT(OutsideITBlock()); 2691 MacroEmissionCheckScope guard(this); 2692 ITScope it_scope(this, &cond); 2693 mvns(cond, rd, operand); 2694 } 2695 void Mvns(Register rd, const Operand& operand) { Mvns(al, rd, operand); } 2696 2697 void Nop(Condition cond) { 2698 VIXL_ASSERT(allow_macro_instructions_); 2699 VIXL_ASSERT(OutsideITBlock()); 2700 MacroEmissionCheckScope guard(this); 2701 ITScope it_scope(this, &cond); 2702 nop(cond); 2703 } 2704 void Nop() { Nop(al); } 2705 2706 void Orn(Condition cond, Register rd, Register rn, const Operand& operand) { 2707 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2708 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2709 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2710 VIXL_ASSERT(allow_macro_instructions_); 2711 VIXL_ASSERT(OutsideITBlock()); 2712 MacroEmissionCheckScope guard(this); 2713 if (cond.Is(al) && operand.IsImmediate()) { 2714 uint32_t immediate = operand.GetImmediate(); 2715 if (immediate == 0) { 2716 mvn(rd, 0); 2717 return; 2718 } 2719 if ((immediate == 0xffffffff) && rd.Is(rn)) { 2720 return; 2721 } 2722 } 2723 ITScope it_scope(this, &cond); 2724 orn(cond, rd, rn, operand); 2725 } 2726 void Orn(Register rd, Register rn, const Operand& operand) { 2727 Orn(al, rd, rn, operand); 2728 } 2729 void Orn(FlagsUpdate flags, 2730 Condition cond, 2731 Register rd, 2732 Register rn, 2733 const Operand& operand) { 2734 switch (flags) { 2735 case LeaveFlags: 2736 Orn(cond, rd, rn, operand); 2737 break; 2738 case SetFlags: 2739 Orns(cond, rd, rn, operand); 2740 break; 2741 case DontCare: 2742 Orn(cond, rd, rn, operand); 2743 break; 2744 } 2745 } 2746 void Orn(FlagsUpdate flags, 2747 Register rd, 2748 Register rn, 2749 const Operand& operand) { 2750 Orn(flags, al, rd, rn, operand); 2751 } 2752 2753 void Orns(Condition cond, Register rd, Register rn, const Operand& operand) { 2754 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2755 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2756 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2757 VIXL_ASSERT(allow_macro_instructions_); 2758 VIXL_ASSERT(OutsideITBlock()); 2759 MacroEmissionCheckScope guard(this); 2760 ITScope it_scope(this, &cond); 2761 orns(cond, rd, rn, operand); 2762 } 2763 void Orns(Register rd, Register rn, const Operand& operand) { 2764 Orns(al, rd, rn, operand); 2765 } 2766 2767 void Orr(Condition cond, Register rd, Register rn, const Operand& operand) { 2768 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2769 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2770 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2771 VIXL_ASSERT(allow_macro_instructions_); 2772 VIXL_ASSERT(OutsideITBlock()); 2773 MacroEmissionCheckScope guard(this); 2774 if (cond.Is(al) && operand.IsImmediate()) { 2775 uint32_t immediate = operand.GetImmediate(); 2776 if ((immediate == 0) && rd.Is(rn)) { 2777 return; 2778 } 2779 if (immediate == 0xffffffff) { 2780 mvn(rd, 0); 2781 return; 2782 } 2783 } 2784 bool can_use_it = 2785 // ORR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 2786 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 2787 operand.GetBaseRegister().IsLow(); 2788 ITScope it_scope(this, &cond, can_use_it); 2789 orr(cond, rd, rn, operand); 2790 } 2791 void Orr(Register rd, Register rn, const Operand& operand) { 2792 Orr(al, rd, rn, operand); 2793 } 2794 void Orr(FlagsUpdate flags, 2795 Condition cond, 2796 Register rd, 2797 Register rn, 2798 const Operand& operand) { 2799 switch (flags) { 2800 case LeaveFlags: 2801 Orr(cond, rd, rn, operand); 2802 break; 2803 case SetFlags: 2804 Orrs(cond, rd, rn, operand); 2805 break; 2806 case DontCare: 2807 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2808 rn.Is(rd) && operand.IsPlainRegister() && 2809 operand.GetBaseRegister().IsLow(); 2810 if (setflags_is_smaller) { 2811 Orrs(cond, rd, rn, operand); 2812 } else { 2813 Orr(cond, rd, rn, operand); 2814 } 2815 break; 2816 } 2817 } 2818 void Orr(FlagsUpdate flags, 2819 Register rd, 2820 Register rn, 2821 const Operand& operand) { 2822 Orr(flags, al, rd, rn, operand); 2823 } 2824 2825 void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) { 2826 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2827 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2828 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2829 VIXL_ASSERT(allow_macro_instructions_); 2830 VIXL_ASSERT(OutsideITBlock()); 2831 MacroEmissionCheckScope guard(this); 2832 ITScope it_scope(this, &cond); 2833 orrs(cond, rd, rn, operand); 2834 } 2835 void Orrs(Register rd, Register rn, const Operand& operand) { 2836 Orrs(al, rd, rn, operand); 2837 } 2838 2839 void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) { 2840 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2841 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2842 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2843 VIXL_ASSERT(allow_macro_instructions_); 2844 VIXL_ASSERT(OutsideITBlock()); 2845 MacroEmissionCheckScope guard(this); 2846 ITScope it_scope(this, &cond); 2847 pkhbt(cond, rd, rn, operand); 2848 } 2849 void Pkhbt(Register rd, Register rn, const Operand& operand) { 2850 Pkhbt(al, rd, rn, operand); 2851 } 2852 2853 void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) { 2854 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2856 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2857 VIXL_ASSERT(allow_macro_instructions_); 2858 VIXL_ASSERT(OutsideITBlock()); 2859 MacroEmissionCheckScope guard(this); 2860 ITScope it_scope(this, &cond); 2861 pkhtb(cond, rd, rn, operand); 2862 } 2863 void Pkhtb(Register rd, Register rn, const Operand& operand) { 2864 Pkhtb(al, rd, rn, operand); 2865 } 2866 2867 void Pld(Condition cond, Label* label) { 2868 VIXL_ASSERT(allow_macro_instructions_); 2869 VIXL_ASSERT(OutsideITBlock()); 2870 MacroEmissionCheckScope guard(this); 2871 ITScope it_scope(this, &cond); 2872 pld(cond, label); 2873 } 2874 void Pld(Label* label) { Pld(al, label); } 2875 2876 void Pld(Condition cond, const MemOperand& operand) { 2877 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2878 VIXL_ASSERT(allow_macro_instructions_); 2879 VIXL_ASSERT(OutsideITBlock()); 2880 MacroEmissionCheckScope guard(this); 2881 ITScope it_scope(this, &cond); 2882 pld(cond, operand); 2883 } 2884 void Pld(const MemOperand& operand) { Pld(al, operand); } 2885 2886 void Pldw(Condition cond, const MemOperand& operand) { 2887 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2888 VIXL_ASSERT(allow_macro_instructions_); 2889 VIXL_ASSERT(OutsideITBlock()); 2890 MacroEmissionCheckScope guard(this); 2891 ITScope it_scope(this, &cond); 2892 pldw(cond, operand); 2893 } 2894 void Pldw(const MemOperand& operand) { Pldw(al, operand); } 2895 2896 void Pli(Condition cond, const MemOperand& operand) { 2897 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2898 VIXL_ASSERT(allow_macro_instructions_); 2899 VIXL_ASSERT(OutsideITBlock()); 2900 MacroEmissionCheckScope guard(this); 2901 ITScope it_scope(this, &cond); 2902 pli(cond, operand); 2903 } 2904 void Pli(const MemOperand& operand) { Pli(al, operand); } 2905 2906 void Pli(Condition cond, Label* label) { 2907 VIXL_ASSERT(allow_macro_instructions_); 2908 VIXL_ASSERT(OutsideITBlock()); 2909 MacroEmissionCheckScope guard(this); 2910 ITScope it_scope(this, &cond); 2911 pli(cond, label); 2912 } 2913 void Pli(Label* label) { Pli(al, label); } 2914 2915 void Pop(Condition cond, RegisterList registers) { 2916 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2917 VIXL_ASSERT(allow_macro_instructions_); 2918 VIXL_ASSERT(OutsideITBlock()); 2919 MacroEmissionCheckScope guard(this); 2920 ITScope it_scope(this, &cond); 2921 pop(cond, registers); 2922 } 2923 void Pop(RegisterList registers) { Pop(al, registers); } 2924 2925 void Pop(Condition cond, Register rt) { 2926 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2927 VIXL_ASSERT(allow_macro_instructions_); 2928 VIXL_ASSERT(OutsideITBlock()); 2929 MacroEmissionCheckScope guard(this); 2930 ITScope it_scope(this, &cond); 2931 pop(cond, rt); 2932 } 2933 void Pop(Register rt) { Pop(al, rt); } 2934 2935 void Push(Condition cond, RegisterList registers) { 2936 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2937 VIXL_ASSERT(allow_macro_instructions_); 2938 VIXL_ASSERT(OutsideITBlock()); 2939 MacroEmissionCheckScope guard(this); 2940 ITScope it_scope(this, &cond); 2941 push(cond, registers); 2942 } 2943 void Push(RegisterList registers) { Push(al, registers); } 2944 2945 void Push(Condition cond, Register rt) { 2946 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2947 VIXL_ASSERT(allow_macro_instructions_); 2948 VIXL_ASSERT(OutsideITBlock()); 2949 MacroEmissionCheckScope guard(this); 2950 ITScope it_scope(this, &cond); 2951 push(cond, rt); 2952 } 2953 void Push(Register rt) { Push(al, rt); } 2954 2955 void Qadd(Condition cond, Register rd, Register rm, Register rn) { 2956 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2957 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2958 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2959 VIXL_ASSERT(allow_macro_instructions_); 2960 VIXL_ASSERT(OutsideITBlock()); 2961 MacroEmissionCheckScope guard(this); 2962 ITScope it_scope(this, &cond); 2963 qadd(cond, rd, rm, rn); 2964 } 2965 void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); } 2966 2967 void Qadd16(Condition cond, Register rd, Register rn, Register rm) { 2968 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2969 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2970 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2971 VIXL_ASSERT(allow_macro_instructions_); 2972 VIXL_ASSERT(OutsideITBlock()); 2973 MacroEmissionCheckScope guard(this); 2974 ITScope it_scope(this, &cond); 2975 qadd16(cond, rd, rn, rm); 2976 } 2977 void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); } 2978 2979 void Qadd8(Condition cond, Register rd, Register rn, Register rm) { 2980 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2981 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2982 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2983 VIXL_ASSERT(allow_macro_instructions_); 2984 VIXL_ASSERT(OutsideITBlock()); 2985 MacroEmissionCheckScope guard(this); 2986 ITScope it_scope(this, &cond); 2987 qadd8(cond, rd, rn, rm); 2988 } 2989 void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); } 2990 2991 void Qasx(Condition cond, Register rd, Register rn, Register rm) { 2992 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2993 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2994 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2995 VIXL_ASSERT(allow_macro_instructions_); 2996 VIXL_ASSERT(OutsideITBlock()); 2997 MacroEmissionCheckScope guard(this); 2998 ITScope it_scope(this, &cond); 2999 qasx(cond, rd, rn, rm); 3000 } 3001 void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); } 3002 3003 void Qdadd(Condition cond, Register rd, Register rm, Register rn) { 3004 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3005 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3006 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3007 VIXL_ASSERT(allow_macro_instructions_); 3008 VIXL_ASSERT(OutsideITBlock()); 3009 MacroEmissionCheckScope guard(this); 3010 ITScope it_scope(this, &cond); 3011 qdadd(cond, rd, rm, rn); 3012 } 3013 void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); } 3014 3015 void Qdsub(Condition cond, Register rd, Register rm, Register rn) { 3016 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3017 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3018 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3019 VIXL_ASSERT(allow_macro_instructions_); 3020 VIXL_ASSERT(OutsideITBlock()); 3021 MacroEmissionCheckScope guard(this); 3022 ITScope it_scope(this, &cond); 3023 qdsub(cond, rd, rm, rn); 3024 } 3025 void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); } 3026 3027 void Qsax(Condition cond, Register rd, Register rn, Register rm) { 3028 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3029 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3030 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3031 VIXL_ASSERT(allow_macro_instructions_); 3032 VIXL_ASSERT(OutsideITBlock()); 3033 MacroEmissionCheckScope guard(this); 3034 ITScope it_scope(this, &cond); 3035 qsax(cond, rd, rn, rm); 3036 } 3037 void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); } 3038 3039 void Qsub(Condition cond, Register rd, Register rm, Register rn) { 3040 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3041 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3042 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3043 VIXL_ASSERT(allow_macro_instructions_); 3044 VIXL_ASSERT(OutsideITBlock()); 3045 MacroEmissionCheckScope guard(this); 3046 ITScope it_scope(this, &cond); 3047 qsub(cond, rd, rm, rn); 3048 } 3049 void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); } 3050 3051 void Qsub16(Condition cond, Register rd, Register rn, Register rm) { 3052 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3053 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3054 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3055 VIXL_ASSERT(allow_macro_instructions_); 3056 VIXL_ASSERT(OutsideITBlock()); 3057 MacroEmissionCheckScope guard(this); 3058 ITScope it_scope(this, &cond); 3059 qsub16(cond, rd, rn, rm); 3060 } 3061 void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); } 3062 3063 void Qsub8(Condition cond, Register rd, Register rn, Register rm) { 3064 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3065 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3066 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3067 VIXL_ASSERT(allow_macro_instructions_); 3068 VIXL_ASSERT(OutsideITBlock()); 3069 MacroEmissionCheckScope guard(this); 3070 ITScope it_scope(this, &cond); 3071 qsub8(cond, rd, rn, rm); 3072 } 3073 void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); } 3074 3075 void Rbit(Condition cond, Register rd, Register rm) { 3076 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3077 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3078 VIXL_ASSERT(allow_macro_instructions_); 3079 VIXL_ASSERT(OutsideITBlock()); 3080 MacroEmissionCheckScope guard(this); 3081 ITScope it_scope(this, &cond); 3082 rbit(cond, rd, rm); 3083 } 3084 void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); } 3085 3086 void Rev(Condition cond, Register rd, Register rm) { 3087 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3088 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3089 VIXL_ASSERT(allow_macro_instructions_); 3090 VIXL_ASSERT(OutsideITBlock()); 3091 MacroEmissionCheckScope guard(this); 3092 ITScope it_scope(this, &cond); 3093 rev(cond, rd, rm); 3094 } 3095 void Rev(Register rd, Register rm) { Rev(al, rd, rm); } 3096 3097 void Rev16(Condition cond, Register rd, Register rm) { 3098 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3099 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3100 VIXL_ASSERT(allow_macro_instructions_); 3101 VIXL_ASSERT(OutsideITBlock()); 3102 MacroEmissionCheckScope guard(this); 3103 ITScope it_scope(this, &cond); 3104 rev16(cond, rd, rm); 3105 } 3106 void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); } 3107 3108 void Revsh(Condition cond, Register rd, Register rm) { 3109 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3110 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3111 VIXL_ASSERT(allow_macro_instructions_); 3112 VIXL_ASSERT(OutsideITBlock()); 3113 MacroEmissionCheckScope guard(this); 3114 ITScope it_scope(this, &cond); 3115 revsh(cond, rd, rm); 3116 } 3117 void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); } 3118 3119 void Ror(Condition cond, Register rd, Register rm, const Operand& operand) { 3120 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3121 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3122 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3123 VIXL_ASSERT(allow_macro_instructions_); 3124 VIXL_ASSERT(OutsideITBlock()); 3125 MacroEmissionCheckScope guard(this); 3126 bool can_use_it = 3127 // ROR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 3128 operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 3129 operand.GetBaseRegister().IsLow(); 3130 ITScope it_scope(this, &cond, can_use_it); 3131 ror(cond, rd, rm, operand); 3132 } 3133 void Ror(Register rd, Register rm, const Operand& operand) { 3134 Ror(al, rd, rm, operand); 3135 } 3136 void Ror(FlagsUpdate flags, 3137 Condition cond, 3138 Register rd, 3139 Register rm, 3140 const Operand& operand) { 3141 switch (flags) { 3142 case LeaveFlags: 3143 Ror(cond, rd, rm, operand); 3144 break; 3145 case SetFlags: 3146 Rors(cond, rd, rm, operand); 3147 break; 3148 case DontCare: 3149 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 3150 rm.IsLow() && operand.IsPlainRegister() && 3151 rd.Is(rm); 3152 if (setflags_is_smaller) { 3153 Rors(cond, rd, rm, operand); 3154 } else { 3155 Ror(cond, rd, rm, operand); 3156 } 3157 break; 3158 } 3159 } 3160 void Ror(FlagsUpdate flags, 3161 Register rd, 3162 Register rm, 3163 const Operand& operand) { 3164 Ror(flags, al, rd, rm, operand); 3165 } 3166 3167 void Rors(Condition cond, Register rd, Register rm, const Operand& operand) { 3168 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3169 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3170 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3171 VIXL_ASSERT(allow_macro_instructions_); 3172 VIXL_ASSERT(OutsideITBlock()); 3173 MacroEmissionCheckScope guard(this); 3174 ITScope it_scope(this, &cond); 3175 rors(cond, rd, rm, operand); 3176 } 3177 void Rors(Register rd, Register rm, const Operand& operand) { 3178 Rors(al, rd, rm, operand); 3179 } 3180 3181 void Rrx(Condition cond, Register rd, Register rm) { 3182 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3183 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3184 VIXL_ASSERT(allow_macro_instructions_); 3185 VIXL_ASSERT(OutsideITBlock()); 3186 MacroEmissionCheckScope guard(this); 3187 ITScope it_scope(this, &cond); 3188 rrx(cond, rd, rm); 3189 } 3190 void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); } 3191 void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) { 3192 switch (flags) { 3193 case LeaveFlags: 3194 Rrx(cond, rd, rm); 3195 break; 3196 case SetFlags: 3197 Rrxs(cond, rd, rm); 3198 break; 3199 case DontCare: 3200 Rrx(cond, rd, rm); 3201 break; 3202 } 3203 } 3204 void Rrx(FlagsUpdate flags, Register rd, Register rm) { 3205 Rrx(flags, al, rd, rm); 3206 } 3207 3208 void Rrxs(Condition cond, Register rd, Register rm) { 3209 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3210 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3211 VIXL_ASSERT(allow_macro_instructions_); 3212 VIXL_ASSERT(OutsideITBlock()); 3213 MacroEmissionCheckScope guard(this); 3214 ITScope it_scope(this, &cond); 3215 rrxs(cond, rd, rm); 3216 } 3217 void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); } 3218 3219 void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) { 3220 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3221 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3222 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3223 VIXL_ASSERT(allow_macro_instructions_); 3224 VIXL_ASSERT(OutsideITBlock()); 3225 MacroEmissionCheckScope guard(this); 3226 bool can_use_it = 3227 // RSB<c>{<q>} {<Rd>, }<Rn>, #0 ; T1 3228 operand.IsImmediate() && rd.IsLow() && rn.IsLow() && 3229 (operand.GetImmediate() == 0); 3230 ITScope it_scope(this, &cond, can_use_it); 3231 rsb(cond, rd, rn, operand); 3232 } 3233 void Rsb(Register rd, Register rn, const Operand& operand) { 3234 Rsb(al, rd, rn, operand); 3235 } 3236 void Rsb(FlagsUpdate flags, 3237 Condition cond, 3238 Register rd, 3239 Register rn, 3240 const Operand& operand) { 3241 switch (flags) { 3242 case LeaveFlags: 3243 Rsb(cond, rd, rn, operand); 3244 break; 3245 case SetFlags: 3246 Rsbs(cond, rd, rn, operand); 3247 break; 3248 case DontCare: 3249 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 3250 rn.IsLow() && operand.IsImmediate() && 3251 (operand.GetImmediate() == 0); 3252 if (setflags_is_smaller) { 3253 Rsbs(cond, rd, rn, operand); 3254 } else { 3255 Rsb(cond, rd, rn, operand); 3256 } 3257 break; 3258 } 3259 } 3260 void Rsb(FlagsUpdate flags, 3261 Register rd, 3262 Register rn, 3263 const Operand& operand) { 3264 Rsb(flags, al, rd, rn, operand); 3265 } 3266 3267 void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) { 3268 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3269 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3270 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3271 VIXL_ASSERT(allow_macro_instructions_); 3272 VIXL_ASSERT(OutsideITBlock()); 3273 MacroEmissionCheckScope guard(this); 3274 ITScope it_scope(this, &cond); 3275 rsbs(cond, rd, rn, operand); 3276 } 3277 void Rsbs(Register rd, Register rn, const Operand& operand) { 3278 Rsbs(al, rd, rn, operand); 3279 } 3280 3281 void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) { 3282 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3283 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3284 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3285 VIXL_ASSERT(allow_macro_instructions_); 3286 VIXL_ASSERT(OutsideITBlock()); 3287 MacroEmissionCheckScope guard(this); 3288 ITScope it_scope(this, &cond); 3289 rsc(cond, rd, rn, operand); 3290 } 3291 void Rsc(Register rd, Register rn, const Operand& operand) { 3292 Rsc(al, rd, rn, operand); 3293 } 3294 void Rsc(FlagsUpdate flags, 3295 Condition cond, 3296 Register rd, 3297 Register rn, 3298 const Operand& operand) { 3299 switch (flags) { 3300 case LeaveFlags: 3301 Rsc(cond, rd, rn, operand); 3302 break; 3303 case SetFlags: 3304 Rscs(cond, rd, rn, operand); 3305 break; 3306 case DontCare: 3307 Rsc(cond, rd, rn, operand); 3308 break; 3309 } 3310 } 3311 void Rsc(FlagsUpdate flags, 3312 Register rd, 3313 Register rn, 3314 const Operand& operand) { 3315 Rsc(flags, al, rd, rn, operand); 3316 } 3317 3318 void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) { 3319 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3320 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3321 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3322 VIXL_ASSERT(allow_macro_instructions_); 3323 VIXL_ASSERT(OutsideITBlock()); 3324 MacroEmissionCheckScope guard(this); 3325 ITScope it_scope(this, &cond); 3326 rscs(cond, rd, rn, operand); 3327 } 3328 void Rscs(Register rd, Register rn, const Operand& operand) { 3329 Rscs(al, rd, rn, operand); 3330 } 3331 3332 void Sadd16(Condition cond, Register rd, Register rn, Register rm) { 3333 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3334 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3335 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3336 VIXL_ASSERT(allow_macro_instructions_); 3337 VIXL_ASSERT(OutsideITBlock()); 3338 MacroEmissionCheckScope guard(this); 3339 ITScope it_scope(this, &cond); 3340 sadd16(cond, rd, rn, rm); 3341 } 3342 void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); } 3343 3344 void Sadd8(Condition cond, Register rd, Register rn, Register rm) { 3345 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3346 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3347 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3348 VIXL_ASSERT(allow_macro_instructions_); 3349 VIXL_ASSERT(OutsideITBlock()); 3350 MacroEmissionCheckScope guard(this); 3351 ITScope it_scope(this, &cond); 3352 sadd8(cond, rd, rn, rm); 3353 } 3354 void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); } 3355 3356 void Sasx(Condition cond, Register rd, Register rn, Register rm) { 3357 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3358 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3359 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3360 VIXL_ASSERT(allow_macro_instructions_); 3361 VIXL_ASSERT(OutsideITBlock()); 3362 MacroEmissionCheckScope guard(this); 3363 ITScope it_scope(this, &cond); 3364 sasx(cond, rd, rn, rm); 3365 } 3366 void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); } 3367 3368 void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) { 3369 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3370 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3371 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3372 VIXL_ASSERT(allow_macro_instructions_); 3373 VIXL_ASSERT(OutsideITBlock()); 3374 MacroEmissionCheckScope guard(this); 3375 bool can_use_it = 3376 // SBC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 3377 operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) && 3378 operand.GetBaseRegister().IsLow(); 3379 ITScope it_scope(this, &cond, can_use_it); 3380 sbc(cond, rd, rn, operand); 3381 } 3382 void Sbc(Register rd, Register rn, const Operand& operand) { 3383 Sbc(al, rd, rn, operand); 3384 } 3385 void Sbc(FlagsUpdate flags, 3386 Condition cond, 3387 Register rd, 3388 Register rn, 3389 const Operand& operand) { 3390 switch (flags) { 3391 case LeaveFlags: 3392 Sbc(cond, rd, rn, operand); 3393 break; 3394 case SetFlags: 3395 Sbcs(cond, rd, rn, operand); 3396 break; 3397 case DontCare: 3398 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 3399 rn.Is(rd) && operand.IsPlainRegister() && 3400 operand.GetBaseRegister().IsLow(); 3401 if (setflags_is_smaller) { 3402 Sbcs(cond, rd, rn, operand); 3403 } else { 3404 Sbc(cond, rd, rn, operand); 3405 } 3406 break; 3407 } 3408 } 3409 void Sbc(FlagsUpdate flags, 3410 Register rd, 3411 Register rn, 3412 const Operand& operand) { 3413 Sbc(flags, al, rd, rn, operand); 3414 } 3415 3416 void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) { 3417 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3418 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3419 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3420 VIXL_ASSERT(allow_macro_instructions_); 3421 VIXL_ASSERT(OutsideITBlock()); 3422 MacroEmissionCheckScope guard(this); 3423 ITScope it_scope(this, &cond); 3424 sbcs(cond, rd, rn, operand); 3425 } 3426 void Sbcs(Register rd, Register rn, const Operand& operand) { 3427 Sbcs(al, rd, rn, operand); 3428 } 3429 3430 void Sbfx(Condition cond, 3431 Register rd, 3432 Register rn, 3433 uint32_t lsb, 3434 const Operand& operand) { 3435 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3436 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3437 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3438 VIXL_ASSERT(allow_macro_instructions_); 3439 VIXL_ASSERT(OutsideITBlock()); 3440 MacroEmissionCheckScope guard(this); 3441 ITScope it_scope(this, &cond); 3442 sbfx(cond, rd, rn, lsb, operand); 3443 } 3444 void Sbfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) { 3445 Sbfx(al, rd, rn, lsb, operand); 3446 } 3447 3448 void Sdiv(Condition cond, Register rd, Register rn, Register rm) { 3449 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3450 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3451 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3452 VIXL_ASSERT(allow_macro_instructions_); 3453 VIXL_ASSERT(OutsideITBlock()); 3454 MacroEmissionCheckScope guard(this); 3455 ITScope it_scope(this, &cond); 3456 sdiv(cond, rd, rn, rm); 3457 } 3458 void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); } 3459 3460 void Sel(Condition cond, Register rd, Register rn, Register rm) { 3461 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3462 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3463 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3464 VIXL_ASSERT(allow_macro_instructions_); 3465 VIXL_ASSERT(OutsideITBlock()); 3466 MacroEmissionCheckScope guard(this); 3467 ITScope it_scope(this, &cond); 3468 sel(cond, rd, rn, rm); 3469 } 3470 void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); } 3471 3472 void Shadd16(Condition cond, Register rd, Register rn, Register rm) { 3473 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3474 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3475 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3476 VIXL_ASSERT(allow_macro_instructions_); 3477 VIXL_ASSERT(OutsideITBlock()); 3478 MacroEmissionCheckScope guard(this); 3479 ITScope it_scope(this, &cond); 3480 shadd16(cond, rd, rn, rm); 3481 } 3482 void Shadd16(Register rd, Register rn, Register rm) { 3483 Shadd16(al, rd, rn, rm); 3484 } 3485 3486 void Shadd8(Condition cond, Register rd, Register rn, Register rm) { 3487 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3488 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3489 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3490 VIXL_ASSERT(allow_macro_instructions_); 3491 VIXL_ASSERT(OutsideITBlock()); 3492 MacroEmissionCheckScope guard(this); 3493 ITScope it_scope(this, &cond); 3494 shadd8(cond, rd, rn, rm); 3495 } 3496 void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); } 3497 3498 void Shasx(Condition cond, Register rd, Register rn, Register rm) { 3499 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3500 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3501 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3502 VIXL_ASSERT(allow_macro_instructions_); 3503 VIXL_ASSERT(OutsideITBlock()); 3504 MacroEmissionCheckScope guard(this); 3505 ITScope it_scope(this, &cond); 3506 shasx(cond, rd, rn, rm); 3507 } 3508 void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); } 3509 3510 void Shsax(Condition cond, Register rd, Register rn, Register rm) { 3511 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3512 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3513 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3514 VIXL_ASSERT(allow_macro_instructions_); 3515 VIXL_ASSERT(OutsideITBlock()); 3516 MacroEmissionCheckScope guard(this); 3517 ITScope it_scope(this, &cond); 3518 shsax(cond, rd, rn, rm); 3519 } 3520 void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); } 3521 3522 void Shsub16(Condition cond, Register rd, Register rn, Register rm) { 3523 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3524 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3525 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3526 VIXL_ASSERT(allow_macro_instructions_); 3527 VIXL_ASSERT(OutsideITBlock()); 3528 MacroEmissionCheckScope guard(this); 3529 ITScope it_scope(this, &cond); 3530 shsub16(cond, rd, rn, rm); 3531 } 3532 void Shsub16(Register rd, Register rn, Register rm) { 3533 Shsub16(al, rd, rn, rm); 3534 } 3535 3536 void Shsub8(Condition cond, Register rd, Register rn, Register rm) { 3537 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3538 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3539 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3540 VIXL_ASSERT(allow_macro_instructions_); 3541 VIXL_ASSERT(OutsideITBlock()); 3542 MacroEmissionCheckScope guard(this); 3543 ITScope it_scope(this, &cond); 3544 shsub8(cond, rd, rn, rm); 3545 } 3546 void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); } 3547 3548 void Smlabb( 3549 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3550 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3551 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3552 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3553 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3554 VIXL_ASSERT(allow_macro_instructions_); 3555 VIXL_ASSERT(OutsideITBlock()); 3556 MacroEmissionCheckScope guard(this); 3557 ITScope it_scope(this, &cond); 3558 smlabb(cond, rd, rn, rm, ra); 3559 } 3560 void Smlabb(Register rd, Register rn, Register rm, Register ra) { 3561 Smlabb(al, rd, rn, rm, ra); 3562 } 3563 3564 void Smlabt( 3565 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3566 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3567 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3568 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3569 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3570 VIXL_ASSERT(allow_macro_instructions_); 3571 VIXL_ASSERT(OutsideITBlock()); 3572 MacroEmissionCheckScope guard(this); 3573 ITScope it_scope(this, &cond); 3574 smlabt(cond, rd, rn, rm, ra); 3575 } 3576 void Smlabt(Register rd, Register rn, Register rm, Register ra) { 3577 Smlabt(al, rd, rn, rm, ra); 3578 } 3579 3580 void Smlad( 3581 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3582 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3583 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3584 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3585 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3586 VIXL_ASSERT(allow_macro_instructions_); 3587 VIXL_ASSERT(OutsideITBlock()); 3588 MacroEmissionCheckScope guard(this); 3589 ITScope it_scope(this, &cond); 3590 smlad(cond, rd, rn, rm, ra); 3591 } 3592 void Smlad(Register rd, Register rn, Register rm, Register ra) { 3593 Smlad(al, rd, rn, rm, ra); 3594 } 3595 3596 void Smladx( 3597 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3598 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3599 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3600 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3601 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3602 VIXL_ASSERT(allow_macro_instructions_); 3603 VIXL_ASSERT(OutsideITBlock()); 3604 MacroEmissionCheckScope guard(this); 3605 ITScope it_scope(this, &cond); 3606 smladx(cond, rd, rn, rm, ra); 3607 } 3608 void Smladx(Register rd, Register rn, Register rm, Register ra) { 3609 Smladx(al, rd, rn, rm, ra); 3610 } 3611 3612 void Smlal( 3613 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3614 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3615 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3616 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3617 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3618 VIXL_ASSERT(allow_macro_instructions_); 3619 VIXL_ASSERT(OutsideITBlock()); 3620 MacroEmissionCheckScope guard(this); 3621 ITScope it_scope(this, &cond); 3622 smlal(cond, rdlo, rdhi, rn, rm); 3623 } 3624 void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) { 3625 Smlal(al, rdlo, rdhi, rn, rm); 3626 } 3627 3628 void Smlalbb( 3629 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3630 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3631 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3632 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3633 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3634 VIXL_ASSERT(allow_macro_instructions_); 3635 VIXL_ASSERT(OutsideITBlock()); 3636 MacroEmissionCheckScope guard(this); 3637 ITScope it_scope(this, &cond); 3638 smlalbb(cond, rdlo, rdhi, rn, rm); 3639 } 3640 void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) { 3641 Smlalbb(al, rdlo, rdhi, rn, rm); 3642 } 3643 3644 void Smlalbt( 3645 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3646 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3647 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3648 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3649 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3650 VIXL_ASSERT(allow_macro_instructions_); 3651 VIXL_ASSERT(OutsideITBlock()); 3652 MacroEmissionCheckScope guard(this); 3653 ITScope it_scope(this, &cond); 3654 smlalbt(cond, rdlo, rdhi, rn, rm); 3655 } 3656 void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) { 3657 Smlalbt(al, rdlo, rdhi, rn, rm); 3658 } 3659 3660 void Smlald( 3661 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3662 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3663 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3666 VIXL_ASSERT(allow_macro_instructions_); 3667 VIXL_ASSERT(OutsideITBlock()); 3668 MacroEmissionCheckScope guard(this); 3669 ITScope it_scope(this, &cond); 3670 smlald(cond, rdlo, rdhi, rn, rm); 3671 } 3672 void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) { 3673 Smlald(al, rdlo, rdhi, rn, rm); 3674 } 3675 3676 void Smlaldx( 3677 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3678 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3679 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3680 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3681 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3682 VIXL_ASSERT(allow_macro_instructions_); 3683 VIXL_ASSERT(OutsideITBlock()); 3684 MacroEmissionCheckScope guard(this); 3685 ITScope it_scope(this, &cond); 3686 smlaldx(cond, rdlo, rdhi, rn, rm); 3687 } 3688 void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) { 3689 Smlaldx(al, rdlo, rdhi, rn, rm); 3690 } 3691 3692 void Smlals( 3693 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3694 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3695 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3696 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3697 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3698 VIXL_ASSERT(allow_macro_instructions_); 3699 VIXL_ASSERT(OutsideITBlock()); 3700 MacroEmissionCheckScope guard(this); 3701 ITScope it_scope(this, &cond); 3702 smlals(cond, rdlo, rdhi, rn, rm); 3703 } 3704 void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) { 3705 Smlals(al, rdlo, rdhi, rn, rm); 3706 } 3707 3708 void Smlaltb( 3709 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3710 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3711 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3712 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3713 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3714 VIXL_ASSERT(allow_macro_instructions_); 3715 VIXL_ASSERT(OutsideITBlock()); 3716 MacroEmissionCheckScope guard(this); 3717 ITScope it_scope(this, &cond); 3718 smlaltb(cond, rdlo, rdhi, rn, rm); 3719 } 3720 void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) { 3721 Smlaltb(al, rdlo, rdhi, rn, rm); 3722 } 3723 3724 void Smlaltt( 3725 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3726 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3727 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3728 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3729 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3730 VIXL_ASSERT(allow_macro_instructions_); 3731 VIXL_ASSERT(OutsideITBlock()); 3732 MacroEmissionCheckScope guard(this); 3733 ITScope it_scope(this, &cond); 3734 smlaltt(cond, rdlo, rdhi, rn, rm); 3735 } 3736 void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) { 3737 Smlaltt(al, rdlo, rdhi, rn, rm); 3738 } 3739 3740 void Smlatb( 3741 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3742 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3743 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3744 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3745 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3746 VIXL_ASSERT(allow_macro_instructions_); 3747 VIXL_ASSERT(OutsideITBlock()); 3748 MacroEmissionCheckScope guard(this); 3749 ITScope it_scope(this, &cond); 3750 smlatb(cond, rd, rn, rm, ra); 3751 } 3752 void Smlatb(Register rd, Register rn, Register rm, Register ra) { 3753 Smlatb(al, rd, rn, rm, ra); 3754 } 3755 3756 void Smlatt( 3757 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3758 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3759 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3760 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3761 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3762 VIXL_ASSERT(allow_macro_instructions_); 3763 VIXL_ASSERT(OutsideITBlock()); 3764 MacroEmissionCheckScope guard(this); 3765 ITScope it_scope(this, &cond); 3766 smlatt(cond, rd, rn, rm, ra); 3767 } 3768 void Smlatt(Register rd, Register rn, Register rm, Register ra) { 3769 Smlatt(al, rd, rn, rm, ra); 3770 } 3771 3772 void Smlawb( 3773 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3774 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3775 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3776 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3777 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3778 VIXL_ASSERT(allow_macro_instructions_); 3779 VIXL_ASSERT(OutsideITBlock()); 3780 MacroEmissionCheckScope guard(this); 3781 ITScope it_scope(this, &cond); 3782 smlawb(cond, rd, rn, rm, ra); 3783 } 3784 void Smlawb(Register rd, Register rn, Register rm, Register ra) { 3785 Smlawb(al, rd, rn, rm, ra); 3786 } 3787 3788 void Smlawt( 3789 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3790 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3791 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3792 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3793 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3794 VIXL_ASSERT(allow_macro_instructions_); 3795 VIXL_ASSERT(OutsideITBlock()); 3796 MacroEmissionCheckScope guard(this); 3797 ITScope it_scope(this, &cond); 3798 smlawt(cond, rd, rn, rm, ra); 3799 } 3800 void Smlawt(Register rd, Register rn, Register rm, Register ra) { 3801 Smlawt(al, rd, rn, rm, ra); 3802 } 3803 3804 void Smlsd( 3805 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3806 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3807 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3808 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3809 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3810 VIXL_ASSERT(allow_macro_instructions_); 3811 VIXL_ASSERT(OutsideITBlock()); 3812 MacroEmissionCheckScope guard(this); 3813 ITScope it_scope(this, &cond); 3814 smlsd(cond, rd, rn, rm, ra); 3815 } 3816 void Smlsd(Register rd, Register rn, Register rm, Register ra) { 3817 Smlsd(al, rd, rn, rm, ra); 3818 } 3819 3820 void Smlsdx( 3821 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3822 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3823 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3824 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3825 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3826 VIXL_ASSERT(allow_macro_instructions_); 3827 VIXL_ASSERT(OutsideITBlock()); 3828 MacroEmissionCheckScope guard(this); 3829 ITScope it_scope(this, &cond); 3830 smlsdx(cond, rd, rn, rm, ra); 3831 } 3832 void Smlsdx(Register rd, Register rn, Register rm, Register ra) { 3833 Smlsdx(al, rd, rn, rm, ra); 3834 } 3835 3836 void Smlsld( 3837 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3838 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3839 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3840 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3841 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3842 VIXL_ASSERT(allow_macro_instructions_); 3843 VIXL_ASSERT(OutsideITBlock()); 3844 MacroEmissionCheckScope guard(this); 3845 ITScope it_scope(this, &cond); 3846 smlsld(cond, rdlo, rdhi, rn, rm); 3847 } 3848 void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) { 3849 Smlsld(al, rdlo, rdhi, rn, rm); 3850 } 3851 3852 void Smlsldx( 3853 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3854 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3856 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3857 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3858 VIXL_ASSERT(allow_macro_instructions_); 3859 VIXL_ASSERT(OutsideITBlock()); 3860 MacroEmissionCheckScope guard(this); 3861 ITScope it_scope(this, &cond); 3862 smlsldx(cond, rdlo, rdhi, rn, rm); 3863 } 3864 void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) { 3865 Smlsldx(al, rdlo, rdhi, rn, rm); 3866 } 3867 3868 void Smmla( 3869 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3870 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3871 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3872 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3873 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3874 VIXL_ASSERT(allow_macro_instructions_); 3875 VIXL_ASSERT(OutsideITBlock()); 3876 MacroEmissionCheckScope guard(this); 3877 ITScope it_scope(this, &cond); 3878 smmla(cond, rd, rn, rm, ra); 3879 } 3880 void Smmla(Register rd, Register rn, Register rm, Register ra) { 3881 Smmla(al, rd, rn, rm, ra); 3882 } 3883 3884 void Smmlar( 3885 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3886 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3887 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3888 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3889 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3890 VIXL_ASSERT(allow_macro_instructions_); 3891 VIXL_ASSERT(OutsideITBlock()); 3892 MacroEmissionCheckScope guard(this); 3893 ITScope it_scope(this, &cond); 3894 smmlar(cond, rd, rn, rm, ra); 3895 } 3896 void Smmlar(Register rd, Register rn, Register rm, Register ra) { 3897 Smmlar(al, rd, rn, rm, ra); 3898 } 3899 3900 void Smmls( 3901 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3902 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3903 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3904 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3905 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3906 VIXL_ASSERT(allow_macro_instructions_); 3907 VIXL_ASSERT(OutsideITBlock()); 3908 MacroEmissionCheckScope guard(this); 3909 ITScope it_scope(this, &cond); 3910 smmls(cond, rd, rn, rm, ra); 3911 } 3912 void Smmls(Register rd, Register rn, Register rm, Register ra) { 3913 Smmls(al, rd, rn, rm, ra); 3914 } 3915 3916 void Smmlsr( 3917 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3918 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3919 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3920 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3921 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3922 VIXL_ASSERT(allow_macro_instructions_); 3923 VIXL_ASSERT(OutsideITBlock()); 3924 MacroEmissionCheckScope guard(this); 3925 ITScope it_scope(this, &cond); 3926 smmlsr(cond, rd, rn, rm, ra); 3927 } 3928 void Smmlsr(Register rd, Register rn, Register rm, Register ra) { 3929 Smmlsr(al, rd, rn, rm, ra); 3930 } 3931 3932 void Smmul(Condition cond, Register rd, Register rn, Register rm) { 3933 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3934 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3935 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3936 VIXL_ASSERT(allow_macro_instructions_); 3937 VIXL_ASSERT(OutsideITBlock()); 3938 MacroEmissionCheckScope guard(this); 3939 ITScope it_scope(this, &cond); 3940 smmul(cond, rd, rn, rm); 3941 } 3942 void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); } 3943 3944 void Smmulr(Condition cond, Register rd, Register rn, Register rm) { 3945 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3946 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3947 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3948 VIXL_ASSERT(allow_macro_instructions_); 3949 VIXL_ASSERT(OutsideITBlock()); 3950 MacroEmissionCheckScope guard(this); 3951 ITScope it_scope(this, &cond); 3952 smmulr(cond, rd, rn, rm); 3953 } 3954 void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); } 3955 3956 void Smuad(Condition cond, Register rd, Register rn, Register rm) { 3957 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3958 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3959 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3960 VIXL_ASSERT(allow_macro_instructions_); 3961 VIXL_ASSERT(OutsideITBlock()); 3962 MacroEmissionCheckScope guard(this); 3963 ITScope it_scope(this, &cond); 3964 smuad(cond, rd, rn, rm); 3965 } 3966 void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); } 3967 3968 void Smuadx(Condition cond, Register rd, Register rn, Register rm) { 3969 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3970 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3971 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3972 VIXL_ASSERT(allow_macro_instructions_); 3973 VIXL_ASSERT(OutsideITBlock()); 3974 MacroEmissionCheckScope guard(this); 3975 ITScope it_scope(this, &cond); 3976 smuadx(cond, rd, rn, rm); 3977 } 3978 void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); } 3979 3980 void Smulbb(Condition cond, Register rd, Register rn, Register rm) { 3981 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3982 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3983 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3984 VIXL_ASSERT(allow_macro_instructions_); 3985 VIXL_ASSERT(OutsideITBlock()); 3986 MacroEmissionCheckScope guard(this); 3987 ITScope it_scope(this, &cond); 3988 smulbb(cond, rd, rn, rm); 3989 } 3990 void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); } 3991 3992 void Smulbt(Condition cond, Register rd, Register rn, Register rm) { 3993 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3994 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3995 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3996 VIXL_ASSERT(allow_macro_instructions_); 3997 VIXL_ASSERT(OutsideITBlock()); 3998 MacroEmissionCheckScope guard(this); 3999 ITScope it_scope(this, &cond); 4000 smulbt(cond, rd, rn, rm); 4001 } 4002 void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); } 4003 4004 void Smull( 4005 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4006 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4007 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4008 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4009 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4010 VIXL_ASSERT(allow_macro_instructions_); 4011 VIXL_ASSERT(OutsideITBlock()); 4012 MacroEmissionCheckScope guard(this); 4013 ITScope it_scope(this, &cond); 4014 smull(cond, rdlo, rdhi, rn, rm); 4015 } 4016 void Smull(Register rdlo, Register rdhi, Register rn, Register rm) { 4017 Smull(al, rdlo, rdhi, rn, rm); 4018 } 4019 void Smull(FlagsUpdate flags, 4020 Condition cond, 4021 Register rdlo, 4022 Register rdhi, 4023 Register rn, 4024 Register rm) { 4025 switch (flags) { 4026 case LeaveFlags: 4027 Smull(cond, rdlo, rdhi, rn, rm); 4028 break; 4029 case SetFlags: 4030 Smulls(cond, rdlo, rdhi, rn, rm); 4031 break; 4032 case DontCare: 4033 Smull(cond, rdlo, rdhi, rn, rm); 4034 break; 4035 } 4036 } 4037 void Smull(FlagsUpdate flags, 4038 Register rdlo, 4039 Register rdhi, 4040 Register rn, 4041 Register rm) { 4042 Smull(flags, al, rdlo, rdhi, rn, rm); 4043 } 4044 4045 void Smulls( 4046 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4047 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4048 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4049 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4050 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4051 VIXL_ASSERT(allow_macro_instructions_); 4052 VIXL_ASSERT(OutsideITBlock()); 4053 MacroEmissionCheckScope guard(this); 4054 ITScope it_scope(this, &cond); 4055 smulls(cond, rdlo, rdhi, rn, rm); 4056 } 4057 void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) { 4058 Smulls(al, rdlo, rdhi, rn, rm); 4059 } 4060 4061 void Smultb(Condition cond, Register rd, Register rn, Register rm) { 4062 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4063 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4064 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4065 VIXL_ASSERT(allow_macro_instructions_); 4066 VIXL_ASSERT(OutsideITBlock()); 4067 MacroEmissionCheckScope guard(this); 4068 ITScope it_scope(this, &cond); 4069 smultb(cond, rd, rn, rm); 4070 } 4071 void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); } 4072 4073 void Smultt(Condition cond, Register rd, Register rn, Register rm) { 4074 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4075 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4076 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4077 VIXL_ASSERT(allow_macro_instructions_); 4078 VIXL_ASSERT(OutsideITBlock()); 4079 MacroEmissionCheckScope guard(this); 4080 ITScope it_scope(this, &cond); 4081 smultt(cond, rd, rn, rm); 4082 } 4083 void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); } 4084 4085 void Smulwb(Condition cond, Register rd, Register rn, Register rm) { 4086 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4087 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4088 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4089 VIXL_ASSERT(allow_macro_instructions_); 4090 VIXL_ASSERT(OutsideITBlock()); 4091 MacroEmissionCheckScope guard(this); 4092 ITScope it_scope(this, &cond); 4093 smulwb(cond, rd, rn, rm); 4094 } 4095 void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); } 4096 4097 void Smulwt(Condition cond, Register rd, Register rn, Register rm) { 4098 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4099 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4100 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4101 VIXL_ASSERT(allow_macro_instructions_); 4102 VIXL_ASSERT(OutsideITBlock()); 4103 MacroEmissionCheckScope guard(this); 4104 ITScope it_scope(this, &cond); 4105 smulwt(cond, rd, rn, rm); 4106 } 4107 void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); } 4108 4109 void Smusd(Condition cond, Register rd, Register rn, Register rm) { 4110 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4111 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4112 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4113 VIXL_ASSERT(allow_macro_instructions_); 4114 VIXL_ASSERT(OutsideITBlock()); 4115 MacroEmissionCheckScope guard(this); 4116 ITScope it_scope(this, &cond); 4117 smusd(cond, rd, rn, rm); 4118 } 4119 void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); } 4120 4121 void Smusdx(Condition cond, Register rd, Register rn, Register rm) { 4122 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4123 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4124 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4125 VIXL_ASSERT(allow_macro_instructions_); 4126 VIXL_ASSERT(OutsideITBlock()); 4127 MacroEmissionCheckScope guard(this); 4128 ITScope it_scope(this, &cond); 4129 smusdx(cond, rd, rn, rm); 4130 } 4131 void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); } 4132 4133 void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) { 4134 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4135 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4136 VIXL_ASSERT(allow_macro_instructions_); 4137 VIXL_ASSERT(OutsideITBlock()); 4138 MacroEmissionCheckScope guard(this); 4139 ITScope it_scope(this, &cond); 4140 ssat(cond, rd, imm, operand); 4141 } 4142 void Ssat(Register rd, uint32_t imm, const Operand& operand) { 4143 Ssat(al, rd, imm, operand); 4144 } 4145 4146 void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) { 4147 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4148 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4149 VIXL_ASSERT(allow_macro_instructions_); 4150 VIXL_ASSERT(OutsideITBlock()); 4151 MacroEmissionCheckScope guard(this); 4152 ITScope it_scope(this, &cond); 4153 ssat16(cond, rd, imm, rn); 4154 } 4155 void Ssat16(Register rd, uint32_t imm, Register rn) { 4156 Ssat16(al, rd, imm, rn); 4157 } 4158 4159 void Ssax(Condition cond, Register rd, Register rn, Register rm) { 4160 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4161 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4162 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4163 VIXL_ASSERT(allow_macro_instructions_); 4164 VIXL_ASSERT(OutsideITBlock()); 4165 MacroEmissionCheckScope guard(this); 4166 ITScope it_scope(this, &cond); 4167 ssax(cond, rd, rn, rm); 4168 } 4169 void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); } 4170 4171 void Ssub16(Condition cond, Register rd, Register rn, Register rm) { 4172 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4173 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4174 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4175 VIXL_ASSERT(allow_macro_instructions_); 4176 VIXL_ASSERT(OutsideITBlock()); 4177 MacroEmissionCheckScope guard(this); 4178 ITScope it_scope(this, &cond); 4179 ssub16(cond, rd, rn, rm); 4180 } 4181 void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); } 4182 4183 void Ssub8(Condition cond, Register rd, Register rn, Register rm) { 4184 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4185 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4186 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4187 VIXL_ASSERT(allow_macro_instructions_); 4188 VIXL_ASSERT(OutsideITBlock()); 4189 MacroEmissionCheckScope guard(this); 4190 ITScope it_scope(this, &cond); 4191 ssub8(cond, rd, rn, rm); 4192 } 4193 void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); } 4194 4195 void Stl(Condition cond, Register rt, const MemOperand& operand) { 4196 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4197 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4198 VIXL_ASSERT(allow_macro_instructions_); 4199 VIXL_ASSERT(OutsideITBlock()); 4200 MacroEmissionCheckScope guard(this); 4201 ITScope it_scope(this, &cond); 4202 stl(cond, rt, operand); 4203 } 4204 void Stl(Register rt, const MemOperand& operand) { Stl(al, rt, operand); } 4205 4206 void Stlb(Condition cond, Register rt, const MemOperand& operand) { 4207 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4208 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4209 VIXL_ASSERT(allow_macro_instructions_); 4210 VIXL_ASSERT(OutsideITBlock()); 4211 MacroEmissionCheckScope guard(this); 4212 ITScope it_scope(this, &cond); 4213 stlb(cond, rt, operand); 4214 } 4215 void Stlb(Register rt, const MemOperand& operand) { Stlb(al, rt, operand); } 4216 4217 void Stlex(Condition cond, 4218 Register rd, 4219 Register rt, 4220 const MemOperand& operand) { 4221 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4222 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4223 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4224 VIXL_ASSERT(allow_macro_instructions_); 4225 VIXL_ASSERT(OutsideITBlock()); 4226 MacroEmissionCheckScope guard(this); 4227 ITScope it_scope(this, &cond); 4228 stlex(cond, rd, rt, operand); 4229 } 4230 void Stlex(Register rd, Register rt, const MemOperand& operand) { 4231 Stlex(al, rd, rt, operand); 4232 } 4233 4234 void Stlexb(Condition cond, 4235 Register rd, 4236 Register rt, 4237 const MemOperand& operand) { 4238 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4239 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4240 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4241 VIXL_ASSERT(allow_macro_instructions_); 4242 VIXL_ASSERT(OutsideITBlock()); 4243 MacroEmissionCheckScope guard(this); 4244 ITScope it_scope(this, &cond); 4245 stlexb(cond, rd, rt, operand); 4246 } 4247 void Stlexb(Register rd, Register rt, const MemOperand& operand) { 4248 Stlexb(al, rd, rt, operand); 4249 } 4250 4251 void Stlexd(Condition cond, 4252 Register rd, 4253 Register rt, 4254 Register rt2, 4255 const MemOperand& operand) { 4256 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4257 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4258 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 4259 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4260 VIXL_ASSERT(allow_macro_instructions_); 4261 VIXL_ASSERT(OutsideITBlock()); 4262 MacroEmissionCheckScope guard(this); 4263 ITScope it_scope(this, &cond); 4264 stlexd(cond, rd, rt, rt2, operand); 4265 } 4266 void Stlexd(Register rd, 4267 Register rt, 4268 Register rt2, 4269 const MemOperand& operand) { 4270 Stlexd(al, rd, rt, rt2, operand); 4271 } 4272 4273 void Stlexh(Condition cond, 4274 Register rd, 4275 Register rt, 4276 const MemOperand& operand) { 4277 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4278 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4279 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4280 VIXL_ASSERT(allow_macro_instructions_); 4281 VIXL_ASSERT(OutsideITBlock()); 4282 MacroEmissionCheckScope guard(this); 4283 ITScope it_scope(this, &cond); 4284 stlexh(cond, rd, rt, operand); 4285 } 4286 void Stlexh(Register rd, Register rt, const MemOperand& operand) { 4287 Stlexh(al, rd, rt, operand); 4288 } 4289 4290 void Stlh(Condition cond, Register rt, const MemOperand& operand) { 4291 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4292 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4293 VIXL_ASSERT(allow_macro_instructions_); 4294 VIXL_ASSERT(OutsideITBlock()); 4295 MacroEmissionCheckScope guard(this); 4296 ITScope it_scope(this, &cond); 4297 stlh(cond, rt, operand); 4298 } 4299 void Stlh(Register rt, const MemOperand& operand) { Stlh(al, rt, operand); } 4300 4301 void Stm(Condition cond, 4302 Register rn, 4303 WriteBack write_back, 4304 RegisterList registers) { 4305 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4306 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4307 VIXL_ASSERT(allow_macro_instructions_); 4308 VIXL_ASSERT(OutsideITBlock()); 4309 MacroEmissionCheckScope guard(this); 4310 ITScope it_scope(this, &cond); 4311 stm(cond, rn, write_back, registers); 4312 } 4313 void Stm(Register rn, WriteBack write_back, RegisterList registers) { 4314 Stm(al, rn, write_back, registers); 4315 } 4316 4317 void Stmda(Condition cond, 4318 Register rn, 4319 WriteBack write_back, 4320 RegisterList registers) { 4321 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4322 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4323 VIXL_ASSERT(allow_macro_instructions_); 4324 VIXL_ASSERT(OutsideITBlock()); 4325 MacroEmissionCheckScope guard(this); 4326 ITScope it_scope(this, &cond); 4327 stmda(cond, rn, write_back, registers); 4328 } 4329 void Stmda(Register rn, WriteBack write_back, RegisterList registers) { 4330 Stmda(al, rn, write_back, registers); 4331 } 4332 4333 void Stmdb(Condition cond, 4334 Register rn, 4335 WriteBack write_back, 4336 RegisterList registers) { 4337 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4338 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4339 VIXL_ASSERT(allow_macro_instructions_); 4340 VIXL_ASSERT(OutsideITBlock()); 4341 MacroEmissionCheckScope guard(this); 4342 ITScope it_scope(this, &cond); 4343 stmdb(cond, rn, write_back, registers); 4344 } 4345 void Stmdb(Register rn, WriteBack write_back, RegisterList registers) { 4346 Stmdb(al, rn, write_back, registers); 4347 } 4348 4349 void Stmea(Condition cond, 4350 Register rn, 4351 WriteBack write_back, 4352 RegisterList registers) { 4353 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4354 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4355 VIXL_ASSERT(allow_macro_instructions_); 4356 VIXL_ASSERT(OutsideITBlock()); 4357 MacroEmissionCheckScope guard(this); 4358 ITScope it_scope(this, &cond); 4359 stmea(cond, rn, write_back, registers); 4360 } 4361 void Stmea(Register rn, WriteBack write_back, RegisterList registers) { 4362 Stmea(al, rn, write_back, registers); 4363 } 4364 4365 void Stmed(Condition cond, 4366 Register rn, 4367 WriteBack write_back, 4368 RegisterList registers) { 4369 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4370 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4371 VIXL_ASSERT(allow_macro_instructions_); 4372 VIXL_ASSERT(OutsideITBlock()); 4373 MacroEmissionCheckScope guard(this); 4374 ITScope it_scope(this, &cond); 4375 stmed(cond, rn, write_back, registers); 4376 } 4377 void Stmed(Register rn, WriteBack write_back, RegisterList registers) { 4378 Stmed(al, rn, write_back, registers); 4379 } 4380 4381 void Stmfa(Condition cond, 4382 Register rn, 4383 WriteBack write_back, 4384 RegisterList registers) { 4385 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4386 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4387 VIXL_ASSERT(allow_macro_instructions_); 4388 VIXL_ASSERT(OutsideITBlock()); 4389 MacroEmissionCheckScope guard(this); 4390 ITScope it_scope(this, &cond); 4391 stmfa(cond, rn, write_back, registers); 4392 } 4393 void Stmfa(Register rn, WriteBack write_back, RegisterList registers) { 4394 Stmfa(al, rn, write_back, registers); 4395 } 4396 4397 void Stmfd(Condition cond, 4398 Register rn, 4399 WriteBack write_back, 4400 RegisterList registers) { 4401 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4402 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4403 VIXL_ASSERT(allow_macro_instructions_); 4404 VIXL_ASSERT(OutsideITBlock()); 4405 MacroEmissionCheckScope guard(this); 4406 ITScope it_scope(this, &cond); 4407 stmfd(cond, rn, write_back, registers); 4408 } 4409 void Stmfd(Register rn, WriteBack write_back, RegisterList registers) { 4410 Stmfd(al, rn, write_back, registers); 4411 } 4412 4413 void Stmib(Condition cond, 4414 Register rn, 4415 WriteBack write_back, 4416 RegisterList registers) { 4417 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4418 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4419 VIXL_ASSERT(allow_macro_instructions_); 4420 VIXL_ASSERT(OutsideITBlock()); 4421 MacroEmissionCheckScope guard(this); 4422 ITScope it_scope(this, &cond); 4423 stmib(cond, rn, write_back, registers); 4424 } 4425 void Stmib(Register rn, WriteBack write_back, RegisterList registers) { 4426 Stmib(al, rn, write_back, registers); 4427 } 4428 4429 void Str(Condition cond, Register rt, const MemOperand& operand) { 4430 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4431 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4432 VIXL_ASSERT(allow_macro_instructions_); 4433 VIXL_ASSERT(OutsideITBlock()); 4434 MacroEmissionCheckScope guard(this); 4435 bool can_use_it = 4436 // STR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 4437 (operand.IsImmediate() && rt.IsLow() && 4438 operand.GetBaseRegister().IsLow() && 4439 operand.IsOffsetImmediateWithinRange(0, 124, 4) && 4440 (operand.GetAddrMode() == Offset)) || 4441 // STR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2 4442 (operand.IsImmediate() && rt.IsLow() && 4443 operand.GetBaseRegister().IsSP() && 4444 operand.IsOffsetImmediateWithinRange(0, 1020, 4) && 4445 (operand.GetAddrMode() == Offset)) || 4446 // STR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 4447 (operand.IsPlainRegister() && rt.IsLow() && 4448 operand.GetBaseRegister().IsLow() && 4449 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 4450 (operand.GetAddrMode() == Offset)); 4451 ITScope it_scope(this, &cond, can_use_it); 4452 str(cond, rt, operand); 4453 } 4454 void Str(Register rt, const MemOperand& operand) { Str(al, rt, operand); } 4455 4456 void Strb(Condition cond, Register rt, const MemOperand& operand) { 4457 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4458 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4459 VIXL_ASSERT(allow_macro_instructions_); 4460 VIXL_ASSERT(OutsideITBlock()); 4461 MacroEmissionCheckScope guard(this); 4462 bool can_use_it = 4463 // STRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 4464 (operand.IsImmediate() && rt.IsLow() && 4465 operand.GetBaseRegister().IsLow() && 4466 operand.IsOffsetImmediateWithinRange(0, 31) && 4467 (operand.GetAddrMode() == Offset)) || 4468 // STRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 4469 (operand.IsPlainRegister() && rt.IsLow() && 4470 operand.GetBaseRegister().IsLow() && 4471 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 4472 (operand.GetAddrMode() == Offset)); 4473 ITScope it_scope(this, &cond, can_use_it); 4474 strb(cond, rt, operand); 4475 } 4476 void Strb(Register rt, const MemOperand& operand) { Strb(al, rt, operand); } 4477 4478 void Strd(Condition cond, 4479 Register rt, 4480 Register rt2, 4481 const MemOperand& operand) { 4482 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4483 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 4484 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4485 VIXL_ASSERT(allow_macro_instructions_); 4486 VIXL_ASSERT(OutsideITBlock()); 4487 MacroEmissionCheckScope guard(this); 4488 ITScope it_scope(this, &cond); 4489 strd(cond, rt, rt2, operand); 4490 } 4491 void Strd(Register rt, Register rt2, const MemOperand& operand) { 4492 Strd(al, rt, rt2, operand); 4493 } 4494 4495 void Strex(Condition cond, 4496 Register rd, 4497 Register rt, 4498 const MemOperand& operand) { 4499 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4500 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4501 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4502 VIXL_ASSERT(allow_macro_instructions_); 4503 VIXL_ASSERT(OutsideITBlock()); 4504 MacroEmissionCheckScope guard(this); 4505 ITScope it_scope(this, &cond); 4506 strex(cond, rd, rt, operand); 4507 } 4508 void Strex(Register rd, Register rt, const MemOperand& operand) { 4509 Strex(al, rd, rt, operand); 4510 } 4511 4512 void Strexb(Condition cond, 4513 Register rd, 4514 Register rt, 4515 const MemOperand& operand) { 4516 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4517 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4518 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4519 VIXL_ASSERT(allow_macro_instructions_); 4520 VIXL_ASSERT(OutsideITBlock()); 4521 MacroEmissionCheckScope guard(this); 4522 ITScope it_scope(this, &cond); 4523 strexb(cond, rd, rt, operand); 4524 } 4525 void Strexb(Register rd, Register rt, const MemOperand& operand) { 4526 Strexb(al, rd, rt, operand); 4527 } 4528 4529 void Strexd(Condition cond, 4530 Register rd, 4531 Register rt, 4532 Register rt2, 4533 const MemOperand& operand) { 4534 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4535 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4536 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 4537 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4538 VIXL_ASSERT(allow_macro_instructions_); 4539 VIXL_ASSERT(OutsideITBlock()); 4540 MacroEmissionCheckScope guard(this); 4541 ITScope it_scope(this, &cond); 4542 strexd(cond, rd, rt, rt2, operand); 4543 } 4544 void Strexd(Register rd, 4545 Register rt, 4546 Register rt2, 4547 const MemOperand& operand) { 4548 Strexd(al, rd, rt, rt2, operand); 4549 } 4550 4551 void Strexh(Condition cond, 4552 Register rd, 4553 Register rt, 4554 const MemOperand& operand) { 4555 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4556 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4557 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4558 VIXL_ASSERT(allow_macro_instructions_); 4559 VIXL_ASSERT(OutsideITBlock()); 4560 MacroEmissionCheckScope guard(this); 4561 ITScope it_scope(this, &cond); 4562 strexh(cond, rd, rt, operand); 4563 } 4564 void Strexh(Register rd, Register rt, const MemOperand& operand) { 4565 Strexh(al, rd, rt, operand); 4566 } 4567 4568 void Strh(Condition cond, Register rt, const MemOperand& operand) { 4569 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4570 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4571 VIXL_ASSERT(allow_macro_instructions_); 4572 VIXL_ASSERT(OutsideITBlock()); 4573 MacroEmissionCheckScope guard(this); 4574 bool can_use_it = 4575 // STRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 4576 (operand.IsImmediate() && rt.IsLow() && 4577 operand.GetBaseRegister().IsLow() && 4578 operand.IsOffsetImmediateWithinRange(0, 62, 2) && 4579 (operand.GetAddrMode() == Offset)) || 4580 // STRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 4581 (operand.IsPlainRegister() && rt.IsLow() && 4582 operand.GetBaseRegister().IsLow() && 4583 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 4584 (operand.GetAddrMode() == Offset)); 4585 ITScope it_scope(this, &cond, can_use_it); 4586 strh(cond, rt, operand); 4587 } 4588 void Strh(Register rt, const MemOperand& operand) { Strh(al, rt, operand); } 4589 4590 void Sub(Condition cond, Register rd, Register rn, const Operand& operand) { 4591 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4592 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4593 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4594 VIXL_ASSERT(allow_macro_instructions_); 4595 VIXL_ASSERT(OutsideITBlock()); 4596 MacroEmissionCheckScope guard(this); 4597 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) { 4598 uint32_t immediate = operand.GetImmediate(); 4599 if (immediate == 0) { 4600 return; 4601 } 4602 } 4603 bool can_use_it = 4604 // SUB<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1 4605 (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() && 4606 rd.IsLow()) || 4607 // SUB<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2 4608 (operand.IsImmediate() && (operand.GetImmediate() <= 255) && 4609 rd.IsLow() && rn.Is(rd)) || 4610 // SUB<c>{<q>} <Rd>, <Rn>, <Rm> 4611 (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 4612 operand.GetBaseRegister().IsLow()); 4613 ITScope it_scope(this, &cond, can_use_it); 4614 sub(cond, rd, rn, operand); 4615 } 4616 void Sub(Register rd, Register rn, const Operand& operand) { 4617 Sub(al, rd, rn, operand); 4618 } 4619 void Sub(FlagsUpdate flags, 4620 Condition cond, 4621 Register rd, 4622 Register rn, 4623 const Operand& operand) { 4624 switch (flags) { 4625 case LeaveFlags: 4626 Sub(cond, rd, rn, operand); 4627 break; 4628 case SetFlags: 4629 Subs(cond, rd, rn, operand); 4630 break; 4631 case DontCare: 4632 bool setflags_is_smaller = 4633 IsUsingT32() && cond.Is(al) && 4634 ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 4635 operand.GetBaseRegister().IsLow()) || 4636 (operand.IsImmediate() && 4637 ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) || 4638 (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256))))); 4639 if (setflags_is_smaller) { 4640 Subs(cond, rd, rn, operand); 4641 } else { 4642 bool changed_op_is_smaller = 4643 operand.IsImmediate() && (operand.GetSignedImmediate() < 0) && 4644 ((rd.IsLow() && rn.IsLow() && 4645 (operand.GetSignedImmediate() >= -7)) || 4646 (rd.IsLow() && rn.Is(rd) && 4647 (operand.GetSignedImmediate() >= -255))); 4648 if (changed_op_is_smaller) { 4649 Adds(cond, rd, rn, -operand.GetSignedImmediate()); 4650 } else { 4651 Sub(cond, rd, rn, operand); 4652 } 4653 } 4654 break; 4655 } 4656 } 4657 void Sub(FlagsUpdate flags, 4658 Register rd, 4659 Register rn, 4660 const Operand& operand) { 4661 Sub(flags, al, rd, rn, operand); 4662 } 4663 4664 void Subs(Condition cond, Register rd, Register rn, const Operand& operand) { 4665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4666 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4667 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4668 VIXL_ASSERT(allow_macro_instructions_); 4669 VIXL_ASSERT(OutsideITBlock()); 4670 MacroEmissionCheckScope guard(this); 4671 ITScope it_scope(this, &cond); 4672 subs(cond, rd, rn, operand); 4673 } 4674 void Subs(Register rd, Register rn, const Operand& operand) { 4675 Subs(al, rd, rn, operand); 4676 } 4677 4678 4679 void Svc(Condition cond, uint32_t imm) { 4680 VIXL_ASSERT(allow_macro_instructions_); 4681 VIXL_ASSERT(OutsideITBlock()); 4682 MacroEmissionCheckScope guard(this); 4683 ITScope it_scope(this, &cond); 4684 svc(cond, imm); 4685 } 4686 void Svc(uint32_t imm) { Svc(al, imm); } 4687 4688 void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) { 4689 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4690 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4691 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4692 VIXL_ASSERT(allow_macro_instructions_); 4693 VIXL_ASSERT(OutsideITBlock()); 4694 MacroEmissionCheckScope guard(this); 4695 ITScope it_scope(this, &cond); 4696 sxtab(cond, rd, rn, operand); 4697 } 4698 void Sxtab(Register rd, Register rn, const Operand& operand) { 4699 Sxtab(al, rd, rn, operand); 4700 } 4701 4702 void Sxtab16(Condition cond, 4703 Register rd, 4704 Register rn, 4705 const Operand& operand) { 4706 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4707 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4708 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4709 VIXL_ASSERT(allow_macro_instructions_); 4710 VIXL_ASSERT(OutsideITBlock()); 4711 MacroEmissionCheckScope guard(this); 4712 ITScope it_scope(this, &cond); 4713 sxtab16(cond, rd, rn, operand); 4714 } 4715 void Sxtab16(Register rd, Register rn, const Operand& operand) { 4716 Sxtab16(al, rd, rn, operand); 4717 } 4718 4719 void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) { 4720 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4721 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4722 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4723 VIXL_ASSERT(allow_macro_instructions_); 4724 VIXL_ASSERT(OutsideITBlock()); 4725 MacroEmissionCheckScope guard(this); 4726 ITScope it_scope(this, &cond); 4727 sxtah(cond, rd, rn, operand); 4728 } 4729 void Sxtah(Register rd, Register rn, const Operand& operand) { 4730 Sxtah(al, rd, rn, operand); 4731 } 4732 4733 void Sxtb(Condition cond, Register rd, const Operand& operand) { 4734 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4735 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4736 VIXL_ASSERT(allow_macro_instructions_); 4737 VIXL_ASSERT(OutsideITBlock()); 4738 MacroEmissionCheckScope guard(this); 4739 ITScope it_scope(this, &cond); 4740 sxtb(cond, rd, operand); 4741 } 4742 void Sxtb(Register rd, const Operand& operand) { Sxtb(al, rd, operand); } 4743 4744 void Sxtb16(Condition cond, Register rd, const Operand& operand) { 4745 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4746 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4747 VIXL_ASSERT(allow_macro_instructions_); 4748 VIXL_ASSERT(OutsideITBlock()); 4749 MacroEmissionCheckScope guard(this); 4750 ITScope it_scope(this, &cond); 4751 sxtb16(cond, rd, operand); 4752 } 4753 void Sxtb16(Register rd, const Operand& operand) { Sxtb16(al, rd, operand); } 4754 4755 void Sxth(Condition cond, Register rd, const Operand& operand) { 4756 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4757 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4758 VIXL_ASSERT(allow_macro_instructions_); 4759 VIXL_ASSERT(OutsideITBlock()); 4760 MacroEmissionCheckScope guard(this); 4761 ITScope it_scope(this, &cond); 4762 sxth(cond, rd, operand); 4763 } 4764 void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); } 4765 4766 4767 void Teq(Condition cond, Register rn, const Operand& operand) { 4768 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4769 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4770 VIXL_ASSERT(allow_macro_instructions_); 4771 VIXL_ASSERT(OutsideITBlock()); 4772 MacroEmissionCheckScope guard(this); 4773 ITScope it_scope(this, &cond); 4774 teq(cond, rn, operand); 4775 } 4776 void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); } 4777 4778 void Tst(Condition cond, Register rn, const Operand& operand) { 4779 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4780 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4781 VIXL_ASSERT(allow_macro_instructions_); 4782 VIXL_ASSERT(OutsideITBlock()); 4783 MacroEmissionCheckScope guard(this); 4784 bool can_use_it = 4785 // TST{<c>}{<q>} <Rn>, <Rm> ; T1 4786 operand.IsPlainRegister() && rn.IsLow() && 4787 operand.GetBaseRegister().IsLow(); 4788 ITScope it_scope(this, &cond, can_use_it); 4789 tst(cond, rn, operand); 4790 } 4791 void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); } 4792 4793 void Uadd16(Condition cond, Register rd, Register rn, Register rm) { 4794 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4795 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4796 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4797 VIXL_ASSERT(allow_macro_instructions_); 4798 VIXL_ASSERT(OutsideITBlock()); 4799 MacroEmissionCheckScope guard(this); 4800 ITScope it_scope(this, &cond); 4801 uadd16(cond, rd, rn, rm); 4802 } 4803 void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); } 4804 4805 void Uadd8(Condition cond, Register rd, Register rn, Register rm) { 4806 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4807 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4808 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4809 VIXL_ASSERT(allow_macro_instructions_); 4810 VIXL_ASSERT(OutsideITBlock()); 4811 MacroEmissionCheckScope guard(this); 4812 ITScope it_scope(this, &cond); 4813 uadd8(cond, rd, rn, rm); 4814 } 4815 void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); } 4816 4817 void Uasx(Condition cond, Register rd, Register rn, Register rm) { 4818 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4819 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4820 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4821 VIXL_ASSERT(allow_macro_instructions_); 4822 VIXL_ASSERT(OutsideITBlock()); 4823 MacroEmissionCheckScope guard(this); 4824 ITScope it_scope(this, &cond); 4825 uasx(cond, rd, rn, rm); 4826 } 4827 void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); } 4828 4829 void Ubfx(Condition cond, 4830 Register rd, 4831 Register rn, 4832 uint32_t lsb, 4833 const Operand& operand) { 4834 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4835 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4836 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4837 VIXL_ASSERT(allow_macro_instructions_); 4838 VIXL_ASSERT(OutsideITBlock()); 4839 MacroEmissionCheckScope guard(this); 4840 ITScope it_scope(this, &cond); 4841 ubfx(cond, rd, rn, lsb, operand); 4842 } 4843 void Ubfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) { 4844 Ubfx(al, rd, rn, lsb, operand); 4845 } 4846 4847 void Udf(Condition cond, uint32_t imm) { 4848 VIXL_ASSERT(allow_macro_instructions_); 4849 VIXL_ASSERT(OutsideITBlock()); 4850 MacroEmissionCheckScope guard(this); 4851 ITScope it_scope(this, &cond); 4852 udf(cond, imm); 4853 } 4854 void Udf(uint32_t imm) { Udf(al, imm); } 4855 4856 void Udiv(Condition cond, Register rd, Register rn, Register rm) { 4857 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4858 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4859 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4860 VIXL_ASSERT(allow_macro_instructions_); 4861 VIXL_ASSERT(OutsideITBlock()); 4862 MacroEmissionCheckScope guard(this); 4863 ITScope it_scope(this, &cond); 4864 udiv(cond, rd, rn, rm); 4865 } 4866 void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); } 4867 4868 void Uhadd16(Condition cond, Register rd, Register rn, Register rm) { 4869 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4870 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4871 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4872 VIXL_ASSERT(allow_macro_instructions_); 4873 VIXL_ASSERT(OutsideITBlock()); 4874 MacroEmissionCheckScope guard(this); 4875 ITScope it_scope(this, &cond); 4876 uhadd16(cond, rd, rn, rm); 4877 } 4878 void Uhadd16(Register rd, Register rn, Register rm) { 4879 Uhadd16(al, rd, rn, rm); 4880 } 4881 4882 void Uhadd8(Condition cond, Register rd, Register rn, Register rm) { 4883 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4884 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4885 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4886 VIXL_ASSERT(allow_macro_instructions_); 4887 VIXL_ASSERT(OutsideITBlock()); 4888 MacroEmissionCheckScope guard(this); 4889 ITScope it_scope(this, &cond); 4890 uhadd8(cond, rd, rn, rm); 4891 } 4892 void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); } 4893 4894 void Uhasx(Condition cond, Register rd, Register rn, Register rm) { 4895 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4896 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4897 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4898 VIXL_ASSERT(allow_macro_instructions_); 4899 VIXL_ASSERT(OutsideITBlock()); 4900 MacroEmissionCheckScope guard(this); 4901 ITScope it_scope(this, &cond); 4902 uhasx(cond, rd, rn, rm); 4903 } 4904 void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); } 4905 4906 void Uhsax(Condition cond, Register rd, Register rn, Register rm) { 4907 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4908 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4909 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4910 VIXL_ASSERT(allow_macro_instructions_); 4911 VIXL_ASSERT(OutsideITBlock()); 4912 MacroEmissionCheckScope guard(this); 4913 ITScope it_scope(this, &cond); 4914 uhsax(cond, rd, rn, rm); 4915 } 4916 void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); } 4917 4918 void Uhsub16(Condition cond, Register rd, Register rn, Register rm) { 4919 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4920 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4921 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4922 VIXL_ASSERT(allow_macro_instructions_); 4923 VIXL_ASSERT(OutsideITBlock()); 4924 MacroEmissionCheckScope guard(this); 4925 ITScope it_scope(this, &cond); 4926 uhsub16(cond, rd, rn, rm); 4927 } 4928 void Uhsub16(Register rd, Register rn, Register rm) { 4929 Uhsub16(al, rd, rn, rm); 4930 } 4931 4932 void Uhsub8(Condition cond, Register rd, Register rn, Register rm) { 4933 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4934 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4935 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4936 VIXL_ASSERT(allow_macro_instructions_); 4937 VIXL_ASSERT(OutsideITBlock()); 4938 MacroEmissionCheckScope guard(this); 4939 ITScope it_scope(this, &cond); 4940 uhsub8(cond, rd, rn, rm); 4941 } 4942 void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); } 4943 4944 void Umaal( 4945 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4946 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4947 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4948 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4949 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4950 VIXL_ASSERT(allow_macro_instructions_); 4951 VIXL_ASSERT(OutsideITBlock()); 4952 MacroEmissionCheckScope guard(this); 4953 ITScope it_scope(this, &cond); 4954 umaal(cond, rdlo, rdhi, rn, rm); 4955 } 4956 void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) { 4957 Umaal(al, rdlo, rdhi, rn, rm); 4958 } 4959 4960 void Umlal( 4961 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4962 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4963 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4964 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4965 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4966 VIXL_ASSERT(allow_macro_instructions_); 4967 VIXL_ASSERT(OutsideITBlock()); 4968 MacroEmissionCheckScope guard(this); 4969 ITScope it_scope(this, &cond); 4970 umlal(cond, rdlo, rdhi, rn, rm); 4971 } 4972 void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) { 4973 Umlal(al, rdlo, rdhi, rn, rm); 4974 } 4975 void Umlal(FlagsUpdate flags, 4976 Condition cond, 4977 Register rdlo, 4978 Register rdhi, 4979 Register rn, 4980 Register rm) { 4981 switch (flags) { 4982 case LeaveFlags: 4983 Umlal(cond, rdlo, rdhi, rn, rm); 4984 break; 4985 case SetFlags: 4986 Umlals(cond, rdlo, rdhi, rn, rm); 4987 break; 4988 case DontCare: 4989 Umlal(cond, rdlo, rdhi, rn, rm); 4990 break; 4991 } 4992 } 4993 void Umlal(FlagsUpdate flags, 4994 Register rdlo, 4995 Register rdhi, 4996 Register rn, 4997 Register rm) { 4998 Umlal(flags, al, rdlo, rdhi, rn, rm); 4999 } 5000 5001 void Umlals( 5002 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 5003 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 5004 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 5005 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5006 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5007 VIXL_ASSERT(allow_macro_instructions_); 5008 VIXL_ASSERT(OutsideITBlock()); 5009 MacroEmissionCheckScope guard(this); 5010 ITScope it_scope(this, &cond); 5011 umlals(cond, rdlo, rdhi, rn, rm); 5012 } 5013 void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) { 5014 Umlals(al, rdlo, rdhi, rn, rm); 5015 } 5016 5017 void Umull( 5018 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 5019 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 5020 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 5021 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5022 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5023 VIXL_ASSERT(allow_macro_instructions_); 5024 VIXL_ASSERT(OutsideITBlock()); 5025 MacroEmissionCheckScope guard(this); 5026 ITScope it_scope(this, &cond); 5027 umull(cond, rdlo, rdhi, rn, rm); 5028 } 5029 void Umull(Register rdlo, Register rdhi, Register rn, Register rm) { 5030 Umull(al, rdlo, rdhi, rn, rm); 5031 } 5032 void Umull(FlagsUpdate flags, 5033 Condition cond, 5034 Register rdlo, 5035 Register rdhi, 5036 Register rn, 5037 Register rm) { 5038 switch (flags) { 5039 case LeaveFlags: 5040 Umull(cond, rdlo, rdhi, rn, rm); 5041 break; 5042 case SetFlags: 5043 Umulls(cond, rdlo, rdhi, rn, rm); 5044 break; 5045 case DontCare: 5046 Umull(cond, rdlo, rdhi, rn, rm); 5047 break; 5048 } 5049 } 5050 void Umull(FlagsUpdate flags, 5051 Register rdlo, 5052 Register rdhi, 5053 Register rn, 5054 Register rm) { 5055 Umull(flags, al, rdlo, rdhi, rn, rm); 5056 } 5057 5058 void Umulls( 5059 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 5060 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 5061 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 5062 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5063 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5064 VIXL_ASSERT(allow_macro_instructions_); 5065 VIXL_ASSERT(OutsideITBlock()); 5066 MacroEmissionCheckScope guard(this); 5067 ITScope it_scope(this, &cond); 5068 umulls(cond, rdlo, rdhi, rn, rm); 5069 } 5070 void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) { 5071 Umulls(al, rdlo, rdhi, rn, rm); 5072 } 5073 5074 void Uqadd16(Condition cond, Register rd, Register rn, Register rm) { 5075 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5076 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5077 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5078 VIXL_ASSERT(allow_macro_instructions_); 5079 VIXL_ASSERT(OutsideITBlock()); 5080 MacroEmissionCheckScope guard(this); 5081 ITScope it_scope(this, &cond); 5082 uqadd16(cond, rd, rn, rm); 5083 } 5084 void Uqadd16(Register rd, Register rn, Register rm) { 5085 Uqadd16(al, rd, rn, rm); 5086 } 5087 5088 void Uqadd8(Condition cond, Register rd, Register rn, Register rm) { 5089 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5090 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5091 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5092 VIXL_ASSERT(allow_macro_instructions_); 5093 VIXL_ASSERT(OutsideITBlock()); 5094 MacroEmissionCheckScope guard(this); 5095 ITScope it_scope(this, &cond); 5096 uqadd8(cond, rd, rn, rm); 5097 } 5098 void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); } 5099 5100 void Uqasx(Condition cond, Register rd, Register rn, Register rm) { 5101 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5102 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5103 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5104 VIXL_ASSERT(allow_macro_instructions_); 5105 VIXL_ASSERT(OutsideITBlock()); 5106 MacroEmissionCheckScope guard(this); 5107 ITScope it_scope(this, &cond); 5108 uqasx(cond, rd, rn, rm); 5109 } 5110 void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); } 5111 5112 void Uqsax(Condition cond, Register rd, Register rn, Register rm) { 5113 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5114 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5115 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5116 VIXL_ASSERT(allow_macro_instructions_); 5117 VIXL_ASSERT(OutsideITBlock()); 5118 MacroEmissionCheckScope guard(this); 5119 ITScope it_scope(this, &cond); 5120 uqsax(cond, rd, rn, rm); 5121 } 5122 void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); } 5123 5124 void Uqsub16(Condition cond, Register rd, Register rn, Register rm) { 5125 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5126 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5127 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5128 VIXL_ASSERT(allow_macro_instructions_); 5129 VIXL_ASSERT(OutsideITBlock()); 5130 MacroEmissionCheckScope guard(this); 5131 ITScope it_scope(this, &cond); 5132 uqsub16(cond, rd, rn, rm); 5133 } 5134 void Uqsub16(Register rd, Register rn, Register rm) { 5135 Uqsub16(al, rd, rn, rm); 5136 } 5137 5138 void Uqsub8(Condition cond, Register rd, Register rn, Register rm) { 5139 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5140 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5141 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5142 VIXL_ASSERT(allow_macro_instructions_); 5143 VIXL_ASSERT(OutsideITBlock()); 5144 MacroEmissionCheckScope guard(this); 5145 ITScope it_scope(this, &cond); 5146 uqsub8(cond, rd, rn, rm); 5147 } 5148 void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); } 5149 5150 void Usad8(Condition cond, Register rd, Register rn, Register rm) { 5151 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5152 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5153 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5154 VIXL_ASSERT(allow_macro_instructions_); 5155 VIXL_ASSERT(OutsideITBlock()); 5156 MacroEmissionCheckScope guard(this); 5157 ITScope it_scope(this, &cond); 5158 usad8(cond, rd, rn, rm); 5159 } 5160 void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); } 5161 5162 void Usada8( 5163 Condition cond, Register rd, Register rn, Register rm, Register ra) { 5164 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5165 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5166 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5167 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 5168 VIXL_ASSERT(allow_macro_instructions_); 5169 VIXL_ASSERT(OutsideITBlock()); 5170 MacroEmissionCheckScope guard(this); 5171 ITScope it_scope(this, &cond); 5172 usada8(cond, rd, rn, rm, ra); 5173 } 5174 void Usada8(Register rd, Register rn, Register rm, Register ra) { 5175 Usada8(al, rd, rn, rm, ra); 5176 } 5177 5178 void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) { 5179 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5180 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5181 VIXL_ASSERT(allow_macro_instructions_); 5182 VIXL_ASSERT(OutsideITBlock()); 5183 MacroEmissionCheckScope guard(this); 5184 ITScope it_scope(this, &cond); 5185 usat(cond, rd, imm, operand); 5186 } 5187 void Usat(Register rd, uint32_t imm, const Operand& operand) { 5188 Usat(al, rd, imm, operand); 5189 } 5190 5191 void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) { 5192 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5193 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5194 VIXL_ASSERT(allow_macro_instructions_); 5195 VIXL_ASSERT(OutsideITBlock()); 5196 MacroEmissionCheckScope guard(this); 5197 ITScope it_scope(this, &cond); 5198 usat16(cond, rd, imm, rn); 5199 } 5200 void Usat16(Register rd, uint32_t imm, Register rn) { 5201 Usat16(al, rd, imm, rn); 5202 } 5203 5204 void Usax(Condition cond, Register rd, Register rn, Register rm) { 5205 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5206 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5207 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5208 VIXL_ASSERT(allow_macro_instructions_); 5209 VIXL_ASSERT(OutsideITBlock()); 5210 MacroEmissionCheckScope guard(this); 5211 ITScope it_scope(this, &cond); 5212 usax(cond, rd, rn, rm); 5213 } 5214 void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); } 5215 5216 void Usub16(Condition cond, Register rd, Register rn, Register rm) { 5217 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5218 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5219 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5220 VIXL_ASSERT(allow_macro_instructions_); 5221 VIXL_ASSERT(OutsideITBlock()); 5222 MacroEmissionCheckScope guard(this); 5223 ITScope it_scope(this, &cond); 5224 usub16(cond, rd, rn, rm); 5225 } 5226 void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); } 5227 5228 void Usub8(Condition cond, Register rd, Register rn, Register rm) { 5229 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5230 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5231 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5232 VIXL_ASSERT(allow_macro_instructions_); 5233 VIXL_ASSERT(OutsideITBlock()); 5234 MacroEmissionCheckScope guard(this); 5235 ITScope it_scope(this, &cond); 5236 usub8(cond, rd, rn, rm); 5237 } 5238 void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); } 5239 5240 void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) { 5241 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5242 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5243 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5244 VIXL_ASSERT(allow_macro_instructions_); 5245 VIXL_ASSERT(OutsideITBlock()); 5246 MacroEmissionCheckScope guard(this); 5247 ITScope it_scope(this, &cond); 5248 uxtab(cond, rd, rn, operand); 5249 } 5250 void Uxtab(Register rd, Register rn, const Operand& operand) { 5251 Uxtab(al, rd, rn, operand); 5252 } 5253 5254 void Uxtab16(Condition cond, 5255 Register rd, 5256 Register rn, 5257 const Operand& operand) { 5258 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5259 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5260 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5261 VIXL_ASSERT(allow_macro_instructions_); 5262 VIXL_ASSERT(OutsideITBlock()); 5263 MacroEmissionCheckScope guard(this); 5264 ITScope it_scope(this, &cond); 5265 uxtab16(cond, rd, rn, operand); 5266 } 5267 void Uxtab16(Register rd, Register rn, const Operand& operand) { 5268 Uxtab16(al, rd, rn, operand); 5269 } 5270 5271 void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) { 5272 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5273 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5274 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5275 VIXL_ASSERT(allow_macro_instructions_); 5276 VIXL_ASSERT(OutsideITBlock()); 5277 MacroEmissionCheckScope guard(this); 5278 ITScope it_scope(this, &cond); 5279 uxtah(cond, rd, rn, operand); 5280 } 5281 void Uxtah(Register rd, Register rn, const Operand& operand) { 5282 Uxtah(al, rd, rn, operand); 5283 } 5284 5285 void Uxtb(Condition cond, Register rd, const Operand& operand) { 5286 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5287 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5288 VIXL_ASSERT(allow_macro_instructions_); 5289 VIXL_ASSERT(OutsideITBlock()); 5290 MacroEmissionCheckScope guard(this); 5291 ITScope it_scope(this, &cond); 5292 uxtb(cond, rd, operand); 5293 } 5294 void Uxtb(Register rd, const Operand& operand) { Uxtb(al, rd, operand); } 5295 5296 void Uxtb16(Condition cond, Register rd, const Operand& operand) { 5297 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5298 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5299 VIXL_ASSERT(allow_macro_instructions_); 5300 VIXL_ASSERT(OutsideITBlock()); 5301 MacroEmissionCheckScope guard(this); 5302 ITScope it_scope(this, &cond); 5303 uxtb16(cond, rd, operand); 5304 } 5305 void Uxtb16(Register rd, const Operand& operand) { Uxtb16(al, rd, operand); } 5306 5307 void Uxth(Condition cond, Register rd, const Operand& operand) { 5308 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5309 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5310 VIXL_ASSERT(allow_macro_instructions_); 5311 VIXL_ASSERT(OutsideITBlock()); 5312 MacroEmissionCheckScope guard(this); 5313 ITScope it_scope(this, &cond); 5314 uxth(cond, rd, operand); 5315 } 5316 void Uxth(Register rd, const Operand& operand) { Uxth(al, rd, operand); } 5317 5318 void Vaba( 5319 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5320 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5321 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5322 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5323 VIXL_ASSERT(allow_macro_instructions_); 5324 VIXL_ASSERT(OutsideITBlock()); 5325 MacroEmissionCheckScope guard(this); 5326 ITScope it_scope(this, &cond); 5327 vaba(cond, dt, rd, rn, rm); 5328 } 5329 void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5330 Vaba(al, dt, rd, rn, rm); 5331 } 5332 5333 void Vaba( 5334 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5335 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5336 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5337 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5338 VIXL_ASSERT(allow_macro_instructions_); 5339 VIXL_ASSERT(OutsideITBlock()); 5340 MacroEmissionCheckScope guard(this); 5341 ITScope it_scope(this, &cond); 5342 vaba(cond, dt, rd, rn, rm); 5343 } 5344 void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5345 Vaba(al, dt, rd, rn, rm); 5346 } 5347 5348 void Vabal( 5349 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5350 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5351 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5352 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5353 VIXL_ASSERT(allow_macro_instructions_); 5354 VIXL_ASSERT(OutsideITBlock()); 5355 MacroEmissionCheckScope guard(this); 5356 ITScope it_scope(this, &cond); 5357 vabal(cond, dt, rd, rn, rm); 5358 } 5359 void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5360 Vabal(al, dt, rd, rn, rm); 5361 } 5362 5363 void Vabd( 5364 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5365 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5366 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5367 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5368 VIXL_ASSERT(allow_macro_instructions_); 5369 VIXL_ASSERT(OutsideITBlock()); 5370 MacroEmissionCheckScope guard(this); 5371 ITScope it_scope(this, &cond); 5372 vabd(cond, dt, rd, rn, rm); 5373 } 5374 void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5375 Vabd(al, dt, rd, rn, rm); 5376 } 5377 5378 void Vabd( 5379 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5380 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5381 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5382 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5383 VIXL_ASSERT(allow_macro_instructions_); 5384 VIXL_ASSERT(OutsideITBlock()); 5385 MacroEmissionCheckScope guard(this); 5386 ITScope it_scope(this, &cond); 5387 vabd(cond, dt, rd, rn, rm); 5388 } 5389 void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5390 Vabd(al, dt, rd, rn, rm); 5391 } 5392 5393 void Vabdl( 5394 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5395 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5396 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5397 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5398 VIXL_ASSERT(allow_macro_instructions_); 5399 VIXL_ASSERT(OutsideITBlock()); 5400 MacroEmissionCheckScope guard(this); 5401 ITScope it_scope(this, &cond); 5402 vabdl(cond, dt, rd, rn, rm); 5403 } 5404 void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5405 Vabdl(al, dt, rd, rn, rm); 5406 } 5407 5408 void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) { 5409 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5410 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5411 VIXL_ASSERT(allow_macro_instructions_); 5412 VIXL_ASSERT(OutsideITBlock()); 5413 MacroEmissionCheckScope guard(this); 5414 ITScope it_scope(this, &cond); 5415 vabs(cond, dt, rd, rm); 5416 } 5417 void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); } 5418 5419 void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) { 5420 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5421 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5422 VIXL_ASSERT(allow_macro_instructions_); 5423 VIXL_ASSERT(OutsideITBlock()); 5424 MacroEmissionCheckScope guard(this); 5425 ITScope it_scope(this, &cond); 5426 vabs(cond, dt, rd, rm); 5427 } 5428 void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); } 5429 5430 void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) { 5431 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5432 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5433 VIXL_ASSERT(allow_macro_instructions_); 5434 VIXL_ASSERT(OutsideITBlock()); 5435 MacroEmissionCheckScope guard(this); 5436 ITScope it_scope(this, &cond); 5437 vabs(cond, dt, rd, rm); 5438 } 5439 void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); } 5440 5441 void Vacge( 5442 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5443 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5444 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5445 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5446 VIXL_ASSERT(allow_macro_instructions_); 5447 VIXL_ASSERT(OutsideITBlock()); 5448 MacroEmissionCheckScope guard(this); 5449 ITScope it_scope(this, &cond); 5450 vacge(cond, dt, rd, rn, rm); 5451 } 5452 void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5453 Vacge(al, dt, rd, rn, rm); 5454 } 5455 5456 void Vacge( 5457 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5458 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5459 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5460 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5461 VIXL_ASSERT(allow_macro_instructions_); 5462 VIXL_ASSERT(OutsideITBlock()); 5463 MacroEmissionCheckScope guard(this); 5464 ITScope it_scope(this, &cond); 5465 vacge(cond, dt, rd, rn, rm); 5466 } 5467 void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5468 Vacge(al, dt, rd, rn, rm); 5469 } 5470 5471 void Vacgt( 5472 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5473 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5474 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5475 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5476 VIXL_ASSERT(allow_macro_instructions_); 5477 VIXL_ASSERT(OutsideITBlock()); 5478 MacroEmissionCheckScope guard(this); 5479 ITScope it_scope(this, &cond); 5480 vacgt(cond, dt, rd, rn, rm); 5481 } 5482 void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5483 Vacgt(al, dt, rd, rn, rm); 5484 } 5485 5486 void Vacgt( 5487 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5488 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5489 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5490 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5491 VIXL_ASSERT(allow_macro_instructions_); 5492 VIXL_ASSERT(OutsideITBlock()); 5493 MacroEmissionCheckScope guard(this); 5494 ITScope it_scope(this, &cond); 5495 vacgt(cond, dt, rd, rn, rm); 5496 } 5497 void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5498 Vacgt(al, dt, rd, rn, rm); 5499 } 5500 5501 void Vacle( 5502 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5503 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5504 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5505 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5506 VIXL_ASSERT(allow_macro_instructions_); 5507 VIXL_ASSERT(OutsideITBlock()); 5508 MacroEmissionCheckScope guard(this); 5509 ITScope it_scope(this, &cond); 5510 vacle(cond, dt, rd, rn, rm); 5511 } 5512 void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5513 Vacle(al, dt, rd, rn, rm); 5514 } 5515 5516 void Vacle( 5517 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5518 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5519 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5520 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5521 VIXL_ASSERT(allow_macro_instructions_); 5522 VIXL_ASSERT(OutsideITBlock()); 5523 MacroEmissionCheckScope guard(this); 5524 ITScope it_scope(this, &cond); 5525 vacle(cond, dt, rd, rn, rm); 5526 } 5527 void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5528 Vacle(al, dt, rd, rn, rm); 5529 } 5530 5531 void Vaclt( 5532 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5533 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5534 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5535 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5536 VIXL_ASSERT(allow_macro_instructions_); 5537 VIXL_ASSERT(OutsideITBlock()); 5538 MacroEmissionCheckScope guard(this); 5539 ITScope it_scope(this, &cond); 5540 vaclt(cond, dt, rd, rn, rm); 5541 } 5542 void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5543 Vaclt(al, dt, rd, rn, rm); 5544 } 5545 5546 void Vaclt( 5547 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5548 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5549 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5550 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5551 VIXL_ASSERT(allow_macro_instructions_); 5552 VIXL_ASSERT(OutsideITBlock()); 5553 MacroEmissionCheckScope guard(this); 5554 ITScope it_scope(this, &cond); 5555 vaclt(cond, dt, rd, rn, rm); 5556 } 5557 void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5558 Vaclt(al, dt, rd, rn, rm); 5559 } 5560 5561 void Vadd( 5562 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5563 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5564 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5565 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5566 VIXL_ASSERT(allow_macro_instructions_); 5567 VIXL_ASSERT(OutsideITBlock()); 5568 MacroEmissionCheckScope guard(this); 5569 ITScope it_scope(this, &cond); 5570 vadd(cond, dt, rd, rn, rm); 5571 } 5572 void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5573 Vadd(al, dt, rd, rn, rm); 5574 } 5575 5576 void Vadd( 5577 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5578 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5579 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5580 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5581 VIXL_ASSERT(allow_macro_instructions_); 5582 VIXL_ASSERT(OutsideITBlock()); 5583 MacroEmissionCheckScope guard(this); 5584 ITScope it_scope(this, &cond); 5585 vadd(cond, dt, rd, rn, rm); 5586 } 5587 void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5588 Vadd(al, dt, rd, rn, rm); 5589 } 5590 5591 void Vadd( 5592 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 5593 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5594 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5595 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5596 VIXL_ASSERT(allow_macro_instructions_); 5597 VIXL_ASSERT(OutsideITBlock()); 5598 MacroEmissionCheckScope guard(this); 5599 ITScope it_scope(this, &cond); 5600 vadd(cond, dt, rd, rn, rm); 5601 } 5602 void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 5603 Vadd(al, dt, rd, rn, rm); 5604 } 5605 5606 void Vaddhn( 5607 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 5608 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5609 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5610 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5611 VIXL_ASSERT(allow_macro_instructions_); 5612 VIXL_ASSERT(OutsideITBlock()); 5613 MacroEmissionCheckScope guard(this); 5614 ITScope it_scope(this, &cond); 5615 vaddhn(cond, dt, rd, rn, rm); 5616 } 5617 void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 5618 Vaddhn(al, dt, rd, rn, rm); 5619 } 5620 5621 void Vaddl( 5622 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5623 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5624 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5625 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5626 VIXL_ASSERT(allow_macro_instructions_); 5627 VIXL_ASSERT(OutsideITBlock()); 5628 MacroEmissionCheckScope guard(this); 5629 ITScope it_scope(this, &cond); 5630 vaddl(cond, dt, rd, rn, rm); 5631 } 5632 void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5633 Vaddl(al, dt, rd, rn, rm); 5634 } 5635 5636 void Vaddw( 5637 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) { 5638 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5639 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5640 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5641 VIXL_ASSERT(allow_macro_instructions_); 5642 VIXL_ASSERT(OutsideITBlock()); 5643 MacroEmissionCheckScope guard(this); 5644 ITScope it_scope(this, &cond); 5645 vaddw(cond, dt, rd, rn, rm); 5646 } 5647 void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) { 5648 Vaddw(al, dt, rd, rn, rm); 5649 } 5650 5651 void Vand(Condition cond, 5652 DataType dt, 5653 DRegister rd, 5654 DRegister rn, 5655 const DOperand& operand) { 5656 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5657 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5658 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5659 VIXL_ASSERT(allow_macro_instructions_); 5660 VIXL_ASSERT(OutsideITBlock()); 5661 MacroEmissionCheckScope guard(this); 5662 ITScope it_scope(this, &cond); 5663 vand(cond, dt, rd, rn, operand); 5664 } 5665 void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 5666 Vand(al, dt, rd, rn, operand); 5667 } 5668 5669 void Vand(Condition cond, 5670 DataType dt, 5671 QRegister rd, 5672 QRegister rn, 5673 const QOperand& operand) { 5674 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5675 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5676 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5677 VIXL_ASSERT(allow_macro_instructions_); 5678 VIXL_ASSERT(OutsideITBlock()); 5679 MacroEmissionCheckScope guard(this); 5680 ITScope it_scope(this, &cond); 5681 vand(cond, dt, rd, rn, operand); 5682 } 5683 void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 5684 Vand(al, dt, rd, rn, operand); 5685 } 5686 5687 void Vbic(Condition cond, 5688 DataType dt, 5689 DRegister rd, 5690 DRegister rn, 5691 const DOperand& operand) { 5692 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5693 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5694 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5695 VIXL_ASSERT(allow_macro_instructions_); 5696 VIXL_ASSERT(OutsideITBlock()); 5697 MacroEmissionCheckScope guard(this); 5698 ITScope it_scope(this, &cond); 5699 vbic(cond, dt, rd, rn, operand); 5700 } 5701 void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 5702 Vbic(al, dt, rd, rn, operand); 5703 } 5704 5705 void Vbic(Condition cond, 5706 DataType dt, 5707 QRegister rd, 5708 QRegister rn, 5709 const QOperand& operand) { 5710 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5711 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5712 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5713 VIXL_ASSERT(allow_macro_instructions_); 5714 VIXL_ASSERT(OutsideITBlock()); 5715 MacroEmissionCheckScope guard(this); 5716 ITScope it_scope(this, &cond); 5717 vbic(cond, dt, rd, rn, operand); 5718 } 5719 void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 5720 Vbic(al, dt, rd, rn, operand); 5721 } 5722 5723 void Vbif( 5724 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5725 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5726 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5727 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5728 VIXL_ASSERT(allow_macro_instructions_); 5729 VIXL_ASSERT(OutsideITBlock()); 5730 MacroEmissionCheckScope guard(this); 5731 ITScope it_scope(this, &cond); 5732 vbif(cond, dt, rd, rn, rm); 5733 } 5734 void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5735 Vbif(al, dt, rd, rn, rm); 5736 } 5737 void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 5738 Vbif(cond, kDataTypeValueNone, rd, rn, rm); 5739 } 5740 void Vbif(DRegister rd, DRegister rn, DRegister rm) { 5741 Vbif(al, kDataTypeValueNone, rd, rn, rm); 5742 } 5743 5744 void Vbif( 5745 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5746 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5747 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5748 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5749 VIXL_ASSERT(allow_macro_instructions_); 5750 VIXL_ASSERT(OutsideITBlock()); 5751 MacroEmissionCheckScope guard(this); 5752 ITScope it_scope(this, &cond); 5753 vbif(cond, dt, rd, rn, rm); 5754 } 5755 void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5756 Vbif(al, dt, rd, rn, rm); 5757 } 5758 void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 5759 Vbif(cond, kDataTypeValueNone, rd, rn, rm); 5760 } 5761 void Vbif(QRegister rd, QRegister rn, QRegister rm) { 5762 Vbif(al, kDataTypeValueNone, rd, rn, rm); 5763 } 5764 5765 void Vbit( 5766 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5767 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5768 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5769 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5770 VIXL_ASSERT(allow_macro_instructions_); 5771 VIXL_ASSERT(OutsideITBlock()); 5772 MacroEmissionCheckScope guard(this); 5773 ITScope it_scope(this, &cond); 5774 vbit(cond, dt, rd, rn, rm); 5775 } 5776 void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5777 Vbit(al, dt, rd, rn, rm); 5778 } 5779 void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 5780 Vbit(cond, kDataTypeValueNone, rd, rn, rm); 5781 } 5782 void Vbit(DRegister rd, DRegister rn, DRegister rm) { 5783 Vbit(al, kDataTypeValueNone, rd, rn, rm); 5784 } 5785 5786 void Vbit( 5787 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5788 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5789 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5790 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5791 VIXL_ASSERT(allow_macro_instructions_); 5792 VIXL_ASSERT(OutsideITBlock()); 5793 MacroEmissionCheckScope guard(this); 5794 ITScope it_scope(this, &cond); 5795 vbit(cond, dt, rd, rn, rm); 5796 } 5797 void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5798 Vbit(al, dt, rd, rn, rm); 5799 } 5800 void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 5801 Vbit(cond, kDataTypeValueNone, rd, rn, rm); 5802 } 5803 void Vbit(QRegister rd, QRegister rn, QRegister rm) { 5804 Vbit(al, kDataTypeValueNone, rd, rn, rm); 5805 } 5806 5807 void Vbsl( 5808 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5809 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5810 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5811 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5812 VIXL_ASSERT(allow_macro_instructions_); 5813 VIXL_ASSERT(OutsideITBlock()); 5814 MacroEmissionCheckScope guard(this); 5815 ITScope it_scope(this, &cond); 5816 vbsl(cond, dt, rd, rn, rm); 5817 } 5818 void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5819 Vbsl(al, dt, rd, rn, rm); 5820 } 5821 void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 5822 Vbsl(cond, kDataTypeValueNone, rd, rn, rm); 5823 } 5824 void Vbsl(DRegister rd, DRegister rn, DRegister rm) { 5825 Vbsl(al, kDataTypeValueNone, rd, rn, rm); 5826 } 5827 5828 void Vbsl( 5829 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5830 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5831 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5832 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5833 VIXL_ASSERT(allow_macro_instructions_); 5834 VIXL_ASSERT(OutsideITBlock()); 5835 MacroEmissionCheckScope guard(this); 5836 ITScope it_scope(this, &cond); 5837 vbsl(cond, dt, rd, rn, rm); 5838 } 5839 void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5840 Vbsl(al, dt, rd, rn, rm); 5841 } 5842 void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 5843 Vbsl(cond, kDataTypeValueNone, rd, rn, rm); 5844 } 5845 void Vbsl(QRegister rd, QRegister rn, QRegister rm) { 5846 Vbsl(al, kDataTypeValueNone, rd, rn, rm); 5847 } 5848 5849 void Vceq(Condition cond, 5850 DataType dt, 5851 DRegister rd, 5852 DRegister rm, 5853 const DOperand& operand) { 5854 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5856 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5857 VIXL_ASSERT(allow_macro_instructions_); 5858 VIXL_ASSERT(OutsideITBlock()); 5859 MacroEmissionCheckScope guard(this); 5860 ITScope it_scope(this, &cond); 5861 vceq(cond, dt, rd, rm, operand); 5862 } 5863 void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 5864 Vceq(al, dt, rd, rm, operand); 5865 } 5866 5867 void Vceq(Condition cond, 5868 DataType dt, 5869 QRegister rd, 5870 QRegister rm, 5871 const QOperand& operand) { 5872 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5873 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5874 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5875 VIXL_ASSERT(allow_macro_instructions_); 5876 VIXL_ASSERT(OutsideITBlock()); 5877 MacroEmissionCheckScope guard(this); 5878 ITScope it_scope(this, &cond); 5879 vceq(cond, dt, rd, rm, operand); 5880 } 5881 void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 5882 Vceq(al, dt, rd, rm, operand); 5883 } 5884 5885 void Vceq( 5886 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5887 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5888 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5889 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5890 VIXL_ASSERT(allow_macro_instructions_); 5891 VIXL_ASSERT(OutsideITBlock()); 5892 MacroEmissionCheckScope guard(this); 5893 ITScope it_scope(this, &cond); 5894 vceq(cond, dt, rd, rn, rm); 5895 } 5896 void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5897 Vceq(al, dt, rd, rn, rm); 5898 } 5899 5900 void Vceq( 5901 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5902 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5903 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5904 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5905 VIXL_ASSERT(allow_macro_instructions_); 5906 VIXL_ASSERT(OutsideITBlock()); 5907 MacroEmissionCheckScope guard(this); 5908 ITScope it_scope(this, &cond); 5909 vceq(cond, dt, rd, rn, rm); 5910 } 5911 void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5912 Vceq(al, dt, rd, rn, rm); 5913 } 5914 5915 void Vcge(Condition cond, 5916 DataType dt, 5917 DRegister rd, 5918 DRegister rm, 5919 const DOperand& operand) { 5920 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5921 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5922 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5923 VIXL_ASSERT(allow_macro_instructions_); 5924 VIXL_ASSERT(OutsideITBlock()); 5925 MacroEmissionCheckScope guard(this); 5926 ITScope it_scope(this, &cond); 5927 vcge(cond, dt, rd, rm, operand); 5928 } 5929 void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 5930 Vcge(al, dt, rd, rm, operand); 5931 } 5932 5933 void Vcge(Condition cond, 5934 DataType dt, 5935 QRegister rd, 5936 QRegister rm, 5937 const QOperand& operand) { 5938 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5939 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5940 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5941 VIXL_ASSERT(allow_macro_instructions_); 5942 VIXL_ASSERT(OutsideITBlock()); 5943 MacroEmissionCheckScope guard(this); 5944 ITScope it_scope(this, &cond); 5945 vcge(cond, dt, rd, rm, operand); 5946 } 5947 void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 5948 Vcge(al, dt, rd, rm, operand); 5949 } 5950 5951 void Vcge( 5952 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5953 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5954 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5955 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5956 VIXL_ASSERT(allow_macro_instructions_); 5957 VIXL_ASSERT(OutsideITBlock()); 5958 MacroEmissionCheckScope guard(this); 5959 ITScope it_scope(this, &cond); 5960 vcge(cond, dt, rd, rn, rm); 5961 } 5962 void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5963 Vcge(al, dt, rd, rn, rm); 5964 } 5965 5966 void Vcge( 5967 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5968 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5969 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5970 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5971 VIXL_ASSERT(allow_macro_instructions_); 5972 VIXL_ASSERT(OutsideITBlock()); 5973 MacroEmissionCheckScope guard(this); 5974 ITScope it_scope(this, &cond); 5975 vcge(cond, dt, rd, rn, rm); 5976 } 5977 void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5978 Vcge(al, dt, rd, rn, rm); 5979 } 5980 5981 void Vcgt(Condition cond, 5982 DataType dt, 5983 DRegister rd, 5984 DRegister rm, 5985 const DOperand& operand) { 5986 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5987 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5988 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5989 VIXL_ASSERT(allow_macro_instructions_); 5990 VIXL_ASSERT(OutsideITBlock()); 5991 MacroEmissionCheckScope guard(this); 5992 ITScope it_scope(this, &cond); 5993 vcgt(cond, dt, rd, rm, operand); 5994 } 5995 void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 5996 Vcgt(al, dt, rd, rm, operand); 5997 } 5998 5999 void Vcgt(Condition cond, 6000 DataType dt, 6001 QRegister rd, 6002 QRegister rm, 6003 const QOperand& operand) { 6004 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6005 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6006 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6007 VIXL_ASSERT(allow_macro_instructions_); 6008 VIXL_ASSERT(OutsideITBlock()); 6009 MacroEmissionCheckScope guard(this); 6010 ITScope it_scope(this, &cond); 6011 vcgt(cond, dt, rd, rm, operand); 6012 } 6013 void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 6014 Vcgt(al, dt, rd, rm, operand); 6015 } 6016 6017 void Vcgt( 6018 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6019 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6020 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6021 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6022 VIXL_ASSERT(allow_macro_instructions_); 6023 VIXL_ASSERT(OutsideITBlock()); 6024 MacroEmissionCheckScope guard(this); 6025 ITScope it_scope(this, &cond); 6026 vcgt(cond, dt, rd, rn, rm); 6027 } 6028 void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6029 Vcgt(al, dt, rd, rn, rm); 6030 } 6031 6032 void Vcgt( 6033 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6034 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6035 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6036 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6037 VIXL_ASSERT(allow_macro_instructions_); 6038 VIXL_ASSERT(OutsideITBlock()); 6039 MacroEmissionCheckScope guard(this); 6040 ITScope it_scope(this, &cond); 6041 vcgt(cond, dt, rd, rn, rm); 6042 } 6043 void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6044 Vcgt(al, dt, rd, rn, rm); 6045 } 6046 6047 void Vcle(Condition cond, 6048 DataType dt, 6049 DRegister rd, 6050 DRegister rm, 6051 const DOperand& operand) { 6052 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6053 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6054 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6055 VIXL_ASSERT(allow_macro_instructions_); 6056 VIXL_ASSERT(OutsideITBlock()); 6057 MacroEmissionCheckScope guard(this); 6058 ITScope it_scope(this, &cond); 6059 vcle(cond, dt, rd, rm, operand); 6060 } 6061 void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 6062 Vcle(al, dt, rd, rm, operand); 6063 } 6064 6065 void Vcle(Condition cond, 6066 DataType dt, 6067 QRegister rd, 6068 QRegister rm, 6069 const QOperand& operand) { 6070 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6071 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6072 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6073 VIXL_ASSERT(allow_macro_instructions_); 6074 VIXL_ASSERT(OutsideITBlock()); 6075 MacroEmissionCheckScope guard(this); 6076 ITScope it_scope(this, &cond); 6077 vcle(cond, dt, rd, rm, operand); 6078 } 6079 void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 6080 Vcle(al, dt, rd, rm, operand); 6081 } 6082 6083 void Vcle( 6084 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6085 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6086 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6087 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6088 VIXL_ASSERT(allow_macro_instructions_); 6089 VIXL_ASSERT(OutsideITBlock()); 6090 MacroEmissionCheckScope guard(this); 6091 ITScope it_scope(this, &cond); 6092 vcle(cond, dt, rd, rn, rm); 6093 } 6094 void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6095 Vcle(al, dt, rd, rn, rm); 6096 } 6097 6098 void Vcle( 6099 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6100 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6101 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6102 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6103 VIXL_ASSERT(allow_macro_instructions_); 6104 VIXL_ASSERT(OutsideITBlock()); 6105 MacroEmissionCheckScope guard(this); 6106 ITScope it_scope(this, &cond); 6107 vcle(cond, dt, rd, rn, rm); 6108 } 6109 void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6110 Vcle(al, dt, rd, rn, rm); 6111 } 6112 6113 void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6114 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6115 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6116 VIXL_ASSERT(allow_macro_instructions_); 6117 VIXL_ASSERT(OutsideITBlock()); 6118 MacroEmissionCheckScope guard(this); 6119 ITScope it_scope(this, &cond); 6120 vcls(cond, dt, rd, rm); 6121 } 6122 void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); } 6123 6124 void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) { 6125 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6126 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6127 VIXL_ASSERT(allow_macro_instructions_); 6128 VIXL_ASSERT(OutsideITBlock()); 6129 MacroEmissionCheckScope guard(this); 6130 ITScope it_scope(this, &cond); 6131 vcls(cond, dt, rd, rm); 6132 } 6133 void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); } 6134 6135 void Vclt(Condition cond, 6136 DataType dt, 6137 DRegister rd, 6138 DRegister rm, 6139 const DOperand& operand) { 6140 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6141 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6142 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6143 VIXL_ASSERT(allow_macro_instructions_); 6144 VIXL_ASSERT(OutsideITBlock()); 6145 MacroEmissionCheckScope guard(this); 6146 ITScope it_scope(this, &cond); 6147 vclt(cond, dt, rd, rm, operand); 6148 } 6149 void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 6150 Vclt(al, dt, rd, rm, operand); 6151 } 6152 6153 void Vclt(Condition cond, 6154 DataType dt, 6155 QRegister rd, 6156 QRegister rm, 6157 const QOperand& operand) { 6158 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6159 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6160 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6161 VIXL_ASSERT(allow_macro_instructions_); 6162 VIXL_ASSERT(OutsideITBlock()); 6163 MacroEmissionCheckScope guard(this); 6164 ITScope it_scope(this, &cond); 6165 vclt(cond, dt, rd, rm, operand); 6166 } 6167 void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 6168 Vclt(al, dt, rd, rm, operand); 6169 } 6170 6171 void Vclt( 6172 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6173 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6174 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6175 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6176 VIXL_ASSERT(allow_macro_instructions_); 6177 VIXL_ASSERT(OutsideITBlock()); 6178 MacroEmissionCheckScope guard(this); 6179 ITScope it_scope(this, &cond); 6180 vclt(cond, dt, rd, rn, rm); 6181 } 6182 void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6183 Vclt(al, dt, rd, rn, rm); 6184 } 6185 6186 void Vclt( 6187 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6188 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6189 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6190 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6191 VIXL_ASSERT(allow_macro_instructions_); 6192 VIXL_ASSERT(OutsideITBlock()); 6193 MacroEmissionCheckScope guard(this); 6194 ITScope it_scope(this, &cond); 6195 vclt(cond, dt, rd, rn, rm); 6196 } 6197 void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6198 Vclt(al, dt, rd, rn, rm); 6199 } 6200 6201 void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6202 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6203 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6204 VIXL_ASSERT(allow_macro_instructions_); 6205 VIXL_ASSERT(OutsideITBlock()); 6206 MacroEmissionCheckScope guard(this); 6207 ITScope it_scope(this, &cond); 6208 vclz(cond, dt, rd, rm); 6209 } 6210 void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); } 6211 6212 void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) { 6213 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6214 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6215 VIXL_ASSERT(allow_macro_instructions_); 6216 VIXL_ASSERT(OutsideITBlock()); 6217 MacroEmissionCheckScope guard(this); 6218 ITScope it_scope(this, &cond); 6219 vclz(cond, dt, rd, rm); 6220 } 6221 void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); } 6222 6223 void Vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm) { 6224 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6225 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6226 VIXL_ASSERT(allow_macro_instructions_); 6227 VIXL_ASSERT(OutsideITBlock()); 6228 MacroEmissionCheckScope guard(this); 6229 ITScope it_scope(this, &cond); 6230 vcmp(cond, dt, rd, rm); 6231 } 6232 void Vcmp(DataType dt, SRegister rd, SRegister rm) { Vcmp(al, dt, rd, rm); } 6233 6234 void Vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6235 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6236 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6237 VIXL_ASSERT(allow_macro_instructions_); 6238 VIXL_ASSERT(OutsideITBlock()); 6239 MacroEmissionCheckScope guard(this); 6240 ITScope it_scope(this, &cond); 6241 vcmp(cond, dt, rd, rm); 6242 } 6243 void Vcmp(DataType dt, DRegister rd, DRegister rm) { Vcmp(al, dt, rd, rm); } 6244 6245 void Vcmp(Condition cond, DataType dt, SRegister rd, double imm) { 6246 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6247 VIXL_ASSERT(allow_macro_instructions_); 6248 VIXL_ASSERT(OutsideITBlock()); 6249 MacroEmissionCheckScope guard(this); 6250 ITScope it_scope(this, &cond); 6251 vcmp(cond, dt, rd, imm); 6252 } 6253 void Vcmp(DataType dt, SRegister rd, double imm) { Vcmp(al, dt, rd, imm); } 6254 6255 void Vcmp(Condition cond, DataType dt, DRegister rd, double imm) { 6256 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6257 VIXL_ASSERT(allow_macro_instructions_); 6258 VIXL_ASSERT(OutsideITBlock()); 6259 MacroEmissionCheckScope guard(this); 6260 ITScope it_scope(this, &cond); 6261 vcmp(cond, dt, rd, imm); 6262 } 6263 void Vcmp(DataType dt, DRegister rd, double imm) { Vcmp(al, dt, rd, imm); } 6264 6265 void Vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm) { 6266 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6267 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6268 VIXL_ASSERT(allow_macro_instructions_); 6269 VIXL_ASSERT(OutsideITBlock()); 6270 MacroEmissionCheckScope guard(this); 6271 ITScope it_scope(this, &cond); 6272 vcmpe(cond, dt, rd, rm); 6273 } 6274 void Vcmpe(DataType dt, SRegister rd, SRegister rm) { Vcmpe(al, dt, rd, rm); } 6275 6276 void Vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6277 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6278 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6279 VIXL_ASSERT(allow_macro_instructions_); 6280 VIXL_ASSERT(OutsideITBlock()); 6281 MacroEmissionCheckScope guard(this); 6282 ITScope it_scope(this, &cond); 6283 vcmpe(cond, dt, rd, rm); 6284 } 6285 void Vcmpe(DataType dt, DRegister rd, DRegister rm) { Vcmpe(al, dt, rd, rm); } 6286 6287 void Vcmpe(Condition cond, DataType dt, SRegister rd, double imm) { 6288 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6289 VIXL_ASSERT(allow_macro_instructions_); 6290 VIXL_ASSERT(OutsideITBlock()); 6291 MacroEmissionCheckScope guard(this); 6292 ITScope it_scope(this, &cond); 6293 vcmpe(cond, dt, rd, imm); 6294 } 6295 void Vcmpe(DataType dt, SRegister rd, double imm) { Vcmpe(al, dt, rd, imm); } 6296 6297 void Vcmpe(Condition cond, DataType dt, DRegister rd, double imm) { 6298 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6299 VIXL_ASSERT(allow_macro_instructions_); 6300 VIXL_ASSERT(OutsideITBlock()); 6301 MacroEmissionCheckScope guard(this); 6302 ITScope it_scope(this, &cond); 6303 vcmpe(cond, dt, rd, imm); 6304 } 6305 void Vcmpe(DataType dt, DRegister rd, double imm) { Vcmpe(al, dt, rd, imm); } 6306 6307 void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6308 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6309 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6310 VIXL_ASSERT(allow_macro_instructions_); 6311 VIXL_ASSERT(OutsideITBlock()); 6312 MacroEmissionCheckScope guard(this); 6313 ITScope it_scope(this, &cond); 6314 vcnt(cond, dt, rd, rm); 6315 } 6316 void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); } 6317 6318 void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) { 6319 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6320 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6321 VIXL_ASSERT(allow_macro_instructions_); 6322 VIXL_ASSERT(OutsideITBlock()); 6323 MacroEmissionCheckScope guard(this); 6324 ITScope it_scope(this, &cond); 6325 vcnt(cond, dt, rd, rm); 6326 } 6327 void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); } 6328 6329 void Vcvt( 6330 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6331 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6332 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6333 VIXL_ASSERT(allow_macro_instructions_); 6334 VIXL_ASSERT(OutsideITBlock()); 6335 MacroEmissionCheckScope guard(this); 6336 ITScope it_scope(this, &cond); 6337 vcvt(cond, dt1, dt2, rd, rm); 6338 } 6339 void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6340 Vcvt(al, dt1, dt2, rd, rm); 6341 } 6342 6343 void Vcvt( 6344 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6345 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6346 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6347 VIXL_ASSERT(allow_macro_instructions_); 6348 VIXL_ASSERT(OutsideITBlock()); 6349 MacroEmissionCheckScope guard(this); 6350 ITScope it_scope(this, &cond); 6351 vcvt(cond, dt1, dt2, rd, rm); 6352 } 6353 void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6354 Vcvt(al, dt1, dt2, rd, rm); 6355 } 6356 6357 void Vcvt(Condition cond, 6358 DataType dt1, 6359 DataType dt2, 6360 DRegister rd, 6361 DRegister rm, 6362 int32_t fbits) { 6363 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6364 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6365 VIXL_ASSERT(allow_macro_instructions_); 6366 VIXL_ASSERT(OutsideITBlock()); 6367 MacroEmissionCheckScope guard(this); 6368 ITScope it_scope(this, &cond); 6369 vcvt(cond, dt1, dt2, rd, rm, fbits); 6370 } 6371 void Vcvt( 6372 DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) { 6373 Vcvt(al, dt1, dt2, rd, rm, fbits); 6374 } 6375 6376 void Vcvt(Condition cond, 6377 DataType dt1, 6378 DataType dt2, 6379 QRegister rd, 6380 QRegister rm, 6381 int32_t fbits) { 6382 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6383 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6384 VIXL_ASSERT(allow_macro_instructions_); 6385 VIXL_ASSERT(OutsideITBlock()); 6386 MacroEmissionCheckScope guard(this); 6387 ITScope it_scope(this, &cond); 6388 vcvt(cond, dt1, dt2, rd, rm, fbits); 6389 } 6390 void Vcvt( 6391 DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) { 6392 Vcvt(al, dt1, dt2, rd, rm, fbits); 6393 } 6394 6395 void Vcvt(Condition cond, 6396 DataType dt1, 6397 DataType dt2, 6398 SRegister rd, 6399 SRegister rm, 6400 int32_t fbits) { 6401 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6402 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6403 VIXL_ASSERT(allow_macro_instructions_); 6404 VIXL_ASSERT(OutsideITBlock()); 6405 MacroEmissionCheckScope guard(this); 6406 ITScope it_scope(this, &cond); 6407 vcvt(cond, dt1, dt2, rd, rm, fbits); 6408 } 6409 void Vcvt( 6410 DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) { 6411 Vcvt(al, dt1, dt2, rd, rm, fbits); 6412 } 6413 6414 void Vcvt( 6415 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6416 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6417 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6418 VIXL_ASSERT(allow_macro_instructions_); 6419 VIXL_ASSERT(OutsideITBlock()); 6420 MacroEmissionCheckScope guard(this); 6421 ITScope it_scope(this, &cond); 6422 vcvt(cond, dt1, dt2, rd, rm); 6423 } 6424 void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6425 Vcvt(al, dt1, dt2, rd, rm); 6426 } 6427 6428 void Vcvt( 6429 Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6430 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6431 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6432 VIXL_ASSERT(allow_macro_instructions_); 6433 VIXL_ASSERT(OutsideITBlock()); 6434 MacroEmissionCheckScope guard(this); 6435 ITScope it_scope(this, &cond); 6436 vcvt(cond, dt1, dt2, rd, rm); 6437 } 6438 void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6439 Vcvt(al, dt1, dt2, rd, rm); 6440 } 6441 6442 void Vcvt( 6443 Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) { 6444 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6445 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6446 VIXL_ASSERT(allow_macro_instructions_); 6447 VIXL_ASSERT(OutsideITBlock()); 6448 MacroEmissionCheckScope guard(this); 6449 ITScope it_scope(this, &cond); 6450 vcvt(cond, dt1, dt2, rd, rm); 6451 } 6452 void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) { 6453 Vcvt(al, dt1, dt2, rd, rm); 6454 } 6455 6456 void Vcvt( 6457 Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) { 6458 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6459 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6460 VIXL_ASSERT(allow_macro_instructions_); 6461 VIXL_ASSERT(OutsideITBlock()); 6462 MacroEmissionCheckScope guard(this); 6463 ITScope it_scope(this, &cond); 6464 vcvt(cond, dt1, dt2, rd, rm); 6465 } 6466 void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) { 6467 Vcvt(al, dt1, dt2, rd, rm); 6468 } 6469 6470 void Vcvt( 6471 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6472 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6473 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6474 VIXL_ASSERT(allow_macro_instructions_); 6475 VIXL_ASSERT(OutsideITBlock()); 6476 MacroEmissionCheckScope guard(this); 6477 ITScope it_scope(this, &cond); 6478 vcvt(cond, dt1, dt2, rd, rm); 6479 } 6480 void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6481 Vcvt(al, dt1, dt2, rd, rm); 6482 } 6483 6484 void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6485 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6486 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6487 VIXL_ASSERT(allow_macro_instructions_); 6488 VIXL_ASSERT(OutsideITBlock()); 6489 MacroEmissionCheckScope guard(this); 6490 vcvta(dt1, dt2, rd, rm); 6491 } 6492 6493 void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6494 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6495 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6496 VIXL_ASSERT(allow_macro_instructions_); 6497 VIXL_ASSERT(OutsideITBlock()); 6498 MacroEmissionCheckScope guard(this); 6499 vcvta(dt1, dt2, rd, rm); 6500 } 6501 6502 void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6503 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6504 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6505 VIXL_ASSERT(allow_macro_instructions_); 6506 VIXL_ASSERT(OutsideITBlock()); 6507 MacroEmissionCheckScope guard(this); 6508 vcvta(dt1, dt2, rd, rm); 6509 } 6510 6511 void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6512 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6513 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6514 VIXL_ASSERT(allow_macro_instructions_); 6515 VIXL_ASSERT(OutsideITBlock()); 6516 MacroEmissionCheckScope guard(this); 6517 vcvta(dt1, dt2, rd, rm); 6518 } 6519 6520 void Vcvtb( 6521 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6522 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6523 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6524 VIXL_ASSERT(allow_macro_instructions_); 6525 VIXL_ASSERT(OutsideITBlock()); 6526 MacroEmissionCheckScope guard(this); 6527 ITScope it_scope(this, &cond); 6528 vcvtb(cond, dt1, dt2, rd, rm); 6529 } 6530 void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6531 Vcvtb(al, dt1, dt2, rd, rm); 6532 } 6533 6534 void Vcvtb( 6535 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6536 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6537 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6538 VIXL_ASSERT(allow_macro_instructions_); 6539 VIXL_ASSERT(OutsideITBlock()); 6540 MacroEmissionCheckScope guard(this); 6541 ITScope it_scope(this, &cond); 6542 vcvtb(cond, dt1, dt2, rd, rm); 6543 } 6544 void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6545 Vcvtb(al, dt1, dt2, rd, rm); 6546 } 6547 6548 void Vcvtb( 6549 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6550 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6551 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6552 VIXL_ASSERT(allow_macro_instructions_); 6553 VIXL_ASSERT(OutsideITBlock()); 6554 MacroEmissionCheckScope guard(this); 6555 ITScope it_scope(this, &cond); 6556 vcvtb(cond, dt1, dt2, rd, rm); 6557 } 6558 void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6559 Vcvtb(al, dt1, dt2, rd, rm); 6560 } 6561 6562 void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6563 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6564 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6565 VIXL_ASSERT(allow_macro_instructions_); 6566 VIXL_ASSERT(OutsideITBlock()); 6567 MacroEmissionCheckScope guard(this); 6568 vcvtm(dt1, dt2, rd, rm); 6569 } 6570 6571 void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6572 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6573 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6574 VIXL_ASSERT(allow_macro_instructions_); 6575 VIXL_ASSERT(OutsideITBlock()); 6576 MacroEmissionCheckScope guard(this); 6577 vcvtm(dt1, dt2, rd, rm); 6578 } 6579 6580 void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6581 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6582 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6583 VIXL_ASSERT(allow_macro_instructions_); 6584 VIXL_ASSERT(OutsideITBlock()); 6585 MacroEmissionCheckScope guard(this); 6586 vcvtm(dt1, dt2, rd, rm); 6587 } 6588 6589 void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6590 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6591 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6592 VIXL_ASSERT(allow_macro_instructions_); 6593 VIXL_ASSERT(OutsideITBlock()); 6594 MacroEmissionCheckScope guard(this); 6595 vcvtm(dt1, dt2, rd, rm); 6596 } 6597 6598 void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6599 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6600 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6601 VIXL_ASSERT(allow_macro_instructions_); 6602 VIXL_ASSERT(OutsideITBlock()); 6603 MacroEmissionCheckScope guard(this); 6604 vcvtn(dt1, dt2, rd, rm); 6605 } 6606 6607 void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6608 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6609 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6610 VIXL_ASSERT(allow_macro_instructions_); 6611 VIXL_ASSERT(OutsideITBlock()); 6612 MacroEmissionCheckScope guard(this); 6613 vcvtn(dt1, dt2, rd, rm); 6614 } 6615 6616 void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6617 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6618 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6619 VIXL_ASSERT(allow_macro_instructions_); 6620 VIXL_ASSERT(OutsideITBlock()); 6621 MacroEmissionCheckScope guard(this); 6622 vcvtn(dt1, dt2, rd, rm); 6623 } 6624 6625 void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6626 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6627 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6628 VIXL_ASSERT(allow_macro_instructions_); 6629 VIXL_ASSERT(OutsideITBlock()); 6630 MacroEmissionCheckScope guard(this); 6631 vcvtn(dt1, dt2, rd, rm); 6632 } 6633 6634 void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6635 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6636 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6637 VIXL_ASSERT(allow_macro_instructions_); 6638 VIXL_ASSERT(OutsideITBlock()); 6639 MacroEmissionCheckScope guard(this); 6640 vcvtp(dt1, dt2, rd, rm); 6641 } 6642 6643 void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6644 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6645 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6646 VIXL_ASSERT(allow_macro_instructions_); 6647 VIXL_ASSERT(OutsideITBlock()); 6648 MacroEmissionCheckScope guard(this); 6649 vcvtp(dt1, dt2, rd, rm); 6650 } 6651 6652 void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6653 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6654 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6655 VIXL_ASSERT(allow_macro_instructions_); 6656 VIXL_ASSERT(OutsideITBlock()); 6657 MacroEmissionCheckScope guard(this); 6658 vcvtp(dt1, dt2, rd, rm); 6659 } 6660 6661 void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6662 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6663 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6664 VIXL_ASSERT(allow_macro_instructions_); 6665 VIXL_ASSERT(OutsideITBlock()); 6666 MacroEmissionCheckScope guard(this); 6667 vcvtp(dt1, dt2, rd, rm); 6668 } 6669 6670 void Vcvtr( 6671 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6672 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6673 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6674 VIXL_ASSERT(allow_macro_instructions_); 6675 VIXL_ASSERT(OutsideITBlock()); 6676 MacroEmissionCheckScope guard(this); 6677 ITScope it_scope(this, &cond); 6678 vcvtr(cond, dt1, dt2, rd, rm); 6679 } 6680 void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6681 Vcvtr(al, dt1, dt2, rd, rm); 6682 } 6683 6684 void Vcvtr( 6685 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6686 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6687 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6688 VIXL_ASSERT(allow_macro_instructions_); 6689 VIXL_ASSERT(OutsideITBlock()); 6690 MacroEmissionCheckScope guard(this); 6691 ITScope it_scope(this, &cond); 6692 vcvtr(cond, dt1, dt2, rd, rm); 6693 } 6694 void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6695 Vcvtr(al, dt1, dt2, rd, rm); 6696 } 6697 6698 void Vcvtt( 6699 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6700 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6701 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6702 VIXL_ASSERT(allow_macro_instructions_); 6703 VIXL_ASSERT(OutsideITBlock()); 6704 MacroEmissionCheckScope guard(this); 6705 ITScope it_scope(this, &cond); 6706 vcvtt(cond, dt1, dt2, rd, rm); 6707 } 6708 void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6709 Vcvtt(al, dt1, dt2, rd, rm); 6710 } 6711 6712 void Vcvtt( 6713 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6714 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6715 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6716 VIXL_ASSERT(allow_macro_instructions_); 6717 VIXL_ASSERT(OutsideITBlock()); 6718 MacroEmissionCheckScope guard(this); 6719 ITScope it_scope(this, &cond); 6720 vcvtt(cond, dt1, dt2, rd, rm); 6721 } 6722 void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6723 Vcvtt(al, dt1, dt2, rd, rm); 6724 } 6725 6726 void Vcvtt( 6727 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6728 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6729 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6730 VIXL_ASSERT(allow_macro_instructions_); 6731 VIXL_ASSERT(OutsideITBlock()); 6732 MacroEmissionCheckScope guard(this); 6733 ITScope it_scope(this, &cond); 6734 vcvtt(cond, dt1, dt2, rd, rm); 6735 } 6736 void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6737 Vcvtt(al, dt1, dt2, rd, rm); 6738 } 6739 6740 void Vdiv( 6741 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6742 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6743 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6744 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6745 VIXL_ASSERT(allow_macro_instructions_); 6746 VIXL_ASSERT(OutsideITBlock()); 6747 MacroEmissionCheckScope guard(this); 6748 ITScope it_scope(this, &cond); 6749 vdiv(cond, dt, rd, rn, rm); 6750 } 6751 void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6752 Vdiv(al, dt, rd, rn, rm); 6753 } 6754 6755 void Vdiv( 6756 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6757 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6758 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6759 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6760 VIXL_ASSERT(allow_macro_instructions_); 6761 VIXL_ASSERT(OutsideITBlock()); 6762 MacroEmissionCheckScope guard(this); 6763 ITScope it_scope(this, &cond); 6764 vdiv(cond, dt, rd, rn, rm); 6765 } 6766 void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6767 Vdiv(al, dt, rd, rn, rm); 6768 } 6769 6770 void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) { 6771 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6772 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 6773 VIXL_ASSERT(allow_macro_instructions_); 6774 VIXL_ASSERT(OutsideITBlock()); 6775 MacroEmissionCheckScope guard(this); 6776 ITScope it_scope(this, &cond); 6777 vdup(cond, dt, rd, rt); 6778 } 6779 void Vdup(DataType dt, QRegister rd, Register rt) { Vdup(al, dt, rd, rt); } 6780 6781 void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) { 6782 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6783 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 6784 VIXL_ASSERT(allow_macro_instructions_); 6785 VIXL_ASSERT(OutsideITBlock()); 6786 MacroEmissionCheckScope guard(this); 6787 ITScope it_scope(this, &cond); 6788 vdup(cond, dt, rd, rt); 6789 } 6790 void Vdup(DataType dt, DRegister rd, Register rt) { Vdup(al, dt, rd, rt); } 6791 6792 void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) { 6793 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6794 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6795 VIXL_ASSERT(allow_macro_instructions_); 6796 VIXL_ASSERT(OutsideITBlock()); 6797 MacroEmissionCheckScope guard(this); 6798 ITScope it_scope(this, &cond); 6799 vdup(cond, dt, rd, rm); 6800 } 6801 void Vdup(DataType dt, DRegister rd, DRegisterLane rm) { 6802 Vdup(al, dt, rd, rm); 6803 } 6804 6805 void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) { 6806 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6807 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6808 VIXL_ASSERT(allow_macro_instructions_); 6809 VIXL_ASSERT(OutsideITBlock()); 6810 MacroEmissionCheckScope guard(this); 6811 ITScope it_scope(this, &cond); 6812 vdup(cond, dt, rd, rm); 6813 } 6814 void Vdup(DataType dt, QRegister rd, DRegisterLane rm) { 6815 Vdup(al, dt, rd, rm); 6816 } 6817 6818 void Veor( 6819 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6820 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6821 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6822 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6823 VIXL_ASSERT(allow_macro_instructions_); 6824 VIXL_ASSERT(OutsideITBlock()); 6825 MacroEmissionCheckScope guard(this); 6826 ITScope it_scope(this, &cond); 6827 veor(cond, dt, rd, rn, rm); 6828 } 6829 void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6830 Veor(al, dt, rd, rn, rm); 6831 } 6832 void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 6833 Veor(cond, kDataTypeValueNone, rd, rn, rm); 6834 } 6835 void Veor(DRegister rd, DRegister rn, DRegister rm) { 6836 Veor(al, kDataTypeValueNone, rd, rn, rm); 6837 } 6838 6839 void Veor( 6840 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6841 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6842 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6843 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6844 VIXL_ASSERT(allow_macro_instructions_); 6845 VIXL_ASSERT(OutsideITBlock()); 6846 MacroEmissionCheckScope guard(this); 6847 ITScope it_scope(this, &cond); 6848 veor(cond, dt, rd, rn, rm); 6849 } 6850 void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6851 Veor(al, dt, rd, rn, rm); 6852 } 6853 void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 6854 Veor(cond, kDataTypeValueNone, rd, rn, rm); 6855 } 6856 void Veor(QRegister rd, QRegister rn, QRegister rm) { 6857 Veor(al, kDataTypeValueNone, rd, rn, rm); 6858 } 6859 6860 void Vext(Condition cond, 6861 DataType dt, 6862 DRegister rd, 6863 DRegister rn, 6864 DRegister rm, 6865 const DOperand& operand) { 6866 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6867 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6868 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6869 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6870 VIXL_ASSERT(allow_macro_instructions_); 6871 VIXL_ASSERT(OutsideITBlock()); 6872 MacroEmissionCheckScope guard(this); 6873 ITScope it_scope(this, &cond); 6874 vext(cond, dt, rd, rn, rm, operand); 6875 } 6876 void Vext(DataType dt, 6877 DRegister rd, 6878 DRegister rn, 6879 DRegister rm, 6880 const DOperand& operand) { 6881 Vext(al, dt, rd, rn, rm, operand); 6882 } 6883 6884 void Vext(Condition cond, 6885 DataType dt, 6886 QRegister rd, 6887 QRegister rn, 6888 QRegister rm, 6889 const QOperand& operand) { 6890 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6891 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6892 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6893 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6894 VIXL_ASSERT(allow_macro_instructions_); 6895 VIXL_ASSERT(OutsideITBlock()); 6896 MacroEmissionCheckScope guard(this); 6897 ITScope it_scope(this, &cond); 6898 vext(cond, dt, rd, rn, rm, operand); 6899 } 6900 void Vext(DataType dt, 6901 QRegister rd, 6902 QRegister rn, 6903 QRegister rm, 6904 const QOperand& operand) { 6905 Vext(al, dt, rd, rn, rm, operand); 6906 } 6907 6908 void Vfma( 6909 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6910 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6911 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6912 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6913 VIXL_ASSERT(allow_macro_instructions_); 6914 VIXL_ASSERT(OutsideITBlock()); 6915 MacroEmissionCheckScope guard(this); 6916 ITScope it_scope(this, &cond); 6917 vfma(cond, dt, rd, rn, rm); 6918 } 6919 void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6920 Vfma(al, dt, rd, rn, rm); 6921 } 6922 6923 void Vfma( 6924 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6925 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6926 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6927 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6928 VIXL_ASSERT(allow_macro_instructions_); 6929 VIXL_ASSERT(OutsideITBlock()); 6930 MacroEmissionCheckScope guard(this); 6931 ITScope it_scope(this, &cond); 6932 vfma(cond, dt, rd, rn, rm); 6933 } 6934 void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6935 Vfma(al, dt, rd, rn, rm); 6936 } 6937 6938 void Vfma( 6939 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6940 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6941 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6942 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6943 VIXL_ASSERT(allow_macro_instructions_); 6944 VIXL_ASSERT(OutsideITBlock()); 6945 MacroEmissionCheckScope guard(this); 6946 ITScope it_scope(this, &cond); 6947 vfma(cond, dt, rd, rn, rm); 6948 } 6949 void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6950 Vfma(al, dt, rd, rn, rm); 6951 } 6952 6953 void Vfms( 6954 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6955 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6956 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6957 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6958 VIXL_ASSERT(allow_macro_instructions_); 6959 VIXL_ASSERT(OutsideITBlock()); 6960 MacroEmissionCheckScope guard(this); 6961 ITScope it_scope(this, &cond); 6962 vfms(cond, dt, rd, rn, rm); 6963 } 6964 void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6965 Vfms(al, dt, rd, rn, rm); 6966 } 6967 6968 void Vfms( 6969 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6970 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6971 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6972 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6973 VIXL_ASSERT(allow_macro_instructions_); 6974 VIXL_ASSERT(OutsideITBlock()); 6975 MacroEmissionCheckScope guard(this); 6976 ITScope it_scope(this, &cond); 6977 vfms(cond, dt, rd, rn, rm); 6978 } 6979 void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6980 Vfms(al, dt, rd, rn, rm); 6981 } 6982 6983 void Vfms( 6984 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6985 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6986 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6987 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6988 VIXL_ASSERT(allow_macro_instructions_); 6989 VIXL_ASSERT(OutsideITBlock()); 6990 MacroEmissionCheckScope guard(this); 6991 ITScope it_scope(this, &cond); 6992 vfms(cond, dt, rd, rn, rm); 6993 } 6994 void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6995 Vfms(al, dt, rd, rn, rm); 6996 } 6997 6998 void Vfnma( 6999 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7000 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7001 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7002 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7003 VIXL_ASSERT(allow_macro_instructions_); 7004 VIXL_ASSERT(OutsideITBlock()); 7005 MacroEmissionCheckScope guard(this); 7006 ITScope it_scope(this, &cond); 7007 vfnma(cond, dt, rd, rn, rm); 7008 } 7009 void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7010 Vfnma(al, dt, rd, rn, rm); 7011 } 7012 7013 void Vfnma( 7014 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7015 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7016 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7017 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7018 VIXL_ASSERT(allow_macro_instructions_); 7019 VIXL_ASSERT(OutsideITBlock()); 7020 MacroEmissionCheckScope guard(this); 7021 ITScope it_scope(this, &cond); 7022 vfnma(cond, dt, rd, rn, rm); 7023 } 7024 void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7025 Vfnma(al, dt, rd, rn, rm); 7026 } 7027 7028 void Vfnms( 7029 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7030 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7031 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7032 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7033 VIXL_ASSERT(allow_macro_instructions_); 7034 VIXL_ASSERT(OutsideITBlock()); 7035 MacroEmissionCheckScope guard(this); 7036 ITScope it_scope(this, &cond); 7037 vfnms(cond, dt, rd, rn, rm); 7038 } 7039 void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7040 Vfnms(al, dt, rd, rn, rm); 7041 } 7042 7043 void Vfnms( 7044 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7045 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7046 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7047 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7048 VIXL_ASSERT(allow_macro_instructions_); 7049 VIXL_ASSERT(OutsideITBlock()); 7050 MacroEmissionCheckScope guard(this); 7051 ITScope it_scope(this, &cond); 7052 vfnms(cond, dt, rd, rn, rm); 7053 } 7054 void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7055 Vfnms(al, dt, rd, rn, rm); 7056 } 7057 7058 void Vhadd( 7059 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7060 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7061 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7062 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7063 VIXL_ASSERT(allow_macro_instructions_); 7064 VIXL_ASSERT(OutsideITBlock()); 7065 MacroEmissionCheckScope guard(this); 7066 ITScope it_scope(this, &cond); 7067 vhadd(cond, dt, rd, rn, rm); 7068 } 7069 void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7070 Vhadd(al, dt, rd, rn, rm); 7071 } 7072 7073 void Vhadd( 7074 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7075 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7076 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7077 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7078 VIXL_ASSERT(allow_macro_instructions_); 7079 VIXL_ASSERT(OutsideITBlock()); 7080 MacroEmissionCheckScope guard(this); 7081 ITScope it_scope(this, &cond); 7082 vhadd(cond, dt, rd, rn, rm); 7083 } 7084 void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7085 Vhadd(al, dt, rd, rn, rm); 7086 } 7087 7088 void Vhsub( 7089 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7090 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7091 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7092 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7093 VIXL_ASSERT(allow_macro_instructions_); 7094 VIXL_ASSERT(OutsideITBlock()); 7095 MacroEmissionCheckScope guard(this); 7096 ITScope it_scope(this, &cond); 7097 vhsub(cond, dt, rd, rn, rm); 7098 } 7099 void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7100 Vhsub(al, dt, rd, rn, rm); 7101 } 7102 7103 void Vhsub( 7104 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7105 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7106 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7107 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7108 VIXL_ASSERT(allow_macro_instructions_); 7109 VIXL_ASSERT(OutsideITBlock()); 7110 MacroEmissionCheckScope guard(this); 7111 ITScope it_scope(this, &cond); 7112 vhsub(cond, dt, rd, rn, rm); 7113 } 7114 void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7115 Vhsub(al, dt, rd, rn, rm); 7116 } 7117 7118 void Vld1(Condition cond, 7119 DataType dt, 7120 const NeonRegisterList& nreglist, 7121 const AlignedMemOperand& operand) { 7122 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7123 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7124 VIXL_ASSERT(allow_macro_instructions_); 7125 VIXL_ASSERT(OutsideITBlock()); 7126 MacroEmissionCheckScope guard(this); 7127 ITScope it_scope(this, &cond); 7128 vld1(cond, dt, nreglist, operand); 7129 } 7130 void Vld1(DataType dt, 7131 const NeonRegisterList& nreglist, 7132 const AlignedMemOperand& operand) { 7133 Vld1(al, dt, nreglist, operand); 7134 } 7135 7136 void Vld2(Condition cond, 7137 DataType dt, 7138 const NeonRegisterList& nreglist, 7139 const AlignedMemOperand& operand) { 7140 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7141 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7142 VIXL_ASSERT(allow_macro_instructions_); 7143 VIXL_ASSERT(OutsideITBlock()); 7144 MacroEmissionCheckScope guard(this); 7145 ITScope it_scope(this, &cond); 7146 vld2(cond, dt, nreglist, operand); 7147 } 7148 void Vld2(DataType dt, 7149 const NeonRegisterList& nreglist, 7150 const AlignedMemOperand& operand) { 7151 Vld2(al, dt, nreglist, operand); 7152 } 7153 7154 void Vld3(Condition cond, 7155 DataType dt, 7156 const NeonRegisterList& nreglist, 7157 const AlignedMemOperand& operand) { 7158 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7159 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7160 VIXL_ASSERT(allow_macro_instructions_); 7161 VIXL_ASSERT(OutsideITBlock()); 7162 MacroEmissionCheckScope guard(this); 7163 ITScope it_scope(this, &cond); 7164 vld3(cond, dt, nreglist, operand); 7165 } 7166 void Vld3(DataType dt, 7167 const NeonRegisterList& nreglist, 7168 const AlignedMemOperand& operand) { 7169 Vld3(al, dt, nreglist, operand); 7170 } 7171 7172 void Vld3(Condition cond, 7173 DataType dt, 7174 const NeonRegisterList& nreglist, 7175 const MemOperand& operand) { 7176 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7177 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7178 VIXL_ASSERT(allow_macro_instructions_); 7179 VIXL_ASSERT(OutsideITBlock()); 7180 MacroEmissionCheckScope guard(this); 7181 ITScope it_scope(this, &cond); 7182 vld3(cond, dt, nreglist, operand); 7183 } 7184 void Vld3(DataType dt, 7185 const NeonRegisterList& nreglist, 7186 const MemOperand& operand) { 7187 Vld3(al, dt, nreglist, operand); 7188 } 7189 7190 void Vld4(Condition cond, 7191 DataType dt, 7192 const NeonRegisterList& nreglist, 7193 const AlignedMemOperand& operand) { 7194 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7195 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7196 VIXL_ASSERT(allow_macro_instructions_); 7197 VIXL_ASSERT(OutsideITBlock()); 7198 MacroEmissionCheckScope guard(this); 7199 ITScope it_scope(this, &cond); 7200 vld4(cond, dt, nreglist, operand); 7201 } 7202 void Vld4(DataType dt, 7203 const NeonRegisterList& nreglist, 7204 const AlignedMemOperand& operand) { 7205 Vld4(al, dt, nreglist, operand); 7206 } 7207 7208 void Vldm(Condition cond, 7209 DataType dt, 7210 Register rn, 7211 WriteBack write_back, 7212 DRegisterList dreglist) { 7213 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7214 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 7215 VIXL_ASSERT(allow_macro_instructions_); 7216 VIXL_ASSERT(OutsideITBlock()); 7217 MacroEmissionCheckScope guard(this); 7218 ITScope it_scope(this, &cond); 7219 vldm(cond, dt, rn, write_back, dreglist); 7220 } 7221 void Vldm(DataType dt, 7222 Register rn, 7223 WriteBack write_back, 7224 DRegisterList dreglist) { 7225 Vldm(al, dt, rn, write_back, dreglist); 7226 } 7227 void Vldm(Condition cond, 7228 Register rn, 7229 WriteBack write_back, 7230 DRegisterList dreglist) { 7231 Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist); 7232 } 7233 void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) { 7234 Vldm(al, kDataTypeValueNone, rn, write_back, dreglist); 7235 } 7236 7237 void Vldm(Condition cond, 7238 DataType dt, 7239 Register rn, 7240 WriteBack write_back, 7241 SRegisterList sreglist) { 7242 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7243 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 7244 VIXL_ASSERT(allow_macro_instructions_); 7245 VIXL_ASSERT(OutsideITBlock()); 7246 MacroEmissionCheckScope guard(this); 7247 ITScope it_scope(this, &cond); 7248 vldm(cond, dt, rn, write_back, sreglist); 7249 } 7250 void Vldm(DataType dt, 7251 Register rn, 7252 WriteBack write_back, 7253 SRegisterList sreglist) { 7254 Vldm(al, dt, rn, write_back, sreglist); 7255 } 7256 void Vldm(Condition cond, 7257 Register rn, 7258 WriteBack write_back, 7259 SRegisterList sreglist) { 7260 Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist); 7261 } 7262 void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) { 7263 Vldm(al, kDataTypeValueNone, rn, write_back, sreglist); 7264 } 7265 7266 void Vldmdb(Condition cond, 7267 DataType dt, 7268 Register rn, 7269 WriteBack write_back, 7270 DRegisterList dreglist) { 7271 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7272 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 7273 VIXL_ASSERT(allow_macro_instructions_); 7274 VIXL_ASSERT(OutsideITBlock()); 7275 MacroEmissionCheckScope guard(this); 7276 ITScope it_scope(this, &cond); 7277 vldmdb(cond, dt, rn, write_back, dreglist); 7278 } 7279 void Vldmdb(DataType dt, 7280 Register rn, 7281 WriteBack write_back, 7282 DRegisterList dreglist) { 7283 Vldmdb(al, dt, rn, write_back, dreglist); 7284 } 7285 void Vldmdb(Condition cond, 7286 Register rn, 7287 WriteBack write_back, 7288 DRegisterList dreglist) { 7289 Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist); 7290 } 7291 void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) { 7292 Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist); 7293 } 7294 7295 void Vldmdb(Condition cond, 7296 DataType dt, 7297 Register rn, 7298 WriteBack write_back, 7299 SRegisterList sreglist) { 7300 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7301 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 7302 VIXL_ASSERT(allow_macro_instructions_); 7303 VIXL_ASSERT(OutsideITBlock()); 7304 MacroEmissionCheckScope guard(this); 7305 ITScope it_scope(this, &cond); 7306 vldmdb(cond, dt, rn, write_back, sreglist); 7307 } 7308 void Vldmdb(DataType dt, 7309 Register rn, 7310 WriteBack write_back, 7311 SRegisterList sreglist) { 7312 Vldmdb(al, dt, rn, write_back, sreglist); 7313 } 7314 void Vldmdb(Condition cond, 7315 Register rn, 7316 WriteBack write_back, 7317 SRegisterList sreglist) { 7318 Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist); 7319 } 7320 void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) { 7321 Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist); 7322 } 7323 7324 void Vldmia(Condition cond, 7325 DataType dt, 7326 Register rn, 7327 WriteBack write_back, 7328 DRegisterList dreglist) { 7329 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7330 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 7331 VIXL_ASSERT(allow_macro_instructions_); 7332 VIXL_ASSERT(OutsideITBlock()); 7333 MacroEmissionCheckScope guard(this); 7334 ITScope it_scope(this, &cond); 7335 vldmia(cond, dt, rn, write_back, dreglist); 7336 } 7337 void Vldmia(DataType dt, 7338 Register rn, 7339 WriteBack write_back, 7340 DRegisterList dreglist) { 7341 Vldmia(al, dt, rn, write_back, dreglist); 7342 } 7343 void Vldmia(Condition cond, 7344 Register rn, 7345 WriteBack write_back, 7346 DRegisterList dreglist) { 7347 Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist); 7348 } 7349 void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) { 7350 Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist); 7351 } 7352 7353 void Vldmia(Condition cond, 7354 DataType dt, 7355 Register rn, 7356 WriteBack write_back, 7357 SRegisterList sreglist) { 7358 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7359 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 7360 VIXL_ASSERT(allow_macro_instructions_); 7361 VIXL_ASSERT(OutsideITBlock()); 7362 MacroEmissionCheckScope guard(this); 7363 ITScope it_scope(this, &cond); 7364 vldmia(cond, dt, rn, write_back, sreglist); 7365 } 7366 void Vldmia(DataType dt, 7367 Register rn, 7368 WriteBack write_back, 7369 SRegisterList sreglist) { 7370 Vldmia(al, dt, rn, write_back, sreglist); 7371 } 7372 void Vldmia(Condition cond, 7373 Register rn, 7374 WriteBack write_back, 7375 SRegisterList sreglist) { 7376 Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist); 7377 } 7378 void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) { 7379 Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist); 7380 } 7381 7382 void Vldr(Condition cond, DataType dt, DRegister rd, Label* label) { 7383 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7384 VIXL_ASSERT(allow_macro_instructions_); 7385 VIXL_ASSERT(OutsideITBlock()); 7386 MacroEmissionCheckScope guard(this); 7387 ITScope it_scope(this, &cond); 7388 vldr(cond, dt, rd, label); 7389 } 7390 void Vldr(DataType dt, DRegister rd, Label* label) { 7391 Vldr(al, dt, rd, label); 7392 } 7393 void Vldr(Condition cond, DRegister rd, Label* label) { 7394 Vldr(cond, Untyped64, rd, label); 7395 } 7396 void Vldr(DRegister rd, Label* label) { Vldr(al, Untyped64, rd, label); } 7397 7398 void Vldr(Condition cond, 7399 DataType dt, 7400 DRegister rd, 7401 const MemOperand& operand) { 7402 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7403 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7404 VIXL_ASSERT(allow_macro_instructions_); 7405 VIXL_ASSERT(OutsideITBlock()); 7406 MacroEmissionCheckScope guard(this); 7407 ITScope it_scope(this, &cond); 7408 vldr(cond, dt, rd, operand); 7409 } 7410 void Vldr(DataType dt, DRegister rd, const MemOperand& operand) { 7411 Vldr(al, dt, rd, operand); 7412 } 7413 void Vldr(Condition cond, DRegister rd, const MemOperand& operand) { 7414 Vldr(cond, Untyped64, rd, operand); 7415 } 7416 void Vldr(DRegister rd, const MemOperand& operand) { 7417 Vldr(al, Untyped64, rd, operand); 7418 } 7419 7420 void Vldr(Condition cond, DataType dt, SRegister rd, Label* label) { 7421 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7422 VIXL_ASSERT(allow_macro_instructions_); 7423 VIXL_ASSERT(OutsideITBlock()); 7424 MacroEmissionCheckScope guard(this); 7425 ITScope it_scope(this, &cond); 7426 vldr(cond, dt, rd, label); 7427 } 7428 void Vldr(DataType dt, SRegister rd, Label* label) { 7429 Vldr(al, dt, rd, label); 7430 } 7431 void Vldr(Condition cond, SRegister rd, Label* label) { 7432 Vldr(cond, Untyped32, rd, label); 7433 } 7434 void Vldr(SRegister rd, Label* label) { Vldr(al, Untyped32, rd, label); } 7435 7436 void Vldr(Condition cond, 7437 DataType dt, 7438 SRegister rd, 7439 const MemOperand& operand) { 7440 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7441 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7442 VIXL_ASSERT(allow_macro_instructions_); 7443 VIXL_ASSERT(OutsideITBlock()); 7444 MacroEmissionCheckScope guard(this); 7445 ITScope it_scope(this, &cond); 7446 vldr(cond, dt, rd, operand); 7447 } 7448 void Vldr(DataType dt, SRegister rd, const MemOperand& operand) { 7449 Vldr(al, dt, rd, operand); 7450 } 7451 void Vldr(Condition cond, SRegister rd, const MemOperand& operand) { 7452 Vldr(cond, Untyped32, rd, operand); 7453 } 7454 void Vldr(SRegister rd, const MemOperand& operand) { 7455 Vldr(al, Untyped32, rd, operand); 7456 } 7457 7458 void Vmax( 7459 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7460 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7461 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7462 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7463 VIXL_ASSERT(allow_macro_instructions_); 7464 VIXL_ASSERT(OutsideITBlock()); 7465 MacroEmissionCheckScope guard(this); 7466 ITScope it_scope(this, &cond); 7467 vmax(cond, dt, rd, rn, rm); 7468 } 7469 void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7470 Vmax(al, dt, rd, rn, rm); 7471 } 7472 7473 void Vmax( 7474 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7475 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7476 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7477 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7478 VIXL_ASSERT(allow_macro_instructions_); 7479 VIXL_ASSERT(OutsideITBlock()); 7480 MacroEmissionCheckScope guard(this); 7481 ITScope it_scope(this, &cond); 7482 vmax(cond, dt, rd, rn, rm); 7483 } 7484 void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7485 Vmax(al, dt, rd, rn, rm); 7486 } 7487 7488 void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7489 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7490 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7491 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7492 VIXL_ASSERT(allow_macro_instructions_); 7493 VIXL_ASSERT(OutsideITBlock()); 7494 MacroEmissionCheckScope guard(this); 7495 vmaxnm(dt, rd, rn, rm); 7496 } 7497 7498 void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7499 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7500 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7501 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7502 VIXL_ASSERT(allow_macro_instructions_); 7503 VIXL_ASSERT(OutsideITBlock()); 7504 MacroEmissionCheckScope guard(this); 7505 vmaxnm(dt, rd, rn, rm); 7506 } 7507 7508 void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7509 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7510 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7511 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7512 VIXL_ASSERT(allow_macro_instructions_); 7513 VIXL_ASSERT(OutsideITBlock()); 7514 MacroEmissionCheckScope guard(this); 7515 vmaxnm(dt, rd, rn, rm); 7516 } 7517 7518 void Vmin( 7519 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7520 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7521 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7522 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7523 VIXL_ASSERT(allow_macro_instructions_); 7524 VIXL_ASSERT(OutsideITBlock()); 7525 MacroEmissionCheckScope guard(this); 7526 ITScope it_scope(this, &cond); 7527 vmin(cond, dt, rd, rn, rm); 7528 } 7529 void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7530 Vmin(al, dt, rd, rn, rm); 7531 } 7532 7533 void Vmin( 7534 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7535 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7536 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7537 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7538 VIXL_ASSERT(allow_macro_instructions_); 7539 VIXL_ASSERT(OutsideITBlock()); 7540 MacroEmissionCheckScope guard(this); 7541 ITScope it_scope(this, &cond); 7542 vmin(cond, dt, rd, rn, rm); 7543 } 7544 void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7545 Vmin(al, dt, rd, rn, rm); 7546 } 7547 7548 void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7549 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7550 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7551 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7552 VIXL_ASSERT(allow_macro_instructions_); 7553 VIXL_ASSERT(OutsideITBlock()); 7554 MacroEmissionCheckScope guard(this); 7555 vminnm(dt, rd, rn, rm); 7556 } 7557 7558 void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7559 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7560 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7561 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7562 VIXL_ASSERT(allow_macro_instructions_); 7563 VIXL_ASSERT(OutsideITBlock()); 7564 MacroEmissionCheckScope guard(this); 7565 vminnm(dt, rd, rn, rm); 7566 } 7567 7568 void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7569 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7570 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7571 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7572 VIXL_ASSERT(allow_macro_instructions_); 7573 VIXL_ASSERT(OutsideITBlock()); 7574 MacroEmissionCheckScope guard(this); 7575 vminnm(dt, rd, rn, rm); 7576 } 7577 7578 void Vmla(Condition cond, 7579 DataType dt, 7580 DRegister rd, 7581 DRegister rn, 7582 DRegisterLane rm) { 7583 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7584 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7585 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7586 VIXL_ASSERT(allow_macro_instructions_); 7587 VIXL_ASSERT(OutsideITBlock()); 7588 MacroEmissionCheckScope guard(this); 7589 ITScope it_scope(this, &cond); 7590 vmla(cond, dt, rd, rn, rm); 7591 } 7592 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 7593 Vmla(al, dt, rd, rn, rm); 7594 } 7595 7596 void Vmla(Condition cond, 7597 DataType dt, 7598 QRegister rd, 7599 QRegister rn, 7600 DRegisterLane rm) { 7601 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7602 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7603 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7604 VIXL_ASSERT(allow_macro_instructions_); 7605 VIXL_ASSERT(OutsideITBlock()); 7606 MacroEmissionCheckScope guard(this); 7607 ITScope it_scope(this, &cond); 7608 vmla(cond, dt, rd, rn, rm); 7609 } 7610 void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 7611 Vmla(al, dt, rd, rn, rm); 7612 } 7613 7614 void Vmla( 7615 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7616 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7617 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7618 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7619 VIXL_ASSERT(allow_macro_instructions_); 7620 VIXL_ASSERT(OutsideITBlock()); 7621 MacroEmissionCheckScope guard(this); 7622 ITScope it_scope(this, &cond); 7623 vmla(cond, dt, rd, rn, rm); 7624 } 7625 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7626 Vmla(al, dt, rd, rn, rm); 7627 } 7628 7629 void Vmla( 7630 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7631 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7632 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7633 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7634 VIXL_ASSERT(allow_macro_instructions_); 7635 VIXL_ASSERT(OutsideITBlock()); 7636 MacroEmissionCheckScope guard(this); 7637 ITScope it_scope(this, &cond); 7638 vmla(cond, dt, rd, rn, rm); 7639 } 7640 void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7641 Vmla(al, dt, rd, rn, rm); 7642 } 7643 7644 void Vmla( 7645 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7646 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7647 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7648 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7649 VIXL_ASSERT(allow_macro_instructions_); 7650 VIXL_ASSERT(OutsideITBlock()); 7651 MacroEmissionCheckScope guard(this); 7652 ITScope it_scope(this, &cond); 7653 vmla(cond, dt, rd, rn, rm); 7654 } 7655 void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7656 Vmla(al, dt, rd, rn, rm); 7657 } 7658 7659 void Vmlal(Condition cond, 7660 DataType dt, 7661 QRegister rd, 7662 DRegister rn, 7663 DRegisterLane rm) { 7664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7666 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7667 VIXL_ASSERT(allow_macro_instructions_); 7668 VIXL_ASSERT(OutsideITBlock()); 7669 MacroEmissionCheckScope guard(this); 7670 ITScope it_scope(this, &cond); 7671 vmlal(cond, dt, rd, rn, rm); 7672 } 7673 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { 7674 Vmlal(al, dt, rd, rn, rm); 7675 } 7676 7677 void Vmlal( 7678 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7679 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7680 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7681 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7682 VIXL_ASSERT(allow_macro_instructions_); 7683 VIXL_ASSERT(OutsideITBlock()); 7684 MacroEmissionCheckScope guard(this); 7685 ITScope it_scope(this, &cond); 7686 vmlal(cond, dt, rd, rn, rm); 7687 } 7688 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7689 Vmlal(al, dt, rd, rn, rm); 7690 } 7691 7692 void Vmls(Condition cond, 7693 DataType dt, 7694 DRegister rd, 7695 DRegister rn, 7696 DRegisterLane rm) { 7697 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7698 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7699 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7700 VIXL_ASSERT(allow_macro_instructions_); 7701 VIXL_ASSERT(OutsideITBlock()); 7702 MacroEmissionCheckScope guard(this); 7703 ITScope it_scope(this, &cond); 7704 vmls(cond, dt, rd, rn, rm); 7705 } 7706 void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 7707 Vmls(al, dt, rd, rn, rm); 7708 } 7709 7710 void Vmls(Condition cond, 7711 DataType dt, 7712 QRegister rd, 7713 QRegister rn, 7714 DRegisterLane rm) { 7715 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7716 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7717 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7718 VIXL_ASSERT(allow_macro_instructions_); 7719 VIXL_ASSERT(OutsideITBlock()); 7720 MacroEmissionCheckScope guard(this); 7721 ITScope it_scope(this, &cond); 7722 vmls(cond, dt, rd, rn, rm); 7723 } 7724 void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 7725 Vmls(al, dt, rd, rn, rm); 7726 } 7727 7728 void Vmls( 7729 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7730 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7731 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7732 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7733 VIXL_ASSERT(allow_macro_instructions_); 7734 VIXL_ASSERT(OutsideITBlock()); 7735 MacroEmissionCheckScope guard(this); 7736 ITScope it_scope(this, &cond); 7737 vmls(cond, dt, rd, rn, rm); 7738 } 7739 void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7740 Vmls(al, dt, rd, rn, rm); 7741 } 7742 7743 void Vmls( 7744 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7745 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7746 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7747 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7748 VIXL_ASSERT(allow_macro_instructions_); 7749 VIXL_ASSERT(OutsideITBlock()); 7750 MacroEmissionCheckScope guard(this); 7751 ITScope it_scope(this, &cond); 7752 vmls(cond, dt, rd, rn, rm); 7753 } 7754 void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7755 Vmls(al, dt, rd, rn, rm); 7756 } 7757 7758 void Vmls( 7759 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7760 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7761 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7762 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7763 VIXL_ASSERT(allow_macro_instructions_); 7764 VIXL_ASSERT(OutsideITBlock()); 7765 MacroEmissionCheckScope guard(this); 7766 ITScope it_scope(this, &cond); 7767 vmls(cond, dt, rd, rn, rm); 7768 } 7769 void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7770 Vmls(al, dt, rd, rn, rm); 7771 } 7772 7773 void Vmlsl(Condition cond, 7774 DataType dt, 7775 QRegister rd, 7776 DRegister rn, 7777 DRegisterLane rm) { 7778 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7779 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7780 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7781 VIXL_ASSERT(allow_macro_instructions_); 7782 VIXL_ASSERT(OutsideITBlock()); 7783 MacroEmissionCheckScope guard(this); 7784 ITScope it_scope(this, &cond); 7785 vmlsl(cond, dt, rd, rn, rm); 7786 } 7787 void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { 7788 Vmlsl(al, dt, rd, rn, rm); 7789 } 7790 7791 void Vmlsl( 7792 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7793 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7794 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7795 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7796 VIXL_ASSERT(allow_macro_instructions_); 7797 VIXL_ASSERT(OutsideITBlock()); 7798 MacroEmissionCheckScope guard(this); 7799 ITScope it_scope(this, &cond); 7800 vmlsl(cond, dt, rd, rn, rm); 7801 } 7802 void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7803 Vmlsl(al, dt, rd, rn, rm); 7804 } 7805 7806 void Vmov(Condition cond, Register rt, SRegister rn) { 7807 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7808 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7809 VIXL_ASSERT(allow_macro_instructions_); 7810 VIXL_ASSERT(OutsideITBlock()); 7811 MacroEmissionCheckScope guard(this); 7812 ITScope it_scope(this, &cond); 7813 vmov(cond, rt, rn); 7814 } 7815 void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); } 7816 7817 void Vmov(Condition cond, SRegister rn, Register rt) { 7818 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7819 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7820 VIXL_ASSERT(allow_macro_instructions_); 7821 VIXL_ASSERT(OutsideITBlock()); 7822 MacroEmissionCheckScope guard(this); 7823 ITScope it_scope(this, &cond); 7824 vmov(cond, rn, rt); 7825 } 7826 void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); } 7827 7828 void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) { 7829 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7830 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7831 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7832 VIXL_ASSERT(allow_macro_instructions_); 7833 VIXL_ASSERT(OutsideITBlock()); 7834 MacroEmissionCheckScope guard(this); 7835 ITScope it_scope(this, &cond); 7836 vmov(cond, rt, rt2, rm); 7837 } 7838 void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); } 7839 7840 void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) { 7841 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7842 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7843 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7844 VIXL_ASSERT(allow_macro_instructions_); 7845 VIXL_ASSERT(OutsideITBlock()); 7846 MacroEmissionCheckScope guard(this); 7847 ITScope it_scope(this, &cond); 7848 vmov(cond, rm, rt, rt2); 7849 } 7850 void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); } 7851 7852 void Vmov( 7853 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) { 7854 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7856 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7857 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1)); 7858 VIXL_ASSERT(allow_macro_instructions_); 7859 VIXL_ASSERT(OutsideITBlock()); 7860 MacroEmissionCheckScope guard(this); 7861 ITScope it_scope(this, &cond); 7862 vmov(cond, rt, rt2, rm, rm1); 7863 } 7864 void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) { 7865 Vmov(al, rt, rt2, rm, rm1); 7866 } 7867 7868 void Vmov( 7869 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) { 7870 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7871 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1)); 7872 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7873 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7874 VIXL_ASSERT(allow_macro_instructions_); 7875 VIXL_ASSERT(OutsideITBlock()); 7876 MacroEmissionCheckScope guard(this); 7877 ITScope it_scope(this, &cond); 7878 vmov(cond, rm, rm1, rt, rt2); 7879 } 7880 void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) { 7881 Vmov(al, rm, rm1, rt, rt2); 7882 } 7883 7884 void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) { 7885 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7886 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7887 VIXL_ASSERT(allow_macro_instructions_); 7888 VIXL_ASSERT(OutsideITBlock()); 7889 MacroEmissionCheckScope guard(this); 7890 ITScope it_scope(this, &cond); 7891 vmov(cond, dt, rd, rt); 7892 } 7893 void Vmov(DataType dt, DRegisterLane rd, Register rt) { 7894 Vmov(al, dt, rd, rt); 7895 } 7896 void Vmov(Condition cond, DRegisterLane rd, Register rt) { 7897 Vmov(cond, kDataTypeValueNone, rd, rt); 7898 } 7899 void Vmov(DRegisterLane rd, Register rt) { 7900 Vmov(al, kDataTypeValueNone, rd, rt); 7901 } 7902 7903 void Vmov(Condition cond, 7904 DataType dt, 7905 DRegister rd, 7906 const DOperand& operand) { 7907 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7908 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7909 VIXL_ASSERT(allow_macro_instructions_); 7910 VIXL_ASSERT(OutsideITBlock()); 7911 MacroEmissionCheckScope guard(this); 7912 ITScope it_scope(this, &cond); 7913 vmov(cond, dt, rd, operand); 7914 } 7915 void Vmov(DataType dt, DRegister rd, const DOperand& operand) { 7916 Vmov(al, dt, rd, operand); 7917 } 7918 7919 void Vmov(Condition cond, 7920 DataType dt, 7921 QRegister rd, 7922 const QOperand& operand) { 7923 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7924 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7925 VIXL_ASSERT(allow_macro_instructions_); 7926 VIXL_ASSERT(OutsideITBlock()); 7927 MacroEmissionCheckScope guard(this); 7928 ITScope it_scope(this, &cond); 7929 vmov(cond, dt, rd, operand); 7930 } 7931 void Vmov(DataType dt, QRegister rd, const QOperand& operand) { 7932 Vmov(al, dt, rd, operand); 7933 } 7934 7935 void Vmov(Condition cond, 7936 DataType dt, 7937 SRegister rd, 7938 const SOperand& operand) { 7939 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7940 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7941 VIXL_ASSERT(allow_macro_instructions_); 7942 VIXL_ASSERT(OutsideITBlock()); 7943 MacroEmissionCheckScope guard(this); 7944 ITScope it_scope(this, &cond); 7945 vmov(cond, dt, rd, operand); 7946 } 7947 void Vmov(DataType dt, SRegister rd, const SOperand& operand) { 7948 Vmov(al, dt, rd, operand); 7949 } 7950 7951 void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) { 7952 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7953 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7954 VIXL_ASSERT(allow_macro_instructions_); 7955 VIXL_ASSERT(OutsideITBlock()); 7956 MacroEmissionCheckScope guard(this); 7957 ITScope it_scope(this, &cond); 7958 vmov(cond, dt, rt, rn); 7959 } 7960 void Vmov(DataType dt, Register rt, DRegisterLane rn) { 7961 Vmov(al, dt, rt, rn); 7962 } 7963 void Vmov(Condition cond, Register rt, DRegisterLane rn) { 7964 Vmov(cond, kDataTypeValueNone, rt, rn); 7965 } 7966 void Vmov(Register rt, DRegisterLane rn) { 7967 Vmov(al, kDataTypeValueNone, rt, rn); 7968 } 7969 7970 void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) { 7971 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7972 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7973 VIXL_ASSERT(allow_macro_instructions_); 7974 VIXL_ASSERT(OutsideITBlock()); 7975 MacroEmissionCheckScope guard(this); 7976 ITScope it_scope(this, &cond); 7977 vmovl(cond, dt, rd, rm); 7978 } 7979 void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); } 7980 7981 void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) { 7982 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7983 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7984 VIXL_ASSERT(allow_macro_instructions_); 7985 VIXL_ASSERT(OutsideITBlock()); 7986 MacroEmissionCheckScope guard(this); 7987 ITScope it_scope(this, &cond); 7988 vmovn(cond, dt, rd, rm); 7989 } 7990 void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); } 7991 7992 void Vmrs(Condition cond, 7993 RegisterOrAPSR_nzcv rt, 7994 SpecialFPRegister spec_reg) { 7995 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7996 VIXL_ASSERT(allow_macro_instructions_); 7997 VIXL_ASSERT(OutsideITBlock()); 7998 MacroEmissionCheckScope guard(this); 7999 ITScope it_scope(this, &cond); 8000 vmrs(cond, rt, spec_reg); 8001 } 8002 void Vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) { 8003 Vmrs(al, rt, spec_reg); 8004 } 8005 8006 void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) { 8007 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 8008 VIXL_ASSERT(allow_macro_instructions_); 8009 VIXL_ASSERT(OutsideITBlock()); 8010 MacroEmissionCheckScope guard(this); 8011 ITScope it_scope(this, &cond); 8012 vmsr(cond, spec_reg, rt); 8013 } 8014 void Vmsr(SpecialFPRegister spec_reg, Register rt) { Vmsr(al, spec_reg, rt); } 8015 8016 void Vmul(Condition cond, 8017 DataType dt, 8018 DRegister rd, 8019 DRegister rn, 8020 DRegister dm, 8021 unsigned index) { 8022 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8023 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8024 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8025 VIXL_ASSERT(allow_macro_instructions_); 8026 VIXL_ASSERT(OutsideITBlock()); 8027 MacroEmissionCheckScope guard(this); 8028 ITScope it_scope(this, &cond); 8029 vmul(cond, dt, rd, rn, dm, index); 8030 } 8031 void Vmul( 8032 DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) { 8033 Vmul(al, dt, rd, rn, dm, index); 8034 } 8035 8036 void Vmul(Condition cond, 8037 DataType dt, 8038 QRegister rd, 8039 QRegister rn, 8040 DRegister dm, 8041 unsigned index) { 8042 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8043 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8044 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8045 VIXL_ASSERT(allow_macro_instructions_); 8046 VIXL_ASSERT(OutsideITBlock()); 8047 MacroEmissionCheckScope guard(this); 8048 ITScope it_scope(this, &cond); 8049 vmul(cond, dt, rd, rn, dm, index); 8050 } 8051 void Vmul( 8052 DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) { 8053 Vmul(al, dt, rd, rn, dm, index); 8054 } 8055 8056 void Vmul( 8057 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8058 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8059 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8060 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8061 VIXL_ASSERT(allow_macro_instructions_); 8062 VIXL_ASSERT(OutsideITBlock()); 8063 MacroEmissionCheckScope guard(this); 8064 ITScope it_scope(this, &cond); 8065 vmul(cond, dt, rd, rn, rm); 8066 } 8067 void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8068 Vmul(al, dt, rd, rn, rm); 8069 } 8070 8071 void Vmul( 8072 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8073 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8074 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8075 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8076 VIXL_ASSERT(allow_macro_instructions_); 8077 VIXL_ASSERT(OutsideITBlock()); 8078 MacroEmissionCheckScope guard(this); 8079 ITScope it_scope(this, &cond); 8080 vmul(cond, dt, rd, rn, rm); 8081 } 8082 void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8083 Vmul(al, dt, rd, rn, rm); 8084 } 8085 8086 void Vmul( 8087 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8088 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8089 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8090 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8091 VIXL_ASSERT(allow_macro_instructions_); 8092 VIXL_ASSERT(OutsideITBlock()); 8093 MacroEmissionCheckScope guard(this); 8094 ITScope it_scope(this, &cond); 8095 vmul(cond, dt, rd, rn, rm); 8096 } 8097 void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8098 Vmul(al, dt, rd, rn, rm); 8099 } 8100 8101 void Vmull(Condition cond, 8102 DataType dt, 8103 QRegister rd, 8104 DRegister rn, 8105 DRegister dm, 8106 unsigned index) { 8107 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8108 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8109 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8110 VIXL_ASSERT(allow_macro_instructions_); 8111 VIXL_ASSERT(OutsideITBlock()); 8112 MacroEmissionCheckScope guard(this); 8113 ITScope it_scope(this, &cond); 8114 vmull(cond, dt, rd, rn, dm, index); 8115 } 8116 void Vmull( 8117 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { 8118 Vmull(al, dt, rd, rn, dm, index); 8119 } 8120 8121 void Vmull( 8122 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8123 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8124 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8125 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8126 VIXL_ASSERT(allow_macro_instructions_); 8127 VIXL_ASSERT(OutsideITBlock()); 8128 MacroEmissionCheckScope guard(this); 8129 ITScope it_scope(this, &cond); 8130 vmull(cond, dt, rd, rn, rm); 8131 } 8132 void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8133 Vmull(al, dt, rd, rn, rm); 8134 } 8135 8136 void Vmvn(Condition cond, 8137 DataType dt, 8138 DRegister rd, 8139 const DOperand& operand) { 8140 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8141 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8142 VIXL_ASSERT(allow_macro_instructions_); 8143 VIXL_ASSERT(OutsideITBlock()); 8144 MacroEmissionCheckScope guard(this); 8145 ITScope it_scope(this, &cond); 8146 vmvn(cond, dt, rd, operand); 8147 } 8148 void Vmvn(DataType dt, DRegister rd, const DOperand& operand) { 8149 Vmvn(al, dt, rd, operand); 8150 } 8151 8152 void Vmvn(Condition cond, 8153 DataType dt, 8154 QRegister rd, 8155 const QOperand& operand) { 8156 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8157 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8158 VIXL_ASSERT(allow_macro_instructions_); 8159 VIXL_ASSERT(OutsideITBlock()); 8160 MacroEmissionCheckScope guard(this); 8161 ITScope it_scope(this, &cond); 8162 vmvn(cond, dt, rd, operand); 8163 } 8164 void Vmvn(DataType dt, QRegister rd, const QOperand& operand) { 8165 Vmvn(al, dt, rd, operand); 8166 } 8167 8168 void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8169 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8170 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8171 VIXL_ASSERT(allow_macro_instructions_); 8172 VIXL_ASSERT(OutsideITBlock()); 8173 MacroEmissionCheckScope guard(this); 8174 ITScope it_scope(this, &cond); 8175 vneg(cond, dt, rd, rm); 8176 } 8177 void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); } 8178 8179 void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8180 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8181 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8182 VIXL_ASSERT(allow_macro_instructions_); 8183 VIXL_ASSERT(OutsideITBlock()); 8184 MacroEmissionCheckScope guard(this); 8185 ITScope it_scope(this, &cond); 8186 vneg(cond, dt, rd, rm); 8187 } 8188 void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); } 8189 8190 void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) { 8191 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8192 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8193 VIXL_ASSERT(allow_macro_instructions_); 8194 VIXL_ASSERT(OutsideITBlock()); 8195 MacroEmissionCheckScope guard(this); 8196 ITScope it_scope(this, &cond); 8197 vneg(cond, dt, rd, rm); 8198 } 8199 void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); } 8200 8201 void Vnmla( 8202 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8203 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8204 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8205 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8206 VIXL_ASSERT(allow_macro_instructions_); 8207 VIXL_ASSERT(OutsideITBlock()); 8208 MacroEmissionCheckScope guard(this); 8209 ITScope it_scope(this, &cond); 8210 vnmla(cond, dt, rd, rn, rm); 8211 } 8212 void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8213 Vnmla(al, dt, rd, rn, rm); 8214 } 8215 8216 void Vnmla( 8217 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8218 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8219 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8220 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8221 VIXL_ASSERT(allow_macro_instructions_); 8222 VIXL_ASSERT(OutsideITBlock()); 8223 MacroEmissionCheckScope guard(this); 8224 ITScope it_scope(this, &cond); 8225 vnmla(cond, dt, rd, rn, rm); 8226 } 8227 void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8228 Vnmla(al, dt, rd, rn, rm); 8229 } 8230 8231 void Vnmls( 8232 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8233 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8234 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8235 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8236 VIXL_ASSERT(allow_macro_instructions_); 8237 VIXL_ASSERT(OutsideITBlock()); 8238 MacroEmissionCheckScope guard(this); 8239 ITScope it_scope(this, &cond); 8240 vnmls(cond, dt, rd, rn, rm); 8241 } 8242 void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8243 Vnmls(al, dt, rd, rn, rm); 8244 } 8245 8246 void Vnmls( 8247 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8248 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8249 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8250 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8251 VIXL_ASSERT(allow_macro_instructions_); 8252 VIXL_ASSERT(OutsideITBlock()); 8253 MacroEmissionCheckScope guard(this); 8254 ITScope it_scope(this, &cond); 8255 vnmls(cond, dt, rd, rn, rm); 8256 } 8257 void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8258 Vnmls(al, dt, rd, rn, rm); 8259 } 8260 8261 void Vnmul( 8262 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8263 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8264 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8265 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8266 VIXL_ASSERT(allow_macro_instructions_); 8267 VIXL_ASSERT(OutsideITBlock()); 8268 MacroEmissionCheckScope guard(this); 8269 ITScope it_scope(this, &cond); 8270 vnmul(cond, dt, rd, rn, rm); 8271 } 8272 void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8273 Vnmul(al, dt, rd, rn, rm); 8274 } 8275 8276 void Vnmul( 8277 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8278 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8279 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8280 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8281 VIXL_ASSERT(allow_macro_instructions_); 8282 VIXL_ASSERT(OutsideITBlock()); 8283 MacroEmissionCheckScope guard(this); 8284 ITScope it_scope(this, &cond); 8285 vnmul(cond, dt, rd, rn, rm); 8286 } 8287 void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8288 Vnmul(al, dt, rd, rn, rm); 8289 } 8290 8291 void Vorn(Condition cond, 8292 DataType dt, 8293 DRegister rd, 8294 DRegister rn, 8295 const DOperand& operand) { 8296 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8297 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8298 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8299 VIXL_ASSERT(allow_macro_instructions_); 8300 VIXL_ASSERT(OutsideITBlock()); 8301 MacroEmissionCheckScope guard(this); 8302 ITScope it_scope(this, &cond); 8303 vorn(cond, dt, rd, rn, operand); 8304 } 8305 void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 8306 Vorn(al, dt, rd, rn, operand); 8307 } 8308 8309 void Vorn(Condition cond, 8310 DataType dt, 8311 QRegister rd, 8312 QRegister rn, 8313 const QOperand& operand) { 8314 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8315 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8316 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8317 VIXL_ASSERT(allow_macro_instructions_); 8318 VIXL_ASSERT(OutsideITBlock()); 8319 MacroEmissionCheckScope guard(this); 8320 ITScope it_scope(this, &cond); 8321 vorn(cond, dt, rd, rn, operand); 8322 } 8323 void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 8324 Vorn(al, dt, rd, rn, operand); 8325 } 8326 8327 void Vorr(Condition cond, 8328 DataType dt, 8329 DRegister rd, 8330 DRegister rn, 8331 const DOperand& operand) { 8332 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8333 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8334 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8335 VIXL_ASSERT(allow_macro_instructions_); 8336 VIXL_ASSERT(OutsideITBlock()); 8337 MacroEmissionCheckScope guard(this); 8338 ITScope it_scope(this, &cond); 8339 vorr(cond, dt, rd, rn, operand); 8340 } 8341 void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 8342 Vorr(al, dt, rd, rn, operand); 8343 } 8344 void Vorr(Condition cond, 8345 DRegister rd, 8346 DRegister rn, 8347 const DOperand& operand) { 8348 Vorr(cond, kDataTypeValueNone, rd, rn, operand); 8349 } 8350 void Vorr(DRegister rd, DRegister rn, const DOperand& operand) { 8351 Vorr(al, kDataTypeValueNone, rd, rn, operand); 8352 } 8353 8354 void Vorr(Condition cond, 8355 DataType dt, 8356 QRegister rd, 8357 QRegister rn, 8358 const QOperand& operand) { 8359 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8360 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8361 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8362 VIXL_ASSERT(allow_macro_instructions_); 8363 VIXL_ASSERT(OutsideITBlock()); 8364 MacroEmissionCheckScope guard(this); 8365 ITScope it_scope(this, &cond); 8366 vorr(cond, dt, rd, rn, operand); 8367 } 8368 void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 8369 Vorr(al, dt, rd, rn, operand); 8370 } 8371 void Vorr(Condition cond, 8372 QRegister rd, 8373 QRegister rn, 8374 const QOperand& operand) { 8375 Vorr(cond, kDataTypeValueNone, rd, rn, operand); 8376 } 8377 void Vorr(QRegister rd, QRegister rn, const QOperand& operand) { 8378 Vorr(al, kDataTypeValueNone, rd, rn, operand); 8379 } 8380 8381 void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8382 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8383 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8384 VIXL_ASSERT(allow_macro_instructions_); 8385 VIXL_ASSERT(OutsideITBlock()); 8386 MacroEmissionCheckScope guard(this); 8387 ITScope it_scope(this, &cond); 8388 vpadal(cond, dt, rd, rm); 8389 } 8390 void Vpadal(DataType dt, DRegister rd, DRegister rm) { 8391 Vpadal(al, dt, rd, rm); 8392 } 8393 8394 void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8395 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8396 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8397 VIXL_ASSERT(allow_macro_instructions_); 8398 VIXL_ASSERT(OutsideITBlock()); 8399 MacroEmissionCheckScope guard(this); 8400 ITScope it_scope(this, &cond); 8401 vpadal(cond, dt, rd, rm); 8402 } 8403 void Vpadal(DataType dt, QRegister rd, QRegister rm) { 8404 Vpadal(al, dt, rd, rm); 8405 } 8406 8407 void Vpadd( 8408 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8409 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8410 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8411 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8412 VIXL_ASSERT(allow_macro_instructions_); 8413 VIXL_ASSERT(OutsideITBlock()); 8414 MacroEmissionCheckScope guard(this); 8415 ITScope it_scope(this, &cond); 8416 vpadd(cond, dt, rd, rn, rm); 8417 } 8418 void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8419 Vpadd(al, dt, rd, rn, rm); 8420 } 8421 8422 void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8423 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8424 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8425 VIXL_ASSERT(allow_macro_instructions_); 8426 VIXL_ASSERT(OutsideITBlock()); 8427 MacroEmissionCheckScope guard(this); 8428 ITScope it_scope(this, &cond); 8429 vpaddl(cond, dt, rd, rm); 8430 } 8431 void Vpaddl(DataType dt, DRegister rd, DRegister rm) { 8432 Vpaddl(al, dt, rd, rm); 8433 } 8434 8435 void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8436 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8437 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8438 VIXL_ASSERT(allow_macro_instructions_); 8439 VIXL_ASSERT(OutsideITBlock()); 8440 MacroEmissionCheckScope guard(this); 8441 ITScope it_scope(this, &cond); 8442 vpaddl(cond, dt, rd, rm); 8443 } 8444 void Vpaddl(DataType dt, QRegister rd, QRegister rm) { 8445 Vpaddl(al, dt, rd, rm); 8446 } 8447 8448 void Vpmax( 8449 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8450 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8451 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8452 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8453 VIXL_ASSERT(allow_macro_instructions_); 8454 VIXL_ASSERT(OutsideITBlock()); 8455 MacroEmissionCheckScope guard(this); 8456 ITScope it_scope(this, &cond); 8457 vpmax(cond, dt, rd, rn, rm); 8458 } 8459 void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8460 Vpmax(al, dt, rd, rn, rm); 8461 } 8462 8463 void Vpmin( 8464 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8465 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8466 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8467 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8468 VIXL_ASSERT(allow_macro_instructions_); 8469 VIXL_ASSERT(OutsideITBlock()); 8470 MacroEmissionCheckScope guard(this); 8471 ITScope it_scope(this, &cond); 8472 vpmin(cond, dt, rd, rn, rm); 8473 } 8474 void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8475 Vpmin(al, dt, rd, rn, rm); 8476 } 8477 8478 void Vpop(Condition cond, DataType dt, DRegisterList dreglist) { 8479 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 8480 VIXL_ASSERT(allow_macro_instructions_); 8481 VIXL_ASSERT(OutsideITBlock()); 8482 MacroEmissionCheckScope guard(this); 8483 ITScope it_scope(this, &cond); 8484 vpop(cond, dt, dreglist); 8485 } 8486 void Vpop(DataType dt, DRegisterList dreglist) { Vpop(al, dt, dreglist); } 8487 void Vpop(Condition cond, DRegisterList dreglist) { 8488 Vpop(cond, kDataTypeValueNone, dreglist); 8489 } 8490 void Vpop(DRegisterList dreglist) { Vpop(al, kDataTypeValueNone, dreglist); } 8491 8492 void Vpop(Condition cond, DataType dt, SRegisterList sreglist) { 8493 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 8494 VIXL_ASSERT(allow_macro_instructions_); 8495 VIXL_ASSERT(OutsideITBlock()); 8496 MacroEmissionCheckScope guard(this); 8497 ITScope it_scope(this, &cond); 8498 vpop(cond, dt, sreglist); 8499 } 8500 void Vpop(DataType dt, SRegisterList sreglist) { Vpop(al, dt, sreglist); } 8501 void Vpop(Condition cond, SRegisterList sreglist) { 8502 Vpop(cond, kDataTypeValueNone, sreglist); 8503 } 8504 void Vpop(SRegisterList sreglist) { Vpop(al, kDataTypeValueNone, sreglist); } 8505 8506 void Vpush(Condition cond, DataType dt, DRegisterList dreglist) { 8507 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 8508 VIXL_ASSERT(allow_macro_instructions_); 8509 VIXL_ASSERT(OutsideITBlock()); 8510 MacroEmissionCheckScope guard(this); 8511 ITScope it_scope(this, &cond); 8512 vpush(cond, dt, dreglist); 8513 } 8514 void Vpush(DataType dt, DRegisterList dreglist) { Vpush(al, dt, dreglist); } 8515 void Vpush(Condition cond, DRegisterList dreglist) { 8516 Vpush(cond, kDataTypeValueNone, dreglist); 8517 } 8518 void Vpush(DRegisterList dreglist) { 8519 Vpush(al, kDataTypeValueNone, dreglist); 8520 } 8521 8522 void Vpush(Condition cond, DataType dt, SRegisterList sreglist) { 8523 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 8524 VIXL_ASSERT(allow_macro_instructions_); 8525 VIXL_ASSERT(OutsideITBlock()); 8526 MacroEmissionCheckScope guard(this); 8527 ITScope it_scope(this, &cond); 8528 vpush(cond, dt, sreglist); 8529 } 8530 void Vpush(DataType dt, SRegisterList sreglist) { Vpush(al, dt, sreglist); } 8531 void Vpush(Condition cond, SRegisterList sreglist) { 8532 Vpush(cond, kDataTypeValueNone, sreglist); 8533 } 8534 void Vpush(SRegisterList sreglist) { 8535 Vpush(al, kDataTypeValueNone, sreglist); 8536 } 8537 8538 void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8539 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8540 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8541 VIXL_ASSERT(allow_macro_instructions_); 8542 VIXL_ASSERT(OutsideITBlock()); 8543 MacroEmissionCheckScope guard(this); 8544 ITScope it_scope(this, &cond); 8545 vqabs(cond, dt, rd, rm); 8546 } 8547 void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); } 8548 8549 void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8550 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8551 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8552 VIXL_ASSERT(allow_macro_instructions_); 8553 VIXL_ASSERT(OutsideITBlock()); 8554 MacroEmissionCheckScope guard(this); 8555 ITScope it_scope(this, &cond); 8556 vqabs(cond, dt, rd, rm); 8557 } 8558 void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); } 8559 8560 void Vqadd( 8561 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8562 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8563 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8564 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8565 VIXL_ASSERT(allow_macro_instructions_); 8566 VIXL_ASSERT(OutsideITBlock()); 8567 MacroEmissionCheckScope guard(this); 8568 ITScope it_scope(this, &cond); 8569 vqadd(cond, dt, rd, rn, rm); 8570 } 8571 void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8572 Vqadd(al, dt, rd, rn, rm); 8573 } 8574 8575 void Vqadd( 8576 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8577 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8578 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8579 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8580 VIXL_ASSERT(allow_macro_instructions_); 8581 VIXL_ASSERT(OutsideITBlock()); 8582 MacroEmissionCheckScope guard(this); 8583 ITScope it_scope(this, &cond); 8584 vqadd(cond, dt, rd, rn, rm); 8585 } 8586 void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8587 Vqadd(al, dt, rd, rn, rm); 8588 } 8589 8590 void Vqdmlal( 8591 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8592 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8593 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8594 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8595 VIXL_ASSERT(allow_macro_instructions_); 8596 VIXL_ASSERT(OutsideITBlock()); 8597 MacroEmissionCheckScope guard(this); 8598 ITScope it_scope(this, &cond); 8599 vqdmlal(cond, dt, rd, rn, rm); 8600 } 8601 void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8602 Vqdmlal(al, dt, rd, rn, rm); 8603 } 8604 8605 void Vqdmlal(Condition cond, 8606 DataType dt, 8607 QRegister rd, 8608 DRegister rn, 8609 DRegister dm, 8610 unsigned index) { 8611 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8612 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8613 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8614 VIXL_ASSERT(allow_macro_instructions_); 8615 VIXL_ASSERT(OutsideITBlock()); 8616 MacroEmissionCheckScope guard(this); 8617 ITScope it_scope(this, &cond); 8618 vqdmlal(cond, dt, rd, rn, dm, index); 8619 } 8620 void Vqdmlal( 8621 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { 8622 Vqdmlal(al, dt, rd, rn, dm, index); 8623 } 8624 8625 void Vqdmlsl( 8626 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8627 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8628 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8629 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8630 VIXL_ASSERT(allow_macro_instructions_); 8631 VIXL_ASSERT(OutsideITBlock()); 8632 MacroEmissionCheckScope guard(this); 8633 ITScope it_scope(this, &cond); 8634 vqdmlsl(cond, dt, rd, rn, rm); 8635 } 8636 void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8637 Vqdmlsl(al, dt, rd, rn, rm); 8638 } 8639 8640 void Vqdmlsl(Condition cond, 8641 DataType dt, 8642 QRegister rd, 8643 DRegister rn, 8644 DRegister dm, 8645 unsigned index) { 8646 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8647 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8648 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8649 VIXL_ASSERT(allow_macro_instructions_); 8650 VIXL_ASSERT(OutsideITBlock()); 8651 MacroEmissionCheckScope guard(this); 8652 ITScope it_scope(this, &cond); 8653 vqdmlsl(cond, dt, rd, rn, dm, index); 8654 } 8655 void Vqdmlsl( 8656 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { 8657 Vqdmlsl(al, dt, rd, rn, dm, index); 8658 } 8659 8660 void Vqdmulh( 8661 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8662 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8663 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8665 VIXL_ASSERT(allow_macro_instructions_); 8666 VIXL_ASSERT(OutsideITBlock()); 8667 MacroEmissionCheckScope guard(this); 8668 ITScope it_scope(this, &cond); 8669 vqdmulh(cond, dt, rd, rn, rm); 8670 } 8671 void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8672 Vqdmulh(al, dt, rd, rn, rm); 8673 } 8674 8675 void Vqdmulh( 8676 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8677 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8678 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8679 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8680 VIXL_ASSERT(allow_macro_instructions_); 8681 VIXL_ASSERT(OutsideITBlock()); 8682 MacroEmissionCheckScope guard(this); 8683 ITScope it_scope(this, &cond); 8684 vqdmulh(cond, dt, rd, rn, rm); 8685 } 8686 void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8687 Vqdmulh(al, dt, rd, rn, rm); 8688 } 8689 8690 void Vqdmulh(Condition cond, 8691 DataType dt, 8692 DRegister rd, 8693 DRegister rn, 8694 DRegisterLane rm) { 8695 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8696 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8697 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8698 VIXL_ASSERT(allow_macro_instructions_); 8699 VIXL_ASSERT(OutsideITBlock()); 8700 MacroEmissionCheckScope guard(this); 8701 ITScope it_scope(this, &cond); 8702 vqdmulh(cond, dt, rd, rn, rm); 8703 } 8704 void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 8705 Vqdmulh(al, dt, rd, rn, rm); 8706 } 8707 8708 void Vqdmulh(Condition cond, 8709 DataType dt, 8710 QRegister rd, 8711 QRegister rn, 8712 DRegisterLane rm) { 8713 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8714 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8715 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8716 VIXL_ASSERT(allow_macro_instructions_); 8717 VIXL_ASSERT(OutsideITBlock()); 8718 MacroEmissionCheckScope guard(this); 8719 ITScope it_scope(this, &cond); 8720 vqdmulh(cond, dt, rd, rn, rm); 8721 } 8722 void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 8723 Vqdmulh(al, dt, rd, rn, rm); 8724 } 8725 8726 void Vqdmull( 8727 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8728 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8729 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8730 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8731 VIXL_ASSERT(allow_macro_instructions_); 8732 VIXL_ASSERT(OutsideITBlock()); 8733 MacroEmissionCheckScope guard(this); 8734 ITScope it_scope(this, &cond); 8735 vqdmull(cond, dt, rd, rn, rm); 8736 } 8737 void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8738 Vqdmull(al, dt, rd, rn, rm); 8739 } 8740 8741 void Vqdmull(Condition cond, 8742 DataType dt, 8743 QRegister rd, 8744 DRegister rn, 8745 DRegisterLane rm) { 8746 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8747 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8748 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8749 VIXL_ASSERT(allow_macro_instructions_); 8750 VIXL_ASSERT(OutsideITBlock()); 8751 MacroEmissionCheckScope guard(this); 8752 ITScope it_scope(this, &cond); 8753 vqdmull(cond, dt, rd, rn, rm); 8754 } 8755 void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { 8756 Vqdmull(al, dt, rd, rn, rm); 8757 } 8758 8759 void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) { 8760 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8761 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8762 VIXL_ASSERT(allow_macro_instructions_); 8763 VIXL_ASSERT(OutsideITBlock()); 8764 MacroEmissionCheckScope guard(this); 8765 ITScope it_scope(this, &cond); 8766 vqmovn(cond, dt, rd, rm); 8767 } 8768 void Vqmovn(DataType dt, DRegister rd, QRegister rm) { 8769 Vqmovn(al, dt, rd, rm); 8770 } 8771 8772 void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) { 8773 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8774 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8775 VIXL_ASSERT(allow_macro_instructions_); 8776 VIXL_ASSERT(OutsideITBlock()); 8777 MacroEmissionCheckScope guard(this); 8778 ITScope it_scope(this, &cond); 8779 vqmovun(cond, dt, rd, rm); 8780 } 8781 void Vqmovun(DataType dt, DRegister rd, QRegister rm) { 8782 Vqmovun(al, dt, rd, rm); 8783 } 8784 8785 void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8786 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8787 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8788 VIXL_ASSERT(allow_macro_instructions_); 8789 VIXL_ASSERT(OutsideITBlock()); 8790 MacroEmissionCheckScope guard(this); 8791 ITScope it_scope(this, &cond); 8792 vqneg(cond, dt, rd, rm); 8793 } 8794 void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); } 8795 8796 void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8797 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8798 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8799 VIXL_ASSERT(allow_macro_instructions_); 8800 VIXL_ASSERT(OutsideITBlock()); 8801 MacroEmissionCheckScope guard(this); 8802 ITScope it_scope(this, &cond); 8803 vqneg(cond, dt, rd, rm); 8804 } 8805 void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); } 8806 8807 void Vqrdmulh( 8808 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8809 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8810 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8811 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8812 VIXL_ASSERT(allow_macro_instructions_); 8813 VIXL_ASSERT(OutsideITBlock()); 8814 MacroEmissionCheckScope guard(this); 8815 ITScope it_scope(this, &cond); 8816 vqrdmulh(cond, dt, rd, rn, rm); 8817 } 8818 void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8819 Vqrdmulh(al, dt, rd, rn, rm); 8820 } 8821 8822 void Vqrdmulh( 8823 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8824 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8825 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8826 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8827 VIXL_ASSERT(allow_macro_instructions_); 8828 VIXL_ASSERT(OutsideITBlock()); 8829 MacroEmissionCheckScope guard(this); 8830 ITScope it_scope(this, &cond); 8831 vqrdmulh(cond, dt, rd, rn, rm); 8832 } 8833 void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8834 Vqrdmulh(al, dt, rd, rn, rm); 8835 } 8836 8837 void Vqrdmulh(Condition cond, 8838 DataType dt, 8839 DRegister rd, 8840 DRegister rn, 8841 DRegisterLane rm) { 8842 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8843 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8844 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8845 VIXL_ASSERT(allow_macro_instructions_); 8846 VIXL_ASSERT(OutsideITBlock()); 8847 MacroEmissionCheckScope guard(this); 8848 ITScope it_scope(this, &cond); 8849 vqrdmulh(cond, dt, rd, rn, rm); 8850 } 8851 void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 8852 Vqrdmulh(al, dt, rd, rn, rm); 8853 } 8854 8855 void Vqrdmulh(Condition cond, 8856 DataType dt, 8857 QRegister rd, 8858 QRegister rn, 8859 DRegisterLane rm) { 8860 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8861 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8862 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8863 VIXL_ASSERT(allow_macro_instructions_); 8864 VIXL_ASSERT(OutsideITBlock()); 8865 MacroEmissionCheckScope guard(this); 8866 ITScope it_scope(this, &cond); 8867 vqrdmulh(cond, dt, rd, rn, rm); 8868 } 8869 void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 8870 Vqrdmulh(al, dt, rd, rn, rm); 8871 } 8872 8873 void Vqrshl( 8874 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) { 8875 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8876 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8877 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8878 VIXL_ASSERT(allow_macro_instructions_); 8879 VIXL_ASSERT(OutsideITBlock()); 8880 MacroEmissionCheckScope guard(this); 8881 ITScope it_scope(this, &cond); 8882 vqrshl(cond, dt, rd, rm, rn); 8883 } 8884 void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) { 8885 Vqrshl(al, dt, rd, rm, rn); 8886 } 8887 8888 void Vqrshl( 8889 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) { 8890 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8891 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8892 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8893 VIXL_ASSERT(allow_macro_instructions_); 8894 VIXL_ASSERT(OutsideITBlock()); 8895 MacroEmissionCheckScope guard(this); 8896 ITScope it_scope(this, &cond); 8897 vqrshl(cond, dt, rd, rm, rn); 8898 } 8899 void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) { 8900 Vqrshl(al, dt, rd, rm, rn); 8901 } 8902 8903 void Vqrshrn(Condition cond, 8904 DataType dt, 8905 DRegister rd, 8906 QRegister rm, 8907 const QOperand& operand) { 8908 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8909 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8910 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8911 VIXL_ASSERT(allow_macro_instructions_); 8912 VIXL_ASSERT(OutsideITBlock()); 8913 MacroEmissionCheckScope guard(this); 8914 ITScope it_scope(this, &cond); 8915 vqrshrn(cond, dt, rd, rm, operand); 8916 } 8917 void Vqrshrn(DataType dt, 8918 DRegister rd, 8919 QRegister rm, 8920 const QOperand& operand) { 8921 Vqrshrn(al, dt, rd, rm, operand); 8922 } 8923 8924 void Vqrshrun(Condition cond, 8925 DataType dt, 8926 DRegister rd, 8927 QRegister rm, 8928 const QOperand& operand) { 8929 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8930 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8931 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8932 VIXL_ASSERT(allow_macro_instructions_); 8933 VIXL_ASSERT(OutsideITBlock()); 8934 MacroEmissionCheckScope guard(this); 8935 ITScope it_scope(this, &cond); 8936 vqrshrun(cond, dt, rd, rm, operand); 8937 } 8938 void Vqrshrun(DataType dt, 8939 DRegister rd, 8940 QRegister rm, 8941 const QOperand& operand) { 8942 Vqrshrun(al, dt, rd, rm, operand); 8943 } 8944 8945 void Vqshl(Condition cond, 8946 DataType dt, 8947 DRegister rd, 8948 DRegister rm, 8949 const DOperand& operand) { 8950 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8951 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8952 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8953 VIXL_ASSERT(allow_macro_instructions_); 8954 VIXL_ASSERT(OutsideITBlock()); 8955 MacroEmissionCheckScope guard(this); 8956 ITScope it_scope(this, &cond); 8957 vqshl(cond, dt, rd, rm, operand); 8958 } 8959 void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 8960 Vqshl(al, dt, rd, rm, operand); 8961 } 8962 8963 void Vqshl(Condition cond, 8964 DataType dt, 8965 QRegister rd, 8966 QRegister rm, 8967 const QOperand& operand) { 8968 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8969 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8970 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8971 VIXL_ASSERT(allow_macro_instructions_); 8972 VIXL_ASSERT(OutsideITBlock()); 8973 MacroEmissionCheckScope guard(this); 8974 ITScope it_scope(this, &cond); 8975 vqshl(cond, dt, rd, rm, operand); 8976 } 8977 void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 8978 Vqshl(al, dt, rd, rm, operand); 8979 } 8980 8981 void Vqshlu(Condition cond, 8982 DataType dt, 8983 DRegister rd, 8984 DRegister rm, 8985 const DOperand& operand) { 8986 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8987 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8988 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8989 VIXL_ASSERT(allow_macro_instructions_); 8990 VIXL_ASSERT(OutsideITBlock()); 8991 MacroEmissionCheckScope guard(this); 8992 ITScope it_scope(this, &cond); 8993 vqshlu(cond, dt, rd, rm, operand); 8994 } 8995 void Vqshlu(DataType dt, 8996 DRegister rd, 8997 DRegister rm, 8998 const DOperand& operand) { 8999 Vqshlu(al, dt, rd, rm, operand); 9000 } 9001 9002 void Vqshlu(Condition cond, 9003 DataType dt, 9004 QRegister rd, 9005 QRegister rm, 9006 const QOperand& operand) { 9007 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9008 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9009 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9010 VIXL_ASSERT(allow_macro_instructions_); 9011 VIXL_ASSERT(OutsideITBlock()); 9012 MacroEmissionCheckScope guard(this); 9013 ITScope it_scope(this, &cond); 9014 vqshlu(cond, dt, rd, rm, operand); 9015 } 9016 void Vqshlu(DataType dt, 9017 QRegister rd, 9018 QRegister rm, 9019 const QOperand& operand) { 9020 Vqshlu(al, dt, rd, rm, operand); 9021 } 9022 9023 void Vqshrn(Condition cond, 9024 DataType dt, 9025 DRegister rd, 9026 QRegister rm, 9027 const QOperand& operand) { 9028 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9029 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9030 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9031 VIXL_ASSERT(allow_macro_instructions_); 9032 VIXL_ASSERT(OutsideITBlock()); 9033 MacroEmissionCheckScope guard(this); 9034 ITScope it_scope(this, &cond); 9035 vqshrn(cond, dt, rd, rm, operand); 9036 } 9037 void Vqshrn(DataType dt, 9038 DRegister rd, 9039 QRegister rm, 9040 const QOperand& operand) { 9041 Vqshrn(al, dt, rd, rm, operand); 9042 } 9043 9044 void Vqshrun(Condition cond, 9045 DataType dt, 9046 DRegister rd, 9047 QRegister rm, 9048 const QOperand& operand) { 9049 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9050 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9051 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9052 VIXL_ASSERT(allow_macro_instructions_); 9053 VIXL_ASSERT(OutsideITBlock()); 9054 MacroEmissionCheckScope guard(this); 9055 ITScope it_scope(this, &cond); 9056 vqshrun(cond, dt, rd, rm, operand); 9057 } 9058 void Vqshrun(DataType dt, 9059 DRegister rd, 9060 QRegister rm, 9061 const QOperand& operand) { 9062 Vqshrun(al, dt, rd, rm, operand); 9063 } 9064 9065 void Vqsub( 9066 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9067 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9068 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9069 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9070 VIXL_ASSERT(allow_macro_instructions_); 9071 VIXL_ASSERT(OutsideITBlock()); 9072 MacroEmissionCheckScope guard(this); 9073 ITScope it_scope(this, &cond); 9074 vqsub(cond, dt, rd, rn, rm); 9075 } 9076 void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9077 Vqsub(al, dt, rd, rn, rm); 9078 } 9079 9080 void Vqsub( 9081 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9082 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9083 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9084 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9085 VIXL_ASSERT(allow_macro_instructions_); 9086 VIXL_ASSERT(OutsideITBlock()); 9087 MacroEmissionCheckScope guard(this); 9088 ITScope it_scope(this, &cond); 9089 vqsub(cond, dt, rd, rn, rm); 9090 } 9091 void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9092 Vqsub(al, dt, rd, rn, rm); 9093 } 9094 9095 void Vraddhn( 9096 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 9097 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9098 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9099 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9100 VIXL_ASSERT(allow_macro_instructions_); 9101 VIXL_ASSERT(OutsideITBlock()); 9102 MacroEmissionCheckScope guard(this); 9103 ITScope it_scope(this, &cond); 9104 vraddhn(cond, dt, rd, rn, rm); 9105 } 9106 void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 9107 Vraddhn(al, dt, rd, rn, rm); 9108 } 9109 9110 void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9111 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9112 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9113 VIXL_ASSERT(allow_macro_instructions_); 9114 VIXL_ASSERT(OutsideITBlock()); 9115 MacroEmissionCheckScope guard(this); 9116 ITScope it_scope(this, &cond); 9117 vrecpe(cond, dt, rd, rm); 9118 } 9119 void Vrecpe(DataType dt, DRegister rd, DRegister rm) { 9120 Vrecpe(al, dt, rd, rm); 9121 } 9122 9123 void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9124 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9125 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9126 VIXL_ASSERT(allow_macro_instructions_); 9127 VIXL_ASSERT(OutsideITBlock()); 9128 MacroEmissionCheckScope guard(this); 9129 ITScope it_scope(this, &cond); 9130 vrecpe(cond, dt, rd, rm); 9131 } 9132 void Vrecpe(DataType dt, QRegister rd, QRegister rm) { 9133 Vrecpe(al, dt, rd, rm); 9134 } 9135 9136 void Vrecps( 9137 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9138 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9139 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9140 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9141 VIXL_ASSERT(allow_macro_instructions_); 9142 VIXL_ASSERT(OutsideITBlock()); 9143 MacroEmissionCheckScope guard(this); 9144 ITScope it_scope(this, &cond); 9145 vrecps(cond, dt, rd, rn, rm); 9146 } 9147 void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9148 Vrecps(al, dt, rd, rn, rm); 9149 } 9150 9151 void Vrecps( 9152 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9153 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9154 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9155 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9156 VIXL_ASSERT(allow_macro_instructions_); 9157 VIXL_ASSERT(OutsideITBlock()); 9158 MacroEmissionCheckScope guard(this); 9159 ITScope it_scope(this, &cond); 9160 vrecps(cond, dt, rd, rn, rm); 9161 } 9162 void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9163 Vrecps(al, dt, rd, rn, rm); 9164 } 9165 9166 void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9167 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9168 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9169 VIXL_ASSERT(allow_macro_instructions_); 9170 VIXL_ASSERT(OutsideITBlock()); 9171 MacroEmissionCheckScope guard(this); 9172 ITScope it_scope(this, &cond); 9173 vrev16(cond, dt, rd, rm); 9174 } 9175 void Vrev16(DataType dt, DRegister rd, DRegister rm) { 9176 Vrev16(al, dt, rd, rm); 9177 } 9178 9179 void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9180 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9181 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9182 VIXL_ASSERT(allow_macro_instructions_); 9183 VIXL_ASSERT(OutsideITBlock()); 9184 MacroEmissionCheckScope guard(this); 9185 ITScope it_scope(this, &cond); 9186 vrev16(cond, dt, rd, rm); 9187 } 9188 void Vrev16(DataType dt, QRegister rd, QRegister rm) { 9189 Vrev16(al, dt, rd, rm); 9190 } 9191 9192 void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9193 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9194 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9195 VIXL_ASSERT(allow_macro_instructions_); 9196 VIXL_ASSERT(OutsideITBlock()); 9197 MacroEmissionCheckScope guard(this); 9198 ITScope it_scope(this, &cond); 9199 vrev32(cond, dt, rd, rm); 9200 } 9201 void Vrev32(DataType dt, DRegister rd, DRegister rm) { 9202 Vrev32(al, dt, rd, rm); 9203 } 9204 9205 void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9206 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9207 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9208 VIXL_ASSERT(allow_macro_instructions_); 9209 VIXL_ASSERT(OutsideITBlock()); 9210 MacroEmissionCheckScope guard(this); 9211 ITScope it_scope(this, &cond); 9212 vrev32(cond, dt, rd, rm); 9213 } 9214 void Vrev32(DataType dt, QRegister rd, QRegister rm) { 9215 Vrev32(al, dt, rd, rm); 9216 } 9217 9218 void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9219 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9220 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9221 VIXL_ASSERT(allow_macro_instructions_); 9222 VIXL_ASSERT(OutsideITBlock()); 9223 MacroEmissionCheckScope guard(this); 9224 ITScope it_scope(this, &cond); 9225 vrev64(cond, dt, rd, rm); 9226 } 9227 void Vrev64(DataType dt, DRegister rd, DRegister rm) { 9228 Vrev64(al, dt, rd, rm); 9229 } 9230 9231 void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9232 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9233 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9234 VIXL_ASSERT(allow_macro_instructions_); 9235 VIXL_ASSERT(OutsideITBlock()); 9236 MacroEmissionCheckScope guard(this); 9237 ITScope it_scope(this, &cond); 9238 vrev64(cond, dt, rd, rm); 9239 } 9240 void Vrev64(DataType dt, QRegister rd, QRegister rm) { 9241 Vrev64(al, dt, rd, rm); 9242 } 9243 9244 void Vrhadd( 9245 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9246 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9247 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9248 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9249 VIXL_ASSERT(allow_macro_instructions_); 9250 VIXL_ASSERT(OutsideITBlock()); 9251 MacroEmissionCheckScope guard(this); 9252 ITScope it_scope(this, &cond); 9253 vrhadd(cond, dt, rd, rn, rm); 9254 } 9255 void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9256 Vrhadd(al, dt, rd, rn, rm); 9257 } 9258 9259 void Vrhadd( 9260 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9261 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9262 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9263 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9264 VIXL_ASSERT(allow_macro_instructions_); 9265 VIXL_ASSERT(OutsideITBlock()); 9266 MacroEmissionCheckScope guard(this); 9267 ITScope it_scope(this, &cond); 9268 vrhadd(cond, dt, rd, rn, rm); 9269 } 9270 void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9271 Vrhadd(al, dt, rd, rn, rm); 9272 } 9273 9274 void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9275 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9276 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9277 VIXL_ASSERT(allow_macro_instructions_); 9278 VIXL_ASSERT(OutsideITBlock()); 9279 MacroEmissionCheckScope guard(this); 9280 vrinta(dt1, dt2, rd, rm); 9281 } 9282 9283 void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9284 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9285 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9286 VIXL_ASSERT(allow_macro_instructions_); 9287 VIXL_ASSERT(OutsideITBlock()); 9288 MacroEmissionCheckScope guard(this); 9289 vrinta(dt1, dt2, rd, rm); 9290 } 9291 9292 void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9293 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9294 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9295 VIXL_ASSERT(allow_macro_instructions_); 9296 VIXL_ASSERT(OutsideITBlock()); 9297 MacroEmissionCheckScope guard(this); 9298 vrinta(dt1, dt2, rd, rm); 9299 } 9300 9301 void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9302 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9303 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9304 VIXL_ASSERT(allow_macro_instructions_); 9305 VIXL_ASSERT(OutsideITBlock()); 9306 MacroEmissionCheckScope guard(this); 9307 vrintm(dt1, dt2, rd, rm); 9308 } 9309 9310 void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9311 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9312 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9313 VIXL_ASSERT(allow_macro_instructions_); 9314 VIXL_ASSERT(OutsideITBlock()); 9315 MacroEmissionCheckScope guard(this); 9316 vrintm(dt1, dt2, rd, rm); 9317 } 9318 9319 void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9320 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9321 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9322 VIXL_ASSERT(allow_macro_instructions_); 9323 VIXL_ASSERT(OutsideITBlock()); 9324 MacroEmissionCheckScope guard(this); 9325 vrintm(dt1, dt2, rd, rm); 9326 } 9327 9328 void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9329 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9330 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9331 VIXL_ASSERT(allow_macro_instructions_); 9332 VIXL_ASSERT(OutsideITBlock()); 9333 MacroEmissionCheckScope guard(this); 9334 vrintn(dt1, dt2, rd, rm); 9335 } 9336 9337 void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9338 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9339 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9340 VIXL_ASSERT(allow_macro_instructions_); 9341 VIXL_ASSERT(OutsideITBlock()); 9342 MacroEmissionCheckScope guard(this); 9343 vrintn(dt1, dt2, rd, rm); 9344 } 9345 9346 void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9347 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9348 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9349 VIXL_ASSERT(allow_macro_instructions_); 9350 VIXL_ASSERT(OutsideITBlock()); 9351 MacroEmissionCheckScope guard(this); 9352 vrintn(dt1, dt2, rd, rm); 9353 } 9354 9355 void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9356 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9357 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9358 VIXL_ASSERT(allow_macro_instructions_); 9359 VIXL_ASSERT(OutsideITBlock()); 9360 MacroEmissionCheckScope guard(this); 9361 vrintp(dt1, dt2, rd, rm); 9362 } 9363 9364 void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9365 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9366 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9367 VIXL_ASSERT(allow_macro_instructions_); 9368 VIXL_ASSERT(OutsideITBlock()); 9369 MacroEmissionCheckScope guard(this); 9370 vrintp(dt1, dt2, rd, rm); 9371 } 9372 9373 void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9374 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9375 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9376 VIXL_ASSERT(allow_macro_instructions_); 9377 VIXL_ASSERT(OutsideITBlock()); 9378 MacroEmissionCheckScope guard(this); 9379 vrintp(dt1, dt2, rd, rm); 9380 } 9381 9382 void Vrintr( 9383 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9384 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9385 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9386 VIXL_ASSERT(allow_macro_instructions_); 9387 VIXL_ASSERT(OutsideITBlock()); 9388 MacroEmissionCheckScope guard(this); 9389 ITScope it_scope(this, &cond); 9390 vrintr(cond, dt1, dt2, rd, rm); 9391 } 9392 void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9393 Vrintr(al, dt1, dt2, rd, rm); 9394 } 9395 9396 void Vrintr( 9397 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9398 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9399 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9400 VIXL_ASSERT(allow_macro_instructions_); 9401 VIXL_ASSERT(OutsideITBlock()); 9402 MacroEmissionCheckScope guard(this); 9403 ITScope it_scope(this, &cond); 9404 vrintr(cond, dt1, dt2, rd, rm); 9405 } 9406 void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9407 Vrintr(al, dt1, dt2, rd, rm); 9408 } 9409 9410 void Vrintx( 9411 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9412 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9413 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9414 VIXL_ASSERT(allow_macro_instructions_); 9415 VIXL_ASSERT(OutsideITBlock()); 9416 MacroEmissionCheckScope guard(this); 9417 ITScope it_scope(this, &cond); 9418 vrintx(cond, dt1, dt2, rd, rm); 9419 } 9420 void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9421 Vrintx(al, dt1, dt2, rd, rm); 9422 } 9423 9424 void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9425 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9426 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9427 VIXL_ASSERT(allow_macro_instructions_); 9428 VIXL_ASSERT(OutsideITBlock()); 9429 MacroEmissionCheckScope guard(this); 9430 vrintx(dt1, dt2, rd, rm); 9431 } 9432 9433 void Vrintx( 9434 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9435 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9436 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9437 VIXL_ASSERT(allow_macro_instructions_); 9438 VIXL_ASSERT(OutsideITBlock()); 9439 MacroEmissionCheckScope guard(this); 9440 ITScope it_scope(this, &cond); 9441 vrintx(cond, dt1, dt2, rd, rm); 9442 } 9443 void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9444 Vrintx(al, dt1, dt2, rd, rm); 9445 } 9446 9447 void Vrintz( 9448 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9449 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9450 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9451 VIXL_ASSERT(allow_macro_instructions_); 9452 VIXL_ASSERT(OutsideITBlock()); 9453 MacroEmissionCheckScope guard(this); 9454 ITScope it_scope(this, &cond); 9455 vrintz(cond, dt1, dt2, rd, rm); 9456 } 9457 void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9458 Vrintz(al, dt1, dt2, rd, rm); 9459 } 9460 9461 void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9462 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9463 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9464 VIXL_ASSERT(allow_macro_instructions_); 9465 VIXL_ASSERT(OutsideITBlock()); 9466 MacroEmissionCheckScope guard(this); 9467 vrintz(dt1, dt2, rd, rm); 9468 } 9469 9470 void Vrintz( 9471 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9472 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9473 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9474 VIXL_ASSERT(allow_macro_instructions_); 9475 VIXL_ASSERT(OutsideITBlock()); 9476 MacroEmissionCheckScope guard(this); 9477 ITScope it_scope(this, &cond); 9478 vrintz(cond, dt1, dt2, rd, rm); 9479 } 9480 void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9481 Vrintz(al, dt1, dt2, rd, rm); 9482 } 9483 9484 void Vrshl( 9485 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) { 9486 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9487 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9488 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9489 VIXL_ASSERT(allow_macro_instructions_); 9490 VIXL_ASSERT(OutsideITBlock()); 9491 MacroEmissionCheckScope guard(this); 9492 ITScope it_scope(this, &cond); 9493 vrshl(cond, dt, rd, rm, rn); 9494 } 9495 void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) { 9496 Vrshl(al, dt, rd, rm, rn); 9497 } 9498 9499 void Vrshl( 9500 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) { 9501 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9502 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9503 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9504 VIXL_ASSERT(allow_macro_instructions_); 9505 VIXL_ASSERT(OutsideITBlock()); 9506 MacroEmissionCheckScope guard(this); 9507 ITScope it_scope(this, &cond); 9508 vrshl(cond, dt, rd, rm, rn); 9509 } 9510 void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) { 9511 Vrshl(al, dt, rd, rm, rn); 9512 } 9513 9514 void Vrshr(Condition cond, 9515 DataType dt, 9516 DRegister rd, 9517 DRegister rm, 9518 const DOperand& operand) { 9519 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9520 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9521 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9522 VIXL_ASSERT(allow_macro_instructions_); 9523 VIXL_ASSERT(OutsideITBlock()); 9524 MacroEmissionCheckScope guard(this); 9525 ITScope it_scope(this, &cond); 9526 vrshr(cond, dt, rd, rm, operand); 9527 } 9528 void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9529 Vrshr(al, dt, rd, rm, operand); 9530 } 9531 9532 void Vrshr(Condition cond, 9533 DataType dt, 9534 QRegister rd, 9535 QRegister rm, 9536 const QOperand& operand) { 9537 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9538 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9539 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9540 VIXL_ASSERT(allow_macro_instructions_); 9541 VIXL_ASSERT(OutsideITBlock()); 9542 MacroEmissionCheckScope guard(this); 9543 ITScope it_scope(this, &cond); 9544 vrshr(cond, dt, rd, rm, operand); 9545 } 9546 void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9547 Vrshr(al, dt, rd, rm, operand); 9548 } 9549 9550 void Vrshrn(Condition cond, 9551 DataType dt, 9552 DRegister rd, 9553 QRegister rm, 9554 const QOperand& operand) { 9555 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9556 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9557 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9558 VIXL_ASSERT(allow_macro_instructions_); 9559 VIXL_ASSERT(OutsideITBlock()); 9560 MacroEmissionCheckScope guard(this); 9561 ITScope it_scope(this, &cond); 9562 vrshrn(cond, dt, rd, rm, operand); 9563 } 9564 void Vrshrn(DataType dt, 9565 DRegister rd, 9566 QRegister rm, 9567 const QOperand& operand) { 9568 Vrshrn(al, dt, rd, rm, operand); 9569 } 9570 9571 void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9572 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9573 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9574 VIXL_ASSERT(allow_macro_instructions_); 9575 VIXL_ASSERT(OutsideITBlock()); 9576 MacroEmissionCheckScope guard(this); 9577 ITScope it_scope(this, &cond); 9578 vrsqrte(cond, dt, rd, rm); 9579 } 9580 void Vrsqrte(DataType dt, DRegister rd, DRegister rm) { 9581 Vrsqrte(al, dt, rd, rm); 9582 } 9583 9584 void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9585 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9586 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9587 VIXL_ASSERT(allow_macro_instructions_); 9588 VIXL_ASSERT(OutsideITBlock()); 9589 MacroEmissionCheckScope guard(this); 9590 ITScope it_scope(this, &cond); 9591 vrsqrte(cond, dt, rd, rm); 9592 } 9593 void Vrsqrte(DataType dt, QRegister rd, QRegister rm) { 9594 Vrsqrte(al, dt, rd, rm); 9595 } 9596 9597 void Vrsqrts( 9598 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9599 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9600 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9601 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9602 VIXL_ASSERT(allow_macro_instructions_); 9603 VIXL_ASSERT(OutsideITBlock()); 9604 MacroEmissionCheckScope guard(this); 9605 ITScope it_scope(this, &cond); 9606 vrsqrts(cond, dt, rd, rn, rm); 9607 } 9608 void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9609 Vrsqrts(al, dt, rd, rn, rm); 9610 } 9611 9612 void Vrsqrts( 9613 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9614 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9615 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9616 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9617 VIXL_ASSERT(allow_macro_instructions_); 9618 VIXL_ASSERT(OutsideITBlock()); 9619 MacroEmissionCheckScope guard(this); 9620 ITScope it_scope(this, &cond); 9621 vrsqrts(cond, dt, rd, rn, rm); 9622 } 9623 void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9624 Vrsqrts(al, dt, rd, rn, rm); 9625 } 9626 9627 void Vrsra(Condition cond, 9628 DataType dt, 9629 DRegister rd, 9630 DRegister rm, 9631 const DOperand& operand) { 9632 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9633 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9634 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9635 VIXL_ASSERT(allow_macro_instructions_); 9636 VIXL_ASSERT(OutsideITBlock()); 9637 MacroEmissionCheckScope guard(this); 9638 ITScope it_scope(this, &cond); 9639 vrsra(cond, dt, rd, rm, operand); 9640 } 9641 void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9642 Vrsra(al, dt, rd, rm, operand); 9643 } 9644 9645 void Vrsra(Condition cond, 9646 DataType dt, 9647 QRegister rd, 9648 QRegister rm, 9649 const QOperand& operand) { 9650 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9651 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9652 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9653 VIXL_ASSERT(allow_macro_instructions_); 9654 VIXL_ASSERT(OutsideITBlock()); 9655 MacroEmissionCheckScope guard(this); 9656 ITScope it_scope(this, &cond); 9657 vrsra(cond, dt, rd, rm, operand); 9658 } 9659 void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9660 Vrsra(al, dt, rd, rm, operand); 9661 } 9662 9663 void Vrsubhn( 9664 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 9665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9666 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9667 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9668 VIXL_ASSERT(allow_macro_instructions_); 9669 VIXL_ASSERT(OutsideITBlock()); 9670 MacroEmissionCheckScope guard(this); 9671 ITScope it_scope(this, &cond); 9672 vrsubhn(cond, dt, rd, rn, rm); 9673 } 9674 void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 9675 Vrsubhn(al, dt, rd, rn, rm); 9676 } 9677 9678 void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9679 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9680 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9681 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9682 VIXL_ASSERT(allow_macro_instructions_); 9683 VIXL_ASSERT(OutsideITBlock()); 9684 MacroEmissionCheckScope guard(this); 9685 vseleq(dt, rd, rn, rm); 9686 } 9687 9688 void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9689 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9690 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9691 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9692 VIXL_ASSERT(allow_macro_instructions_); 9693 VIXL_ASSERT(OutsideITBlock()); 9694 MacroEmissionCheckScope guard(this); 9695 vseleq(dt, rd, rn, rm); 9696 } 9697 9698 void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9699 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9700 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9701 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9702 VIXL_ASSERT(allow_macro_instructions_); 9703 VIXL_ASSERT(OutsideITBlock()); 9704 MacroEmissionCheckScope guard(this); 9705 vselge(dt, rd, rn, rm); 9706 } 9707 9708 void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9709 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9710 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9711 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9712 VIXL_ASSERT(allow_macro_instructions_); 9713 VIXL_ASSERT(OutsideITBlock()); 9714 MacroEmissionCheckScope guard(this); 9715 vselge(dt, rd, rn, rm); 9716 } 9717 9718 void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9719 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9720 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9721 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9722 VIXL_ASSERT(allow_macro_instructions_); 9723 VIXL_ASSERT(OutsideITBlock()); 9724 MacroEmissionCheckScope guard(this); 9725 vselgt(dt, rd, rn, rm); 9726 } 9727 9728 void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9729 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9730 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9731 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9732 VIXL_ASSERT(allow_macro_instructions_); 9733 VIXL_ASSERT(OutsideITBlock()); 9734 MacroEmissionCheckScope guard(this); 9735 vselgt(dt, rd, rn, rm); 9736 } 9737 9738 void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9739 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9740 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9741 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9742 VIXL_ASSERT(allow_macro_instructions_); 9743 VIXL_ASSERT(OutsideITBlock()); 9744 MacroEmissionCheckScope guard(this); 9745 vselvs(dt, rd, rn, rm); 9746 } 9747 9748 void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9749 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9750 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9751 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9752 VIXL_ASSERT(allow_macro_instructions_); 9753 VIXL_ASSERT(OutsideITBlock()); 9754 MacroEmissionCheckScope guard(this); 9755 vselvs(dt, rd, rn, rm); 9756 } 9757 9758 void Vshl(Condition cond, 9759 DataType dt, 9760 DRegister rd, 9761 DRegister rm, 9762 const DOperand& operand) { 9763 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9764 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9765 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9766 VIXL_ASSERT(allow_macro_instructions_); 9767 VIXL_ASSERT(OutsideITBlock()); 9768 MacroEmissionCheckScope guard(this); 9769 ITScope it_scope(this, &cond); 9770 vshl(cond, dt, rd, rm, operand); 9771 } 9772 void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9773 Vshl(al, dt, rd, rm, operand); 9774 } 9775 9776 void Vshl(Condition cond, 9777 DataType dt, 9778 QRegister rd, 9779 QRegister rm, 9780 const QOperand& operand) { 9781 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9782 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9783 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9784 VIXL_ASSERT(allow_macro_instructions_); 9785 VIXL_ASSERT(OutsideITBlock()); 9786 MacroEmissionCheckScope guard(this); 9787 ITScope it_scope(this, &cond); 9788 vshl(cond, dt, rd, rm, operand); 9789 } 9790 void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9791 Vshl(al, dt, rd, rm, operand); 9792 } 9793 9794 void Vshll(Condition cond, 9795 DataType dt, 9796 QRegister rd, 9797 DRegister rm, 9798 const DOperand& operand) { 9799 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9800 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9801 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9802 VIXL_ASSERT(allow_macro_instructions_); 9803 VIXL_ASSERT(OutsideITBlock()); 9804 MacroEmissionCheckScope guard(this); 9805 ITScope it_scope(this, &cond); 9806 vshll(cond, dt, rd, rm, operand); 9807 } 9808 void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) { 9809 Vshll(al, dt, rd, rm, operand); 9810 } 9811 9812 void Vshr(Condition cond, 9813 DataType dt, 9814 DRegister rd, 9815 DRegister rm, 9816 const DOperand& operand) { 9817 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9818 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9819 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9820 VIXL_ASSERT(allow_macro_instructions_); 9821 VIXL_ASSERT(OutsideITBlock()); 9822 MacroEmissionCheckScope guard(this); 9823 ITScope it_scope(this, &cond); 9824 vshr(cond, dt, rd, rm, operand); 9825 } 9826 void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9827 Vshr(al, dt, rd, rm, operand); 9828 } 9829 9830 void Vshr(Condition cond, 9831 DataType dt, 9832 QRegister rd, 9833 QRegister rm, 9834 const QOperand& operand) { 9835 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9836 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9837 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9838 VIXL_ASSERT(allow_macro_instructions_); 9839 VIXL_ASSERT(OutsideITBlock()); 9840 MacroEmissionCheckScope guard(this); 9841 ITScope it_scope(this, &cond); 9842 vshr(cond, dt, rd, rm, operand); 9843 } 9844 void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9845 Vshr(al, dt, rd, rm, operand); 9846 } 9847 9848 void Vshrn(Condition cond, 9849 DataType dt, 9850 DRegister rd, 9851 QRegister rm, 9852 const QOperand& operand) { 9853 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9854 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9855 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9856 VIXL_ASSERT(allow_macro_instructions_); 9857 VIXL_ASSERT(OutsideITBlock()); 9858 MacroEmissionCheckScope guard(this); 9859 ITScope it_scope(this, &cond); 9860 vshrn(cond, dt, rd, rm, operand); 9861 } 9862 void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) { 9863 Vshrn(al, dt, rd, rm, operand); 9864 } 9865 9866 void Vsli(Condition cond, 9867 DataType dt, 9868 DRegister rd, 9869 DRegister rm, 9870 const DOperand& operand) { 9871 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9872 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9873 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9874 VIXL_ASSERT(allow_macro_instructions_); 9875 VIXL_ASSERT(OutsideITBlock()); 9876 MacroEmissionCheckScope guard(this); 9877 ITScope it_scope(this, &cond); 9878 vsli(cond, dt, rd, rm, operand); 9879 } 9880 void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9881 Vsli(al, dt, rd, rm, operand); 9882 } 9883 9884 void Vsli(Condition cond, 9885 DataType dt, 9886 QRegister rd, 9887 QRegister rm, 9888 const QOperand& operand) { 9889 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9890 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9891 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9892 VIXL_ASSERT(allow_macro_instructions_); 9893 VIXL_ASSERT(OutsideITBlock()); 9894 MacroEmissionCheckScope guard(this); 9895 ITScope it_scope(this, &cond); 9896 vsli(cond, dt, rd, rm, operand); 9897 } 9898 void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9899 Vsli(al, dt, rd, rm, operand); 9900 } 9901 9902 void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) { 9903 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9904 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9905 VIXL_ASSERT(allow_macro_instructions_); 9906 VIXL_ASSERT(OutsideITBlock()); 9907 MacroEmissionCheckScope guard(this); 9908 ITScope it_scope(this, &cond); 9909 vsqrt(cond, dt, rd, rm); 9910 } 9911 void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); } 9912 9913 void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9914 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9915 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9916 VIXL_ASSERT(allow_macro_instructions_); 9917 VIXL_ASSERT(OutsideITBlock()); 9918 MacroEmissionCheckScope guard(this); 9919 ITScope it_scope(this, &cond); 9920 vsqrt(cond, dt, rd, rm); 9921 } 9922 void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); } 9923 9924 void Vsra(Condition cond, 9925 DataType dt, 9926 DRegister rd, 9927 DRegister rm, 9928 const DOperand& operand) { 9929 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9930 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9931 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9932 VIXL_ASSERT(allow_macro_instructions_); 9933 VIXL_ASSERT(OutsideITBlock()); 9934 MacroEmissionCheckScope guard(this); 9935 ITScope it_scope(this, &cond); 9936 vsra(cond, dt, rd, rm, operand); 9937 } 9938 void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9939 Vsra(al, dt, rd, rm, operand); 9940 } 9941 9942 void Vsra(Condition cond, 9943 DataType dt, 9944 QRegister rd, 9945 QRegister rm, 9946 const QOperand& operand) { 9947 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9948 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9949 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9950 VIXL_ASSERT(allow_macro_instructions_); 9951 VIXL_ASSERT(OutsideITBlock()); 9952 MacroEmissionCheckScope guard(this); 9953 ITScope it_scope(this, &cond); 9954 vsra(cond, dt, rd, rm, operand); 9955 } 9956 void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9957 Vsra(al, dt, rd, rm, operand); 9958 } 9959 9960 void Vsri(Condition cond, 9961 DataType dt, 9962 DRegister rd, 9963 DRegister rm, 9964 const DOperand& operand) { 9965 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9966 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9967 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9968 VIXL_ASSERT(allow_macro_instructions_); 9969 VIXL_ASSERT(OutsideITBlock()); 9970 MacroEmissionCheckScope guard(this); 9971 ITScope it_scope(this, &cond); 9972 vsri(cond, dt, rd, rm, operand); 9973 } 9974 void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9975 Vsri(al, dt, rd, rm, operand); 9976 } 9977 9978 void Vsri(Condition cond, 9979 DataType dt, 9980 QRegister rd, 9981 QRegister rm, 9982 const QOperand& operand) { 9983 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9984 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9985 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9986 VIXL_ASSERT(allow_macro_instructions_); 9987 VIXL_ASSERT(OutsideITBlock()); 9988 MacroEmissionCheckScope guard(this); 9989 ITScope it_scope(this, &cond); 9990 vsri(cond, dt, rd, rm, operand); 9991 } 9992 void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9993 Vsri(al, dt, rd, rm, operand); 9994 } 9995 9996 void Vst1(Condition cond, 9997 DataType dt, 9998 const NeonRegisterList& nreglist, 9999 const AlignedMemOperand& operand) { 10000 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10001 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10002 VIXL_ASSERT(allow_macro_instructions_); 10003 VIXL_ASSERT(OutsideITBlock()); 10004 MacroEmissionCheckScope guard(this); 10005 ITScope it_scope(this, &cond); 10006 vst1(cond, dt, nreglist, operand); 10007 } 10008 void Vst1(DataType dt, 10009 const NeonRegisterList& nreglist, 10010 const AlignedMemOperand& operand) { 10011 Vst1(al, dt, nreglist, operand); 10012 } 10013 10014 void Vst2(Condition cond, 10015 DataType dt, 10016 const NeonRegisterList& nreglist, 10017 const AlignedMemOperand& operand) { 10018 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10019 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10020 VIXL_ASSERT(allow_macro_instructions_); 10021 VIXL_ASSERT(OutsideITBlock()); 10022 MacroEmissionCheckScope guard(this); 10023 ITScope it_scope(this, &cond); 10024 vst2(cond, dt, nreglist, operand); 10025 } 10026 void Vst2(DataType dt, 10027 const NeonRegisterList& nreglist, 10028 const AlignedMemOperand& operand) { 10029 Vst2(al, dt, nreglist, operand); 10030 } 10031 10032 void Vst3(Condition cond, 10033 DataType dt, 10034 const NeonRegisterList& nreglist, 10035 const AlignedMemOperand& operand) { 10036 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10037 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10038 VIXL_ASSERT(allow_macro_instructions_); 10039 VIXL_ASSERT(OutsideITBlock()); 10040 MacroEmissionCheckScope guard(this); 10041 ITScope it_scope(this, &cond); 10042 vst3(cond, dt, nreglist, operand); 10043 } 10044 void Vst3(DataType dt, 10045 const NeonRegisterList& nreglist, 10046 const AlignedMemOperand& operand) { 10047 Vst3(al, dt, nreglist, operand); 10048 } 10049 10050 void Vst3(Condition cond, 10051 DataType dt, 10052 const NeonRegisterList& nreglist, 10053 const MemOperand& operand) { 10054 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10055 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10056 VIXL_ASSERT(allow_macro_instructions_); 10057 VIXL_ASSERT(OutsideITBlock()); 10058 MacroEmissionCheckScope guard(this); 10059 ITScope it_scope(this, &cond); 10060 vst3(cond, dt, nreglist, operand); 10061 } 10062 void Vst3(DataType dt, 10063 const NeonRegisterList& nreglist, 10064 const MemOperand& operand) { 10065 Vst3(al, dt, nreglist, operand); 10066 } 10067 10068 void Vst4(Condition cond, 10069 DataType dt, 10070 const NeonRegisterList& nreglist, 10071 const AlignedMemOperand& operand) { 10072 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10073 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10074 VIXL_ASSERT(allow_macro_instructions_); 10075 VIXL_ASSERT(OutsideITBlock()); 10076 MacroEmissionCheckScope guard(this); 10077 ITScope it_scope(this, &cond); 10078 vst4(cond, dt, nreglist, operand); 10079 } 10080 void Vst4(DataType dt, 10081 const NeonRegisterList& nreglist, 10082 const AlignedMemOperand& operand) { 10083 Vst4(al, dt, nreglist, operand); 10084 } 10085 10086 void Vstm(Condition cond, 10087 DataType dt, 10088 Register rn, 10089 WriteBack write_back, 10090 DRegisterList dreglist) { 10091 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10092 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 10093 VIXL_ASSERT(allow_macro_instructions_); 10094 VIXL_ASSERT(OutsideITBlock()); 10095 MacroEmissionCheckScope guard(this); 10096 ITScope it_scope(this, &cond); 10097 vstm(cond, dt, rn, write_back, dreglist); 10098 } 10099 void Vstm(DataType dt, 10100 Register rn, 10101 WriteBack write_back, 10102 DRegisterList dreglist) { 10103 Vstm(al, dt, rn, write_back, dreglist); 10104 } 10105 void Vstm(Condition cond, 10106 Register rn, 10107 WriteBack write_back, 10108 DRegisterList dreglist) { 10109 Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist); 10110 } 10111 void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) { 10112 Vstm(al, kDataTypeValueNone, rn, write_back, dreglist); 10113 } 10114 10115 void Vstm(Condition cond, 10116 DataType dt, 10117 Register rn, 10118 WriteBack write_back, 10119 SRegisterList sreglist) { 10120 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10121 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 10122 VIXL_ASSERT(allow_macro_instructions_); 10123 VIXL_ASSERT(OutsideITBlock()); 10124 MacroEmissionCheckScope guard(this); 10125 ITScope it_scope(this, &cond); 10126 vstm(cond, dt, rn, write_back, sreglist); 10127 } 10128 void Vstm(DataType dt, 10129 Register rn, 10130 WriteBack write_back, 10131 SRegisterList sreglist) { 10132 Vstm(al, dt, rn, write_back, sreglist); 10133 } 10134 void Vstm(Condition cond, 10135 Register rn, 10136 WriteBack write_back, 10137 SRegisterList sreglist) { 10138 Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist); 10139 } 10140 void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) { 10141 Vstm(al, kDataTypeValueNone, rn, write_back, sreglist); 10142 } 10143 10144 void Vstmdb(Condition cond, 10145 DataType dt, 10146 Register rn, 10147 WriteBack write_back, 10148 DRegisterList dreglist) { 10149 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10150 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 10151 VIXL_ASSERT(allow_macro_instructions_); 10152 VIXL_ASSERT(OutsideITBlock()); 10153 MacroEmissionCheckScope guard(this); 10154 ITScope it_scope(this, &cond); 10155 vstmdb(cond, dt, rn, write_back, dreglist); 10156 } 10157 void Vstmdb(DataType dt, 10158 Register rn, 10159 WriteBack write_back, 10160 DRegisterList dreglist) { 10161 Vstmdb(al, dt, rn, write_back, dreglist); 10162 } 10163 void Vstmdb(Condition cond, 10164 Register rn, 10165 WriteBack write_back, 10166 DRegisterList dreglist) { 10167 Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist); 10168 } 10169 void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) { 10170 Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist); 10171 } 10172 10173 void Vstmdb(Condition cond, 10174 DataType dt, 10175 Register rn, 10176 WriteBack write_back, 10177 SRegisterList sreglist) { 10178 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10179 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 10180 VIXL_ASSERT(allow_macro_instructions_); 10181 VIXL_ASSERT(OutsideITBlock()); 10182 MacroEmissionCheckScope guard(this); 10183 ITScope it_scope(this, &cond); 10184 vstmdb(cond, dt, rn, write_back, sreglist); 10185 } 10186 void Vstmdb(DataType dt, 10187 Register rn, 10188 WriteBack write_back, 10189 SRegisterList sreglist) { 10190 Vstmdb(al, dt, rn, write_back, sreglist); 10191 } 10192 void Vstmdb(Condition cond, 10193 Register rn, 10194 WriteBack write_back, 10195 SRegisterList sreglist) { 10196 Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist); 10197 } 10198 void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) { 10199 Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist); 10200 } 10201 10202 void Vstmia(Condition cond, 10203 DataType dt, 10204 Register rn, 10205 WriteBack write_back, 10206 DRegisterList dreglist) { 10207 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10208 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 10209 VIXL_ASSERT(allow_macro_instructions_); 10210 VIXL_ASSERT(OutsideITBlock()); 10211 MacroEmissionCheckScope guard(this); 10212 ITScope it_scope(this, &cond); 10213 vstmia(cond, dt, rn, write_back, dreglist); 10214 } 10215 void Vstmia(DataType dt, 10216 Register rn, 10217 WriteBack write_back, 10218 DRegisterList dreglist) { 10219 Vstmia(al, dt, rn, write_back, dreglist); 10220 } 10221 void Vstmia(Condition cond, 10222 Register rn, 10223 WriteBack write_back, 10224 DRegisterList dreglist) { 10225 Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist); 10226 } 10227 void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) { 10228 Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist); 10229 } 10230 10231 void Vstmia(Condition cond, 10232 DataType dt, 10233 Register rn, 10234 WriteBack write_back, 10235 SRegisterList sreglist) { 10236 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10237 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 10238 VIXL_ASSERT(allow_macro_instructions_); 10239 VIXL_ASSERT(OutsideITBlock()); 10240 MacroEmissionCheckScope guard(this); 10241 ITScope it_scope(this, &cond); 10242 vstmia(cond, dt, rn, write_back, sreglist); 10243 } 10244 void Vstmia(DataType dt, 10245 Register rn, 10246 WriteBack write_back, 10247 SRegisterList sreglist) { 10248 Vstmia(al, dt, rn, write_back, sreglist); 10249 } 10250 void Vstmia(Condition cond, 10251 Register rn, 10252 WriteBack write_back, 10253 SRegisterList sreglist) { 10254 Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist); 10255 } 10256 void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) { 10257 Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist); 10258 } 10259 10260 void Vstr(Condition cond, 10261 DataType dt, 10262 DRegister rd, 10263 const MemOperand& operand) { 10264 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10265 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10266 VIXL_ASSERT(allow_macro_instructions_); 10267 VIXL_ASSERT(OutsideITBlock()); 10268 MacroEmissionCheckScope guard(this); 10269 ITScope it_scope(this, &cond); 10270 vstr(cond, dt, rd, operand); 10271 } 10272 void Vstr(DataType dt, DRegister rd, const MemOperand& operand) { 10273 Vstr(al, dt, rd, operand); 10274 } 10275 void Vstr(Condition cond, DRegister rd, const MemOperand& operand) { 10276 Vstr(cond, Untyped64, rd, operand); 10277 } 10278 void Vstr(DRegister rd, const MemOperand& operand) { 10279 Vstr(al, Untyped64, rd, operand); 10280 } 10281 10282 void Vstr(Condition cond, 10283 DataType dt, 10284 SRegister rd, 10285 const MemOperand& operand) { 10286 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10287 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10288 VIXL_ASSERT(allow_macro_instructions_); 10289 VIXL_ASSERT(OutsideITBlock()); 10290 MacroEmissionCheckScope guard(this); 10291 ITScope it_scope(this, &cond); 10292 vstr(cond, dt, rd, operand); 10293 } 10294 void Vstr(DataType dt, SRegister rd, const MemOperand& operand) { 10295 Vstr(al, dt, rd, operand); 10296 } 10297 void Vstr(Condition cond, SRegister rd, const MemOperand& operand) { 10298 Vstr(cond, Untyped32, rd, operand); 10299 } 10300 void Vstr(SRegister rd, const MemOperand& operand) { 10301 Vstr(al, Untyped32, rd, operand); 10302 } 10303 10304 void Vsub( 10305 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10306 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10307 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10308 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10309 VIXL_ASSERT(allow_macro_instructions_); 10310 VIXL_ASSERT(OutsideITBlock()); 10311 MacroEmissionCheckScope guard(this); 10312 ITScope it_scope(this, &cond); 10313 vsub(cond, dt, rd, rn, rm); 10314 } 10315 void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10316 Vsub(al, dt, rd, rn, rm); 10317 } 10318 10319 void Vsub( 10320 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10321 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10322 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10323 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10324 VIXL_ASSERT(allow_macro_instructions_); 10325 VIXL_ASSERT(OutsideITBlock()); 10326 MacroEmissionCheckScope guard(this); 10327 ITScope it_scope(this, &cond); 10328 vsub(cond, dt, rd, rn, rm); 10329 } 10330 void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10331 Vsub(al, dt, rd, rn, rm); 10332 } 10333 10334 void Vsub( 10335 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 10336 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10337 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10338 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10339 VIXL_ASSERT(allow_macro_instructions_); 10340 VIXL_ASSERT(OutsideITBlock()); 10341 MacroEmissionCheckScope guard(this); 10342 ITScope it_scope(this, &cond); 10343 vsub(cond, dt, rd, rn, rm); 10344 } 10345 void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 10346 Vsub(al, dt, rd, rn, rm); 10347 } 10348 10349 void Vsubhn( 10350 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 10351 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10352 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10353 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10354 VIXL_ASSERT(allow_macro_instructions_); 10355 VIXL_ASSERT(OutsideITBlock()); 10356 MacroEmissionCheckScope guard(this); 10357 ITScope it_scope(this, &cond); 10358 vsubhn(cond, dt, rd, rn, rm); 10359 } 10360 void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 10361 Vsubhn(al, dt, rd, rn, rm); 10362 } 10363 10364 void Vsubl( 10365 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 10366 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10367 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10368 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10369 VIXL_ASSERT(allow_macro_instructions_); 10370 VIXL_ASSERT(OutsideITBlock()); 10371 MacroEmissionCheckScope guard(this); 10372 ITScope it_scope(this, &cond); 10373 vsubl(cond, dt, rd, rn, rm); 10374 } 10375 void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 10376 Vsubl(al, dt, rd, rn, rm); 10377 } 10378 10379 void Vsubw( 10380 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) { 10381 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10382 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10383 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10384 VIXL_ASSERT(allow_macro_instructions_); 10385 VIXL_ASSERT(OutsideITBlock()); 10386 MacroEmissionCheckScope guard(this); 10387 ITScope it_scope(this, &cond); 10388 vsubw(cond, dt, rd, rn, rm); 10389 } 10390 void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) { 10391 Vsubw(al, dt, rd, rn, rm); 10392 } 10393 10394 void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10395 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10396 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10397 VIXL_ASSERT(allow_macro_instructions_); 10398 VIXL_ASSERT(OutsideITBlock()); 10399 MacroEmissionCheckScope guard(this); 10400 ITScope it_scope(this, &cond); 10401 vswp(cond, dt, rd, rm); 10402 } 10403 void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); } 10404 void Vswp(Condition cond, DRegister rd, DRegister rm) { 10405 Vswp(cond, kDataTypeValueNone, rd, rm); 10406 } 10407 void Vswp(DRegister rd, DRegister rm) { 10408 Vswp(al, kDataTypeValueNone, rd, rm); 10409 } 10410 10411 void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10412 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10413 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10414 VIXL_ASSERT(allow_macro_instructions_); 10415 VIXL_ASSERT(OutsideITBlock()); 10416 MacroEmissionCheckScope guard(this); 10417 ITScope it_scope(this, &cond); 10418 vswp(cond, dt, rd, rm); 10419 } 10420 void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); } 10421 void Vswp(Condition cond, QRegister rd, QRegister rm) { 10422 Vswp(cond, kDataTypeValueNone, rd, rm); 10423 } 10424 void Vswp(QRegister rd, QRegister rm) { 10425 Vswp(al, kDataTypeValueNone, rd, rm); 10426 } 10427 10428 void Vtbl(Condition cond, 10429 DataType dt, 10430 DRegister rd, 10431 const NeonRegisterList& nreglist, 10432 DRegister rm) { 10433 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10434 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10435 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10436 VIXL_ASSERT(allow_macro_instructions_); 10437 VIXL_ASSERT(OutsideITBlock()); 10438 MacroEmissionCheckScope guard(this); 10439 ITScope it_scope(this, &cond); 10440 vtbl(cond, dt, rd, nreglist, rm); 10441 } 10442 void Vtbl(DataType dt, 10443 DRegister rd, 10444 const NeonRegisterList& nreglist, 10445 DRegister rm) { 10446 Vtbl(al, dt, rd, nreglist, rm); 10447 } 10448 10449 void Vtbx(Condition cond, 10450 DataType dt, 10451 DRegister rd, 10452 const NeonRegisterList& nreglist, 10453 DRegister rm) { 10454 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10455 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10456 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10457 VIXL_ASSERT(allow_macro_instructions_); 10458 VIXL_ASSERT(OutsideITBlock()); 10459 MacroEmissionCheckScope guard(this); 10460 ITScope it_scope(this, &cond); 10461 vtbx(cond, dt, rd, nreglist, rm); 10462 } 10463 void Vtbx(DataType dt, 10464 DRegister rd, 10465 const NeonRegisterList& nreglist, 10466 DRegister rm) { 10467 Vtbx(al, dt, rd, nreglist, rm); 10468 } 10469 10470 void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10471 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10472 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10473 VIXL_ASSERT(allow_macro_instructions_); 10474 VIXL_ASSERT(OutsideITBlock()); 10475 MacroEmissionCheckScope guard(this); 10476 ITScope it_scope(this, &cond); 10477 vtrn(cond, dt, rd, rm); 10478 } 10479 void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); } 10480 10481 void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10482 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10483 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10484 VIXL_ASSERT(allow_macro_instructions_); 10485 VIXL_ASSERT(OutsideITBlock()); 10486 MacroEmissionCheckScope guard(this); 10487 ITScope it_scope(this, &cond); 10488 vtrn(cond, dt, rd, rm); 10489 } 10490 void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); } 10491 10492 void Vtst( 10493 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10494 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10495 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10496 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10497 VIXL_ASSERT(allow_macro_instructions_); 10498 VIXL_ASSERT(OutsideITBlock()); 10499 MacroEmissionCheckScope guard(this); 10500 ITScope it_scope(this, &cond); 10501 vtst(cond, dt, rd, rn, rm); 10502 } 10503 void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10504 Vtst(al, dt, rd, rn, rm); 10505 } 10506 10507 void Vtst( 10508 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10509 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10510 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10511 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10512 VIXL_ASSERT(allow_macro_instructions_); 10513 VIXL_ASSERT(OutsideITBlock()); 10514 MacroEmissionCheckScope guard(this); 10515 ITScope it_scope(this, &cond); 10516 vtst(cond, dt, rd, rn, rm); 10517 } 10518 void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10519 Vtst(al, dt, rd, rn, rm); 10520 } 10521 10522 void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10523 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10524 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10525 VIXL_ASSERT(allow_macro_instructions_); 10526 VIXL_ASSERT(OutsideITBlock()); 10527 MacroEmissionCheckScope guard(this); 10528 ITScope it_scope(this, &cond); 10529 vuzp(cond, dt, rd, rm); 10530 } 10531 void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); } 10532 10533 void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10534 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10535 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10536 VIXL_ASSERT(allow_macro_instructions_); 10537 VIXL_ASSERT(OutsideITBlock()); 10538 MacroEmissionCheckScope guard(this); 10539 ITScope it_scope(this, &cond); 10540 vuzp(cond, dt, rd, rm); 10541 } 10542 void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); } 10543 10544 void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10545 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10546 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10547 VIXL_ASSERT(allow_macro_instructions_); 10548 VIXL_ASSERT(OutsideITBlock()); 10549 MacroEmissionCheckScope guard(this); 10550 ITScope it_scope(this, &cond); 10551 vzip(cond, dt, rd, rm); 10552 } 10553 void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); } 10554 10555 void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10556 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10557 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10558 VIXL_ASSERT(allow_macro_instructions_); 10559 VIXL_ASSERT(OutsideITBlock()); 10560 MacroEmissionCheckScope guard(this); 10561 ITScope it_scope(this, &cond); 10562 vzip(cond, dt, rd, rm); 10563 } 10564 void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); } 10565 10566 void Yield(Condition cond) { 10567 VIXL_ASSERT(allow_macro_instructions_); 10568 VIXL_ASSERT(OutsideITBlock()); 10569 MacroEmissionCheckScope guard(this); 10570 ITScope it_scope(this, &cond); 10571 yield(cond); 10572 } 10573 void Yield() { Yield(al); } 10574 void Vabs(Condition cond, VRegister rd, VRegister rm) { 10575 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10576 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10577 if (rd.IsS()) { 10578 Vabs(cond, F32, rd.S(), rm.S()); 10579 } else { 10580 Vabs(cond, F64, rd.D(), rm.D()); 10581 } 10582 } 10583 void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); } 10584 void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10585 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10586 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10587 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10588 if (rd.IsS()) { 10589 Vadd(cond, F32, rd.S(), rn.S(), rm.S()); 10590 } else { 10591 Vadd(cond, F64, rd.D(), rn.D(), rm.D()); 10592 } 10593 } 10594 void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); } 10595 void Vcmp(Condition cond, VRegister rd, VRegister rm) { 10596 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10597 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10598 if (rd.IsS()) { 10599 Vcmp(cond, F32, rd.S(), rm.S()); 10600 } else { 10601 Vcmp(cond, F64, rd.D(), rm.D()); 10602 } 10603 } 10604 void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); } 10605 void Vcmpe(Condition cond, VRegister rd, VRegister rm) { 10606 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10607 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10608 if (rd.IsS()) { 10609 Vcmpe(cond, F32, rd.S(), rm.S()); 10610 } else { 10611 Vcmpe(cond, F64, rd.D(), rm.D()); 10612 } 10613 } 10614 void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); } 10615 void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10616 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10617 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10618 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10619 if (rd.IsS()) { 10620 Vdiv(cond, F32, rd.S(), rn.S(), rm.S()); 10621 } else { 10622 Vdiv(cond, F64, rd.D(), rn.D(), rm.D()); 10623 } 10624 } 10625 void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); } 10626 void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10627 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10628 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10629 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10630 if (rd.IsS()) { 10631 Vfma(cond, F32, rd.S(), rn.S(), rm.S()); 10632 } else { 10633 Vfma(cond, F64, rd.D(), rn.D(), rm.D()); 10634 } 10635 } 10636 void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); } 10637 void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10638 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10639 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10640 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10641 if (rd.IsS()) { 10642 Vfms(cond, F32, rd.S(), rn.S(), rm.S()); 10643 } else { 10644 Vfms(cond, F64, rd.D(), rn.D(), rm.D()); 10645 } 10646 } 10647 void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); } 10648 void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10649 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10650 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10651 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10652 if (rd.IsS()) { 10653 Vfnma(cond, F32, rd.S(), rn.S(), rm.S()); 10654 } else { 10655 Vfnma(cond, F64, rd.D(), rn.D(), rm.D()); 10656 } 10657 } 10658 void Vfnma(VRegister rd, VRegister rn, VRegister rm) { 10659 Vfnma(al, rd, rn, rm); 10660 } 10661 void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10662 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10663 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10664 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10665 if (rd.IsS()) { 10666 Vfnms(cond, F32, rd.S(), rn.S(), rm.S()); 10667 } else { 10668 Vfnms(cond, F64, rd.D(), rn.D(), rm.D()); 10669 } 10670 } 10671 void Vfnms(VRegister rd, VRegister rn, VRegister rm) { 10672 Vfnms(al, rd, rn, rm); 10673 } 10674 void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) { 10675 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10676 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10677 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10678 if (rd.IsS()) { 10679 Vmaxnm(F32, rd.S(), rn.S(), rm.S()); 10680 } else { 10681 Vmaxnm(F64, rd.D(), rn.D(), rm.D()); 10682 } 10683 } 10684 void Vminnm(VRegister rd, VRegister rn, VRegister rm) { 10685 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10686 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10687 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10688 if (rd.IsS()) { 10689 Vminnm(F32, rd.S(), rn.S(), rm.S()); 10690 } else { 10691 Vminnm(F64, rd.D(), rn.D(), rm.D()); 10692 } 10693 } 10694 void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10695 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10696 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10697 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10698 if (rd.IsS()) { 10699 Vmla(cond, F32, rd.S(), rn.S(), rm.S()); 10700 } else { 10701 Vmla(cond, F64, rd.D(), rn.D(), rm.D()); 10702 } 10703 } 10704 void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); } 10705 void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10706 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10707 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10708 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10709 if (rd.IsS()) { 10710 Vmls(cond, F32, rd.S(), rn.S(), rm.S()); 10711 } else { 10712 Vmls(cond, F64, rd.D(), rn.D(), rm.D()); 10713 } 10714 } 10715 void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); } 10716 void Vmov(Condition cond, VRegister rd, VRegister rm) { 10717 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10718 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10719 if (rd.IsS()) { 10720 Vmov(cond, F32, rd.S(), rm.S()); 10721 } else { 10722 Vmov(cond, F64, rd.D(), rm.D()); 10723 } 10724 } 10725 void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); } 10726 void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10727 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10728 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10729 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10730 if (rd.IsS()) { 10731 Vmul(cond, F32, rd.S(), rn.S(), rm.S()); 10732 } else { 10733 Vmul(cond, F64, rd.D(), rn.D(), rm.D()); 10734 } 10735 } 10736 void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); } 10737 void Vneg(Condition cond, VRegister rd, VRegister rm) { 10738 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10739 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10740 if (rd.IsS()) { 10741 Vneg(cond, F32, rd.S(), rm.S()); 10742 } else { 10743 Vneg(cond, F64, rd.D(), rm.D()); 10744 } 10745 } 10746 void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); } 10747 void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10748 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10749 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10750 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10751 if (rd.IsS()) { 10752 Vnmla(cond, F32, rd.S(), rn.S(), rm.S()); 10753 } else { 10754 Vnmla(cond, F64, rd.D(), rn.D(), rm.D()); 10755 } 10756 } 10757 void Vnmla(VRegister rd, VRegister rn, VRegister rm) { 10758 Vnmla(al, rd, rn, rm); 10759 } 10760 void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10761 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10762 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10763 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10764 if (rd.IsS()) { 10765 Vnmls(cond, F32, rd.S(), rn.S(), rm.S()); 10766 } else { 10767 Vnmls(cond, F64, rd.D(), rn.D(), rm.D()); 10768 } 10769 } 10770 void Vnmls(VRegister rd, VRegister rn, VRegister rm) { 10771 Vnmls(al, rd, rn, rm); 10772 } 10773 void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10774 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10775 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10776 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10777 if (rd.IsS()) { 10778 Vnmul(cond, F32, rd.S(), rn.S(), rm.S()); 10779 } else { 10780 Vnmul(cond, F64, rd.D(), rn.D(), rm.D()); 10781 } 10782 } 10783 void Vnmul(VRegister rd, VRegister rn, VRegister rm) { 10784 Vnmul(al, rd, rn, rm); 10785 } 10786 void Vseleq(VRegister rd, VRegister rn, VRegister rm) { 10787 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10788 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10789 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10790 if (rd.IsS()) { 10791 Vseleq(F32, rd.S(), rn.S(), rm.S()); 10792 } else { 10793 Vseleq(F64, rd.D(), rn.D(), rm.D()); 10794 } 10795 } 10796 void Vselge(VRegister rd, VRegister rn, VRegister rm) { 10797 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10798 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10799 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10800 if (rd.IsS()) { 10801 Vselge(F32, rd.S(), rn.S(), rm.S()); 10802 } else { 10803 Vselge(F64, rd.D(), rn.D(), rm.D()); 10804 } 10805 } 10806 void Vselgt(VRegister rd, VRegister rn, VRegister rm) { 10807 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10808 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10809 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10810 if (rd.IsS()) { 10811 Vselgt(F32, rd.S(), rn.S(), rm.S()); 10812 } else { 10813 Vselgt(F64, rd.D(), rn.D(), rm.D()); 10814 } 10815 } 10816 void Vselvs(VRegister rd, VRegister rn, VRegister rm) { 10817 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10818 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10819 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10820 if (rd.IsS()) { 10821 Vselvs(F32, rd.S(), rn.S(), rm.S()); 10822 } else { 10823 Vselvs(F64, rd.D(), rn.D(), rm.D()); 10824 } 10825 } 10826 void Vsqrt(Condition cond, VRegister rd, VRegister rm) { 10827 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10828 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10829 if (rd.IsS()) { 10830 Vsqrt(cond, F32, rd.S(), rm.S()); 10831 } else { 10832 Vsqrt(cond, F64, rd.D(), rm.D()); 10833 } 10834 } 10835 void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); } 10836 void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10837 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10838 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10839 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10840 if (rd.IsS()) { 10841 Vsub(cond, F32, rd.S(), rn.S(), rm.S()); 10842 } else { 10843 Vsub(cond, F64, rd.D(), rn.D(), rm.D()); 10844 } 10845 } 10846 void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); } 10847 // End of generated code. 10848 10849 virtual bool AllowUnpredictable() VIXL_OVERRIDE { 10850 VIXL_ABORT_WITH_MSG("Unpredictable instruction.\n"); 10851 return false; 10852 } 10853 virtual bool AllowStronglyDiscouraged() VIXL_OVERRIDE { 10854 VIXL_ABORT_WITH_MSG( 10855 "ARM strongly recommends to not use this instruction.\n"); 10856 return false; 10857 } 10858 10859 private: 10860 RegisterList available_; 10861 VRegisterList available_vfp_; 10862 MacroAssemblerContext context_; 10863 Label::Offset checkpoint_; 10864 LiteralPoolManager literal_pool_manager_; 10865 VeneerPoolManager veneer_pool_manager_; 10866 bool generate_simulator_code_; 10867 bool allow_macro_instructions_; 10868 bool doing_veneer_pool_generation_; 10869}; 10870 10871// This scope utility allows scratch registers to be managed safely. The 10872// MacroAssembler's GetScratchRegisterList() is used as a pool of scratch 10873// registers. These registers can be allocated on demand, and will be returned 10874// at the end of the scope. 10875// 10876// When the scope ends, the MacroAssembler's lists will be restored to their 10877// original state, even if the lists were modified by some other means. 10878class UseScratchRegisterScope { 10879 public: 10880 // This constructor implicitly calls the `Open` function to initialise the 10881 // scope, so it is ready to use immediately after it has been constructed. 10882 explicit UseScratchRegisterScope(MacroAssembler* masm) 10883 : available_(NULL), 10884 available_vfp_(NULL), 10885 old_available_(0), 10886 old_available_vfp_(0) { 10887 Open(masm); 10888 } 10889 // This constructor allows deferred and optional initialisation of the scope. 10890 // The user is required to explicitly call the `Open` function before using 10891 // the scope. 10892 UseScratchRegisterScope() 10893 : available_(NULL), 10894 available_vfp_(NULL), 10895 old_available_(0), 10896 old_available_vfp_(0) {} 10897 10898 // This function performs the actual initialisation work. 10899 void Open(MacroAssembler* masm); 10900 10901 // The destructor always implicitly calls the `Close` function. 10902 ~UseScratchRegisterScope() { Close(); } 10903 10904 // This function performs the cleaning-up work. It must succeed even if the 10905 // scope has not been opened. It is safe to call multiple times. 10906 void Close(); 10907 10908 bool IsAvailable(const Register& reg) const; 10909 bool IsAvailable(const VRegister& reg) const; 10910 10911 // Take a register from the temp list. It will be returned automatically when 10912 // the scope ends. 10913 Register Acquire(); 10914 VRegister AcquireV(unsigned size_in_bits); 10915 QRegister AcquireQ(); 10916 DRegister AcquireD(); 10917 SRegister AcquireS(); 10918 10919 // Explicitly release an acquired (or excluded) register, putting it back in 10920 // the temp list. 10921 void Release(const Register& reg); 10922 void Release(const VRegister& reg); 10923 10924 // Make the specified registers available as scratch registers for the 10925 // duration of this scope. 10926 void Include(const RegisterList& list); 10927 void Include(const Register& reg1, 10928 const Register& reg2 = NoReg, 10929 const Register& reg3 = NoReg, 10930 const Register& reg4 = NoReg) { 10931 Include(RegisterList(reg1, reg2, reg3, reg4)); 10932 } 10933 void Include(const VRegisterList& list); 10934 void Include(const VRegister& reg1, 10935 const VRegister& reg2 = NoVReg, 10936 const VRegister& reg3 = NoVReg, 10937 const VRegister& reg4 = NoVReg) { 10938 Include(VRegisterList(reg1, reg2, reg3, reg4)); 10939 } 10940 10941 // Make sure that the specified registers are not available in this scope. 10942 // This can be used to prevent helper functions from using sensitive 10943 // registers, for example. 10944 void Exclude(const RegisterList& list); 10945 void Exclude(const Register& reg1, 10946 const Register& reg2 = NoReg, 10947 const Register& reg3 = NoReg, 10948 const Register& reg4 = NoReg) { 10949 Exclude(RegisterList(reg1, reg2, reg3, reg4)); 10950 } 10951 void Exclude(const VRegisterList& list); 10952 void Exclude(const VRegister& reg1, 10953 const VRegister& reg2 = NoVReg, 10954 const VRegister& reg3 = NoVReg, 10955 const VRegister& reg4 = NoVReg) { 10956 Exclude(VRegisterList(reg1, reg2, reg3, reg4)); 10957 } 10958 10959 // A convenience helper to exclude any registers used by the operand. 10960 void Exclude(const Operand& operand); 10961 10962 // Prevent any scratch registers from being used in this scope. 10963 void ExcludeAll(); 10964 10965 private: 10966 // Available scratch registers. 10967 RegisterList* available_; // kRRegister 10968 VRegisterList* available_vfp_; // kVRegister 10969 10970 // The state of the available lists at the start of this scope. 10971 uint32_t old_available_; // kRRegister 10972 uint64_t old_available_vfp_; // kVRegister 10973 10974 VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) { 10975 VIXL_UNREACHABLE(); 10976 } 10977 VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) { 10978 VIXL_UNREACHABLE(); 10979 } 10980}; 10981 10982class JumpTableBase { 10983 protected: 10984 JumpTableBase(int len, int offset_size) 10985 : table_location_(Label::kMaxOffset), 10986 branch_location_(Label::kMaxOffset), 10987 length_(len), 10988 offset_shift_(WhichPowerOf2(offset_size)), 10989 presence_(length_) { 10990 VIXL_ASSERT((length_ >= 0) && (offset_size <= 4)); 10991 } 10992 virtual ~JumpTableBase() {} 10993 10994 public: 10995 int GetTableSizeInBytes() const { return length_ * (1 << offset_shift_); } 10996 int GetOffsetShift() const { return offset_shift_; } 10997 int GetLength() const { return length_; } 10998 Label* GetDefaultLabel() { return &default_; } 10999 Label* GetEndLabel() { return &end_; } 11000 void SetBranchLocation(uint32_t branch_location) { 11001 branch_location_ = branch_location; 11002 } 11003 uint32_t GetBranchLocation() const { return branch_location_; } 11004 void BindTable(uint32_t location) { table_location_ = location; } 11005 virtual void Link(MacroAssembler* masm, 11006 int case_index, 11007 uint32_t location) = 0; 11008 11009 uint32_t GetLocationForCase(int i) { 11010 VIXL_ASSERT((i >= 0) && (i < length_)); 11011 return table_location_ + (i * (1 << offset_shift_)); 11012 } 11013 void SetPresenceBitForCase(int i) { 11014 VIXL_ASSERT((i >= 0) && (i < length_)); 11015 presence_.Set(i); 11016 } 11017 11018 void Finalize(MacroAssembler* masm) { 11019 if (!default_.IsBound()) { 11020 masm->Bind(&default_); 11021 } 11022 masm->Bind(&end_); 11023 11024 presence_.ForEachBitNotSet(LinkIt(this, masm, default_.GetLocation())); 11025 } 11026 11027 private: 11028 uint32_t table_location_; 11029 uint32_t branch_location_; 11030 const int length_; 11031 const int offset_shift_; 11032 BitField presence_; 11033 Label default_; 11034 Label end_; 11035 struct LinkIt { 11036 JumpTableBase* table_; 11037 MacroAssembler* const masm_; 11038 const uint32_t location_; 11039 LinkIt(JumpTableBase* table, MacroAssembler* const masm, uint32_t location) 11040 : table_(table), masm_(masm), location_(location) {} 11041 bool execute(int id) const { 11042 VIXL_ASSERT(id < table_->GetLength()); 11043 table_->Link(masm_, static_cast<int>(id), location_); 11044 return true; 11045 } 11046 }; 11047}; 11048 11049// JumpTable<T>(len): Helper to describe a jump table 11050// len here describes the number of possible case. Values in [0, n[ can have a 11051// jump offset. Any other value will assert. 11052template <typename T> 11053class JumpTable : public JumpTableBase { 11054 protected: 11055 explicit JumpTable(int length) : JumpTableBase(length, sizeof(T)) {} 11056 11057 public: 11058 virtual void Link(MacroAssembler* masm, 11059 int case_index, 11060 uint32_t location) VIXL_OVERRIDE { 11061 uint32_t position_in_table = GetLocationForCase(case_index); 11062 uint32_t from = GetBranchLocation(); 11063 int offset = location - from; 11064 T* case_offset = masm->GetBuffer()->GetOffsetAddress<T*>(position_in_table); 11065 if (masm->IsUsingT32()) { 11066 *case_offset = offset >> 1; 11067 } else { 11068 *case_offset = offset >> 2; 11069 } 11070 } 11071}; 11072 11073class JumpTable8bitOffset : public JumpTable<uint8_t> { 11074 public: 11075 explicit JumpTable8bitOffset(int length) : JumpTable<uint8_t>(length) {} 11076}; 11077 11078class JumpTable16bitOffset : public JumpTable<uint16_t> { 11079 public: 11080 explicit JumpTable16bitOffset(int length) : JumpTable<uint16_t>(length) {} 11081}; 11082 11083class JumpTable32bitOffset : public JumpTable<uint32_t> { 11084 public: 11085 explicit JumpTable32bitOffset(int length) : JumpTable<uint32_t>(length) {} 11086}; 11087 11088} // namespace aarch32 11089} // namespace vixl 11090 11091#endif // VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_ 11092