macro-assembler-aarch32.h revision 50e45c514c11300c91b370c251235a9a77bdaf5f 
1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
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5// modification, are permitted provided that the following conditions are met:
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15//
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27
28#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
29#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
30
31#include "code-generation-scopes-vixl.h"
32#include "macro-assembler-interface.h"
33#include "utils-vixl.h"
34
35#include "aarch32/instructions-aarch32.h"
36#include "aarch32/assembler-aarch32.h"
37#include "aarch32/operands-aarch32.h"
38
39namespace vixl {
40namespace aarch32 {
41
42class JumpTableBase;
43
44enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 };
45
46// LiteralPool class, defined as a container for literals
47class LiteralPool {
48 public:
49  typedef std::list<RawLiteral*>::iterator RawLiteralListIterator;
50
51 public:
52  LiteralPool() : size_(0) {}
53  ~LiteralPool() {
54    VIXL_ASSERT(literals_.empty() && (size_ == 0));
55    for (RawLiteralListIterator literal_it = keep_until_delete_.begin();
56         literal_it != keep_until_delete_.end();
57         literal_it++) {
58      delete *literal_it;
59    }
60    keep_until_delete_.clear();
61  }
62
63  unsigned GetSize() const { return size_; }
64
65  // Add a literal to the literal container.
66  void AddLiteral(RawLiteral* literal) {
67    // Manually placed literals can't be added to a literal pool.
68    VIXL_ASSERT(!literal->IsManuallyPlaced());
69    VIXL_ASSERT(!literal->IsBound());
70    if (literal->GetPositionInPool() == Label::kMaxOffset) {
71      uint32_t position = GetSize();
72      literal->SetPositionInPool(position);
73      literals_.push_back(literal);
74      size_ += literal->GetAlignedSize();
75    }
76  }
77
78  // First literal to be emitted.
79  RawLiteralListIterator GetFirst() { return literals_.begin(); }
80
81  // Mark the end of the literal container.
82  RawLiteralListIterator GetEnd() { return literals_.end(); }
83
84  // Remove all the literals from the container.
85  // If the literal's memory management has been delegated to the container
86  // it will be delete'd.
87  void Clear() {
88    for (RawLiteralListIterator literal_it = GetFirst(); literal_it != GetEnd();
89         literal_it++) {
90      RawLiteral* literal = *literal_it;
91      switch (literal->GetDeletionPolicy()) {
92        case RawLiteral::kDeletedOnPlacementByPool:
93          delete literal;
94          break;
95        case RawLiteral::kDeletedOnPoolDestruction:
96          keep_until_delete_.push_back(literal);
97          break;
98        case RawLiteral::kManuallyDeleted:
99          break;
100      }
101    }
102    literals_.clear();
103    size_ = 0;
104  }
105
106 private:
107  // Size (in bytes and including alignments) of the literal pool.
108  unsigned size_;
109
110  // Literal container.
111  std::list<RawLiteral*> literals_;
112  // Already bound Literal container the app requested this pool to keep.
113  std::list<RawLiteral*> keep_until_delete_;
114};
115
116
117// Macro assembler for aarch32 instruction set.
118class MacroAssembler : public Assembler, public MacroAssemblerInterface {
119 public:
120  enum EmitOption { kBranchRequired, kNoBranchRequired };
121
122  virtual internal::AssemblerBase* AsAssemblerBase() VIXL_OVERRIDE {
123    return this;
124  }
125
126  virtual void BlockPools() VIXL_OVERRIDE {
127    literal_pool_manager_.Block();
128    veneer_pool_manager_.Block();
129  }
130  virtual void ReleasePools() VIXL_OVERRIDE {
131    literal_pool_manager_.Release();
132    veneer_pool_manager_.Release();
133  }
134  virtual void EnsureEmitPoolsFor(size_t size) VIXL_OVERRIDE {
135    // TODO: Optimise this. It also checks that there is space in the buffer,
136    // which we do not need to do here.
137    VIXL_ASSERT(IsUint32(size));
138    EnsureEmitFor(static_cast<uint32_t>(size));
139  }
140
141 private:
142  class MacroEmissionCheckScope : public EmissionCheckScope {
143   public:
144    explicit MacroEmissionCheckScope(MacroAssemblerInterface* masm)
145        : EmissionCheckScope(masm, kTypicalMacroInstructionMaxSize) {}
146
147   private:
148    static const size_t kTypicalMacroInstructionMaxSize =
149        8 * kMaxInstructionSizeInBytes;
150  };
151
152  class MacroAssemblerContext {
153   public:
154    MacroAssemblerContext() : count_(0) {}
155    ~MacroAssemblerContext() {}
156    unsigned GetRecursiveCount() const { return count_; }
157    void Up(const char* loc) {
158      location_stack_[count_] = loc;
159      count_++;
160      if (count_ >= kMaxRecursion) {
161        printf(
162            "Recursion limit reached; unable to resolve macro assembler "
163            "call.\n");
164        printf("Macro assembler context stack:\n");
165        for (unsigned i = 0; i < kMaxRecursion; i++) {
166          printf("%10s %s\n", (i == 0) ? "oldest -> " : "", location_stack_[i]);
167        }
168        VIXL_ABORT();
169      }
170    }
171    void Down() {
172      VIXL_ASSERT((count_ > 0) && (count_ < kMaxRecursion));
173      count_--;
174    }
175
176   private:
177    unsigned count_;
178    static const uint32_t kMaxRecursion = 6;
179    const char* location_stack_[kMaxRecursion];
180  };
181
182  // This scope is used at each Delegate entry to avoid infinite recursion of
183  // Delegate calls. The limit is defined by
184  // MacroAssemblerContext::kMaxRecursion.
185  class ContextScope {
186   public:
187    explicit ContextScope(MacroAssembler* const masm, const char* loc)
188        : masm_(masm) {
189      VIXL_ASSERT(masm_->AllowMacroInstructions());
190      masm_->GetContext()->Up(loc);
191    }
192    ~ContextScope() { masm_->GetContext()->Down(); }
193
194   private:
195    MacroAssembler* const masm_;
196  };
197
198  MacroAssemblerContext* GetContext() { return &context_; }
199
200  class ITScope {
201   public:
202    ITScope(MacroAssembler* masm, Condition* cond, bool can_use_it = false)
203        : masm_(masm), cond_(*cond), can_use_it_(can_use_it) {
204      if (!cond_.Is(al) && masm->IsUsingT32()) {
205        if (can_use_it_) {
206          // IT is not deprecated (that implies a 16 bit T32 instruction).
207          // We generate an IT instruction and a conditional instruction.
208          masm->it(cond_);
209        } else {
210          // The usage of IT is deprecated for the instruction.
211          // We generate a conditional branch and an unconditional instruction.
212          // TODO: Use a scope utility with a size check. To do that, we'd need
213          // one with Open() and Close() implemented.
214          masm_->EnsureEmitFor(kMaxT32MacroInstructionSizeInBytes);
215          // Generate the branch.
216          masm_->b(cond_.Negate(), Narrow, &label_);
217          // Tell the macro-assembler to generate unconditional instructions.
218          *cond = al;
219        }
220      }
221#ifdef VIXL_DEBUG
222      initial_cursor_offset_ = masm->GetCursorOffset();
223#else
224      USE(initial_cursor_offset_);
225#endif
226    }
227    ~ITScope() {
228      if (label_.IsReferenced()) {
229        // We only use the label for conditional T32 instructions for which we
230        // cannot use IT.
231        VIXL_ASSERT(!cond_.Is(al));
232        VIXL_ASSERT(masm_->IsUsingT32());
233        VIXL_ASSERT(!can_use_it_);
234        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
235                    kMaxT32MacroInstructionSizeInBytes);
236        masm_->BindHelper(&label_);
237      } else if (masm_->IsUsingT32() && !cond_.Is(al)) {
238        // If we've generated a conditional T32 instruction but haven't used the
239        // label, we must have used IT. Check that we did not generate a
240        // deprecated sequence.
241        VIXL_ASSERT(can_use_it_);
242        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
243                    k16BitT32InstructionSizeInBytes);
244      }
245    }
246
247   private:
248    MacroAssembler* masm_;
249    Condition cond_;
250    Label label_;
251    bool can_use_it_;
252    uint32_t initial_cursor_offset_;
253  };
254
255  template <Assembler::InstructionCondDtDL asmfn>
256  class EmitLiteralCondDtDL {
257   public:
258    EmitLiteralCondDtDL(Condition cond, DataType dt, DRegister rt)
259        : cond_(cond), dt_(dt), rt_(rt) {}
260    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
261      (masm->*asmfn)(cond_, dt_, rt_, literal);
262    }
263
264   private:
265    Condition cond_;
266    DataType dt_;
267    DRegister rt_;
268  };
269
270  template <Assembler::InstructionCondDtSL asmfn>
271  class EmitLiteralCondDtSL {
272   public:
273    EmitLiteralCondDtSL(Condition cond, DataType dt, SRegister rt)
274        : cond_(cond), dt_(dt), rt_(rt) {}
275    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
276      (masm->*asmfn)(cond_, dt_, rt_, literal);
277    }
278
279   private:
280    Condition cond_;
281    DataType dt_;
282    SRegister rt_;
283  };
284
285  template <Assembler::InstructionCondRL asmfn>
286  class EmitLiteralCondRL {
287   public:
288    EmitLiteralCondRL(Condition cond, Register rt) : cond_(cond), rt_(rt) {}
289    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
290      (masm->*asmfn)(cond_, rt_, literal);
291    }
292
293   private:
294    Condition cond_;
295    Register rt_;
296  };
297
298  template <Assembler::InstructionCondRRL asmfn>
299  class EmitLiteralCondRRL {
300   public:
301    EmitLiteralCondRRL(Condition cond, Register rt, Register rt2)
302        : cond_(cond), rt_(rt), rt2_(rt2) {}
303    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
304      (masm->*asmfn)(cond_, rt_, rt2_, literal);
305    }
306
307   private:
308    Condition cond_;
309    Register rt_, rt2_;
310  };
311
312  class LiteralPoolManager {
313   public:
314    explicit LiteralPoolManager(MacroAssembler* const masm)
315        : masm_(masm), monitor_(0) {
316      ResetCheckpoint();
317    }
318
319    void ResetCheckpoint() { checkpoint_ = Label::kMaxOffset; }
320
321    LiteralPool* GetLiteralPool() { return &literal_pool_; }
322    Label::Offset GetCheckpoint() const {
323      // Make room for a branch over the pools.
324      return checkpoint_ - kMaxInstructionSizeInBytes;
325    }
326    size_t GetLiteralPoolSize() const { return literal_pool_.GetSize(); }
327
328    // Checks if the insertion of the literal will put the forward reference
329    // too far in the literal pool.
330    // This function is called after generating an instruction with a literal.
331    // We want to know if the literal can be reached by the instruction.
332    // If not, we will unwind the instruction, generate the pool (without the
333    // last literal) and generate the instruction again.
334    // "literal" is the literal we want to insert into the pool.
335    // "from" is the location where the instruction which uses the literal has
336    // been generated.
337    bool IsInsertTooFar(RawLiteral* literal, uint32_t from) const {
338      // Last accessible location for the instruction which uses the literal.
339      uint32_t checkpoint = from + literal->GetLastInsertForwardDistance();
340      checkpoint =
341          std::min(checkpoint, static_cast<uint32_t>(literal->GetCheckpoint()));
342      // Compare the checkpoint to the location where the literal should be
343      // added.
344      // We add space for two instructions: one branch and one potential veneer
345      // which may be added after the check. In this particular use case, no
346      // veneer can be added but, this way, we are consistent with all the
347      // literal pool checks.
348      bool too_far =
349          AlignDown(checkpoint, 4) <
350          from + literal_pool_.GetSize() + 2 * kMaxInstructionSizeInBytes;
351      return too_far;
352    }
353
354    // Set the different checkpoints where the literal pool has to be emited.
355    void UpdateCheckpoint(RawLiteral* literal) {
356      // The literal should have been placed somewhere in the literal pool
357      VIXL_ASSERT(literal->GetPositionInPool() != Label::kMaxOffset);
358      // TODO(all): Consider AddForwardRef as a  virtual so the checkpoint is
359      //   updated when inserted. Or move checkpoint_ into Label,
360      literal->UpdateCheckpoint();
361      Label::Offset tmp =
362          literal->GetAlignedCheckpoint(4) - literal->GetPositionInPool();
363      if (checkpoint_ > tmp) {
364        checkpoint_ = tmp;
365        masm_->ComputeCheckpoint();
366      }
367    }
368
369    bool IsEmpty() const { return GetLiteralPoolSize() == 0; }
370
371    void Block() { monitor_++; }
372    void Release() {
373      VIXL_ASSERT(IsBlocked());
374      if (--monitor_ == 0) {
375        // Ensure the pool has not been blocked for too long.
376        VIXL_ASSERT(masm_->GetCursorOffset() <= checkpoint_);
377      }
378    }
379    bool IsBlocked() const { return monitor_ != 0; }
380
381   private:
382    MacroAssembler* const masm_;
383    LiteralPool literal_pool_;
384
385    // Max offset in the code buffer where the literal needs to be
386    // emitted. A default value of Label::kMaxOffset means that the checkpoint
387    // is invalid.
388    Label::Offset checkpoint_;
389    // Indicates whether the emission of this pool is blocked.
390    int monitor_;
391  };
392
393  void PerformEnsureEmit(Label::Offset target, uint32_t extra_size);
394
395 protected:
396  void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm);
397  void PadToMinimumBranchRange(Label* label);
398
399  // Generate the instruction and if it's not possible revert the whole thing.
400  // emit the literal pool and regenerate the instruction.
401  // Note: The instruction is generated via
402  // void T::emit(MacroAssembler* const, RawLiteral* const)
403  template <typename T>
404  void GenerateInstruction(T instr_callback, RawLiteral* const literal) {
405    int32_t cursor = GetCursorOffset();
406    uint32_t where = cursor + GetArchitectureStatePCOffset();
407    // Emit the instruction, via the assembler
408    {
409      MacroEmissionCheckScope guard(this);
410      instr_callback.emit(this, literal);
411    }
412    if (!literal->IsManuallyPlaced() && !literal->IsBound()) {
413      if (IsInsertTooFar(literal, where)) {
414        // The instruction's data is too far: revert the emission
415        GetBuffer()->Rewind(cursor);
416        literal->InvalidateLastForwardReference(RawLiteral::kNoUpdateNecessary);
417        EmitLiteralPool(kBranchRequired);
418        MacroEmissionCheckScope guard(this);
419        instr_callback.emit(this, literal);
420      }
421      // The literal pool above might have included the literal - in which
422      // case it will now be bound.
423      if (!literal->IsBound()) {
424        literal_pool_manager_.GetLiteralPool()->AddLiteral(literal);
425        literal_pool_manager_.UpdateCheckpoint(literal);
426      }
427    }
428  }
429
430 public:
431  explicit MacroAssembler(InstructionSet isa = A32)
432      : Assembler(isa),
433        available_(r12),
434        checkpoint_(Label::kMaxOffset),
435        literal_pool_manager_(this),
436        veneer_pool_manager_(this),
437        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
438        doing_veneer_pool_generation_(false) {
439#ifdef VIXL_DEBUG
440    SetAllowMacroInstructions(true);
441#else
442    USE(literal_pool_manager_);
443    USE(allow_macro_instructions_);
444#endif
445    ComputeCheckpoint();
446  }
447  explicit MacroAssembler(size_t size, InstructionSet isa = A32)
448      : Assembler(size, isa),
449        available_(r12),
450        checkpoint_(Label::kMaxOffset),
451        literal_pool_manager_(this),
452        veneer_pool_manager_(this),
453        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
454        doing_veneer_pool_generation_(false) {
455#ifdef VIXL_DEBUG
456    SetAllowMacroInstructions(true);
457#endif
458    ComputeCheckpoint();
459  }
460  MacroAssembler(byte* buffer, size_t size, InstructionSet isa = A32)
461      : Assembler(buffer, size, isa),
462        available_(r12),
463        checkpoint_(Label::kMaxOffset),
464        literal_pool_manager_(this),
465        veneer_pool_manager_(this),
466        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
467        doing_veneer_pool_generation_(false) {
468#ifdef VIXL_DEBUG
469    SetAllowMacroInstructions(true);
470#endif
471    ComputeCheckpoint();
472  }
473
474  bool GenerateSimulatorCode() const { return generate_simulator_code_; }
475
476  // Tell whether any of the macro instruction can be used. When false the
477  // MacroAssembler will assert if a method which can emit a variable number
478  // of instructions is called.
479  virtual void SetAllowMacroInstructions(bool value) VIXL_OVERRIDE {
480    allow_macro_instructions_ = value;
481  }
482  virtual bool AllowMacroInstructions() const VIXL_OVERRIDE {
483    return allow_macro_instructions_;
484  }
485
486  void FinalizeCode() {
487    EmitLiteralPool(kNoBranchRequired);
488    Assembler::FinalizeCode();
489  }
490
491  RegisterList* GetScratchRegisterList() { return &available_; }
492  VRegisterList* GetScratchVRegisterList() { return &available_vfp_; }
493
494  // Given an address calculation (Register + immediate), generate code to
495  // partially compute the address. The returned MemOperand will perform any
496  // remaining computation in a subsequent load or store instruction.
497  //
498  // The offset provided should be the offset that would be used in a load or
499  // store instruction (if it had sufficient range). This only matters where
500  // base.Is(pc), since load and store instructions align the pc before
501  // dereferencing it.
502  //
503  // TODO: Improve the handling of negative offsets. They are not implemented
504  // precisely for now because they only have a marginal benefit for the
505  // existing uses (in delegates).
506  MemOperand MemOperandComputationHelper(Condition cond,
507                                         Register scratch,
508                                         Register base,
509                                         uint32_t offset,
510                                         uint32_t extra_offset_mask = 0);
511
512  MemOperand MemOperandComputationHelper(Register scratch,
513                                         Register base,
514                                         uint32_t offset,
515                                         uint32_t extra_offset_mask = 0) {
516    return MemOperandComputationHelper(al,
517                                       scratch,
518                                       base,
519                                       offset,
520                                       extra_offset_mask);
521  }
522  MemOperand MemOperandComputationHelper(Condition cond,
523                                         Register scratch,
524                                         Label* label,
525                                         uint32_t extra_offset_mask = 0) {
526    // Check for buffer space _before_ calculating the offset, in case we
527    // generate a pool that affects the offset calculation.
528    CodeBufferCheckScope scope(this, 4 * kMaxInstructionSizeInBytes);
529    Label::Offset offset =
530        label->GetLocation() -
531        AlignDown(GetCursorOffset() + GetArchitectureStatePCOffset(), 4);
532    return MemOperandComputationHelper(cond,
533                                       scratch,
534                                       pc,
535                                       offset,
536                                       extra_offset_mask);
537  }
538  MemOperand MemOperandComputationHelper(Register scratch,
539                                         Label* label,
540                                         uint32_t extra_offset_mask = 0) {
541    return MemOperandComputationHelper(al, scratch, label, extra_offset_mask);
542  }
543
544  // Determine the appropriate mask to pass into MemOperandComputationHelper.
545  uint32_t GetOffsetMask(InstructionType type, AddrMode addrmode);
546
547  // State and type helpers.
548  bool IsModifiedImmediate(uint32_t imm) {
549    return (IsUsingT32() && ImmediateT32(imm).IsValid()) ||
550           ImmediateA32(imm).IsValid();
551  }
552
553  void Bind(Label* label) {
554    VIXL_ASSERT(allow_macro_instructions_);
555    PadToMinimumBranchRange(label);
556    BindHelper(label);
557  }
558
559  void AddBranchLabel(Label* label) {
560    if (label->IsBound()) return;
561    veneer_pool_manager_.AddLabel(label);
562  }
563
564  void Place(RawLiteral* literal) {
565    VIXL_ASSERT(allow_macro_instructions_);
566    VIXL_ASSERT(literal->IsManuallyPlaced());
567    // We have two calls to `GetBuffer()->Align()` below, that aligns on word
568    // (4 bytes) boundaries. Only one is taken into account in
569    // `GetAlignedSize()`.
570    static const size_t kMaxAlignSize = 3;
571    size_t size = literal->GetAlignedSize() + kMaxAlignSize;
572    VIXL_ASSERT(IsUint32(size));
573    // TODO: We should use a scope here to check the size of data emitted.  We
574    // currently cannot because `aarch32::CodeBufferCheckScope` currently checks
575    // for pools, so that could lead to an infinite loop.
576    EnsureEmitFor(static_cast<uint32_t>(size));
577    // Literals must be emitted aligned on word (4 bytes) boundaries.
578    GetBuffer()->Align();
579    PlaceHelper(literal);
580    GetBuffer()->Align();
581  }
582
583  void ComputeCheckpoint();
584
585  int32_t GetMarginBeforeVeneerEmission() const {
586    return veneer_pool_manager_.GetCheckpoint() - GetCursorOffset();
587  }
588
589  Label::Offset GetTargetForLiteralEmission() const {
590    if (literal_pool_manager_.IsEmpty()) return Label::kMaxOffset;
591    // We add an instruction to the size as the instruction which calls this
592    // function may add a veneer and, without this extra instruction, could put
593    // the literals out of range. For example, it's the case for a "B"
594    // instruction. At the beginning of the instruction we call EnsureEmitFor
595    // which calls this function. However, the target of the branch hasn't been
596    // inserted yet in the veneer pool.
597    size_t veneer_max_size =
598        veneer_pool_manager_.GetMaxSize() + kMaxInstructionSizeInBytes;
599    VIXL_ASSERT(IsInt32(veneer_max_size));
600    // We must be able to generate the veneer pool first.
601    Label::Offset tmp = literal_pool_manager_.GetCheckpoint() -
602                        static_cast<Label::Offset>(veneer_max_size);
603    VIXL_ASSERT(tmp >= 0);
604    return tmp;
605  }
606
607  int32_t GetMarginBeforeLiteralEmission() const {
608    Label::Offset tmp = GetTargetForLiteralEmission();
609    VIXL_ASSERT(tmp >= GetCursorOffset());
610    return tmp - GetCursorOffset();
611  }
612
613  bool VeneerPoolIsEmpty() const { return veneer_pool_manager_.IsEmpty(); }
614  bool LiteralPoolIsEmpty() const { return literal_pool_manager_.IsEmpty(); }
615
616  void EnsureEmitFor(uint32_t size) {
617    Label::Offset target = GetCursorOffset() + size;
618    if (target <= checkpoint_) return;
619    PerformEnsureEmit(target, size);
620  }
621
622  bool IsInsertTooFar(RawLiteral* literal, uint32_t where) {
623    return literal_pool_manager_.IsInsertTooFar(literal, where);
624  }
625
626  bool AliasesAvailableScratchRegister(Register reg) {
627    return GetScratchRegisterList()->Includes(reg);
628  }
629
630  bool AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg) {
631    if (reg.IsAPSR_nzcv()) return false;
632    return GetScratchRegisterList()->Includes(reg.AsRegister());
633  }
634
635  bool AliasesAvailableScratchRegister(VRegister reg) {
636    return GetScratchVRegisterList()->IncludesAliasOf(reg);
637  }
638
639  bool AliasesAvailableScratchRegister(const Operand& operand) {
640    if (operand.IsImmediate()) return false;
641    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
642           (operand.IsRegisterShiftedRegister() &&
643            AliasesAvailableScratchRegister(operand.GetShiftRegister()));
644  }
645
646  bool AliasesAvailableScratchRegister(const NeonOperand& operand) {
647    if (operand.IsImmediate()) return false;
648    return AliasesAvailableScratchRegister(operand.GetRegister());
649  }
650
651  bool AliasesAvailableScratchRegister(SRegisterList list) {
652    for (int n = 0; n < list.GetLength(); n++) {
653      if (AliasesAvailableScratchRegister(list.GetSRegister(n))) return true;
654    }
655    return false;
656  }
657
658  bool AliasesAvailableScratchRegister(DRegisterList list) {
659    for (int n = 0; n < list.GetLength(); n++) {
660      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
661    }
662    return false;
663  }
664
665  bool AliasesAvailableScratchRegister(NeonRegisterList list) {
666    for (int n = 0; n < list.GetLength(); n++) {
667      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
668    }
669    return false;
670  }
671
672  bool AliasesAvailableScratchRegister(RegisterList list) {
673    return GetScratchRegisterList()->Overlaps(list);
674  }
675
676  bool AliasesAvailableScratchRegister(const MemOperand& operand) {
677    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
678           (operand.IsShiftedRegister() &&
679            AliasesAvailableScratchRegister(operand.GetOffsetRegister()));
680  }
681
682  // Emit the literal pool in the code buffer.
683  // Every literal is placed on a 32bit boundary
684  // All the literals in the pool will be removed from the pool and potentially
685  // delete'd.
686  void EmitLiteralPool(LiteralPool* const literal_pool, EmitOption option);
687  void EmitLiteralPool(EmitOption option = kBranchRequired) {
688    VIXL_ASSERT(!literal_pool_manager_.IsBlocked());
689    EmitLiteralPool(literal_pool_manager_.GetLiteralPool(), option);
690    literal_pool_manager_.ResetCheckpoint();
691    ComputeCheckpoint();
692  }
693
694  size_t GetLiteralPoolSize() const {
695    return literal_pool_manager_.GetLiteralPoolSize();
696  }
697
698  // Adr with a literal already constructed. Add the literal to the pool if it
699  // is not already done.
700  void Adr(Condition cond, Register rd, RawLiteral* literal) {
701    EmitLiteralCondRL<&Assembler::adr> emit_helper(cond, rd);
702    GenerateInstruction(emit_helper, literal);
703  }
704  void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); }
705
706  // Loads with literals already constructed. Add the literal to the pool
707  // if it is not already done.
708  void Ldr(Condition cond, Register rt, RawLiteral* literal) {
709    EmitLiteralCondRL<&Assembler::ldr> emit_helper(cond, rt);
710    GenerateInstruction(emit_helper, literal);
711  }
712  void Ldr(Register rt, RawLiteral* literal) { Ldr(al, rt, literal); }
713
714  void Ldrb(Condition cond, Register rt, RawLiteral* literal) {
715    EmitLiteralCondRL<&Assembler::ldrb> emit_helper(cond, rt);
716    GenerateInstruction(emit_helper, literal);
717  }
718  void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); }
719
720  void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) {
721    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(cond, rt, rt2);
722    GenerateInstruction(emit_helper, literal);
723  }
724  void Ldrd(Register rt, Register rt2, RawLiteral* literal) {
725    Ldrd(al, rt, rt2, literal);
726  }
727
728  void Ldrh(Condition cond, Register rt, RawLiteral* literal) {
729    EmitLiteralCondRL<&Assembler::ldrh> emit_helper(cond, rt);
730    GenerateInstruction(emit_helper, literal);
731  }
732  void Ldrh(Register rt, RawLiteral* literal) { Ldrh(al, rt, literal); }
733
734  void Ldrsb(Condition cond, Register rt, RawLiteral* literal) {
735    EmitLiteralCondRL<&Assembler::ldrsb> emit_helper(cond, rt);
736    GenerateInstruction(emit_helper, literal);
737  }
738  void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); }
739
740  void Ldrsh(Condition cond, Register rt, RawLiteral* literal) {
741    EmitLiteralCondRL<&Assembler::ldrsh> emit_helper(cond, rt);
742    GenerateInstruction(emit_helper, literal);
743  }
744  void Ldrsh(Register rt, RawLiteral* literal) { Ldrsh(al, rt, literal); }
745
746  void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) {
747    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(cond, dt, rd);
748    GenerateInstruction(emit_helper, literal);
749  }
750  void Vldr(DataType dt, DRegister rd, RawLiteral* literal) {
751    Vldr(al, dt, rd, literal);
752  }
753  void Vldr(Condition cond, DRegister rd, RawLiteral* literal) {
754    Vldr(cond, Untyped64, rd, literal);
755  }
756  void Vldr(DRegister rd, RawLiteral* literal) {
757    Vldr(al, Untyped64, rd, literal);
758  }
759
760  void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) {
761    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(cond, dt, rd);
762    GenerateInstruction(emit_helper, literal);
763  }
764  void Vldr(DataType dt, SRegister rd, RawLiteral* literal) {
765    Vldr(al, dt, rd, literal);
766  }
767  void Vldr(Condition cond, SRegister rd, RawLiteral* literal) {
768    Vldr(cond, Untyped32, rd, literal);
769  }
770  void Vldr(SRegister rd, RawLiteral* literal) {
771    Vldr(al, Untyped32, rd, literal);
772  }
773
774  // Generic Ldr(register, data)
775  void Ldr(Condition cond, Register rt, uint32_t v) {
776    RawLiteral* literal =
777        new Literal<uint32_t>(v, RawLiteral::kDeletedOnPlacementByPool);
778    EmitLiteralCondRL<&Assembler::ldr> emit_helper(cond, rt);
779    GenerateInstruction(emit_helper, literal);
780  }
781  template <typename T>
782  void Ldr(Register rt, T v) {
783    Ldr(al, rt, v);
784  }
785
786  // Generic Ldrd(rt, rt2, data)
787  void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) {
788    RawLiteral* literal =
789        new Literal<uint64_t>(v, RawLiteral::kDeletedOnPlacementByPool);
790    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(cond, rt, rt2);
791    GenerateInstruction(emit_helper, literal);
792  }
793  template <typename T>
794  void Ldrd(Register rt, Register rt2, T v) {
795    Ldrd(al, rt, rt2, v);
796  }
797
798  void Vldr(Condition cond, SRegister rd, float v) {
799    RawLiteral* literal =
800        new Literal<float>(v, RawLiteral::kDeletedOnPlacementByPool);
801    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(cond, Untyped32, rd);
802    GenerateInstruction(emit_helper, literal);
803  }
804  void Vldr(SRegister rd, float v) { Vldr(al, rd, v); }
805
806  void Vldr(Condition cond, DRegister rd, double v) {
807    RawLiteral* literal =
808        new Literal<double>(v, RawLiteral::kDeletedOnPlacementByPool);
809    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(cond, Untyped64, rd);
810    GenerateInstruction(emit_helper, literal);
811  }
812  void Vldr(DRegister rd, double v) { Vldr(al, rd, v); }
813
814  void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); }
815  void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); }
816  void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); }
817  void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); }
818
819  void Switch(Register reg, JumpTableBase* table);
820  void GenerateSwitchTable(JumpTableBase* table, int table_size);
821  void Case(JumpTableBase* table, int case_index);
822  void Break(JumpTableBase* table);
823  void Default(JumpTableBase* table);
824  void EndSwitch(JumpTableBase* table);
825
826  // Claim memory on the stack.
827  // Note that the Claim, Drop, and Peek helpers below ensure that offsets used
828  // are multiples of 32 bits to help maintain 32-bit SP alignment.
829  // We could `Align{Up,Down}(size, 4)`, but that's potentially problematic:
830  //     Claim(3)
831  //     Claim(1)
832  //     Drop(4)
833  // would seem correct, when in fact:
834  //    Claim(3) -> sp = sp - 4
835  //    Claim(1) -> sp = sp - 4
836  //    Drop(4)  -> sp = sp + 4
837  //
838  void Claim(int32_t size) {
839    if (size == 0) return;
840    // The stack must be kept 32bit aligned.
841    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
842    Sub(sp, sp, size);
843  }
844  // Release memory on the stack
845  void Drop(int32_t size) {
846    if (size == 0) return;
847    // The stack must be kept 32bit aligned.
848    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
849    Add(sp, sp, size);
850  }
851  void Peek(Register dst, int32_t offset) {
852    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
853    Ldr(dst, MemOperand(sp, offset));
854  }
855  void Poke(Register src, int32_t offset) {
856    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
857    Str(src, MemOperand(sp, offset));
858  }
859  void Printf(const char* format,
860              CPURegister reg1 = NoReg,
861              CPURegister reg2 = NoReg,
862              CPURegister reg3 = NoReg,
863              CPURegister reg4 = NoReg);
864  // Functions used by Printf for generation.
865  void PushRegister(CPURegister reg);
866  void PreparePrintfArgument(CPURegister reg,
867                             int* core_count,
868                             int* vfp_count,
869                             uint32_t* printf_type);
870  // Handlers for cases not handled by the assembler.
871  // ADD, MOVT, MOVW, SUB, SXTB16, TEQ, UXTB16
872  virtual void Delegate(InstructionType type,
873                        InstructionCondROp instruction,
874                        Condition cond,
875                        Register rn,
876                        const Operand& operand) VIXL_OVERRIDE;
877  // CMN, CMP, MOV, MOVS, MVN, MVNS, SXTB, SXTH, TST, UXTB, UXTH
878  virtual void Delegate(InstructionType type,
879                        InstructionCondSizeROp instruction,
880                        Condition cond,
881                        EncodingSize size,
882                        Register rn,
883                        const Operand& operand) VIXL_OVERRIDE;
884  // ADDW, ORN, ORNS, PKHBT, PKHTB, RSC, RSCS, SUBW, SXTAB, SXTAB16, SXTAH,
885  // UXTAB, UXTAB16, UXTAH
886  virtual void Delegate(InstructionType type,
887                        InstructionCondRROp instruction,
888                        Condition cond,
889                        Register rd,
890                        Register rn,
891                        const Operand& operand) VIXL_OVERRIDE;
892  // ADC, ADCS, ADD, ADDS, AND, ANDS, ASR, ASRS, BIC, BICS, EOR, EORS, LSL,
893  // LSLS, LSR, LSRS, ORR, ORRS, ROR, RORS, RSB, RSBS, SBC, SBCS, SUB, SUBS
894  virtual void Delegate(InstructionType type,
895                        InstructionCondSizeRL instruction,
896                        Condition cond,
897                        EncodingSize size,
898                        Register rd,
899                        Label* label) VIXL_OVERRIDE;
900  virtual void Delegate(InstructionType type,
901                        InstructionCondSizeRROp instruction,
902                        Condition cond,
903                        EncodingSize size,
904                        Register rd,
905                        Register rn,
906                        const Operand& operand) VIXL_OVERRIDE;
907  // CBNZ, CBZ
908  virtual void Delegate(InstructionType type,
909                        InstructionRL instruction,
910                        Register rn,
911                        Label* label) VIXL_OVERRIDE;
912  // VMOV
913  virtual void Delegate(InstructionType type,
914                        InstructionCondDtSSop instruction,
915                        Condition cond,
916                        DataType dt,
917                        SRegister rd,
918                        const SOperand& operand) VIXL_OVERRIDE;
919  // VMOV, VMVN
920  virtual void Delegate(InstructionType type,
921                        InstructionCondDtDDop instruction,
922                        Condition cond,
923                        DataType dt,
924                        DRegister rd,
925                        const DOperand& operand) VIXL_OVERRIDE;
926  // VMOV, VMVN
927  virtual void Delegate(InstructionType type,
928                        InstructionCondDtQQop instruction,
929                        Condition cond,
930                        DataType dt,
931                        QRegister rd,
932                        const QOperand& operand) VIXL_OVERRIDE;
933  // LDR, LDRB, LDRH, LDRSB, LDRSH, STR, STRB, STRH
934  virtual void Delegate(InstructionType type,
935                        InstructionCondSizeRMop instruction,
936                        Condition cond,
937                        EncodingSize size,
938                        Register rd,
939                        const MemOperand& operand) VIXL_OVERRIDE;
940  // LDAEXD, LDRD, LDREXD, STLEX, STLEXB, STLEXH, STRD, STREX, STREXB, STREXH
941  virtual void Delegate(InstructionType type,
942                        InstructionCondRL instruction,
943                        Condition cond,
944                        Register rt,
945                        Label* label) VIXL_OVERRIDE;
946  virtual void Delegate(InstructionType type,
947                        InstructionCondRRL instruction,
948                        Condition cond,
949                        Register rt,
950                        Register rt2,
951                        Label* label) VIXL_OVERRIDE;
952  virtual void Delegate(InstructionType type,
953                        InstructionCondRRMop instruction,
954                        Condition cond,
955                        Register rt,
956                        Register rt2,
957                        const MemOperand& operand) VIXL_OVERRIDE;
958  // VLDR, VSTR
959  virtual void Delegate(InstructionType type,
960                        InstructionCondDtSMop instruction,
961                        Condition cond,
962                        DataType dt,
963                        SRegister rd,
964                        const MemOperand& operand) VIXL_OVERRIDE;
965  // VLDR, VSTR
966  virtual void Delegate(InstructionType type,
967                        InstructionCondDtDMop instruction,
968                        Condition cond,
969                        DataType dt,
970                        DRegister rd,
971                        const MemOperand& operand) VIXL_OVERRIDE;
972  // MSR
973  virtual void Delegate(InstructionType type,
974                        InstructionCondMsrOp instruction,
975                        Condition cond,
976                        MaskedSpecialRegister spec_reg,
977                        const Operand& operand) VIXL_OVERRIDE;
978  virtual void Delegate(InstructionType type,
979                        InstructionCondDtDL instruction,
980                        Condition cond,
981                        DataType dt,
982                        DRegister rd,
983                        Label* label) VIXL_OVERRIDE;
984  virtual void Delegate(InstructionType type,
985                        InstructionCondDtSL instruction,
986                        Condition cond,
987                        DataType dt,
988                        SRegister rd,
989                        Label* label) VIXL_OVERRIDE;
990
991  // Start of generated code.
992
993  void Adc(Condition cond, Register rd, Register rn, const Operand& operand) {
994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
996    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
997    VIXL_ASSERT(allow_macro_instructions_);
998    VIXL_ASSERT(OutsideITBlock());
999    MacroEmissionCheckScope guard(this);
1000    bool can_use_it =
1001        // ADC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1002        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
1003        operand.GetBaseRegister().IsLow();
1004    ITScope it_scope(this, &cond, can_use_it);
1005    adc(cond, rd, rn, operand);
1006  }
1007  void Adc(Register rd, Register rn, const Operand& operand) {
1008    Adc(al, rd, rn, operand);
1009  }
1010  void Adc(FlagsUpdate flags,
1011           Condition cond,
1012           Register rd,
1013           Register rn,
1014           const Operand& operand) {
1015    switch (flags) {
1016      case LeaveFlags:
1017        Adc(cond, rd, rn, operand);
1018        break;
1019      case SetFlags:
1020        Adcs(cond, rd, rn, operand);
1021        break;
1022      case DontCare:
1023        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1024                                   rn.Is(rd) && operand.IsPlainRegister() &&
1025                                   operand.GetBaseRegister().IsLow();
1026        if (setflags_is_smaller) {
1027          Adcs(cond, rd, rn, operand);
1028        } else {
1029          Adc(cond, rd, rn, operand);
1030        }
1031        break;
1032    }
1033  }
1034  void Adc(FlagsUpdate flags,
1035           Register rd,
1036           Register rn,
1037           const Operand& operand) {
1038    Adc(flags, al, rd, rn, operand);
1039  }
1040
1041  void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) {
1042    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1043    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1044    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1045    VIXL_ASSERT(allow_macro_instructions_);
1046    VIXL_ASSERT(OutsideITBlock());
1047    MacroEmissionCheckScope guard(this);
1048    ITScope it_scope(this, &cond);
1049    adcs(cond, rd, rn, operand);
1050  }
1051  void Adcs(Register rd, Register rn, const Operand& operand) {
1052    Adcs(al, rd, rn, operand);
1053  }
1054
1055  void Add(Condition cond, Register rd, Register rn, const Operand& operand) {
1056    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1057    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1058    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1059    VIXL_ASSERT(allow_macro_instructions_);
1060    VIXL_ASSERT(OutsideITBlock());
1061    MacroEmissionCheckScope guard(this);
1062    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1063      uint32_t immediate = operand.GetImmediate();
1064      if (immediate == 0) {
1065        return;
1066      }
1067    }
1068    bool can_use_it =
1069        // ADD<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
1070        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
1071         rd.IsLow()) ||
1072        // ADD<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
1073        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1074         rd.IsLow() && rn.Is(rd)) ||
1075        // ADD{<c>}{<q>} <Rd>, SP, #<imm8> ; T1
1076        (operand.IsImmediate() && (operand.GetImmediate() <= 1020) &&
1077         ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) ||
1078        // ADD<c>{<q>} <Rd>, <Rn>, <Rm>
1079        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1080         operand.GetBaseRegister().IsLow()) ||
1081        // ADD<c>{<q>} <Rdn>, <Rm> ; T2
1082        (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) &&
1083         !operand.GetBaseRegister().IsSP() &&
1084         !operand.GetBaseRegister().IsPC()) ||
1085        // ADD{<c>}{<q>} {<Rdm>,} SP, <Rdm> ; T1
1086        (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() &&
1087         operand.GetBaseRegister().Is(rd));
1088    ITScope it_scope(this, &cond, can_use_it);
1089    add(cond, rd, rn, operand);
1090  }
1091  void Add(Register rd, Register rn, const Operand& operand) {
1092    Add(al, rd, rn, operand);
1093  }
1094  void Add(FlagsUpdate flags,
1095           Condition cond,
1096           Register rd,
1097           Register rn,
1098           const Operand& operand) {
1099    switch (flags) {
1100      case LeaveFlags:
1101        Add(cond, rd, rn, operand);
1102        break;
1103      case SetFlags:
1104        Adds(cond, rd, rn, operand);
1105        break;
1106      case DontCare:
1107        bool setflags_is_smaller =
1108            IsUsingT32() && cond.Is(al) &&
1109            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1110              operand.GetBaseRegister().IsLow()) ||
1111             (operand.IsImmediate() &&
1112              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
1113               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
1114        if (setflags_is_smaller) {
1115          Adds(cond, rd, rn, operand);
1116        } else {
1117          bool changed_op_is_smaller =
1118              operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
1119              ((rd.IsLow() && rn.IsLow() &&
1120                (operand.GetSignedImmediate() >= -7)) ||
1121               (rd.IsLow() && rn.Is(rd) &&
1122                (operand.GetSignedImmediate() >= -255)));
1123          if (changed_op_is_smaller) {
1124            Subs(cond, rd, rn, -operand.GetSignedImmediate());
1125          } else {
1126            Add(cond, rd, rn, operand);
1127          }
1128        }
1129        break;
1130    }
1131  }
1132  void Add(FlagsUpdate flags,
1133           Register rd,
1134           Register rn,
1135           const Operand& operand) {
1136    Add(flags, al, rd, rn, operand);
1137  }
1138
1139  void Adds(Condition cond, Register rd, Register rn, const Operand& operand) {
1140    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1141    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1142    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1143    VIXL_ASSERT(allow_macro_instructions_);
1144    VIXL_ASSERT(OutsideITBlock());
1145    MacroEmissionCheckScope guard(this);
1146    ITScope it_scope(this, &cond);
1147    adds(cond, rd, rn, operand);
1148  }
1149  void Adds(Register rd, Register rn, const Operand& operand) {
1150    Adds(al, rd, rn, operand);
1151  }
1152
1153
1154  void Adr(Condition cond, Register rd, Label* label) {
1155    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1156    VIXL_ASSERT(allow_macro_instructions_);
1157    VIXL_ASSERT(OutsideITBlock());
1158    MacroEmissionCheckScope guard(this);
1159    ITScope it_scope(this, &cond);
1160    adr(cond, rd, label);
1161  }
1162  void Adr(Register rd, Label* label) { Adr(al, rd, label); }
1163
1164  void And(Condition cond, Register rd, Register rn, const Operand& operand) {
1165    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1166    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1167    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1168    VIXL_ASSERT(allow_macro_instructions_);
1169    VIXL_ASSERT(OutsideITBlock());
1170    MacroEmissionCheckScope guard(this);
1171    if (cond.Is(al) && operand.IsImmediate()) {
1172      uint32_t immediate = operand.GetImmediate();
1173      if (immediate == 0) {
1174        mov(rd, 0);
1175        return;
1176      }
1177      if ((immediate == 0xffffffff) && rd.Is(rn)) {
1178        return;
1179      }
1180    }
1181    bool can_use_it =
1182        // AND<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1183        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1184        operand.GetBaseRegister().IsLow();
1185    ITScope it_scope(this, &cond, can_use_it);
1186    and_(cond, rd, rn, operand);
1187  }
1188  void And(Register rd, Register rn, const Operand& operand) {
1189    And(al, rd, rn, operand);
1190  }
1191  void And(FlagsUpdate flags,
1192           Condition cond,
1193           Register rd,
1194           Register rn,
1195           const Operand& operand) {
1196    switch (flags) {
1197      case LeaveFlags:
1198        And(cond, rd, rn, operand);
1199        break;
1200      case SetFlags:
1201        Ands(cond, rd, rn, operand);
1202        break;
1203      case DontCare:
1204        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1205                                   rn.Is(rd) && operand.IsPlainRegister() &&
1206                                   operand.GetBaseRegister().IsLow();
1207        if (setflags_is_smaller) {
1208          Ands(cond, rd, rn, operand);
1209        } else {
1210          And(cond, rd, rn, operand);
1211        }
1212        break;
1213    }
1214  }
1215  void And(FlagsUpdate flags,
1216           Register rd,
1217           Register rn,
1218           const Operand& operand) {
1219    And(flags, al, rd, rn, operand);
1220  }
1221
1222  void Ands(Condition cond, Register rd, Register rn, const Operand& operand) {
1223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1224    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1225    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1226    VIXL_ASSERT(allow_macro_instructions_);
1227    VIXL_ASSERT(OutsideITBlock());
1228    MacroEmissionCheckScope guard(this);
1229    ITScope it_scope(this, &cond);
1230    ands(cond, rd, rn, operand);
1231  }
1232  void Ands(Register rd, Register rn, const Operand& operand) {
1233    Ands(al, rd, rn, operand);
1234  }
1235
1236  void Asr(Condition cond, Register rd, Register rm, const Operand& operand) {
1237    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1238    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1239    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1240    VIXL_ASSERT(allow_macro_instructions_);
1241    VIXL_ASSERT(OutsideITBlock());
1242    MacroEmissionCheckScope guard(this);
1243    bool can_use_it =
1244        // ASR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
1245        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1246         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
1247        // ASR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
1248        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
1249         operand.GetBaseRegister().IsLow());
1250    ITScope it_scope(this, &cond, can_use_it);
1251    asr(cond, rd, rm, operand);
1252  }
1253  void Asr(Register rd, Register rm, const Operand& operand) {
1254    Asr(al, rd, rm, operand);
1255  }
1256  void Asr(FlagsUpdate flags,
1257           Condition cond,
1258           Register rd,
1259           Register rm,
1260           const Operand& operand) {
1261    switch (flags) {
1262      case LeaveFlags:
1263        Asr(cond, rd, rm, operand);
1264        break;
1265      case SetFlags:
1266        Asrs(cond, rd, rm, operand);
1267        break;
1268      case DontCare:
1269        bool setflags_is_smaller =
1270            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
1271            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1272              (operand.GetImmediate() <= 32)) ||
1273             (operand.IsPlainRegister() && rd.Is(rm)));
1274        if (setflags_is_smaller) {
1275          Asrs(cond, rd, rm, operand);
1276        } else {
1277          Asr(cond, rd, rm, operand);
1278        }
1279        break;
1280    }
1281  }
1282  void Asr(FlagsUpdate flags,
1283           Register rd,
1284           Register rm,
1285           const Operand& operand) {
1286    Asr(flags, al, rd, rm, operand);
1287  }
1288
1289  void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) {
1290    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1291    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1292    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1293    VIXL_ASSERT(allow_macro_instructions_);
1294    VIXL_ASSERT(OutsideITBlock());
1295    MacroEmissionCheckScope guard(this);
1296    ITScope it_scope(this, &cond);
1297    asrs(cond, rd, rm, operand);
1298  }
1299  void Asrs(Register rd, Register rm, const Operand& operand) {
1300    Asrs(al, rd, rm, operand);
1301  }
1302
1303  void B(Condition cond, Label* label, BranchHint hint = kBranchWithoutHint) {
1304    VIXL_ASSERT(allow_macro_instructions_);
1305    VIXL_ASSERT(OutsideITBlock());
1306    MacroEmissionCheckScope guard(this);
1307    if (hint == kNear) {
1308      if (label->IsBound()) {
1309        b(cond, label);
1310      } else {
1311        b(cond, Narrow, label);
1312      }
1313    } else {
1314      b(cond, label);
1315    }
1316    AddBranchLabel(label);
1317  }
1318  void B(Label* label, BranchHint hint = kBranchWithoutHint) {
1319    B(al, label, hint);
1320  }
1321  void BPreferNear(Condition cond, Label* label) { B(cond, label, kNear); }
1322  void BPreferNear(Label* label) { B(al, label, kNear); }
1323
1324  void Bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand) {
1325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1326    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1327    VIXL_ASSERT(allow_macro_instructions_);
1328    VIXL_ASSERT(OutsideITBlock());
1329    MacroEmissionCheckScope guard(this);
1330    ITScope it_scope(this, &cond);
1331    bfc(cond, rd, lsb, operand);
1332  }
1333  void Bfc(Register rd, uint32_t lsb, const Operand& operand) {
1334    Bfc(al, rd, lsb, operand);
1335  }
1336
1337  void Bfi(Condition cond,
1338           Register rd,
1339           Register rn,
1340           uint32_t lsb,
1341           const Operand& operand) {
1342    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1343    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1344    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1345    VIXL_ASSERT(allow_macro_instructions_);
1346    VIXL_ASSERT(OutsideITBlock());
1347    MacroEmissionCheckScope guard(this);
1348    ITScope it_scope(this, &cond);
1349    bfi(cond, rd, rn, lsb, operand);
1350  }
1351  void Bfi(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
1352    Bfi(al, rd, rn, lsb, operand);
1353  }
1354
1355  void Bic(Condition cond, Register rd, Register rn, const Operand& operand) {
1356    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1357    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1358    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1359    VIXL_ASSERT(allow_macro_instructions_);
1360    VIXL_ASSERT(OutsideITBlock());
1361    MacroEmissionCheckScope guard(this);
1362    if (cond.Is(al) && operand.IsImmediate()) {
1363      uint32_t immediate = operand.GetImmediate();
1364      if ((immediate == 0) && rd.Is(rn)) {
1365        return;
1366      }
1367      if (immediate == 0xffffffff) {
1368        mov(rd, 0);
1369        return;
1370      }
1371    }
1372    bool can_use_it =
1373        // BIC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1374        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1375        operand.GetBaseRegister().IsLow();
1376    ITScope it_scope(this, &cond, can_use_it);
1377    bic(cond, rd, rn, operand);
1378  }
1379  void Bic(Register rd, Register rn, const Operand& operand) {
1380    Bic(al, rd, rn, operand);
1381  }
1382  void Bic(FlagsUpdate flags,
1383           Condition cond,
1384           Register rd,
1385           Register rn,
1386           const Operand& operand) {
1387    switch (flags) {
1388      case LeaveFlags:
1389        Bic(cond, rd, rn, operand);
1390        break;
1391      case SetFlags:
1392        Bics(cond, rd, rn, operand);
1393        break;
1394      case DontCare:
1395        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1396                                   rn.Is(rd) && operand.IsPlainRegister() &&
1397                                   operand.GetBaseRegister().IsLow();
1398        if (setflags_is_smaller) {
1399          Bics(cond, rd, rn, operand);
1400        } else {
1401          Bic(cond, rd, rn, operand);
1402        }
1403        break;
1404    }
1405  }
1406  void Bic(FlagsUpdate flags,
1407           Register rd,
1408           Register rn,
1409           const Operand& operand) {
1410    Bic(flags, al, rd, rn, operand);
1411  }
1412
1413  void Bics(Condition cond, Register rd, Register rn, const Operand& operand) {
1414    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1415    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1416    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1417    VIXL_ASSERT(allow_macro_instructions_);
1418    VIXL_ASSERT(OutsideITBlock());
1419    MacroEmissionCheckScope guard(this);
1420    ITScope it_scope(this, &cond);
1421    bics(cond, rd, rn, operand);
1422  }
1423  void Bics(Register rd, Register rn, const Operand& operand) {
1424    Bics(al, rd, rn, operand);
1425  }
1426
1427  void Bkpt(Condition cond, uint32_t imm) {
1428    VIXL_ASSERT(allow_macro_instructions_);
1429    VIXL_ASSERT(OutsideITBlock());
1430    MacroEmissionCheckScope guard(this);
1431    ITScope it_scope(this, &cond);
1432    bkpt(cond, imm);
1433  }
1434  void Bkpt(uint32_t imm) { Bkpt(al, imm); }
1435
1436  void Bl(Condition cond, Label* label) {
1437    VIXL_ASSERT(allow_macro_instructions_);
1438    VIXL_ASSERT(OutsideITBlock());
1439    MacroEmissionCheckScope guard(this);
1440    ITScope it_scope(this, &cond);
1441    bl(cond, label);
1442    AddBranchLabel(label);
1443  }
1444  void Bl(Label* label) { Bl(al, label); }
1445
1446  void Blx(Condition cond, Label* label) {
1447    VIXL_ASSERT(allow_macro_instructions_);
1448    VIXL_ASSERT(OutsideITBlock());
1449    MacroEmissionCheckScope guard(this);
1450    ITScope it_scope(this, &cond);
1451    blx(cond, label);
1452    AddBranchLabel(label);
1453  }
1454  void Blx(Label* label) { Blx(al, label); }
1455
1456  void Blx(Condition cond, Register rm) {
1457    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1458    VIXL_ASSERT(allow_macro_instructions_);
1459    VIXL_ASSERT(OutsideITBlock());
1460    MacroEmissionCheckScope guard(this);
1461    bool can_use_it =
1462        // BLX{<c>}{<q>} <Rm> ; T1
1463        !rm.IsPC();
1464    ITScope it_scope(this, &cond, can_use_it);
1465    blx(cond, rm);
1466  }
1467  void Blx(Register rm) { Blx(al, rm); }
1468
1469  void Bx(Condition cond, Register rm) {
1470    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1471    VIXL_ASSERT(allow_macro_instructions_);
1472    VIXL_ASSERT(OutsideITBlock());
1473    MacroEmissionCheckScope guard(this);
1474    bool can_use_it =
1475        // BX{<c>}{<q>} <Rm> ; T1
1476        !rm.IsPC();
1477    ITScope it_scope(this, &cond, can_use_it);
1478    bx(cond, rm);
1479  }
1480  void Bx(Register rm) { Bx(al, rm); }
1481
1482  void Bxj(Condition cond, Register rm) {
1483    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1484    VIXL_ASSERT(allow_macro_instructions_);
1485    VIXL_ASSERT(OutsideITBlock());
1486    MacroEmissionCheckScope guard(this);
1487    ITScope it_scope(this, &cond);
1488    bxj(cond, rm);
1489  }
1490  void Bxj(Register rm) { Bxj(al, rm); }
1491
1492  void Cbnz(Register rn, Label* label) {
1493    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1494    VIXL_ASSERT(allow_macro_instructions_);
1495    VIXL_ASSERT(OutsideITBlock());
1496    MacroEmissionCheckScope guard(this);
1497    cbnz(rn, label);
1498    AddBranchLabel(label);
1499  }
1500
1501  void Cbz(Register rn, Label* label) {
1502    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1503    VIXL_ASSERT(allow_macro_instructions_);
1504    VIXL_ASSERT(OutsideITBlock());
1505    MacroEmissionCheckScope guard(this);
1506    cbz(rn, label);
1507    AddBranchLabel(label);
1508  }
1509
1510  void Clrex(Condition cond) {
1511    VIXL_ASSERT(allow_macro_instructions_);
1512    VIXL_ASSERT(OutsideITBlock());
1513    MacroEmissionCheckScope guard(this);
1514    ITScope it_scope(this, &cond);
1515    clrex(cond);
1516  }
1517  void Clrex() { Clrex(al); }
1518
1519  void Clz(Condition cond, Register rd, Register rm) {
1520    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1521    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1522    VIXL_ASSERT(allow_macro_instructions_);
1523    VIXL_ASSERT(OutsideITBlock());
1524    MacroEmissionCheckScope guard(this);
1525    ITScope it_scope(this, &cond);
1526    clz(cond, rd, rm);
1527  }
1528  void Clz(Register rd, Register rm) { Clz(al, rd, rm); }
1529
1530  void Cmn(Condition cond, Register rn, const Operand& operand) {
1531    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1532    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1533    VIXL_ASSERT(allow_macro_instructions_);
1534    VIXL_ASSERT(OutsideITBlock());
1535    MacroEmissionCheckScope guard(this);
1536    bool can_use_it =
1537        // CMN{<c>}{<q>} <Rn>, <Rm> ; T1
1538        operand.IsPlainRegister() && rn.IsLow() &&
1539        operand.GetBaseRegister().IsLow();
1540    ITScope it_scope(this, &cond, can_use_it);
1541    cmn(cond, rn, operand);
1542  }
1543  void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); }
1544
1545  void Cmp(Condition cond, Register rn, const Operand& operand) {
1546    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1547    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1548    VIXL_ASSERT(allow_macro_instructions_);
1549    VIXL_ASSERT(OutsideITBlock());
1550    MacroEmissionCheckScope guard(this);
1551    bool can_use_it =
1552        // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1
1553        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1554         rn.IsLow()) ||
1555        // CMP{<c>}{<q>} <Rn>, <Rm> ; T1 T2
1556        (operand.IsPlainRegister() && !rn.IsPC() &&
1557         !operand.GetBaseRegister().IsPC());
1558    ITScope it_scope(this, &cond, can_use_it);
1559    cmp(cond, rn, operand);
1560  }
1561  void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); }
1562
1563  void Crc32b(Condition cond, Register rd, Register rn, Register rm) {
1564    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1565    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1567    VIXL_ASSERT(allow_macro_instructions_);
1568    VIXL_ASSERT(OutsideITBlock());
1569    MacroEmissionCheckScope guard(this);
1570    ITScope it_scope(this, &cond);
1571    crc32b(cond, rd, rn, rm);
1572  }
1573  void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); }
1574
1575  void Crc32cb(Condition cond, Register rd, Register rn, Register rm) {
1576    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1577    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1578    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1579    VIXL_ASSERT(allow_macro_instructions_);
1580    VIXL_ASSERT(OutsideITBlock());
1581    MacroEmissionCheckScope guard(this);
1582    ITScope it_scope(this, &cond);
1583    crc32cb(cond, rd, rn, rm);
1584  }
1585  void Crc32cb(Register rd, Register rn, Register rm) {
1586    Crc32cb(al, rd, rn, rm);
1587  }
1588
1589  void Crc32ch(Condition cond, Register rd, Register rn, Register rm) {
1590    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1591    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1592    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1593    VIXL_ASSERT(allow_macro_instructions_);
1594    VIXL_ASSERT(OutsideITBlock());
1595    MacroEmissionCheckScope guard(this);
1596    ITScope it_scope(this, &cond);
1597    crc32ch(cond, rd, rn, rm);
1598  }
1599  void Crc32ch(Register rd, Register rn, Register rm) {
1600    Crc32ch(al, rd, rn, rm);
1601  }
1602
1603  void Crc32cw(Condition cond, Register rd, Register rn, Register rm) {
1604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1607    VIXL_ASSERT(allow_macro_instructions_);
1608    VIXL_ASSERT(OutsideITBlock());
1609    MacroEmissionCheckScope guard(this);
1610    ITScope it_scope(this, &cond);
1611    crc32cw(cond, rd, rn, rm);
1612  }
1613  void Crc32cw(Register rd, Register rn, Register rm) {
1614    Crc32cw(al, rd, rn, rm);
1615  }
1616
1617  void Crc32h(Condition cond, Register rd, Register rn, Register rm) {
1618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1621    VIXL_ASSERT(allow_macro_instructions_);
1622    VIXL_ASSERT(OutsideITBlock());
1623    MacroEmissionCheckScope guard(this);
1624    ITScope it_scope(this, &cond);
1625    crc32h(cond, rd, rn, rm);
1626  }
1627  void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); }
1628
1629  void Crc32w(Condition cond, Register rd, Register rn, Register rm) {
1630    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1631    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1632    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1633    VIXL_ASSERT(allow_macro_instructions_);
1634    VIXL_ASSERT(OutsideITBlock());
1635    MacroEmissionCheckScope guard(this);
1636    ITScope it_scope(this, &cond);
1637    crc32w(cond, rd, rn, rm);
1638  }
1639  void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); }
1640
1641  void Dmb(Condition cond, MemoryBarrier option) {
1642    VIXL_ASSERT(allow_macro_instructions_);
1643    VIXL_ASSERT(OutsideITBlock());
1644    MacroEmissionCheckScope guard(this);
1645    ITScope it_scope(this, &cond);
1646    dmb(cond, option);
1647  }
1648  void Dmb(MemoryBarrier option) { Dmb(al, option); }
1649
1650  void Dsb(Condition cond, MemoryBarrier option) {
1651    VIXL_ASSERT(allow_macro_instructions_);
1652    VIXL_ASSERT(OutsideITBlock());
1653    MacroEmissionCheckScope guard(this);
1654    ITScope it_scope(this, &cond);
1655    dsb(cond, option);
1656  }
1657  void Dsb(MemoryBarrier option) { Dsb(al, option); }
1658
1659  void Eor(Condition cond, Register rd, Register rn, const Operand& operand) {
1660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1662    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1663    VIXL_ASSERT(allow_macro_instructions_);
1664    VIXL_ASSERT(OutsideITBlock());
1665    MacroEmissionCheckScope guard(this);
1666    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1667      uint32_t immediate = operand.GetImmediate();
1668      if (immediate == 0) {
1669        return;
1670      }
1671      if (immediate == 0xffffffff) {
1672        mvn(rd, rn);
1673        return;
1674      }
1675    }
1676    bool can_use_it =
1677        // EOR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1678        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1679        operand.GetBaseRegister().IsLow();
1680    ITScope it_scope(this, &cond, can_use_it);
1681    eor(cond, rd, rn, operand);
1682  }
1683  void Eor(Register rd, Register rn, const Operand& operand) {
1684    Eor(al, rd, rn, operand);
1685  }
1686  void Eor(FlagsUpdate flags,
1687           Condition cond,
1688           Register rd,
1689           Register rn,
1690           const Operand& operand) {
1691    switch (flags) {
1692      case LeaveFlags:
1693        Eor(cond, rd, rn, operand);
1694        break;
1695      case SetFlags:
1696        Eors(cond, rd, rn, operand);
1697        break;
1698      case DontCare:
1699        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1700                                   rn.Is(rd) && operand.IsPlainRegister() &&
1701                                   operand.GetBaseRegister().IsLow();
1702        if (setflags_is_smaller) {
1703          Eors(cond, rd, rn, operand);
1704        } else {
1705          Eor(cond, rd, rn, operand);
1706        }
1707        break;
1708    }
1709  }
1710  void Eor(FlagsUpdate flags,
1711           Register rd,
1712           Register rn,
1713           const Operand& operand) {
1714    Eor(flags, al, rd, rn, operand);
1715  }
1716
1717  void Eors(Condition cond, Register rd, Register rn, const Operand& operand) {
1718    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1720    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1721    VIXL_ASSERT(allow_macro_instructions_);
1722    VIXL_ASSERT(OutsideITBlock());
1723    MacroEmissionCheckScope guard(this);
1724    ITScope it_scope(this, &cond);
1725    eors(cond, rd, rn, operand);
1726  }
1727  void Eors(Register rd, Register rn, const Operand& operand) {
1728    Eors(al, rd, rn, operand);
1729  }
1730
1731  void Fldmdbx(Condition cond,
1732               Register rn,
1733               WriteBack write_back,
1734               DRegisterList dreglist) {
1735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1736    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1737    VIXL_ASSERT(allow_macro_instructions_);
1738    VIXL_ASSERT(OutsideITBlock());
1739    MacroEmissionCheckScope guard(this);
1740    ITScope it_scope(this, &cond);
1741    fldmdbx(cond, rn, write_back, dreglist);
1742  }
1743  void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1744    Fldmdbx(al, rn, write_back, dreglist);
1745  }
1746
1747  void Fldmiax(Condition cond,
1748               Register rn,
1749               WriteBack write_back,
1750               DRegisterList dreglist) {
1751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1752    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1753    VIXL_ASSERT(allow_macro_instructions_);
1754    VIXL_ASSERT(OutsideITBlock());
1755    MacroEmissionCheckScope guard(this);
1756    ITScope it_scope(this, &cond);
1757    fldmiax(cond, rn, write_back, dreglist);
1758  }
1759  void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1760    Fldmiax(al, rn, write_back, dreglist);
1761  }
1762
1763  void Fstmdbx(Condition cond,
1764               Register rn,
1765               WriteBack write_back,
1766               DRegisterList dreglist) {
1767    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1768    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1769    VIXL_ASSERT(allow_macro_instructions_);
1770    VIXL_ASSERT(OutsideITBlock());
1771    MacroEmissionCheckScope guard(this);
1772    ITScope it_scope(this, &cond);
1773    fstmdbx(cond, rn, write_back, dreglist);
1774  }
1775  void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1776    Fstmdbx(al, rn, write_back, dreglist);
1777  }
1778
1779  void Fstmiax(Condition cond,
1780               Register rn,
1781               WriteBack write_back,
1782               DRegisterList dreglist) {
1783    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1784    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1785    VIXL_ASSERT(allow_macro_instructions_);
1786    VIXL_ASSERT(OutsideITBlock());
1787    MacroEmissionCheckScope guard(this);
1788    ITScope it_scope(this, &cond);
1789    fstmiax(cond, rn, write_back, dreglist);
1790  }
1791  void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1792    Fstmiax(al, rn, write_back, dreglist);
1793  }
1794
1795  void Hlt(Condition cond, uint32_t imm) {
1796    VIXL_ASSERT(allow_macro_instructions_);
1797    VIXL_ASSERT(OutsideITBlock());
1798    MacroEmissionCheckScope guard(this);
1799    ITScope it_scope(this, &cond);
1800    hlt(cond, imm);
1801  }
1802  void Hlt(uint32_t imm) { Hlt(al, imm); }
1803
1804  void Hvc(Condition cond, uint32_t imm) {
1805    VIXL_ASSERT(allow_macro_instructions_);
1806    VIXL_ASSERT(OutsideITBlock());
1807    MacroEmissionCheckScope guard(this);
1808    ITScope it_scope(this, &cond);
1809    hvc(cond, imm);
1810  }
1811  void Hvc(uint32_t imm) { Hvc(al, imm); }
1812
1813  void Isb(Condition cond, MemoryBarrier option) {
1814    VIXL_ASSERT(allow_macro_instructions_);
1815    VIXL_ASSERT(OutsideITBlock());
1816    MacroEmissionCheckScope guard(this);
1817    ITScope it_scope(this, &cond);
1818    isb(cond, option);
1819  }
1820  void Isb(MemoryBarrier option) { Isb(al, option); }
1821
1822  void Lda(Condition cond, Register rt, const MemOperand& operand) {
1823    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1824    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1825    VIXL_ASSERT(allow_macro_instructions_);
1826    VIXL_ASSERT(OutsideITBlock());
1827    MacroEmissionCheckScope guard(this);
1828    ITScope it_scope(this, &cond);
1829    lda(cond, rt, operand);
1830  }
1831  void Lda(Register rt, const MemOperand& operand) { Lda(al, rt, operand); }
1832
1833  void Ldab(Condition cond, Register rt, const MemOperand& operand) {
1834    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1835    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1836    VIXL_ASSERT(allow_macro_instructions_);
1837    VIXL_ASSERT(OutsideITBlock());
1838    MacroEmissionCheckScope guard(this);
1839    ITScope it_scope(this, &cond);
1840    ldab(cond, rt, operand);
1841  }
1842  void Ldab(Register rt, const MemOperand& operand) { Ldab(al, rt, operand); }
1843
1844  void Ldaex(Condition cond, Register rt, const MemOperand& operand) {
1845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1846    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1847    VIXL_ASSERT(allow_macro_instructions_);
1848    VIXL_ASSERT(OutsideITBlock());
1849    MacroEmissionCheckScope guard(this);
1850    ITScope it_scope(this, &cond);
1851    ldaex(cond, rt, operand);
1852  }
1853  void Ldaex(Register rt, const MemOperand& operand) { Ldaex(al, rt, operand); }
1854
1855  void Ldaexb(Condition cond, Register rt, const MemOperand& operand) {
1856    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1857    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1858    VIXL_ASSERT(allow_macro_instructions_);
1859    VIXL_ASSERT(OutsideITBlock());
1860    MacroEmissionCheckScope guard(this);
1861    ITScope it_scope(this, &cond);
1862    ldaexb(cond, rt, operand);
1863  }
1864  void Ldaexb(Register rt, const MemOperand& operand) {
1865    Ldaexb(al, rt, operand);
1866  }
1867
1868  void Ldaexd(Condition cond,
1869              Register rt,
1870              Register rt2,
1871              const MemOperand& operand) {
1872    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1873    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
1874    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1875    VIXL_ASSERT(allow_macro_instructions_);
1876    VIXL_ASSERT(OutsideITBlock());
1877    MacroEmissionCheckScope guard(this);
1878    ITScope it_scope(this, &cond);
1879    ldaexd(cond, rt, rt2, operand);
1880  }
1881  void Ldaexd(Register rt, Register rt2, const MemOperand& operand) {
1882    Ldaexd(al, rt, rt2, operand);
1883  }
1884
1885  void Ldaexh(Condition cond, Register rt, const MemOperand& operand) {
1886    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1887    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1888    VIXL_ASSERT(allow_macro_instructions_);
1889    VIXL_ASSERT(OutsideITBlock());
1890    MacroEmissionCheckScope guard(this);
1891    ITScope it_scope(this, &cond);
1892    ldaexh(cond, rt, operand);
1893  }
1894  void Ldaexh(Register rt, const MemOperand& operand) {
1895    Ldaexh(al, rt, operand);
1896  }
1897
1898  void Ldah(Condition cond, Register rt, const MemOperand& operand) {
1899    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1900    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1901    VIXL_ASSERT(allow_macro_instructions_);
1902    VIXL_ASSERT(OutsideITBlock());
1903    MacroEmissionCheckScope guard(this);
1904    ITScope it_scope(this, &cond);
1905    ldah(cond, rt, operand);
1906  }
1907  void Ldah(Register rt, const MemOperand& operand) { Ldah(al, rt, operand); }
1908
1909  void Ldm(Condition cond,
1910           Register rn,
1911           WriteBack write_back,
1912           RegisterList registers) {
1913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1914    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1915    VIXL_ASSERT(allow_macro_instructions_);
1916    VIXL_ASSERT(OutsideITBlock());
1917    MacroEmissionCheckScope guard(this);
1918    ITScope it_scope(this, &cond);
1919    ldm(cond, rn, write_back, registers);
1920  }
1921  void Ldm(Register rn, WriteBack write_back, RegisterList registers) {
1922    Ldm(al, rn, write_back, registers);
1923  }
1924
1925  void Ldmda(Condition cond,
1926             Register rn,
1927             WriteBack write_back,
1928             RegisterList registers) {
1929    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1930    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1931    VIXL_ASSERT(allow_macro_instructions_);
1932    VIXL_ASSERT(OutsideITBlock());
1933    MacroEmissionCheckScope guard(this);
1934    ITScope it_scope(this, &cond);
1935    ldmda(cond, rn, write_back, registers);
1936  }
1937  void Ldmda(Register rn, WriteBack write_back, RegisterList registers) {
1938    Ldmda(al, rn, write_back, registers);
1939  }
1940
1941  void Ldmdb(Condition cond,
1942             Register rn,
1943             WriteBack write_back,
1944             RegisterList registers) {
1945    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1946    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1947    VIXL_ASSERT(allow_macro_instructions_);
1948    VIXL_ASSERT(OutsideITBlock());
1949    MacroEmissionCheckScope guard(this);
1950    ITScope it_scope(this, &cond);
1951    ldmdb(cond, rn, write_back, registers);
1952  }
1953  void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) {
1954    Ldmdb(al, rn, write_back, registers);
1955  }
1956
1957  void Ldmea(Condition cond,
1958             Register rn,
1959             WriteBack write_back,
1960             RegisterList registers) {
1961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1962    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1963    VIXL_ASSERT(allow_macro_instructions_);
1964    VIXL_ASSERT(OutsideITBlock());
1965    MacroEmissionCheckScope guard(this);
1966    ITScope it_scope(this, &cond);
1967    ldmea(cond, rn, write_back, registers);
1968  }
1969  void Ldmea(Register rn, WriteBack write_back, RegisterList registers) {
1970    Ldmea(al, rn, write_back, registers);
1971  }
1972
1973  void Ldmed(Condition cond,
1974             Register rn,
1975             WriteBack write_back,
1976             RegisterList registers) {
1977    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1978    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1979    VIXL_ASSERT(allow_macro_instructions_);
1980    VIXL_ASSERT(OutsideITBlock());
1981    MacroEmissionCheckScope guard(this);
1982    ITScope it_scope(this, &cond);
1983    ldmed(cond, rn, write_back, registers);
1984  }
1985  void Ldmed(Register rn, WriteBack write_back, RegisterList registers) {
1986    Ldmed(al, rn, write_back, registers);
1987  }
1988
1989  void Ldmfa(Condition cond,
1990             Register rn,
1991             WriteBack write_back,
1992             RegisterList registers) {
1993    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1994    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1995    VIXL_ASSERT(allow_macro_instructions_);
1996    VIXL_ASSERT(OutsideITBlock());
1997    MacroEmissionCheckScope guard(this);
1998    ITScope it_scope(this, &cond);
1999    ldmfa(cond, rn, write_back, registers);
2000  }
2001  void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) {
2002    Ldmfa(al, rn, write_back, registers);
2003  }
2004
2005  void Ldmfd(Condition cond,
2006             Register rn,
2007             WriteBack write_back,
2008             RegisterList registers) {
2009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2010    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2011    VIXL_ASSERT(allow_macro_instructions_);
2012    VIXL_ASSERT(OutsideITBlock());
2013    MacroEmissionCheckScope guard(this);
2014    ITScope it_scope(this, &cond);
2015    ldmfd(cond, rn, write_back, registers);
2016  }
2017  void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) {
2018    Ldmfd(al, rn, write_back, registers);
2019  }
2020
2021  void Ldmib(Condition cond,
2022             Register rn,
2023             WriteBack write_back,
2024             RegisterList registers) {
2025    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2026    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2027    VIXL_ASSERT(allow_macro_instructions_);
2028    VIXL_ASSERT(OutsideITBlock());
2029    MacroEmissionCheckScope guard(this);
2030    ITScope it_scope(this, &cond);
2031    ldmib(cond, rn, write_back, registers);
2032  }
2033  void Ldmib(Register rn, WriteBack write_back, RegisterList registers) {
2034    Ldmib(al, rn, write_back, registers);
2035  }
2036
2037  void Ldr(Condition cond, Register rt, const MemOperand& operand) {
2038    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2039    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2040    VIXL_ASSERT(allow_macro_instructions_);
2041    VIXL_ASSERT(OutsideITBlock());
2042    MacroEmissionCheckScope guard(this);
2043    bool can_use_it =
2044        // LDR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2045        (operand.IsImmediate() && rt.IsLow() &&
2046         operand.GetBaseRegister().IsLow() &&
2047         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
2048         (operand.GetAddrMode() == Offset)) ||
2049        // LDR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
2050        (operand.IsImmediate() && rt.IsLow() &&
2051         operand.GetBaseRegister().IsSP() &&
2052         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
2053         (operand.GetAddrMode() == Offset)) ||
2054        // LDR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2055        (operand.IsPlainRegister() && rt.IsLow() &&
2056         operand.GetBaseRegister().IsLow() &&
2057         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2058         (operand.GetAddrMode() == Offset));
2059    ITScope it_scope(this, &cond, can_use_it);
2060    ldr(cond, rt, operand);
2061  }
2062  void Ldr(Register rt, const MemOperand& operand) { Ldr(al, rt, operand); }
2063
2064  void Ldr(Condition cond, Register rt, Label* label) {
2065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2066    VIXL_ASSERT(allow_macro_instructions_);
2067    VIXL_ASSERT(OutsideITBlock());
2068    MacroEmissionCheckScope guard(this);
2069    ITScope it_scope(this, &cond);
2070    ldr(cond, rt, label);
2071  }
2072  void Ldr(Register rt, Label* label) { Ldr(al, rt, label); }
2073
2074  void Ldrb(Condition cond, Register rt, const MemOperand& operand) {
2075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2076    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2077    VIXL_ASSERT(allow_macro_instructions_);
2078    VIXL_ASSERT(OutsideITBlock());
2079    MacroEmissionCheckScope guard(this);
2080    bool can_use_it =
2081        // LDRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2082        (operand.IsImmediate() && rt.IsLow() &&
2083         operand.GetBaseRegister().IsLow() &&
2084         operand.IsOffsetImmediateWithinRange(0, 31) &&
2085         (operand.GetAddrMode() == Offset)) ||
2086        // LDRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2087        (operand.IsPlainRegister() && rt.IsLow() &&
2088         operand.GetBaseRegister().IsLow() &&
2089         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2090         (operand.GetAddrMode() == Offset));
2091    ITScope it_scope(this, &cond, can_use_it);
2092    ldrb(cond, rt, operand);
2093  }
2094  void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); }
2095
2096  void Ldrb(Condition cond, Register rt, Label* label) {
2097    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2098    VIXL_ASSERT(allow_macro_instructions_);
2099    VIXL_ASSERT(OutsideITBlock());
2100    MacroEmissionCheckScope guard(this);
2101    ITScope it_scope(this, &cond);
2102    ldrb(cond, rt, label);
2103  }
2104  void Ldrb(Register rt, Label* label) { Ldrb(al, rt, label); }
2105
2106  void Ldrd(Condition cond,
2107            Register rt,
2108            Register rt2,
2109            const MemOperand& operand) {
2110    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2112    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2113    VIXL_ASSERT(allow_macro_instructions_);
2114    VIXL_ASSERT(OutsideITBlock());
2115    MacroEmissionCheckScope guard(this);
2116    ITScope it_scope(this, &cond);
2117    ldrd(cond, rt, rt2, operand);
2118  }
2119  void Ldrd(Register rt, Register rt2, const MemOperand& operand) {
2120    Ldrd(al, rt, rt2, operand);
2121  }
2122
2123  void Ldrd(Condition cond, Register rt, Register rt2, Label* label) {
2124    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2125    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2126    VIXL_ASSERT(allow_macro_instructions_);
2127    VIXL_ASSERT(OutsideITBlock());
2128    MacroEmissionCheckScope guard(this);
2129    ITScope it_scope(this, &cond);
2130    ldrd(cond, rt, rt2, label);
2131  }
2132  void Ldrd(Register rt, Register rt2, Label* label) {
2133    Ldrd(al, rt, rt2, label);
2134  }
2135
2136  void Ldrex(Condition cond, Register rt, const MemOperand& operand) {
2137    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2138    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2139    VIXL_ASSERT(allow_macro_instructions_);
2140    VIXL_ASSERT(OutsideITBlock());
2141    MacroEmissionCheckScope guard(this);
2142    ITScope it_scope(this, &cond);
2143    ldrex(cond, rt, operand);
2144  }
2145  void Ldrex(Register rt, const MemOperand& operand) { Ldrex(al, rt, operand); }
2146
2147  void Ldrexb(Condition cond, Register rt, const MemOperand& operand) {
2148    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2149    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2150    VIXL_ASSERT(allow_macro_instructions_);
2151    VIXL_ASSERT(OutsideITBlock());
2152    MacroEmissionCheckScope guard(this);
2153    ITScope it_scope(this, &cond);
2154    ldrexb(cond, rt, operand);
2155  }
2156  void Ldrexb(Register rt, const MemOperand& operand) {
2157    Ldrexb(al, rt, operand);
2158  }
2159
2160  void Ldrexd(Condition cond,
2161              Register rt,
2162              Register rt2,
2163              const MemOperand& operand) {
2164    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2165    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2166    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2167    VIXL_ASSERT(allow_macro_instructions_);
2168    VIXL_ASSERT(OutsideITBlock());
2169    MacroEmissionCheckScope guard(this);
2170    ITScope it_scope(this, &cond);
2171    ldrexd(cond, rt, rt2, operand);
2172  }
2173  void Ldrexd(Register rt, Register rt2, const MemOperand& operand) {
2174    Ldrexd(al, rt, rt2, operand);
2175  }
2176
2177  void Ldrexh(Condition cond, Register rt, const MemOperand& operand) {
2178    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2179    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2180    VIXL_ASSERT(allow_macro_instructions_);
2181    VIXL_ASSERT(OutsideITBlock());
2182    MacroEmissionCheckScope guard(this);
2183    ITScope it_scope(this, &cond);
2184    ldrexh(cond, rt, operand);
2185  }
2186  void Ldrexh(Register rt, const MemOperand& operand) {
2187    Ldrexh(al, rt, operand);
2188  }
2189
2190  void Ldrh(Condition cond, Register rt, const MemOperand& operand) {
2191    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2192    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2193    VIXL_ASSERT(allow_macro_instructions_);
2194    VIXL_ASSERT(OutsideITBlock());
2195    MacroEmissionCheckScope guard(this);
2196    bool can_use_it =
2197        // LDRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2198        (operand.IsImmediate() && rt.IsLow() &&
2199         operand.GetBaseRegister().IsLow() &&
2200         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
2201         (operand.GetAddrMode() == Offset)) ||
2202        // LDRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2203        (operand.IsPlainRegister() && rt.IsLow() &&
2204         operand.GetBaseRegister().IsLow() &&
2205         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2206         (operand.GetAddrMode() == Offset));
2207    ITScope it_scope(this, &cond, can_use_it);
2208    ldrh(cond, rt, operand);
2209  }
2210  void Ldrh(Register rt, const MemOperand& operand) { Ldrh(al, rt, operand); }
2211
2212  void Ldrh(Condition cond, Register rt, Label* label) {
2213    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2214    VIXL_ASSERT(allow_macro_instructions_);
2215    VIXL_ASSERT(OutsideITBlock());
2216    MacroEmissionCheckScope guard(this);
2217    ITScope it_scope(this, &cond);
2218    ldrh(cond, rt, label);
2219  }
2220  void Ldrh(Register rt, Label* label) { Ldrh(al, rt, label); }
2221
2222  void Ldrsb(Condition cond, Register rt, const MemOperand& operand) {
2223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2224    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2225    VIXL_ASSERT(allow_macro_instructions_);
2226    VIXL_ASSERT(OutsideITBlock());
2227    MacroEmissionCheckScope guard(this);
2228    bool can_use_it =
2229        // LDRSB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2230        operand.IsPlainRegister() && rt.IsLow() &&
2231        operand.GetBaseRegister().IsLow() &&
2232        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2233        (operand.GetAddrMode() == Offset);
2234    ITScope it_scope(this, &cond, can_use_it);
2235    ldrsb(cond, rt, operand);
2236  }
2237  void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); }
2238
2239  void Ldrsb(Condition cond, Register rt, Label* label) {
2240    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2241    VIXL_ASSERT(allow_macro_instructions_);
2242    VIXL_ASSERT(OutsideITBlock());
2243    MacroEmissionCheckScope guard(this);
2244    ITScope it_scope(this, &cond);
2245    ldrsb(cond, rt, label);
2246  }
2247  void Ldrsb(Register rt, Label* label) { Ldrsb(al, rt, label); }
2248
2249  void Ldrsh(Condition cond, Register rt, const MemOperand& operand) {
2250    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2251    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2252    VIXL_ASSERT(allow_macro_instructions_);
2253    VIXL_ASSERT(OutsideITBlock());
2254    MacroEmissionCheckScope guard(this);
2255    bool can_use_it =
2256        // LDRSH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2257        operand.IsPlainRegister() && rt.IsLow() &&
2258        operand.GetBaseRegister().IsLow() &&
2259        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2260        (operand.GetAddrMode() == Offset);
2261    ITScope it_scope(this, &cond, can_use_it);
2262    ldrsh(cond, rt, operand);
2263  }
2264  void Ldrsh(Register rt, const MemOperand& operand) { Ldrsh(al, rt, operand); }
2265
2266  void Ldrsh(Condition cond, Register rt, Label* label) {
2267    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2268    VIXL_ASSERT(allow_macro_instructions_);
2269    VIXL_ASSERT(OutsideITBlock());
2270    MacroEmissionCheckScope guard(this);
2271    ITScope it_scope(this, &cond);
2272    ldrsh(cond, rt, label);
2273  }
2274  void Ldrsh(Register rt, Label* label) { Ldrsh(al, rt, label); }
2275
2276  void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) {
2277    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2278    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2279    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2280    VIXL_ASSERT(allow_macro_instructions_);
2281    VIXL_ASSERT(OutsideITBlock());
2282    MacroEmissionCheckScope guard(this);
2283    bool can_use_it =
2284        // LSL<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2285        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2286         (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) ||
2287        // LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2288        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2289         operand.GetBaseRegister().IsLow());
2290    ITScope it_scope(this, &cond, can_use_it);
2291    lsl(cond, rd, rm, operand);
2292  }
2293  void Lsl(Register rd, Register rm, const Operand& operand) {
2294    Lsl(al, rd, rm, operand);
2295  }
2296  void Lsl(FlagsUpdate flags,
2297           Condition cond,
2298           Register rd,
2299           Register rm,
2300           const Operand& operand) {
2301    switch (flags) {
2302      case LeaveFlags:
2303        Lsl(cond, rd, rm, operand);
2304        break;
2305      case SetFlags:
2306        Lsls(cond, rd, rm, operand);
2307        break;
2308      case DontCare:
2309        bool setflags_is_smaller =
2310            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2311            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2312              (operand.GetImmediate() < 32)) ||
2313             (operand.IsPlainRegister() && rd.Is(rm)));
2314        if (setflags_is_smaller) {
2315          Lsls(cond, rd, rm, operand);
2316        } else {
2317          Lsl(cond, rd, rm, operand);
2318        }
2319        break;
2320    }
2321  }
2322  void Lsl(FlagsUpdate flags,
2323           Register rd,
2324           Register rm,
2325           const Operand& operand) {
2326    Lsl(flags, al, rd, rm, operand);
2327  }
2328
2329  void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) {
2330    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2331    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2332    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2333    VIXL_ASSERT(allow_macro_instructions_);
2334    VIXL_ASSERT(OutsideITBlock());
2335    MacroEmissionCheckScope guard(this);
2336    ITScope it_scope(this, &cond);
2337    lsls(cond, rd, rm, operand);
2338  }
2339  void Lsls(Register rd, Register rm, const Operand& operand) {
2340    Lsls(al, rd, rm, operand);
2341  }
2342
2343  void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) {
2344    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2345    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2346    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2347    VIXL_ASSERT(allow_macro_instructions_);
2348    VIXL_ASSERT(OutsideITBlock());
2349    MacroEmissionCheckScope guard(this);
2350    bool can_use_it =
2351        // LSR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2352        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2353         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
2354        // LSR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2355        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2356         operand.GetBaseRegister().IsLow());
2357    ITScope it_scope(this, &cond, can_use_it);
2358    lsr(cond, rd, rm, operand);
2359  }
2360  void Lsr(Register rd, Register rm, const Operand& operand) {
2361    Lsr(al, rd, rm, operand);
2362  }
2363  void Lsr(FlagsUpdate flags,
2364           Condition cond,
2365           Register rd,
2366           Register rm,
2367           const Operand& operand) {
2368    switch (flags) {
2369      case LeaveFlags:
2370        Lsr(cond, rd, rm, operand);
2371        break;
2372      case SetFlags:
2373        Lsrs(cond, rd, rm, operand);
2374        break;
2375      case DontCare:
2376        bool setflags_is_smaller =
2377            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2378            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2379              (operand.GetImmediate() <= 32)) ||
2380             (operand.IsPlainRegister() && rd.Is(rm)));
2381        if (setflags_is_smaller) {
2382          Lsrs(cond, rd, rm, operand);
2383        } else {
2384          Lsr(cond, rd, rm, operand);
2385        }
2386        break;
2387    }
2388  }
2389  void Lsr(FlagsUpdate flags,
2390           Register rd,
2391           Register rm,
2392           const Operand& operand) {
2393    Lsr(flags, al, rd, rm, operand);
2394  }
2395
2396  void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) {
2397    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2398    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2399    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2400    VIXL_ASSERT(allow_macro_instructions_);
2401    VIXL_ASSERT(OutsideITBlock());
2402    MacroEmissionCheckScope guard(this);
2403    ITScope it_scope(this, &cond);
2404    lsrs(cond, rd, rm, operand);
2405  }
2406  void Lsrs(Register rd, Register rm, const Operand& operand) {
2407    Lsrs(al, rd, rm, operand);
2408  }
2409
2410  void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2411    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2412    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2413    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2414    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2415    VIXL_ASSERT(allow_macro_instructions_);
2416    VIXL_ASSERT(OutsideITBlock());
2417    MacroEmissionCheckScope guard(this);
2418    ITScope it_scope(this, &cond);
2419    mla(cond, rd, rn, rm, ra);
2420  }
2421  void Mla(Register rd, Register rn, Register rm, Register ra) {
2422    Mla(al, rd, rn, rm, ra);
2423  }
2424  void Mla(FlagsUpdate flags,
2425           Condition cond,
2426           Register rd,
2427           Register rn,
2428           Register rm,
2429           Register ra) {
2430    switch (flags) {
2431      case LeaveFlags:
2432        Mla(cond, rd, rn, rm, ra);
2433        break;
2434      case SetFlags:
2435        Mlas(cond, rd, rn, rm, ra);
2436        break;
2437      case DontCare:
2438        Mla(cond, rd, rn, rm, ra);
2439        break;
2440    }
2441  }
2442  void Mla(
2443      FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) {
2444    Mla(flags, al, rd, rn, rm, ra);
2445  }
2446
2447  void Mlas(
2448      Condition cond, Register rd, Register rn, Register rm, Register ra) {
2449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2450    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2451    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2452    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2453    VIXL_ASSERT(allow_macro_instructions_);
2454    VIXL_ASSERT(OutsideITBlock());
2455    MacroEmissionCheckScope guard(this);
2456    ITScope it_scope(this, &cond);
2457    mlas(cond, rd, rn, rm, ra);
2458  }
2459  void Mlas(Register rd, Register rn, Register rm, Register ra) {
2460    Mlas(al, rd, rn, rm, ra);
2461  }
2462
2463  void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2464    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2465    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2466    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2467    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2468    VIXL_ASSERT(allow_macro_instructions_);
2469    VIXL_ASSERT(OutsideITBlock());
2470    MacroEmissionCheckScope guard(this);
2471    ITScope it_scope(this, &cond);
2472    mls(cond, rd, rn, rm, ra);
2473  }
2474  void Mls(Register rd, Register rn, Register rm, Register ra) {
2475    Mls(al, rd, rn, rm, ra);
2476  }
2477
2478  void Mov(Condition cond, Register rd, const Operand& operand) {
2479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2480    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2481    VIXL_ASSERT(allow_macro_instructions_);
2482    VIXL_ASSERT(OutsideITBlock());
2483    MacroEmissionCheckScope guard(this);
2484    bool can_use_it =
2485        // MOV<c>{<q>} <Rd>, #<imm8> ; T1
2486        (operand.IsImmediate() && rd.IsLow() &&
2487         (operand.GetImmediate() <= 255)) ||
2488        // MOV{<c>}{<q>} <Rd>, <Rm> ; T1
2489        (operand.IsPlainRegister() && !rd.IsPC() &&
2490         !operand.GetBaseRegister().IsPC()) ||
2491        // MOV<c>{<q>} <Rd>, <Rm> {, <shift> #<amount>} ; T2
2492        (operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2493         operand.GetBaseRegister().IsLow() &&
2494         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2495          operand.GetShift().Is(ASR))) ||
2496        // MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs> ; T1
2497        // MOV<c>{<q>} <Rdm>, <Rdm>, LSR <Rs> ; T1
2498        // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1
2499        // MOV<c>{<q>} <Rdm>, <Rdm>, ROR <Rs> ; T1
2500        (operand.IsRegisterShiftedRegister() &&
2501         rd.Is(operand.GetBaseRegister()) && rd.IsLow() &&
2502         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2503          operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) &&
2504         operand.GetShiftRegister().IsLow());
2505    ITScope it_scope(this, &cond, can_use_it);
2506    mov(cond, rd, operand);
2507  }
2508  void Mov(Register rd, const Operand& operand) { Mov(al, rd, operand); }
2509  void Mov(FlagsUpdate flags,
2510           Condition cond,
2511           Register rd,
2512           const Operand& operand) {
2513    switch (flags) {
2514      case LeaveFlags:
2515        Mov(cond, rd, operand);
2516        break;
2517      case SetFlags:
2518        Movs(cond, rd, operand);
2519        break;
2520      case DontCare:
2521        bool setflags_is_smaller =
2522            IsUsingT32() && cond.Is(al) &&
2523            ((operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2524              operand.GetBaseRegister().IsLow() &&
2525              (operand.GetShiftAmount() >= 1) &&
2526              (((operand.GetShiftAmount() <= 32) &&
2527                ((operand.GetShift().IsLSR() || operand.GetShift().IsASR()))) ||
2528               ((operand.GetShiftAmount() < 32) &&
2529                operand.GetShift().IsLSL()))) ||
2530             (operand.IsRegisterShiftedRegister() && rd.IsLow() &&
2531              operand.GetBaseRegister().Is(rd) &&
2532              operand.GetShiftRegister().IsLow() &&
2533              (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() ||
2534               operand.GetShift().IsASR() || operand.GetShift().IsROR())) ||
2535             (operand.IsImmediate() && rd.IsLow() &&
2536              (operand.GetImmediate() < 256)));
2537        if (setflags_is_smaller) {
2538          Movs(cond, rd, operand);
2539        } else {
2540          Mov(cond, rd, operand);
2541        }
2542        break;
2543    }
2544  }
2545  void Mov(FlagsUpdate flags, Register rd, const Operand& operand) {
2546    Mov(flags, al, rd, operand);
2547  }
2548
2549  void Movs(Condition cond, Register rd, const Operand& operand) {
2550    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2551    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2552    VIXL_ASSERT(allow_macro_instructions_);
2553    VIXL_ASSERT(OutsideITBlock());
2554    MacroEmissionCheckScope guard(this);
2555    ITScope it_scope(this, &cond);
2556    movs(cond, rd, operand);
2557  }
2558  void Movs(Register rd, const Operand& operand) { Movs(al, rd, operand); }
2559
2560  void Movt(Condition cond, Register rd, const Operand& operand) {
2561    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2562    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2563    VIXL_ASSERT(allow_macro_instructions_);
2564    VIXL_ASSERT(OutsideITBlock());
2565    MacroEmissionCheckScope guard(this);
2566    ITScope it_scope(this, &cond);
2567    movt(cond, rd, operand);
2568  }
2569  void Movt(Register rd, const Operand& operand) { Movt(al, rd, operand); }
2570
2571
2572  void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
2573    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2574    VIXL_ASSERT(allow_macro_instructions_);
2575    VIXL_ASSERT(OutsideITBlock());
2576    MacroEmissionCheckScope guard(this);
2577    ITScope it_scope(this, &cond);
2578    mrs(cond, rd, spec_reg);
2579  }
2580  void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); }
2581
2582  void Msr(Condition cond,
2583           MaskedSpecialRegister spec_reg,
2584           const Operand& operand) {
2585    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2586    VIXL_ASSERT(allow_macro_instructions_);
2587    VIXL_ASSERT(OutsideITBlock());
2588    MacroEmissionCheckScope guard(this);
2589    ITScope it_scope(this, &cond);
2590    msr(cond, spec_reg, operand);
2591  }
2592  void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) {
2593    Msr(al, spec_reg, operand);
2594  }
2595
2596  void Mul(Condition cond, Register rd, Register rn, Register rm) {
2597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2599    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2600    VIXL_ASSERT(allow_macro_instructions_);
2601    VIXL_ASSERT(OutsideITBlock());
2602    MacroEmissionCheckScope guard(this);
2603    bool can_use_it =
2604        // MUL<c>{<q>} <Rdm>, <Rn>{, <Rdm>} ; T1
2605        rd.Is(rm) && rn.IsLow() && rm.IsLow();
2606    ITScope it_scope(this, &cond, can_use_it);
2607    mul(cond, rd, rn, rm);
2608  }
2609  void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); }
2610  void Mul(FlagsUpdate flags,
2611           Condition cond,
2612           Register rd,
2613           Register rn,
2614           Register rm) {
2615    switch (flags) {
2616      case LeaveFlags:
2617        Mul(cond, rd, rn, rm);
2618        break;
2619      case SetFlags:
2620        Muls(cond, rd, rn, rm);
2621        break;
2622      case DontCare:
2623        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2624                                   rn.IsLow() && rm.Is(rd);
2625        if (setflags_is_smaller) {
2626          Muls(cond, rd, rn, rm);
2627        } else {
2628          Mul(cond, rd, rn, rm);
2629        }
2630        break;
2631    }
2632  }
2633  void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) {
2634    Mul(flags, al, rd, rn, rm);
2635  }
2636
2637  void Muls(Condition cond, Register rd, Register rn, Register rm) {
2638    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2639    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2640    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2641    VIXL_ASSERT(allow_macro_instructions_);
2642    VIXL_ASSERT(OutsideITBlock());
2643    MacroEmissionCheckScope guard(this);
2644    ITScope it_scope(this, &cond);
2645    muls(cond, rd, rn, rm);
2646  }
2647  void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); }
2648
2649  void Mvn(Condition cond, Register rd, const Operand& operand) {
2650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2651    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2652    VIXL_ASSERT(allow_macro_instructions_);
2653    VIXL_ASSERT(OutsideITBlock());
2654    MacroEmissionCheckScope guard(this);
2655    bool can_use_it =
2656        // MVN<c>{<q>} <Rd>, <Rm> ; T1
2657        operand.IsPlainRegister() && rd.IsLow() &&
2658        operand.GetBaseRegister().IsLow();
2659    ITScope it_scope(this, &cond, can_use_it);
2660    mvn(cond, rd, operand);
2661  }
2662  void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); }
2663  void Mvn(FlagsUpdate flags,
2664           Condition cond,
2665           Register rd,
2666           const Operand& operand) {
2667    switch (flags) {
2668      case LeaveFlags:
2669        Mvn(cond, rd, operand);
2670        break;
2671      case SetFlags:
2672        Mvns(cond, rd, operand);
2673        break;
2674      case DontCare:
2675        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2676                                   operand.IsPlainRegister() &&
2677                                   operand.GetBaseRegister().IsLow();
2678        if (setflags_is_smaller) {
2679          Mvns(cond, rd, operand);
2680        } else {
2681          Mvn(cond, rd, operand);
2682        }
2683        break;
2684    }
2685  }
2686  void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) {
2687    Mvn(flags, al, rd, operand);
2688  }
2689
2690  void Mvns(Condition cond, Register rd, const Operand& operand) {
2691    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2692    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2693    VIXL_ASSERT(allow_macro_instructions_);
2694    VIXL_ASSERT(OutsideITBlock());
2695    MacroEmissionCheckScope guard(this);
2696    ITScope it_scope(this, &cond);
2697    mvns(cond, rd, operand);
2698  }
2699  void Mvns(Register rd, const Operand& operand) { Mvns(al, rd, operand); }
2700
2701  void Nop(Condition cond) {
2702    VIXL_ASSERT(allow_macro_instructions_);
2703    VIXL_ASSERT(OutsideITBlock());
2704    MacroEmissionCheckScope guard(this);
2705    ITScope it_scope(this, &cond);
2706    nop(cond);
2707  }
2708  void Nop() { Nop(al); }
2709
2710  void Orn(Condition cond, Register rd, Register rn, const Operand& operand) {
2711    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2712    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2713    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2714    VIXL_ASSERT(allow_macro_instructions_);
2715    VIXL_ASSERT(OutsideITBlock());
2716    MacroEmissionCheckScope guard(this);
2717    if (cond.Is(al) && operand.IsImmediate()) {
2718      uint32_t immediate = operand.GetImmediate();
2719      if (immediate == 0) {
2720        mvn(rd, 0);
2721        return;
2722      }
2723      if ((immediate == 0xffffffff) && rd.Is(rn)) {
2724        return;
2725      }
2726    }
2727    ITScope it_scope(this, &cond);
2728    orn(cond, rd, rn, operand);
2729  }
2730  void Orn(Register rd, Register rn, const Operand& operand) {
2731    Orn(al, rd, rn, operand);
2732  }
2733  void Orn(FlagsUpdate flags,
2734           Condition cond,
2735           Register rd,
2736           Register rn,
2737           const Operand& operand) {
2738    switch (flags) {
2739      case LeaveFlags:
2740        Orn(cond, rd, rn, operand);
2741        break;
2742      case SetFlags:
2743        Orns(cond, rd, rn, operand);
2744        break;
2745      case DontCare:
2746        Orn(cond, rd, rn, operand);
2747        break;
2748    }
2749  }
2750  void Orn(FlagsUpdate flags,
2751           Register rd,
2752           Register rn,
2753           const Operand& operand) {
2754    Orn(flags, al, rd, rn, operand);
2755  }
2756
2757  void Orns(Condition cond, Register rd, Register rn, const Operand& operand) {
2758    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2759    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2760    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2761    VIXL_ASSERT(allow_macro_instructions_);
2762    VIXL_ASSERT(OutsideITBlock());
2763    MacroEmissionCheckScope guard(this);
2764    ITScope it_scope(this, &cond);
2765    orns(cond, rd, rn, operand);
2766  }
2767  void Orns(Register rd, Register rn, const Operand& operand) {
2768    Orns(al, rd, rn, operand);
2769  }
2770
2771  void Orr(Condition cond, Register rd, Register rn, const Operand& operand) {
2772    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2773    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2774    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2775    VIXL_ASSERT(allow_macro_instructions_);
2776    VIXL_ASSERT(OutsideITBlock());
2777    MacroEmissionCheckScope guard(this);
2778    if (cond.Is(al) && operand.IsImmediate()) {
2779      uint32_t immediate = operand.GetImmediate();
2780      if ((immediate == 0) && rd.Is(rn)) {
2781        return;
2782      }
2783      if (immediate == 0xffffffff) {
2784        mvn(rd, 0);
2785        return;
2786      }
2787    }
2788    bool can_use_it =
2789        // ORR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
2790        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
2791        operand.GetBaseRegister().IsLow();
2792    ITScope it_scope(this, &cond, can_use_it);
2793    orr(cond, rd, rn, operand);
2794  }
2795  void Orr(Register rd, Register rn, const Operand& operand) {
2796    Orr(al, rd, rn, operand);
2797  }
2798  void Orr(FlagsUpdate flags,
2799           Condition cond,
2800           Register rd,
2801           Register rn,
2802           const Operand& operand) {
2803    switch (flags) {
2804      case LeaveFlags:
2805        Orr(cond, rd, rn, operand);
2806        break;
2807      case SetFlags:
2808        Orrs(cond, rd, rn, operand);
2809        break;
2810      case DontCare:
2811        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2812                                   rn.Is(rd) && operand.IsPlainRegister() &&
2813                                   operand.GetBaseRegister().IsLow();
2814        if (setflags_is_smaller) {
2815          Orrs(cond, rd, rn, operand);
2816        } else {
2817          Orr(cond, rd, rn, operand);
2818        }
2819        break;
2820    }
2821  }
2822  void Orr(FlagsUpdate flags,
2823           Register rd,
2824           Register rn,
2825           const Operand& operand) {
2826    Orr(flags, al, rd, rn, operand);
2827  }
2828
2829  void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) {
2830    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2831    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2832    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2833    VIXL_ASSERT(allow_macro_instructions_);
2834    VIXL_ASSERT(OutsideITBlock());
2835    MacroEmissionCheckScope guard(this);
2836    ITScope it_scope(this, &cond);
2837    orrs(cond, rd, rn, operand);
2838  }
2839  void Orrs(Register rd, Register rn, const Operand& operand) {
2840    Orrs(al, rd, rn, operand);
2841  }
2842
2843  void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) {
2844    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2846    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2847    VIXL_ASSERT(allow_macro_instructions_);
2848    VIXL_ASSERT(OutsideITBlock());
2849    MacroEmissionCheckScope guard(this);
2850    ITScope it_scope(this, &cond);
2851    pkhbt(cond, rd, rn, operand);
2852  }
2853  void Pkhbt(Register rd, Register rn, const Operand& operand) {
2854    Pkhbt(al, rd, rn, operand);
2855  }
2856
2857  void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) {
2858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2860    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2861    VIXL_ASSERT(allow_macro_instructions_);
2862    VIXL_ASSERT(OutsideITBlock());
2863    MacroEmissionCheckScope guard(this);
2864    ITScope it_scope(this, &cond);
2865    pkhtb(cond, rd, rn, operand);
2866  }
2867  void Pkhtb(Register rd, Register rn, const Operand& operand) {
2868    Pkhtb(al, rd, rn, operand);
2869  }
2870
2871  void Pld(Condition cond, Label* label) {
2872    VIXL_ASSERT(allow_macro_instructions_);
2873    VIXL_ASSERT(OutsideITBlock());
2874    MacroEmissionCheckScope guard(this);
2875    ITScope it_scope(this, &cond);
2876    pld(cond, label);
2877  }
2878  void Pld(Label* label) { Pld(al, label); }
2879
2880  void Pld(Condition cond, const MemOperand& operand) {
2881    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2882    VIXL_ASSERT(allow_macro_instructions_);
2883    VIXL_ASSERT(OutsideITBlock());
2884    MacroEmissionCheckScope guard(this);
2885    ITScope it_scope(this, &cond);
2886    pld(cond, operand);
2887  }
2888  void Pld(const MemOperand& operand) { Pld(al, operand); }
2889
2890  void Pldw(Condition cond, const MemOperand& operand) {
2891    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2892    VIXL_ASSERT(allow_macro_instructions_);
2893    VIXL_ASSERT(OutsideITBlock());
2894    MacroEmissionCheckScope guard(this);
2895    ITScope it_scope(this, &cond);
2896    pldw(cond, operand);
2897  }
2898  void Pldw(const MemOperand& operand) { Pldw(al, operand); }
2899
2900  void Pli(Condition cond, const MemOperand& operand) {
2901    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2902    VIXL_ASSERT(allow_macro_instructions_);
2903    VIXL_ASSERT(OutsideITBlock());
2904    MacroEmissionCheckScope guard(this);
2905    ITScope it_scope(this, &cond);
2906    pli(cond, operand);
2907  }
2908  void Pli(const MemOperand& operand) { Pli(al, operand); }
2909
2910  void Pli(Condition cond, Label* label) {
2911    VIXL_ASSERT(allow_macro_instructions_);
2912    VIXL_ASSERT(OutsideITBlock());
2913    MacroEmissionCheckScope guard(this);
2914    ITScope it_scope(this, &cond);
2915    pli(cond, label);
2916  }
2917  void Pli(Label* label) { Pli(al, label); }
2918
2919  void Pop(Condition cond, RegisterList registers) {
2920    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2921    VIXL_ASSERT(allow_macro_instructions_);
2922    VIXL_ASSERT(OutsideITBlock());
2923    MacroEmissionCheckScope guard(this);
2924    ITScope it_scope(this, &cond);
2925    pop(cond, registers);
2926  }
2927  void Pop(RegisterList registers) { Pop(al, registers); }
2928
2929  void Pop(Condition cond, Register rt) {
2930    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2931    VIXL_ASSERT(allow_macro_instructions_);
2932    VIXL_ASSERT(OutsideITBlock());
2933    MacroEmissionCheckScope guard(this);
2934    ITScope it_scope(this, &cond);
2935    pop(cond, rt);
2936  }
2937  void Pop(Register rt) { Pop(al, rt); }
2938
2939  void Push(Condition cond, RegisterList registers) {
2940    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2941    VIXL_ASSERT(allow_macro_instructions_);
2942    VIXL_ASSERT(OutsideITBlock());
2943    MacroEmissionCheckScope guard(this);
2944    ITScope it_scope(this, &cond);
2945    push(cond, registers);
2946  }
2947  void Push(RegisterList registers) { Push(al, registers); }
2948
2949  void Push(Condition cond, Register rt) {
2950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2951    VIXL_ASSERT(allow_macro_instructions_);
2952    VIXL_ASSERT(OutsideITBlock());
2953    MacroEmissionCheckScope guard(this);
2954    ITScope it_scope(this, &cond);
2955    push(cond, rt);
2956  }
2957  void Push(Register rt) { Push(al, rt); }
2958
2959  void Qadd(Condition cond, Register rd, Register rm, Register rn) {
2960    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2962    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2963    VIXL_ASSERT(allow_macro_instructions_);
2964    VIXL_ASSERT(OutsideITBlock());
2965    MacroEmissionCheckScope guard(this);
2966    ITScope it_scope(this, &cond);
2967    qadd(cond, rd, rm, rn);
2968  }
2969  void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); }
2970
2971  void Qadd16(Condition cond, Register rd, Register rn, Register rm) {
2972    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2973    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2975    VIXL_ASSERT(allow_macro_instructions_);
2976    VIXL_ASSERT(OutsideITBlock());
2977    MacroEmissionCheckScope guard(this);
2978    ITScope it_scope(this, &cond);
2979    qadd16(cond, rd, rn, rm);
2980  }
2981  void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); }
2982
2983  void Qadd8(Condition cond, Register rd, Register rn, Register rm) {
2984    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2985    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2986    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2987    VIXL_ASSERT(allow_macro_instructions_);
2988    VIXL_ASSERT(OutsideITBlock());
2989    MacroEmissionCheckScope guard(this);
2990    ITScope it_scope(this, &cond);
2991    qadd8(cond, rd, rn, rm);
2992  }
2993  void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); }
2994
2995  void Qasx(Condition cond, Register rd, Register rn, Register rm) {
2996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2997    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2998    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2999    VIXL_ASSERT(allow_macro_instructions_);
3000    VIXL_ASSERT(OutsideITBlock());
3001    MacroEmissionCheckScope guard(this);
3002    ITScope it_scope(this, &cond);
3003    qasx(cond, rd, rn, rm);
3004  }
3005  void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); }
3006
3007  void Qdadd(Condition cond, Register rd, Register rm, Register rn) {
3008    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3010    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3011    VIXL_ASSERT(allow_macro_instructions_);
3012    VIXL_ASSERT(OutsideITBlock());
3013    MacroEmissionCheckScope guard(this);
3014    ITScope it_scope(this, &cond);
3015    qdadd(cond, rd, rm, rn);
3016  }
3017  void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); }
3018
3019  void Qdsub(Condition cond, Register rd, Register rm, Register rn) {
3020    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3021    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3022    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3023    VIXL_ASSERT(allow_macro_instructions_);
3024    VIXL_ASSERT(OutsideITBlock());
3025    MacroEmissionCheckScope guard(this);
3026    ITScope it_scope(this, &cond);
3027    qdsub(cond, rd, rm, rn);
3028  }
3029  void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); }
3030
3031  void Qsax(Condition cond, Register rd, Register rn, Register rm) {
3032    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3033    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3034    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3035    VIXL_ASSERT(allow_macro_instructions_);
3036    VIXL_ASSERT(OutsideITBlock());
3037    MacroEmissionCheckScope guard(this);
3038    ITScope it_scope(this, &cond);
3039    qsax(cond, rd, rn, rm);
3040  }
3041  void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); }
3042
3043  void Qsub(Condition cond, Register rd, Register rm, Register rn) {
3044    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3045    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3046    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3047    VIXL_ASSERT(allow_macro_instructions_);
3048    VIXL_ASSERT(OutsideITBlock());
3049    MacroEmissionCheckScope guard(this);
3050    ITScope it_scope(this, &cond);
3051    qsub(cond, rd, rm, rn);
3052  }
3053  void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); }
3054
3055  void Qsub16(Condition cond, Register rd, Register rn, Register rm) {
3056    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3057    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3058    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3059    VIXL_ASSERT(allow_macro_instructions_);
3060    VIXL_ASSERT(OutsideITBlock());
3061    MacroEmissionCheckScope guard(this);
3062    ITScope it_scope(this, &cond);
3063    qsub16(cond, rd, rn, rm);
3064  }
3065  void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); }
3066
3067  void Qsub8(Condition cond, Register rd, Register rn, Register rm) {
3068    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3070    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3071    VIXL_ASSERT(allow_macro_instructions_);
3072    VIXL_ASSERT(OutsideITBlock());
3073    MacroEmissionCheckScope guard(this);
3074    ITScope it_scope(this, &cond);
3075    qsub8(cond, rd, rn, rm);
3076  }
3077  void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); }
3078
3079  void Rbit(Condition cond, Register rd, Register rm) {
3080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3081    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3082    VIXL_ASSERT(allow_macro_instructions_);
3083    VIXL_ASSERT(OutsideITBlock());
3084    MacroEmissionCheckScope guard(this);
3085    ITScope it_scope(this, &cond);
3086    rbit(cond, rd, rm);
3087  }
3088  void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); }
3089
3090  void Rev(Condition cond, Register rd, Register rm) {
3091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3092    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3093    VIXL_ASSERT(allow_macro_instructions_);
3094    VIXL_ASSERT(OutsideITBlock());
3095    MacroEmissionCheckScope guard(this);
3096    ITScope it_scope(this, &cond);
3097    rev(cond, rd, rm);
3098  }
3099  void Rev(Register rd, Register rm) { Rev(al, rd, rm); }
3100
3101  void Rev16(Condition cond, Register rd, Register rm) {
3102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3103    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3104    VIXL_ASSERT(allow_macro_instructions_);
3105    VIXL_ASSERT(OutsideITBlock());
3106    MacroEmissionCheckScope guard(this);
3107    ITScope it_scope(this, &cond);
3108    rev16(cond, rd, rm);
3109  }
3110  void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); }
3111
3112  void Revsh(Condition cond, Register rd, Register rm) {
3113    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3115    VIXL_ASSERT(allow_macro_instructions_);
3116    VIXL_ASSERT(OutsideITBlock());
3117    MacroEmissionCheckScope guard(this);
3118    ITScope it_scope(this, &cond);
3119    revsh(cond, rd, rm);
3120  }
3121  void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); }
3122
3123  void Ror(Condition cond, Register rd, Register rm, const Operand& operand) {
3124    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3125    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3126    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3127    VIXL_ASSERT(allow_macro_instructions_);
3128    VIXL_ASSERT(OutsideITBlock());
3129    MacroEmissionCheckScope guard(this);
3130    bool can_use_it =
3131        // ROR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
3132        operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
3133        operand.GetBaseRegister().IsLow();
3134    ITScope it_scope(this, &cond, can_use_it);
3135    ror(cond, rd, rm, operand);
3136  }
3137  void Ror(Register rd, Register rm, const Operand& operand) {
3138    Ror(al, rd, rm, operand);
3139  }
3140  void Ror(FlagsUpdate flags,
3141           Condition cond,
3142           Register rd,
3143           Register rm,
3144           const Operand& operand) {
3145    switch (flags) {
3146      case LeaveFlags:
3147        Ror(cond, rd, rm, operand);
3148        break;
3149      case SetFlags:
3150        Rors(cond, rd, rm, operand);
3151        break;
3152      case DontCare:
3153        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3154                                   rm.IsLow() && operand.IsPlainRegister() &&
3155                                   rd.Is(rm);
3156        if (setflags_is_smaller) {
3157          Rors(cond, rd, rm, operand);
3158        } else {
3159          Ror(cond, rd, rm, operand);
3160        }
3161        break;
3162    }
3163  }
3164  void Ror(FlagsUpdate flags,
3165           Register rd,
3166           Register rm,
3167           const Operand& operand) {
3168    Ror(flags, al, rd, rm, operand);
3169  }
3170
3171  void Rors(Condition cond, Register rd, Register rm, const Operand& operand) {
3172    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3173    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3174    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3175    VIXL_ASSERT(allow_macro_instructions_);
3176    VIXL_ASSERT(OutsideITBlock());
3177    MacroEmissionCheckScope guard(this);
3178    ITScope it_scope(this, &cond);
3179    rors(cond, rd, rm, operand);
3180  }
3181  void Rors(Register rd, Register rm, const Operand& operand) {
3182    Rors(al, rd, rm, operand);
3183  }
3184
3185  void Rrx(Condition cond, Register rd, Register rm) {
3186    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3187    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3188    VIXL_ASSERT(allow_macro_instructions_);
3189    VIXL_ASSERT(OutsideITBlock());
3190    MacroEmissionCheckScope guard(this);
3191    ITScope it_scope(this, &cond);
3192    rrx(cond, rd, rm);
3193  }
3194  void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); }
3195  void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) {
3196    switch (flags) {
3197      case LeaveFlags:
3198        Rrx(cond, rd, rm);
3199        break;
3200      case SetFlags:
3201        Rrxs(cond, rd, rm);
3202        break;
3203      case DontCare:
3204        Rrx(cond, rd, rm);
3205        break;
3206    }
3207  }
3208  void Rrx(FlagsUpdate flags, Register rd, Register rm) {
3209    Rrx(flags, al, rd, rm);
3210  }
3211
3212  void Rrxs(Condition cond, Register rd, Register rm) {
3213    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3214    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3215    VIXL_ASSERT(allow_macro_instructions_);
3216    VIXL_ASSERT(OutsideITBlock());
3217    MacroEmissionCheckScope guard(this);
3218    ITScope it_scope(this, &cond);
3219    rrxs(cond, rd, rm);
3220  }
3221  void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); }
3222
3223  void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) {
3224    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3225    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3226    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3227    VIXL_ASSERT(allow_macro_instructions_);
3228    VIXL_ASSERT(OutsideITBlock());
3229    MacroEmissionCheckScope guard(this);
3230    bool can_use_it =
3231        // RSB<c>{<q>} {<Rd>, }<Rn>, #0 ; T1
3232        operand.IsImmediate() && rd.IsLow() && rn.IsLow() &&
3233        (operand.GetImmediate() == 0);
3234    ITScope it_scope(this, &cond, can_use_it);
3235    rsb(cond, rd, rn, operand);
3236  }
3237  void Rsb(Register rd, Register rn, const Operand& operand) {
3238    Rsb(al, rd, rn, operand);
3239  }
3240  void Rsb(FlagsUpdate flags,
3241           Condition cond,
3242           Register rd,
3243           Register rn,
3244           const Operand& operand) {
3245    switch (flags) {
3246      case LeaveFlags:
3247        Rsb(cond, rd, rn, operand);
3248        break;
3249      case SetFlags:
3250        Rsbs(cond, rd, rn, operand);
3251        break;
3252      case DontCare:
3253        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3254                                   rn.IsLow() && operand.IsImmediate() &&
3255                                   (operand.GetImmediate() == 0);
3256        if (setflags_is_smaller) {
3257          Rsbs(cond, rd, rn, operand);
3258        } else {
3259          Rsb(cond, rd, rn, operand);
3260        }
3261        break;
3262    }
3263  }
3264  void Rsb(FlagsUpdate flags,
3265           Register rd,
3266           Register rn,
3267           const Operand& operand) {
3268    Rsb(flags, al, rd, rn, operand);
3269  }
3270
3271  void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) {
3272    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3273    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3274    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3275    VIXL_ASSERT(allow_macro_instructions_);
3276    VIXL_ASSERT(OutsideITBlock());
3277    MacroEmissionCheckScope guard(this);
3278    ITScope it_scope(this, &cond);
3279    rsbs(cond, rd, rn, operand);
3280  }
3281  void Rsbs(Register rd, Register rn, const Operand& operand) {
3282    Rsbs(al, rd, rn, operand);
3283  }
3284
3285  void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) {
3286    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3287    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3288    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3289    VIXL_ASSERT(allow_macro_instructions_);
3290    VIXL_ASSERT(OutsideITBlock());
3291    MacroEmissionCheckScope guard(this);
3292    ITScope it_scope(this, &cond);
3293    rsc(cond, rd, rn, operand);
3294  }
3295  void Rsc(Register rd, Register rn, const Operand& operand) {
3296    Rsc(al, rd, rn, operand);
3297  }
3298  void Rsc(FlagsUpdate flags,
3299           Condition cond,
3300           Register rd,
3301           Register rn,
3302           const Operand& operand) {
3303    switch (flags) {
3304      case LeaveFlags:
3305        Rsc(cond, rd, rn, operand);
3306        break;
3307      case SetFlags:
3308        Rscs(cond, rd, rn, operand);
3309        break;
3310      case DontCare:
3311        Rsc(cond, rd, rn, operand);
3312        break;
3313    }
3314  }
3315  void Rsc(FlagsUpdate flags,
3316           Register rd,
3317           Register rn,
3318           const Operand& operand) {
3319    Rsc(flags, al, rd, rn, operand);
3320  }
3321
3322  void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) {
3323    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3325    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3326    VIXL_ASSERT(allow_macro_instructions_);
3327    VIXL_ASSERT(OutsideITBlock());
3328    MacroEmissionCheckScope guard(this);
3329    ITScope it_scope(this, &cond);
3330    rscs(cond, rd, rn, operand);
3331  }
3332  void Rscs(Register rd, Register rn, const Operand& operand) {
3333    Rscs(al, rd, rn, operand);
3334  }
3335
3336  void Sadd16(Condition cond, Register rd, Register rn, Register rm) {
3337    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3338    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3340    VIXL_ASSERT(allow_macro_instructions_);
3341    VIXL_ASSERT(OutsideITBlock());
3342    MacroEmissionCheckScope guard(this);
3343    ITScope it_scope(this, &cond);
3344    sadd16(cond, rd, rn, rm);
3345  }
3346  void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); }
3347
3348  void Sadd8(Condition cond, Register rd, Register rn, Register rm) {
3349    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3350    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3351    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3352    VIXL_ASSERT(allow_macro_instructions_);
3353    VIXL_ASSERT(OutsideITBlock());
3354    MacroEmissionCheckScope guard(this);
3355    ITScope it_scope(this, &cond);
3356    sadd8(cond, rd, rn, rm);
3357  }
3358  void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); }
3359
3360  void Sasx(Condition cond, Register rd, Register rn, Register rm) {
3361    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3362    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3363    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3364    VIXL_ASSERT(allow_macro_instructions_);
3365    VIXL_ASSERT(OutsideITBlock());
3366    MacroEmissionCheckScope guard(this);
3367    ITScope it_scope(this, &cond);
3368    sasx(cond, rd, rn, rm);
3369  }
3370  void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); }
3371
3372  void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) {
3373    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3374    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3375    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3376    VIXL_ASSERT(allow_macro_instructions_);
3377    VIXL_ASSERT(OutsideITBlock());
3378    MacroEmissionCheckScope guard(this);
3379    bool can_use_it =
3380        // SBC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
3381        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
3382        operand.GetBaseRegister().IsLow();
3383    ITScope it_scope(this, &cond, can_use_it);
3384    sbc(cond, rd, rn, operand);
3385  }
3386  void Sbc(Register rd, Register rn, const Operand& operand) {
3387    Sbc(al, rd, rn, operand);
3388  }
3389  void Sbc(FlagsUpdate flags,
3390           Condition cond,
3391           Register rd,
3392           Register rn,
3393           const Operand& operand) {
3394    switch (flags) {
3395      case LeaveFlags:
3396        Sbc(cond, rd, rn, operand);
3397        break;
3398      case SetFlags:
3399        Sbcs(cond, rd, rn, operand);
3400        break;
3401      case DontCare:
3402        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3403                                   rn.Is(rd) && operand.IsPlainRegister() &&
3404                                   operand.GetBaseRegister().IsLow();
3405        if (setflags_is_smaller) {
3406          Sbcs(cond, rd, rn, operand);
3407        } else {
3408          Sbc(cond, rd, rn, operand);
3409        }
3410        break;
3411    }
3412  }
3413  void Sbc(FlagsUpdate flags,
3414           Register rd,
3415           Register rn,
3416           const Operand& operand) {
3417    Sbc(flags, al, rd, rn, operand);
3418  }
3419
3420  void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) {
3421    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3422    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3423    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3424    VIXL_ASSERT(allow_macro_instructions_);
3425    VIXL_ASSERT(OutsideITBlock());
3426    MacroEmissionCheckScope guard(this);
3427    ITScope it_scope(this, &cond);
3428    sbcs(cond, rd, rn, operand);
3429  }
3430  void Sbcs(Register rd, Register rn, const Operand& operand) {
3431    Sbcs(al, rd, rn, operand);
3432  }
3433
3434  void Sbfx(Condition cond,
3435            Register rd,
3436            Register rn,
3437            uint32_t lsb,
3438            const Operand& operand) {
3439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3441    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3442    VIXL_ASSERT(allow_macro_instructions_);
3443    VIXL_ASSERT(OutsideITBlock());
3444    MacroEmissionCheckScope guard(this);
3445    ITScope it_scope(this, &cond);
3446    sbfx(cond, rd, rn, lsb, operand);
3447  }
3448  void Sbfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
3449    Sbfx(al, rd, rn, lsb, operand);
3450  }
3451
3452  void Sdiv(Condition cond, Register rd, Register rn, Register rm) {
3453    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3454    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3455    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3456    VIXL_ASSERT(allow_macro_instructions_);
3457    VIXL_ASSERT(OutsideITBlock());
3458    MacroEmissionCheckScope guard(this);
3459    ITScope it_scope(this, &cond);
3460    sdiv(cond, rd, rn, rm);
3461  }
3462  void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); }
3463
3464  void Sel(Condition cond, Register rd, Register rn, Register rm) {
3465    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3466    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3467    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3468    VIXL_ASSERT(allow_macro_instructions_);
3469    VIXL_ASSERT(OutsideITBlock());
3470    MacroEmissionCheckScope guard(this);
3471    ITScope it_scope(this, &cond);
3472    sel(cond, rd, rn, rm);
3473  }
3474  void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); }
3475
3476  void Shadd16(Condition cond, Register rd, Register rn, Register rm) {
3477    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3478    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3480    VIXL_ASSERT(allow_macro_instructions_);
3481    VIXL_ASSERT(OutsideITBlock());
3482    MacroEmissionCheckScope guard(this);
3483    ITScope it_scope(this, &cond);
3484    shadd16(cond, rd, rn, rm);
3485  }
3486  void Shadd16(Register rd, Register rn, Register rm) {
3487    Shadd16(al, rd, rn, rm);
3488  }
3489
3490  void Shadd8(Condition cond, Register rd, Register rn, Register rm) {
3491    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3493    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3494    VIXL_ASSERT(allow_macro_instructions_);
3495    VIXL_ASSERT(OutsideITBlock());
3496    MacroEmissionCheckScope guard(this);
3497    ITScope it_scope(this, &cond);
3498    shadd8(cond, rd, rn, rm);
3499  }
3500  void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); }
3501
3502  void Shasx(Condition cond, Register rd, Register rn, Register rm) {
3503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3504    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3505    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3506    VIXL_ASSERT(allow_macro_instructions_);
3507    VIXL_ASSERT(OutsideITBlock());
3508    MacroEmissionCheckScope guard(this);
3509    ITScope it_scope(this, &cond);
3510    shasx(cond, rd, rn, rm);
3511  }
3512  void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); }
3513
3514  void Shsax(Condition cond, Register rd, Register rn, Register rm) {
3515    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3517    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3518    VIXL_ASSERT(allow_macro_instructions_);
3519    VIXL_ASSERT(OutsideITBlock());
3520    MacroEmissionCheckScope guard(this);
3521    ITScope it_scope(this, &cond);
3522    shsax(cond, rd, rn, rm);
3523  }
3524  void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); }
3525
3526  void Shsub16(Condition cond, Register rd, Register rn, Register rm) {
3527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3528    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3529    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3530    VIXL_ASSERT(allow_macro_instructions_);
3531    VIXL_ASSERT(OutsideITBlock());
3532    MacroEmissionCheckScope guard(this);
3533    ITScope it_scope(this, &cond);
3534    shsub16(cond, rd, rn, rm);
3535  }
3536  void Shsub16(Register rd, Register rn, Register rm) {
3537    Shsub16(al, rd, rn, rm);
3538  }
3539
3540  void Shsub8(Condition cond, Register rd, Register rn, Register rm) {
3541    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3542    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3543    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3544    VIXL_ASSERT(allow_macro_instructions_);
3545    VIXL_ASSERT(OutsideITBlock());
3546    MacroEmissionCheckScope guard(this);
3547    ITScope it_scope(this, &cond);
3548    shsub8(cond, rd, rn, rm);
3549  }
3550  void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); }
3551
3552  void Smlabb(
3553      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3557    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3558    VIXL_ASSERT(allow_macro_instructions_);
3559    VIXL_ASSERT(OutsideITBlock());
3560    MacroEmissionCheckScope guard(this);
3561    ITScope it_scope(this, &cond);
3562    smlabb(cond, rd, rn, rm, ra);
3563  }
3564  void Smlabb(Register rd, Register rn, Register rm, Register ra) {
3565    Smlabb(al, rd, rn, rm, ra);
3566  }
3567
3568  void Smlabt(
3569      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3571    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3572    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3573    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3574    VIXL_ASSERT(allow_macro_instructions_);
3575    VIXL_ASSERT(OutsideITBlock());
3576    MacroEmissionCheckScope guard(this);
3577    ITScope it_scope(this, &cond);
3578    smlabt(cond, rd, rn, rm, ra);
3579  }
3580  void Smlabt(Register rd, Register rn, Register rm, Register ra) {
3581    Smlabt(al, rd, rn, rm, ra);
3582  }
3583
3584  void Smlad(
3585      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3586    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3587    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3589    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3590    VIXL_ASSERT(allow_macro_instructions_);
3591    VIXL_ASSERT(OutsideITBlock());
3592    MacroEmissionCheckScope guard(this);
3593    ITScope it_scope(this, &cond);
3594    smlad(cond, rd, rn, rm, ra);
3595  }
3596  void Smlad(Register rd, Register rn, Register rm, Register ra) {
3597    Smlad(al, rd, rn, rm, ra);
3598  }
3599
3600  void Smladx(
3601      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3602    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3605    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3606    VIXL_ASSERT(allow_macro_instructions_);
3607    VIXL_ASSERT(OutsideITBlock());
3608    MacroEmissionCheckScope guard(this);
3609    ITScope it_scope(this, &cond);
3610    smladx(cond, rd, rn, rm, ra);
3611  }
3612  void Smladx(Register rd, Register rn, Register rm, Register ra) {
3613    Smladx(al, rd, rn, rm, ra);
3614  }
3615
3616  void Smlal(
3617      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3621    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3622    VIXL_ASSERT(allow_macro_instructions_);
3623    VIXL_ASSERT(OutsideITBlock());
3624    MacroEmissionCheckScope guard(this);
3625    ITScope it_scope(this, &cond);
3626    smlal(cond, rdlo, rdhi, rn, rm);
3627  }
3628  void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
3629    Smlal(al, rdlo, rdhi, rn, rm);
3630  }
3631
3632  void Smlalbb(
3633      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3636    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3637    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3638    VIXL_ASSERT(allow_macro_instructions_);
3639    VIXL_ASSERT(OutsideITBlock());
3640    MacroEmissionCheckScope guard(this);
3641    ITScope it_scope(this, &cond);
3642    smlalbb(cond, rdlo, rdhi, rn, rm);
3643  }
3644  void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
3645    Smlalbb(al, rdlo, rdhi, rn, rm);
3646  }
3647
3648  void Smlalbt(
3649      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3651    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3652    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3654    VIXL_ASSERT(allow_macro_instructions_);
3655    VIXL_ASSERT(OutsideITBlock());
3656    MacroEmissionCheckScope guard(this);
3657    ITScope it_scope(this, &cond);
3658    smlalbt(cond, rdlo, rdhi, rn, rm);
3659  }
3660  void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
3661    Smlalbt(al, rdlo, rdhi, rn, rm);
3662  }
3663
3664  void Smlald(
3665      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3666    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3670    VIXL_ASSERT(allow_macro_instructions_);
3671    VIXL_ASSERT(OutsideITBlock());
3672    MacroEmissionCheckScope guard(this);
3673    ITScope it_scope(this, &cond);
3674    smlald(cond, rdlo, rdhi, rn, rm);
3675  }
3676  void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
3677    Smlald(al, rdlo, rdhi, rn, rm);
3678  }
3679
3680  void Smlaldx(
3681      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3686    VIXL_ASSERT(allow_macro_instructions_);
3687    VIXL_ASSERT(OutsideITBlock());
3688    MacroEmissionCheckScope guard(this);
3689    ITScope it_scope(this, &cond);
3690    smlaldx(cond, rdlo, rdhi, rn, rm);
3691  }
3692  void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3693    Smlaldx(al, rdlo, rdhi, rn, rm);
3694  }
3695
3696  void Smlals(
3697      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3700    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3701    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3702    VIXL_ASSERT(allow_macro_instructions_);
3703    VIXL_ASSERT(OutsideITBlock());
3704    MacroEmissionCheckScope guard(this);
3705    ITScope it_scope(this, &cond);
3706    smlals(cond, rdlo, rdhi, rn, rm);
3707  }
3708  void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
3709    Smlals(al, rdlo, rdhi, rn, rm);
3710  }
3711
3712  void Smlaltb(
3713      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3716    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3717    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3718    VIXL_ASSERT(allow_macro_instructions_);
3719    VIXL_ASSERT(OutsideITBlock());
3720    MacroEmissionCheckScope guard(this);
3721    ITScope it_scope(this, &cond);
3722    smlaltb(cond, rdlo, rdhi, rn, rm);
3723  }
3724  void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
3725    Smlaltb(al, rdlo, rdhi, rn, rm);
3726  }
3727
3728  void Smlaltt(
3729      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3734    VIXL_ASSERT(allow_macro_instructions_);
3735    VIXL_ASSERT(OutsideITBlock());
3736    MacroEmissionCheckScope guard(this);
3737    ITScope it_scope(this, &cond);
3738    smlaltt(cond, rdlo, rdhi, rn, rm);
3739  }
3740  void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
3741    Smlaltt(al, rdlo, rdhi, rn, rm);
3742  }
3743
3744  void Smlatb(
3745      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3746    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3748    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3749    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3750    VIXL_ASSERT(allow_macro_instructions_);
3751    VIXL_ASSERT(OutsideITBlock());
3752    MacroEmissionCheckScope guard(this);
3753    ITScope it_scope(this, &cond);
3754    smlatb(cond, rd, rn, rm, ra);
3755  }
3756  void Smlatb(Register rd, Register rn, Register rm, Register ra) {
3757    Smlatb(al, rd, rn, rm, ra);
3758  }
3759
3760  void Smlatt(
3761      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3762    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3763    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3764    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3765    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3766    VIXL_ASSERT(allow_macro_instructions_);
3767    VIXL_ASSERT(OutsideITBlock());
3768    MacroEmissionCheckScope guard(this);
3769    ITScope it_scope(this, &cond);
3770    smlatt(cond, rd, rn, rm, ra);
3771  }
3772  void Smlatt(Register rd, Register rn, Register rm, Register ra) {
3773    Smlatt(al, rd, rn, rm, ra);
3774  }
3775
3776  void Smlawb(
3777      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3779    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3780    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3781    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3782    VIXL_ASSERT(allow_macro_instructions_);
3783    VIXL_ASSERT(OutsideITBlock());
3784    MacroEmissionCheckScope guard(this);
3785    ITScope it_scope(this, &cond);
3786    smlawb(cond, rd, rn, rm, ra);
3787  }
3788  void Smlawb(Register rd, Register rn, Register rm, Register ra) {
3789    Smlawb(al, rd, rn, rm, ra);
3790  }
3791
3792  void Smlawt(
3793      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3797    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3798    VIXL_ASSERT(allow_macro_instructions_);
3799    VIXL_ASSERT(OutsideITBlock());
3800    MacroEmissionCheckScope guard(this);
3801    ITScope it_scope(this, &cond);
3802    smlawt(cond, rd, rn, rm, ra);
3803  }
3804  void Smlawt(Register rd, Register rn, Register rm, Register ra) {
3805    Smlawt(al, rd, rn, rm, ra);
3806  }
3807
3808  void Smlsd(
3809      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3810    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3811    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3813    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3814    VIXL_ASSERT(allow_macro_instructions_);
3815    VIXL_ASSERT(OutsideITBlock());
3816    MacroEmissionCheckScope guard(this);
3817    ITScope it_scope(this, &cond);
3818    smlsd(cond, rd, rn, rm, ra);
3819  }
3820  void Smlsd(Register rd, Register rn, Register rm, Register ra) {
3821    Smlsd(al, rd, rn, rm, ra);
3822  }
3823
3824  void Smlsdx(
3825      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3826    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3827    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3829    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3830    VIXL_ASSERT(allow_macro_instructions_);
3831    VIXL_ASSERT(OutsideITBlock());
3832    MacroEmissionCheckScope guard(this);
3833    ITScope it_scope(this, &cond);
3834    smlsdx(cond, rd, rn, rm, ra);
3835  }
3836  void Smlsdx(Register rd, Register rn, Register rm, Register ra) {
3837    Smlsdx(al, rd, rn, rm, ra);
3838  }
3839
3840  void Smlsld(
3841      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3844    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3846    VIXL_ASSERT(allow_macro_instructions_);
3847    VIXL_ASSERT(OutsideITBlock());
3848    MacroEmissionCheckScope guard(this);
3849    ITScope it_scope(this, &cond);
3850    smlsld(cond, rdlo, rdhi, rn, rm);
3851  }
3852  void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
3853    Smlsld(al, rdlo, rdhi, rn, rm);
3854  }
3855
3856  void Smlsldx(
3857      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3861    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3862    VIXL_ASSERT(allow_macro_instructions_);
3863    VIXL_ASSERT(OutsideITBlock());
3864    MacroEmissionCheckScope guard(this);
3865    ITScope it_scope(this, &cond);
3866    smlsldx(cond, rdlo, rdhi, rn, rm);
3867  }
3868  void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3869    Smlsldx(al, rdlo, rdhi, rn, rm);
3870  }
3871
3872  void Smmla(
3873      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3874    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3877    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3878    VIXL_ASSERT(allow_macro_instructions_);
3879    VIXL_ASSERT(OutsideITBlock());
3880    MacroEmissionCheckScope guard(this);
3881    ITScope it_scope(this, &cond);
3882    smmla(cond, rd, rn, rm, ra);
3883  }
3884  void Smmla(Register rd, Register rn, Register rm, Register ra) {
3885    Smmla(al, rd, rn, rm, ra);
3886  }
3887
3888  void Smmlar(
3889      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3892    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3893    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3894    VIXL_ASSERT(allow_macro_instructions_);
3895    VIXL_ASSERT(OutsideITBlock());
3896    MacroEmissionCheckScope guard(this);
3897    ITScope it_scope(this, &cond);
3898    smmlar(cond, rd, rn, rm, ra);
3899  }
3900  void Smmlar(Register rd, Register rn, Register rm, Register ra) {
3901    Smmlar(al, rd, rn, rm, ra);
3902  }
3903
3904  void Smmls(
3905      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3906    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3907    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3909    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3910    VIXL_ASSERT(allow_macro_instructions_);
3911    VIXL_ASSERT(OutsideITBlock());
3912    MacroEmissionCheckScope guard(this);
3913    ITScope it_scope(this, &cond);
3914    smmls(cond, rd, rn, rm, ra);
3915  }
3916  void Smmls(Register rd, Register rn, Register rm, Register ra) {
3917    Smmls(al, rd, rn, rm, ra);
3918  }
3919
3920  void Smmlsr(
3921      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3922    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3923    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3924    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3925    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3926    VIXL_ASSERT(allow_macro_instructions_);
3927    VIXL_ASSERT(OutsideITBlock());
3928    MacroEmissionCheckScope guard(this);
3929    ITScope it_scope(this, &cond);
3930    smmlsr(cond, rd, rn, rm, ra);
3931  }
3932  void Smmlsr(Register rd, Register rn, Register rm, Register ra) {
3933    Smmlsr(al, rd, rn, rm, ra);
3934  }
3935
3936  void Smmul(Condition cond, Register rd, Register rn, Register rm) {
3937    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3940    VIXL_ASSERT(allow_macro_instructions_);
3941    VIXL_ASSERT(OutsideITBlock());
3942    MacroEmissionCheckScope guard(this);
3943    ITScope it_scope(this, &cond);
3944    smmul(cond, rd, rn, rm);
3945  }
3946  void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); }
3947
3948  void Smmulr(Condition cond, Register rd, Register rn, Register rm) {
3949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3952    VIXL_ASSERT(allow_macro_instructions_);
3953    VIXL_ASSERT(OutsideITBlock());
3954    MacroEmissionCheckScope guard(this);
3955    ITScope it_scope(this, &cond);
3956    smmulr(cond, rd, rn, rm);
3957  }
3958  void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); }
3959
3960  void Smuad(Condition cond, Register rd, Register rn, Register rm) {
3961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3962    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3963    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3964    VIXL_ASSERT(allow_macro_instructions_);
3965    VIXL_ASSERT(OutsideITBlock());
3966    MacroEmissionCheckScope guard(this);
3967    ITScope it_scope(this, &cond);
3968    smuad(cond, rd, rn, rm);
3969  }
3970  void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); }
3971
3972  void Smuadx(Condition cond, Register rd, Register rn, Register rm) {
3973    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3976    VIXL_ASSERT(allow_macro_instructions_);
3977    VIXL_ASSERT(OutsideITBlock());
3978    MacroEmissionCheckScope guard(this);
3979    ITScope it_scope(this, &cond);
3980    smuadx(cond, rd, rn, rm);
3981  }
3982  void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); }
3983
3984  void Smulbb(Condition cond, Register rd, Register rn, Register rm) {
3985    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3986    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3987    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3988    VIXL_ASSERT(allow_macro_instructions_);
3989    VIXL_ASSERT(OutsideITBlock());
3990    MacroEmissionCheckScope guard(this);
3991    ITScope it_scope(this, &cond);
3992    smulbb(cond, rd, rn, rm);
3993  }
3994  void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); }
3995
3996  void Smulbt(Condition cond, Register rd, Register rn, Register rm) {
3997    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3998    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3999    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4000    VIXL_ASSERT(allow_macro_instructions_);
4001    VIXL_ASSERT(OutsideITBlock());
4002    MacroEmissionCheckScope guard(this);
4003    ITScope it_scope(this, &cond);
4004    smulbt(cond, rd, rn, rm);
4005  }
4006  void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); }
4007
4008  void Smull(
4009      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4010    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4012    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4013    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4014    VIXL_ASSERT(allow_macro_instructions_);
4015    VIXL_ASSERT(OutsideITBlock());
4016    MacroEmissionCheckScope guard(this);
4017    ITScope it_scope(this, &cond);
4018    smull(cond, rdlo, rdhi, rn, rm);
4019  }
4020  void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
4021    Smull(al, rdlo, rdhi, rn, rm);
4022  }
4023  void Smull(FlagsUpdate flags,
4024             Condition cond,
4025             Register rdlo,
4026             Register rdhi,
4027             Register rn,
4028             Register rm) {
4029    switch (flags) {
4030      case LeaveFlags:
4031        Smull(cond, rdlo, rdhi, rn, rm);
4032        break;
4033      case SetFlags:
4034        Smulls(cond, rdlo, rdhi, rn, rm);
4035        break;
4036      case DontCare:
4037        Smull(cond, rdlo, rdhi, rn, rm);
4038        break;
4039    }
4040  }
4041  void Smull(FlagsUpdate flags,
4042             Register rdlo,
4043             Register rdhi,
4044             Register rn,
4045             Register rm) {
4046    Smull(flags, al, rdlo, rdhi, rn, rm);
4047  }
4048
4049  void Smulls(
4050      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4051    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4052    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4053    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4054    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4055    VIXL_ASSERT(allow_macro_instructions_);
4056    VIXL_ASSERT(OutsideITBlock());
4057    MacroEmissionCheckScope guard(this);
4058    ITScope it_scope(this, &cond);
4059    smulls(cond, rdlo, rdhi, rn, rm);
4060  }
4061  void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4062    Smulls(al, rdlo, rdhi, rn, rm);
4063  }
4064
4065  void Smultb(Condition cond, Register rd, Register rn, Register rm) {
4066    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4067    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4068    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4069    VIXL_ASSERT(allow_macro_instructions_);
4070    VIXL_ASSERT(OutsideITBlock());
4071    MacroEmissionCheckScope guard(this);
4072    ITScope it_scope(this, &cond);
4073    smultb(cond, rd, rn, rm);
4074  }
4075  void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); }
4076
4077  void Smultt(Condition cond, Register rd, Register rn, Register rm) {
4078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4081    VIXL_ASSERT(allow_macro_instructions_);
4082    VIXL_ASSERT(OutsideITBlock());
4083    MacroEmissionCheckScope guard(this);
4084    ITScope it_scope(this, &cond);
4085    smultt(cond, rd, rn, rm);
4086  }
4087  void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); }
4088
4089  void Smulwb(Condition cond, Register rd, Register rn, Register rm) {
4090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4092    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4093    VIXL_ASSERT(allow_macro_instructions_);
4094    VIXL_ASSERT(OutsideITBlock());
4095    MacroEmissionCheckScope guard(this);
4096    ITScope it_scope(this, &cond);
4097    smulwb(cond, rd, rn, rm);
4098  }
4099  void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); }
4100
4101  void Smulwt(Condition cond, Register rd, Register rn, Register rm) {
4102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4103    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4104    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4105    VIXL_ASSERT(allow_macro_instructions_);
4106    VIXL_ASSERT(OutsideITBlock());
4107    MacroEmissionCheckScope guard(this);
4108    ITScope it_scope(this, &cond);
4109    smulwt(cond, rd, rn, rm);
4110  }
4111  void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); }
4112
4113  void Smusd(Condition cond, Register rd, Register rn, Register rm) {
4114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4115    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4116    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4117    VIXL_ASSERT(allow_macro_instructions_);
4118    VIXL_ASSERT(OutsideITBlock());
4119    MacroEmissionCheckScope guard(this);
4120    ITScope it_scope(this, &cond);
4121    smusd(cond, rd, rn, rm);
4122  }
4123  void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); }
4124
4125  void Smusdx(Condition cond, Register rd, Register rn, Register rm) {
4126    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4129    VIXL_ASSERT(allow_macro_instructions_);
4130    VIXL_ASSERT(OutsideITBlock());
4131    MacroEmissionCheckScope guard(this);
4132    ITScope it_scope(this, &cond);
4133    smusdx(cond, rd, rn, rm);
4134  }
4135  void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); }
4136
4137  void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
4138    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4139    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4140    VIXL_ASSERT(allow_macro_instructions_);
4141    VIXL_ASSERT(OutsideITBlock());
4142    MacroEmissionCheckScope guard(this);
4143    ITScope it_scope(this, &cond);
4144    ssat(cond, rd, imm, operand);
4145  }
4146  void Ssat(Register rd, uint32_t imm, const Operand& operand) {
4147    Ssat(al, rd, imm, operand);
4148  }
4149
4150  void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) {
4151    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4152    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4153    VIXL_ASSERT(allow_macro_instructions_);
4154    VIXL_ASSERT(OutsideITBlock());
4155    MacroEmissionCheckScope guard(this);
4156    ITScope it_scope(this, &cond);
4157    ssat16(cond, rd, imm, rn);
4158  }
4159  void Ssat16(Register rd, uint32_t imm, Register rn) {
4160    Ssat16(al, rd, imm, rn);
4161  }
4162
4163  void Ssax(Condition cond, Register rd, Register rn, Register rm) {
4164    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4165    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4166    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4167    VIXL_ASSERT(allow_macro_instructions_);
4168    VIXL_ASSERT(OutsideITBlock());
4169    MacroEmissionCheckScope guard(this);
4170    ITScope it_scope(this, &cond);
4171    ssax(cond, rd, rn, rm);
4172  }
4173  void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); }
4174
4175  void Ssub16(Condition cond, Register rd, Register rn, Register rm) {
4176    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4177    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4178    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4179    VIXL_ASSERT(allow_macro_instructions_);
4180    VIXL_ASSERT(OutsideITBlock());
4181    MacroEmissionCheckScope guard(this);
4182    ITScope it_scope(this, &cond);
4183    ssub16(cond, rd, rn, rm);
4184  }
4185  void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); }
4186
4187  void Ssub8(Condition cond, Register rd, Register rn, Register rm) {
4188    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4189    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4190    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4191    VIXL_ASSERT(allow_macro_instructions_);
4192    VIXL_ASSERT(OutsideITBlock());
4193    MacroEmissionCheckScope guard(this);
4194    ITScope it_scope(this, &cond);
4195    ssub8(cond, rd, rn, rm);
4196  }
4197  void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); }
4198
4199  void Stl(Condition cond, Register rt, const MemOperand& operand) {
4200    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4201    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4202    VIXL_ASSERT(allow_macro_instructions_);
4203    VIXL_ASSERT(OutsideITBlock());
4204    MacroEmissionCheckScope guard(this);
4205    ITScope it_scope(this, &cond);
4206    stl(cond, rt, operand);
4207  }
4208  void Stl(Register rt, const MemOperand& operand) { Stl(al, rt, operand); }
4209
4210  void Stlb(Condition cond, Register rt, const MemOperand& operand) {
4211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4212    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4213    VIXL_ASSERT(allow_macro_instructions_);
4214    VIXL_ASSERT(OutsideITBlock());
4215    MacroEmissionCheckScope guard(this);
4216    ITScope it_scope(this, &cond);
4217    stlb(cond, rt, operand);
4218  }
4219  void Stlb(Register rt, const MemOperand& operand) { Stlb(al, rt, operand); }
4220
4221  void Stlex(Condition cond,
4222             Register rd,
4223             Register rt,
4224             const MemOperand& operand) {
4225    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4226    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4227    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4228    VIXL_ASSERT(allow_macro_instructions_);
4229    VIXL_ASSERT(OutsideITBlock());
4230    MacroEmissionCheckScope guard(this);
4231    ITScope it_scope(this, &cond);
4232    stlex(cond, rd, rt, operand);
4233  }
4234  void Stlex(Register rd, Register rt, const MemOperand& operand) {
4235    Stlex(al, rd, rt, operand);
4236  }
4237
4238  void Stlexb(Condition cond,
4239              Register rd,
4240              Register rt,
4241              const MemOperand& operand) {
4242    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4243    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4244    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4245    VIXL_ASSERT(allow_macro_instructions_);
4246    VIXL_ASSERT(OutsideITBlock());
4247    MacroEmissionCheckScope guard(this);
4248    ITScope it_scope(this, &cond);
4249    stlexb(cond, rd, rt, operand);
4250  }
4251  void Stlexb(Register rd, Register rt, const MemOperand& operand) {
4252    Stlexb(al, rd, rt, operand);
4253  }
4254
4255  void Stlexd(Condition cond,
4256              Register rd,
4257              Register rt,
4258              Register rt2,
4259              const MemOperand& operand) {
4260    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4261    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4262    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4263    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4264    VIXL_ASSERT(allow_macro_instructions_);
4265    VIXL_ASSERT(OutsideITBlock());
4266    MacroEmissionCheckScope guard(this);
4267    ITScope it_scope(this, &cond);
4268    stlexd(cond, rd, rt, rt2, operand);
4269  }
4270  void Stlexd(Register rd,
4271              Register rt,
4272              Register rt2,
4273              const MemOperand& operand) {
4274    Stlexd(al, rd, rt, rt2, operand);
4275  }
4276
4277  void Stlexh(Condition cond,
4278              Register rd,
4279              Register rt,
4280              const MemOperand& operand) {
4281    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4282    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4283    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4284    VIXL_ASSERT(allow_macro_instructions_);
4285    VIXL_ASSERT(OutsideITBlock());
4286    MacroEmissionCheckScope guard(this);
4287    ITScope it_scope(this, &cond);
4288    stlexh(cond, rd, rt, operand);
4289  }
4290  void Stlexh(Register rd, Register rt, const MemOperand& operand) {
4291    Stlexh(al, rd, rt, operand);
4292  }
4293
4294  void Stlh(Condition cond, Register rt, const MemOperand& operand) {
4295    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4296    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4297    VIXL_ASSERT(allow_macro_instructions_);
4298    VIXL_ASSERT(OutsideITBlock());
4299    MacroEmissionCheckScope guard(this);
4300    ITScope it_scope(this, &cond);
4301    stlh(cond, rt, operand);
4302  }
4303  void Stlh(Register rt, const MemOperand& operand) { Stlh(al, rt, operand); }
4304
4305  void Stm(Condition cond,
4306           Register rn,
4307           WriteBack write_back,
4308           RegisterList registers) {
4309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4310    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4311    VIXL_ASSERT(allow_macro_instructions_);
4312    VIXL_ASSERT(OutsideITBlock());
4313    MacroEmissionCheckScope guard(this);
4314    ITScope it_scope(this, &cond);
4315    stm(cond, rn, write_back, registers);
4316  }
4317  void Stm(Register rn, WriteBack write_back, RegisterList registers) {
4318    Stm(al, rn, write_back, registers);
4319  }
4320
4321  void Stmda(Condition cond,
4322             Register rn,
4323             WriteBack write_back,
4324             RegisterList registers) {
4325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4326    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4327    VIXL_ASSERT(allow_macro_instructions_);
4328    VIXL_ASSERT(OutsideITBlock());
4329    MacroEmissionCheckScope guard(this);
4330    ITScope it_scope(this, &cond);
4331    stmda(cond, rn, write_back, registers);
4332  }
4333  void Stmda(Register rn, WriteBack write_back, RegisterList registers) {
4334    Stmda(al, rn, write_back, registers);
4335  }
4336
4337  void Stmdb(Condition cond,
4338             Register rn,
4339             WriteBack write_back,
4340             RegisterList registers) {
4341    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4342    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4343    VIXL_ASSERT(allow_macro_instructions_);
4344    VIXL_ASSERT(OutsideITBlock());
4345    MacroEmissionCheckScope guard(this);
4346    ITScope it_scope(this, &cond);
4347    stmdb(cond, rn, write_back, registers);
4348  }
4349  void Stmdb(Register rn, WriteBack write_back, RegisterList registers) {
4350    Stmdb(al, rn, write_back, registers);
4351  }
4352
4353  void Stmea(Condition cond,
4354             Register rn,
4355             WriteBack write_back,
4356             RegisterList registers) {
4357    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4358    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4359    VIXL_ASSERT(allow_macro_instructions_);
4360    VIXL_ASSERT(OutsideITBlock());
4361    MacroEmissionCheckScope guard(this);
4362    ITScope it_scope(this, &cond);
4363    stmea(cond, rn, write_back, registers);
4364  }
4365  void Stmea(Register rn, WriteBack write_back, RegisterList registers) {
4366    Stmea(al, rn, write_back, registers);
4367  }
4368
4369  void Stmed(Condition cond,
4370             Register rn,
4371             WriteBack write_back,
4372             RegisterList registers) {
4373    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4374    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4375    VIXL_ASSERT(allow_macro_instructions_);
4376    VIXL_ASSERT(OutsideITBlock());
4377    MacroEmissionCheckScope guard(this);
4378    ITScope it_scope(this, &cond);
4379    stmed(cond, rn, write_back, registers);
4380  }
4381  void Stmed(Register rn, WriteBack write_back, RegisterList registers) {
4382    Stmed(al, rn, write_back, registers);
4383  }
4384
4385  void Stmfa(Condition cond,
4386             Register rn,
4387             WriteBack write_back,
4388             RegisterList registers) {
4389    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4390    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4391    VIXL_ASSERT(allow_macro_instructions_);
4392    VIXL_ASSERT(OutsideITBlock());
4393    MacroEmissionCheckScope guard(this);
4394    ITScope it_scope(this, &cond);
4395    stmfa(cond, rn, write_back, registers);
4396  }
4397  void Stmfa(Register rn, WriteBack write_back, RegisterList registers) {
4398    Stmfa(al, rn, write_back, registers);
4399  }
4400
4401  void Stmfd(Condition cond,
4402             Register rn,
4403             WriteBack write_back,
4404             RegisterList registers) {
4405    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4406    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4407    VIXL_ASSERT(allow_macro_instructions_);
4408    VIXL_ASSERT(OutsideITBlock());
4409    MacroEmissionCheckScope guard(this);
4410    ITScope it_scope(this, &cond);
4411    stmfd(cond, rn, write_back, registers);
4412  }
4413  void Stmfd(Register rn, WriteBack write_back, RegisterList registers) {
4414    Stmfd(al, rn, write_back, registers);
4415  }
4416
4417  void Stmib(Condition cond,
4418             Register rn,
4419             WriteBack write_back,
4420             RegisterList registers) {
4421    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4422    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4423    VIXL_ASSERT(allow_macro_instructions_);
4424    VIXL_ASSERT(OutsideITBlock());
4425    MacroEmissionCheckScope guard(this);
4426    ITScope it_scope(this, &cond);
4427    stmib(cond, rn, write_back, registers);
4428  }
4429  void Stmib(Register rn, WriteBack write_back, RegisterList registers) {
4430    Stmib(al, rn, write_back, registers);
4431  }
4432
4433  void Str(Condition cond, Register rt, const MemOperand& operand) {
4434    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4435    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4436    VIXL_ASSERT(allow_macro_instructions_);
4437    VIXL_ASSERT(OutsideITBlock());
4438    MacroEmissionCheckScope guard(this);
4439    bool can_use_it =
4440        // STR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4441        (operand.IsImmediate() && rt.IsLow() &&
4442         operand.GetBaseRegister().IsLow() &&
4443         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
4444         (operand.GetAddrMode() == Offset)) ||
4445        // STR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
4446        (operand.IsImmediate() && rt.IsLow() &&
4447         operand.GetBaseRegister().IsSP() &&
4448         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
4449         (operand.GetAddrMode() == Offset)) ||
4450        // STR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4451        (operand.IsPlainRegister() && rt.IsLow() &&
4452         operand.GetBaseRegister().IsLow() &&
4453         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4454         (operand.GetAddrMode() == Offset));
4455    ITScope it_scope(this, &cond, can_use_it);
4456    str(cond, rt, operand);
4457  }
4458  void Str(Register rt, const MemOperand& operand) { Str(al, rt, operand); }
4459
4460  void Strb(Condition cond, Register rt, const MemOperand& operand) {
4461    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4462    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4463    VIXL_ASSERT(allow_macro_instructions_);
4464    VIXL_ASSERT(OutsideITBlock());
4465    MacroEmissionCheckScope guard(this);
4466    bool can_use_it =
4467        // STRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4468        (operand.IsImmediate() && rt.IsLow() &&
4469         operand.GetBaseRegister().IsLow() &&
4470         operand.IsOffsetImmediateWithinRange(0, 31) &&
4471         (operand.GetAddrMode() == Offset)) ||
4472        // STRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4473        (operand.IsPlainRegister() && rt.IsLow() &&
4474         operand.GetBaseRegister().IsLow() &&
4475         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4476         (operand.GetAddrMode() == Offset));
4477    ITScope it_scope(this, &cond, can_use_it);
4478    strb(cond, rt, operand);
4479  }
4480  void Strb(Register rt, const MemOperand& operand) { Strb(al, rt, operand); }
4481
4482  void Strd(Condition cond,
4483            Register rt,
4484            Register rt2,
4485            const MemOperand& operand) {
4486    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4488    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4489    VIXL_ASSERT(allow_macro_instructions_);
4490    VIXL_ASSERT(OutsideITBlock());
4491    MacroEmissionCheckScope guard(this);
4492    ITScope it_scope(this, &cond);
4493    strd(cond, rt, rt2, operand);
4494  }
4495  void Strd(Register rt, Register rt2, const MemOperand& operand) {
4496    Strd(al, rt, rt2, operand);
4497  }
4498
4499  void Strex(Condition cond,
4500             Register rd,
4501             Register rt,
4502             const MemOperand& operand) {
4503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4504    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4505    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4506    VIXL_ASSERT(allow_macro_instructions_);
4507    VIXL_ASSERT(OutsideITBlock());
4508    MacroEmissionCheckScope guard(this);
4509    ITScope it_scope(this, &cond);
4510    strex(cond, rd, rt, operand);
4511  }
4512  void Strex(Register rd, Register rt, const MemOperand& operand) {
4513    Strex(al, rd, rt, operand);
4514  }
4515
4516  void Strexb(Condition cond,
4517              Register rd,
4518              Register rt,
4519              const MemOperand& operand) {
4520    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4521    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4522    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4523    VIXL_ASSERT(allow_macro_instructions_);
4524    VIXL_ASSERT(OutsideITBlock());
4525    MacroEmissionCheckScope guard(this);
4526    ITScope it_scope(this, &cond);
4527    strexb(cond, rd, rt, operand);
4528  }
4529  void Strexb(Register rd, Register rt, const MemOperand& operand) {
4530    Strexb(al, rd, rt, operand);
4531  }
4532
4533  void Strexd(Condition cond,
4534              Register rd,
4535              Register rt,
4536              Register rt2,
4537              const MemOperand& operand) {
4538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4541    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4542    VIXL_ASSERT(allow_macro_instructions_);
4543    VIXL_ASSERT(OutsideITBlock());
4544    MacroEmissionCheckScope guard(this);
4545    ITScope it_scope(this, &cond);
4546    strexd(cond, rd, rt, rt2, operand);
4547  }
4548  void Strexd(Register rd,
4549              Register rt,
4550              Register rt2,
4551              const MemOperand& operand) {
4552    Strexd(al, rd, rt, rt2, operand);
4553  }
4554
4555  void Strexh(Condition cond,
4556              Register rd,
4557              Register rt,
4558              const MemOperand& operand) {
4559    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4560    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4561    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4562    VIXL_ASSERT(allow_macro_instructions_);
4563    VIXL_ASSERT(OutsideITBlock());
4564    MacroEmissionCheckScope guard(this);
4565    ITScope it_scope(this, &cond);
4566    strexh(cond, rd, rt, operand);
4567  }
4568  void Strexh(Register rd, Register rt, const MemOperand& operand) {
4569    Strexh(al, rd, rt, operand);
4570  }
4571
4572  void Strh(Condition cond, Register rt, const MemOperand& operand) {
4573    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4574    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4575    VIXL_ASSERT(allow_macro_instructions_);
4576    VIXL_ASSERT(OutsideITBlock());
4577    MacroEmissionCheckScope guard(this);
4578    bool can_use_it =
4579        // STRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4580        (operand.IsImmediate() && rt.IsLow() &&
4581         operand.GetBaseRegister().IsLow() &&
4582         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
4583         (operand.GetAddrMode() == Offset)) ||
4584        // STRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4585        (operand.IsPlainRegister() && rt.IsLow() &&
4586         operand.GetBaseRegister().IsLow() &&
4587         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4588         (operand.GetAddrMode() == Offset));
4589    ITScope it_scope(this, &cond, can_use_it);
4590    strh(cond, rt, operand);
4591  }
4592  void Strh(Register rt, const MemOperand& operand) { Strh(al, rt, operand); }
4593
4594  void Sub(Condition cond, Register rd, Register rn, const Operand& operand) {
4595    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4596    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4597    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4598    VIXL_ASSERT(allow_macro_instructions_);
4599    VIXL_ASSERT(OutsideITBlock());
4600    MacroEmissionCheckScope guard(this);
4601    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
4602      uint32_t immediate = operand.GetImmediate();
4603      if (immediate == 0) {
4604        return;
4605      }
4606    }
4607    bool can_use_it =
4608        // SUB<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
4609        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
4610         rd.IsLow()) ||
4611        // SUB<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
4612        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
4613         rd.IsLow() && rn.Is(rd)) ||
4614        // SUB<c>{<q>} <Rd>, <Rn>, <Rm>
4615        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4616         operand.GetBaseRegister().IsLow());
4617    ITScope it_scope(this, &cond, can_use_it);
4618    sub(cond, rd, rn, operand);
4619  }
4620  void Sub(Register rd, Register rn, const Operand& operand) {
4621    Sub(al, rd, rn, operand);
4622  }
4623  void Sub(FlagsUpdate flags,
4624           Condition cond,
4625           Register rd,
4626           Register rn,
4627           const Operand& operand) {
4628    switch (flags) {
4629      case LeaveFlags:
4630        Sub(cond, rd, rn, operand);
4631        break;
4632      case SetFlags:
4633        Subs(cond, rd, rn, operand);
4634        break;
4635      case DontCare:
4636        bool setflags_is_smaller =
4637            IsUsingT32() && cond.Is(al) &&
4638            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4639              operand.GetBaseRegister().IsLow()) ||
4640             (operand.IsImmediate() &&
4641              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
4642               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
4643        if (setflags_is_smaller) {
4644          Subs(cond, rd, rn, operand);
4645        } else {
4646          bool changed_op_is_smaller =
4647              operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
4648              ((rd.IsLow() && rn.IsLow() &&
4649                (operand.GetSignedImmediate() >= -7)) ||
4650               (rd.IsLow() && rn.Is(rd) &&
4651                (operand.GetSignedImmediate() >= -255)));
4652          if (changed_op_is_smaller) {
4653            Adds(cond, rd, rn, -operand.GetSignedImmediate());
4654          } else {
4655            Sub(cond, rd, rn, operand);
4656          }
4657        }
4658        break;
4659    }
4660  }
4661  void Sub(FlagsUpdate flags,
4662           Register rd,
4663           Register rn,
4664           const Operand& operand) {
4665    Sub(flags, al, rd, rn, operand);
4666  }
4667
4668  void Subs(Condition cond, Register rd, Register rn, const Operand& operand) {
4669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4671    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4672    VIXL_ASSERT(allow_macro_instructions_);
4673    VIXL_ASSERT(OutsideITBlock());
4674    MacroEmissionCheckScope guard(this);
4675    ITScope it_scope(this, &cond);
4676    subs(cond, rd, rn, operand);
4677  }
4678  void Subs(Register rd, Register rn, const Operand& operand) {
4679    Subs(al, rd, rn, operand);
4680  }
4681
4682
4683  void Svc(Condition cond, uint32_t imm) {
4684    VIXL_ASSERT(allow_macro_instructions_);
4685    VIXL_ASSERT(OutsideITBlock());
4686    MacroEmissionCheckScope guard(this);
4687    ITScope it_scope(this, &cond);
4688    svc(cond, imm);
4689  }
4690  void Svc(uint32_t imm) { Svc(al, imm); }
4691
4692  void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
4693    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4694    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4695    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4696    VIXL_ASSERT(allow_macro_instructions_);
4697    VIXL_ASSERT(OutsideITBlock());
4698    MacroEmissionCheckScope guard(this);
4699    ITScope it_scope(this, &cond);
4700    sxtab(cond, rd, rn, operand);
4701  }
4702  void Sxtab(Register rd, Register rn, const Operand& operand) {
4703    Sxtab(al, rd, rn, operand);
4704  }
4705
4706  void Sxtab16(Condition cond,
4707               Register rd,
4708               Register rn,
4709               const Operand& operand) {
4710    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4711    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4712    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4713    VIXL_ASSERT(allow_macro_instructions_);
4714    VIXL_ASSERT(OutsideITBlock());
4715    MacroEmissionCheckScope guard(this);
4716    ITScope it_scope(this, &cond);
4717    sxtab16(cond, rd, rn, operand);
4718  }
4719  void Sxtab16(Register rd, Register rn, const Operand& operand) {
4720    Sxtab16(al, rd, rn, operand);
4721  }
4722
4723  void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
4724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4725    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4726    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4727    VIXL_ASSERT(allow_macro_instructions_);
4728    VIXL_ASSERT(OutsideITBlock());
4729    MacroEmissionCheckScope guard(this);
4730    ITScope it_scope(this, &cond);
4731    sxtah(cond, rd, rn, operand);
4732  }
4733  void Sxtah(Register rd, Register rn, const Operand& operand) {
4734    Sxtah(al, rd, rn, operand);
4735  }
4736
4737  void Sxtb(Condition cond, Register rd, const Operand& operand) {
4738    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4739    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4740    VIXL_ASSERT(allow_macro_instructions_);
4741    VIXL_ASSERT(OutsideITBlock());
4742    MacroEmissionCheckScope guard(this);
4743    ITScope it_scope(this, &cond);
4744    sxtb(cond, rd, operand);
4745  }
4746  void Sxtb(Register rd, const Operand& operand) { Sxtb(al, rd, operand); }
4747
4748  void Sxtb16(Condition cond, Register rd, const Operand& operand) {
4749    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4750    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4751    VIXL_ASSERT(allow_macro_instructions_);
4752    VIXL_ASSERT(OutsideITBlock());
4753    MacroEmissionCheckScope guard(this);
4754    ITScope it_scope(this, &cond);
4755    sxtb16(cond, rd, operand);
4756  }
4757  void Sxtb16(Register rd, const Operand& operand) { Sxtb16(al, rd, operand); }
4758
4759  void Sxth(Condition cond, Register rd, const Operand& operand) {
4760    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4761    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4762    VIXL_ASSERT(allow_macro_instructions_);
4763    VIXL_ASSERT(OutsideITBlock());
4764    MacroEmissionCheckScope guard(this);
4765    ITScope it_scope(this, &cond);
4766    sxth(cond, rd, operand);
4767  }
4768  void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); }
4769
4770
4771  void Teq(Condition cond, Register rn, const Operand& operand) {
4772    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4773    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4774    VIXL_ASSERT(allow_macro_instructions_);
4775    VIXL_ASSERT(OutsideITBlock());
4776    MacroEmissionCheckScope guard(this);
4777    ITScope it_scope(this, &cond);
4778    teq(cond, rn, operand);
4779  }
4780  void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); }
4781
4782  void Tst(Condition cond, Register rn, const Operand& operand) {
4783    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4784    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4785    VIXL_ASSERT(allow_macro_instructions_);
4786    VIXL_ASSERT(OutsideITBlock());
4787    MacroEmissionCheckScope guard(this);
4788    bool can_use_it =
4789        // TST{<c>}{<q>} <Rn>, <Rm> ; T1
4790        operand.IsPlainRegister() && rn.IsLow() &&
4791        operand.GetBaseRegister().IsLow();
4792    ITScope it_scope(this, &cond, can_use_it);
4793    tst(cond, rn, operand);
4794  }
4795  void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); }
4796
4797  void Uadd16(Condition cond, Register rd, Register rn, Register rm) {
4798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4799    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4800    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4801    VIXL_ASSERT(allow_macro_instructions_);
4802    VIXL_ASSERT(OutsideITBlock());
4803    MacroEmissionCheckScope guard(this);
4804    ITScope it_scope(this, &cond);
4805    uadd16(cond, rd, rn, rm);
4806  }
4807  void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); }
4808
4809  void Uadd8(Condition cond, Register rd, Register rn, Register rm) {
4810    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4811    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4813    VIXL_ASSERT(allow_macro_instructions_);
4814    VIXL_ASSERT(OutsideITBlock());
4815    MacroEmissionCheckScope guard(this);
4816    ITScope it_scope(this, &cond);
4817    uadd8(cond, rd, rn, rm);
4818  }
4819  void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); }
4820
4821  void Uasx(Condition cond, Register rd, Register rn, Register rm) {
4822    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4823    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4824    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4825    VIXL_ASSERT(allow_macro_instructions_);
4826    VIXL_ASSERT(OutsideITBlock());
4827    MacroEmissionCheckScope guard(this);
4828    ITScope it_scope(this, &cond);
4829    uasx(cond, rd, rn, rm);
4830  }
4831  void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); }
4832
4833  void Ubfx(Condition cond,
4834            Register rd,
4835            Register rn,
4836            uint32_t lsb,
4837            const Operand& operand) {
4838    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4839    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4840    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4841    VIXL_ASSERT(allow_macro_instructions_);
4842    VIXL_ASSERT(OutsideITBlock());
4843    MacroEmissionCheckScope guard(this);
4844    ITScope it_scope(this, &cond);
4845    ubfx(cond, rd, rn, lsb, operand);
4846  }
4847  void Ubfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
4848    Ubfx(al, rd, rn, lsb, operand);
4849  }
4850
4851  void Udf(Condition cond, uint32_t imm) {
4852    VIXL_ASSERT(allow_macro_instructions_);
4853    VIXL_ASSERT(OutsideITBlock());
4854    MacroEmissionCheckScope guard(this);
4855    ITScope it_scope(this, &cond);
4856    udf(cond, imm);
4857  }
4858  void Udf(uint32_t imm) { Udf(al, imm); }
4859
4860  void Udiv(Condition cond, Register rd, Register rn, Register rm) {
4861    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4862    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4863    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4864    VIXL_ASSERT(allow_macro_instructions_);
4865    VIXL_ASSERT(OutsideITBlock());
4866    MacroEmissionCheckScope guard(this);
4867    ITScope it_scope(this, &cond);
4868    udiv(cond, rd, rn, rm);
4869  }
4870  void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); }
4871
4872  void Uhadd16(Condition cond, Register rd, Register rn, Register rm) {
4873    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4874    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4876    VIXL_ASSERT(allow_macro_instructions_);
4877    VIXL_ASSERT(OutsideITBlock());
4878    MacroEmissionCheckScope guard(this);
4879    ITScope it_scope(this, &cond);
4880    uhadd16(cond, rd, rn, rm);
4881  }
4882  void Uhadd16(Register rd, Register rn, Register rm) {
4883    Uhadd16(al, rd, rn, rm);
4884  }
4885
4886  void Uhadd8(Condition cond, Register rd, Register rn, Register rm) {
4887    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4888    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4889    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4890    VIXL_ASSERT(allow_macro_instructions_);
4891    VIXL_ASSERT(OutsideITBlock());
4892    MacroEmissionCheckScope guard(this);
4893    ITScope it_scope(this, &cond);
4894    uhadd8(cond, rd, rn, rm);
4895  }
4896  void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); }
4897
4898  void Uhasx(Condition cond, Register rd, Register rn, Register rm) {
4899    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4900    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4901    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4902    VIXL_ASSERT(allow_macro_instructions_);
4903    VIXL_ASSERT(OutsideITBlock());
4904    MacroEmissionCheckScope guard(this);
4905    ITScope it_scope(this, &cond);
4906    uhasx(cond, rd, rn, rm);
4907  }
4908  void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); }
4909
4910  void Uhsax(Condition cond, Register rd, Register rn, Register rm) {
4911    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4912    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4914    VIXL_ASSERT(allow_macro_instructions_);
4915    VIXL_ASSERT(OutsideITBlock());
4916    MacroEmissionCheckScope guard(this);
4917    ITScope it_scope(this, &cond);
4918    uhsax(cond, rd, rn, rm);
4919  }
4920  void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); }
4921
4922  void Uhsub16(Condition cond, Register rd, Register rn, Register rm) {
4923    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4924    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4925    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4926    VIXL_ASSERT(allow_macro_instructions_);
4927    VIXL_ASSERT(OutsideITBlock());
4928    MacroEmissionCheckScope guard(this);
4929    ITScope it_scope(this, &cond);
4930    uhsub16(cond, rd, rn, rm);
4931  }
4932  void Uhsub16(Register rd, Register rn, Register rm) {
4933    Uhsub16(al, rd, rn, rm);
4934  }
4935
4936  void Uhsub8(Condition cond, Register rd, Register rn, Register rm) {
4937    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4940    VIXL_ASSERT(allow_macro_instructions_);
4941    VIXL_ASSERT(OutsideITBlock());
4942    MacroEmissionCheckScope guard(this);
4943    ITScope it_scope(this, &cond);
4944    uhsub8(cond, rd, rn, rm);
4945  }
4946  void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); }
4947
4948  void Umaal(
4949      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4952    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4953    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4954    VIXL_ASSERT(allow_macro_instructions_);
4955    VIXL_ASSERT(OutsideITBlock());
4956    MacroEmissionCheckScope guard(this);
4957    ITScope it_scope(this, &cond);
4958    umaal(cond, rdlo, rdhi, rn, rm);
4959  }
4960  void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
4961    Umaal(al, rdlo, rdhi, rn, rm);
4962  }
4963
4964  void Umlal(
4965      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4966    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4967    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4968    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4969    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4970    VIXL_ASSERT(allow_macro_instructions_);
4971    VIXL_ASSERT(OutsideITBlock());
4972    MacroEmissionCheckScope guard(this);
4973    ITScope it_scope(this, &cond);
4974    umlal(cond, rdlo, rdhi, rn, rm);
4975  }
4976  void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
4977    Umlal(al, rdlo, rdhi, rn, rm);
4978  }
4979  void Umlal(FlagsUpdate flags,
4980             Condition cond,
4981             Register rdlo,
4982             Register rdhi,
4983             Register rn,
4984             Register rm) {
4985    switch (flags) {
4986      case LeaveFlags:
4987        Umlal(cond, rdlo, rdhi, rn, rm);
4988        break;
4989      case SetFlags:
4990        Umlals(cond, rdlo, rdhi, rn, rm);
4991        break;
4992      case DontCare:
4993        Umlal(cond, rdlo, rdhi, rn, rm);
4994        break;
4995    }
4996  }
4997  void Umlal(FlagsUpdate flags,
4998             Register rdlo,
4999             Register rdhi,
5000             Register rn,
5001             Register rm) {
5002    Umlal(flags, al, rdlo, rdhi, rn, rm);
5003  }
5004
5005  void Umlals(
5006      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5007    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5008    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5010    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5011    VIXL_ASSERT(allow_macro_instructions_);
5012    VIXL_ASSERT(OutsideITBlock());
5013    MacroEmissionCheckScope guard(this);
5014    ITScope it_scope(this, &cond);
5015    umlals(cond, rdlo, rdhi, rn, rm);
5016  }
5017  void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
5018    Umlals(al, rdlo, rdhi, rn, rm);
5019  }
5020
5021  void Umull(
5022      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5023    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5024    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5025    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5026    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5027    VIXL_ASSERT(allow_macro_instructions_);
5028    VIXL_ASSERT(OutsideITBlock());
5029    MacroEmissionCheckScope guard(this);
5030    ITScope it_scope(this, &cond);
5031    umull(cond, rdlo, rdhi, rn, rm);
5032  }
5033  void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
5034    Umull(al, rdlo, rdhi, rn, rm);
5035  }
5036  void Umull(FlagsUpdate flags,
5037             Condition cond,
5038             Register rdlo,
5039             Register rdhi,
5040             Register rn,
5041             Register rm) {
5042    switch (flags) {
5043      case LeaveFlags:
5044        Umull(cond, rdlo, rdhi, rn, rm);
5045        break;
5046      case SetFlags:
5047        Umulls(cond, rdlo, rdhi, rn, rm);
5048        break;
5049      case DontCare:
5050        Umull(cond, rdlo, rdhi, rn, rm);
5051        break;
5052    }
5053  }
5054  void Umull(FlagsUpdate flags,
5055             Register rdlo,
5056             Register rdhi,
5057             Register rn,
5058             Register rm) {
5059    Umull(flags, al, rdlo, rdhi, rn, rm);
5060  }
5061
5062  void Umulls(
5063      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5066    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5067    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5068    VIXL_ASSERT(allow_macro_instructions_);
5069    VIXL_ASSERT(OutsideITBlock());
5070    MacroEmissionCheckScope guard(this);
5071    ITScope it_scope(this, &cond);
5072    umulls(cond, rdlo, rdhi, rn, rm);
5073  }
5074  void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
5075    Umulls(al, rdlo, rdhi, rn, rm);
5076  }
5077
5078  void Uqadd16(Condition cond, Register rd, Register rn, Register rm) {
5079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5081    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5082    VIXL_ASSERT(allow_macro_instructions_);
5083    VIXL_ASSERT(OutsideITBlock());
5084    MacroEmissionCheckScope guard(this);
5085    ITScope it_scope(this, &cond);
5086    uqadd16(cond, rd, rn, rm);
5087  }
5088  void Uqadd16(Register rd, Register rn, Register rm) {
5089    Uqadd16(al, rd, rn, rm);
5090  }
5091
5092  void Uqadd8(Condition cond, Register rd, Register rn, Register rm) {
5093    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5095    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5096    VIXL_ASSERT(allow_macro_instructions_);
5097    VIXL_ASSERT(OutsideITBlock());
5098    MacroEmissionCheckScope guard(this);
5099    ITScope it_scope(this, &cond);
5100    uqadd8(cond, rd, rn, rm);
5101  }
5102  void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); }
5103
5104  void Uqasx(Condition cond, Register rd, Register rn, Register rm) {
5105    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5106    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5107    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5108    VIXL_ASSERT(allow_macro_instructions_);
5109    VIXL_ASSERT(OutsideITBlock());
5110    MacroEmissionCheckScope guard(this);
5111    ITScope it_scope(this, &cond);
5112    uqasx(cond, rd, rn, rm);
5113  }
5114  void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); }
5115
5116  void Uqsax(Condition cond, Register rd, Register rn, Register rm) {
5117    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5118    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5119    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5120    VIXL_ASSERT(allow_macro_instructions_);
5121    VIXL_ASSERT(OutsideITBlock());
5122    MacroEmissionCheckScope guard(this);
5123    ITScope it_scope(this, &cond);
5124    uqsax(cond, rd, rn, rm);
5125  }
5126  void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); }
5127
5128  void Uqsub16(Condition cond, Register rd, Register rn, Register rm) {
5129    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5130    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5131    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5132    VIXL_ASSERT(allow_macro_instructions_);
5133    VIXL_ASSERT(OutsideITBlock());
5134    MacroEmissionCheckScope guard(this);
5135    ITScope it_scope(this, &cond);
5136    uqsub16(cond, rd, rn, rm);
5137  }
5138  void Uqsub16(Register rd, Register rn, Register rm) {
5139    Uqsub16(al, rd, rn, rm);
5140  }
5141
5142  void Uqsub8(Condition cond, Register rd, Register rn, Register rm) {
5143    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5144    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5145    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5146    VIXL_ASSERT(allow_macro_instructions_);
5147    VIXL_ASSERT(OutsideITBlock());
5148    MacroEmissionCheckScope guard(this);
5149    ITScope it_scope(this, &cond);
5150    uqsub8(cond, rd, rn, rm);
5151  }
5152  void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); }
5153
5154  void Usad8(Condition cond, Register rd, Register rn, Register rm) {
5155    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5156    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5158    VIXL_ASSERT(allow_macro_instructions_);
5159    VIXL_ASSERT(OutsideITBlock());
5160    MacroEmissionCheckScope guard(this);
5161    ITScope it_scope(this, &cond);
5162    usad8(cond, rd, rn, rm);
5163  }
5164  void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); }
5165
5166  void Usada8(
5167      Condition cond, Register rd, Register rn, Register rm, Register ra) {
5168    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5169    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5170    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5171    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
5172    VIXL_ASSERT(allow_macro_instructions_);
5173    VIXL_ASSERT(OutsideITBlock());
5174    MacroEmissionCheckScope guard(this);
5175    ITScope it_scope(this, &cond);
5176    usada8(cond, rd, rn, rm, ra);
5177  }
5178  void Usada8(Register rd, Register rn, Register rm, Register ra) {
5179    Usada8(al, rd, rn, rm, ra);
5180  }
5181
5182  void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
5183    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5184    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5185    VIXL_ASSERT(allow_macro_instructions_);
5186    VIXL_ASSERT(OutsideITBlock());
5187    MacroEmissionCheckScope guard(this);
5188    ITScope it_scope(this, &cond);
5189    usat(cond, rd, imm, operand);
5190  }
5191  void Usat(Register rd, uint32_t imm, const Operand& operand) {
5192    Usat(al, rd, imm, operand);
5193  }
5194
5195  void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) {
5196    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5198    VIXL_ASSERT(allow_macro_instructions_);
5199    VIXL_ASSERT(OutsideITBlock());
5200    MacroEmissionCheckScope guard(this);
5201    ITScope it_scope(this, &cond);
5202    usat16(cond, rd, imm, rn);
5203  }
5204  void Usat16(Register rd, uint32_t imm, Register rn) {
5205    Usat16(al, rd, imm, rn);
5206  }
5207
5208  void Usax(Condition cond, Register rd, Register rn, Register rm) {
5209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5210    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5212    VIXL_ASSERT(allow_macro_instructions_);
5213    VIXL_ASSERT(OutsideITBlock());
5214    MacroEmissionCheckScope guard(this);
5215    ITScope it_scope(this, &cond);
5216    usax(cond, rd, rn, rm);
5217  }
5218  void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); }
5219
5220  void Usub16(Condition cond, Register rd, Register rn, Register rm) {
5221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5224    VIXL_ASSERT(allow_macro_instructions_);
5225    VIXL_ASSERT(OutsideITBlock());
5226    MacroEmissionCheckScope guard(this);
5227    ITScope it_scope(this, &cond);
5228    usub16(cond, rd, rn, rm);
5229  }
5230  void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); }
5231
5232  void Usub8(Condition cond, Register rd, Register rn, Register rm) {
5233    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5234    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5235    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5236    VIXL_ASSERT(allow_macro_instructions_);
5237    VIXL_ASSERT(OutsideITBlock());
5238    MacroEmissionCheckScope guard(this);
5239    ITScope it_scope(this, &cond);
5240    usub8(cond, rd, rn, rm);
5241  }
5242  void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); }
5243
5244  void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
5245    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5247    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5248    VIXL_ASSERT(allow_macro_instructions_);
5249    VIXL_ASSERT(OutsideITBlock());
5250    MacroEmissionCheckScope guard(this);
5251    ITScope it_scope(this, &cond);
5252    uxtab(cond, rd, rn, operand);
5253  }
5254  void Uxtab(Register rd, Register rn, const Operand& operand) {
5255    Uxtab(al, rd, rn, operand);
5256  }
5257
5258  void Uxtab16(Condition cond,
5259               Register rd,
5260               Register rn,
5261               const Operand& operand) {
5262    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5263    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5264    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5265    VIXL_ASSERT(allow_macro_instructions_);
5266    VIXL_ASSERT(OutsideITBlock());
5267    MacroEmissionCheckScope guard(this);
5268    ITScope it_scope(this, &cond);
5269    uxtab16(cond, rd, rn, operand);
5270  }
5271  void Uxtab16(Register rd, Register rn, const Operand& operand) {
5272    Uxtab16(al, rd, rn, operand);
5273  }
5274
5275  void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
5276    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5277    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5278    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5279    VIXL_ASSERT(allow_macro_instructions_);
5280    VIXL_ASSERT(OutsideITBlock());
5281    MacroEmissionCheckScope guard(this);
5282    ITScope it_scope(this, &cond);
5283    uxtah(cond, rd, rn, operand);
5284  }
5285  void Uxtah(Register rd, Register rn, const Operand& operand) {
5286    Uxtah(al, rd, rn, operand);
5287  }
5288
5289  void Uxtb(Condition cond, Register rd, const Operand& operand) {
5290    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5291    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5292    VIXL_ASSERT(allow_macro_instructions_);
5293    VIXL_ASSERT(OutsideITBlock());
5294    MacroEmissionCheckScope guard(this);
5295    ITScope it_scope(this, &cond);
5296    uxtb(cond, rd, operand);
5297  }
5298  void Uxtb(Register rd, const Operand& operand) { Uxtb(al, rd, operand); }
5299
5300  void Uxtb16(Condition cond, Register rd, const Operand& operand) {
5301    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5302    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5303    VIXL_ASSERT(allow_macro_instructions_);
5304    VIXL_ASSERT(OutsideITBlock());
5305    MacroEmissionCheckScope guard(this);
5306    ITScope it_scope(this, &cond);
5307    uxtb16(cond, rd, operand);
5308  }
5309  void Uxtb16(Register rd, const Operand& operand) { Uxtb16(al, rd, operand); }
5310
5311  void Uxth(Condition cond, Register rd, const Operand& operand) {
5312    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5313    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5314    VIXL_ASSERT(allow_macro_instructions_);
5315    VIXL_ASSERT(OutsideITBlock());
5316    MacroEmissionCheckScope guard(this);
5317    ITScope it_scope(this, &cond);
5318    uxth(cond, rd, operand);
5319  }
5320  void Uxth(Register rd, const Operand& operand) { Uxth(al, rd, operand); }
5321
5322  void Vaba(
5323      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5327    VIXL_ASSERT(allow_macro_instructions_);
5328    VIXL_ASSERT(OutsideITBlock());
5329    MacroEmissionCheckScope guard(this);
5330    ITScope it_scope(this, &cond);
5331    vaba(cond, dt, rd, rn, rm);
5332  }
5333  void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5334    Vaba(al, dt, rd, rn, rm);
5335  }
5336
5337  void Vaba(
5338      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5340    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5341    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5342    VIXL_ASSERT(allow_macro_instructions_);
5343    VIXL_ASSERT(OutsideITBlock());
5344    MacroEmissionCheckScope guard(this);
5345    ITScope it_scope(this, &cond);
5346    vaba(cond, dt, rd, rn, rm);
5347  }
5348  void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5349    Vaba(al, dt, rd, rn, rm);
5350  }
5351
5352  void Vabal(
5353      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5354    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5355    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5356    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5357    VIXL_ASSERT(allow_macro_instructions_);
5358    VIXL_ASSERT(OutsideITBlock());
5359    MacroEmissionCheckScope guard(this);
5360    ITScope it_scope(this, &cond);
5361    vabal(cond, dt, rd, rn, rm);
5362  }
5363  void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5364    Vabal(al, dt, rd, rn, rm);
5365  }
5366
5367  void Vabd(
5368      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5369    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5372    VIXL_ASSERT(allow_macro_instructions_);
5373    VIXL_ASSERT(OutsideITBlock());
5374    MacroEmissionCheckScope guard(this);
5375    ITScope it_scope(this, &cond);
5376    vabd(cond, dt, rd, rn, rm);
5377  }
5378  void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5379    Vabd(al, dt, rd, rn, rm);
5380  }
5381
5382  void Vabd(
5383      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5384    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5385    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5386    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5387    VIXL_ASSERT(allow_macro_instructions_);
5388    VIXL_ASSERT(OutsideITBlock());
5389    MacroEmissionCheckScope guard(this);
5390    ITScope it_scope(this, &cond);
5391    vabd(cond, dt, rd, rn, rm);
5392  }
5393  void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5394    Vabd(al, dt, rd, rn, rm);
5395  }
5396
5397  void Vabdl(
5398      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5399    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5401    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5402    VIXL_ASSERT(allow_macro_instructions_);
5403    VIXL_ASSERT(OutsideITBlock());
5404    MacroEmissionCheckScope guard(this);
5405    ITScope it_scope(this, &cond);
5406    vabdl(cond, dt, rd, rn, rm);
5407  }
5408  void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5409    Vabdl(al, dt, rd, rn, rm);
5410  }
5411
5412  void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
5413    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5414    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5415    VIXL_ASSERT(allow_macro_instructions_);
5416    VIXL_ASSERT(OutsideITBlock());
5417    MacroEmissionCheckScope guard(this);
5418    ITScope it_scope(this, &cond);
5419    vabs(cond, dt, rd, rm);
5420  }
5421  void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); }
5422
5423  void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
5424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5426    VIXL_ASSERT(allow_macro_instructions_);
5427    VIXL_ASSERT(OutsideITBlock());
5428    MacroEmissionCheckScope guard(this);
5429    ITScope it_scope(this, &cond);
5430    vabs(cond, dt, rd, rm);
5431  }
5432  void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); }
5433
5434  void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) {
5435    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5436    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5437    VIXL_ASSERT(allow_macro_instructions_);
5438    VIXL_ASSERT(OutsideITBlock());
5439    MacroEmissionCheckScope guard(this);
5440    ITScope it_scope(this, &cond);
5441    vabs(cond, dt, rd, rm);
5442  }
5443  void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); }
5444
5445  void Vacge(
5446      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5447    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5448    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5450    VIXL_ASSERT(allow_macro_instructions_);
5451    VIXL_ASSERT(OutsideITBlock());
5452    MacroEmissionCheckScope guard(this);
5453    ITScope it_scope(this, &cond);
5454    vacge(cond, dt, rd, rn, rm);
5455  }
5456  void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5457    Vacge(al, dt, rd, rn, rm);
5458  }
5459
5460  void Vacge(
5461      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5462    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5464    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5465    VIXL_ASSERT(allow_macro_instructions_);
5466    VIXL_ASSERT(OutsideITBlock());
5467    MacroEmissionCheckScope guard(this);
5468    ITScope it_scope(this, &cond);
5469    vacge(cond, dt, rd, rn, rm);
5470  }
5471  void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5472    Vacge(al, dt, rd, rn, rm);
5473  }
5474
5475  void Vacgt(
5476      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5477    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5478    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5480    VIXL_ASSERT(allow_macro_instructions_);
5481    VIXL_ASSERT(OutsideITBlock());
5482    MacroEmissionCheckScope guard(this);
5483    ITScope it_scope(this, &cond);
5484    vacgt(cond, dt, rd, rn, rm);
5485  }
5486  void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5487    Vacgt(al, dt, rd, rn, rm);
5488  }
5489
5490  void Vacgt(
5491      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5493    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5494    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5495    VIXL_ASSERT(allow_macro_instructions_);
5496    VIXL_ASSERT(OutsideITBlock());
5497    MacroEmissionCheckScope guard(this);
5498    ITScope it_scope(this, &cond);
5499    vacgt(cond, dt, rd, rn, rm);
5500  }
5501  void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5502    Vacgt(al, dt, rd, rn, rm);
5503  }
5504
5505  void Vacle(
5506      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5508    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5509    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5510    VIXL_ASSERT(allow_macro_instructions_);
5511    VIXL_ASSERT(OutsideITBlock());
5512    MacroEmissionCheckScope guard(this);
5513    ITScope it_scope(this, &cond);
5514    vacle(cond, dt, rd, rn, rm);
5515  }
5516  void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5517    Vacle(al, dt, rd, rn, rm);
5518  }
5519
5520  void Vacle(
5521      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5522    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5523    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5524    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5525    VIXL_ASSERT(allow_macro_instructions_);
5526    VIXL_ASSERT(OutsideITBlock());
5527    MacroEmissionCheckScope guard(this);
5528    ITScope it_scope(this, &cond);
5529    vacle(cond, dt, rd, rn, rm);
5530  }
5531  void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5532    Vacle(al, dt, rd, rn, rm);
5533  }
5534
5535  void Vaclt(
5536      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5537    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5540    VIXL_ASSERT(allow_macro_instructions_);
5541    VIXL_ASSERT(OutsideITBlock());
5542    MacroEmissionCheckScope guard(this);
5543    ITScope it_scope(this, &cond);
5544    vaclt(cond, dt, rd, rn, rm);
5545  }
5546  void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5547    Vaclt(al, dt, rd, rn, rm);
5548  }
5549
5550  void Vaclt(
5551      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5552    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5553    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5555    VIXL_ASSERT(allow_macro_instructions_);
5556    VIXL_ASSERT(OutsideITBlock());
5557    MacroEmissionCheckScope guard(this);
5558    ITScope it_scope(this, &cond);
5559    vaclt(cond, dt, rd, rn, rm);
5560  }
5561  void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5562    Vaclt(al, dt, rd, rn, rm);
5563  }
5564
5565  void Vadd(
5566      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5567    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5570    VIXL_ASSERT(allow_macro_instructions_);
5571    VIXL_ASSERT(OutsideITBlock());
5572    MacroEmissionCheckScope guard(this);
5573    ITScope it_scope(this, &cond);
5574    vadd(cond, dt, rd, rn, rm);
5575  }
5576  void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5577    Vadd(al, dt, rd, rn, rm);
5578  }
5579
5580  void Vadd(
5581      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5583    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5584    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5585    VIXL_ASSERT(allow_macro_instructions_);
5586    VIXL_ASSERT(OutsideITBlock());
5587    MacroEmissionCheckScope guard(this);
5588    ITScope it_scope(this, &cond);
5589    vadd(cond, dt, rd, rn, rm);
5590  }
5591  void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5592    Vadd(al, dt, rd, rn, rm);
5593  }
5594
5595  void Vadd(
5596      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5599    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5600    VIXL_ASSERT(allow_macro_instructions_);
5601    VIXL_ASSERT(OutsideITBlock());
5602    MacroEmissionCheckScope guard(this);
5603    ITScope it_scope(this, &cond);
5604    vadd(cond, dt, rd, rn, rm);
5605  }
5606  void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5607    Vadd(al, dt, rd, rn, rm);
5608  }
5609
5610  void Vaddhn(
5611      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5612    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5613    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5614    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5615    VIXL_ASSERT(allow_macro_instructions_);
5616    VIXL_ASSERT(OutsideITBlock());
5617    MacroEmissionCheckScope guard(this);
5618    ITScope it_scope(this, &cond);
5619    vaddhn(cond, dt, rd, rn, rm);
5620  }
5621  void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5622    Vaddhn(al, dt, rd, rn, rm);
5623  }
5624
5625  void Vaddl(
5626      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5627    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5628    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5629    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5630    VIXL_ASSERT(allow_macro_instructions_);
5631    VIXL_ASSERT(OutsideITBlock());
5632    MacroEmissionCheckScope guard(this);
5633    ITScope it_scope(this, &cond);
5634    vaddl(cond, dt, rd, rn, rm);
5635  }
5636  void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5637    Vaddl(al, dt, rd, rn, rm);
5638  }
5639
5640  void Vaddw(
5641      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5642    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5643    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5645    VIXL_ASSERT(allow_macro_instructions_);
5646    VIXL_ASSERT(OutsideITBlock());
5647    MacroEmissionCheckScope guard(this);
5648    ITScope it_scope(this, &cond);
5649    vaddw(cond, dt, rd, rn, rm);
5650  }
5651  void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5652    Vaddw(al, dt, rd, rn, rm);
5653  }
5654
5655  void Vand(Condition cond,
5656            DataType dt,
5657            DRegister rd,
5658            DRegister rn,
5659            const DOperand& operand) {
5660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5662    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5663    VIXL_ASSERT(allow_macro_instructions_);
5664    VIXL_ASSERT(OutsideITBlock());
5665    MacroEmissionCheckScope guard(this);
5666    ITScope it_scope(this, &cond);
5667    vand(cond, dt, rd, rn, operand);
5668  }
5669  void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5670    Vand(al, dt, rd, rn, operand);
5671  }
5672
5673  void Vand(Condition cond,
5674            DataType dt,
5675            QRegister rd,
5676            QRegister rn,
5677            const QOperand& operand) {
5678    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5679    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5680    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5681    VIXL_ASSERT(allow_macro_instructions_);
5682    VIXL_ASSERT(OutsideITBlock());
5683    MacroEmissionCheckScope guard(this);
5684    ITScope it_scope(this, &cond);
5685    vand(cond, dt, rd, rn, operand);
5686  }
5687  void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5688    Vand(al, dt, rd, rn, operand);
5689  }
5690
5691  void Vbic(Condition cond,
5692            DataType dt,
5693            DRegister rd,
5694            DRegister rn,
5695            const DOperand& operand) {
5696    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5698    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5699    VIXL_ASSERT(allow_macro_instructions_);
5700    VIXL_ASSERT(OutsideITBlock());
5701    MacroEmissionCheckScope guard(this);
5702    ITScope it_scope(this, &cond);
5703    vbic(cond, dt, rd, rn, operand);
5704  }
5705  void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5706    Vbic(al, dt, rd, rn, operand);
5707  }
5708
5709  void Vbic(Condition cond,
5710            DataType dt,
5711            QRegister rd,
5712            QRegister rn,
5713            const QOperand& operand) {
5714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5716    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5717    VIXL_ASSERT(allow_macro_instructions_);
5718    VIXL_ASSERT(OutsideITBlock());
5719    MacroEmissionCheckScope guard(this);
5720    ITScope it_scope(this, &cond);
5721    vbic(cond, dt, rd, rn, operand);
5722  }
5723  void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5724    Vbic(al, dt, rd, rn, operand);
5725  }
5726
5727  void Vbif(
5728      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5729    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5732    VIXL_ASSERT(allow_macro_instructions_);
5733    VIXL_ASSERT(OutsideITBlock());
5734    MacroEmissionCheckScope guard(this);
5735    ITScope it_scope(this, &cond);
5736    vbif(cond, dt, rd, rn, rm);
5737  }
5738  void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5739    Vbif(al, dt, rd, rn, rm);
5740  }
5741  void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5742    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5743  }
5744  void Vbif(DRegister rd, DRegister rn, DRegister rm) {
5745    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5746  }
5747
5748  void Vbif(
5749      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5750    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5752    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5753    VIXL_ASSERT(allow_macro_instructions_);
5754    VIXL_ASSERT(OutsideITBlock());
5755    MacroEmissionCheckScope guard(this);
5756    ITScope it_scope(this, &cond);
5757    vbif(cond, dt, rd, rn, rm);
5758  }
5759  void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5760    Vbif(al, dt, rd, rn, rm);
5761  }
5762  void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5763    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5764  }
5765  void Vbif(QRegister rd, QRegister rn, QRegister rm) {
5766    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5767  }
5768
5769  void Vbit(
5770      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5771    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5772    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5773    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5774    VIXL_ASSERT(allow_macro_instructions_);
5775    VIXL_ASSERT(OutsideITBlock());
5776    MacroEmissionCheckScope guard(this);
5777    ITScope it_scope(this, &cond);
5778    vbit(cond, dt, rd, rn, rm);
5779  }
5780  void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5781    Vbit(al, dt, rd, rn, rm);
5782  }
5783  void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5784    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5785  }
5786  void Vbit(DRegister rd, DRegister rn, DRegister rm) {
5787    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5788  }
5789
5790  void Vbit(
5791      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5792    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5793    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5795    VIXL_ASSERT(allow_macro_instructions_);
5796    VIXL_ASSERT(OutsideITBlock());
5797    MacroEmissionCheckScope guard(this);
5798    ITScope it_scope(this, &cond);
5799    vbit(cond, dt, rd, rn, rm);
5800  }
5801  void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5802    Vbit(al, dt, rd, rn, rm);
5803  }
5804  void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5805    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5806  }
5807  void Vbit(QRegister rd, QRegister rn, QRegister rm) {
5808    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5809  }
5810
5811  void Vbsl(
5812      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5813    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5814    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5815    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5816    VIXL_ASSERT(allow_macro_instructions_);
5817    VIXL_ASSERT(OutsideITBlock());
5818    MacroEmissionCheckScope guard(this);
5819    ITScope it_scope(this, &cond);
5820    vbsl(cond, dt, rd, rn, rm);
5821  }
5822  void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5823    Vbsl(al, dt, rd, rn, rm);
5824  }
5825  void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5826    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5827  }
5828  void Vbsl(DRegister rd, DRegister rn, DRegister rm) {
5829    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5830  }
5831
5832  void Vbsl(
5833      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5834    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5835    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5836    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5837    VIXL_ASSERT(allow_macro_instructions_);
5838    VIXL_ASSERT(OutsideITBlock());
5839    MacroEmissionCheckScope guard(this);
5840    ITScope it_scope(this, &cond);
5841    vbsl(cond, dt, rd, rn, rm);
5842  }
5843  void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5844    Vbsl(al, dt, rd, rn, rm);
5845  }
5846  void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5847    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5848  }
5849  void Vbsl(QRegister rd, QRegister rn, QRegister rm) {
5850    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5851  }
5852
5853  void Vceq(Condition cond,
5854            DataType dt,
5855            DRegister rd,
5856            DRegister rm,
5857            const DOperand& operand) {
5858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5860    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5861    VIXL_ASSERT(allow_macro_instructions_);
5862    VIXL_ASSERT(OutsideITBlock());
5863    MacroEmissionCheckScope guard(this);
5864    ITScope it_scope(this, &cond);
5865    vceq(cond, dt, rd, rm, operand);
5866  }
5867  void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5868    Vceq(al, dt, rd, rm, operand);
5869  }
5870
5871  void Vceq(Condition cond,
5872            DataType dt,
5873            QRegister rd,
5874            QRegister rm,
5875            const QOperand& operand) {
5876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5877    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5878    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5879    VIXL_ASSERT(allow_macro_instructions_);
5880    VIXL_ASSERT(OutsideITBlock());
5881    MacroEmissionCheckScope guard(this);
5882    ITScope it_scope(this, &cond);
5883    vceq(cond, dt, rd, rm, operand);
5884  }
5885  void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5886    Vceq(al, dt, rd, rm, operand);
5887  }
5888
5889  void Vceq(
5890      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5892    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5893    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5894    VIXL_ASSERT(allow_macro_instructions_);
5895    VIXL_ASSERT(OutsideITBlock());
5896    MacroEmissionCheckScope guard(this);
5897    ITScope it_scope(this, &cond);
5898    vceq(cond, dt, rd, rn, rm);
5899  }
5900  void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5901    Vceq(al, dt, rd, rn, rm);
5902  }
5903
5904  void Vceq(
5905      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5906    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5907    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5909    VIXL_ASSERT(allow_macro_instructions_);
5910    VIXL_ASSERT(OutsideITBlock());
5911    MacroEmissionCheckScope guard(this);
5912    ITScope it_scope(this, &cond);
5913    vceq(cond, dt, rd, rn, rm);
5914  }
5915  void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5916    Vceq(al, dt, rd, rn, rm);
5917  }
5918
5919  void Vcge(Condition cond,
5920            DataType dt,
5921            DRegister rd,
5922            DRegister rm,
5923            const DOperand& operand) {
5924    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5925    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5926    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5927    VIXL_ASSERT(allow_macro_instructions_);
5928    VIXL_ASSERT(OutsideITBlock());
5929    MacroEmissionCheckScope guard(this);
5930    ITScope it_scope(this, &cond);
5931    vcge(cond, dt, rd, rm, operand);
5932  }
5933  void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5934    Vcge(al, dt, rd, rm, operand);
5935  }
5936
5937  void Vcge(Condition cond,
5938            DataType dt,
5939            QRegister rd,
5940            QRegister rm,
5941            const QOperand& operand) {
5942    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5943    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5944    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5945    VIXL_ASSERT(allow_macro_instructions_);
5946    VIXL_ASSERT(OutsideITBlock());
5947    MacroEmissionCheckScope guard(this);
5948    ITScope it_scope(this, &cond);
5949    vcge(cond, dt, rd, rm, operand);
5950  }
5951  void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5952    Vcge(al, dt, rd, rm, operand);
5953  }
5954
5955  void Vcge(
5956      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5957    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5958    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5959    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5960    VIXL_ASSERT(allow_macro_instructions_);
5961    VIXL_ASSERT(OutsideITBlock());
5962    MacroEmissionCheckScope guard(this);
5963    ITScope it_scope(this, &cond);
5964    vcge(cond, dt, rd, rn, rm);
5965  }
5966  void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5967    Vcge(al, dt, rd, rn, rm);
5968  }
5969
5970  void Vcge(
5971      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5972    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5973    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5975    VIXL_ASSERT(allow_macro_instructions_);
5976    VIXL_ASSERT(OutsideITBlock());
5977    MacroEmissionCheckScope guard(this);
5978    ITScope it_scope(this, &cond);
5979    vcge(cond, dt, rd, rn, rm);
5980  }
5981  void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5982    Vcge(al, dt, rd, rn, rm);
5983  }
5984
5985  void Vcgt(Condition cond,
5986            DataType dt,
5987            DRegister rd,
5988            DRegister rm,
5989            const DOperand& operand) {
5990    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5991    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5992    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5993    VIXL_ASSERT(allow_macro_instructions_);
5994    VIXL_ASSERT(OutsideITBlock());
5995    MacroEmissionCheckScope guard(this);
5996    ITScope it_scope(this, &cond);
5997    vcgt(cond, dt, rd, rm, operand);
5998  }
5999  void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6000    Vcgt(al, dt, rd, rm, operand);
6001  }
6002
6003  void Vcgt(Condition cond,
6004            DataType dt,
6005            QRegister rd,
6006            QRegister rm,
6007            const QOperand& operand) {
6008    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6010    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6011    VIXL_ASSERT(allow_macro_instructions_);
6012    VIXL_ASSERT(OutsideITBlock());
6013    MacroEmissionCheckScope guard(this);
6014    ITScope it_scope(this, &cond);
6015    vcgt(cond, dt, rd, rm, operand);
6016  }
6017  void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6018    Vcgt(al, dt, rd, rm, operand);
6019  }
6020
6021  void Vcgt(
6022      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6023    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6024    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6025    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6026    VIXL_ASSERT(allow_macro_instructions_);
6027    VIXL_ASSERT(OutsideITBlock());
6028    MacroEmissionCheckScope guard(this);
6029    ITScope it_scope(this, &cond);
6030    vcgt(cond, dt, rd, rn, rm);
6031  }
6032  void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6033    Vcgt(al, dt, rd, rn, rm);
6034  }
6035
6036  void Vcgt(
6037      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6038    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6039    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6040    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6041    VIXL_ASSERT(allow_macro_instructions_);
6042    VIXL_ASSERT(OutsideITBlock());
6043    MacroEmissionCheckScope guard(this);
6044    ITScope it_scope(this, &cond);
6045    vcgt(cond, dt, rd, rn, rm);
6046  }
6047  void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6048    Vcgt(al, dt, rd, rn, rm);
6049  }
6050
6051  void Vcle(Condition cond,
6052            DataType dt,
6053            DRegister rd,
6054            DRegister rm,
6055            const DOperand& operand) {
6056    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6057    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6058    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6059    VIXL_ASSERT(allow_macro_instructions_);
6060    VIXL_ASSERT(OutsideITBlock());
6061    MacroEmissionCheckScope guard(this);
6062    ITScope it_scope(this, &cond);
6063    vcle(cond, dt, rd, rm, operand);
6064  }
6065  void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6066    Vcle(al, dt, rd, rm, operand);
6067  }
6068
6069  void Vcle(Condition cond,
6070            DataType dt,
6071            QRegister rd,
6072            QRegister rm,
6073            const QOperand& operand) {
6074    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6076    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6077    VIXL_ASSERT(allow_macro_instructions_);
6078    VIXL_ASSERT(OutsideITBlock());
6079    MacroEmissionCheckScope guard(this);
6080    ITScope it_scope(this, &cond);
6081    vcle(cond, dt, rd, rm, operand);
6082  }
6083  void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6084    Vcle(al, dt, rd, rm, operand);
6085  }
6086
6087  void Vcle(
6088      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6089    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6092    VIXL_ASSERT(allow_macro_instructions_);
6093    VIXL_ASSERT(OutsideITBlock());
6094    MacroEmissionCheckScope guard(this);
6095    ITScope it_scope(this, &cond);
6096    vcle(cond, dt, rd, rn, rm);
6097  }
6098  void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6099    Vcle(al, dt, rd, rn, rm);
6100  }
6101
6102  void Vcle(
6103      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6104    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6105    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6106    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6107    VIXL_ASSERT(allow_macro_instructions_);
6108    VIXL_ASSERT(OutsideITBlock());
6109    MacroEmissionCheckScope guard(this);
6110    ITScope it_scope(this, &cond);
6111    vcle(cond, dt, rd, rn, rm);
6112  }
6113  void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6114    Vcle(al, dt, rd, rn, rm);
6115  }
6116
6117  void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6118    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6119    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6120    VIXL_ASSERT(allow_macro_instructions_);
6121    VIXL_ASSERT(OutsideITBlock());
6122    MacroEmissionCheckScope guard(this);
6123    ITScope it_scope(this, &cond);
6124    vcls(cond, dt, rd, rm);
6125  }
6126  void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); }
6127
6128  void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6129    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6130    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6131    VIXL_ASSERT(allow_macro_instructions_);
6132    VIXL_ASSERT(OutsideITBlock());
6133    MacroEmissionCheckScope guard(this);
6134    ITScope it_scope(this, &cond);
6135    vcls(cond, dt, rd, rm);
6136  }
6137  void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); }
6138
6139  void Vclt(Condition cond,
6140            DataType dt,
6141            DRegister rd,
6142            DRegister rm,
6143            const DOperand& operand) {
6144    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6145    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6146    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6147    VIXL_ASSERT(allow_macro_instructions_);
6148    VIXL_ASSERT(OutsideITBlock());
6149    MacroEmissionCheckScope guard(this);
6150    ITScope it_scope(this, &cond);
6151    vclt(cond, dt, rd, rm, operand);
6152  }
6153  void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6154    Vclt(al, dt, rd, rm, operand);
6155  }
6156
6157  void Vclt(Condition cond,
6158            DataType dt,
6159            QRegister rd,
6160            QRegister rm,
6161            const QOperand& operand) {
6162    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6163    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6164    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6165    VIXL_ASSERT(allow_macro_instructions_);
6166    VIXL_ASSERT(OutsideITBlock());
6167    MacroEmissionCheckScope guard(this);
6168    ITScope it_scope(this, &cond);
6169    vclt(cond, dt, rd, rm, operand);
6170  }
6171  void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6172    Vclt(al, dt, rd, rm, operand);
6173  }
6174
6175  void Vclt(
6176      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6177    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6178    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6179    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6180    VIXL_ASSERT(allow_macro_instructions_);
6181    VIXL_ASSERT(OutsideITBlock());
6182    MacroEmissionCheckScope guard(this);
6183    ITScope it_scope(this, &cond);
6184    vclt(cond, dt, rd, rn, rm);
6185  }
6186  void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6187    Vclt(al, dt, rd, rn, rm);
6188  }
6189
6190  void Vclt(
6191      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6192    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6193    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6194    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6195    VIXL_ASSERT(allow_macro_instructions_);
6196    VIXL_ASSERT(OutsideITBlock());
6197    MacroEmissionCheckScope guard(this);
6198    ITScope it_scope(this, &cond);
6199    vclt(cond, dt, rd, rn, rm);
6200  }
6201  void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6202    Vclt(al, dt, rd, rn, rm);
6203  }
6204
6205  void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6206    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6208    VIXL_ASSERT(allow_macro_instructions_);
6209    VIXL_ASSERT(OutsideITBlock());
6210    MacroEmissionCheckScope guard(this);
6211    ITScope it_scope(this, &cond);
6212    vclz(cond, dt, rd, rm);
6213  }
6214  void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); }
6215
6216  void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6217    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6218    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6219    VIXL_ASSERT(allow_macro_instructions_);
6220    VIXL_ASSERT(OutsideITBlock());
6221    MacroEmissionCheckScope guard(this);
6222    ITScope it_scope(this, &cond);
6223    vclz(cond, dt, rd, rm);
6224  }
6225  void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); }
6226
6227  void Vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6228    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6229    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6230    VIXL_ASSERT(allow_macro_instructions_);
6231    VIXL_ASSERT(OutsideITBlock());
6232    MacroEmissionCheckScope guard(this);
6233    ITScope it_scope(this, &cond);
6234    vcmp(cond, dt, rd, rm);
6235  }
6236  void Vcmp(DataType dt, SRegister rd, SRegister rm) { Vcmp(al, dt, rd, rm); }
6237
6238  void Vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6239    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6240    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6241    VIXL_ASSERT(allow_macro_instructions_);
6242    VIXL_ASSERT(OutsideITBlock());
6243    MacroEmissionCheckScope guard(this);
6244    ITScope it_scope(this, &cond);
6245    vcmp(cond, dt, rd, rm);
6246  }
6247  void Vcmp(DataType dt, DRegister rd, DRegister rm) { Vcmp(al, dt, rd, rm); }
6248
6249  void Vcmp(Condition cond, DataType dt, SRegister rd, double imm) {
6250    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6251    VIXL_ASSERT(allow_macro_instructions_);
6252    VIXL_ASSERT(OutsideITBlock());
6253    MacroEmissionCheckScope guard(this);
6254    ITScope it_scope(this, &cond);
6255    vcmp(cond, dt, rd, imm);
6256  }
6257  void Vcmp(DataType dt, SRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6258
6259  void Vcmp(Condition cond, DataType dt, DRegister rd, double imm) {
6260    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6261    VIXL_ASSERT(allow_macro_instructions_);
6262    VIXL_ASSERT(OutsideITBlock());
6263    MacroEmissionCheckScope guard(this);
6264    ITScope it_scope(this, &cond);
6265    vcmp(cond, dt, rd, imm);
6266  }
6267  void Vcmp(DataType dt, DRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6268
6269  void Vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6270    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6272    VIXL_ASSERT(allow_macro_instructions_);
6273    VIXL_ASSERT(OutsideITBlock());
6274    MacroEmissionCheckScope guard(this);
6275    ITScope it_scope(this, &cond);
6276    vcmpe(cond, dt, rd, rm);
6277  }
6278  void Vcmpe(DataType dt, SRegister rd, SRegister rm) { Vcmpe(al, dt, rd, rm); }
6279
6280  void Vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6281    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6282    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6283    VIXL_ASSERT(allow_macro_instructions_);
6284    VIXL_ASSERT(OutsideITBlock());
6285    MacroEmissionCheckScope guard(this);
6286    ITScope it_scope(this, &cond);
6287    vcmpe(cond, dt, rd, rm);
6288  }
6289  void Vcmpe(DataType dt, DRegister rd, DRegister rm) { Vcmpe(al, dt, rd, rm); }
6290
6291  void Vcmpe(Condition cond, DataType dt, SRegister rd, double imm) {
6292    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6293    VIXL_ASSERT(allow_macro_instructions_);
6294    VIXL_ASSERT(OutsideITBlock());
6295    MacroEmissionCheckScope guard(this);
6296    ITScope it_scope(this, &cond);
6297    vcmpe(cond, dt, rd, imm);
6298  }
6299  void Vcmpe(DataType dt, SRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6300
6301  void Vcmpe(Condition cond, DataType dt, DRegister rd, double imm) {
6302    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6303    VIXL_ASSERT(allow_macro_instructions_);
6304    VIXL_ASSERT(OutsideITBlock());
6305    MacroEmissionCheckScope guard(this);
6306    ITScope it_scope(this, &cond);
6307    vcmpe(cond, dt, rd, imm);
6308  }
6309  void Vcmpe(DataType dt, DRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6310
6311  void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6312    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6313    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6314    VIXL_ASSERT(allow_macro_instructions_);
6315    VIXL_ASSERT(OutsideITBlock());
6316    MacroEmissionCheckScope guard(this);
6317    ITScope it_scope(this, &cond);
6318    vcnt(cond, dt, rd, rm);
6319  }
6320  void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); }
6321
6322  void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6323    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6325    VIXL_ASSERT(allow_macro_instructions_);
6326    VIXL_ASSERT(OutsideITBlock());
6327    MacroEmissionCheckScope guard(this);
6328    ITScope it_scope(this, &cond);
6329    vcnt(cond, dt, rd, rm);
6330  }
6331  void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); }
6332
6333  void Vcvt(
6334      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6335    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6336    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6337    VIXL_ASSERT(allow_macro_instructions_);
6338    VIXL_ASSERT(OutsideITBlock());
6339    MacroEmissionCheckScope guard(this);
6340    ITScope it_scope(this, &cond);
6341    vcvt(cond, dt1, dt2, rd, rm);
6342  }
6343  void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6344    Vcvt(al, dt1, dt2, rd, rm);
6345  }
6346
6347  void Vcvt(
6348      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6349    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6350    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6351    VIXL_ASSERT(allow_macro_instructions_);
6352    VIXL_ASSERT(OutsideITBlock());
6353    MacroEmissionCheckScope guard(this);
6354    ITScope it_scope(this, &cond);
6355    vcvt(cond, dt1, dt2, rd, rm);
6356  }
6357  void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6358    Vcvt(al, dt1, dt2, rd, rm);
6359  }
6360
6361  void Vcvt(Condition cond,
6362            DataType dt1,
6363            DataType dt2,
6364            DRegister rd,
6365            DRegister rm,
6366            int32_t fbits) {
6367    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6368    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6369    VIXL_ASSERT(allow_macro_instructions_);
6370    VIXL_ASSERT(OutsideITBlock());
6371    MacroEmissionCheckScope guard(this);
6372    ITScope it_scope(this, &cond);
6373    vcvt(cond, dt1, dt2, rd, rm, fbits);
6374  }
6375  void Vcvt(
6376      DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) {
6377    Vcvt(al, dt1, dt2, rd, rm, fbits);
6378  }
6379
6380  void Vcvt(Condition cond,
6381            DataType dt1,
6382            DataType dt2,
6383            QRegister rd,
6384            QRegister rm,
6385            int32_t fbits) {
6386    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6387    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6388    VIXL_ASSERT(allow_macro_instructions_);
6389    VIXL_ASSERT(OutsideITBlock());
6390    MacroEmissionCheckScope guard(this);
6391    ITScope it_scope(this, &cond);
6392    vcvt(cond, dt1, dt2, rd, rm, fbits);
6393  }
6394  void Vcvt(
6395      DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) {
6396    Vcvt(al, dt1, dt2, rd, rm, fbits);
6397  }
6398
6399  void Vcvt(Condition cond,
6400            DataType dt1,
6401            DataType dt2,
6402            SRegister rd,
6403            SRegister rm,
6404            int32_t fbits) {
6405    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6406    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6407    VIXL_ASSERT(allow_macro_instructions_);
6408    VIXL_ASSERT(OutsideITBlock());
6409    MacroEmissionCheckScope guard(this);
6410    ITScope it_scope(this, &cond);
6411    vcvt(cond, dt1, dt2, rd, rm, fbits);
6412  }
6413  void Vcvt(
6414      DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) {
6415    Vcvt(al, dt1, dt2, rd, rm, fbits);
6416  }
6417
6418  void Vcvt(
6419      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6420    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6421    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6422    VIXL_ASSERT(allow_macro_instructions_);
6423    VIXL_ASSERT(OutsideITBlock());
6424    MacroEmissionCheckScope guard(this);
6425    ITScope it_scope(this, &cond);
6426    vcvt(cond, dt1, dt2, rd, rm);
6427  }
6428  void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6429    Vcvt(al, dt1, dt2, rd, rm);
6430  }
6431
6432  void Vcvt(
6433      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6434    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6435    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6436    VIXL_ASSERT(allow_macro_instructions_);
6437    VIXL_ASSERT(OutsideITBlock());
6438    MacroEmissionCheckScope guard(this);
6439    ITScope it_scope(this, &cond);
6440    vcvt(cond, dt1, dt2, rd, rm);
6441  }
6442  void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6443    Vcvt(al, dt1, dt2, rd, rm);
6444  }
6445
6446  void Vcvt(
6447      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6448    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6450    VIXL_ASSERT(allow_macro_instructions_);
6451    VIXL_ASSERT(OutsideITBlock());
6452    MacroEmissionCheckScope guard(this);
6453    ITScope it_scope(this, &cond);
6454    vcvt(cond, dt1, dt2, rd, rm);
6455  }
6456  void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6457    Vcvt(al, dt1, dt2, rd, rm);
6458  }
6459
6460  void Vcvt(
6461      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6462    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6464    VIXL_ASSERT(allow_macro_instructions_);
6465    VIXL_ASSERT(OutsideITBlock());
6466    MacroEmissionCheckScope guard(this);
6467    ITScope it_scope(this, &cond);
6468    vcvt(cond, dt1, dt2, rd, rm);
6469  }
6470  void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6471    Vcvt(al, dt1, dt2, rd, rm);
6472  }
6473
6474  void Vcvt(
6475      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6476    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6477    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6478    VIXL_ASSERT(allow_macro_instructions_);
6479    VIXL_ASSERT(OutsideITBlock());
6480    MacroEmissionCheckScope guard(this);
6481    ITScope it_scope(this, &cond);
6482    vcvt(cond, dt1, dt2, rd, rm);
6483  }
6484  void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6485    Vcvt(al, dt1, dt2, rd, rm);
6486  }
6487
6488  void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6490    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6491    VIXL_ASSERT(allow_macro_instructions_);
6492    VIXL_ASSERT(OutsideITBlock());
6493    MacroEmissionCheckScope guard(this);
6494    vcvta(dt1, dt2, rd, rm);
6495  }
6496
6497  void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6498    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6500    VIXL_ASSERT(allow_macro_instructions_);
6501    VIXL_ASSERT(OutsideITBlock());
6502    MacroEmissionCheckScope guard(this);
6503    vcvta(dt1, dt2, rd, rm);
6504  }
6505
6506  void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6508    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6509    VIXL_ASSERT(allow_macro_instructions_);
6510    VIXL_ASSERT(OutsideITBlock());
6511    MacroEmissionCheckScope guard(this);
6512    vcvta(dt1, dt2, rd, rm);
6513  }
6514
6515  void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6517    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6518    VIXL_ASSERT(allow_macro_instructions_);
6519    VIXL_ASSERT(OutsideITBlock());
6520    MacroEmissionCheckScope guard(this);
6521    vcvta(dt1, dt2, rd, rm);
6522  }
6523
6524  void Vcvtb(
6525      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6526    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6528    VIXL_ASSERT(allow_macro_instructions_);
6529    VIXL_ASSERT(OutsideITBlock());
6530    MacroEmissionCheckScope guard(this);
6531    ITScope it_scope(this, &cond);
6532    vcvtb(cond, dt1, dt2, rd, rm);
6533  }
6534  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6535    Vcvtb(al, dt1, dt2, rd, rm);
6536  }
6537
6538  void Vcvtb(
6539      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6541    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6542    VIXL_ASSERT(allow_macro_instructions_);
6543    VIXL_ASSERT(OutsideITBlock());
6544    MacroEmissionCheckScope guard(this);
6545    ITScope it_scope(this, &cond);
6546    vcvtb(cond, dt1, dt2, rd, rm);
6547  }
6548  void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6549    Vcvtb(al, dt1, dt2, rd, rm);
6550  }
6551
6552  void Vcvtb(
6553      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6556    VIXL_ASSERT(allow_macro_instructions_);
6557    VIXL_ASSERT(OutsideITBlock());
6558    MacroEmissionCheckScope guard(this);
6559    ITScope it_scope(this, &cond);
6560    vcvtb(cond, dt1, dt2, rd, rm);
6561  }
6562  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6563    Vcvtb(al, dt1, dt2, rd, rm);
6564  }
6565
6566  void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6567    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6569    VIXL_ASSERT(allow_macro_instructions_);
6570    VIXL_ASSERT(OutsideITBlock());
6571    MacroEmissionCheckScope guard(this);
6572    vcvtm(dt1, dt2, rd, rm);
6573  }
6574
6575  void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6576    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6577    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6578    VIXL_ASSERT(allow_macro_instructions_);
6579    VIXL_ASSERT(OutsideITBlock());
6580    MacroEmissionCheckScope guard(this);
6581    vcvtm(dt1, dt2, rd, rm);
6582  }
6583
6584  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6585    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6586    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6587    VIXL_ASSERT(allow_macro_instructions_);
6588    VIXL_ASSERT(OutsideITBlock());
6589    MacroEmissionCheckScope guard(this);
6590    vcvtm(dt1, dt2, rd, rm);
6591  }
6592
6593  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6594    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6595    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6596    VIXL_ASSERT(allow_macro_instructions_);
6597    VIXL_ASSERT(OutsideITBlock());
6598    MacroEmissionCheckScope guard(this);
6599    vcvtm(dt1, dt2, rd, rm);
6600  }
6601
6602  void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6605    VIXL_ASSERT(allow_macro_instructions_);
6606    VIXL_ASSERT(OutsideITBlock());
6607    MacroEmissionCheckScope guard(this);
6608    vcvtn(dt1, dt2, rd, rm);
6609  }
6610
6611  void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6612    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6613    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6614    VIXL_ASSERT(allow_macro_instructions_);
6615    VIXL_ASSERT(OutsideITBlock());
6616    MacroEmissionCheckScope guard(this);
6617    vcvtn(dt1, dt2, rd, rm);
6618  }
6619
6620  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6621    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6622    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6623    VIXL_ASSERT(allow_macro_instructions_);
6624    VIXL_ASSERT(OutsideITBlock());
6625    MacroEmissionCheckScope guard(this);
6626    vcvtn(dt1, dt2, rd, rm);
6627  }
6628
6629  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6630    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6631    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6632    VIXL_ASSERT(allow_macro_instructions_);
6633    VIXL_ASSERT(OutsideITBlock());
6634    MacroEmissionCheckScope guard(this);
6635    vcvtn(dt1, dt2, rd, rm);
6636  }
6637
6638  void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6639    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6640    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6641    VIXL_ASSERT(allow_macro_instructions_);
6642    VIXL_ASSERT(OutsideITBlock());
6643    MacroEmissionCheckScope guard(this);
6644    vcvtp(dt1, dt2, rd, rm);
6645  }
6646
6647  void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6648    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6649    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6650    VIXL_ASSERT(allow_macro_instructions_);
6651    VIXL_ASSERT(OutsideITBlock());
6652    MacroEmissionCheckScope guard(this);
6653    vcvtp(dt1, dt2, rd, rm);
6654  }
6655
6656  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6657    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6658    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6659    VIXL_ASSERT(allow_macro_instructions_);
6660    VIXL_ASSERT(OutsideITBlock());
6661    MacroEmissionCheckScope guard(this);
6662    vcvtp(dt1, dt2, rd, rm);
6663  }
6664
6665  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6666    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6668    VIXL_ASSERT(allow_macro_instructions_);
6669    VIXL_ASSERT(OutsideITBlock());
6670    MacroEmissionCheckScope guard(this);
6671    vcvtp(dt1, dt2, rd, rm);
6672  }
6673
6674  void Vcvtr(
6675      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6678    VIXL_ASSERT(allow_macro_instructions_);
6679    VIXL_ASSERT(OutsideITBlock());
6680    MacroEmissionCheckScope guard(this);
6681    ITScope it_scope(this, &cond);
6682    vcvtr(cond, dt1, dt2, rd, rm);
6683  }
6684  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6685    Vcvtr(al, dt1, dt2, rd, rm);
6686  }
6687
6688  void Vcvtr(
6689      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6690    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6691    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6692    VIXL_ASSERT(allow_macro_instructions_);
6693    VIXL_ASSERT(OutsideITBlock());
6694    MacroEmissionCheckScope guard(this);
6695    ITScope it_scope(this, &cond);
6696    vcvtr(cond, dt1, dt2, rd, rm);
6697  }
6698  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6699    Vcvtr(al, dt1, dt2, rd, rm);
6700  }
6701
6702  void Vcvtt(
6703      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6704    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6705    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6706    VIXL_ASSERT(allow_macro_instructions_);
6707    VIXL_ASSERT(OutsideITBlock());
6708    MacroEmissionCheckScope guard(this);
6709    ITScope it_scope(this, &cond);
6710    vcvtt(cond, dt1, dt2, rd, rm);
6711  }
6712  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6713    Vcvtt(al, dt1, dt2, rd, rm);
6714  }
6715
6716  void Vcvtt(
6717      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6718    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6720    VIXL_ASSERT(allow_macro_instructions_);
6721    VIXL_ASSERT(OutsideITBlock());
6722    MacroEmissionCheckScope guard(this);
6723    ITScope it_scope(this, &cond);
6724    vcvtt(cond, dt1, dt2, rd, rm);
6725  }
6726  void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6727    Vcvtt(al, dt1, dt2, rd, rm);
6728  }
6729
6730  void Vcvtt(
6731      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6734    VIXL_ASSERT(allow_macro_instructions_);
6735    VIXL_ASSERT(OutsideITBlock());
6736    MacroEmissionCheckScope guard(this);
6737    ITScope it_scope(this, &cond);
6738    vcvtt(cond, dt1, dt2, rd, rm);
6739  }
6740  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6741    Vcvtt(al, dt1, dt2, rd, rm);
6742  }
6743
6744  void Vdiv(
6745      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6746    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6748    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6749    VIXL_ASSERT(allow_macro_instructions_);
6750    VIXL_ASSERT(OutsideITBlock());
6751    MacroEmissionCheckScope guard(this);
6752    ITScope it_scope(this, &cond);
6753    vdiv(cond, dt, rd, rn, rm);
6754  }
6755  void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6756    Vdiv(al, dt, rd, rn, rm);
6757  }
6758
6759  void Vdiv(
6760      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6761    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6762    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6763    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6764    VIXL_ASSERT(allow_macro_instructions_);
6765    VIXL_ASSERT(OutsideITBlock());
6766    MacroEmissionCheckScope guard(this);
6767    ITScope it_scope(this, &cond);
6768    vdiv(cond, dt, rd, rn, rm);
6769  }
6770  void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6771    Vdiv(al, dt, rd, rn, rm);
6772  }
6773
6774  void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) {
6775    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6776    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6777    VIXL_ASSERT(allow_macro_instructions_);
6778    VIXL_ASSERT(OutsideITBlock());
6779    MacroEmissionCheckScope guard(this);
6780    ITScope it_scope(this, &cond);
6781    vdup(cond, dt, rd, rt);
6782  }
6783  void Vdup(DataType dt, QRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6784
6785  void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) {
6786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6787    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6788    VIXL_ASSERT(allow_macro_instructions_);
6789    VIXL_ASSERT(OutsideITBlock());
6790    MacroEmissionCheckScope guard(this);
6791    ITScope it_scope(this, &cond);
6792    vdup(cond, dt, rd, rt);
6793  }
6794  void Vdup(DataType dt, DRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6795
6796  void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) {
6797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6799    VIXL_ASSERT(allow_macro_instructions_);
6800    VIXL_ASSERT(OutsideITBlock());
6801    MacroEmissionCheckScope guard(this);
6802    ITScope it_scope(this, &cond);
6803    vdup(cond, dt, rd, rm);
6804  }
6805  void Vdup(DataType dt, DRegister rd, DRegisterLane rm) {
6806    Vdup(al, dt, rd, rm);
6807  }
6808
6809  void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) {
6810    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6811    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6812    VIXL_ASSERT(allow_macro_instructions_);
6813    VIXL_ASSERT(OutsideITBlock());
6814    MacroEmissionCheckScope guard(this);
6815    ITScope it_scope(this, &cond);
6816    vdup(cond, dt, rd, rm);
6817  }
6818  void Vdup(DataType dt, QRegister rd, DRegisterLane rm) {
6819    Vdup(al, dt, rd, rm);
6820  }
6821
6822  void Veor(
6823      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6824    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6825    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6826    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6827    VIXL_ASSERT(allow_macro_instructions_);
6828    VIXL_ASSERT(OutsideITBlock());
6829    MacroEmissionCheckScope guard(this);
6830    ITScope it_scope(this, &cond);
6831    veor(cond, dt, rd, rn, rm);
6832  }
6833  void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6834    Veor(al, dt, rd, rn, rm);
6835  }
6836  void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6837    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6838  }
6839  void Veor(DRegister rd, DRegister rn, DRegister rm) {
6840    Veor(al, kDataTypeValueNone, rd, rn, rm);
6841  }
6842
6843  void Veor(
6844      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6846    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6847    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6848    VIXL_ASSERT(allow_macro_instructions_);
6849    VIXL_ASSERT(OutsideITBlock());
6850    MacroEmissionCheckScope guard(this);
6851    ITScope it_scope(this, &cond);
6852    veor(cond, dt, rd, rn, rm);
6853  }
6854  void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6855    Veor(al, dt, rd, rn, rm);
6856  }
6857  void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
6858    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6859  }
6860  void Veor(QRegister rd, QRegister rn, QRegister rm) {
6861    Veor(al, kDataTypeValueNone, rd, rn, rm);
6862  }
6863
6864  void Vext(Condition cond,
6865            DataType dt,
6866            DRegister rd,
6867            DRegister rn,
6868            DRegister rm,
6869            const DOperand& operand) {
6870    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6871    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6872    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6873    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6874    VIXL_ASSERT(allow_macro_instructions_);
6875    VIXL_ASSERT(OutsideITBlock());
6876    MacroEmissionCheckScope guard(this);
6877    ITScope it_scope(this, &cond);
6878    vext(cond, dt, rd, rn, rm, operand);
6879  }
6880  void Vext(DataType dt,
6881            DRegister rd,
6882            DRegister rn,
6883            DRegister rm,
6884            const DOperand& operand) {
6885    Vext(al, dt, rd, rn, rm, operand);
6886  }
6887
6888  void Vext(Condition cond,
6889            DataType dt,
6890            QRegister rd,
6891            QRegister rn,
6892            QRegister rm,
6893            const QOperand& operand) {
6894    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6895    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6896    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6897    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6898    VIXL_ASSERT(allow_macro_instructions_);
6899    VIXL_ASSERT(OutsideITBlock());
6900    MacroEmissionCheckScope guard(this);
6901    ITScope it_scope(this, &cond);
6902    vext(cond, dt, rd, rn, rm, operand);
6903  }
6904  void Vext(DataType dt,
6905            QRegister rd,
6906            QRegister rn,
6907            QRegister rm,
6908            const QOperand& operand) {
6909    Vext(al, dt, rd, rn, rm, operand);
6910  }
6911
6912  void Vfma(
6913      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6916    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6917    VIXL_ASSERT(allow_macro_instructions_);
6918    VIXL_ASSERT(OutsideITBlock());
6919    MacroEmissionCheckScope guard(this);
6920    ITScope it_scope(this, &cond);
6921    vfma(cond, dt, rd, rn, rm);
6922  }
6923  void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6924    Vfma(al, dt, rd, rn, rm);
6925  }
6926
6927  void Vfma(
6928      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6929    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6930    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6931    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6932    VIXL_ASSERT(allow_macro_instructions_);
6933    VIXL_ASSERT(OutsideITBlock());
6934    MacroEmissionCheckScope guard(this);
6935    ITScope it_scope(this, &cond);
6936    vfma(cond, dt, rd, rn, rm);
6937  }
6938  void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6939    Vfma(al, dt, rd, rn, rm);
6940  }
6941
6942  void Vfma(
6943      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6944    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6945    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6946    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6947    VIXL_ASSERT(allow_macro_instructions_);
6948    VIXL_ASSERT(OutsideITBlock());
6949    MacroEmissionCheckScope guard(this);
6950    ITScope it_scope(this, &cond);
6951    vfma(cond, dt, rd, rn, rm);
6952  }
6953  void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6954    Vfma(al, dt, rd, rn, rm);
6955  }
6956
6957  void Vfms(
6958      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6959    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6960    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6962    VIXL_ASSERT(allow_macro_instructions_);
6963    VIXL_ASSERT(OutsideITBlock());
6964    MacroEmissionCheckScope guard(this);
6965    ITScope it_scope(this, &cond);
6966    vfms(cond, dt, rd, rn, rm);
6967  }
6968  void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6969    Vfms(al, dt, rd, rn, rm);
6970  }
6971
6972  void Vfms(
6973      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6976    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6977    VIXL_ASSERT(allow_macro_instructions_);
6978    VIXL_ASSERT(OutsideITBlock());
6979    MacroEmissionCheckScope guard(this);
6980    ITScope it_scope(this, &cond);
6981    vfms(cond, dt, rd, rn, rm);
6982  }
6983  void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6984    Vfms(al, dt, rd, rn, rm);
6985  }
6986
6987  void Vfms(
6988      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6989    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6990    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6991    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6992    VIXL_ASSERT(allow_macro_instructions_);
6993    VIXL_ASSERT(OutsideITBlock());
6994    MacroEmissionCheckScope guard(this);
6995    ITScope it_scope(this, &cond);
6996    vfms(cond, dt, rd, rn, rm);
6997  }
6998  void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6999    Vfms(al, dt, rd, rn, rm);
7000  }
7001
7002  void Vfnma(
7003      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7004    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7005    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7006    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7007    VIXL_ASSERT(allow_macro_instructions_);
7008    VIXL_ASSERT(OutsideITBlock());
7009    MacroEmissionCheckScope guard(this);
7010    ITScope it_scope(this, &cond);
7011    vfnma(cond, dt, rd, rn, rm);
7012  }
7013  void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7014    Vfnma(al, dt, rd, rn, rm);
7015  }
7016
7017  void Vfnma(
7018      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7019    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7020    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7021    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7022    VIXL_ASSERT(allow_macro_instructions_);
7023    VIXL_ASSERT(OutsideITBlock());
7024    MacroEmissionCheckScope guard(this);
7025    ITScope it_scope(this, &cond);
7026    vfnma(cond, dt, rd, rn, rm);
7027  }
7028  void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7029    Vfnma(al, dt, rd, rn, rm);
7030  }
7031
7032  void Vfnms(
7033      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7034    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7035    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7036    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7037    VIXL_ASSERT(allow_macro_instructions_);
7038    VIXL_ASSERT(OutsideITBlock());
7039    MacroEmissionCheckScope guard(this);
7040    ITScope it_scope(this, &cond);
7041    vfnms(cond, dt, rd, rn, rm);
7042  }
7043  void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7044    Vfnms(al, dt, rd, rn, rm);
7045  }
7046
7047  void Vfnms(
7048      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7049    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7050    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7051    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7052    VIXL_ASSERT(allow_macro_instructions_);
7053    VIXL_ASSERT(OutsideITBlock());
7054    MacroEmissionCheckScope guard(this);
7055    ITScope it_scope(this, &cond);
7056    vfnms(cond, dt, rd, rn, rm);
7057  }
7058  void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7059    Vfnms(al, dt, rd, rn, rm);
7060  }
7061
7062  void Vhadd(
7063      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7066    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7067    VIXL_ASSERT(allow_macro_instructions_);
7068    VIXL_ASSERT(OutsideITBlock());
7069    MacroEmissionCheckScope guard(this);
7070    ITScope it_scope(this, &cond);
7071    vhadd(cond, dt, rd, rn, rm);
7072  }
7073  void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7074    Vhadd(al, dt, rd, rn, rm);
7075  }
7076
7077  void Vhadd(
7078      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7081    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7082    VIXL_ASSERT(allow_macro_instructions_);
7083    VIXL_ASSERT(OutsideITBlock());
7084    MacroEmissionCheckScope guard(this);
7085    ITScope it_scope(this, &cond);
7086    vhadd(cond, dt, rd, rn, rm);
7087  }
7088  void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7089    Vhadd(al, dt, rd, rn, rm);
7090  }
7091
7092  void Vhsub(
7093      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7095    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7096    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7097    VIXL_ASSERT(allow_macro_instructions_);
7098    VIXL_ASSERT(OutsideITBlock());
7099    MacroEmissionCheckScope guard(this);
7100    ITScope it_scope(this, &cond);
7101    vhsub(cond, dt, rd, rn, rm);
7102  }
7103  void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7104    Vhsub(al, dt, rd, rn, rm);
7105  }
7106
7107  void Vhsub(
7108      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7109    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7110    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7112    VIXL_ASSERT(allow_macro_instructions_);
7113    VIXL_ASSERT(OutsideITBlock());
7114    MacroEmissionCheckScope guard(this);
7115    ITScope it_scope(this, &cond);
7116    vhsub(cond, dt, rd, rn, rm);
7117  }
7118  void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7119    Vhsub(al, dt, rd, rn, rm);
7120  }
7121
7122  void Vld1(Condition cond,
7123            DataType dt,
7124            const NeonRegisterList& nreglist,
7125            const AlignedMemOperand& operand) {
7126    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7127    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7128    VIXL_ASSERT(allow_macro_instructions_);
7129    VIXL_ASSERT(OutsideITBlock());
7130    MacroEmissionCheckScope guard(this);
7131    ITScope it_scope(this, &cond);
7132    vld1(cond, dt, nreglist, operand);
7133  }
7134  void Vld1(DataType dt,
7135            const NeonRegisterList& nreglist,
7136            const AlignedMemOperand& operand) {
7137    Vld1(al, dt, nreglist, operand);
7138  }
7139
7140  void Vld2(Condition cond,
7141            DataType dt,
7142            const NeonRegisterList& nreglist,
7143            const AlignedMemOperand& operand) {
7144    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7145    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7146    VIXL_ASSERT(allow_macro_instructions_);
7147    VIXL_ASSERT(OutsideITBlock());
7148    MacroEmissionCheckScope guard(this);
7149    ITScope it_scope(this, &cond);
7150    vld2(cond, dt, nreglist, operand);
7151  }
7152  void Vld2(DataType dt,
7153            const NeonRegisterList& nreglist,
7154            const AlignedMemOperand& operand) {
7155    Vld2(al, dt, nreglist, operand);
7156  }
7157
7158  void Vld3(Condition cond,
7159            DataType dt,
7160            const NeonRegisterList& nreglist,
7161            const AlignedMemOperand& operand) {
7162    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7163    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7164    VIXL_ASSERT(allow_macro_instructions_);
7165    VIXL_ASSERT(OutsideITBlock());
7166    MacroEmissionCheckScope guard(this);
7167    ITScope it_scope(this, &cond);
7168    vld3(cond, dt, nreglist, operand);
7169  }
7170  void Vld3(DataType dt,
7171            const NeonRegisterList& nreglist,
7172            const AlignedMemOperand& operand) {
7173    Vld3(al, dt, nreglist, operand);
7174  }
7175
7176  void Vld3(Condition cond,
7177            DataType dt,
7178            const NeonRegisterList& nreglist,
7179            const MemOperand& operand) {
7180    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7181    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7182    VIXL_ASSERT(allow_macro_instructions_);
7183    VIXL_ASSERT(OutsideITBlock());
7184    MacroEmissionCheckScope guard(this);
7185    ITScope it_scope(this, &cond);
7186    vld3(cond, dt, nreglist, operand);
7187  }
7188  void Vld3(DataType dt,
7189            const NeonRegisterList& nreglist,
7190            const MemOperand& operand) {
7191    Vld3(al, dt, nreglist, operand);
7192  }
7193
7194  void Vld4(Condition cond,
7195            DataType dt,
7196            const NeonRegisterList& nreglist,
7197            const AlignedMemOperand& operand) {
7198    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7199    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7200    VIXL_ASSERT(allow_macro_instructions_);
7201    VIXL_ASSERT(OutsideITBlock());
7202    MacroEmissionCheckScope guard(this);
7203    ITScope it_scope(this, &cond);
7204    vld4(cond, dt, nreglist, operand);
7205  }
7206  void Vld4(DataType dt,
7207            const NeonRegisterList& nreglist,
7208            const AlignedMemOperand& operand) {
7209    Vld4(al, dt, nreglist, operand);
7210  }
7211
7212  void Vldm(Condition cond,
7213            DataType dt,
7214            Register rn,
7215            WriteBack write_back,
7216            DRegisterList dreglist) {
7217    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7218    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7219    VIXL_ASSERT(allow_macro_instructions_);
7220    VIXL_ASSERT(OutsideITBlock());
7221    MacroEmissionCheckScope guard(this);
7222    ITScope it_scope(this, &cond);
7223    vldm(cond, dt, rn, write_back, dreglist);
7224  }
7225  void Vldm(DataType dt,
7226            Register rn,
7227            WriteBack write_back,
7228            DRegisterList dreglist) {
7229    Vldm(al, dt, rn, write_back, dreglist);
7230  }
7231  void Vldm(Condition cond,
7232            Register rn,
7233            WriteBack write_back,
7234            DRegisterList dreglist) {
7235    Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist);
7236  }
7237  void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) {
7238    Vldm(al, kDataTypeValueNone, rn, write_back, dreglist);
7239  }
7240
7241  void Vldm(Condition cond,
7242            DataType dt,
7243            Register rn,
7244            WriteBack write_back,
7245            SRegisterList sreglist) {
7246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7247    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7248    VIXL_ASSERT(allow_macro_instructions_);
7249    VIXL_ASSERT(OutsideITBlock());
7250    MacroEmissionCheckScope guard(this);
7251    ITScope it_scope(this, &cond);
7252    vldm(cond, dt, rn, write_back, sreglist);
7253  }
7254  void Vldm(DataType dt,
7255            Register rn,
7256            WriteBack write_back,
7257            SRegisterList sreglist) {
7258    Vldm(al, dt, rn, write_back, sreglist);
7259  }
7260  void Vldm(Condition cond,
7261            Register rn,
7262            WriteBack write_back,
7263            SRegisterList sreglist) {
7264    Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist);
7265  }
7266  void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) {
7267    Vldm(al, kDataTypeValueNone, rn, write_back, sreglist);
7268  }
7269
7270  void Vldmdb(Condition cond,
7271              DataType dt,
7272              Register rn,
7273              WriteBack write_back,
7274              DRegisterList dreglist) {
7275    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7276    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7277    VIXL_ASSERT(allow_macro_instructions_);
7278    VIXL_ASSERT(OutsideITBlock());
7279    MacroEmissionCheckScope guard(this);
7280    ITScope it_scope(this, &cond);
7281    vldmdb(cond, dt, rn, write_back, dreglist);
7282  }
7283  void Vldmdb(DataType dt,
7284              Register rn,
7285              WriteBack write_back,
7286              DRegisterList dreglist) {
7287    Vldmdb(al, dt, rn, write_back, dreglist);
7288  }
7289  void Vldmdb(Condition cond,
7290              Register rn,
7291              WriteBack write_back,
7292              DRegisterList dreglist) {
7293    Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
7294  }
7295  void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
7296    Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
7297  }
7298
7299  void Vldmdb(Condition cond,
7300              DataType dt,
7301              Register rn,
7302              WriteBack write_back,
7303              SRegisterList sreglist) {
7304    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7305    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7306    VIXL_ASSERT(allow_macro_instructions_);
7307    VIXL_ASSERT(OutsideITBlock());
7308    MacroEmissionCheckScope guard(this);
7309    ITScope it_scope(this, &cond);
7310    vldmdb(cond, dt, rn, write_back, sreglist);
7311  }
7312  void Vldmdb(DataType dt,
7313              Register rn,
7314              WriteBack write_back,
7315              SRegisterList sreglist) {
7316    Vldmdb(al, dt, rn, write_back, sreglist);
7317  }
7318  void Vldmdb(Condition cond,
7319              Register rn,
7320              WriteBack write_back,
7321              SRegisterList sreglist) {
7322    Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
7323  }
7324  void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
7325    Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
7326  }
7327
7328  void Vldmia(Condition cond,
7329              DataType dt,
7330              Register rn,
7331              WriteBack write_back,
7332              DRegisterList dreglist) {
7333    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7334    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7335    VIXL_ASSERT(allow_macro_instructions_);
7336    VIXL_ASSERT(OutsideITBlock());
7337    MacroEmissionCheckScope guard(this);
7338    ITScope it_scope(this, &cond);
7339    vldmia(cond, dt, rn, write_back, dreglist);
7340  }
7341  void Vldmia(DataType dt,
7342              Register rn,
7343              WriteBack write_back,
7344              DRegisterList dreglist) {
7345    Vldmia(al, dt, rn, write_back, dreglist);
7346  }
7347  void Vldmia(Condition cond,
7348              Register rn,
7349              WriteBack write_back,
7350              DRegisterList dreglist) {
7351    Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
7352  }
7353  void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
7354    Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist);
7355  }
7356
7357  void Vldmia(Condition cond,
7358              DataType dt,
7359              Register rn,
7360              WriteBack write_back,
7361              SRegisterList sreglist) {
7362    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7363    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7364    VIXL_ASSERT(allow_macro_instructions_);
7365    VIXL_ASSERT(OutsideITBlock());
7366    MacroEmissionCheckScope guard(this);
7367    ITScope it_scope(this, &cond);
7368    vldmia(cond, dt, rn, write_back, sreglist);
7369  }
7370  void Vldmia(DataType dt,
7371              Register rn,
7372              WriteBack write_back,
7373              SRegisterList sreglist) {
7374    Vldmia(al, dt, rn, write_back, sreglist);
7375  }
7376  void Vldmia(Condition cond,
7377              Register rn,
7378              WriteBack write_back,
7379              SRegisterList sreglist) {
7380    Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
7381  }
7382  void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
7383    Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist);
7384  }
7385
7386  void Vldr(Condition cond, DataType dt, DRegister rd, Label* label) {
7387    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7388    VIXL_ASSERT(allow_macro_instructions_);
7389    VIXL_ASSERT(OutsideITBlock());
7390    MacroEmissionCheckScope guard(this);
7391    ITScope it_scope(this, &cond);
7392    vldr(cond, dt, rd, label);
7393  }
7394  void Vldr(DataType dt, DRegister rd, Label* label) {
7395    Vldr(al, dt, rd, label);
7396  }
7397  void Vldr(Condition cond, DRegister rd, Label* label) {
7398    Vldr(cond, Untyped64, rd, label);
7399  }
7400  void Vldr(DRegister rd, Label* label) { Vldr(al, Untyped64, rd, label); }
7401
7402  void Vldr(Condition cond,
7403            DataType dt,
7404            DRegister rd,
7405            const MemOperand& operand) {
7406    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7407    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7408    VIXL_ASSERT(allow_macro_instructions_);
7409    VIXL_ASSERT(OutsideITBlock());
7410    MacroEmissionCheckScope guard(this);
7411    ITScope it_scope(this, &cond);
7412    vldr(cond, dt, rd, operand);
7413  }
7414  void Vldr(DataType dt, DRegister rd, const MemOperand& operand) {
7415    Vldr(al, dt, rd, operand);
7416  }
7417  void Vldr(Condition cond, DRegister rd, const MemOperand& operand) {
7418    Vldr(cond, Untyped64, rd, operand);
7419  }
7420  void Vldr(DRegister rd, const MemOperand& operand) {
7421    Vldr(al, Untyped64, rd, operand);
7422  }
7423
7424  void Vldr(Condition cond, DataType dt, SRegister rd, Label* label) {
7425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7426    VIXL_ASSERT(allow_macro_instructions_);
7427    VIXL_ASSERT(OutsideITBlock());
7428    MacroEmissionCheckScope guard(this);
7429    ITScope it_scope(this, &cond);
7430    vldr(cond, dt, rd, label);
7431  }
7432  void Vldr(DataType dt, SRegister rd, Label* label) {
7433    Vldr(al, dt, rd, label);
7434  }
7435  void Vldr(Condition cond, SRegister rd, Label* label) {
7436    Vldr(cond, Untyped32, rd, label);
7437  }
7438  void Vldr(SRegister rd, Label* label) { Vldr(al, Untyped32, rd, label); }
7439
7440  void Vldr(Condition cond,
7441            DataType dt,
7442            SRegister rd,
7443            const MemOperand& operand) {
7444    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7445    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7446    VIXL_ASSERT(allow_macro_instructions_);
7447    VIXL_ASSERT(OutsideITBlock());
7448    MacroEmissionCheckScope guard(this);
7449    ITScope it_scope(this, &cond);
7450    vldr(cond, dt, rd, operand);
7451  }
7452  void Vldr(DataType dt, SRegister rd, const MemOperand& operand) {
7453    Vldr(al, dt, rd, operand);
7454  }
7455  void Vldr(Condition cond, SRegister rd, const MemOperand& operand) {
7456    Vldr(cond, Untyped32, rd, operand);
7457  }
7458  void Vldr(SRegister rd, const MemOperand& operand) {
7459    Vldr(al, Untyped32, rd, operand);
7460  }
7461
7462  void Vmax(
7463      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7464    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7465    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7466    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7467    VIXL_ASSERT(allow_macro_instructions_);
7468    VIXL_ASSERT(OutsideITBlock());
7469    MacroEmissionCheckScope guard(this);
7470    ITScope it_scope(this, &cond);
7471    vmax(cond, dt, rd, rn, rm);
7472  }
7473  void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7474    Vmax(al, dt, rd, rn, rm);
7475  }
7476
7477  void Vmax(
7478      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7480    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7481    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7482    VIXL_ASSERT(allow_macro_instructions_);
7483    VIXL_ASSERT(OutsideITBlock());
7484    MacroEmissionCheckScope guard(this);
7485    ITScope it_scope(this, &cond);
7486    vmax(cond, dt, rd, rn, rm);
7487  }
7488  void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7489    Vmax(al, dt, rd, rn, rm);
7490  }
7491
7492  void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7493    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7494    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7495    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7496    VIXL_ASSERT(allow_macro_instructions_);
7497    VIXL_ASSERT(OutsideITBlock());
7498    MacroEmissionCheckScope guard(this);
7499    vmaxnm(dt, rd, rn, rm);
7500  }
7501
7502  void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7504    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7505    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7506    VIXL_ASSERT(allow_macro_instructions_);
7507    VIXL_ASSERT(OutsideITBlock());
7508    MacroEmissionCheckScope guard(this);
7509    vmaxnm(dt, rd, rn, rm);
7510  }
7511
7512  void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7513    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7514    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7515    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7516    VIXL_ASSERT(allow_macro_instructions_);
7517    VIXL_ASSERT(OutsideITBlock());
7518    MacroEmissionCheckScope guard(this);
7519    vmaxnm(dt, rd, rn, rm);
7520  }
7521
7522  void Vmin(
7523      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7524    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7525    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7526    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7527    VIXL_ASSERT(allow_macro_instructions_);
7528    VIXL_ASSERT(OutsideITBlock());
7529    MacroEmissionCheckScope guard(this);
7530    ITScope it_scope(this, &cond);
7531    vmin(cond, dt, rd, rn, rm);
7532  }
7533  void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7534    Vmin(al, dt, rd, rn, rm);
7535  }
7536
7537  void Vmin(
7538      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7541    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7542    VIXL_ASSERT(allow_macro_instructions_);
7543    VIXL_ASSERT(OutsideITBlock());
7544    MacroEmissionCheckScope guard(this);
7545    ITScope it_scope(this, &cond);
7546    vmin(cond, dt, rd, rn, rm);
7547  }
7548  void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7549    Vmin(al, dt, rd, rn, rm);
7550  }
7551
7552  void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7553    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7556    VIXL_ASSERT(allow_macro_instructions_);
7557    VIXL_ASSERT(OutsideITBlock());
7558    MacroEmissionCheckScope guard(this);
7559    vminnm(dt, rd, rn, rm);
7560  }
7561
7562  void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7563    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7564    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7565    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7566    VIXL_ASSERT(allow_macro_instructions_);
7567    VIXL_ASSERT(OutsideITBlock());
7568    MacroEmissionCheckScope guard(this);
7569    vminnm(dt, rd, rn, rm);
7570  }
7571
7572  void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7573    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7574    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7575    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7576    VIXL_ASSERT(allow_macro_instructions_);
7577    VIXL_ASSERT(OutsideITBlock());
7578    MacroEmissionCheckScope guard(this);
7579    vminnm(dt, rd, rn, rm);
7580  }
7581
7582  void Vmla(Condition cond,
7583            DataType dt,
7584            DRegister rd,
7585            DRegister rn,
7586            DRegisterLane rm) {
7587    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7589    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7590    VIXL_ASSERT(allow_macro_instructions_);
7591    VIXL_ASSERT(OutsideITBlock());
7592    MacroEmissionCheckScope guard(this);
7593    ITScope it_scope(this, &cond);
7594    vmla(cond, dt, rd, rn, rm);
7595  }
7596  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7597    Vmla(al, dt, rd, rn, rm);
7598  }
7599
7600  void Vmla(Condition cond,
7601            DataType dt,
7602            QRegister rd,
7603            QRegister rn,
7604            DRegisterLane rm) {
7605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7607    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7608    VIXL_ASSERT(allow_macro_instructions_);
7609    VIXL_ASSERT(OutsideITBlock());
7610    MacroEmissionCheckScope guard(this);
7611    ITScope it_scope(this, &cond);
7612    vmla(cond, dt, rd, rn, rm);
7613  }
7614  void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7615    Vmla(al, dt, rd, rn, rm);
7616  }
7617
7618  void Vmla(
7619      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7621    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7622    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7623    VIXL_ASSERT(allow_macro_instructions_);
7624    VIXL_ASSERT(OutsideITBlock());
7625    MacroEmissionCheckScope guard(this);
7626    ITScope it_scope(this, &cond);
7627    vmla(cond, dt, rd, rn, rm);
7628  }
7629  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7630    Vmla(al, dt, rd, rn, rm);
7631  }
7632
7633  void Vmla(
7634      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7636    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7637    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7638    VIXL_ASSERT(allow_macro_instructions_);
7639    VIXL_ASSERT(OutsideITBlock());
7640    MacroEmissionCheckScope guard(this);
7641    ITScope it_scope(this, &cond);
7642    vmla(cond, dt, rd, rn, rm);
7643  }
7644  void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7645    Vmla(al, dt, rd, rn, rm);
7646  }
7647
7648  void Vmla(
7649      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7651    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7652    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7653    VIXL_ASSERT(allow_macro_instructions_);
7654    VIXL_ASSERT(OutsideITBlock());
7655    MacroEmissionCheckScope guard(this);
7656    ITScope it_scope(this, &cond);
7657    vmla(cond, dt, rd, rn, rm);
7658  }
7659  void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7660    Vmla(al, dt, rd, rn, rm);
7661  }
7662
7663  void Vmlal(Condition cond,
7664             DataType dt,
7665             QRegister rd,
7666             DRegister rn,
7667             DRegisterLane rm) {
7668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7671    VIXL_ASSERT(allow_macro_instructions_);
7672    VIXL_ASSERT(OutsideITBlock());
7673    MacroEmissionCheckScope guard(this);
7674    ITScope it_scope(this, &cond);
7675    vmlal(cond, dt, rd, rn, rm);
7676  }
7677  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7678    Vmlal(al, dt, rd, rn, rm);
7679  }
7680
7681  void Vmlal(
7682      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7686    VIXL_ASSERT(allow_macro_instructions_);
7687    VIXL_ASSERT(OutsideITBlock());
7688    MacroEmissionCheckScope guard(this);
7689    ITScope it_scope(this, &cond);
7690    vmlal(cond, dt, rd, rn, rm);
7691  }
7692  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7693    Vmlal(al, dt, rd, rn, rm);
7694  }
7695
7696  void Vmls(Condition cond,
7697            DataType dt,
7698            DRegister rd,
7699            DRegister rn,
7700            DRegisterLane rm) {
7701    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7702    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7703    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7704    VIXL_ASSERT(allow_macro_instructions_);
7705    VIXL_ASSERT(OutsideITBlock());
7706    MacroEmissionCheckScope guard(this);
7707    ITScope it_scope(this, &cond);
7708    vmls(cond, dt, rd, rn, rm);
7709  }
7710  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7711    Vmls(al, dt, rd, rn, rm);
7712  }
7713
7714  void Vmls(Condition cond,
7715            DataType dt,
7716            QRegister rd,
7717            QRegister rn,
7718            DRegisterLane rm) {
7719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7720    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7721    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7722    VIXL_ASSERT(allow_macro_instructions_);
7723    VIXL_ASSERT(OutsideITBlock());
7724    MacroEmissionCheckScope guard(this);
7725    ITScope it_scope(this, &cond);
7726    vmls(cond, dt, rd, rn, rm);
7727  }
7728  void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7729    Vmls(al, dt, rd, rn, rm);
7730  }
7731
7732  void Vmls(
7733      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7734    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7737    VIXL_ASSERT(allow_macro_instructions_);
7738    VIXL_ASSERT(OutsideITBlock());
7739    MacroEmissionCheckScope guard(this);
7740    ITScope it_scope(this, &cond);
7741    vmls(cond, dt, rd, rn, rm);
7742  }
7743  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7744    Vmls(al, dt, rd, rn, rm);
7745  }
7746
7747  void Vmls(
7748      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7749    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7750    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7752    VIXL_ASSERT(allow_macro_instructions_);
7753    VIXL_ASSERT(OutsideITBlock());
7754    MacroEmissionCheckScope guard(this);
7755    ITScope it_scope(this, &cond);
7756    vmls(cond, dt, rd, rn, rm);
7757  }
7758  void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7759    Vmls(al, dt, rd, rn, rm);
7760  }
7761
7762  void Vmls(
7763      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7764    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7765    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7766    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7767    VIXL_ASSERT(allow_macro_instructions_);
7768    VIXL_ASSERT(OutsideITBlock());
7769    MacroEmissionCheckScope guard(this);
7770    ITScope it_scope(this, &cond);
7771    vmls(cond, dt, rd, rn, rm);
7772  }
7773  void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7774    Vmls(al, dt, rd, rn, rm);
7775  }
7776
7777  void Vmlsl(Condition cond,
7778             DataType dt,
7779             QRegister rd,
7780             DRegister rn,
7781             DRegisterLane rm) {
7782    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7783    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7784    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7785    VIXL_ASSERT(allow_macro_instructions_);
7786    VIXL_ASSERT(OutsideITBlock());
7787    MacroEmissionCheckScope guard(this);
7788    ITScope it_scope(this, &cond);
7789    vmlsl(cond, dt, rd, rn, rm);
7790  }
7791  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7792    Vmlsl(al, dt, rd, rn, rm);
7793  }
7794
7795  void Vmlsl(
7796      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7799    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7800    VIXL_ASSERT(allow_macro_instructions_);
7801    VIXL_ASSERT(OutsideITBlock());
7802    MacroEmissionCheckScope guard(this);
7803    ITScope it_scope(this, &cond);
7804    vmlsl(cond, dt, rd, rn, rm);
7805  }
7806  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7807    Vmlsl(al, dt, rd, rn, rm);
7808  }
7809
7810  void Vmov(Condition cond, Register rt, SRegister rn) {
7811    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7813    VIXL_ASSERT(allow_macro_instructions_);
7814    VIXL_ASSERT(OutsideITBlock());
7815    MacroEmissionCheckScope guard(this);
7816    ITScope it_scope(this, &cond);
7817    vmov(cond, rt, rn);
7818  }
7819  void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); }
7820
7821  void Vmov(Condition cond, SRegister rn, Register rt) {
7822    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7823    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7824    VIXL_ASSERT(allow_macro_instructions_);
7825    VIXL_ASSERT(OutsideITBlock());
7826    MacroEmissionCheckScope guard(this);
7827    ITScope it_scope(this, &cond);
7828    vmov(cond, rn, rt);
7829  }
7830  void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); }
7831
7832  void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) {
7833    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7834    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7835    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7836    VIXL_ASSERT(allow_macro_instructions_);
7837    VIXL_ASSERT(OutsideITBlock());
7838    MacroEmissionCheckScope guard(this);
7839    ITScope it_scope(this, &cond);
7840    vmov(cond, rt, rt2, rm);
7841  }
7842  void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); }
7843
7844  void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) {
7845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7846    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7847    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7848    VIXL_ASSERT(allow_macro_instructions_);
7849    VIXL_ASSERT(OutsideITBlock());
7850    MacroEmissionCheckScope guard(this);
7851    ITScope it_scope(this, &cond);
7852    vmov(cond, rm, rt, rt2);
7853  }
7854  void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); }
7855
7856  void Vmov(
7857      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) {
7858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7861    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7862    VIXL_ASSERT(allow_macro_instructions_);
7863    VIXL_ASSERT(OutsideITBlock());
7864    MacroEmissionCheckScope guard(this);
7865    ITScope it_scope(this, &cond);
7866    vmov(cond, rt, rt2, rm, rm1);
7867  }
7868  void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) {
7869    Vmov(al, rt, rt2, rm, rm1);
7870  }
7871
7872  void Vmov(
7873      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) {
7874    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7877    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7878    VIXL_ASSERT(allow_macro_instructions_);
7879    VIXL_ASSERT(OutsideITBlock());
7880    MacroEmissionCheckScope guard(this);
7881    ITScope it_scope(this, &cond);
7882    vmov(cond, rm, rm1, rt, rt2);
7883  }
7884  void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) {
7885    Vmov(al, rm, rm1, rt, rt2);
7886  }
7887
7888  void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) {
7889    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7891    VIXL_ASSERT(allow_macro_instructions_);
7892    VIXL_ASSERT(OutsideITBlock());
7893    MacroEmissionCheckScope guard(this);
7894    ITScope it_scope(this, &cond);
7895    vmov(cond, dt, rd, rt);
7896  }
7897  void Vmov(DataType dt, DRegisterLane rd, Register rt) {
7898    Vmov(al, dt, rd, rt);
7899  }
7900  void Vmov(Condition cond, DRegisterLane rd, Register rt) {
7901    Vmov(cond, kDataTypeValueNone, rd, rt);
7902  }
7903  void Vmov(DRegisterLane rd, Register rt) {
7904    Vmov(al, kDataTypeValueNone, rd, rt);
7905  }
7906
7907  void Vmov(Condition cond,
7908            DataType dt,
7909            DRegister rd,
7910            const DOperand& operand) {
7911    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7912    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7913    VIXL_ASSERT(allow_macro_instructions_);
7914    VIXL_ASSERT(OutsideITBlock());
7915    MacroEmissionCheckScope guard(this);
7916    ITScope it_scope(this, &cond);
7917    vmov(cond, dt, rd, operand);
7918  }
7919  void Vmov(DataType dt, DRegister rd, const DOperand& operand) {
7920    Vmov(al, dt, rd, operand);
7921  }
7922
7923  void Vmov(Condition cond,
7924            DataType dt,
7925            QRegister rd,
7926            const QOperand& operand) {
7927    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7928    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7929    VIXL_ASSERT(allow_macro_instructions_);
7930    VIXL_ASSERT(OutsideITBlock());
7931    MacroEmissionCheckScope guard(this);
7932    ITScope it_scope(this, &cond);
7933    vmov(cond, dt, rd, operand);
7934  }
7935  void Vmov(DataType dt, QRegister rd, const QOperand& operand) {
7936    Vmov(al, dt, rd, operand);
7937  }
7938
7939  void Vmov(Condition cond,
7940            DataType dt,
7941            SRegister rd,
7942            const SOperand& operand) {
7943    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7944    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7945    VIXL_ASSERT(allow_macro_instructions_);
7946    VIXL_ASSERT(OutsideITBlock());
7947    MacroEmissionCheckScope guard(this);
7948    ITScope it_scope(this, &cond);
7949    vmov(cond, dt, rd, operand);
7950  }
7951  void Vmov(DataType dt, SRegister rd, const SOperand& operand) {
7952    Vmov(al, dt, rd, operand);
7953  }
7954
7955  void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) {
7956    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7957    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7958    VIXL_ASSERT(allow_macro_instructions_);
7959    VIXL_ASSERT(OutsideITBlock());
7960    MacroEmissionCheckScope guard(this);
7961    ITScope it_scope(this, &cond);
7962    vmov(cond, dt, rt, rn);
7963  }
7964  void Vmov(DataType dt, Register rt, DRegisterLane rn) {
7965    Vmov(al, dt, rt, rn);
7966  }
7967  void Vmov(Condition cond, Register rt, DRegisterLane rn) {
7968    Vmov(cond, kDataTypeValueNone, rt, rn);
7969  }
7970  void Vmov(Register rt, DRegisterLane rn) {
7971    Vmov(al, kDataTypeValueNone, rt, rn);
7972  }
7973
7974  void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) {
7975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7976    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7977    VIXL_ASSERT(allow_macro_instructions_);
7978    VIXL_ASSERT(OutsideITBlock());
7979    MacroEmissionCheckScope guard(this);
7980    ITScope it_scope(this, &cond);
7981    vmovl(cond, dt, rd, rm);
7982  }
7983  void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); }
7984
7985  void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
7986    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7987    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7988    VIXL_ASSERT(allow_macro_instructions_);
7989    VIXL_ASSERT(OutsideITBlock());
7990    MacroEmissionCheckScope guard(this);
7991    ITScope it_scope(this, &cond);
7992    vmovn(cond, dt, rd, rm);
7993  }
7994  void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); }
7995
7996  void Vmrs(Condition cond,
7997            RegisterOrAPSR_nzcv rt,
7998            SpecialFPRegister spec_reg) {
7999    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8000    VIXL_ASSERT(allow_macro_instructions_);
8001    VIXL_ASSERT(OutsideITBlock());
8002    MacroEmissionCheckScope guard(this);
8003    ITScope it_scope(this, &cond);
8004    vmrs(cond, rt, spec_reg);
8005  }
8006  void Vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) {
8007    Vmrs(al, rt, spec_reg);
8008  }
8009
8010  void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) {
8011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8012    VIXL_ASSERT(allow_macro_instructions_);
8013    VIXL_ASSERT(OutsideITBlock());
8014    MacroEmissionCheckScope guard(this);
8015    ITScope it_scope(this, &cond);
8016    vmsr(cond, spec_reg, rt);
8017  }
8018  void Vmsr(SpecialFPRegister spec_reg, Register rt) { Vmsr(al, spec_reg, rt); }
8019
8020  void Vmul(Condition cond,
8021            DataType dt,
8022            DRegister rd,
8023            DRegister rn,
8024            DRegister dm,
8025            unsigned index) {
8026    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8027    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8028    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8029    VIXL_ASSERT(allow_macro_instructions_);
8030    VIXL_ASSERT(OutsideITBlock());
8031    MacroEmissionCheckScope guard(this);
8032    ITScope it_scope(this, &cond);
8033    vmul(cond, dt, rd, rn, dm, index);
8034  }
8035  void Vmul(
8036      DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) {
8037    Vmul(al, dt, rd, rn, dm, index);
8038  }
8039
8040  void Vmul(Condition cond,
8041            DataType dt,
8042            QRegister rd,
8043            QRegister rn,
8044            DRegister dm,
8045            unsigned index) {
8046    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8047    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8048    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8049    VIXL_ASSERT(allow_macro_instructions_);
8050    VIXL_ASSERT(OutsideITBlock());
8051    MacroEmissionCheckScope guard(this);
8052    ITScope it_scope(this, &cond);
8053    vmul(cond, dt, rd, rn, dm, index);
8054  }
8055  void Vmul(
8056      DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) {
8057    Vmul(al, dt, rd, rn, dm, index);
8058  }
8059
8060  void Vmul(
8061      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8062    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8065    VIXL_ASSERT(allow_macro_instructions_);
8066    VIXL_ASSERT(OutsideITBlock());
8067    MacroEmissionCheckScope guard(this);
8068    ITScope it_scope(this, &cond);
8069    vmul(cond, dt, rd, rn, rm);
8070  }
8071  void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8072    Vmul(al, dt, rd, rn, rm);
8073  }
8074
8075  void Vmul(
8076      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8077    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8080    VIXL_ASSERT(allow_macro_instructions_);
8081    VIXL_ASSERT(OutsideITBlock());
8082    MacroEmissionCheckScope guard(this);
8083    ITScope it_scope(this, &cond);
8084    vmul(cond, dt, rd, rn, rm);
8085  }
8086  void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8087    Vmul(al, dt, rd, rn, rm);
8088  }
8089
8090  void Vmul(
8091      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8092    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8093    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8095    VIXL_ASSERT(allow_macro_instructions_);
8096    VIXL_ASSERT(OutsideITBlock());
8097    MacroEmissionCheckScope guard(this);
8098    ITScope it_scope(this, &cond);
8099    vmul(cond, dt, rd, rn, rm);
8100  }
8101  void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8102    Vmul(al, dt, rd, rn, rm);
8103  }
8104
8105  void Vmull(Condition cond,
8106             DataType dt,
8107             QRegister rd,
8108             DRegister rn,
8109             DRegister dm,
8110             unsigned index) {
8111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8112    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8113    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8114    VIXL_ASSERT(allow_macro_instructions_);
8115    VIXL_ASSERT(OutsideITBlock());
8116    MacroEmissionCheckScope guard(this);
8117    ITScope it_scope(this, &cond);
8118    vmull(cond, dt, rd, rn, dm, index);
8119  }
8120  void Vmull(
8121      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8122    Vmull(al, dt, rd, rn, dm, index);
8123  }
8124
8125  void Vmull(
8126      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8129    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8130    VIXL_ASSERT(allow_macro_instructions_);
8131    VIXL_ASSERT(OutsideITBlock());
8132    MacroEmissionCheckScope guard(this);
8133    ITScope it_scope(this, &cond);
8134    vmull(cond, dt, rd, rn, rm);
8135  }
8136  void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8137    Vmull(al, dt, rd, rn, rm);
8138  }
8139
8140  void Vmvn(Condition cond,
8141            DataType dt,
8142            DRegister rd,
8143            const DOperand& operand) {
8144    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8145    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8146    VIXL_ASSERT(allow_macro_instructions_);
8147    VIXL_ASSERT(OutsideITBlock());
8148    MacroEmissionCheckScope guard(this);
8149    ITScope it_scope(this, &cond);
8150    vmvn(cond, dt, rd, operand);
8151  }
8152  void Vmvn(DataType dt, DRegister rd, const DOperand& operand) {
8153    Vmvn(al, dt, rd, operand);
8154  }
8155
8156  void Vmvn(Condition cond,
8157            DataType dt,
8158            QRegister rd,
8159            const QOperand& operand) {
8160    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8161    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8162    VIXL_ASSERT(allow_macro_instructions_);
8163    VIXL_ASSERT(OutsideITBlock());
8164    MacroEmissionCheckScope guard(this);
8165    ITScope it_scope(this, &cond);
8166    vmvn(cond, dt, rd, operand);
8167  }
8168  void Vmvn(DataType dt, QRegister rd, const QOperand& operand) {
8169    Vmvn(al, dt, rd, operand);
8170  }
8171
8172  void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8173    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8174    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8175    VIXL_ASSERT(allow_macro_instructions_);
8176    VIXL_ASSERT(OutsideITBlock());
8177    MacroEmissionCheckScope guard(this);
8178    ITScope it_scope(this, &cond);
8179    vneg(cond, dt, rd, rm);
8180  }
8181  void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); }
8182
8183  void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8184    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8185    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8186    VIXL_ASSERT(allow_macro_instructions_);
8187    VIXL_ASSERT(OutsideITBlock());
8188    MacroEmissionCheckScope guard(this);
8189    ITScope it_scope(this, &cond);
8190    vneg(cond, dt, rd, rm);
8191  }
8192  void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); }
8193
8194  void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) {
8195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8196    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8197    VIXL_ASSERT(allow_macro_instructions_);
8198    VIXL_ASSERT(OutsideITBlock());
8199    MacroEmissionCheckScope guard(this);
8200    ITScope it_scope(this, &cond);
8201    vneg(cond, dt, rd, rm);
8202  }
8203  void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); }
8204
8205  void Vnmla(
8206      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8210    VIXL_ASSERT(allow_macro_instructions_);
8211    VIXL_ASSERT(OutsideITBlock());
8212    MacroEmissionCheckScope guard(this);
8213    ITScope it_scope(this, &cond);
8214    vnmla(cond, dt, rd, rn, rm);
8215  }
8216  void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8217    Vnmla(al, dt, rd, rn, rm);
8218  }
8219
8220  void Vnmla(
8221      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8224    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8225    VIXL_ASSERT(allow_macro_instructions_);
8226    VIXL_ASSERT(OutsideITBlock());
8227    MacroEmissionCheckScope guard(this);
8228    ITScope it_scope(this, &cond);
8229    vnmla(cond, dt, rd, rn, rm);
8230  }
8231  void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8232    Vnmla(al, dt, rd, rn, rm);
8233  }
8234
8235  void Vnmls(
8236      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8237    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8238    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8239    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8240    VIXL_ASSERT(allow_macro_instructions_);
8241    VIXL_ASSERT(OutsideITBlock());
8242    MacroEmissionCheckScope guard(this);
8243    ITScope it_scope(this, &cond);
8244    vnmls(cond, dt, rd, rn, rm);
8245  }
8246  void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8247    Vnmls(al, dt, rd, rn, rm);
8248  }
8249
8250  void Vnmls(
8251      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8252    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8253    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8254    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8255    VIXL_ASSERT(allow_macro_instructions_);
8256    VIXL_ASSERT(OutsideITBlock());
8257    MacroEmissionCheckScope guard(this);
8258    ITScope it_scope(this, &cond);
8259    vnmls(cond, dt, rd, rn, rm);
8260  }
8261  void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8262    Vnmls(al, dt, rd, rn, rm);
8263  }
8264
8265  void Vnmul(
8266      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8267    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8268    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8269    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8270    VIXL_ASSERT(allow_macro_instructions_);
8271    VIXL_ASSERT(OutsideITBlock());
8272    MacroEmissionCheckScope guard(this);
8273    ITScope it_scope(this, &cond);
8274    vnmul(cond, dt, rd, rn, rm);
8275  }
8276  void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8277    Vnmul(al, dt, rd, rn, rm);
8278  }
8279
8280  void Vnmul(
8281      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8282    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8283    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8284    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8285    VIXL_ASSERT(allow_macro_instructions_);
8286    VIXL_ASSERT(OutsideITBlock());
8287    MacroEmissionCheckScope guard(this);
8288    ITScope it_scope(this, &cond);
8289    vnmul(cond, dt, rd, rn, rm);
8290  }
8291  void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8292    Vnmul(al, dt, rd, rn, rm);
8293  }
8294
8295  void Vorn(Condition cond,
8296            DataType dt,
8297            DRegister rd,
8298            DRegister rn,
8299            const DOperand& operand) {
8300    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8301    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8302    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8303    VIXL_ASSERT(allow_macro_instructions_);
8304    VIXL_ASSERT(OutsideITBlock());
8305    MacroEmissionCheckScope guard(this);
8306    ITScope it_scope(this, &cond);
8307    vorn(cond, dt, rd, rn, operand);
8308  }
8309  void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8310    Vorn(al, dt, rd, rn, operand);
8311  }
8312
8313  void Vorn(Condition cond,
8314            DataType dt,
8315            QRegister rd,
8316            QRegister rn,
8317            const QOperand& operand) {
8318    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8319    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8320    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8321    VIXL_ASSERT(allow_macro_instructions_);
8322    VIXL_ASSERT(OutsideITBlock());
8323    MacroEmissionCheckScope guard(this);
8324    ITScope it_scope(this, &cond);
8325    vorn(cond, dt, rd, rn, operand);
8326  }
8327  void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8328    Vorn(al, dt, rd, rn, operand);
8329  }
8330
8331  void Vorr(Condition cond,
8332            DataType dt,
8333            DRegister rd,
8334            DRegister rn,
8335            const DOperand& operand) {
8336    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8337    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8338    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8339    VIXL_ASSERT(allow_macro_instructions_);
8340    VIXL_ASSERT(OutsideITBlock());
8341    MacroEmissionCheckScope guard(this);
8342    ITScope it_scope(this, &cond);
8343    vorr(cond, dt, rd, rn, operand);
8344  }
8345  void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8346    Vorr(al, dt, rd, rn, operand);
8347  }
8348  void Vorr(Condition cond,
8349            DRegister rd,
8350            DRegister rn,
8351            const DOperand& operand) {
8352    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8353  }
8354  void Vorr(DRegister rd, DRegister rn, const DOperand& operand) {
8355    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8356  }
8357
8358  void Vorr(Condition cond,
8359            DataType dt,
8360            QRegister rd,
8361            QRegister rn,
8362            const QOperand& operand) {
8363    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8364    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8365    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8366    VIXL_ASSERT(allow_macro_instructions_);
8367    VIXL_ASSERT(OutsideITBlock());
8368    MacroEmissionCheckScope guard(this);
8369    ITScope it_scope(this, &cond);
8370    vorr(cond, dt, rd, rn, operand);
8371  }
8372  void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8373    Vorr(al, dt, rd, rn, operand);
8374  }
8375  void Vorr(Condition cond,
8376            QRegister rd,
8377            QRegister rn,
8378            const QOperand& operand) {
8379    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8380  }
8381  void Vorr(QRegister rd, QRegister rn, const QOperand& operand) {
8382    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8383  }
8384
8385  void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8386    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8387    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8388    VIXL_ASSERT(allow_macro_instructions_);
8389    VIXL_ASSERT(OutsideITBlock());
8390    MacroEmissionCheckScope guard(this);
8391    ITScope it_scope(this, &cond);
8392    vpadal(cond, dt, rd, rm);
8393  }
8394  void Vpadal(DataType dt, DRegister rd, DRegister rm) {
8395    Vpadal(al, dt, rd, rm);
8396  }
8397
8398  void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8399    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8401    VIXL_ASSERT(allow_macro_instructions_);
8402    VIXL_ASSERT(OutsideITBlock());
8403    MacroEmissionCheckScope guard(this);
8404    ITScope it_scope(this, &cond);
8405    vpadal(cond, dt, rd, rm);
8406  }
8407  void Vpadal(DataType dt, QRegister rd, QRegister rm) {
8408    Vpadal(al, dt, rd, rm);
8409  }
8410
8411  void Vpadd(
8412      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8413    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8414    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8415    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8416    VIXL_ASSERT(allow_macro_instructions_);
8417    VIXL_ASSERT(OutsideITBlock());
8418    MacroEmissionCheckScope guard(this);
8419    ITScope it_scope(this, &cond);
8420    vpadd(cond, dt, rd, rn, rm);
8421  }
8422  void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8423    Vpadd(al, dt, rd, rn, rm);
8424  }
8425
8426  void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8427    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8428    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8429    VIXL_ASSERT(allow_macro_instructions_);
8430    VIXL_ASSERT(OutsideITBlock());
8431    MacroEmissionCheckScope guard(this);
8432    ITScope it_scope(this, &cond);
8433    vpaddl(cond, dt, rd, rm);
8434  }
8435  void Vpaddl(DataType dt, DRegister rd, DRegister rm) {
8436    Vpaddl(al, dt, rd, rm);
8437  }
8438
8439  void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8441    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8442    VIXL_ASSERT(allow_macro_instructions_);
8443    VIXL_ASSERT(OutsideITBlock());
8444    MacroEmissionCheckScope guard(this);
8445    ITScope it_scope(this, &cond);
8446    vpaddl(cond, dt, rd, rm);
8447  }
8448  void Vpaddl(DataType dt, QRegister rd, QRegister rm) {
8449    Vpaddl(al, dt, rd, rm);
8450  }
8451
8452  void Vpmax(
8453      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8454    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8455    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8456    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8457    VIXL_ASSERT(allow_macro_instructions_);
8458    VIXL_ASSERT(OutsideITBlock());
8459    MacroEmissionCheckScope guard(this);
8460    ITScope it_scope(this, &cond);
8461    vpmax(cond, dt, rd, rn, rm);
8462  }
8463  void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8464    Vpmax(al, dt, rd, rn, rm);
8465  }
8466
8467  void Vpmin(
8468      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8469    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8470    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8471    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8472    VIXL_ASSERT(allow_macro_instructions_);
8473    VIXL_ASSERT(OutsideITBlock());
8474    MacroEmissionCheckScope guard(this);
8475    ITScope it_scope(this, &cond);
8476    vpmin(cond, dt, rd, rn, rm);
8477  }
8478  void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8479    Vpmin(al, dt, rd, rn, rm);
8480  }
8481
8482  void Vpop(Condition cond, DataType dt, DRegisterList dreglist) {
8483    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8484    VIXL_ASSERT(allow_macro_instructions_);
8485    VIXL_ASSERT(OutsideITBlock());
8486    MacroEmissionCheckScope guard(this);
8487    ITScope it_scope(this, &cond);
8488    vpop(cond, dt, dreglist);
8489  }
8490  void Vpop(DataType dt, DRegisterList dreglist) { Vpop(al, dt, dreglist); }
8491  void Vpop(Condition cond, DRegisterList dreglist) {
8492    Vpop(cond, kDataTypeValueNone, dreglist);
8493  }
8494  void Vpop(DRegisterList dreglist) { Vpop(al, kDataTypeValueNone, dreglist); }
8495
8496  void Vpop(Condition cond, DataType dt, SRegisterList sreglist) {
8497    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8498    VIXL_ASSERT(allow_macro_instructions_);
8499    VIXL_ASSERT(OutsideITBlock());
8500    MacroEmissionCheckScope guard(this);
8501    ITScope it_scope(this, &cond);
8502    vpop(cond, dt, sreglist);
8503  }
8504  void Vpop(DataType dt, SRegisterList sreglist) { Vpop(al, dt, sreglist); }
8505  void Vpop(Condition cond, SRegisterList sreglist) {
8506    Vpop(cond, kDataTypeValueNone, sreglist);
8507  }
8508  void Vpop(SRegisterList sreglist) { Vpop(al, kDataTypeValueNone, sreglist); }
8509
8510  void Vpush(Condition cond, DataType dt, DRegisterList dreglist) {
8511    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8512    VIXL_ASSERT(allow_macro_instructions_);
8513    VIXL_ASSERT(OutsideITBlock());
8514    MacroEmissionCheckScope guard(this);
8515    ITScope it_scope(this, &cond);
8516    vpush(cond, dt, dreglist);
8517  }
8518  void Vpush(DataType dt, DRegisterList dreglist) { Vpush(al, dt, dreglist); }
8519  void Vpush(Condition cond, DRegisterList dreglist) {
8520    Vpush(cond, kDataTypeValueNone, dreglist);
8521  }
8522  void Vpush(DRegisterList dreglist) {
8523    Vpush(al, kDataTypeValueNone, dreglist);
8524  }
8525
8526  void Vpush(Condition cond, DataType dt, SRegisterList sreglist) {
8527    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8528    VIXL_ASSERT(allow_macro_instructions_);
8529    VIXL_ASSERT(OutsideITBlock());
8530    MacroEmissionCheckScope guard(this);
8531    ITScope it_scope(this, &cond);
8532    vpush(cond, dt, sreglist);
8533  }
8534  void Vpush(DataType dt, SRegisterList sreglist) { Vpush(al, dt, sreglist); }
8535  void Vpush(Condition cond, SRegisterList sreglist) {
8536    Vpush(cond, kDataTypeValueNone, sreglist);
8537  }
8538  void Vpush(SRegisterList sreglist) {
8539    Vpush(al, kDataTypeValueNone, sreglist);
8540  }
8541
8542  void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8543    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8544    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8545    VIXL_ASSERT(allow_macro_instructions_);
8546    VIXL_ASSERT(OutsideITBlock());
8547    MacroEmissionCheckScope guard(this);
8548    ITScope it_scope(this, &cond);
8549    vqabs(cond, dt, rd, rm);
8550  }
8551  void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); }
8552
8553  void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8556    VIXL_ASSERT(allow_macro_instructions_);
8557    VIXL_ASSERT(OutsideITBlock());
8558    MacroEmissionCheckScope guard(this);
8559    ITScope it_scope(this, &cond);
8560    vqabs(cond, dt, rd, rm);
8561  }
8562  void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); }
8563
8564  void Vqadd(
8565      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8567    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8569    VIXL_ASSERT(allow_macro_instructions_);
8570    VIXL_ASSERT(OutsideITBlock());
8571    MacroEmissionCheckScope guard(this);
8572    ITScope it_scope(this, &cond);
8573    vqadd(cond, dt, rd, rn, rm);
8574  }
8575  void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8576    Vqadd(al, dt, rd, rn, rm);
8577  }
8578
8579  void Vqadd(
8580      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8581    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8583    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8584    VIXL_ASSERT(allow_macro_instructions_);
8585    VIXL_ASSERT(OutsideITBlock());
8586    MacroEmissionCheckScope guard(this);
8587    ITScope it_scope(this, &cond);
8588    vqadd(cond, dt, rd, rn, rm);
8589  }
8590  void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8591    Vqadd(al, dt, rd, rn, rm);
8592  }
8593
8594  void Vqdmlal(
8595      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8596    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8599    VIXL_ASSERT(allow_macro_instructions_);
8600    VIXL_ASSERT(OutsideITBlock());
8601    MacroEmissionCheckScope guard(this);
8602    ITScope it_scope(this, &cond);
8603    vqdmlal(cond, dt, rd, rn, rm);
8604  }
8605  void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8606    Vqdmlal(al, dt, rd, rn, rm);
8607  }
8608
8609  void Vqdmlal(Condition cond,
8610               DataType dt,
8611               QRegister rd,
8612               DRegister rn,
8613               DRegister dm,
8614               unsigned index) {
8615    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8617    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8618    VIXL_ASSERT(allow_macro_instructions_);
8619    VIXL_ASSERT(OutsideITBlock());
8620    MacroEmissionCheckScope guard(this);
8621    ITScope it_scope(this, &cond);
8622    vqdmlal(cond, dt, rd, rn, dm, index);
8623  }
8624  void Vqdmlal(
8625      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8626    Vqdmlal(al, dt, rd, rn, dm, index);
8627  }
8628
8629  void Vqdmlsl(
8630      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8631    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8632    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8633    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8634    VIXL_ASSERT(allow_macro_instructions_);
8635    VIXL_ASSERT(OutsideITBlock());
8636    MacroEmissionCheckScope guard(this);
8637    ITScope it_scope(this, &cond);
8638    vqdmlsl(cond, dt, rd, rn, rm);
8639  }
8640  void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8641    Vqdmlsl(al, dt, rd, rn, rm);
8642  }
8643
8644  void Vqdmlsl(Condition cond,
8645               DataType dt,
8646               QRegister rd,
8647               DRegister rn,
8648               DRegister dm,
8649               unsigned index) {
8650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8651    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8652    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8653    VIXL_ASSERT(allow_macro_instructions_);
8654    VIXL_ASSERT(OutsideITBlock());
8655    MacroEmissionCheckScope guard(this);
8656    ITScope it_scope(this, &cond);
8657    vqdmlsl(cond, dt, rd, rn, dm, index);
8658  }
8659  void Vqdmlsl(
8660      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8661    Vqdmlsl(al, dt, rd, rn, dm, index);
8662  }
8663
8664  void Vqdmulh(
8665      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8666    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8669    VIXL_ASSERT(allow_macro_instructions_);
8670    VIXL_ASSERT(OutsideITBlock());
8671    MacroEmissionCheckScope guard(this);
8672    ITScope it_scope(this, &cond);
8673    vqdmulh(cond, dt, rd, rn, rm);
8674  }
8675  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8676    Vqdmulh(al, dt, rd, rn, rm);
8677  }
8678
8679  void Vqdmulh(
8680      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8681    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8684    VIXL_ASSERT(allow_macro_instructions_);
8685    VIXL_ASSERT(OutsideITBlock());
8686    MacroEmissionCheckScope guard(this);
8687    ITScope it_scope(this, &cond);
8688    vqdmulh(cond, dt, rd, rn, rm);
8689  }
8690  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8691    Vqdmulh(al, dt, rd, rn, rm);
8692  }
8693
8694  void Vqdmulh(Condition cond,
8695               DataType dt,
8696               DRegister rd,
8697               DRegister rn,
8698               DRegisterLane rm) {
8699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8700    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8701    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8702    VIXL_ASSERT(allow_macro_instructions_);
8703    VIXL_ASSERT(OutsideITBlock());
8704    MacroEmissionCheckScope guard(this);
8705    ITScope it_scope(this, &cond);
8706    vqdmulh(cond, dt, rd, rn, rm);
8707  }
8708  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8709    Vqdmulh(al, dt, rd, rn, rm);
8710  }
8711
8712  void Vqdmulh(Condition cond,
8713               DataType dt,
8714               QRegister rd,
8715               QRegister rn,
8716               DRegisterLane rm) {
8717    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8718    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8720    VIXL_ASSERT(allow_macro_instructions_);
8721    VIXL_ASSERT(OutsideITBlock());
8722    MacroEmissionCheckScope guard(this);
8723    ITScope it_scope(this, &cond);
8724    vqdmulh(cond, dt, rd, rn, rm);
8725  }
8726  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8727    Vqdmulh(al, dt, rd, rn, rm);
8728  }
8729
8730  void Vqdmull(
8731      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8734    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8735    VIXL_ASSERT(allow_macro_instructions_);
8736    VIXL_ASSERT(OutsideITBlock());
8737    MacroEmissionCheckScope guard(this);
8738    ITScope it_scope(this, &cond);
8739    vqdmull(cond, dt, rd, rn, rm);
8740  }
8741  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8742    Vqdmull(al, dt, rd, rn, rm);
8743  }
8744
8745  void Vqdmull(Condition cond,
8746               DataType dt,
8747               QRegister rd,
8748               DRegister rn,
8749               DRegisterLane rm) {
8750    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8752    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8753    VIXL_ASSERT(allow_macro_instructions_);
8754    VIXL_ASSERT(OutsideITBlock());
8755    MacroEmissionCheckScope guard(this);
8756    ITScope it_scope(this, &cond);
8757    vqdmull(cond, dt, rd, rn, rm);
8758  }
8759  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
8760    Vqdmull(al, dt, rd, rn, rm);
8761  }
8762
8763  void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8764    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8765    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8766    VIXL_ASSERT(allow_macro_instructions_);
8767    VIXL_ASSERT(OutsideITBlock());
8768    MacroEmissionCheckScope guard(this);
8769    ITScope it_scope(this, &cond);
8770    vqmovn(cond, dt, rd, rm);
8771  }
8772  void Vqmovn(DataType dt, DRegister rd, QRegister rm) {
8773    Vqmovn(al, dt, rd, rm);
8774  }
8775
8776  void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8777    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8779    VIXL_ASSERT(allow_macro_instructions_);
8780    VIXL_ASSERT(OutsideITBlock());
8781    MacroEmissionCheckScope guard(this);
8782    ITScope it_scope(this, &cond);
8783    vqmovun(cond, dt, rd, rm);
8784  }
8785  void Vqmovun(DataType dt, DRegister rd, QRegister rm) {
8786    Vqmovun(al, dt, rd, rm);
8787  }
8788
8789  void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8790    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8791    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8792    VIXL_ASSERT(allow_macro_instructions_);
8793    VIXL_ASSERT(OutsideITBlock());
8794    MacroEmissionCheckScope guard(this);
8795    ITScope it_scope(this, &cond);
8796    vqneg(cond, dt, rd, rm);
8797  }
8798  void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); }
8799
8800  void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8801    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8802    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8803    VIXL_ASSERT(allow_macro_instructions_);
8804    VIXL_ASSERT(OutsideITBlock());
8805    MacroEmissionCheckScope guard(this);
8806    ITScope it_scope(this, &cond);
8807    vqneg(cond, dt, rd, rm);
8808  }
8809  void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); }
8810
8811  void Vqrdmulh(
8812      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8813    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8814    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8815    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8816    VIXL_ASSERT(allow_macro_instructions_);
8817    VIXL_ASSERT(OutsideITBlock());
8818    MacroEmissionCheckScope guard(this);
8819    ITScope it_scope(this, &cond);
8820    vqrdmulh(cond, dt, rd, rn, rm);
8821  }
8822  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8823    Vqrdmulh(al, dt, rd, rn, rm);
8824  }
8825
8826  void Vqrdmulh(
8827      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8829    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8830    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8831    VIXL_ASSERT(allow_macro_instructions_);
8832    VIXL_ASSERT(OutsideITBlock());
8833    MacroEmissionCheckScope guard(this);
8834    ITScope it_scope(this, &cond);
8835    vqrdmulh(cond, dt, rd, rn, rm);
8836  }
8837  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8838    Vqrdmulh(al, dt, rd, rn, rm);
8839  }
8840
8841  void Vqrdmulh(Condition cond,
8842                DataType dt,
8843                DRegister rd,
8844                DRegister rn,
8845                DRegisterLane rm) {
8846    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8847    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8848    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8849    VIXL_ASSERT(allow_macro_instructions_);
8850    VIXL_ASSERT(OutsideITBlock());
8851    MacroEmissionCheckScope guard(this);
8852    ITScope it_scope(this, &cond);
8853    vqrdmulh(cond, dt, rd, rn, rm);
8854  }
8855  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8856    Vqrdmulh(al, dt, rd, rn, rm);
8857  }
8858
8859  void Vqrdmulh(Condition cond,
8860                DataType dt,
8861                QRegister rd,
8862                QRegister rn,
8863                DRegisterLane rm) {
8864    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8865    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8866    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8867    VIXL_ASSERT(allow_macro_instructions_);
8868    VIXL_ASSERT(OutsideITBlock());
8869    MacroEmissionCheckScope guard(this);
8870    ITScope it_scope(this, &cond);
8871    vqrdmulh(cond, dt, rd, rn, rm);
8872  }
8873  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8874    Vqrdmulh(al, dt, rd, rn, rm);
8875  }
8876
8877  void Vqrshl(
8878      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8879    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8880    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8881    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8882    VIXL_ASSERT(allow_macro_instructions_);
8883    VIXL_ASSERT(OutsideITBlock());
8884    MacroEmissionCheckScope guard(this);
8885    ITScope it_scope(this, &cond);
8886    vqrshl(cond, dt, rd, rm, rn);
8887  }
8888  void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8889    Vqrshl(al, dt, rd, rm, rn);
8890  }
8891
8892  void Vqrshl(
8893      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8894    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8895    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8896    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8897    VIXL_ASSERT(allow_macro_instructions_);
8898    VIXL_ASSERT(OutsideITBlock());
8899    MacroEmissionCheckScope guard(this);
8900    ITScope it_scope(this, &cond);
8901    vqrshl(cond, dt, rd, rm, rn);
8902  }
8903  void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8904    Vqrshl(al, dt, rd, rm, rn);
8905  }
8906
8907  void Vqrshrn(Condition cond,
8908               DataType dt,
8909               DRegister rd,
8910               QRegister rm,
8911               const QOperand& operand) {
8912    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8914    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8915    VIXL_ASSERT(allow_macro_instructions_);
8916    VIXL_ASSERT(OutsideITBlock());
8917    MacroEmissionCheckScope guard(this);
8918    ITScope it_scope(this, &cond);
8919    vqrshrn(cond, dt, rd, rm, operand);
8920  }
8921  void Vqrshrn(DataType dt,
8922               DRegister rd,
8923               QRegister rm,
8924               const QOperand& operand) {
8925    Vqrshrn(al, dt, rd, rm, operand);
8926  }
8927
8928  void Vqrshrun(Condition cond,
8929                DataType dt,
8930                DRegister rd,
8931                QRegister rm,
8932                const QOperand& operand) {
8933    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8934    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8935    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8936    VIXL_ASSERT(allow_macro_instructions_);
8937    VIXL_ASSERT(OutsideITBlock());
8938    MacroEmissionCheckScope guard(this);
8939    ITScope it_scope(this, &cond);
8940    vqrshrun(cond, dt, rd, rm, operand);
8941  }
8942  void Vqrshrun(DataType dt,
8943                DRegister rd,
8944                QRegister rm,
8945                const QOperand& operand) {
8946    Vqrshrun(al, dt, rd, rm, operand);
8947  }
8948
8949  void Vqshl(Condition cond,
8950             DataType dt,
8951             DRegister rd,
8952             DRegister rm,
8953             const DOperand& operand) {
8954    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8955    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8956    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8957    VIXL_ASSERT(allow_macro_instructions_);
8958    VIXL_ASSERT(OutsideITBlock());
8959    MacroEmissionCheckScope guard(this);
8960    ITScope it_scope(this, &cond);
8961    vqshl(cond, dt, rd, rm, operand);
8962  }
8963  void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
8964    Vqshl(al, dt, rd, rm, operand);
8965  }
8966
8967  void Vqshl(Condition cond,
8968             DataType dt,
8969             QRegister rd,
8970             QRegister rm,
8971             const QOperand& operand) {
8972    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8973    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8974    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8975    VIXL_ASSERT(allow_macro_instructions_);
8976    VIXL_ASSERT(OutsideITBlock());
8977    MacroEmissionCheckScope guard(this);
8978    ITScope it_scope(this, &cond);
8979    vqshl(cond, dt, rd, rm, operand);
8980  }
8981  void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
8982    Vqshl(al, dt, rd, rm, operand);
8983  }
8984
8985  void Vqshlu(Condition cond,
8986              DataType dt,
8987              DRegister rd,
8988              DRegister rm,
8989              const DOperand& operand) {
8990    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8991    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8992    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8993    VIXL_ASSERT(allow_macro_instructions_);
8994    VIXL_ASSERT(OutsideITBlock());
8995    MacroEmissionCheckScope guard(this);
8996    ITScope it_scope(this, &cond);
8997    vqshlu(cond, dt, rd, rm, operand);
8998  }
8999  void Vqshlu(DataType dt,
9000              DRegister rd,
9001              DRegister rm,
9002              const DOperand& operand) {
9003    Vqshlu(al, dt, rd, rm, operand);
9004  }
9005
9006  void Vqshlu(Condition cond,
9007              DataType dt,
9008              QRegister rd,
9009              QRegister rm,
9010              const QOperand& operand) {
9011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9012    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9013    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9014    VIXL_ASSERT(allow_macro_instructions_);
9015    VIXL_ASSERT(OutsideITBlock());
9016    MacroEmissionCheckScope guard(this);
9017    ITScope it_scope(this, &cond);
9018    vqshlu(cond, dt, rd, rm, operand);
9019  }
9020  void Vqshlu(DataType dt,
9021              QRegister rd,
9022              QRegister rm,
9023              const QOperand& operand) {
9024    Vqshlu(al, dt, rd, rm, operand);
9025  }
9026
9027  void Vqshrn(Condition cond,
9028              DataType dt,
9029              DRegister rd,
9030              QRegister rm,
9031              const QOperand& operand) {
9032    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9033    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9034    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9035    VIXL_ASSERT(allow_macro_instructions_);
9036    VIXL_ASSERT(OutsideITBlock());
9037    MacroEmissionCheckScope guard(this);
9038    ITScope it_scope(this, &cond);
9039    vqshrn(cond, dt, rd, rm, operand);
9040  }
9041  void Vqshrn(DataType dt,
9042              DRegister rd,
9043              QRegister rm,
9044              const QOperand& operand) {
9045    Vqshrn(al, dt, rd, rm, operand);
9046  }
9047
9048  void Vqshrun(Condition cond,
9049               DataType dt,
9050               DRegister rd,
9051               QRegister rm,
9052               const QOperand& operand) {
9053    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9054    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9055    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9056    VIXL_ASSERT(allow_macro_instructions_);
9057    VIXL_ASSERT(OutsideITBlock());
9058    MacroEmissionCheckScope guard(this);
9059    ITScope it_scope(this, &cond);
9060    vqshrun(cond, dt, rd, rm, operand);
9061  }
9062  void Vqshrun(DataType dt,
9063               DRegister rd,
9064               QRegister rm,
9065               const QOperand& operand) {
9066    Vqshrun(al, dt, rd, rm, operand);
9067  }
9068
9069  void Vqsub(
9070      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9071    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9072    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9073    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9074    VIXL_ASSERT(allow_macro_instructions_);
9075    VIXL_ASSERT(OutsideITBlock());
9076    MacroEmissionCheckScope guard(this);
9077    ITScope it_scope(this, &cond);
9078    vqsub(cond, dt, rd, rn, rm);
9079  }
9080  void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9081    Vqsub(al, dt, rd, rn, rm);
9082  }
9083
9084  void Vqsub(
9085      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9086    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9087    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9088    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9089    VIXL_ASSERT(allow_macro_instructions_);
9090    VIXL_ASSERT(OutsideITBlock());
9091    MacroEmissionCheckScope guard(this);
9092    ITScope it_scope(this, &cond);
9093    vqsub(cond, dt, rd, rn, rm);
9094  }
9095  void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9096    Vqsub(al, dt, rd, rn, rm);
9097  }
9098
9099  void Vraddhn(
9100      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9101    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9103    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9104    VIXL_ASSERT(allow_macro_instructions_);
9105    VIXL_ASSERT(OutsideITBlock());
9106    MacroEmissionCheckScope guard(this);
9107    ITScope it_scope(this, &cond);
9108    vraddhn(cond, dt, rd, rn, rm);
9109  }
9110  void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9111    Vraddhn(al, dt, rd, rn, rm);
9112  }
9113
9114  void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9115    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9116    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9117    VIXL_ASSERT(allow_macro_instructions_);
9118    VIXL_ASSERT(OutsideITBlock());
9119    MacroEmissionCheckScope guard(this);
9120    ITScope it_scope(this, &cond);
9121    vrecpe(cond, dt, rd, rm);
9122  }
9123  void Vrecpe(DataType dt, DRegister rd, DRegister rm) {
9124    Vrecpe(al, dt, rd, rm);
9125  }
9126
9127  void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9129    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9130    VIXL_ASSERT(allow_macro_instructions_);
9131    VIXL_ASSERT(OutsideITBlock());
9132    MacroEmissionCheckScope guard(this);
9133    ITScope it_scope(this, &cond);
9134    vrecpe(cond, dt, rd, rm);
9135  }
9136  void Vrecpe(DataType dt, QRegister rd, QRegister rm) {
9137    Vrecpe(al, dt, rd, rm);
9138  }
9139
9140  void Vrecps(
9141      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9142    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9143    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9144    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9145    VIXL_ASSERT(allow_macro_instructions_);
9146    VIXL_ASSERT(OutsideITBlock());
9147    MacroEmissionCheckScope guard(this);
9148    ITScope it_scope(this, &cond);
9149    vrecps(cond, dt, rd, rn, rm);
9150  }
9151  void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9152    Vrecps(al, dt, rd, rn, rm);
9153  }
9154
9155  void Vrecps(
9156      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9158    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9159    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9160    VIXL_ASSERT(allow_macro_instructions_);
9161    VIXL_ASSERT(OutsideITBlock());
9162    MacroEmissionCheckScope guard(this);
9163    ITScope it_scope(this, &cond);
9164    vrecps(cond, dt, rd, rn, rm);
9165  }
9166  void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9167    Vrecps(al, dt, rd, rn, rm);
9168  }
9169
9170  void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9171    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9172    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9173    VIXL_ASSERT(allow_macro_instructions_);
9174    VIXL_ASSERT(OutsideITBlock());
9175    MacroEmissionCheckScope guard(this);
9176    ITScope it_scope(this, &cond);
9177    vrev16(cond, dt, rd, rm);
9178  }
9179  void Vrev16(DataType dt, DRegister rd, DRegister rm) {
9180    Vrev16(al, dt, rd, rm);
9181  }
9182
9183  void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9184    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9185    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9186    VIXL_ASSERT(allow_macro_instructions_);
9187    VIXL_ASSERT(OutsideITBlock());
9188    MacroEmissionCheckScope guard(this);
9189    ITScope it_scope(this, &cond);
9190    vrev16(cond, dt, rd, rm);
9191  }
9192  void Vrev16(DataType dt, QRegister rd, QRegister rm) {
9193    Vrev16(al, dt, rd, rm);
9194  }
9195
9196  void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9198    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9199    VIXL_ASSERT(allow_macro_instructions_);
9200    VIXL_ASSERT(OutsideITBlock());
9201    MacroEmissionCheckScope guard(this);
9202    ITScope it_scope(this, &cond);
9203    vrev32(cond, dt, rd, rm);
9204  }
9205  void Vrev32(DataType dt, DRegister rd, DRegister rm) {
9206    Vrev32(al, dt, rd, rm);
9207  }
9208
9209  void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9210    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9212    VIXL_ASSERT(allow_macro_instructions_);
9213    VIXL_ASSERT(OutsideITBlock());
9214    MacroEmissionCheckScope guard(this);
9215    ITScope it_scope(this, &cond);
9216    vrev32(cond, dt, rd, rm);
9217  }
9218  void Vrev32(DataType dt, QRegister rd, QRegister rm) {
9219    Vrev32(al, dt, rd, rm);
9220  }
9221
9222  void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9224    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9225    VIXL_ASSERT(allow_macro_instructions_);
9226    VIXL_ASSERT(OutsideITBlock());
9227    MacroEmissionCheckScope guard(this);
9228    ITScope it_scope(this, &cond);
9229    vrev64(cond, dt, rd, rm);
9230  }
9231  void Vrev64(DataType dt, DRegister rd, DRegister rm) {
9232    Vrev64(al, dt, rd, rm);
9233  }
9234
9235  void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9236    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9237    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9238    VIXL_ASSERT(allow_macro_instructions_);
9239    VIXL_ASSERT(OutsideITBlock());
9240    MacroEmissionCheckScope guard(this);
9241    ITScope it_scope(this, &cond);
9242    vrev64(cond, dt, rd, rm);
9243  }
9244  void Vrev64(DataType dt, QRegister rd, QRegister rm) {
9245    Vrev64(al, dt, rd, rm);
9246  }
9247
9248  void Vrhadd(
9249      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9250    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9251    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9252    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9253    VIXL_ASSERT(allow_macro_instructions_);
9254    VIXL_ASSERT(OutsideITBlock());
9255    MacroEmissionCheckScope guard(this);
9256    ITScope it_scope(this, &cond);
9257    vrhadd(cond, dt, rd, rn, rm);
9258  }
9259  void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9260    Vrhadd(al, dt, rd, rn, rm);
9261  }
9262
9263  void Vrhadd(
9264      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9265    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9266    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9267    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9268    VIXL_ASSERT(allow_macro_instructions_);
9269    VIXL_ASSERT(OutsideITBlock());
9270    MacroEmissionCheckScope guard(this);
9271    ITScope it_scope(this, &cond);
9272    vrhadd(cond, dt, rd, rn, rm);
9273  }
9274  void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9275    Vrhadd(al, dt, rd, rn, rm);
9276  }
9277
9278  void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9279    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9280    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9281    VIXL_ASSERT(allow_macro_instructions_);
9282    VIXL_ASSERT(OutsideITBlock());
9283    MacroEmissionCheckScope guard(this);
9284    vrinta(dt1, dt2, rd, rm);
9285  }
9286
9287  void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9288    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9289    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9290    VIXL_ASSERT(allow_macro_instructions_);
9291    VIXL_ASSERT(OutsideITBlock());
9292    MacroEmissionCheckScope guard(this);
9293    vrinta(dt1, dt2, rd, rm);
9294  }
9295
9296  void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9297    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9298    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9299    VIXL_ASSERT(allow_macro_instructions_);
9300    VIXL_ASSERT(OutsideITBlock());
9301    MacroEmissionCheckScope guard(this);
9302    vrinta(dt1, dt2, rd, rm);
9303  }
9304
9305  void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9306    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9307    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9308    VIXL_ASSERT(allow_macro_instructions_);
9309    VIXL_ASSERT(OutsideITBlock());
9310    MacroEmissionCheckScope guard(this);
9311    vrintm(dt1, dt2, rd, rm);
9312  }
9313
9314  void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9315    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9316    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9317    VIXL_ASSERT(allow_macro_instructions_);
9318    VIXL_ASSERT(OutsideITBlock());
9319    MacroEmissionCheckScope guard(this);
9320    vrintm(dt1, dt2, rd, rm);
9321  }
9322
9323  void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9326    VIXL_ASSERT(allow_macro_instructions_);
9327    VIXL_ASSERT(OutsideITBlock());
9328    MacroEmissionCheckScope guard(this);
9329    vrintm(dt1, dt2, rd, rm);
9330  }
9331
9332  void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9333    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9334    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9335    VIXL_ASSERT(allow_macro_instructions_);
9336    VIXL_ASSERT(OutsideITBlock());
9337    MacroEmissionCheckScope guard(this);
9338    vrintn(dt1, dt2, rd, rm);
9339  }
9340
9341  void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9342    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9343    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9344    VIXL_ASSERT(allow_macro_instructions_);
9345    VIXL_ASSERT(OutsideITBlock());
9346    MacroEmissionCheckScope guard(this);
9347    vrintn(dt1, dt2, rd, rm);
9348  }
9349
9350  void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9351    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9352    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9353    VIXL_ASSERT(allow_macro_instructions_);
9354    VIXL_ASSERT(OutsideITBlock());
9355    MacroEmissionCheckScope guard(this);
9356    vrintn(dt1, dt2, rd, rm);
9357  }
9358
9359  void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9360    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9361    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9362    VIXL_ASSERT(allow_macro_instructions_);
9363    VIXL_ASSERT(OutsideITBlock());
9364    MacroEmissionCheckScope guard(this);
9365    vrintp(dt1, dt2, rd, rm);
9366  }
9367
9368  void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9369    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9371    VIXL_ASSERT(allow_macro_instructions_);
9372    VIXL_ASSERT(OutsideITBlock());
9373    MacroEmissionCheckScope guard(this);
9374    vrintp(dt1, dt2, rd, rm);
9375  }
9376
9377  void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9378    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9379    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9380    VIXL_ASSERT(allow_macro_instructions_);
9381    VIXL_ASSERT(OutsideITBlock());
9382    MacroEmissionCheckScope guard(this);
9383    vrintp(dt1, dt2, rd, rm);
9384  }
9385
9386  void Vrintr(
9387      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9388    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9389    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9390    VIXL_ASSERT(allow_macro_instructions_);
9391    VIXL_ASSERT(OutsideITBlock());
9392    MacroEmissionCheckScope guard(this);
9393    ITScope it_scope(this, &cond);
9394    vrintr(cond, dt1, dt2, rd, rm);
9395  }
9396  void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9397    Vrintr(al, dt1, dt2, rd, rm);
9398  }
9399
9400  void Vrintr(
9401      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9402    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9403    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9404    VIXL_ASSERT(allow_macro_instructions_);
9405    VIXL_ASSERT(OutsideITBlock());
9406    MacroEmissionCheckScope guard(this);
9407    ITScope it_scope(this, &cond);
9408    vrintr(cond, dt1, dt2, rd, rm);
9409  }
9410  void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9411    Vrintr(al, dt1, dt2, rd, rm);
9412  }
9413
9414  void Vrintx(
9415      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9416    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9417    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9418    VIXL_ASSERT(allow_macro_instructions_);
9419    VIXL_ASSERT(OutsideITBlock());
9420    MacroEmissionCheckScope guard(this);
9421    ITScope it_scope(this, &cond);
9422    vrintx(cond, dt1, dt2, rd, rm);
9423  }
9424  void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9425    Vrintx(al, dt1, dt2, rd, rm);
9426  }
9427
9428  void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9429    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9430    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9431    VIXL_ASSERT(allow_macro_instructions_);
9432    VIXL_ASSERT(OutsideITBlock());
9433    MacroEmissionCheckScope guard(this);
9434    vrintx(dt1, dt2, rd, rm);
9435  }
9436
9437  void Vrintx(
9438      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9441    VIXL_ASSERT(allow_macro_instructions_);
9442    VIXL_ASSERT(OutsideITBlock());
9443    MacroEmissionCheckScope guard(this);
9444    ITScope it_scope(this, &cond);
9445    vrintx(cond, dt1, dt2, rd, rm);
9446  }
9447  void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9448    Vrintx(al, dt1, dt2, rd, rm);
9449  }
9450
9451  void Vrintz(
9452      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9453    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9454    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9455    VIXL_ASSERT(allow_macro_instructions_);
9456    VIXL_ASSERT(OutsideITBlock());
9457    MacroEmissionCheckScope guard(this);
9458    ITScope it_scope(this, &cond);
9459    vrintz(cond, dt1, dt2, rd, rm);
9460  }
9461  void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9462    Vrintz(al, dt1, dt2, rd, rm);
9463  }
9464
9465  void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9466    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9467    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9468    VIXL_ASSERT(allow_macro_instructions_);
9469    VIXL_ASSERT(OutsideITBlock());
9470    MacroEmissionCheckScope guard(this);
9471    vrintz(dt1, dt2, rd, rm);
9472  }
9473
9474  void Vrintz(
9475      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9476    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9477    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9478    VIXL_ASSERT(allow_macro_instructions_);
9479    VIXL_ASSERT(OutsideITBlock());
9480    MacroEmissionCheckScope guard(this);
9481    ITScope it_scope(this, &cond);
9482    vrintz(cond, dt1, dt2, rd, rm);
9483  }
9484  void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9485    Vrintz(al, dt1, dt2, rd, rm);
9486  }
9487
9488  void Vrshl(
9489      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9490    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9491    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9493    VIXL_ASSERT(allow_macro_instructions_);
9494    VIXL_ASSERT(OutsideITBlock());
9495    MacroEmissionCheckScope guard(this);
9496    ITScope it_scope(this, &cond);
9497    vrshl(cond, dt, rd, rm, rn);
9498  }
9499  void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9500    Vrshl(al, dt, rd, rm, rn);
9501  }
9502
9503  void Vrshl(
9504      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9505    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9506    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9508    VIXL_ASSERT(allow_macro_instructions_);
9509    VIXL_ASSERT(OutsideITBlock());
9510    MacroEmissionCheckScope guard(this);
9511    ITScope it_scope(this, &cond);
9512    vrshl(cond, dt, rd, rm, rn);
9513  }
9514  void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9515    Vrshl(al, dt, rd, rm, rn);
9516  }
9517
9518  void Vrshr(Condition cond,
9519             DataType dt,
9520             DRegister rd,
9521             DRegister rm,
9522             const DOperand& operand) {
9523    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9524    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9525    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9526    VIXL_ASSERT(allow_macro_instructions_);
9527    VIXL_ASSERT(OutsideITBlock());
9528    MacroEmissionCheckScope guard(this);
9529    ITScope it_scope(this, &cond);
9530    vrshr(cond, dt, rd, rm, operand);
9531  }
9532  void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9533    Vrshr(al, dt, rd, rm, operand);
9534  }
9535
9536  void Vrshr(Condition cond,
9537             DataType dt,
9538             QRegister rd,
9539             QRegister rm,
9540             const QOperand& operand) {
9541    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9542    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9543    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9544    VIXL_ASSERT(allow_macro_instructions_);
9545    VIXL_ASSERT(OutsideITBlock());
9546    MacroEmissionCheckScope guard(this);
9547    ITScope it_scope(this, &cond);
9548    vrshr(cond, dt, rd, rm, operand);
9549  }
9550  void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9551    Vrshr(al, dt, rd, rm, operand);
9552  }
9553
9554  void Vrshrn(Condition cond,
9555              DataType dt,
9556              DRegister rd,
9557              QRegister rm,
9558              const QOperand& operand) {
9559    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9560    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9561    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9562    VIXL_ASSERT(allow_macro_instructions_);
9563    VIXL_ASSERT(OutsideITBlock());
9564    MacroEmissionCheckScope guard(this);
9565    ITScope it_scope(this, &cond);
9566    vrshrn(cond, dt, rd, rm, operand);
9567  }
9568  void Vrshrn(DataType dt,
9569              DRegister rd,
9570              QRegister rm,
9571              const QOperand& operand) {
9572    Vrshrn(al, dt, rd, rm, operand);
9573  }
9574
9575  void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9576    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9577    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9578    VIXL_ASSERT(allow_macro_instructions_);
9579    VIXL_ASSERT(OutsideITBlock());
9580    MacroEmissionCheckScope guard(this);
9581    ITScope it_scope(this, &cond);
9582    vrsqrte(cond, dt, rd, rm);
9583  }
9584  void Vrsqrte(DataType dt, DRegister rd, DRegister rm) {
9585    Vrsqrte(al, dt, rd, rm);
9586  }
9587
9588  void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9589    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9590    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9591    VIXL_ASSERT(allow_macro_instructions_);
9592    VIXL_ASSERT(OutsideITBlock());
9593    MacroEmissionCheckScope guard(this);
9594    ITScope it_scope(this, &cond);
9595    vrsqrte(cond, dt, rd, rm);
9596  }
9597  void Vrsqrte(DataType dt, QRegister rd, QRegister rm) {
9598    Vrsqrte(al, dt, rd, rm);
9599  }
9600
9601  void Vrsqrts(
9602      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9606    VIXL_ASSERT(allow_macro_instructions_);
9607    VIXL_ASSERT(OutsideITBlock());
9608    MacroEmissionCheckScope guard(this);
9609    ITScope it_scope(this, &cond);
9610    vrsqrts(cond, dt, rd, rn, rm);
9611  }
9612  void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9613    Vrsqrts(al, dt, rd, rn, rm);
9614  }
9615
9616  void Vrsqrts(
9617      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9621    VIXL_ASSERT(allow_macro_instructions_);
9622    VIXL_ASSERT(OutsideITBlock());
9623    MacroEmissionCheckScope guard(this);
9624    ITScope it_scope(this, &cond);
9625    vrsqrts(cond, dt, rd, rn, rm);
9626  }
9627  void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9628    Vrsqrts(al, dt, rd, rn, rm);
9629  }
9630
9631  void Vrsra(Condition cond,
9632             DataType dt,
9633             DRegister rd,
9634             DRegister rm,
9635             const DOperand& operand) {
9636    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9637    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9638    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9639    VIXL_ASSERT(allow_macro_instructions_);
9640    VIXL_ASSERT(OutsideITBlock());
9641    MacroEmissionCheckScope guard(this);
9642    ITScope it_scope(this, &cond);
9643    vrsra(cond, dt, rd, rm, operand);
9644  }
9645  void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9646    Vrsra(al, dt, rd, rm, operand);
9647  }
9648
9649  void Vrsra(Condition cond,
9650             DataType dt,
9651             QRegister rd,
9652             QRegister rm,
9653             const QOperand& operand) {
9654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9655    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9656    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9657    VIXL_ASSERT(allow_macro_instructions_);
9658    VIXL_ASSERT(OutsideITBlock());
9659    MacroEmissionCheckScope guard(this);
9660    ITScope it_scope(this, &cond);
9661    vrsra(cond, dt, rd, rm, operand);
9662  }
9663  void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9664    Vrsra(al, dt, rd, rm, operand);
9665  }
9666
9667  void Vrsubhn(
9668      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9671    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9672    VIXL_ASSERT(allow_macro_instructions_);
9673    VIXL_ASSERT(OutsideITBlock());
9674    MacroEmissionCheckScope guard(this);
9675    ITScope it_scope(this, &cond);
9676    vrsubhn(cond, dt, rd, rn, rm);
9677  }
9678  void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9679    Vrsubhn(al, dt, rd, rn, rm);
9680  }
9681
9682  void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9686    VIXL_ASSERT(allow_macro_instructions_);
9687    VIXL_ASSERT(OutsideITBlock());
9688    MacroEmissionCheckScope guard(this);
9689    vseleq(dt, rd, rn, rm);
9690  }
9691
9692  void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9693    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9694    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9695    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9696    VIXL_ASSERT(allow_macro_instructions_);
9697    VIXL_ASSERT(OutsideITBlock());
9698    MacroEmissionCheckScope guard(this);
9699    vseleq(dt, rd, rn, rm);
9700  }
9701
9702  void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9703    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9704    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9705    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9706    VIXL_ASSERT(allow_macro_instructions_);
9707    VIXL_ASSERT(OutsideITBlock());
9708    MacroEmissionCheckScope guard(this);
9709    vselge(dt, rd, rn, rm);
9710  }
9711
9712  void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9713    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9716    VIXL_ASSERT(allow_macro_instructions_);
9717    VIXL_ASSERT(OutsideITBlock());
9718    MacroEmissionCheckScope guard(this);
9719    vselge(dt, rd, rn, rm);
9720  }
9721
9722  void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9723    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9725    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9726    VIXL_ASSERT(allow_macro_instructions_);
9727    VIXL_ASSERT(OutsideITBlock());
9728    MacroEmissionCheckScope guard(this);
9729    vselgt(dt, rd, rn, rm);
9730  }
9731
9732  void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9734    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9736    VIXL_ASSERT(allow_macro_instructions_);
9737    VIXL_ASSERT(OutsideITBlock());
9738    MacroEmissionCheckScope guard(this);
9739    vselgt(dt, rd, rn, rm);
9740  }
9741
9742  void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9743    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9744    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9745    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9746    VIXL_ASSERT(allow_macro_instructions_);
9747    VIXL_ASSERT(OutsideITBlock());
9748    MacroEmissionCheckScope guard(this);
9749    vselvs(dt, rd, rn, rm);
9750  }
9751
9752  void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9753    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9754    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9755    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9756    VIXL_ASSERT(allow_macro_instructions_);
9757    VIXL_ASSERT(OutsideITBlock());
9758    MacroEmissionCheckScope guard(this);
9759    vselvs(dt, rd, rn, rm);
9760  }
9761
9762  void Vshl(Condition cond,
9763            DataType dt,
9764            DRegister rd,
9765            DRegister rm,
9766            const DOperand& operand) {
9767    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9768    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9769    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9770    VIXL_ASSERT(allow_macro_instructions_);
9771    VIXL_ASSERT(OutsideITBlock());
9772    MacroEmissionCheckScope guard(this);
9773    ITScope it_scope(this, &cond);
9774    vshl(cond, dt, rd, rm, operand);
9775  }
9776  void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9777    Vshl(al, dt, rd, rm, operand);
9778  }
9779
9780  void Vshl(Condition cond,
9781            DataType dt,
9782            QRegister rd,
9783            QRegister rm,
9784            const QOperand& operand) {
9785    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9787    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9788    VIXL_ASSERT(allow_macro_instructions_);
9789    VIXL_ASSERT(OutsideITBlock());
9790    MacroEmissionCheckScope guard(this);
9791    ITScope it_scope(this, &cond);
9792    vshl(cond, dt, rd, rm, operand);
9793  }
9794  void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9795    Vshl(al, dt, rd, rm, operand);
9796  }
9797
9798  void Vshll(Condition cond,
9799             DataType dt,
9800             QRegister rd,
9801             DRegister rm,
9802             const DOperand& operand) {
9803    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9805    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9806    VIXL_ASSERT(allow_macro_instructions_);
9807    VIXL_ASSERT(OutsideITBlock());
9808    MacroEmissionCheckScope guard(this);
9809    ITScope it_scope(this, &cond);
9810    vshll(cond, dt, rd, rm, operand);
9811  }
9812  void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) {
9813    Vshll(al, dt, rd, rm, operand);
9814  }
9815
9816  void Vshr(Condition cond,
9817            DataType dt,
9818            DRegister rd,
9819            DRegister rm,
9820            const DOperand& operand) {
9821    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9822    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9823    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9824    VIXL_ASSERT(allow_macro_instructions_);
9825    VIXL_ASSERT(OutsideITBlock());
9826    MacroEmissionCheckScope guard(this);
9827    ITScope it_scope(this, &cond);
9828    vshr(cond, dt, rd, rm, operand);
9829  }
9830  void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9831    Vshr(al, dt, rd, rm, operand);
9832  }
9833
9834  void Vshr(Condition cond,
9835            DataType dt,
9836            QRegister rd,
9837            QRegister rm,
9838            const QOperand& operand) {
9839    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9840    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9841    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9842    VIXL_ASSERT(allow_macro_instructions_);
9843    VIXL_ASSERT(OutsideITBlock());
9844    MacroEmissionCheckScope guard(this);
9845    ITScope it_scope(this, &cond);
9846    vshr(cond, dt, rd, rm, operand);
9847  }
9848  void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9849    Vshr(al, dt, rd, rm, operand);
9850  }
9851
9852  void Vshrn(Condition cond,
9853             DataType dt,
9854             DRegister rd,
9855             QRegister rm,
9856             const QOperand& operand) {
9857    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9859    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9860    VIXL_ASSERT(allow_macro_instructions_);
9861    VIXL_ASSERT(OutsideITBlock());
9862    MacroEmissionCheckScope guard(this);
9863    ITScope it_scope(this, &cond);
9864    vshrn(cond, dt, rd, rm, operand);
9865  }
9866  void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) {
9867    Vshrn(al, dt, rd, rm, operand);
9868  }
9869
9870  void Vsli(Condition cond,
9871            DataType dt,
9872            DRegister rd,
9873            DRegister rm,
9874            const DOperand& operand) {
9875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9877    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9878    VIXL_ASSERT(allow_macro_instructions_);
9879    VIXL_ASSERT(OutsideITBlock());
9880    MacroEmissionCheckScope guard(this);
9881    ITScope it_scope(this, &cond);
9882    vsli(cond, dt, rd, rm, operand);
9883  }
9884  void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9885    Vsli(al, dt, rd, rm, operand);
9886  }
9887
9888  void Vsli(Condition cond,
9889            DataType dt,
9890            QRegister rd,
9891            QRegister rm,
9892            const QOperand& operand) {
9893    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9894    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9895    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9896    VIXL_ASSERT(allow_macro_instructions_);
9897    VIXL_ASSERT(OutsideITBlock());
9898    MacroEmissionCheckScope guard(this);
9899    ITScope it_scope(this, &cond);
9900    vsli(cond, dt, rd, rm, operand);
9901  }
9902  void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9903    Vsli(al, dt, rd, rm, operand);
9904  }
9905
9906  void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) {
9907    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9909    VIXL_ASSERT(allow_macro_instructions_);
9910    VIXL_ASSERT(OutsideITBlock());
9911    MacroEmissionCheckScope guard(this);
9912    ITScope it_scope(this, &cond);
9913    vsqrt(cond, dt, rd, rm);
9914  }
9915  void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); }
9916
9917  void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9918    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9919    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9920    VIXL_ASSERT(allow_macro_instructions_);
9921    VIXL_ASSERT(OutsideITBlock());
9922    MacroEmissionCheckScope guard(this);
9923    ITScope it_scope(this, &cond);
9924    vsqrt(cond, dt, rd, rm);
9925  }
9926  void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); }
9927
9928  void Vsra(Condition cond,
9929            DataType dt,
9930            DRegister rd,
9931            DRegister rm,
9932            const DOperand& operand) {
9933    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9934    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9935    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9936    VIXL_ASSERT(allow_macro_instructions_);
9937    VIXL_ASSERT(OutsideITBlock());
9938    MacroEmissionCheckScope guard(this);
9939    ITScope it_scope(this, &cond);
9940    vsra(cond, dt, rd, rm, operand);
9941  }
9942  void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9943    Vsra(al, dt, rd, rm, operand);
9944  }
9945
9946  void Vsra(Condition cond,
9947            DataType dt,
9948            QRegister rd,
9949            QRegister rm,
9950            const QOperand& operand) {
9951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9952    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9953    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9954    VIXL_ASSERT(allow_macro_instructions_);
9955    VIXL_ASSERT(OutsideITBlock());
9956    MacroEmissionCheckScope guard(this);
9957    ITScope it_scope(this, &cond);
9958    vsra(cond, dt, rd, rm, operand);
9959  }
9960  void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9961    Vsra(al, dt, rd, rm, operand);
9962  }
9963
9964  void Vsri(Condition cond,
9965            DataType dt,
9966            DRegister rd,
9967            DRegister rm,
9968            const DOperand& operand) {
9969    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9970    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9971    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9972    VIXL_ASSERT(allow_macro_instructions_);
9973    VIXL_ASSERT(OutsideITBlock());
9974    MacroEmissionCheckScope guard(this);
9975    ITScope it_scope(this, &cond);
9976    vsri(cond, dt, rd, rm, operand);
9977  }
9978  void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9979    Vsri(al, dt, rd, rm, operand);
9980  }
9981
9982  void Vsri(Condition cond,
9983            DataType dt,
9984            QRegister rd,
9985            QRegister rm,
9986            const QOperand& operand) {
9987    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9988    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9989    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9990    VIXL_ASSERT(allow_macro_instructions_);
9991    VIXL_ASSERT(OutsideITBlock());
9992    MacroEmissionCheckScope guard(this);
9993    ITScope it_scope(this, &cond);
9994    vsri(cond, dt, rd, rm, operand);
9995  }
9996  void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9997    Vsri(al, dt, rd, rm, operand);
9998  }
9999
10000  void Vst1(Condition cond,
10001            DataType dt,
10002            const NeonRegisterList& nreglist,
10003            const AlignedMemOperand& operand) {
10004    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10005    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10006    VIXL_ASSERT(allow_macro_instructions_);
10007    VIXL_ASSERT(OutsideITBlock());
10008    MacroEmissionCheckScope guard(this);
10009    ITScope it_scope(this, &cond);
10010    vst1(cond, dt, nreglist, operand);
10011  }
10012  void Vst1(DataType dt,
10013            const NeonRegisterList& nreglist,
10014            const AlignedMemOperand& operand) {
10015    Vst1(al, dt, nreglist, operand);
10016  }
10017
10018  void Vst2(Condition cond,
10019            DataType dt,
10020            const NeonRegisterList& nreglist,
10021            const AlignedMemOperand& operand) {
10022    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10023    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10024    VIXL_ASSERT(allow_macro_instructions_);
10025    VIXL_ASSERT(OutsideITBlock());
10026    MacroEmissionCheckScope guard(this);
10027    ITScope it_scope(this, &cond);
10028    vst2(cond, dt, nreglist, operand);
10029  }
10030  void Vst2(DataType dt,
10031            const NeonRegisterList& nreglist,
10032            const AlignedMemOperand& operand) {
10033    Vst2(al, dt, nreglist, operand);
10034  }
10035
10036  void Vst3(Condition cond,
10037            DataType dt,
10038            const NeonRegisterList& nreglist,
10039            const AlignedMemOperand& operand) {
10040    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10041    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10042    VIXL_ASSERT(allow_macro_instructions_);
10043    VIXL_ASSERT(OutsideITBlock());
10044    MacroEmissionCheckScope guard(this);
10045    ITScope it_scope(this, &cond);
10046    vst3(cond, dt, nreglist, operand);
10047  }
10048  void Vst3(DataType dt,
10049            const NeonRegisterList& nreglist,
10050            const AlignedMemOperand& operand) {
10051    Vst3(al, dt, nreglist, operand);
10052  }
10053
10054  void Vst3(Condition cond,
10055            DataType dt,
10056            const NeonRegisterList& nreglist,
10057            const MemOperand& operand) {
10058    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10059    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10060    VIXL_ASSERT(allow_macro_instructions_);
10061    VIXL_ASSERT(OutsideITBlock());
10062    MacroEmissionCheckScope guard(this);
10063    ITScope it_scope(this, &cond);
10064    vst3(cond, dt, nreglist, operand);
10065  }
10066  void Vst3(DataType dt,
10067            const NeonRegisterList& nreglist,
10068            const MemOperand& operand) {
10069    Vst3(al, dt, nreglist, operand);
10070  }
10071
10072  void Vst4(Condition cond,
10073            DataType dt,
10074            const NeonRegisterList& nreglist,
10075            const AlignedMemOperand& operand) {
10076    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10077    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10078    VIXL_ASSERT(allow_macro_instructions_);
10079    VIXL_ASSERT(OutsideITBlock());
10080    MacroEmissionCheckScope guard(this);
10081    ITScope it_scope(this, &cond);
10082    vst4(cond, dt, nreglist, operand);
10083  }
10084  void Vst4(DataType dt,
10085            const NeonRegisterList& nreglist,
10086            const AlignedMemOperand& operand) {
10087    Vst4(al, dt, nreglist, operand);
10088  }
10089
10090  void Vstm(Condition cond,
10091            DataType dt,
10092            Register rn,
10093            WriteBack write_back,
10094            DRegisterList dreglist) {
10095    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10096    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10097    VIXL_ASSERT(allow_macro_instructions_);
10098    VIXL_ASSERT(OutsideITBlock());
10099    MacroEmissionCheckScope guard(this);
10100    ITScope it_scope(this, &cond);
10101    vstm(cond, dt, rn, write_back, dreglist);
10102  }
10103  void Vstm(DataType dt,
10104            Register rn,
10105            WriteBack write_back,
10106            DRegisterList dreglist) {
10107    Vstm(al, dt, rn, write_back, dreglist);
10108  }
10109  void Vstm(Condition cond,
10110            Register rn,
10111            WriteBack write_back,
10112            DRegisterList dreglist) {
10113    Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist);
10114  }
10115  void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) {
10116    Vstm(al, kDataTypeValueNone, rn, write_back, dreglist);
10117  }
10118
10119  void Vstm(Condition cond,
10120            DataType dt,
10121            Register rn,
10122            WriteBack write_back,
10123            SRegisterList sreglist) {
10124    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10125    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10126    VIXL_ASSERT(allow_macro_instructions_);
10127    VIXL_ASSERT(OutsideITBlock());
10128    MacroEmissionCheckScope guard(this);
10129    ITScope it_scope(this, &cond);
10130    vstm(cond, dt, rn, write_back, sreglist);
10131  }
10132  void Vstm(DataType dt,
10133            Register rn,
10134            WriteBack write_back,
10135            SRegisterList sreglist) {
10136    Vstm(al, dt, rn, write_back, sreglist);
10137  }
10138  void Vstm(Condition cond,
10139            Register rn,
10140            WriteBack write_back,
10141            SRegisterList sreglist) {
10142    Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist);
10143  }
10144  void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) {
10145    Vstm(al, kDataTypeValueNone, rn, write_back, sreglist);
10146  }
10147
10148  void Vstmdb(Condition cond,
10149              DataType dt,
10150              Register rn,
10151              WriteBack write_back,
10152              DRegisterList dreglist) {
10153    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10154    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10155    VIXL_ASSERT(allow_macro_instructions_);
10156    VIXL_ASSERT(OutsideITBlock());
10157    MacroEmissionCheckScope guard(this);
10158    ITScope it_scope(this, &cond);
10159    vstmdb(cond, dt, rn, write_back, dreglist);
10160  }
10161  void Vstmdb(DataType dt,
10162              Register rn,
10163              WriteBack write_back,
10164              DRegisterList dreglist) {
10165    Vstmdb(al, dt, rn, write_back, dreglist);
10166  }
10167  void Vstmdb(Condition cond,
10168              Register rn,
10169              WriteBack write_back,
10170              DRegisterList dreglist) {
10171    Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
10172  }
10173  void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
10174    Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
10175  }
10176
10177  void Vstmdb(Condition cond,
10178              DataType dt,
10179              Register rn,
10180              WriteBack write_back,
10181              SRegisterList sreglist) {
10182    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10183    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10184    VIXL_ASSERT(allow_macro_instructions_);
10185    VIXL_ASSERT(OutsideITBlock());
10186    MacroEmissionCheckScope guard(this);
10187    ITScope it_scope(this, &cond);
10188    vstmdb(cond, dt, rn, write_back, sreglist);
10189  }
10190  void Vstmdb(DataType dt,
10191              Register rn,
10192              WriteBack write_back,
10193              SRegisterList sreglist) {
10194    Vstmdb(al, dt, rn, write_back, sreglist);
10195  }
10196  void Vstmdb(Condition cond,
10197              Register rn,
10198              WriteBack write_back,
10199              SRegisterList sreglist) {
10200    Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
10201  }
10202  void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
10203    Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
10204  }
10205
10206  void Vstmia(Condition cond,
10207              DataType dt,
10208              Register rn,
10209              WriteBack write_back,
10210              DRegisterList dreglist) {
10211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10212    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10213    VIXL_ASSERT(allow_macro_instructions_);
10214    VIXL_ASSERT(OutsideITBlock());
10215    MacroEmissionCheckScope guard(this);
10216    ITScope it_scope(this, &cond);
10217    vstmia(cond, dt, rn, write_back, dreglist);
10218  }
10219  void Vstmia(DataType dt,
10220              Register rn,
10221              WriteBack write_back,
10222              DRegisterList dreglist) {
10223    Vstmia(al, dt, rn, write_back, dreglist);
10224  }
10225  void Vstmia(Condition cond,
10226              Register rn,
10227              WriteBack write_back,
10228              DRegisterList dreglist) {
10229    Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
10230  }
10231  void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
10232    Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist);
10233  }
10234
10235  void Vstmia(Condition cond,
10236              DataType dt,
10237              Register rn,
10238              WriteBack write_back,
10239              SRegisterList sreglist) {
10240    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10241    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10242    VIXL_ASSERT(allow_macro_instructions_);
10243    VIXL_ASSERT(OutsideITBlock());
10244    MacroEmissionCheckScope guard(this);
10245    ITScope it_scope(this, &cond);
10246    vstmia(cond, dt, rn, write_back, sreglist);
10247  }
10248  void Vstmia(DataType dt,
10249              Register rn,
10250              WriteBack write_back,
10251              SRegisterList sreglist) {
10252    Vstmia(al, dt, rn, write_back, sreglist);
10253  }
10254  void Vstmia(Condition cond,
10255              Register rn,
10256              WriteBack write_back,
10257              SRegisterList sreglist) {
10258    Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
10259  }
10260  void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
10261    Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist);
10262  }
10263
10264  void Vstr(Condition cond,
10265            DataType dt,
10266            DRegister rd,
10267            const MemOperand& operand) {
10268    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10269    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10270    VIXL_ASSERT(allow_macro_instructions_);
10271    VIXL_ASSERT(OutsideITBlock());
10272    MacroEmissionCheckScope guard(this);
10273    ITScope it_scope(this, &cond);
10274    vstr(cond, dt, rd, operand);
10275  }
10276  void Vstr(DataType dt, DRegister rd, const MemOperand& operand) {
10277    Vstr(al, dt, rd, operand);
10278  }
10279  void Vstr(Condition cond, DRegister rd, const MemOperand& operand) {
10280    Vstr(cond, Untyped64, rd, operand);
10281  }
10282  void Vstr(DRegister rd, const MemOperand& operand) {
10283    Vstr(al, Untyped64, rd, operand);
10284  }
10285
10286  void Vstr(Condition cond,
10287            DataType dt,
10288            SRegister rd,
10289            const MemOperand& operand) {
10290    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10291    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10292    VIXL_ASSERT(allow_macro_instructions_);
10293    VIXL_ASSERT(OutsideITBlock());
10294    MacroEmissionCheckScope guard(this);
10295    ITScope it_scope(this, &cond);
10296    vstr(cond, dt, rd, operand);
10297  }
10298  void Vstr(DataType dt, SRegister rd, const MemOperand& operand) {
10299    Vstr(al, dt, rd, operand);
10300  }
10301  void Vstr(Condition cond, SRegister rd, const MemOperand& operand) {
10302    Vstr(cond, Untyped32, rd, operand);
10303  }
10304  void Vstr(SRegister rd, const MemOperand& operand) {
10305    Vstr(al, Untyped32, rd, operand);
10306  }
10307
10308  void Vsub(
10309      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10311    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10312    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10313    VIXL_ASSERT(allow_macro_instructions_);
10314    VIXL_ASSERT(OutsideITBlock());
10315    MacroEmissionCheckScope guard(this);
10316    ITScope it_scope(this, &cond);
10317    vsub(cond, dt, rd, rn, rm);
10318  }
10319  void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10320    Vsub(al, dt, rd, rn, rm);
10321  }
10322
10323  void Vsub(
10324      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10327    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10328    VIXL_ASSERT(allow_macro_instructions_);
10329    VIXL_ASSERT(OutsideITBlock());
10330    MacroEmissionCheckScope guard(this);
10331    ITScope it_scope(this, &cond);
10332    vsub(cond, dt, rd, rn, rm);
10333  }
10334  void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10335    Vsub(al, dt, rd, rn, rm);
10336  }
10337
10338  void Vsub(
10339      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10340    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10341    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10342    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10343    VIXL_ASSERT(allow_macro_instructions_);
10344    VIXL_ASSERT(OutsideITBlock());
10345    MacroEmissionCheckScope guard(this);
10346    ITScope it_scope(this, &cond);
10347    vsub(cond, dt, rd, rn, rm);
10348  }
10349  void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10350    Vsub(al, dt, rd, rn, rm);
10351  }
10352
10353  void Vsubhn(
10354      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10355    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10356    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10357    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10358    VIXL_ASSERT(allow_macro_instructions_);
10359    VIXL_ASSERT(OutsideITBlock());
10360    MacroEmissionCheckScope guard(this);
10361    ITScope it_scope(this, &cond);
10362    vsubhn(cond, dt, rd, rn, rm);
10363  }
10364  void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10365    Vsubhn(al, dt, rd, rn, rm);
10366  }
10367
10368  void Vsubl(
10369      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10372    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10373    VIXL_ASSERT(allow_macro_instructions_);
10374    VIXL_ASSERT(OutsideITBlock());
10375    MacroEmissionCheckScope guard(this);
10376    ITScope it_scope(this, &cond);
10377    vsubl(cond, dt, rd, rn, rm);
10378  }
10379  void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10380    Vsubl(al, dt, rd, rn, rm);
10381  }
10382
10383  void Vsubw(
10384      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10385    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10386    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10387    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10388    VIXL_ASSERT(allow_macro_instructions_);
10389    VIXL_ASSERT(OutsideITBlock());
10390    MacroEmissionCheckScope guard(this);
10391    ITScope it_scope(this, &cond);
10392    vsubw(cond, dt, rd, rn, rm);
10393  }
10394  void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10395    Vsubw(al, dt, rd, rn, rm);
10396  }
10397
10398  void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10399    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10401    VIXL_ASSERT(allow_macro_instructions_);
10402    VIXL_ASSERT(OutsideITBlock());
10403    MacroEmissionCheckScope guard(this);
10404    ITScope it_scope(this, &cond);
10405    vswp(cond, dt, rd, rm);
10406  }
10407  void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); }
10408  void Vswp(Condition cond, DRegister rd, DRegister rm) {
10409    Vswp(cond, kDataTypeValueNone, rd, rm);
10410  }
10411  void Vswp(DRegister rd, DRegister rm) {
10412    Vswp(al, kDataTypeValueNone, rd, rm);
10413  }
10414
10415  void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10416    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10417    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10418    VIXL_ASSERT(allow_macro_instructions_);
10419    VIXL_ASSERT(OutsideITBlock());
10420    MacroEmissionCheckScope guard(this);
10421    ITScope it_scope(this, &cond);
10422    vswp(cond, dt, rd, rm);
10423  }
10424  void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); }
10425  void Vswp(Condition cond, QRegister rd, QRegister rm) {
10426    Vswp(cond, kDataTypeValueNone, rd, rm);
10427  }
10428  void Vswp(QRegister rd, QRegister rm) {
10429    Vswp(al, kDataTypeValueNone, rd, rm);
10430  }
10431
10432  void Vtbl(Condition cond,
10433            DataType dt,
10434            DRegister rd,
10435            const NeonRegisterList& nreglist,
10436            DRegister rm) {
10437    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10438    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10440    VIXL_ASSERT(allow_macro_instructions_);
10441    VIXL_ASSERT(OutsideITBlock());
10442    MacroEmissionCheckScope guard(this);
10443    ITScope it_scope(this, &cond);
10444    vtbl(cond, dt, rd, nreglist, rm);
10445  }
10446  void Vtbl(DataType dt,
10447            DRegister rd,
10448            const NeonRegisterList& nreglist,
10449            DRegister rm) {
10450    Vtbl(al, dt, rd, nreglist, rm);
10451  }
10452
10453  void Vtbx(Condition cond,
10454            DataType dt,
10455            DRegister rd,
10456            const NeonRegisterList& nreglist,
10457            DRegister rm) {
10458    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10459    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10460    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10461    VIXL_ASSERT(allow_macro_instructions_);
10462    VIXL_ASSERT(OutsideITBlock());
10463    MacroEmissionCheckScope guard(this);
10464    ITScope it_scope(this, &cond);
10465    vtbx(cond, dt, rd, nreglist, rm);
10466  }
10467  void Vtbx(DataType dt,
10468            DRegister rd,
10469            const NeonRegisterList& nreglist,
10470            DRegister rm) {
10471    Vtbx(al, dt, rd, nreglist, rm);
10472  }
10473
10474  void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10475    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10476    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10477    VIXL_ASSERT(allow_macro_instructions_);
10478    VIXL_ASSERT(OutsideITBlock());
10479    MacroEmissionCheckScope guard(this);
10480    ITScope it_scope(this, &cond);
10481    vtrn(cond, dt, rd, rm);
10482  }
10483  void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); }
10484
10485  void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10486    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10488    VIXL_ASSERT(allow_macro_instructions_);
10489    VIXL_ASSERT(OutsideITBlock());
10490    MacroEmissionCheckScope guard(this);
10491    ITScope it_scope(this, &cond);
10492    vtrn(cond, dt, rd, rm);
10493  }
10494  void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); }
10495
10496  void Vtst(
10497      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10498    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10501    VIXL_ASSERT(allow_macro_instructions_);
10502    VIXL_ASSERT(OutsideITBlock());
10503    MacroEmissionCheckScope guard(this);
10504    ITScope it_scope(this, &cond);
10505    vtst(cond, dt, rd, rn, rm);
10506  }
10507  void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10508    Vtst(al, dt, rd, rn, rm);
10509  }
10510
10511  void Vtst(
10512      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10513    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10514    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10515    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10516    VIXL_ASSERT(allow_macro_instructions_);
10517    VIXL_ASSERT(OutsideITBlock());
10518    MacroEmissionCheckScope guard(this);
10519    ITScope it_scope(this, &cond);
10520    vtst(cond, dt, rd, rn, rm);
10521  }
10522  void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10523    Vtst(al, dt, rd, rn, rm);
10524  }
10525
10526  void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10528    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10529    VIXL_ASSERT(allow_macro_instructions_);
10530    VIXL_ASSERT(OutsideITBlock());
10531    MacroEmissionCheckScope guard(this);
10532    ITScope it_scope(this, &cond);
10533    vuzp(cond, dt, rd, rm);
10534  }
10535  void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); }
10536
10537  void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10540    VIXL_ASSERT(allow_macro_instructions_);
10541    VIXL_ASSERT(OutsideITBlock());
10542    MacroEmissionCheckScope guard(this);
10543    ITScope it_scope(this, &cond);
10544    vuzp(cond, dt, rd, rm);
10545  }
10546  void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); }
10547
10548  void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10549    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10550    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10551    VIXL_ASSERT(allow_macro_instructions_);
10552    VIXL_ASSERT(OutsideITBlock());
10553    MacroEmissionCheckScope guard(this);
10554    ITScope it_scope(this, &cond);
10555    vzip(cond, dt, rd, rm);
10556  }
10557  void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); }
10558
10559  void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10560    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10561    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10562    VIXL_ASSERT(allow_macro_instructions_);
10563    VIXL_ASSERT(OutsideITBlock());
10564    MacroEmissionCheckScope guard(this);
10565    ITScope it_scope(this, &cond);
10566    vzip(cond, dt, rd, rm);
10567  }
10568  void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); }
10569
10570  void Yield(Condition cond) {
10571    VIXL_ASSERT(allow_macro_instructions_);
10572    VIXL_ASSERT(OutsideITBlock());
10573    MacroEmissionCheckScope guard(this);
10574    ITScope it_scope(this, &cond);
10575    yield(cond);
10576  }
10577  void Yield() { Yield(al); }
10578  void Vabs(Condition cond, VRegister rd, VRegister rm) {
10579    VIXL_ASSERT(rd.IsS() || rd.IsD());
10580    VIXL_ASSERT(rd.GetType() == rm.GetType());
10581    if (rd.IsS()) {
10582      Vabs(cond, F32, rd.S(), rm.S());
10583    } else {
10584      Vabs(cond, F64, rd.D(), rm.D());
10585    }
10586  }
10587  void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); }
10588  void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10589    VIXL_ASSERT(rd.IsS() || rd.IsD());
10590    VIXL_ASSERT(rd.GetType() == rn.GetType());
10591    VIXL_ASSERT(rd.GetType() == rm.GetType());
10592    if (rd.IsS()) {
10593      Vadd(cond, F32, rd.S(), rn.S(), rm.S());
10594    } else {
10595      Vadd(cond, F64, rd.D(), rn.D(), rm.D());
10596    }
10597  }
10598  void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); }
10599  void Vcmp(Condition cond, VRegister rd, VRegister rm) {
10600    VIXL_ASSERT(rd.IsS() || rd.IsD());
10601    VIXL_ASSERT(rd.GetType() == rm.GetType());
10602    if (rd.IsS()) {
10603      Vcmp(cond, F32, rd.S(), rm.S());
10604    } else {
10605      Vcmp(cond, F64, rd.D(), rm.D());
10606    }
10607  }
10608  void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); }
10609  void Vcmpe(Condition cond, VRegister rd, VRegister rm) {
10610    VIXL_ASSERT(rd.IsS() || rd.IsD());
10611    VIXL_ASSERT(rd.GetType() == rm.GetType());
10612    if (rd.IsS()) {
10613      Vcmpe(cond, F32, rd.S(), rm.S());
10614    } else {
10615      Vcmpe(cond, F64, rd.D(), rm.D());
10616    }
10617  }
10618  void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); }
10619  void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10620    VIXL_ASSERT(rd.IsS() || rd.IsD());
10621    VIXL_ASSERT(rd.GetType() == rn.GetType());
10622    VIXL_ASSERT(rd.GetType() == rm.GetType());
10623    if (rd.IsS()) {
10624      Vdiv(cond, F32, rd.S(), rn.S(), rm.S());
10625    } else {
10626      Vdiv(cond, F64, rd.D(), rn.D(), rm.D());
10627    }
10628  }
10629  void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); }
10630  void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10631    VIXL_ASSERT(rd.IsS() || rd.IsD());
10632    VIXL_ASSERT(rd.GetType() == rn.GetType());
10633    VIXL_ASSERT(rd.GetType() == rm.GetType());
10634    if (rd.IsS()) {
10635      Vfma(cond, F32, rd.S(), rn.S(), rm.S());
10636    } else {
10637      Vfma(cond, F64, rd.D(), rn.D(), rm.D());
10638    }
10639  }
10640  void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); }
10641  void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10642    VIXL_ASSERT(rd.IsS() || rd.IsD());
10643    VIXL_ASSERT(rd.GetType() == rn.GetType());
10644    VIXL_ASSERT(rd.GetType() == rm.GetType());
10645    if (rd.IsS()) {
10646      Vfms(cond, F32, rd.S(), rn.S(), rm.S());
10647    } else {
10648      Vfms(cond, F64, rd.D(), rn.D(), rm.D());
10649    }
10650  }
10651  void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); }
10652  void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10653    VIXL_ASSERT(rd.IsS() || rd.IsD());
10654    VIXL_ASSERT(rd.GetType() == rn.GetType());
10655    VIXL_ASSERT(rd.GetType() == rm.GetType());
10656    if (rd.IsS()) {
10657      Vfnma(cond, F32, rd.S(), rn.S(), rm.S());
10658    } else {
10659      Vfnma(cond, F64, rd.D(), rn.D(), rm.D());
10660    }
10661  }
10662  void Vfnma(VRegister rd, VRegister rn, VRegister rm) {
10663    Vfnma(al, rd, rn, rm);
10664  }
10665  void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10666    VIXL_ASSERT(rd.IsS() || rd.IsD());
10667    VIXL_ASSERT(rd.GetType() == rn.GetType());
10668    VIXL_ASSERT(rd.GetType() == rm.GetType());
10669    if (rd.IsS()) {
10670      Vfnms(cond, F32, rd.S(), rn.S(), rm.S());
10671    } else {
10672      Vfnms(cond, F64, rd.D(), rn.D(), rm.D());
10673    }
10674  }
10675  void Vfnms(VRegister rd, VRegister rn, VRegister rm) {
10676    Vfnms(al, rd, rn, rm);
10677  }
10678  void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) {
10679    VIXL_ASSERT(rd.IsS() || rd.IsD());
10680    VIXL_ASSERT(rd.GetType() == rn.GetType());
10681    VIXL_ASSERT(rd.GetType() == rm.GetType());
10682    if (rd.IsS()) {
10683      Vmaxnm(F32, rd.S(), rn.S(), rm.S());
10684    } else {
10685      Vmaxnm(F64, rd.D(), rn.D(), rm.D());
10686    }
10687  }
10688  void Vminnm(VRegister rd, VRegister rn, VRegister rm) {
10689    VIXL_ASSERT(rd.IsS() || rd.IsD());
10690    VIXL_ASSERT(rd.GetType() == rn.GetType());
10691    VIXL_ASSERT(rd.GetType() == rm.GetType());
10692    if (rd.IsS()) {
10693      Vminnm(F32, rd.S(), rn.S(), rm.S());
10694    } else {
10695      Vminnm(F64, rd.D(), rn.D(), rm.D());
10696    }
10697  }
10698  void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10699    VIXL_ASSERT(rd.IsS() || rd.IsD());
10700    VIXL_ASSERT(rd.GetType() == rn.GetType());
10701    VIXL_ASSERT(rd.GetType() == rm.GetType());
10702    if (rd.IsS()) {
10703      Vmla(cond, F32, rd.S(), rn.S(), rm.S());
10704    } else {
10705      Vmla(cond, F64, rd.D(), rn.D(), rm.D());
10706    }
10707  }
10708  void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); }
10709  void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10710    VIXL_ASSERT(rd.IsS() || rd.IsD());
10711    VIXL_ASSERT(rd.GetType() == rn.GetType());
10712    VIXL_ASSERT(rd.GetType() == rm.GetType());
10713    if (rd.IsS()) {
10714      Vmls(cond, F32, rd.S(), rn.S(), rm.S());
10715    } else {
10716      Vmls(cond, F64, rd.D(), rn.D(), rm.D());
10717    }
10718  }
10719  void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); }
10720  void Vmov(Condition cond, VRegister rd, VRegister rm) {
10721    VIXL_ASSERT(rd.IsS() || rd.IsD());
10722    VIXL_ASSERT(rd.GetType() == rm.GetType());
10723    if (rd.IsS()) {
10724      Vmov(cond, F32, rd.S(), rm.S());
10725    } else {
10726      Vmov(cond, F64, rd.D(), rm.D());
10727    }
10728  }
10729  void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); }
10730  void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10731    VIXL_ASSERT(rd.IsS() || rd.IsD());
10732    VIXL_ASSERT(rd.GetType() == rn.GetType());
10733    VIXL_ASSERT(rd.GetType() == rm.GetType());
10734    if (rd.IsS()) {
10735      Vmul(cond, F32, rd.S(), rn.S(), rm.S());
10736    } else {
10737      Vmul(cond, F64, rd.D(), rn.D(), rm.D());
10738    }
10739  }
10740  void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); }
10741  void Vneg(Condition cond, VRegister rd, VRegister rm) {
10742    VIXL_ASSERT(rd.IsS() || rd.IsD());
10743    VIXL_ASSERT(rd.GetType() == rm.GetType());
10744    if (rd.IsS()) {
10745      Vneg(cond, F32, rd.S(), rm.S());
10746    } else {
10747      Vneg(cond, F64, rd.D(), rm.D());
10748    }
10749  }
10750  void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); }
10751  void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10752    VIXL_ASSERT(rd.IsS() || rd.IsD());
10753    VIXL_ASSERT(rd.GetType() == rn.GetType());
10754    VIXL_ASSERT(rd.GetType() == rm.GetType());
10755    if (rd.IsS()) {
10756      Vnmla(cond, F32, rd.S(), rn.S(), rm.S());
10757    } else {
10758      Vnmla(cond, F64, rd.D(), rn.D(), rm.D());
10759    }
10760  }
10761  void Vnmla(VRegister rd, VRegister rn, VRegister rm) {
10762    Vnmla(al, rd, rn, rm);
10763  }
10764  void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10765    VIXL_ASSERT(rd.IsS() || rd.IsD());
10766    VIXL_ASSERT(rd.GetType() == rn.GetType());
10767    VIXL_ASSERT(rd.GetType() == rm.GetType());
10768    if (rd.IsS()) {
10769      Vnmls(cond, F32, rd.S(), rn.S(), rm.S());
10770    } else {
10771      Vnmls(cond, F64, rd.D(), rn.D(), rm.D());
10772    }
10773  }
10774  void Vnmls(VRegister rd, VRegister rn, VRegister rm) {
10775    Vnmls(al, rd, rn, rm);
10776  }
10777  void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10778    VIXL_ASSERT(rd.IsS() || rd.IsD());
10779    VIXL_ASSERT(rd.GetType() == rn.GetType());
10780    VIXL_ASSERT(rd.GetType() == rm.GetType());
10781    if (rd.IsS()) {
10782      Vnmul(cond, F32, rd.S(), rn.S(), rm.S());
10783    } else {
10784      Vnmul(cond, F64, rd.D(), rn.D(), rm.D());
10785    }
10786  }
10787  void Vnmul(VRegister rd, VRegister rn, VRegister rm) {
10788    Vnmul(al, rd, rn, rm);
10789  }
10790  void Vseleq(VRegister rd, VRegister rn, VRegister rm) {
10791    VIXL_ASSERT(rd.IsS() || rd.IsD());
10792    VIXL_ASSERT(rd.GetType() == rn.GetType());
10793    VIXL_ASSERT(rd.GetType() == rm.GetType());
10794    if (rd.IsS()) {
10795      Vseleq(F32, rd.S(), rn.S(), rm.S());
10796    } else {
10797      Vseleq(F64, rd.D(), rn.D(), rm.D());
10798    }
10799  }
10800  void Vselge(VRegister rd, VRegister rn, VRegister rm) {
10801    VIXL_ASSERT(rd.IsS() || rd.IsD());
10802    VIXL_ASSERT(rd.GetType() == rn.GetType());
10803    VIXL_ASSERT(rd.GetType() == rm.GetType());
10804    if (rd.IsS()) {
10805      Vselge(F32, rd.S(), rn.S(), rm.S());
10806    } else {
10807      Vselge(F64, rd.D(), rn.D(), rm.D());
10808    }
10809  }
10810  void Vselgt(VRegister rd, VRegister rn, VRegister rm) {
10811    VIXL_ASSERT(rd.IsS() || rd.IsD());
10812    VIXL_ASSERT(rd.GetType() == rn.GetType());
10813    VIXL_ASSERT(rd.GetType() == rm.GetType());
10814    if (rd.IsS()) {
10815      Vselgt(F32, rd.S(), rn.S(), rm.S());
10816    } else {
10817      Vselgt(F64, rd.D(), rn.D(), rm.D());
10818    }
10819  }
10820  void Vselvs(VRegister rd, VRegister rn, VRegister rm) {
10821    VIXL_ASSERT(rd.IsS() || rd.IsD());
10822    VIXL_ASSERT(rd.GetType() == rn.GetType());
10823    VIXL_ASSERT(rd.GetType() == rm.GetType());
10824    if (rd.IsS()) {
10825      Vselvs(F32, rd.S(), rn.S(), rm.S());
10826    } else {
10827      Vselvs(F64, rd.D(), rn.D(), rm.D());
10828    }
10829  }
10830  void Vsqrt(Condition cond, VRegister rd, VRegister rm) {
10831    VIXL_ASSERT(rd.IsS() || rd.IsD());
10832    VIXL_ASSERT(rd.GetType() == rm.GetType());
10833    if (rd.IsS()) {
10834      Vsqrt(cond, F32, rd.S(), rm.S());
10835    } else {
10836      Vsqrt(cond, F64, rd.D(), rm.D());
10837    }
10838  }
10839  void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); }
10840  void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10841    VIXL_ASSERT(rd.IsS() || rd.IsD());
10842    VIXL_ASSERT(rd.GetType() == rn.GetType());
10843    VIXL_ASSERT(rd.GetType() == rm.GetType());
10844    if (rd.IsS()) {
10845      Vsub(cond, F32, rd.S(), rn.S(), rm.S());
10846    } else {
10847      Vsub(cond, F64, rd.D(), rn.D(), rm.D());
10848    }
10849  }
10850  void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); }
10851  // End of generated code.
10852
10853  virtual bool AllowUnpredictable() VIXL_OVERRIDE {
10854    VIXL_ABORT_WITH_MSG("Unpredictable instruction.\n");
10855    return false;
10856  }
10857  virtual bool AllowStronglyDiscouraged() VIXL_OVERRIDE {
10858    VIXL_ABORT_WITH_MSG(
10859        "ARM strongly recommends to not use this instruction.\n");
10860    return false;
10861  }
10862
10863 private:
10864  RegisterList available_;
10865  VRegisterList available_vfp_;
10866  MacroAssemblerContext context_;
10867  Label::Offset checkpoint_;
10868  LiteralPoolManager literal_pool_manager_;
10869  VeneerPoolManager veneer_pool_manager_;
10870  bool generate_simulator_code_;
10871  bool allow_macro_instructions_;
10872  bool doing_veneer_pool_generation_;
10873};
10874
10875// This scope utility allows scratch registers to be managed safely. The
10876// MacroAssembler's GetScratchRegisterList() is used as a pool of scratch
10877// registers. These registers can be allocated on demand, and will be returned
10878// at the end of the scope.
10879//
10880// When the scope ends, the MacroAssembler's lists will be restored to their
10881// original state, even if the lists were modified by some other means.
10882class UseScratchRegisterScope {
10883 public:
10884  // This constructor implicitly calls the `Open` function to initialise the
10885  // scope, so it is ready to use immediately after it has been constructed.
10886  explicit UseScratchRegisterScope(MacroAssembler* masm)
10887      : available_(NULL),
10888        available_vfp_(NULL),
10889        old_available_(0),
10890        old_available_vfp_(0) {
10891    Open(masm);
10892  }
10893  // This constructor allows deferred and optional initialisation of the scope.
10894  // The user is required to explicitly call the `Open` function before using
10895  // the scope.
10896  UseScratchRegisterScope()
10897      : available_(NULL),
10898        available_vfp_(NULL),
10899        old_available_(0),
10900        old_available_vfp_(0) {}
10901
10902  // This function performs the actual initialisation work.
10903  void Open(MacroAssembler* masm);
10904
10905  // The destructor always implicitly calls the `Close` function.
10906  ~UseScratchRegisterScope() { Close(); }
10907
10908  // This function performs the cleaning-up work. It must succeed even if the
10909  // scope has not been opened. It is safe to call multiple times.
10910  void Close();
10911
10912  bool IsAvailable(const Register& reg) const;
10913  bool IsAvailable(const VRegister& reg) const;
10914
10915  // Take a register from the temp list. It will be returned automatically when
10916  // the scope ends.
10917  Register Acquire();
10918  VRegister AcquireV(unsigned size_in_bits);
10919  QRegister AcquireQ();
10920  DRegister AcquireD();
10921  SRegister AcquireS();
10922
10923  // Explicitly release an acquired (or excluded) register, putting it back in
10924  // the temp list.
10925  void Release(const Register& reg);
10926  void Release(const VRegister& reg);
10927
10928  // Make the specified registers available as scratch registers for the
10929  // duration of this scope.
10930  void Include(const RegisterList& list);
10931  void Include(const Register& reg1,
10932               const Register& reg2 = NoReg,
10933               const Register& reg3 = NoReg,
10934               const Register& reg4 = NoReg) {
10935    Include(RegisterList(reg1, reg2, reg3, reg4));
10936  }
10937  void Include(const VRegisterList& list);
10938  void Include(const VRegister& reg1,
10939               const VRegister& reg2 = NoVReg,
10940               const VRegister& reg3 = NoVReg,
10941               const VRegister& reg4 = NoVReg) {
10942    Include(VRegisterList(reg1, reg2, reg3, reg4));
10943  }
10944
10945  // Make sure that the specified registers are not available in this scope.
10946  // This can be used to prevent helper functions from using sensitive
10947  // registers, for example.
10948  void Exclude(const RegisterList& list);
10949  void Exclude(const Register& reg1,
10950               const Register& reg2 = NoReg,
10951               const Register& reg3 = NoReg,
10952               const Register& reg4 = NoReg) {
10953    Exclude(RegisterList(reg1, reg2, reg3, reg4));
10954  }
10955  void Exclude(const VRegisterList& list);
10956  void Exclude(const VRegister& reg1,
10957               const VRegister& reg2 = NoVReg,
10958               const VRegister& reg3 = NoVReg,
10959               const VRegister& reg4 = NoVReg) {
10960    Exclude(VRegisterList(reg1, reg2, reg3, reg4));
10961  }
10962
10963  // A convenience helper to exclude any registers used by the operand.
10964  void Exclude(const Operand& operand);
10965
10966  // Prevent any scratch registers from being used in this scope.
10967  void ExcludeAll();
10968
10969 private:
10970  // Available scratch registers.
10971  RegisterList* available_;       // kRRegister
10972  VRegisterList* available_vfp_;  // kVRegister
10973
10974  // The state of the available lists at the start of this scope.
10975  uint32_t old_available_;      // kRRegister
10976  uint64_t old_available_vfp_;  // kVRegister
10977
10978  VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) {
10979    VIXL_UNREACHABLE();
10980  }
10981  VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) {
10982    VIXL_UNREACHABLE();
10983  }
10984};
10985
10986class JumpTableBase {
10987 protected:
10988  JumpTableBase(int len, int offset_size)
10989      : table_location_(Label::kMaxOffset),
10990        branch_location_(Label::kMaxOffset),
10991        length_(len),
10992        offset_shift_(WhichPowerOf2(offset_size)),
10993        presence_(length_) {
10994    VIXL_ASSERT((length_ >= 0) && (offset_size <= 4));
10995  }
10996  virtual ~JumpTableBase() {}
10997
10998 public:
10999  int GetTableSizeInBytes() const { return length_ * (1 << offset_shift_); }
11000  int GetOffsetShift() const { return offset_shift_; }
11001  int GetLength() const { return length_; }
11002  Label* GetDefaultLabel() { return &default_; }
11003  Label* GetEndLabel() { return &end_; }
11004  void SetBranchLocation(uint32_t branch_location) {
11005    branch_location_ = branch_location;
11006  }
11007  uint32_t GetBranchLocation() const { return branch_location_; }
11008  void BindTable(uint32_t location) { table_location_ = location; }
11009  virtual void Link(MacroAssembler* masm,
11010                    int case_index,
11011                    uint32_t location) = 0;
11012
11013  uint32_t GetLocationForCase(int i) {
11014    VIXL_ASSERT((i >= 0) && (i < length_));
11015    return table_location_ + (i * (1 << offset_shift_));
11016  }
11017  void SetPresenceBitForCase(int i) {
11018    VIXL_ASSERT((i >= 0) && (i < length_));
11019    presence_.Set(i);
11020  }
11021
11022  void Finalize(MacroAssembler* masm) {
11023    if (!default_.IsBound()) {
11024      masm->Bind(&default_);
11025    }
11026    masm->Bind(&end_);
11027
11028    presence_.ForEachBitNotSet(LinkIt(this, masm, default_.GetLocation()));
11029  }
11030
11031 private:
11032  uint32_t table_location_;
11033  uint32_t branch_location_;
11034  const int length_;
11035  const int offset_shift_;
11036  BitField presence_;
11037  Label default_;
11038  Label end_;
11039  struct LinkIt {
11040    JumpTableBase* table_;
11041    MacroAssembler* const masm_;
11042    const uint32_t location_;
11043    LinkIt(JumpTableBase* table, MacroAssembler* const masm, uint32_t location)
11044        : table_(table), masm_(masm), location_(location) {}
11045    bool execute(int id) const {
11046      VIXL_ASSERT(id < table_->GetLength());
11047      table_->Link(masm_, static_cast<int>(id), location_);
11048      return true;
11049    }
11050  };
11051};
11052
11053// JumpTable<T>(len): Helper to describe a jump table
11054// len here describes the number of possible case. Values in [0, n[ can have a
11055// jump offset. Any other value will assert.
11056template <typename T>
11057class JumpTable : public JumpTableBase {
11058 protected:
11059  explicit JumpTable(int length) : JumpTableBase(length, sizeof(T)) {}
11060
11061 public:
11062  virtual void Link(MacroAssembler* masm,
11063                    int case_index,
11064                    uint32_t location) VIXL_OVERRIDE {
11065    uint32_t position_in_table = GetLocationForCase(case_index);
11066    uint32_t from = GetBranchLocation();
11067    int offset = location - from;
11068    T* case_offset = masm->GetBuffer()->GetOffsetAddress<T*>(position_in_table);
11069    if (masm->IsUsingT32()) {
11070      *case_offset = offset >> 1;
11071    } else {
11072      *case_offset = offset >> 2;
11073    }
11074  }
11075};
11076
11077class JumpTable8bitOffset : public JumpTable<uint8_t> {
11078 public:
11079  explicit JumpTable8bitOffset(int length) : JumpTable<uint8_t>(length) {}
11080};
11081
11082class JumpTable16bitOffset : public JumpTable<uint16_t> {
11083 public:
11084  explicit JumpTable16bitOffset(int length) : JumpTable<uint16_t>(length) {}
11085};
11086
11087class JumpTable32bitOffset : public JumpTable<uint32_t> {
11088 public:
11089  explicit JumpTable32bitOffset(int length) : JumpTable<uint32_t>(length) {}
11090};
11091
11092}  // namespace aarch32
11093}  // namespace vixl
11094
11095#endif  // VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
11096