macro-assembler-aarch32.h revision 5c01c410ae559d0a77d68a023957c5bc9de143e0
1// Copyright 2015, VIXL authors 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// * Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// * Redistributions in binary form must reproduce the above copyright 10// notice, this list of conditions and the following disclaimer in the 11// documentation and/or other materials provided with the distribution. 12// * Neither the name of ARM Limited nor the names of its contributors may 13// be used to endorse or promote products derived from this software 14// without specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26// POSSIBILITY OF SUCH DAMAGE. 27 28#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_ 29#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_ 30 31#include "code-generation-scopes-vixl.h" 32#include "macro-assembler-interface.h" 33#include "utils-vixl.h" 34 35#include "aarch32/instructions-aarch32.h" 36#include "aarch32/assembler-aarch32.h" 37#include "aarch32/operands-aarch32.h" 38 39namespace vixl { 40namespace aarch32 { 41 42class UseScratchRegisterScope; 43 44enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 }; 45 46// LiteralPool class, defined as a container for literals 47class LiteralPool { 48 public: 49 typedef std::list<RawLiteral*>::iterator RawLiteralListIterator; 50 51 public: 52 LiteralPool() : size_(0) {} 53 ~LiteralPool() { 54 VIXL_ASSERT(literals_.empty() && (size_ == 0)); 55 for (RawLiteralListIterator literal_it = keep_until_delete_.begin(); 56 literal_it != keep_until_delete_.end(); 57 literal_it++) { 58 delete *literal_it; 59 } 60 keep_until_delete_.clear(); 61 } 62 63 unsigned GetSize() const { return size_; } 64 65 // Add a literal to the literal container. 66 void AddLiteral(RawLiteral* literal) { 67 // Manually placed literals can't be added to a literal pool. 68 VIXL_ASSERT(!literal->IsManuallyPlaced()); 69 VIXL_ASSERT(!literal->IsBound()); 70 if (literal->GetPositionInPool() == Label::kMaxOffset) { 71 uint32_t position = GetSize(); 72 literal->SetPositionInPool(position); 73 literals_.push_back(literal); 74 size_ += literal->GetAlignedSize(); 75 } 76 } 77 78 // First literal to be emitted. 79 RawLiteralListIterator GetFirst() { return literals_.begin(); } 80 81 // Mark the end of the literal container. 82 RawLiteralListIterator GetEnd() { return literals_.end(); } 83 84 // Remove all the literals from the container. 85 // If the literal's memory management has been delegated to the container 86 // it will be delete'd. 87 void Clear() { 88 for (RawLiteralListIterator literal_it = GetFirst(); literal_it != GetEnd(); 89 literal_it++) { 90 RawLiteral* literal = *literal_it; 91 switch (literal->GetDeletionPolicy()) { 92 case RawLiteral::kDeletedOnPlacementByPool: 93 delete literal; 94 break; 95 case RawLiteral::kDeletedOnPoolDestruction: 96 keep_until_delete_.push_back(literal); 97 break; 98 case RawLiteral::kManuallyDeleted: 99 break; 100 } 101 } 102 literals_.clear(); 103 size_ = 0; 104 } 105 106 private: 107 // Size (in bytes and including alignments) of the literal pool. 108 unsigned size_; 109 110 // Literal container. 111 std::list<RawLiteral*> literals_; 112 // Already bound Literal container the app requested this pool to keep. 113 std::list<RawLiteral*> keep_until_delete_; 114}; 115 116 117// Macro assembler for aarch32 instruction set. 118class MacroAssembler : public Assembler, public MacroAssemblerInterface { 119 public: 120 enum EmitOption { kBranchRequired, kNoBranchRequired }; 121 122 virtual internal::AssemblerBase* AsAssemblerBase() VIXL_OVERRIDE { 123 return this; 124 } 125 126 virtual void BlockPools() VIXL_OVERRIDE { 127 literal_pool_manager_.Block(); 128 veneer_pool_manager_.Block(); 129 } 130 virtual void ReleasePools() VIXL_OVERRIDE { 131 literal_pool_manager_.Release(); 132 veneer_pool_manager_.Release(); 133 } 134 virtual void EnsureEmitPoolsFor(size_t size) VIXL_OVERRIDE { 135 // TODO: Optimise this. It also checks that there is space in the buffer, 136 // which we do not need to do here. 137 VIXL_ASSERT(IsUint32(size)); 138 EnsureEmitFor(static_cast<uint32_t>(size)); 139 } 140 141 private: 142 class MacroEmissionCheckScope : public EmissionCheckScope { 143 public: 144 explicit MacroEmissionCheckScope(MacroAssemblerInterface* masm) 145 : EmissionCheckScope(masm, kTypicalMacroInstructionMaxSize) {} 146 147 private: 148 static const size_t kTypicalMacroInstructionMaxSize = 149 8 * kMaxInstructionSizeInBytes; 150 }; 151 152 class MacroAssemblerContext { 153 public: 154 MacroAssemblerContext() : count_(0) {} 155 ~MacroAssemblerContext() {} 156 unsigned GetRecursiveCount() const { return count_; } 157 void Up(const char* loc) { 158 location_stack_[count_] = loc; 159 count_++; 160 if (count_ >= kMaxRecursion) { 161 printf( 162 "Recursion limit reached; unable to resolve macro assembler " 163 "call.\n"); 164 printf("Macro assembler context stack:\n"); 165 for (unsigned i = 0; i < kMaxRecursion; i++) { 166 printf("%10s %s\n", (i == 0) ? "oldest -> " : "", location_stack_[i]); 167 } 168 VIXL_ABORT(); 169 } 170 } 171 void Down() { 172 VIXL_ASSERT((count_ > 0) && (count_ < kMaxRecursion)); 173 count_--; 174 } 175 176 private: 177 unsigned count_; 178 static const uint32_t kMaxRecursion = 6; 179 const char* location_stack_[kMaxRecursion]; 180 }; 181 182 // This scope is used at each Delegate entry to avoid infinite recursion of 183 // Delegate calls. The limit is defined by 184 // MacroAssemblerContext::kMaxRecursion. 185 class ContextScope { 186 public: 187 explicit ContextScope(MacroAssembler* const masm, const char* loc) 188 : masm_(masm) { 189 VIXL_ASSERT(masm_->AllowMacroInstructions()); 190 masm_->GetContext()->Up(loc); 191 } 192 ~ContextScope() { masm_->GetContext()->Down(); } 193 194 private: 195 MacroAssembler* const masm_; 196 }; 197 198 MacroAssemblerContext* GetContext() { return &context_; } 199 200 class ITScope { 201 public: 202 ITScope(MacroAssembler* masm, Condition* cond, bool can_use_it = false) 203 : masm_(masm), cond_(*cond), can_use_it_(can_use_it) { 204 if (!cond_.Is(al) && masm->IsUsingT32()) { 205 if (can_use_it_) { 206 // IT is not deprecated (that implies a 16 bit T32 instruction). 207 // We generate an IT instruction and a conditional instruction. 208 masm->it(cond_); 209 } else { 210 // The usage of IT is deprecated for the instruction. 211 // We generate a conditional branch and an unconditional instruction. 212 // TODO: Use a scope utility with a size check. To do that, we'd need 213 // one with Open() and Close() implemented. 214 masm_->EnsureEmitFor(kMaxT32MacroInstructionSizeInBytes); 215 // Generate the branch. 216 masm_->b(cond_.Negate(), Narrow, &label_); 217 // Tell the macro-assembler to generate unconditional instructions. 218 *cond = al; 219 } 220 } 221#ifdef VIXL_DEBUG 222 initial_cursor_offset_ = masm->GetCursorOffset(); 223#else 224 USE(initial_cursor_offset_); 225#endif 226 } 227 ~ITScope() { 228 if (label_.IsReferenced()) { 229 // We only use the label for conditional T32 instructions for which we 230 // cannot use IT. 231 VIXL_ASSERT(!cond_.Is(al)); 232 VIXL_ASSERT(masm_->IsUsingT32()); 233 VIXL_ASSERT(!can_use_it_); 234 VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <= 235 kMaxT32MacroInstructionSizeInBytes); 236 masm_->BindHelper(&label_); 237 } else if (masm_->IsUsingT32() && !cond_.Is(al)) { 238 // If we've generated a conditional T32 instruction but haven't used the 239 // label, we must have used IT. Check that we did not generate a 240 // deprecated sequence. 241 VIXL_ASSERT(can_use_it_); 242 VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <= 243 k16BitT32InstructionSizeInBytes); 244 } 245 } 246 247 private: 248 MacroAssembler* masm_; 249 Condition cond_; 250 Label label_; 251 bool can_use_it_; 252 uint32_t initial_cursor_offset_; 253 }; 254 255 template <Assembler::InstructionCondDtDL asmfn> 256 class EmitLiteralCondDtDL { 257 public: 258 EmitLiteralCondDtDL(DataType dt, DRegister rt) : dt_(dt), rt_(rt) {} 259 void emit(MacroAssembler* const masm, 260 Condition cond, 261 RawLiteral* const literal) { 262 (masm->*asmfn)(cond, dt_, rt_, literal); 263 } 264 265 private: 266 DataType dt_; 267 DRegister rt_; 268 }; 269 270 template <Assembler::InstructionCondDtSL asmfn> 271 class EmitLiteralCondDtSL { 272 public: 273 EmitLiteralCondDtSL(DataType dt, SRegister rt) : dt_(dt), rt_(rt) {} 274 void emit(MacroAssembler* const masm, 275 Condition cond, 276 RawLiteral* const literal) { 277 (masm->*asmfn)(cond, dt_, rt_, literal); 278 } 279 280 private: 281 DataType dt_; 282 SRegister rt_; 283 }; 284 285 template <Assembler::InstructionCondRL asmfn> 286 class EmitLiteralCondRL { 287 public: 288 explicit EmitLiteralCondRL(Register rt) : rt_(rt) {} 289 void emit(MacroAssembler* const masm, 290 Condition cond, 291 RawLiteral* const literal) { 292 (masm->*asmfn)(cond, rt_, literal); 293 } 294 295 private: 296 Register rt_; 297 }; 298 299 template <Assembler::InstructionCondRRL asmfn> 300 class EmitLiteralCondRRL { 301 public: 302 EmitLiteralCondRRL(Register rt, Register rt2) : rt_(rt), rt2_(rt2) {} 303 void emit(MacroAssembler* const masm, 304 Condition cond, 305 RawLiteral* const literal) { 306 (masm->*asmfn)(cond, rt_, rt2_, literal); 307 } 308 309 private: 310 Register rt_, rt2_; 311 }; 312 313 class LiteralPoolManager { 314 public: 315 explicit LiteralPoolManager(MacroAssembler* const masm) 316 : masm_(masm), monitor_(0) { 317 ResetCheckpoint(); 318 } 319 320 void ResetCheckpoint() { checkpoint_ = Label::kMaxOffset; } 321 322 LiteralPool* GetLiteralPool() { return &literal_pool_; } 323 Label::Offset GetCheckpoint() const { 324 // Make room for a branch over the pools. 325 return checkpoint_ - kMaxInstructionSizeInBytes; 326 } 327 size_t GetLiteralPoolSize() const { return literal_pool_.GetSize(); } 328 329 // Checks if the insertion of the literal will put the forward reference 330 // too far in the literal pool. 331 // This function is called after generating an instruction with a literal. 332 // We want to know if the literal can be reached by the instruction. 333 // If not, we will unwind the instruction, generate the pool (without the 334 // last literal) and generate the instruction again. 335 // "literal" is the literal we want to insert into the pool. 336 // "from" is the location where the instruction which uses the literal has 337 // been generated. 338 bool WasInsertedTooFar(RawLiteral* literal) const { 339 // Last accessible location for the instruction we just generated, which 340 // uses the literal. 341 Label::ForwardReference& reference = literal->GetBackForwardRef(); 342 Label::Offset new_checkpoint = AlignDown(reference.GetCheckpoint(), 4); 343 344 // TODO: We should not need to get the min of new_checkpoint and the 345 // existing checkpoint. The existing checkpoint should already have 346 // been checked when reserving space for this load literal instruction. 347 // The assertion below asserts that we don't need the min operation here. 348 Label::Offset checkpoint = 349 std::min(new_checkpoint, literal->GetAlignedCheckpoint(4)); 350 bool literal_in_pool = 351 (literal->GetPositionInPool() != Label::kMaxOffset); 352 Label::Offset position_in_pool = literal_in_pool 353 ? literal->GetPositionInPool() 354 : literal_pool_.GetSize(); 355 // Compare the checkpoint to the location where the literal should be 356 // added. 357 // We add space for two instructions: one branch and one potential veneer 358 // which may be added after the check. In this particular use case, no 359 // veneer can be added but, this way, we are consistent with all the 360 // literal pool checks. 361 int32_t from = 362 reference.GetLocation() + masm_->GetArchitectureStatePCOffset(); 363 bool too_far = 364 checkpoint < from + position_in_pool + 365 2 * static_cast<int32_t>(kMaxInstructionSizeInBytes); 366 // Assert if the literal is already in the pool and the existing 367 // checkpoint triggers a rewind here, as this means the pool should 368 // already have been emitted (perhaps we have not reserved enough space 369 // for the instruction we are about to rewind). 370 VIXL_ASSERT(!(too_far && (literal->GetCheckpoint() < new_checkpoint))); 371 return too_far; 372 } 373 374 // Set the different checkpoints where the literal pool has to be emited. 375 void UpdateCheckpoint(RawLiteral* literal) { 376 // The literal should have been placed somewhere in the literal pool 377 VIXL_ASSERT(literal->GetPositionInPool() != Label::kMaxOffset); 378 // TODO(all): Consider AddForwardRef as a virtual so the checkpoint is 379 // updated when inserted. Or move checkpoint_ into Label, 380 literal->UpdateCheckpoint(); 381 Label::Offset tmp = 382 literal->GetAlignedCheckpoint(4) - literal->GetPositionInPool(); 383 if (checkpoint_ > tmp) { 384 checkpoint_ = tmp; 385 masm_->ComputeCheckpoint(); 386 } 387 } 388 389 bool IsEmpty() const { return GetLiteralPoolSize() == 0; } 390 391 void Block() { monitor_++; } 392 void Release() { 393 VIXL_ASSERT(IsBlocked()); 394 if (--monitor_ == 0) { 395 // Ensure the pool has not been blocked for too long. 396 VIXL_ASSERT(masm_->GetCursorOffset() <= checkpoint_); 397 } 398 } 399 bool IsBlocked() const { return monitor_ != 0; } 400 401 private: 402 MacroAssembler* const masm_; 403 LiteralPool literal_pool_; 404 405 // Max offset in the code buffer where the literal needs to be 406 // emitted. A default value of Label::kMaxOffset means that the checkpoint 407 // is invalid. 408 Label::Offset checkpoint_; 409 // Indicates whether the emission of this pool is blocked. 410 int monitor_; 411 }; 412 413 void PerformEnsureEmit(Label::Offset target, uint32_t extra_size); 414 415 protected: 416 void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm); 417 void PadToMinimumBranchRange(Label* label); 418 419 // Generate the instruction and if it's not possible revert the whole thing. 420 // emit the literal pool and regenerate the instruction. 421 // Note: The instruction is generated via 422 // void T::emit(MacroAssembler* const, RawLiteral* const) 423 template <typename T> 424 void GenerateInstruction(Condition cond, 425 T instr_callback, 426 RawLiteral* const literal) { 427 int32_t cursor = GetCursorOffset(); 428 // Emit the instruction, via the assembler 429 { 430 MacroEmissionCheckScope guard(this); 431 // The ITScope can change the condition and we want to be able to revert 432 // this. 433 Condition c(cond); 434 ITScope it_scope(this, &c); 435 instr_callback.emit(this, c, literal); 436 } 437 if (!literal->IsManuallyPlaced() && !literal->IsBound() && 438 !literal_pool_manager_.IsBlocked()) { 439 if (WasInsertedTooFar(literal)) { 440 // The instruction's data is too far: revert the emission 441 GetBuffer()->Rewind(cursor); 442 literal->InvalidateLastForwardReference(RawLiteral::kNoUpdateNecessary); 443 EmitLiteralPool(kBranchRequired); 444 MacroEmissionCheckScope guard(this); 445 ITScope it_scope(this, &cond); 446 instr_callback.emit(this, cond, literal); 447 } 448 // The literal pool above might have included the literal - in which 449 // case it will now be bound. 450 if (!literal->IsBound()) { 451 literal_pool_manager_.GetLiteralPool()->AddLiteral(literal); 452 literal_pool_manager_.UpdateCheckpoint(literal); 453 } 454 } 455 } 456 457 public: 458 explicit MacroAssembler(InstructionSet isa = kDefaultISA) 459 : Assembler(isa), 460 available_(r12), 461 current_scratch_scope_(NULL), 462 checkpoint_(Label::kMaxOffset), 463 literal_pool_manager_(this), 464 veneer_pool_manager_(this), 465 generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) { 466#ifdef VIXL_DEBUG 467 SetAllowMacroInstructions(true); 468#else 469 USE(literal_pool_manager_); 470 USE(allow_macro_instructions_); 471#endif 472 ComputeCheckpoint(); 473 } 474 explicit MacroAssembler(size_t size, InstructionSet isa = kDefaultISA) 475 : Assembler(size, isa), 476 available_(r12), 477 current_scratch_scope_(NULL), 478 checkpoint_(Label::kMaxOffset), 479 literal_pool_manager_(this), 480 veneer_pool_manager_(this), 481 generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) { 482#ifdef VIXL_DEBUG 483 SetAllowMacroInstructions(true); 484#endif 485 ComputeCheckpoint(); 486 } 487 MacroAssembler(byte* buffer, size_t size, InstructionSet isa = kDefaultISA) 488 : Assembler(buffer, size, isa), 489 available_(r12), 490 current_scratch_scope_(NULL), 491 checkpoint_(Label::kMaxOffset), 492 literal_pool_manager_(this), 493 veneer_pool_manager_(this), 494 generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) { 495#ifdef VIXL_DEBUG 496 SetAllowMacroInstructions(true); 497#endif 498 ComputeCheckpoint(); 499 } 500 501 bool GenerateSimulatorCode() const { return generate_simulator_code_; } 502 503 // Tell whether any of the macro instruction can be used. When false the 504 // MacroAssembler will assert if a method which can emit a variable number 505 // of instructions is called. 506 virtual void SetAllowMacroInstructions(bool value) VIXL_OVERRIDE { 507 allow_macro_instructions_ = value; 508 } 509 virtual bool AllowMacroInstructions() const VIXL_OVERRIDE { 510 return allow_macro_instructions_; 511 } 512 513 void FinalizeCode() { 514 EmitLiteralPool(kNoBranchRequired); 515 Assembler::FinalizeCode(); 516 } 517 518 RegisterList* GetScratchRegisterList() { return &available_; } 519 VRegisterList* GetScratchVRegisterList() { return &available_vfp_; } 520 521 // Get or set the current (most-deeply-nested) UseScratchRegisterScope. 522 void SetCurrentScratchRegisterScope(UseScratchRegisterScope* scope) { 523 current_scratch_scope_ = scope; 524 } 525 UseScratchRegisterScope* GetCurrentScratchRegisterScope() { 526 return current_scratch_scope_; 527 } 528 529 // Given an address calculation (Register + immediate), generate code to 530 // partially compute the address. The returned MemOperand will perform any 531 // remaining computation in a subsequent load or store instruction. 532 // 533 // The offset provided should be the offset that would be used in a load or 534 // store instruction (if it had sufficient range). This only matters where 535 // base.Is(pc), since load and store instructions align the pc before 536 // dereferencing it. 537 // 538 // TODO: Improve the handling of negative offsets. They are not implemented 539 // precisely for now because they only have a marginal benefit for the 540 // existing uses (in delegates). 541 MemOperand MemOperandComputationHelper(Condition cond, 542 Register scratch, 543 Register base, 544 uint32_t offset, 545 uint32_t extra_offset_mask = 0); 546 547 MemOperand MemOperandComputationHelper(Register scratch, 548 Register base, 549 uint32_t offset, 550 uint32_t extra_offset_mask = 0) { 551 return MemOperandComputationHelper(al, 552 scratch, 553 base, 554 offset, 555 extra_offset_mask); 556 } 557 MemOperand MemOperandComputationHelper(Condition cond, 558 Register scratch, 559 Label* label, 560 uint32_t extra_offset_mask = 0) { 561 // Check for buffer space _before_ calculating the offset, in case we 562 // generate a pool that affects the offset calculation. 563 CodeBufferCheckScope scope(this, 4 * kMaxInstructionSizeInBytes); 564 Label::Offset offset = 565 label->GetLocation() - 566 AlignDown(GetCursorOffset() + GetArchitectureStatePCOffset(), 4); 567 return MemOperandComputationHelper(cond, 568 scratch, 569 pc, 570 offset, 571 extra_offset_mask); 572 } 573 MemOperand MemOperandComputationHelper(Register scratch, 574 Label* label, 575 uint32_t extra_offset_mask = 0) { 576 return MemOperandComputationHelper(al, scratch, label, extra_offset_mask); 577 } 578 579 // Determine the appropriate mask to pass into MemOperandComputationHelper. 580 uint32_t GetOffsetMask(InstructionType type, AddrMode addrmode); 581 582 // State and type helpers. 583 bool IsModifiedImmediate(uint32_t imm) { 584 return IsUsingT32() ? ImmediateT32::IsImmediateT32(imm) 585 : ImmediateA32::IsImmediateA32(imm); 586 } 587 588 void Bind(Label* label) { 589 VIXL_ASSERT(allow_macro_instructions_); 590 PadToMinimumBranchRange(label); 591 BindHelper(label); 592 } 593 594 void AddBranchLabel(Label* label) { 595 if (label->IsBound()) return; 596 veneer_pool_manager_.AddLabel(label); 597 } 598 599 void Place(RawLiteral* literal) { 600 VIXL_ASSERT(allow_macro_instructions_); 601 VIXL_ASSERT(literal->IsManuallyPlaced()); 602 // We have two calls to `GetBuffer()->Align()` below, that aligns on word 603 // (4 bytes) boundaries. Only one is taken into account in 604 // `GetAlignedSize()`. 605 static const size_t kMaxAlignSize = 3; 606 size_t size = literal->GetAlignedSize() + kMaxAlignSize; 607 VIXL_ASSERT(IsUint32(size)); 608 // TODO: We should use a scope here to check the size of data emitted. We 609 // currently cannot because `aarch32::CodeBufferCheckScope` currently checks 610 // for pools, so that could lead to an infinite loop. 611 EnsureEmitFor(static_cast<uint32_t>(size)); 612 // Literals must be emitted aligned on word (4 bytes) boundaries. 613 GetBuffer()->Align(); 614 PlaceHelper(literal); 615 GetBuffer()->Align(); 616 } 617 618 void ComputeCheckpoint(); 619 620 int32_t GetMarginBeforeVeneerEmission() const { 621 return veneer_pool_manager_.GetCheckpoint() - GetCursorOffset(); 622 } 623 624 Label::Offset GetTargetForLiteralEmission() const { 625 if (literal_pool_manager_.IsEmpty()) return Label::kMaxOffset; 626 // We add an instruction to the size as the instruction which calls this 627 // function may add a veneer and, without this extra instruction, could put 628 // the literals out of range. For example, it's the case for a "B" 629 // instruction. At the beginning of the instruction we call EnsureEmitFor 630 // which calls this function. However, the target of the branch hasn't been 631 // inserted yet in the veneer pool. 632 size_t veneer_max_size = 633 veneer_pool_manager_.GetMaxSize() + kMaxInstructionSizeInBytes; 634 VIXL_ASSERT(IsInt32(veneer_max_size)); 635 // We must be able to generate the veneer pool first. 636 Label::Offset tmp = literal_pool_manager_.GetCheckpoint() - 637 static_cast<Label::Offset>(veneer_max_size); 638 VIXL_ASSERT(tmp >= 0); 639 return tmp; 640 } 641 642 int32_t GetMarginBeforeLiteralEmission() const { 643 Label::Offset tmp = GetTargetForLiteralEmission(); 644 VIXL_ASSERT(tmp >= GetCursorOffset()); 645 return tmp - GetCursorOffset(); 646 } 647 648 bool VeneerPoolIsEmpty() const { return veneer_pool_manager_.IsEmpty(); } 649 bool LiteralPoolIsEmpty() const { return literal_pool_manager_.IsEmpty(); } 650 651 void EnsureEmitFor(uint32_t size) { 652 Label::Offset target = GetCursorOffset() + size; 653 if (target <= checkpoint_) return; 654 PerformEnsureEmit(target, size); 655 } 656 657 bool WasInsertedTooFar(RawLiteral* literal) { 658 return literal_pool_manager_.WasInsertedTooFar(literal); 659 } 660 661 bool AliasesAvailableScratchRegister(Register reg) { 662 return GetScratchRegisterList()->Includes(reg); 663 } 664 665 bool AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg) { 666 if (reg.IsAPSR_nzcv()) return false; 667 return GetScratchRegisterList()->Includes(reg.AsRegister()); 668 } 669 670 bool AliasesAvailableScratchRegister(VRegister reg) { 671 return GetScratchVRegisterList()->IncludesAliasOf(reg); 672 } 673 674 bool AliasesAvailableScratchRegister(const Operand& operand) { 675 if (operand.IsImmediate()) return false; 676 return AliasesAvailableScratchRegister(operand.GetBaseRegister()) || 677 (operand.IsRegisterShiftedRegister() && 678 AliasesAvailableScratchRegister(operand.GetShiftRegister())); 679 } 680 681 bool AliasesAvailableScratchRegister(const NeonOperand& operand) { 682 if (operand.IsImmediate()) return false; 683 return AliasesAvailableScratchRegister(operand.GetRegister()); 684 } 685 686 bool AliasesAvailableScratchRegister(SRegisterList list) { 687 for (int n = 0; n < list.GetLength(); n++) { 688 if (AliasesAvailableScratchRegister(list.GetSRegister(n))) return true; 689 } 690 return false; 691 } 692 693 bool AliasesAvailableScratchRegister(DRegisterList list) { 694 for (int n = 0; n < list.GetLength(); n++) { 695 if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true; 696 } 697 return false; 698 } 699 700 bool AliasesAvailableScratchRegister(NeonRegisterList list) { 701 for (int n = 0; n < list.GetLength(); n++) { 702 if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true; 703 } 704 return false; 705 } 706 707 bool AliasesAvailableScratchRegister(RegisterList list) { 708 return GetScratchRegisterList()->Overlaps(list); 709 } 710 711 bool AliasesAvailableScratchRegister(const MemOperand& operand) { 712 return AliasesAvailableScratchRegister(operand.GetBaseRegister()) || 713 (operand.IsShiftedRegister() && 714 AliasesAvailableScratchRegister(operand.GetOffsetRegister())); 715 } 716 717 // Emit the literal pool in the code buffer. 718 // Every literal is placed on a 32bit boundary 719 // All the literals in the pool will be removed from the pool and potentially 720 // delete'd. 721 void EmitLiteralPool(LiteralPool* const literal_pool, EmitOption option); 722 void EmitLiteralPool(EmitOption option = kBranchRequired) { 723 VIXL_ASSERT(!literal_pool_manager_.IsBlocked()); 724 EmitLiteralPool(literal_pool_manager_.GetLiteralPool(), option); 725 literal_pool_manager_.ResetCheckpoint(); 726 ComputeCheckpoint(); 727 } 728 729 size_t GetLiteralPoolSize() const { 730 return literal_pool_manager_.GetLiteralPoolSize(); 731 } 732 733 // Adr with a literal already constructed. Add the literal to the pool if it 734 // is not already done. 735 void Adr(Condition cond, Register rd, RawLiteral* literal) { 736 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 737 VIXL_ASSERT(allow_macro_instructions_); 738 VIXL_ASSERT(OutsideITBlock()); 739 EmitLiteralCondRL<&Assembler::adr> emit_helper(rd); 740 GenerateInstruction(cond, emit_helper, literal); 741 } 742 void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); } 743 744 // Loads with literals already constructed. Add the literal to the pool 745 // if it is not already done. 746 void Ldr(Condition cond, Register rt, RawLiteral* literal) { 747 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 748 VIXL_ASSERT(allow_macro_instructions_); 749 VIXL_ASSERT(OutsideITBlock()); 750 EmitLiteralCondRL<&Assembler::ldr> emit_helper(rt); 751 GenerateInstruction(cond, emit_helper, literal); 752 } 753 void Ldr(Register rt, RawLiteral* literal) { Ldr(al, rt, literal); } 754 755 void Ldrb(Condition cond, Register rt, RawLiteral* literal) { 756 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 757 VIXL_ASSERT(allow_macro_instructions_); 758 VIXL_ASSERT(OutsideITBlock()); 759 EmitLiteralCondRL<&Assembler::ldrb> emit_helper(rt); 760 GenerateInstruction(cond, emit_helper, literal); 761 } 762 void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); } 763 764 void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) { 765 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 766 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 767 VIXL_ASSERT(allow_macro_instructions_); 768 VIXL_ASSERT(OutsideITBlock()); 769 EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(rt, rt2); 770 GenerateInstruction(cond, emit_helper, literal); 771 } 772 void Ldrd(Register rt, Register rt2, RawLiteral* literal) { 773 Ldrd(al, rt, rt2, literal); 774 } 775 776 void Ldrh(Condition cond, Register rt, RawLiteral* literal) { 777 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 778 VIXL_ASSERT(allow_macro_instructions_); 779 VIXL_ASSERT(OutsideITBlock()); 780 EmitLiteralCondRL<&Assembler::ldrh> emit_helper(rt); 781 GenerateInstruction(cond, emit_helper, literal); 782 } 783 void Ldrh(Register rt, RawLiteral* literal) { Ldrh(al, rt, literal); } 784 785 void Ldrsb(Condition cond, Register rt, RawLiteral* literal) { 786 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 787 VIXL_ASSERT(allow_macro_instructions_); 788 VIXL_ASSERT(OutsideITBlock()); 789 EmitLiteralCondRL<&Assembler::ldrsb> emit_helper(rt); 790 GenerateInstruction(cond, emit_helper, literal); 791 } 792 void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); } 793 794 void Ldrsh(Condition cond, Register rt, RawLiteral* literal) { 795 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 796 VIXL_ASSERT(allow_macro_instructions_); 797 VIXL_ASSERT(OutsideITBlock()); 798 EmitLiteralCondRL<&Assembler::ldrsh> emit_helper(rt); 799 GenerateInstruction(cond, emit_helper, literal); 800 } 801 void Ldrsh(Register rt, RawLiteral* literal) { Ldrsh(al, rt, literal); } 802 803 void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) { 804 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 805 VIXL_ASSERT(allow_macro_instructions_); 806 VIXL_ASSERT(OutsideITBlock()); 807 EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(dt, rd); 808 GenerateInstruction(cond, emit_helper, literal); 809 } 810 void Vldr(DataType dt, DRegister rd, RawLiteral* literal) { 811 Vldr(al, dt, rd, literal); 812 } 813 void Vldr(Condition cond, DRegister rd, RawLiteral* literal) { 814 Vldr(cond, Untyped64, rd, literal); 815 } 816 void Vldr(DRegister rd, RawLiteral* literal) { 817 Vldr(al, Untyped64, rd, literal); 818 } 819 820 void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) { 821 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 822 VIXL_ASSERT(allow_macro_instructions_); 823 VIXL_ASSERT(OutsideITBlock()); 824 EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(dt, rd); 825 GenerateInstruction(cond, emit_helper, literal); 826 } 827 void Vldr(DataType dt, SRegister rd, RawLiteral* literal) { 828 Vldr(al, dt, rd, literal); 829 } 830 void Vldr(Condition cond, SRegister rd, RawLiteral* literal) { 831 Vldr(cond, Untyped32, rd, literal); 832 } 833 void Vldr(SRegister rd, RawLiteral* literal) { 834 Vldr(al, Untyped32, rd, literal); 835 } 836 837 // Generic Ldr(register, data) 838 void Ldr(Condition cond, Register rt, uint32_t v) { 839 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 840 VIXL_ASSERT(allow_macro_instructions_); 841 VIXL_ASSERT(OutsideITBlock()); 842 RawLiteral* literal = 843 new Literal<uint32_t>(v, RawLiteral::kDeletedOnPlacementByPool); 844 EmitLiteralCondRL<&Assembler::ldr> emit_helper(rt); 845 GenerateInstruction(cond, emit_helper, literal); 846 } 847 template <typename T> 848 void Ldr(Register rt, T v) { 849 Ldr(al, rt, v); 850 } 851 852 // Generic Ldrd(rt, rt2, data) 853 void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) { 854 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 856 VIXL_ASSERT(allow_macro_instructions_); 857 VIXL_ASSERT(OutsideITBlock()); 858 RawLiteral* literal = 859 new Literal<uint64_t>(v, RawLiteral::kDeletedOnPlacementByPool); 860 EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(rt, rt2); 861 GenerateInstruction(cond, emit_helper, literal); 862 } 863 template <typename T> 864 void Ldrd(Register rt, Register rt2, T v) { 865 Ldrd(al, rt, rt2, v); 866 } 867 868 void Vldr(Condition cond, SRegister rd, float v) { 869 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 870 VIXL_ASSERT(allow_macro_instructions_); 871 VIXL_ASSERT(OutsideITBlock()); 872 RawLiteral* literal = 873 new Literal<float>(v, RawLiteral::kDeletedOnPlacementByPool); 874 EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(Untyped32, rd); 875 GenerateInstruction(cond, emit_helper, literal); 876 } 877 void Vldr(SRegister rd, float v) { Vldr(al, rd, v); } 878 879 void Vldr(Condition cond, DRegister rd, double v) { 880 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 881 VIXL_ASSERT(allow_macro_instructions_); 882 VIXL_ASSERT(OutsideITBlock()); 883 RawLiteral* literal = 884 new Literal<double>(v, RawLiteral::kDeletedOnPlacementByPool); 885 EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(Untyped64, rd); 886 GenerateInstruction(cond, emit_helper, literal); 887 } 888 void Vldr(DRegister rd, double v) { Vldr(al, rd, v); } 889 890 void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); } 891 void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); } 892 void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); } 893 void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); } 894 895 // Claim memory on the stack. 896 // Note that the Claim, Drop, and Peek helpers below ensure that offsets used 897 // are multiples of 32 bits to help maintain 32-bit SP alignment. 898 // We could `Align{Up,Down}(size, 4)`, but that's potentially problematic: 899 // Claim(3) 900 // Claim(1) 901 // Drop(4) 902 // would seem correct, when in fact: 903 // Claim(3) -> sp = sp - 4 904 // Claim(1) -> sp = sp - 4 905 // Drop(4) -> sp = sp + 4 906 // 907 void Claim(int32_t size) { 908 if (size == 0) return; 909 // The stack must be kept 32bit aligned. 910 VIXL_ASSERT((size > 0) && ((size % 4) == 0)); 911 Sub(sp, sp, size); 912 } 913 // Release memory on the stack 914 void Drop(int32_t size) { 915 if (size == 0) return; 916 // The stack must be kept 32bit aligned. 917 VIXL_ASSERT((size > 0) && ((size % 4) == 0)); 918 Add(sp, sp, size); 919 } 920 void Peek(Register dst, int32_t offset) { 921 VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0)); 922 Ldr(dst, MemOperand(sp, offset)); 923 } 924 void Poke(Register src, int32_t offset) { 925 VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0)); 926 Str(src, MemOperand(sp, offset)); 927 } 928 void Printf(const char* format, 929 CPURegister reg1 = NoReg, 930 CPURegister reg2 = NoReg, 931 CPURegister reg3 = NoReg, 932 CPURegister reg4 = NoReg); 933 // Functions used by Printf for generation. 934 void PushRegister(CPURegister reg); 935 void PreparePrintfArgument(CPURegister reg, 936 int* core_count, 937 int* vfp_count, 938 uint32_t* printf_type); 939 // Handlers for cases not handled by the assembler. 940 // ADD, MOVT, MOVW, SUB, SXTB16, TEQ, UXTB16 941 virtual void Delegate(InstructionType type, 942 InstructionCondROp instruction, 943 Condition cond, 944 Register rn, 945 const Operand& operand) VIXL_OVERRIDE; 946 // CMN, CMP, MOV, MOVS, MVN, MVNS, SXTB, SXTH, TST, UXTB, UXTH 947 virtual void Delegate(InstructionType type, 948 InstructionCondSizeROp instruction, 949 Condition cond, 950 EncodingSize size, 951 Register rn, 952 const Operand& operand) VIXL_OVERRIDE; 953 // ADDW, ORN, ORNS, PKHBT, PKHTB, RSC, RSCS, SUBW, SXTAB, SXTAB16, SXTAH, 954 // UXTAB, UXTAB16, UXTAH 955 virtual void Delegate(InstructionType type, 956 InstructionCondRROp instruction, 957 Condition cond, 958 Register rd, 959 Register rn, 960 const Operand& operand) VIXL_OVERRIDE; 961 // ADC, ADCS, ADD, ADDS, AND, ANDS, ASR, ASRS, BIC, BICS, EOR, EORS, LSL, 962 // LSLS, LSR, LSRS, ORR, ORRS, ROR, RORS, RSB, RSBS, SBC, SBCS, SUB, SUBS 963 virtual void Delegate(InstructionType type, 964 InstructionCondSizeRL instruction, 965 Condition cond, 966 EncodingSize size, 967 Register rd, 968 Label* label) VIXL_OVERRIDE; 969 bool GenerateSplitInstruction(InstructionCondSizeRROp instruction, 970 Condition cond, 971 Register rd, 972 Register rn, 973 uint32_t imm, 974 uint32_t mask); 975 virtual void Delegate(InstructionType type, 976 InstructionCondSizeRROp instruction, 977 Condition cond, 978 EncodingSize size, 979 Register rd, 980 Register rn, 981 const Operand& operand) VIXL_OVERRIDE; 982 // CBNZ, CBZ 983 virtual void Delegate(InstructionType type, 984 InstructionRL instruction, 985 Register rn, 986 Label* label) VIXL_OVERRIDE; 987 // VMOV 988 virtual void Delegate(InstructionType type, 989 InstructionCondDtSSop instruction, 990 Condition cond, 991 DataType dt, 992 SRegister rd, 993 const SOperand& operand) VIXL_OVERRIDE; 994 // VMOV, VMVN 995 virtual void Delegate(InstructionType type, 996 InstructionCondDtDDop instruction, 997 Condition cond, 998 DataType dt, 999 DRegister rd, 1000 const DOperand& operand) VIXL_OVERRIDE; 1001 // VMOV, VMVN 1002 virtual void Delegate(InstructionType type, 1003 InstructionCondDtQQop instruction, 1004 Condition cond, 1005 DataType dt, 1006 QRegister rd, 1007 const QOperand& operand) VIXL_OVERRIDE; 1008 // LDR, LDRB, LDRH, LDRSB, LDRSH, STR, STRB, STRH 1009 virtual void Delegate(InstructionType type, 1010 InstructionCondSizeRMop instruction, 1011 Condition cond, 1012 EncodingSize size, 1013 Register rd, 1014 const MemOperand& operand) VIXL_OVERRIDE; 1015 // LDAEXD, LDRD, LDREXD, STLEX, STLEXB, STLEXH, STRD, STREX, STREXB, STREXH 1016 virtual void Delegate(InstructionType type, 1017 InstructionCondRL instruction, 1018 Condition cond, 1019 Register rt, 1020 Label* label) VIXL_OVERRIDE; 1021 virtual void Delegate(InstructionType type, 1022 InstructionCondRRL instruction, 1023 Condition cond, 1024 Register rt, 1025 Register rt2, 1026 Label* label) VIXL_OVERRIDE; 1027 virtual void Delegate(InstructionType type, 1028 InstructionCondRRMop instruction, 1029 Condition cond, 1030 Register rt, 1031 Register rt2, 1032 const MemOperand& operand) VIXL_OVERRIDE; 1033 // VLDR, VSTR 1034 virtual void Delegate(InstructionType type, 1035 InstructionCondDtSMop instruction, 1036 Condition cond, 1037 DataType dt, 1038 SRegister rd, 1039 const MemOperand& operand) VIXL_OVERRIDE; 1040 // VLDR, VSTR 1041 virtual void Delegate(InstructionType type, 1042 InstructionCondDtDMop instruction, 1043 Condition cond, 1044 DataType dt, 1045 DRegister rd, 1046 const MemOperand& operand) VIXL_OVERRIDE; 1047 // MSR 1048 virtual void Delegate(InstructionType type, 1049 InstructionCondMsrOp instruction, 1050 Condition cond, 1051 MaskedSpecialRegister spec_reg, 1052 const Operand& operand) VIXL_OVERRIDE; 1053 virtual void Delegate(InstructionType type, 1054 InstructionCondDtDL instruction, 1055 Condition cond, 1056 DataType dt, 1057 DRegister rd, 1058 Label* label) VIXL_OVERRIDE; 1059 virtual void Delegate(InstructionType type, 1060 InstructionCondDtSL instruction, 1061 Condition cond, 1062 DataType dt, 1063 SRegister rd, 1064 Label* label) VIXL_OVERRIDE; 1065 1066 // Start of generated code. 1067 1068 void Adc(Condition cond, Register rd, Register rn, const Operand& operand) { 1069 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1070 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1071 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1072 VIXL_ASSERT(allow_macro_instructions_); 1073 VIXL_ASSERT(OutsideITBlock()); 1074 MacroEmissionCheckScope guard(this); 1075 bool can_use_it = 1076 // ADC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 1077 operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) && 1078 operand.GetBaseRegister().IsLow(); 1079 ITScope it_scope(this, &cond, can_use_it); 1080 adc(cond, rd, rn, operand); 1081 } 1082 void Adc(Register rd, Register rn, const Operand& operand) { 1083 Adc(al, rd, rn, operand); 1084 } 1085 void Adc(FlagsUpdate flags, 1086 Condition cond, 1087 Register rd, 1088 Register rn, 1089 const Operand& operand) { 1090 switch (flags) { 1091 case LeaveFlags: 1092 Adc(cond, rd, rn, operand); 1093 break; 1094 case SetFlags: 1095 Adcs(cond, rd, rn, operand); 1096 break; 1097 case DontCare: 1098 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1099 rn.Is(rd) && operand.IsPlainRegister() && 1100 operand.GetBaseRegister().IsLow(); 1101 if (setflags_is_smaller) { 1102 Adcs(cond, rd, rn, operand); 1103 } else { 1104 Adc(cond, rd, rn, operand); 1105 } 1106 break; 1107 } 1108 } 1109 void Adc(FlagsUpdate flags, 1110 Register rd, 1111 Register rn, 1112 const Operand& operand) { 1113 Adc(flags, al, rd, rn, operand); 1114 } 1115 1116 void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) { 1117 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1118 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1119 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1120 VIXL_ASSERT(allow_macro_instructions_); 1121 VIXL_ASSERT(OutsideITBlock()); 1122 MacroEmissionCheckScope guard(this); 1123 ITScope it_scope(this, &cond); 1124 adcs(cond, rd, rn, operand); 1125 } 1126 void Adcs(Register rd, Register rn, const Operand& operand) { 1127 Adcs(al, rd, rn, operand); 1128 } 1129 1130 void Add(Condition cond, Register rd, Register rn, const Operand& operand) { 1131 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1132 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1133 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1134 VIXL_ASSERT(allow_macro_instructions_); 1135 VIXL_ASSERT(OutsideITBlock()); 1136 MacroEmissionCheckScope guard(this); 1137 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) { 1138 uint32_t immediate = operand.GetImmediate(); 1139 if (immediate == 0) { 1140 return; 1141 } 1142 } 1143 bool can_use_it = 1144 // ADD<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1 1145 (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() && 1146 rd.IsLow()) || 1147 // ADD<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2 1148 (operand.IsImmediate() && (operand.GetImmediate() <= 255) && 1149 rd.IsLow() && rn.Is(rd)) || 1150 // ADD{<c>}{<q>} <Rd>, SP, #<imm8> ; T1 1151 (operand.IsImmediate() && (operand.GetImmediate() <= 1020) && 1152 ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) || 1153 // ADD<c>{<q>} <Rd>, <Rn>, <Rm> 1154 (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 1155 operand.GetBaseRegister().IsLow()) || 1156 // ADD<c>{<q>} <Rdn>, <Rm> ; T2 1157 (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) && 1158 !operand.GetBaseRegister().IsSP() && 1159 !operand.GetBaseRegister().IsPC()) || 1160 // ADD{<c>}{<q>} {<Rdm>,} SP, <Rdm> ; T1 1161 (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() && 1162 operand.GetBaseRegister().Is(rd)); 1163 ITScope it_scope(this, &cond, can_use_it); 1164 add(cond, rd, rn, operand); 1165 } 1166 void Add(Register rd, Register rn, const Operand& operand) { 1167 Add(al, rd, rn, operand); 1168 } 1169 void Add(FlagsUpdate flags, 1170 Condition cond, 1171 Register rd, 1172 Register rn, 1173 const Operand& operand) { 1174 switch (flags) { 1175 case LeaveFlags: 1176 Add(cond, rd, rn, operand); 1177 break; 1178 case SetFlags: 1179 Adds(cond, rd, rn, operand); 1180 break; 1181 case DontCare: 1182 bool setflags_is_smaller = 1183 IsUsingT32() && cond.Is(al) && 1184 ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 1185 !rd.Is(rn) && operand.GetBaseRegister().IsLow()) || 1186 (operand.IsImmediate() && 1187 ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) || 1188 (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256))))); 1189 if (setflags_is_smaller) { 1190 Adds(cond, rd, rn, operand); 1191 } else { 1192 bool changed_op_is_smaller = 1193 operand.IsImmediate() && (operand.GetSignedImmediate() < 0) && 1194 ((rd.IsLow() && rn.IsLow() && 1195 (operand.GetSignedImmediate() >= -7)) || 1196 (rd.IsLow() && rn.Is(rd) && 1197 (operand.GetSignedImmediate() >= -255))); 1198 if (changed_op_is_smaller) { 1199 Subs(cond, rd, rn, -operand.GetSignedImmediate()); 1200 } else { 1201 Add(cond, rd, rn, operand); 1202 } 1203 } 1204 break; 1205 } 1206 } 1207 void Add(FlagsUpdate flags, 1208 Register rd, 1209 Register rn, 1210 const Operand& operand) { 1211 Add(flags, al, rd, rn, operand); 1212 } 1213 1214 void Adds(Condition cond, Register rd, Register rn, const Operand& operand) { 1215 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1216 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1217 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1218 VIXL_ASSERT(allow_macro_instructions_); 1219 VIXL_ASSERT(OutsideITBlock()); 1220 MacroEmissionCheckScope guard(this); 1221 ITScope it_scope(this, &cond); 1222 adds(cond, rd, rn, operand); 1223 } 1224 void Adds(Register rd, Register rn, const Operand& operand) { 1225 Adds(al, rd, rn, operand); 1226 } 1227 1228 void And(Condition cond, Register rd, Register rn, const Operand& operand) { 1229 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1230 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1231 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1232 VIXL_ASSERT(allow_macro_instructions_); 1233 VIXL_ASSERT(OutsideITBlock()); 1234 MacroEmissionCheckScope guard(this); 1235 if (rd.Is(rn) && operand.IsPlainRegister() && 1236 rd.Is(operand.GetBaseRegister())) { 1237 return; 1238 } 1239 if (cond.Is(al) && operand.IsImmediate()) { 1240 uint32_t immediate = operand.GetImmediate(); 1241 if (immediate == 0) { 1242 mov(rd, 0); 1243 return; 1244 } 1245 if ((immediate == 0xffffffff) && rd.Is(rn)) { 1246 return; 1247 } 1248 } 1249 bool can_use_it = 1250 // AND<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 1251 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 1252 operand.GetBaseRegister().IsLow(); 1253 ITScope it_scope(this, &cond, can_use_it); 1254 and_(cond, rd, rn, operand); 1255 } 1256 void And(Register rd, Register rn, const Operand& operand) { 1257 And(al, rd, rn, operand); 1258 } 1259 void And(FlagsUpdate flags, 1260 Condition cond, 1261 Register rd, 1262 Register rn, 1263 const Operand& operand) { 1264 switch (flags) { 1265 case LeaveFlags: 1266 And(cond, rd, rn, operand); 1267 break; 1268 case SetFlags: 1269 Ands(cond, rd, rn, operand); 1270 break; 1271 case DontCare: 1272 if (operand.IsPlainRegister() && rd.Is(rn) && 1273 rd.Is(operand.GetBaseRegister())) { 1274 return; 1275 } 1276 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1277 rn.Is(rd) && operand.IsPlainRegister() && 1278 operand.GetBaseRegister().IsLow(); 1279 if (setflags_is_smaller) { 1280 Ands(cond, rd, rn, operand); 1281 } else { 1282 And(cond, rd, rn, operand); 1283 } 1284 break; 1285 } 1286 } 1287 void And(FlagsUpdate flags, 1288 Register rd, 1289 Register rn, 1290 const Operand& operand) { 1291 And(flags, al, rd, rn, operand); 1292 } 1293 1294 void Ands(Condition cond, Register rd, Register rn, const Operand& operand) { 1295 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1296 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1297 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1298 VIXL_ASSERT(allow_macro_instructions_); 1299 VIXL_ASSERT(OutsideITBlock()); 1300 MacroEmissionCheckScope guard(this); 1301 ITScope it_scope(this, &cond); 1302 ands(cond, rd, rn, operand); 1303 } 1304 void Ands(Register rd, Register rn, const Operand& operand) { 1305 Ands(al, rd, rn, operand); 1306 } 1307 1308 void Asr(Condition cond, Register rd, Register rm, const Operand& operand) { 1309 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1310 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1311 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1312 VIXL_ASSERT(allow_macro_instructions_); 1313 VIXL_ASSERT(OutsideITBlock()); 1314 MacroEmissionCheckScope guard(this); 1315 bool can_use_it = 1316 // ASR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2 1317 (operand.IsImmediate() && (operand.GetImmediate() >= 1) && 1318 (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) || 1319 // ASR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 1320 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 1321 operand.GetBaseRegister().IsLow()); 1322 ITScope it_scope(this, &cond, can_use_it); 1323 asr(cond, rd, rm, operand); 1324 } 1325 void Asr(Register rd, Register rm, const Operand& operand) { 1326 Asr(al, rd, rm, operand); 1327 } 1328 void Asr(FlagsUpdate flags, 1329 Condition cond, 1330 Register rd, 1331 Register rm, 1332 const Operand& operand) { 1333 switch (flags) { 1334 case LeaveFlags: 1335 Asr(cond, rd, rm, operand); 1336 break; 1337 case SetFlags: 1338 Asrs(cond, rd, rm, operand); 1339 break; 1340 case DontCare: 1341 bool setflags_is_smaller = 1342 IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() && 1343 ((operand.IsImmediate() && (operand.GetImmediate() >= 1) && 1344 (operand.GetImmediate() <= 32)) || 1345 (operand.IsPlainRegister() && rd.Is(rm))); 1346 if (setflags_is_smaller) { 1347 Asrs(cond, rd, rm, operand); 1348 } else { 1349 Asr(cond, rd, rm, operand); 1350 } 1351 break; 1352 } 1353 } 1354 void Asr(FlagsUpdate flags, 1355 Register rd, 1356 Register rm, 1357 const Operand& operand) { 1358 Asr(flags, al, rd, rm, operand); 1359 } 1360 1361 void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) { 1362 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1363 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1364 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1365 VIXL_ASSERT(allow_macro_instructions_); 1366 VIXL_ASSERT(OutsideITBlock()); 1367 MacroEmissionCheckScope guard(this); 1368 ITScope it_scope(this, &cond); 1369 asrs(cond, rd, rm, operand); 1370 } 1371 void Asrs(Register rd, Register rm, const Operand& operand) { 1372 Asrs(al, rd, rm, operand); 1373 } 1374 1375 void B(Condition cond, Label* label, BranchHint hint = kBranchWithoutHint) { 1376 VIXL_ASSERT(allow_macro_instructions_); 1377 VIXL_ASSERT(OutsideITBlock()); 1378 MacroEmissionCheckScope guard(this); 1379 if (hint == kNear) { 1380 if (label->IsBound()) { 1381 b(cond, label); 1382 } else { 1383 b(cond, Narrow, label); 1384 } 1385 } else { 1386 b(cond, label); 1387 } 1388 AddBranchLabel(label); 1389 } 1390 void B(Label* label, BranchHint hint = kBranchWithoutHint) { 1391 B(al, label, hint); 1392 } 1393 void BPreferNear(Condition cond, Label* label) { B(cond, label, kNear); } 1394 void BPreferNear(Label* label) { B(al, label, kNear); } 1395 1396 void Bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand) { 1397 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1398 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1399 VIXL_ASSERT(allow_macro_instructions_); 1400 VIXL_ASSERT(OutsideITBlock()); 1401 MacroEmissionCheckScope guard(this); 1402 ITScope it_scope(this, &cond); 1403 bfc(cond, rd, lsb, operand); 1404 } 1405 void Bfc(Register rd, uint32_t lsb, const Operand& operand) { 1406 Bfc(al, rd, lsb, operand); 1407 } 1408 1409 void Bfi(Condition cond, 1410 Register rd, 1411 Register rn, 1412 uint32_t lsb, 1413 const Operand& operand) { 1414 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1415 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1416 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1417 VIXL_ASSERT(allow_macro_instructions_); 1418 VIXL_ASSERT(OutsideITBlock()); 1419 MacroEmissionCheckScope guard(this); 1420 ITScope it_scope(this, &cond); 1421 bfi(cond, rd, rn, lsb, operand); 1422 } 1423 void Bfi(Register rd, Register rn, uint32_t lsb, const Operand& operand) { 1424 Bfi(al, rd, rn, lsb, operand); 1425 } 1426 1427 void Bic(Condition cond, Register rd, Register rn, const Operand& operand) { 1428 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1429 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1430 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1431 VIXL_ASSERT(allow_macro_instructions_); 1432 VIXL_ASSERT(OutsideITBlock()); 1433 MacroEmissionCheckScope guard(this); 1434 if (cond.Is(al) && operand.IsImmediate()) { 1435 uint32_t immediate = operand.GetImmediate(); 1436 if ((immediate == 0) && rd.Is(rn)) { 1437 return; 1438 } 1439 if (immediate == 0xffffffff) { 1440 mov(rd, 0); 1441 return; 1442 } 1443 } 1444 bool can_use_it = 1445 // BIC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 1446 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 1447 operand.GetBaseRegister().IsLow(); 1448 ITScope it_scope(this, &cond, can_use_it); 1449 bic(cond, rd, rn, operand); 1450 } 1451 void Bic(Register rd, Register rn, const Operand& operand) { 1452 Bic(al, rd, rn, operand); 1453 } 1454 void Bic(FlagsUpdate flags, 1455 Condition cond, 1456 Register rd, 1457 Register rn, 1458 const Operand& operand) { 1459 switch (flags) { 1460 case LeaveFlags: 1461 Bic(cond, rd, rn, operand); 1462 break; 1463 case SetFlags: 1464 Bics(cond, rd, rn, operand); 1465 break; 1466 case DontCare: 1467 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1468 rn.Is(rd) && operand.IsPlainRegister() && 1469 operand.GetBaseRegister().IsLow(); 1470 if (setflags_is_smaller) { 1471 Bics(cond, rd, rn, operand); 1472 } else { 1473 Bic(cond, rd, rn, operand); 1474 } 1475 break; 1476 } 1477 } 1478 void Bic(FlagsUpdate flags, 1479 Register rd, 1480 Register rn, 1481 const Operand& operand) { 1482 Bic(flags, al, rd, rn, operand); 1483 } 1484 1485 void Bics(Condition cond, Register rd, Register rn, const Operand& operand) { 1486 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1487 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1488 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1489 VIXL_ASSERT(allow_macro_instructions_); 1490 VIXL_ASSERT(OutsideITBlock()); 1491 MacroEmissionCheckScope guard(this); 1492 ITScope it_scope(this, &cond); 1493 bics(cond, rd, rn, operand); 1494 } 1495 void Bics(Register rd, Register rn, const Operand& operand) { 1496 Bics(al, rd, rn, operand); 1497 } 1498 1499 void Bkpt(Condition cond, uint32_t imm) { 1500 VIXL_ASSERT(allow_macro_instructions_); 1501 VIXL_ASSERT(OutsideITBlock()); 1502 MacroEmissionCheckScope guard(this); 1503 ITScope it_scope(this, &cond); 1504 bkpt(cond, imm); 1505 } 1506 void Bkpt(uint32_t imm) { Bkpt(al, imm); } 1507 1508 void Bl(Condition cond, Label* label) { 1509 VIXL_ASSERT(allow_macro_instructions_); 1510 VIXL_ASSERT(OutsideITBlock()); 1511 MacroEmissionCheckScope guard(this); 1512 ITScope it_scope(this, &cond); 1513 bl(cond, label); 1514 AddBranchLabel(label); 1515 } 1516 void Bl(Label* label) { Bl(al, label); } 1517 1518 void Blx(Condition cond, Label* label) { 1519 VIXL_ASSERT(allow_macro_instructions_); 1520 VIXL_ASSERT(OutsideITBlock()); 1521 MacroEmissionCheckScope guard(this); 1522 ITScope it_scope(this, &cond); 1523 blx(cond, label); 1524 AddBranchLabel(label); 1525 } 1526 void Blx(Label* label) { Blx(al, label); } 1527 1528 void Blx(Condition cond, Register rm) { 1529 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1530 VIXL_ASSERT(allow_macro_instructions_); 1531 VIXL_ASSERT(OutsideITBlock()); 1532 MacroEmissionCheckScope guard(this); 1533 bool can_use_it = 1534 // BLX{<c>}{<q>} <Rm> ; T1 1535 !rm.IsPC(); 1536 ITScope it_scope(this, &cond, can_use_it); 1537 blx(cond, rm); 1538 } 1539 void Blx(Register rm) { Blx(al, rm); } 1540 1541 void Bx(Condition cond, Register rm) { 1542 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1543 VIXL_ASSERT(allow_macro_instructions_); 1544 VIXL_ASSERT(OutsideITBlock()); 1545 MacroEmissionCheckScope guard(this); 1546 bool can_use_it = 1547 // BX{<c>}{<q>} <Rm> ; T1 1548 !rm.IsPC(); 1549 ITScope it_scope(this, &cond, can_use_it); 1550 bx(cond, rm); 1551 } 1552 void Bx(Register rm) { Bx(al, rm); } 1553 1554 void Bxj(Condition cond, Register rm) { 1555 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1556 VIXL_ASSERT(allow_macro_instructions_); 1557 VIXL_ASSERT(OutsideITBlock()); 1558 MacroEmissionCheckScope guard(this); 1559 ITScope it_scope(this, &cond); 1560 bxj(cond, rm); 1561 } 1562 void Bxj(Register rm) { Bxj(al, rm); } 1563 1564 void Cbnz(Register rn, Label* label) { 1565 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1566 VIXL_ASSERT(allow_macro_instructions_); 1567 VIXL_ASSERT(OutsideITBlock()); 1568 MacroEmissionCheckScope guard(this); 1569 cbnz(rn, label); 1570 AddBranchLabel(label); 1571 } 1572 1573 void Cbz(Register rn, Label* label) { 1574 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1575 VIXL_ASSERT(allow_macro_instructions_); 1576 VIXL_ASSERT(OutsideITBlock()); 1577 MacroEmissionCheckScope guard(this); 1578 cbz(rn, label); 1579 AddBranchLabel(label); 1580 } 1581 1582 void Clrex(Condition cond) { 1583 VIXL_ASSERT(allow_macro_instructions_); 1584 VIXL_ASSERT(OutsideITBlock()); 1585 MacroEmissionCheckScope guard(this); 1586 ITScope it_scope(this, &cond); 1587 clrex(cond); 1588 } 1589 void Clrex() { Clrex(al); } 1590 1591 void Clz(Condition cond, Register rd, Register rm) { 1592 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1593 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1594 VIXL_ASSERT(allow_macro_instructions_); 1595 VIXL_ASSERT(OutsideITBlock()); 1596 MacroEmissionCheckScope guard(this); 1597 ITScope it_scope(this, &cond); 1598 clz(cond, rd, rm); 1599 } 1600 void Clz(Register rd, Register rm) { Clz(al, rd, rm); } 1601 1602 void Cmn(Condition cond, Register rn, const Operand& operand) { 1603 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1604 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1605 VIXL_ASSERT(allow_macro_instructions_); 1606 VIXL_ASSERT(OutsideITBlock()); 1607 MacroEmissionCheckScope guard(this); 1608 bool can_use_it = 1609 // CMN{<c>}{<q>} <Rn>, <Rm> ; T1 1610 operand.IsPlainRegister() && rn.IsLow() && 1611 operand.GetBaseRegister().IsLow(); 1612 ITScope it_scope(this, &cond, can_use_it); 1613 cmn(cond, rn, operand); 1614 } 1615 void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); } 1616 1617 void Cmp(Condition cond, Register rn, const Operand& operand) { 1618 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1619 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1620 VIXL_ASSERT(allow_macro_instructions_); 1621 VIXL_ASSERT(OutsideITBlock()); 1622 MacroEmissionCheckScope guard(this); 1623 bool can_use_it = 1624 // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1 1625 (operand.IsImmediate() && (operand.GetImmediate() <= 255) && 1626 rn.IsLow()) || 1627 // CMP{<c>}{<q>} <Rn>, <Rm> ; T1 T2 1628 (operand.IsPlainRegister() && !rn.IsPC() && 1629 !operand.GetBaseRegister().IsPC()); 1630 ITScope it_scope(this, &cond, can_use_it); 1631 cmp(cond, rn, operand); 1632 } 1633 void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); } 1634 1635 void Crc32b(Condition cond, Register rd, Register rn, Register rm) { 1636 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1637 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1638 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1639 VIXL_ASSERT(allow_macro_instructions_); 1640 VIXL_ASSERT(OutsideITBlock()); 1641 MacroEmissionCheckScope guard(this); 1642 ITScope it_scope(this, &cond); 1643 crc32b(cond, rd, rn, rm); 1644 } 1645 void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); } 1646 1647 void Crc32cb(Condition cond, Register rd, Register rn, Register rm) { 1648 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1649 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1650 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1651 VIXL_ASSERT(allow_macro_instructions_); 1652 VIXL_ASSERT(OutsideITBlock()); 1653 MacroEmissionCheckScope guard(this); 1654 ITScope it_scope(this, &cond); 1655 crc32cb(cond, rd, rn, rm); 1656 } 1657 void Crc32cb(Register rd, Register rn, Register rm) { 1658 Crc32cb(al, rd, rn, rm); 1659 } 1660 1661 void Crc32ch(Condition cond, Register rd, Register rn, Register rm) { 1662 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1663 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1665 VIXL_ASSERT(allow_macro_instructions_); 1666 VIXL_ASSERT(OutsideITBlock()); 1667 MacroEmissionCheckScope guard(this); 1668 ITScope it_scope(this, &cond); 1669 crc32ch(cond, rd, rn, rm); 1670 } 1671 void Crc32ch(Register rd, Register rn, Register rm) { 1672 Crc32ch(al, rd, rn, rm); 1673 } 1674 1675 void Crc32cw(Condition cond, Register rd, Register rn, Register rm) { 1676 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1677 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1678 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1679 VIXL_ASSERT(allow_macro_instructions_); 1680 VIXL_ASSERT(OutsideITBlock()); 1681 MacroEmissionCheckScope guard(this); 1682 ITScope it_scope(this, &cond); 1683 crc32cw(cond, rd, rn, rm); 1684 } 1685 void Crc32cw(Register rd, Register rn, Register rm) { 1686 Crc32cw(al, rd, rn, rm); 1687 } 1688 1689 void Crc32h(Condition cond, Register rd, Register rn, Register rm) { 1690 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1691 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1692 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1693 VIXL_ASSERT(allow_macro_instructions_); 1694 VIXL_ASSERT(OutsideITBlock()); 1695 MacroEmissionCheckScope guard(this); 1696 ITScope it_scope(this, &cond); 1697 crc32h(cond, rd, rn, rm); 1698 } 1699 void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); } 1700 1701 void Crc32w(Condition cond, Register rd, Register rn, Register rm) { 1702 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1703 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1704 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1705 VIXL_ASSERT(allow_macro_instructions_); 1706 VIXL_ASSERT(OutsideITBlock()); 1707 MacroEmissionCheckScope guard(this); 1708 ITScope it_scope(this, &cond); 1709 crc32w(cond, rd, rn, rm); 1710 } 1711 void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); } 1712 1713 void Dmb(Condition cond, MemoryBarrier option) { 1714 VIXL_ASSERT(allow_macro_instructions_); 1715 VIXL_ASSERT(OutsideITBlock()); 1716 MacroEmissionCheckScope guard(this); 1717 ITScope it_scope(this, &cond); 1718 dmb(cond, option); 1719 } 1720 void Dmb(MemoryBarrier option) { Dmb(al, option); } 1721 1722 void Dsb(Condition cond, MemoryBarrier option) { 1723 VIXL_ASSERT(allow_macro_instructions_); 1724 VIXL_ASSERT(OutsideITBlock()); 1725 MacroEmissionCheckScope guard(this); 1726 ITScope it_scope(this, &cond); 1727 dsb(cond, option); 1728 } 1729 void Dsb(MemoryBarrier option) { Dsb(al, option); } 1730 1731 void Eor(Condition cond, Register rd, Register rn, const Operand& operand) { 1732 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1733 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1734 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1735 VIXL_ASSERT(allow_macro_instructions_); 1736 VIXL_ASSERT(OutsideITBlock()); 1737 MacroEmissionCheckScope guard(this); 1738 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) { 1739 uint32_t immediate = operand.GetImmediate(); 1740 if (immediate == 0) { 1741 return; 1742 } 1743 if (immediate == 0xffffffff) { 1744 mvn(rd, rn); 1745 return; 1746 } 1747 } 1748 bool can_use_it = 1749 // EOR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 1750 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 1751 operand.GetBaseRegister().IsLow(); 1752 ITScope it_scope(this, &cond, can_use_it); 1753 eor(cond, rd, rn, operand); 1754 } 1755 void Eor(Register rd, Register rn, const Operand& operand) { 1756 Eor(al, rd, rn, operand); 1757 } 1758 void Eor(FlagsUpdate flags, 1759 Condition cond, 1760 Register rd, 1761 Register rn, 1762 const Operand& operand) { 1763 switch (flags) { 1764 case LeaveFlags: 1765 Eor(cond, rd, rn, operand); 1766 break; 1767 case SetFlags: 1768 Eors(cond, rd, rn, operand); 1769 break; 1770 case DontCare: 1771 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1772 rn.Is(rd) && operand.IsPlainRegister() && 1773 operand.GetBaseRegister().IsLow(); 1774 if (setflags_is_smaller) { 1775 Eors(cond, rd, rn, operand); 1776 } else { 1777 Eor(cond, rd, rn, operand); 1778 } 1779 break; 1780 } 1781 } 1782 void Eor(FlagsUpdate flags, 1783 Register rd, 1784 Register rn, 1785 const Operand& operand) { 1786 Eor(flags, al, rd, rn, operand); 1787 } 1788 1789 void Eors(Condition cond, Register rd, Register rn, const Operand& operand) { 1790 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1791 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1792 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1793 VIXL_ASSERT(allow_macro_instructions_); 1794 VIXL_ASSERT(OutsideITBlock()); 1795 MacroEmissionCheckScope guard(this); 1796 ITScope it_scope(this, &cond); 1797 eors(cond, rd, rn, operand); 1798 } 1799 void Eors(Register rd, Register rn, const Operand& operand) { 1800 Eors(al, rd, rn, operand); 1801 } 1802 1803 void Fldmdbx(Condition cond, 1804 Register rn, 1805 WriteBack write_back, 1806 DRegisterList dreglist) { 1807 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1808 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1809 VIXL_ASSERT(allow_macro_instructions_); 1810 VIXL_ASSERT(OutsideITBlock()); 1811 MacroEmissionCheckScope guard(this); 1812 ITScope it_scope(this, &cond); 1813 fldmdbx(cond, rn, write_back, dreglist); 1814 } 1815 void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) { 1816 Fldmdbx(al, rn, write_back, dreglist); 1817 } 1818 1819 void Fldmiax(Condition cond, 1820 Register rn, 1821 WriteBack write_back, 1822 DRegisterList dreglist) { 1823 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1824 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1825 VIXL_ASSERT(allow_macro_instructions_); 1826 VIXL_ASSERT(OutsideITBlock()); 1827 MacroEmissionCheckScope guard(this); 1828 ITScope it_scope(this, &cond); 1829 fldmiax(cond, rn, write_back, dreglist); 1830 } 1831 void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) { 1832 Fldmiax(al, rn, write_back, dreglist); 1833 } 1834 1835 void Fstmdbx(Condition cond, 1836 Register rn, 1837 WriteBack write_back, 1838 DRegisterList dreglist) { 1839 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1840 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1841 VIXL_ASSERT(allow_macro_instructions_); 1842 VIXL_ASSERT(OutsideITBlock()); 1843 MacroEmissionCheckScope guard(this); 1844 ITScope it_scope(this, &cond); 1845 fstmdbx(cond, rn, write_back, dreglist); 1846 } 1847 void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) { 1848 Fstmdbx(al, rn, write_back, dreglist); 1849 } 1850 1851 void Fstmiax(Condition cond, 1852 Register rn, 1853 WriteBack write_back, 1854 DRegisterList dreglist) { 1855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1856 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1857 VIXL_ASSERT(allow_macro_instructions_); 1858 VIXL_ASSERT(OutsideITBlock()); 1859 MacroEmissionCheckScope guard(this); 1860 ITScope it_scope(this, &cond); 1861 fstmiax(cond, rn, write_back, dreglist); 1862 } 1863 void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) { 1864 Fstmiax(al, rn, write_back, dreglist); 1865 } 1866 1867 void Hlt(Condition cond, uint32_t imm) { 1868 VIXL_ASSERT(allow_macro_instructions_); 1869 VIXL_ASSERT(OutsideITBlock()); 1870 MacroEmissionCheckScope guard(this); 1871 ITScope it_scope(this, &cond); 1872 hlt(cond, imm); 1873 } 1874 void Hlt(uint32_t imm) { Hlt(al, imm); } 1875 1876 void Hvc(Condition cond, uint32_t imm) { 1877 VIXL_ASSERT(allow_macro_instructions_); 1878 VIXL_ASSERT(OutsideITBlock()); 1879 MacroEmissionCheckScope guard(this); 1880 ITScope it_scope(this, &cond); 1881 hvc(cond, imm); 1882 } 1883 void Hvc(uint32_t imm) { Hvc(al, imm); } 1884 1885 void Isb(Condition cond, MemoryBarrier option) { 1886 VIXL_ASSERT(allow_macro_instructions_); 1887 VIXL_ASSERT(OutsideITBlock()); 1888 MacroEmissionCheckScope guard(this); 1889 ITScope it_scope(this, &cond); 1890 isb(cond, option); 1891 } 1892 void Isb(MemoryBarrier option) { Isb(al, option); } 1893 1894 void Lda(Condition cond, Register rt, const MemOperand& operand) { 1895 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1896 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1897 VIXL_ASSERT(allow_macro_instructions_); 1898 VIXL_ASSERT(OutsideITBlock()); 1899 MacroEmissionCheckScope guard(this); 1900 ITScope it_scope(this, &cond); 1901 lda(cond, rt, operand); 1902 } 1903 void Lda(Register rt, const MemOperand& operand) { Lda(al, rt, operand); } 1904 1905 void Ldab(Condition cond, Register rt, const MemOperand& operand) { 1906 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1907 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1908 VIXL_ASSERT(allow_macro_instructions_); 1909 VIXL_ASSERT(OutsideITBlock()); 1910 MacroEmissionCheckScope guard(this); 1911 ITScope it_scope(this, &cond); 1912 ldab(cond, rt, operand); 1913 } 1914 void Ldab(Register rt, const MemOperand& operand) { Ldab(al, rt, operand); } 1915 1916 void Ldaex(Condition cond, Register rt, const MemOperand& operand) { 1917 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1918 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1919 VIXL_ASSERT(allow_macro_instructions_); 1920 VIXL_ASSERT(OutsideITBlock()); 1921 MacroEmissionCheckScope guard(this); 1922 ITScope it_scope(this, &cond); 1923 ldaex(cond, rt, operand); 1924 } 1925 void Ldaex(Register rt, const MemOperand& operand) { Ldaex(al, rt, operand); } 1926 1927 void Ldaexb(Condition cond, Register rt, const MemOperand& operand) { 1928 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1929 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1930 VIXL_ASSERT(allow_macro_instructions_); 1931 VIXL_ASSERT(OutsideITBlock()); 1932 MacroEmissionCheckScope guard(this); 1933 ITScope it_scope(this, &cond); 1934 ldaexb(cond, rt, operand); 1935 } 1936 void Ldaexb(Register rt, const MemOperand& operand) { 1937 Ldaexb(al, rt, operand); 1938 } 1939 1940 void Ldaexd(Condition cond, 1941 Register rt, 1942 Register rt2, 1943 const MemOperand& operand) { 1944 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1945 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 1946 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1947 VIXL_ASSERT(allow_macro_instructions_); 1948 VIXL_ASSERT(OutsideITBlock()); 1949 MacroEmissionCheckScope guard(this); 1950 ITScope it_scope(this, &cond); 1951 ldaexd(cond, rt, rt2, operand); 1952 } 1953 void Ldaexd(Register rt, Register rt2, const MemOperand& operand) { 1954 Ldaexd(al, rt, rt2, operand); 1955 } 1956 1957 void Ldaexh(Condition cond, Register rt, const MemOperand& operand) { 1958 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1959 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1960 VIXL_ASSERT(allow_macro_instructions_); 1961 VIXL_ASSERT(OutsideITBlock()); 1962 MacroEmissionCheckScope guard(this); 1963 ITScope it_scope(this, &cond); 1964 ldaexh(cond, rt, operand); 1965 } 1966 void Ldaexh(Register rt, const MemOperand& operand) { 1967 Ldaexh(al, rt, operand); 1968 } 1969 1970 void Ldah(Condition cond, Register rt, const MemOperand& operand) { 1971 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1972 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1973 VIXL_ASSERT(allow_macro_instructions_); 1974 VIXL_ASSERT(OutsideITBlock()); 1975 MacroEmissionCheckScope guard(this); 1976 ITScope it_scope(this, &cond); 1977 ldah(cond, rt, operand); 1978 } 1979 void Ldah(Register rt, const MemOperand& operand) { Ldah(al, rt, operand); } 1980 1981 void Ldm(Condition cond, 1982 Register rn, 1983 WriteBack write_back, 1984 RegisterList registers) { 1985 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1986 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1987 VIXL_ASSERT(allow_macro_instructions_); 1988 VIXL_ASSERT(OutsideITBlock()); 1989 MacroEmissionCheckScope guard(this); 1990 ITScope it_scope(this, &cond); 1991 ldm(cond, rn, write_back, registers); 1992 } 1993 void Ldm(Register rn, WriteBack write_back, RegisterList registers) { 1994 Ldm(al, rn, write_back, registers); 1995 } 1996 1997 void Ldmda(Condition cond, 1998 Register rn, 1999 WriteBack write_back, 2000 RegisterList registers) { 2001 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2002 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2003 VIXL_ASSERT(allow_macro_instructions_); 2004 VIXL_ASSERT(OutsideITBlock()); 2005 MacroEmissionCheckScope guard(this); 2006 ITScope it_scope(this, &cond); 2007 ldmda(cond, rn, write_back, registers); 2008 } 2009 void Ldmda(Register rn, WriteBack write_back, RegisterList registers) { 2010 Ldmda(al, rn, write_back, registers); 2011 } 2012 2013 void Ldmdb(Condition cond, 2014 Register rn, 2015 WriteBack write_back, 2016 RegisterList registers) { 2017 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2018 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2019 VIXL_ASSERT(allow_macro_instructions_); 2020 VIXL_ASSERT(OutsideITBlock()); 2021 MacroEmissionCheckScope guard(this); 2022 ITScope it_scope(this, &cond); 2023 ldmdb(cond, rn, write_back, registers); 2024 } 2025 void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) { 2026 Ldmdb(al, rn, write_back, registers); 2027 } 2028 2029 void Ldmea(Condition cond, 2030 Register rn, 2031 WriteBack write_back, 2032 RegisterList registers) { 2033 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2034 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2035 VIXL_ASSERT(allow_macro_instructions_); 2036 VIXL_ASSERT(OutsideITBlock()); 2037 MacroEmissionCheckScope guard(this); 2038 ITScope it_scope(this, &cond); 2039 ldmea(cond, rn, write_back, registers); 2040 } 2041 void Ldmea(Register rn, WriteBack write_back, RegisterList registers) { 2042 Ldmea(al, rn, write_back, registers); 2043 } 2044 2045 void Ldmed(Condition cond, 2046 Register rn, 2047 WriteBack write_back, 2048 RegisterList registers) { 2049 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2050 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2051 VIXL_ASSERT(allow_macro_instructions_); 2052 VIXL_ASSERT(OutsideITBlock()); 2053 MacroEmissionCheckScope guard(this); 2054 ITScope it_scope(this, &cond); 2055 ldmed(cond, rn, write_back, registers); 2056 } 2057 void Ldmed(Register rn, WriteBack write_back, RegisterList registers) { 2058 Ldmed(al, rn, write_back, registers); 2059 } 2060 2061 void Ldmfa(Condition cond, 2062 Register rn, 2063 WriteBack write_back, 2064 RegisterList registers) { 2065 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2066 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2067 VIXL_ASSERT(allow_macro_instructions_); 2068 VIXL_ASSERT(OutsideITBlock()); 2069 MacroEmissionCheckScope guard(this); 2070 ITScope it_scope(this, &cond); 2071 ldmfa(cond, rn, write_back, registers); 2072 } 2073 void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) { 2074 Ldmfa(al, rn, write_back, registers); 2075 } 2076 2077 void Ldmfd(Condition cond, 2078 Register rn, 2079 WriteBack write_back, 2080 RegisterList registers) { 2081 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2082 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2083 VIXL_ASSERT(allow_macro_instructions_); 2084 VIXL_ASSERT(OutsideITBlock()); 2085 MacroEmissionCheckScope guard(this); 2086 ITScope it_scope(this, &cond); 2087 ldmfd(cond, rn, write_back, registers); 2088 } 2089 void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) { 2090 Ldmfd(al, rn, write_back, registers); 2091 } 2092 2093 void Ldmib(Condition cond, 2094 Register rn, 2095 WriteBack write_back, 2096 RegisterList registers) { 2097 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2098 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2099 VIXL_ASSERT(allow_macro_instructions_); 2100 VIXL_ASSERT(OutsideITBlock()); 2101 MacroEmissionCheckScope guard(this); 2102 ITScope it_scope(this, &cond); 2103 ldmib(cond, rn, write_back, registers); 2104 } 2105 void Ldmib(Register rn, WriteBack write_back, RegisterList registers) { 2106 Ldmib(al, rn, write_back, registers); 2107 } 2108 2109 void Ldr(Condition cond, Register rt, const MemOperand& operand) { 2110 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2111 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2112 VIXL_ASSERT(allow_macro_instructions_); 2113 VIXL_ASSERT(OutsideITBlock()); 2114 MacroEmissionCheckScope guard(this); 2115 bool can_use_it = 2116 // LDR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 2117 (operand.IsImmediate() && rt.IsLow() && 2118 operand.GetBaseRegister().IsLow() && 2119 operand.IsOffsetImmediateWithinRange(0, 124, 4) && 2120 (operand.GetAddrMode() == Offset)) || 2121 // LDR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2 2122 (operand.IsImmediate() && rt.IsLow() && 2123 operand.GetBaseRegister().IsSP() && 2124 operand.IsOffsetImmediateWithinRange(0, 1020, 4) && 2125 (operand.GetAddrMode() == Offset)) || 2126 // LDR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2127 (operand.IsPlainRegister() && rt.IsLow() && 2128 operand.GetBaseRegister().IsLow() && 2129 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2130 (operand.GetAddrMode() == Offset)); 2131 ITScope it_scope(this, &cond, can_use_it); 2132 ldr(cond, rt, operand); 2133 } 2134 void Ldr(Register rt, const MemOperand& operand) { Ldr(al, rt, operand); } 2135 2136 void Ldr(Condition cond, Register rt, Label* label) { 2137 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2138 VIXL_ASSERT(allow_macro_instructions_); 2139 VIXL_ASSERT(OutsideITBlock()); 2140 MacroEmissionCheckScope guard(this); 2141 ITScope it_scope(this, &cond); 2142 ldr(cond, rt, label); 2143 } 2144 void Ldr(Register rt, Label* label) { Ldr(al, rt, label); } 2145 2146 void Ldrb(Condition cond, Register rt, const MemOperand& operand) { 2147 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2148 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2149 VIXL_ASSERT(allow_macro_instructions_); 2150 VIXL_ASSERT(OutsideITBlock()); 2151 MacroEmissionCheckScope guard(this); 2152 bool can_use_it = 2153 // LDRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 2154 (operand.IsImmediate() && rt.IsLow() && 2155 operand.GetBaseRegister().IsLow() && 2156 operand.IsOffsetImmediateWithinRange(0, 31) && 2157 (operand.GetAddrMode() == Offset)) || 2158 // LDRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2159 (operand.IsPlainRegister() && rt.IsLow() && 2160 operand.GetBaseRegister().IsLow() && 2161 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2162 (operand.GetAddrMode() == Offset)); 2163 ITScope it_scope(this, &cond, can_use_it); 2164 ldrb(cond, rt, operand); 2165 } 2166 void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); } 2167 2168 void Ldrb(Condition cond, Register rt, Label* label) { 2169 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2170 VIXL_ASSERT(allow_macro_instructions_); 2171 VIXL_ASSERT(OutsideITBlock()); 2172 MacroEmissionCheckScope guard(this); 2173 ITScope it_scope(this, &cond); 2174 ldrb(cond, rt, label); 2175 } 2176 void Ldrb(Register rt, Label* label) { Ldrb(al, rt, label); } 2177 2178 void Ldrd(Condition cond, 2179 Register rt, 2180 Register rt2, 2181 const MemOperand& operand) { 2182 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2183 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 2184 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2185 VIXL_ASSERT(allow_macro_instructions_); 2186 VIXL_ASSERT(OutsideITBlock()); 2187 MacroEmissionCheckScope guard(this); 2188 ITScope it_scope(this, &cond); 2189 ldrd(cond, rt, rt2, operand); 2190 } 2191 void Ldrd(Register rt, Register rt2, const MemOperand& operand) { 2192 Ldrd(al, rt, rt2, operand); 2193 } 2194 2195 void Ldrd(Condition cond, Register rt, Register rt2, Label* label) { 2196 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2197 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 2198 VIXL_ASSERT(allow_macro_instructions_); 2199 VIXL_ASSERT(OutsideITBlock()); 2200 MacroEmissionCheckScope guard(this); 2201 ITScope it_scope(this, &cond); 2202 ldrd(cond, rt, rt2, label); 2203 } 2204 void Ldrd(Register rt, Register rt2, Label* label) { 2205 Ldrd(al, rt, rt2, label); 2206 } 2207 2208 void Ldrex(Condition cond, Register rt, const MemOperand& operand) { 2209 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2210 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2211 VIXL_ASSERT(allow_macro_instructions_); 2212 VIXL_ASSERT(OutsideITBlock()); 2213 MacroEmissionCheckScope guard(this); 2214 ITScope it_scope(this, &cond); 2215 ldrex(cond, rt, operand); 2216 } 2217 void Ldrex(Register rt, const MemOperand& operand) { Ldrex(al, rt, operand); } 2218 2219 void Ldrexb(Condition cond, Register rt, const MemOperand& operand) { 2220 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2221 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2222 VIXL_ASSERT(allow_macro_instructions_); 2223 VIXL_ASSERT(OutsideITBlock()); 2224 MacroEmissionCheckScope guard(this); 2225 ITScope it_scope(this, &cond); 2226 ldrexb(cond, rt, operand); 2227 } 2228 void Ldrexb(Register rt, const MemOperand& operand) { 2229 Ldrexb(al, rt, operand); 2230 } 2231 2232 void Ldrexd(Condition cond, 2233 Register rt, 2234 Register rt2, 2235 const MemOperand& operand) { 2236 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2237 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 2238 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2239 VIXL_ASSERT(allow_macro_instructions_); 2240 VIXL_ASSERT(OutsideITBlock()); 2241 MacroEmissionCheckScope guard(this); 2242 ITScope it_scope(this, &cond); 2243 ldrexd(cond, rt, rt2, operand); 2244 } 2245 void Ldrexd(Register rt, Register rt2, const MemOperand& operand) { 2246 Ldrexd(al, rt, rt2, operand); 2247 } 2248 2249 void Ldrexh(Condition cond, Register rt, const MemOperand& operand) { 2250 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2251 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2252 VIXL_ASSERT(allow_macro_instructions_); 2253 VIXL_ASSERT(OutsideITBlock()); 2254 MacroEmissionCheckScope guard(this); 2255 ITScope it_scope(this, &cond); 2256 ldrexh(cond, rt, operand); 2257 } 2258 void Ldrexh(Register rt, const MemOperand& operand) { 2259 Ldrexh(al, rt, operand); 2260 } 2261 2262 void Ldrh(Condition cond, Register rt, const MemOperand& operand) { 2263 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2264 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2265 VIXL_ASSERT(allow_macro_instructions_); 2266 VIXL_ASSERT(OutsideITBlock()); 2267 MacroEmissionCheckScope guard(this); 2268 bool can_use_it = 2269 // LDRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 2270 (operand.IsImmediate() && rt.IsLow() && 2271 operand.GetBaseRegister().IsLow() && 2272 operand.IsOffsetImmediateWithinRange(0, 62, 2) && 2273 (operand.GetAddrMode() == Offset)) || 2274 // LDRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2275 (operand.IsPlainRegister() && rt.IsLow() && 2276 operand.GetBaseRegister().IsLow() && 2277 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2278 (operand.GetAddrMode() == Offset)); 2279 ITScope it_scope(this, &cond, can_use_it); 2280 ldrh(cond, rt, operand); 2281 } 2282 void Ldrh(Register rt, const MemOperand& operand) { Ldrh(al, rt, operand); } 2283 2284 void Ldrh(Condition cond, Register rt, Label* label) { 2285 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2286 VIXL_ASSERT(allow_macro_instructions_); 2287 VIXL_ASSERT(OutsideITBlock()); 2288 MacroEmissionCheckScope guard(this); 2289 ITScope it_scope(this, &cond); 2290 ldrh(cond, rt, label); 2291 } 2292 void Ldrh(Register rt, Label* label) { Ldrh(al, rt, label); } 2293 2294 void Ldrsb(Condition cond, Register rt, const MemOperand& operand) { 2295 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2296 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2297 VIXL_ASSERT(allow_macro_instructions_); 2298 VIXL_ASSERT(OutsideITBlock()); 2299 MacroEmissionCheckScope guard(this); 2300 bool can_use_it = 2301 // LDRSB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2302 operand.IsPlainRegister() && rt.IsLow() && 2303 operand.GetBaseRegister().IsLow() && 2304 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2305 (operand.GetAddrMode() == Offset); 2306 ITScope it_scope(this, &cond, can_use_it); 2307 ldrsb(cond, rt, operand); 2308 } 2309 void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); } 2310 2311 void Ldrsb(Condition cond, Register rt, Label* label) { 2312 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2313 VIXL_ASSERT(allow_macro_instructions_); 2314 VIXL_ASSERT(OutsideITBlock()); 2315 MacroEmissionCheckScope guard(this); 2316 ITScope it_scope(this, &cond); 2317 ldrsb(cond, rt, label); 2318 } 2319 void Ldrsb(Register rt, Label* label) { Ldrsb(al, rt, label); } 2320 2321 void Ldrsh(Condition cond, Register rt, const MemOperand& operand) { 2322 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2323 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2324 VIXL_ASSERT(allow_macro_instructions_); 2325 VIXL_ASSERT(OutsideITBlock()); 2326 MacroEmissionCheckScope guard(this); 2327 bool can_use_it = 2328 // LDRSH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2329 operand.IsPlainRegister() && rt.IsLow() && 2330 operand.GetBaseRegister().IsLow() && 2331 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2332 (operand.GetAddrMode() == Offset); 2333 ITScope it_scope(this, &cond, can_use_it); 2334 ldrsh(cond, rt, operand); 2335 } 2336 void Ldrsh(Register rt, const MemOperand& operand) { Ldrsh(al, rt, operand); } 2337 2338 void Ldrsh(Condition cond, Register rt, Label* label) { 2339 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2340 VIXL_ASSERT(allow_macro_instructions_); 2341 VIXL_ASSERT(OutsideITBlock()); 2342 MacroEmissionCheckScope guard(this); 2343 ITScope it_scope(this, &cond); 2344 ldrsh(cond, rt, label); 2345 } 2346 void Ldrsh(Register rt, Label* label) { Ldrsh(al, rt, label); } 2347 2348 void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) { 2349 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2350 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2351 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2352 VIXL_ASSERT(allow_macro_instructions_); 2353 VIXL_ASSERT(OutsideITBlock()); 2354 MacroEmissionCheckScope guard(this); 2355 bool can_use_it = 2356 // LSL<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2 2357 (operand.IsImmediate() && (operand.GetImmediate() >= 1) && 2358 (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) || 2359 // LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 2360 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 2361 operand.GetBaseRegister().IsLow()); 2362 ITScope it_scope(this, &cond, can_use_it); 2363 lsl(cond, rd, rm, operand); 2364 } 2365 void Lsl(Register rd, Register rm, const Operand& operand) { 2366 Lsl(al, rd, rm, operand); 2367 } 2368 void Lsl(FlagsUpdate flags, 2369 Condition cond, 2370 Register rd, 2371 Register rm, 2372 const Operand& operand) { 2373 switch (flags) { 2374 case LeaveFlags: 2375 Lsl(cond, rd, rm, operand); 2376 break; 2377 case SetFlags: 2378 Lsls(cond, rd, rm, operand); 2379 break; 2380 case DontCare: 2381 bool setflags_is_smaller = 2382 IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() && 2383 ((operand.IsImmediate() && (operand.GetImmediate() >= 1) && 2384 (operand.GetImmediate() < 32)) || 2385 (operand.IsPlainRegister() && rd.Is(rm))); 2386 if (setflags_is_smaller) { 2387 Lsls(cond, rd, rm, operand); 2388 } else { 2389 Lsl(cond, rd, rm, operand); 2390 } 2391 break; 2392 } 2393 } 2394 void Lsl(FlagsUpdate flags, 2395 Register rd, 2396 Register rm, 2397 const Operand& operand) { 2398 Lsl(flags, al, rd, rm, operand); 2399 } 2400 2401 void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) { 2402 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2403 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2404 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2405 VIXL_ASSERT(allow_macro_instructions_); 2406 VIXL_ASSERT(OutsideITBlock()); 2407 MacroEmissionCheckScope guard(this); 2408 ITScope it_scope(this, &cond); 2409 lsls(cond, rd, rm, operand); 2410 } 2411 void Lsls(Register rd, Register rm, const Operand& operand) { 2412 Lsls(al, rd, rm, operand); 2413 } 2414 2415 void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) { 2416 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2417 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2418 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2419 VIXL_ASSERT(allow_macro_instructions_); 2420 VIXL_ASSERT(OutsideITBlock()); 2421 MacroEmissionCheckScope guard(this); 2422 bool can_use_it = 2423 // LSR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2 2424 (operand.IsImmediate() && (operand.GetImmediate() >= 1) && 2425 (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) || 2426 // LSR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 2427 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 2428 operand.GetBaseRegister().IsLow()); 2429 ITScope it_scope(this, &cond, can_use_it); 2430 lsr(cond, rd, rm, operand); 2431 } 2432 void Lsr(Register rd, Register rm, const Operand& operand) { 2433 Lsr(al, rd, rm, operand); 2434 } 2435 void Lsr(FlagsUpdate flags, 2436 Condition cond, 2437 Register rd, 2438 Register rm, 2439 const Operand& operand) { 2440 switch (flags) { 2441 case LeaveFlags: 2442 Lsr(cond, rd, rm, operand); 2443 break; 2444 case SetFlags: 2445 Lsrs(cond, rd, rm, operand); 2446 break; 2447 case DontCare: 2448 bool setflags_is_smaller = 2449 IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() && 2450 ((operand.IsImmediate() && (operand.GetImmediate() >= 1) && 2451 (operand.GetImmediate() <= 32)) || 2452 (operand.IsPlainRegister() && rd.Is(rm))); 2453 if (setflags_is_smaller) { 2454 Lsrs(cond, rd, rm, operand); 2455 } else { 2456 Lsr(cond, rd, rm, operand); 2457 } 2458 break; 2459 } 2460 } 2461 void Lsr(FlagsUpdate flags, 2462 Register rd, 2463 Register rm, 2464 const Operand& operand) { 2465 Lsr(flags, al, rd, rm, operand); 2466 } 2467 2468 void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) { 2469 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2470 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2471 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2472 VIXL_ASSERT(allow_macro_instructions_); 2473 VIXL_ASSERT(OutsideITBlock()); 2474 MacroEmissionCheckScope guard(this); 2475 ITScope it_scope(this, &cond); 2476 lsrs(cond, rd, rm, operand); 2477 } 2478 void Lsrs(Register rd, Register rm, const Operand& operand) { 2479 Lsrs(al, rd, rm, operand); 2480 } 2481 2482 void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) { 2483 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2484 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2485 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2486 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 2487 VIXL_ASSERT(allow_macro_instructions_); 2488 VIXL_ASSERT(OutsideITBlock()); 2489 MacroEmissionCheckScope guard(this); 2490 ITScope it_scope(this, &cond); 2491 mla(cond, rd, rn, rm, ra); 2492 } 2493 void Mla(Register rd, Register rn, Register rm, Register ra) { 2494 Mla(al, rd, rn, rm, ra); 2495 } 2496 void Mla(FlagsUpdate flags, 2497 Condition cond, 2498 Register rd, 2499 Register rn, 2500 Register rm, 2501 Register ra) { 2502 switch (flags) { 2503 case LeaveFlags: 2504 Mla(cond, rd, rn, rm, ra); 2505 break; 2506 case SetFlags: 2507 Mlas(cond, rd, rn, rm, ra); 2508 break; 2509 case DontCare: 2510 Mla(cond, rd, rn, rm, ra); 2511 break; 2512 } 2513 } 2514 void Mla( 2515 FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) { 2516 Mla(flags, al, rd, rn, rm, ra); 2517 } 2518 2519 void Mlas( 2520 Condition cond, Register rd, Register rn, Register rm, Register ra) { 2521 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2522 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2523 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2524 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 2525 VIXL_ASSERT(allow_macro_instructions_); 2526 VIXL_ASSERT(OutsideITBlock()); 2527 MacroEmissionCheckScope guard(this); 2528 ITScope it_scope(this, &cond); 2529 mlas(cond, rd, rn, rm, ra); 2530 } 2531 void Mlas(Register rd, Register rn, Register rm, Register ra) { 2532 Mlas(al, rd, rn, rm, ra); 2533 } 2534 2535 void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) { 2536 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2537 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2538 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2539 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 2540 VIXL_ASSERT(allow_macro_instructions_); 2541 VIXL_ASSERT(OutsideITBlock()); 2542 MacroEmissionCheckScope guard(this); 2543 ITScope it_scope(this, &cond); 2544 mls(cond, rd, rn, rm, ra); 2545 } 2546 void Mls(Register rd, Register rn, Register rm, Register ra) { 2547 Mls(al, rd, rn, rm, ra); 2548 } 2549 2550 void Mov(Condition cond, Register rd, const Operand& operand) { 2551 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2552 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2553 VIXL_ASSERT(allow_macro_instructions_); 2554 VIXL_ASSERT(OutsideITBlock()); 2555 MacroEmissionCheckScope guard(this); 2556 if (operand.IsPlainRegister() && rd.Is(operand.GetBaseRegister())) { 2557 return; 2558 } 2559 bool can_use_it = 2560 // MOV<c>{<q>} <Rd>, #<imm8> ; T1 2561 (operand.IsImmediate() && rd.IsLow() && 2562 (operand.GetImmediate() <= 255)) || 2563 // MOV{<c>}{<q>} <Rd>, <Rm> ; T1 2564 (operand.IsPlainRegister() && !rd.IsPC() && 2565 !operand.GetBaseRegister().IsPC()) || 2566 // MOV<c>{<q>} <Rd>, <Rm> {, <shift> #<amount>} ; T2 2567 (operand.IsImmediateShiftedRegister() && rd.IsLow() && 2568 operand.GetBaseRegister().IsLow() && 2569 (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) || 2570 operand.GetShift().Is(ASR))) || 2571 // MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs> ; T1 2572 // MOV<c>{<q>} <Rdm>, <Rdm>, LSR <Rs> ; T1 2573 // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1 2574 // MOV<c>{<q>} <Rdm>, <Rdm>, ROR <Rs> ; T1 2575 (operand.IsRegisterShiftedRegister() && 2576 rd.Is(operand.GetBaseRegister()) && rd.IsLow() && 2577 (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) || 2578 operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) && 2579 operand.GetShiftRegister().IsLow()); 2580 ITScope it_scope(this, &cond, can_use_it); 2581 mov(cond, rd, operand); 2582 } 2583 void Mov(Register rd, const Operand& operand) { Mov(al, rd, operand); } 2584 void Mov(FlagsUpdate flags, 2585 Condition cond, 2586 Register rd, 2587 const Operand& operand) { 2588 switch (flags) { 2589 case LeaveFlags: 2590 Mov(cond, rd, operand); 2591 break; 2592 case SetFlags: 2593 Movs(cond, rd, operand); 2594 break; 2595 case DontCare: 2596 if (operand.IsPlainRegister() && rd.Is(operand.GetBaseRegister())) { 2597 return; 2598 } 2599 bool setflags_is_smaller = 2600 IsUsingT32() && cond.Is(al) && 2601 ((operand.IsImmediateShiftedRegister() && rd.IsLow() && 2602 operand.GetBaseRegister().IsLow() && 2603 (operand.GetShiftAmount() >= 1) && 2604 (((operand.GetShiftAmount() <= 32) && 2605 ((operand.GetShift().IsLSR() || operand.GetShift().IsASR()))) || 2606 ((operand.GetShiftAmount() < 32) && 2607 operand.GetShift().IsLSL()))) || 2608 (operand.IsRegisterShiftedRegister() && rd.IsLow() && 2609 operand.GetBaseRegister().Is(rd) && 2610 operand.GetShiftRegister().IsLow() && 2611 (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() || 2612 operand.GetShift().IsASR() || operand.GetShift().IsROR())) || 2613 (operand.IsImmediate() && rd.IsLow() && 2614 (operand.GetImmediate() < 256))); 2615 if (setflags_is_smaller) { 2616 Movs(cond, rd, operand); 2617 } else { 2618 Mov(cond, rd, operand); 2619 } 2620 break; 2621 } 2622 } 2623 void Mov(FlagsUpdate flags, Register rd, const Operand& operand) { 2624 Mov(flags, al, rd, operand); 2625 } 2626 2627 void Movs(Condition cond, Register rd, const Operand& operand) { 2628 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2629 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2630 VIXL_ASSERT(allow_macro_instructions_); 2631 VIXL_ASSERT(OutsideITBlock()); 2632 MacroEmissionCheckScope guard(this); 2633 ITScope it_scope(this, &cond); 2634 movs(cond, rd, operand); 2635 } 2636 void Movs(Register rd, const Operand& operand) { Movs(al, rd, operand); } 2637 2638 void Movt(Condition cond, Register rd, const Operand& operand) { 2639 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2640 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2641 VIXL_ASSERT(allow_macro_instructions_); 2642 VIXL_ASSERT(OutsideITBlock()); 2643 MacroEmissionCheckScope guard(this); 2644 ITScope it_scope(this, &cond); 2645 movt(cond, rd, operand); 2646 } 2647 void Movt(Register rd, const Operand& operand) { Movt(al, rd, operand); } 2648 2649 void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) { 2650 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2651 VIXL_ASSERT(allow_macro_instructions_); 2652 VIXL_ASSERT(OutsideITBlock()); 2653 MacroEmissionCheckScope guard(this); 2654 ITScope it_scope(this, &cond); 2655 mrs(cond, rd, spec_reg); 2656 } 2657 void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); } 2658 2659 void Msr(Condition cond, 2660 MaskedSpecialRegister spec_reg, 2661 const Operand& operand) { 2662 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2663 VIXL_ASSERT(allow_macro_instructions_); 2664 VIXL_ASSERT(OutsideITBlock()); 2665 MacroEmissionCheckScope guard(this); 2666 ITScope it_scope(this, &cond); 2667 msr(cond, spec_reg, operand); 2668 } 2669 void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) { 2670 Msr(al, spec_reg, operand); 2671 } 2672 2673 void Mul(Condition cond, Register rd, Register rn, Register rm) { 2674 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2675 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2676 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2677 VIXL_ASSERT(allow_macro_instructions_); 2678 VIXL_ASSERT(OutsideITBlock()); 2679 MacroEmissionCheckScope guard(this); 2680 bool can_use_it = 2681 // MUL<c>{<q>} <Rdm>, <Rn>{, <Rdm>} ; T1 2682 rd.Is(rm) && rn.IsLow() && rm.IsLow(); 2683 ITScope it_scope(this, &cond, can_use_it); 2684 mul(cond, rd, rn, rm); 2685 } 2686 void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); } 2687 void Mul(FlagsUpdate flags, 2688 Condition cond, 2689 Register rd, 2690 Register rn, 2691 Register rm) { 2692 switch (flags) { 2693 case LeaveFlags: 2694 Mul(cond, rd, rn, rm); 2695 break; 2696 case SetFlags: 2697 Muls(cond, rd, rn, rm); 2698 break; 2699 case DontCare: 2700 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2701 rn.IsLow() && rm.Is(rd); 2702 if (setflags_is_smaller) { 2703 Muls(cond, rd, rn, rm); 2704 } else { 2705 Mul(cond, rd, rn, rm); 2706 } 2707 break; 2708 } 2709 } 2710 void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) { 2711 Mul(flags, al, rd, rn, rm); 2712 } 2713 2714 void Muls(Condition cond, Register rd, Register rn, Register rm) { 2715 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2716 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2717 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2718 VIXL_ASSERT(allow_macro_instructions_); 2719 VIXL_ASSERT(OutsideITBlock()); 2720 MacroEmissionCheckScope guard(this); 2721 ITScope it_scope(this, &cond); 2722 muls(cond, rd, rn, rm); 2723 } 2724 void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); } 2725 2726 void Mvn(Condition cond, Register rd, const Operand& operand) { 2727 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2728 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2729 VIXL_ASSERT(allow_macro_instructions_); 2730 VIXL_ASSERT(OutsideITBlock()); 2731 MacroEmissionCheckScope guard(this); 2732 bool can_use_it = 2733 // MVN<c>{<q>} <Rd>, <Rm> ; T1 2734 operand.IsPlainRegister() && rd.IsLow() && 2735 operand.GetBaseRegister().IsLow(); 2736 ITScope it_scope(this, &cond, can_use_it); 2737 mvn(cond, rd, operand); 2738 } 2739 void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); } 2740 void Mvn(FlagsUpdate flags, 2741 Condition cond, 2742 Register rd, 2743 const Operand& operand) { 2744 switch (flags) { 2745 case LeaveFlags: 2746 Mvn(cond, rd, operand); 2747 break; 2748 case SetFlags: 2749 Mvns(cond, rd, operand); 2750 break; 2751 case DontCare: 2752 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2753 operand.IsPlainRegister() && 2754 operand.GetBaseRegister().IsLow(); 2755 if (setflags_is_smaller) { 2756 Mvns(cond, rd, operand); 2757 } else { 2758 Mvn(cond, rd, operand); 2759 } 2760 break; 2761 } 2762 } 2763 void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) { 2764 Mvn(flags, al, rd, operand); 2765 } 2766 2767 void Mvns(Condition cond, Register rd, const Operand& operand) { 2768 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2769 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2770 VIXL_ASSERT(allow_macro_instructions_); 2771 VIXL_ASSERT(OutsideITBlock()); 2772 MacroEmissionCheckScope guard(this); 2773 ITScope it_scope(this, &cond); 2774 mvns(cond, rd, operand); 2775 } 2776 void Mvns(Register rd, const Operand& operand) { Mvns(al, rd, operand); } 2777 2778 void Nop(Condition cond) { 2779 VIXL_ASSERT(allow_macro_instructions_); 2780 VIXL_ASSERT(OutsideITBlock()); 2781 MacroEmissionCheckScope guard(this); 2782 ITScope it_scope(this, &cond); 2783 nop(cond); 2784 } 2785 void Nop() { Nop(al); } 2786 2787 void Orn(Condition cond, Register rd, Register rn, const Operand& operand) { 2788 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2789 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2790 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2791 VIXL_ASSERT(allow_macro_instructions_); 2792 VIXL_ASSERT(OutsideITBlock()); 2793 MacroEmissionCheckScope guard(this); 2794 if (cond.Is(al) && operand.IsImmediate()) { 2795 uint32_t immediate = operand.GetImmediate(); 2796 if (immediate == 0) { 2797 mvn(rd, 0); 2798 return; 2799 } 2800 if ((immediate == 0xffffffff) && rd.Is(rn)) { 2801 return; 2802 } 2803 } 2804 ITScope it_scope(this, &cond); 2805 orn(cond, rd, rn, operand); 2806 } 2807 void Orn(Register rd, Register rn, const Operand& operand) { 2808 Orn(al, rd, rn, operand); 2809 } 2810 void Orn(FlagsUpdate flags, 2811 Condition cond, 2812 Register rd, 2813 Register rn, 2814 const Operand& operand) { 2815 switch (flags) { 2816 case LeaveFlags: 2817 Orn(cond, rd, rn, operand); 2818 break; 2819 case SetFlags: 2820 Orns(cond, rd, rn, operand); 2821 break; 2822 case DontCare: 2823 Orn(cond, rd, rn, operand); 2824 break; 2825 } 2826 } 2827 void Orn(FlagsUpdate flags, 2828 Register rd, 2829 Register rn, 2830 const Operand& operand) { 2831 Orn(flags, al, rd, rn, operand); 2832 } 2833 2834 void Orns(Condition cond, Register rd, Register rn, const Operand& operand) { 2835 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2836 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2837 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2838 VIXL_ASSERT(allow_macro_instructions_); 2839 VIXL_ASSERT(OutsideITBlock()); 2840 MacroEmissionCheckScope guard(this); 2841 ITScope it_scope(this, &cond); 2842 orns(cond, rd, rn, operand); 2843 } 2844 void Orns(Register rd, Register rn, const Operand& operand) { 2845 Orns(al, rd, rn, operand); 2846 } 2847 2848 void Orr(Condition cond, Register rd, Register rn, const Operand& operand) { 2849 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2850 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2851 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2852 VIXL_ASSERT(allow_macro_instructions_); 2853 VIXL_ASSERT(OutsideITBlock()); 2854 MacroEmissionCheckScope guard(this); 2855 if (rd.Is(rn) && operand.IsPlainRegister() && 2856 rd.Is(operand.GetBaseRegister())) { 2857 return; 2858 } 2859 if (cond.Is(al) && operand.IsImmediate()) { 2860 uint32_t immediate = operand.GetImmediate(); 2861 if ((immediate == 0) && rd.Is(rn)) { 2862 return; 2863 } 2864 if (immediate == 0xffffffff) { 2865 mvn(rd, 0); 2866 return; 2867 } 2868 } 2869 bool can_use_it = 2870 // ORR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 2871 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 2872 operand.GetBaseRegister().IsLow(); 2873 ITScope it_scope(this, &cond, can_use_it); 2874 orr(cond, rd, rn, operand); 2875 } 2876 void Orr(Register rd, Register rn, const Operand& operand) { 2877 Orr(al, rd, rn, operand); 2878 } 2879 void Orr(FlagsUpdate flags, 2880 Condition cond, 2881 Register rd, 2882 Register rn, 2883 const Operand& operand) { 2884 switch (flags) { 2885 case LeaveFlags: 2886 Orr(cond, rd, rn, operand); 2887 break; 2888 case SetFlags: 2889 Orrs(cond, rd, rn, operand); 2890 break; 2891 case DontCare: 2892 if (operand.IsPlainRegister() && rd.Is(rn) && 2893 rd.Is(operand.GetBaseRegister())) { 2894 return; 2895 } 2896 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2897 rn.Is(rd) && operand.IsPlainRegister() && 2898 operand.GetBaseRegister().IsLow(); 2899 if (setflags_is_smaller) { 2900 Orrs(cond, rd, rn, operand); 2901 } else { 2902 Orr(cond, rd, rn, operand); 2903 } 2904 break; 2905 } 2906 } 2907 void Orr(FlagsUpdate flags, 2908 Register rd, 2909 Register rn, 2910 const Operand& operand) { 2911 Orr(flags, al, rd, rn, operand); 2912 } 2913 2914 void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) { 2915 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2916 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2917 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2918 VIXL_ASSERT(allow_macro_instructions_); 2919 VIXL_ASSERT(OutsideITBlock()); 2920 MacroEmissionCheckScope guard(this); 2921 ITScope it_scope(this, &cond); 2922 orrs(cond, rd, rn, operand); 2923 } 2924 void Orrs(Register rd, Register rn, const Operand& operand) { 2925 Orrs(al, rd, rn, operand); 2926 } 2927 2928 void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) { 2929 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2930 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2931 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2932 VIXL_ASSERT(allow_macro_instructions_); 2933 VIXL_ASSERT(OutsideITBlock()); 2934 MacroEmissionCheckScope guard(this); 2935 ITScope it_scope(this, &cond); 2936 pkhbt(cond, rd, rn, operand); 2937 } 2938 void Pkhbt(Register rd, Register rn, const Operand& operand) { 2939 Pkhbt(al, rd, rn, operand); 2940 } 2941 2942 void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) { 2943 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2944 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2945 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2946 VIXL_ASSERT(allow_macro_instructions_); 2947 VIXL_ASSERT(OutsideITBlock()); 2948 MacroEmissionCheckScope guard(this); 2949 ITScope it_scope(this, &cond); 2950 pkhtb(cond, rd, rn, operand); 2951 } 2952 void Pkhtb(Register rd, Register rn, const Operand& operand) { 2953 Pkhtb(al, rd, rn, operand); 2954 } 2955 2956 void Pld(Condition cond, Label* label) { 2957 VIXL_ASSERT(allow_macro_instructions_); 2958 VIXL_ASSERT(OutsideITBlock()); 2959 MacroEmissionCheckScope guard(this); 2960 ITScope it_scope(this, &cond); 2961 pld(cond, label); 2962 } 2963 void Pld(Label* label) { Pld(al, label); } 2964 2965 void Pld(Condition cond, const MemOperand& operand) { 2966 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2967 VIXL_ASSERT(allow_macro_instructions_); 2968 VIXL_ASSERT(OutsideITBlock()); 2969 MacroEmissionCheckScope guard(this); 2970 ITScope it_scope(this, &cond); 2971 pld(cond, operand); 2972 } 2973 void Pld(const MemOperand& operand) { Pld(al, operand); } 2974 2975 void Pldw(Condition cond, const MemOperand& operand) { 2976 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2977 VIXL_ASSERT(allow_macro_instructions_); 2978 VIXL_ASSERT(OutsideITBlock()); 2979 MacroEmissionCheckScope guard(this); 2980 ITScope it_scope(this, &cond); 2981 pldw(cond, operand); 2982 } 2983 void Pldw(const MemOperand& operand) { Pldw(al, operand); } 2984 2985 void Pli(Condition cond, const MemOperand& operand) { 2986 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2987 VIXL_ASSERT(allow_macro_instructions_); 2988 VIXL_ASSERT(OutsideITBlock()); 2989 MacroEmissionCheckScope guard(this); 2990 ITScope it_scope(this, &cond); 2991 pli(cond, operand); 2992 } 2993 void Pli(const MemOperand& operand) { Pli(al, operand); } 2994 2995 void Pli(Condition cond, Label* label) { 2996 VIXL_ASSERT(allow_macro_instructions_); 2997 VIXL_ASSERT(OutsideITBlock()); 2998 MacroEmissionCheckScope guard(this); 2999 ITScope it_scope(this, &cond); 3000 pli(cond, label); 3001 } 3002 void Pli(Label* label) { Pli(al, label); } 3003 3004 void Pop(Condition cond, RegisterList registers) { 3005 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 3006 VIXL_ASSERT(allow_macro_instructions_); 3007 VIXL_ASSERT(OutsideITBlock()); 3008 MacroEmissionCheckScope guard(this); 3009 ITScope it_scope(this, &cond); 3010 pop(cond, registers); 3011 } 3012 void Pop(RegisterList registers) { Pop(al, registers); } 3013 3014 void Pop(Condition cond, Register rt) { 3015 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 3016 VIXL_ASSERT(allow_macro_instructions_); 3017 VIXL_ASSERT(OutsideITBlock()); 3018 MacroEmissionCheckScope guard(this); 3019 ITScope it_scope(this, &cond); 3020 pop(cond, rt); 3021 } 3022 void Pop(Register rt) { Pop(al, rt); } 3023 3024 void Push(Condition cond, RegisterList registers) { 3025 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 3026 VIXL_ASSERT(allow_macro_instructions_); 3027 VIXL_ASSERT(OutsideITBlock()); 3028 MacroEmissionCheckScope guard(this); 3029 ITScope it_scope(this, &cond); 3030 push(cond, registers); 3031 } 3032 void Push(RegisterList registers) { Push(al, registers); } 3033 3034 void Push(Condition cond, Register rt) { 3035 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 3036 VIXL_ASSERT(allow_macro_instructions_); 3037 VIXL_ASSERT(OutsideITBlock()); 3038 MacroEmissionCheckScope guard(this); 3039 ITScope it_scope(this, &cond); 3040 push(cond, rt); 3041 } 3042 void Push(Register rt) { Push(al, rt); } 3043 3044 void Qadd(Condition cond, Register rd, Register rm, Register rn) { 3045 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3046 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3047 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3048 VIXL_ASSERT(allow_macro_instructions_); 3049 VIXL_ASSERT(OutsideITBlock()); 3050 MacroEmissionCheckScope guard(this); 3051 ITScope it_scope(this, &cond); 3052 qadd(cond, rd, rm, rn); 3053 } 3054 void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); } 3055 3056 void Qadd16(Condition cond, Register rd, Register rn, Register rm) { 3057 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3058 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3059 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3060 VIXL_ASSERT(allow_macro_instructions_); 3061 VIXL_ASSERT(OutsideITBlock()); 3062 MacroEmissionCheckScope guard(this); 3063 ITScope it_scope(this, &cond); 3064 qadd16(cond, rd, rn, rm); 3065 } 3066 void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); } 3067 3068 void Qadd8(Condition cond, Register rd, Register rn, Register rm) { 3069 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3070 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3071 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3072 VIXL_ASSERT(allow_macro_instructions_); 3073 VIXL_ASSERT(OutsideITBlock()); 3074 MacroEmissionCheckScope guard(this); 3075 ITScope it_scope(this, &cond); 3076 qadd8(cond, rd, rn, rm); 3077 } 3078 void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); } 3079 3080 void Qasx(Condition cond, Register rd, Register rn, Register rm) { 3081 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3082 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3083 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3084 VIXL_ASSERT(allow_macro_instructions_); 3085 VIXL_ASSERT(OutsideITBlock()); 3086 MacroEmissionCheckScope guard(this); 3087 ITScope it_scope(this, &cond); 3088 qasx(cond, rd, rn, rm); 3089 } 3090 void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); } 3091 3092 void Qdadd(Condition cond, Register rd, Register rm, Register rn) { 3093 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3094 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3095 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3096 VIXL_ASSERT(allow_macro_instructions_); 3097 VIXL_ASSERT(OutsideITBlock()); 3098 MacroEmissionCheckScope guard(this); 3099 ITScope it_scope(this, &cond); 3100 qdadd(cond, rd, rm, rn); 3101 } 3102 void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); } 3103 3104 void Qdsub(Condition cond, Register rd, Register rm, Register rn) { 3105 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3106 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3107 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3108 VIXL_ASSERT(allow_macro_instructions_); 3109 VIXL_ASSERT(OutsideITBlock()); 3110 MacroEmissionCheckScope guard(this); 3111 ITScope it_scope(this, &cond); 3112 qdsub(cond, rd, rm, rn); 3113 } 3114 void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); } 3115 3116 void Qsax(Condition cond, Register rd, Register rn, Register rm) { 3117 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3118 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3119 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3120 VIXL_ASSERT(allow_macro_instructions_); 3121 VIXL_ASSERT(OutsideITBlock()); 3122 MacroEmissionCheckScope guard(this); 3123 ITScope it_scope(this, &cond); 3124 qsax(cond, rd, rn, rm); 3125 } 3126 void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); } 3127 3128 void Qsub(Condition cond, Register rd, Register rm, Register rn) { 3129 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3130 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3131 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3132 VIXL_ASSERT(allow_macro_instructions_); 3133 VIXL_ASSERT(OutsideITBlock()); 3134 MacroEmissionCheckScope guard(this); 3135 ITScope it_scope(this, &cond); 3136 qsub(cond, rd, rm, rn); 3137 } 3138 void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); } 3139 3140 void Qsub16(Condition cond, Register rd, Register rn, Register rm) { 3141 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3142 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3143 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3144 VIXL_ASSERT(allow_macro_instructions_); 3145 VIXL_ASSERT(OutsideITBlock()); 3146 MacroEmissionCheckScope guard(this); 3147 ITScope it_scope(this, &cond); 3148 qsub16(cond, rd, rn, rm); 3149 } 3150 void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); } 3151 3152 void Qsub8(Condition cond, Register rd, Register rn, Register rm) { 3153 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3154 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3155 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3156 VIXL_ASSERT(allow_macro_instructions_); 3157 VIXL_ASSERT(OutsideITBlock()); 3158 MacroEmissionCheckScope guard(this); 3159 ITScope it_scope(this, &cond); 3160 qsub8(cond, rd, rn, rm); 3161 } 3162 void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); } 3163 3164 void Rbit(Condition cond, Register rd, Register rm) { 3165 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3166 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3167 VIXL_ASSERT(allow_macro_instructions_); 3168 VIXL_ASSERT(OutsideITBlock()); 3169 MacroEmissionCheckScope guard(this); 3170 ITScope it_scope(this, &cond); 3171 rbit(cond, rd, rm); 3172 } 3173 void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); } 3174 3175 void Rev(Condition cond, Register rd, Register rm) { 3176 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3177 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3178 VIXL_ASSERT(allow_macro_instructions_); 3179 VIXL_ASSERT(OutsideITBlock()); 3180 MacroEmissionCheckScope guard(this); 3181 ITScope it_scope(this, &cond); 3182 rev(cond, rd, rm); 3183 } 3184 void Rev(Register rd, Register rm) { Rev(al, rd, rm); } 3185 3186 void Rev16(Condition cond, Register rd, Register rm) { 3187 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3188 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3189 VIXL_ASSERT(allow_macro_instructions_); 3190 VIXL_ASSERT(OutsideITBlock()); 3191 MacroEmissionCheckScope guard(this); 3192 ITScope it_scope(this, &cond); 3193 rev16(cond, rd, rm); 3194 } 3195 void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); } 3196 3197 void Revsh(Condition cond, Register rd, Register rm) { 3198 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3199 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3200 VIXL_ASSERT(allow_macro_instructions_); 3201 VIXL_ASSERT(OutsideITBlock()); 3202 MacroEmissionCheckScope guard(this); 3203 ITScope it_scope(this, &cond); 3204 revsh(cond, rd, rm); 3205 } 3206 void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); } 3207 3208 void Ror(Condition cond, Register rd, Register rm, const Operand& operand) { 3209 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3210 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3211 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3212 VIXL_ASSERT(allow_macro_instructions_); 3213 VIXL_ASSERT(OutsideITBlock()); 3214 MacroEmissionCheckScope guard(this); 3215 bool can_use_it = 3216 // ROR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 3217 operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 3218 operand.GetBaseRegister().IsLow(); 3219 ITScope it_scope(this, &cond, can_use_it); 3220 ror(cond, rd, rm, operand); 3221 } 3222 void Ror(Register rd, Register rm, const Operand& operand) { 3223 Ror(al, rd, rm, operand); 3224 } 3225 void Ror(FlagsUpdate flags, 3226 Condition cond, 3227 Register rd, 3228 Register rm, 3229 const Operand& operand) { 3230 switch (flags) { 3231 case LeaveFlags: 3232 Ror(cond, rd, rm, operand); 3233 break; 3234 case SetFlags: 3235 Rors(cond, rd, rm, operand); 3236 break; 3237 case DontCare: 3238 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 3239 rm.IsLow() && operand.IsPlainRegister() && 3240 rd.Is(rm); 3241 if (setflags_is_smaller) { 3242 Rors(cond, rd, rm, operand); 3243 } else { 3244 Ror(cond, rd, rm, operand); 3245 } 3246 break; 3247 } 3248 } 3249 void Ror(FlagsUpdate flags, 3250 Register rd, 3251 Register rm, 3252 const Operand& operand) { 3253 Ror(flags, al, rd, rm, operand); 3254 } 3255 3256 void Rors(Condition cond, Register rd, Register rm, const Operand& operand) { 3257 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3258 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3259 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3260 VIXL_ASSERT(allow_macro_instructions_); 3261 VIXL_ASSERT(OutsideITBlock()); 3262 MacroEmissionCheckScope guard(this); 3263 ITScope it_scope(this, &cond); 3264 rors(cond, rd, rm, operand); 3265 } 3266 void Rors(Register rd, Register rm, const Operand& operand) { 3267 Rors(al, rd, rm, operand); 3268 } 3269 3270 void Rrx(Condition cond, Register rd, Register rm) { 3271 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3272 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3273 VIXL_ASSERT(allow_macro_instructions_); 3274 VIXL_ASSERT(OutsideITBlock()); 3275 MacroEmissionCheckScope guard(this); 3276 ITScope it_scope(this, &cond); 3277 rrx(cond, rd, rm); 3278 } 3279 void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); } 3280 void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) { 3281 switch (flags) { 3282 case LeaveFlags: 3283 Rrx(cond, rd, rm); 3284 break; 3285 case SetFlags: 3286 Rrxs(cond, rd, rm); 3287 break; 3288 case DontCare: 3289 Rrx(cond, rd, rm); 3290 break; 3291 } 3292 } 3293 void Rrx(FlagsUpdate flags, Register rd, Register rm) { 3294 Rrx(flags, al, rd, rm); 3295 } 3296 3297 void Rrxs(Condition cond, Register rd, Register rm) { 3298 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3299 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3300 VIXL_ASSERT(allow_macro_instructions_); 3301 VIXL_ASSERT(OutsideITBlock()); 3302 MacroEmissionCheckScope guard(this); 3303 ITScope it_scope(this, &cond); 3304 rrxs(cond, rd, rm); 3305 } 3306 void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); } 3307 3308 void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) { 3309 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3310 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3311 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3312 VIXL_ASSERT(allow_macro_instructions_); 3313 VIXL_ASSERT(OutsideITBlock()); 3314 MacroEmissionCheckScope guard(this); 3315 bool can_use_it = 3316 // RSB<c>{<q>} {<Rd>, }<Rn>, #0 ; T1 3317 operand.IsImmediate() && rd.IsLow() && rn.IsLow() && 3318 (operand.GetImmediate() == 0); 3319 ITScope it_scope(this, &cond, can_use_it); 3320 rsb(cond, rd, rn, operand); 3321 } 3322 void Rsb(Register rd, Register rn, const Operand& operand) { 3323 Rsb(al, rd, rn, operand); 3324 } 3325 void Rsb(FlagsUpdate flags, 3326 Condition cond, 3327 Register rd, 3328 Register rn, 3329 const Operand& operand) { 3330 switch (flags) { 3331 case LeaveFlags: 3332 Rsb(cond, rd, rn, operand); 3333 break; 3334 case SetFlags: 3335 Rsbs(cond, rd, rn, operand); 3336 break; 3337 case DontCare: 3338 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 3339 rn.IsLow() && operand.IsImmediate() && 3340 (operand.GetImmediate() == 0); 3341 if (setflags_is_smaller) { 3342 Rsbs(cond, rd, rn, operand); 3343 } else { 3344 Rsb(cond, rd, rn, operand); 3345 } 3346 break; 3347 } 3348 } 3349 void Rsb(FlagsUpdate flags, 3350 Register rd, 3351 Register rn, 3352 const Operand& operand) { 3353 Rsb(flags, al, rd, rn, operand); 3354 } 3355 3356 void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) { 3357 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3358 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3359 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3360 VIXL_ASSERT(allow_macro_instructions_); 3361 VIXL_ASSERT(OutsideITBlock()); 3362 MacroEmissionCheckScope guard(this); 3363 ITScope it_scope(this, &cond); 3364 rsbs(cond, rd, rn, operand); 3365 } 3366 void Rsbs(Register rd, Register rn, const Operand& operand) { 3367 Rsbs(al, rd, rn, operand); 3368 } 3369 3370 void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) { 3371 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3372 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3373 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3374 VIXL_ASSERT(allow_macro_instructions_); 3375 VIXL_ASSERT(OutsideITBlock()); 3376 MacroEmissionCheckScope guard(this); 3377 ITScope it_scope(this, &cond); 3378 rsc(cond, rd, rn, operand); 3379 } 3380 void Rsc(Register rd, Register rn, const Operand& operand) { 3381 Rsc(al, rd, rn, operand); 3382 } 3383 void Rsc(FlagsUpdate flags, 3384 Condition cond, 3385 Register rd, 3386 Register rn, 3387 const Operand& operand) { 3388 switch (flags) { 3389 case LeaveFlags: 3390 Rsc(cond, rd, rn, operand); 3391 break; 3392 case SetFlags: 3393 Rscs(cond, rd, rn, operand); 3394 break; 3395 case DontCare: 3396 Rsc(cond, rd, rn, operand); 3397 break; 3398 } 3399 } 3400 void Rsc(FlagsUpdate flags, 3401 Register rd, 3402 Register rn, 3403 const Operand& operand) { 3404 Rsc(flags, al, rd, rn, operand); 3405 } 3406 3407 void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) { 3408 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3409 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3410 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3411 VIXL_ASSERT(allow_macro_instructions_); 3412 VIXL_ASSERT(OutsideITBlock()); 3413 MacroEmissionCheckScope guard(this); 3414 ITScope it_scope(this, &cond); 3415 rscs(cond, rd, rn, operand); 3416 } 3417 void Rscs(Register rd, Register rn, const Operand& operand) { 3418 Rscs(al, rd, rn, operand); 3419 } 3420 3421 void Sadd16(Condition cond, Register rd, Register rn, Register rm) { 3422 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3423 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3424 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3425 VIXL_ASSERT(allow_macro_instructions_); 3426 VIXL_ASSERT(OutsideITBlock()); 3427 MacroEmissionCheckScope guard(this); 3428 ITScope it_scope(this, &cond); 3429 sadd16(cond, rd, rn, rm); 3430 } 3431 void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); } 3432 3433 void Sadd8(Condition cond, Register rd, Register rn, Register rm) { 3434 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3435 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3436 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3437 VIXL_ASSERT(allow_macro_instructions_); 3438 VIXL_ASSERT(OutsideITBlock()); 3439 MacroEmissionCheckScope guard(this); 3440 ITScope it_scope(this, &cond); 3441 sadd8(cond, rd, rn, rm); 3442 } 3443 void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); } 3444 3445 void Sasx(Condition cond, Register rd, Register rn, Register rm) { 3446 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3447 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3448 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3449 VIXL_ASSERT(allow_macro_instructions_); 3450 VIXL_ASSERT(OutsideITBlock()); 3451 MacroEmissionCheckScope guard(this); 3452 ITScope it_scope(this, &cond); 3453 sasx(cond, rd, rn, rm); 3454 } 3455 void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); } 3456 3457 void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) { 3458 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3459 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3460 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3461 VIXL_ASSERT(allow_macro_instructions_); 3462 VIXL_ASSERT(OutsideITBlock()); 3463 MacroEmissionCheckScope guard(this); 3464 bool can_use_it = 3465 // SBC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 3466 operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) && 3467 operand.GetBaseRegister().IsLow(); 3468 ITScope it_scope(this, &cond, can_use_it); 3469 sbc(cond, rd, rn, operand); 3470 } 3471 void Sbc(Register rd, Register rn, const Operand& operand) { 3472 Sbc(al, rd, rn, operand); 3473 } 3474 void Sbc(FlagsUpdate flags, 3475 Condition cond, 3476 Register rd, 3477 Register rn, 3478 const Operand& operand) { 3479 switch (flags) { 3480 case LeaveFlags: 3481 Sbc(cond, rd, rn, operand); 3482 break; 3483 case SetFlags: 3484 Sbcs(cond, rd, rn, operand); 3485 break; 3486 case DontCare: 3487 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && 3488 rn.Is(rd) && operand.IsPlainRegister() && 3489 operand.GetBaseRegister().IsLow(); 3490 if (setflags_is_smaller) { 3491 Sbcs(cond, rd, rn, operand); 3492 } else { 3493 Sbc(cond, rd, rn, operand); 3494 } 3495 break; 3496 } 3497 } 3498 void Sbc(FlagsUpdate flags, 3499 Register rd, 3500 Register rn, 3501 const Operand& operand) { 3502 Sbc(flags, al, rd, rn, operand); 3503 } 3504 3505 void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) { 3506 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3507 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3508 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3509 VIXL_ASSERT(allow_macro_instructions_); 3510 VIXL_ASSERT(OutsideITBlock()); 3511 MacroEmissionCheckScope guard(this); 3512 ITScope it_scope(this, &cond); 3513 sbcs(cond, rd, rn, operand); 3514 } 3515 void Sbcs(Register rd, Register rn, const Operand& operand) { 3516 Sbcs(al, rd, rn, operand); 3517 } 3518 3519 void Sbfx(Condition cond, 3520 Register rd, 3521 Register rn, 3522 uint32_t lsb, 3523 const Operand& operand) { 3524 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3525 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3526 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3527 VIXL_ASSERT(allow_macro_instructions_); 3528 VIXL_ASSERT(OutsideITBlock()); 3529 MacroEmissionCheckScope guard(this); 3530 ITScope it_scope(this, &cond); 3531 sbfx(cond, rd, rn, lsb, operand); 3532 } 3533 void Sbfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) { 3534 Sbfx(al, rd, rn, lsb, operand); 3535 } 3536 3537 void Sdiv(Condition cond, Register rd, Register rn, Register rm) { 3538 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3539 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3540 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3541 VIXL_ASSERT(allow_macro_instructions_); 3542 VIXL_ASSERT(OutsideITBlock()); 3543 MacroEmissionCheckScope guard(this); 3544 ITScope it_scope(this, &cond); 3545 sdiv(cond, rd, rn, rm); 3546 } 3547 void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); } 3548 3549 void Sel(Condition cond, Register rd, Register rn, Register rm) { 3550 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3551 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3552 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3553 VIXL_ASSERT(allow_macro_instructions_); 3554 VIXL_ASSERT(OutsideITBlock()); 3555 MacroEmissionCheckScope guard(this); 3556 ITScope it_scope(this, &cond); 3557 sel(cond, rd, rn, rm); 3558 } 3559 void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); } 3560 3561 void Shadd16(Condition cond, Register rd, Register rn, Register rm) { 3562 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3563 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3564 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3565 VIXL_ASSERT(allow_macro_instructions_); 3566 VIXL_ASSERT(OutsideITBlock()); 3567 MacroEmissionCheckScope guard(this); 3568 ITScope it_scope(this, &cond); 3569 shadd16(cond, rd, rn, rm); 3570 } 3571 void Shadd16(Register rd, Register rn, Register rm) { 3572 Shadd16(al, rd, rn, rm); 3573 } 3574 3575 void Shadd8(Condition cond, Register rd, Register rn, Register rm) { 3576 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3577 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3578 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3579 VIXL_ASSERT(allow_macro_instructions_); 3580 VIXL_ASSERT(OutsideITBlock()); 3581 MacroEmissionCheckScope guard(this); 3582 ITScope it_scope(this, &cond); 3583 shadd8(cond, rd, rn, rm); 3584 } 3585 void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); } 3586 3587 void Shasx(Condition cond, Register rd, Register rn, Register rm) { 3588 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3589 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3590 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3591 VIXL_ASSERT(allow_macro_instructions_); 3592 VIXL_ASSERT(OutsideITBlock()); 3593 MacroEmissionCheckScope guard(this); 3594 ITScope it_scope(this, &cond); 3595 shasx(cond, rd, rn, rm); 3596 } 3597 void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); } 3598 3599 void Shsax(Condition cond, Register rd, Register rn, Register rm) { 3600 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3601 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3602 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3603 VIXL_ASSERT(allow_macro_instructions_); 3604 VIXL_ASSERT(OutsideITBlock()); 3605 MacroEmissionCheckScope guard(this); 3606 ITScope it_scope(this, &cond); 3607 shsax(cond, rd, rn, rm); 3608 } 3609 void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); } 3610 3611 void Shsub16(Condition cond, Register rd, Register rn, Register rm) { 3612 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3613 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3614 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3615 VIXL_ASSERT(allow_macro_instructions_); 3616 VIXL_ASSERT(OutsideITBlock()); 3617 MacroEmissionCheckScope guard(this); 3618 ITScope it_scope(this, &cond); 3619 shsub16(cond, rd, rn, rm); 3620 } 3621 void Shsub16(Register rd, Register rn, Register rm) { 3622 Shsub16(al, rd, rn, rm); 3623 } 3624 3625 void Shsub8(Condition cond, Register rd, Register rn, Register rm) { 3626 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3627 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3628 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3629 VIXL_ASSERT(allow_macro_instructions_); 3630 VIXL_ASSERT(OutsideITBlock()); 3631 MacroEmissionCheckScope guard(this); 3632 ITScope it_scope(this, &cond); 3633 shsub8(cond, rd, rn, rm); 3634 } 3635 void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); } 3636 3637 void Smlabb( 3638 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3639 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3640 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3641 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3642 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3643 VIXL_ASSERT(allow_macro_instructions_); 3644 VIXL_ASSERT(OutsideITBlock()); 3645 MacroEmissionCheckScope guard(this); 3646 ITScope it_scope(this, &cond); 3647 smlabb(cond, rd, rn, rm, ra); 3648 } 3649 void Smlabb(Register rd, Register rn, Register rm, Register ra) { 3650 Smlabb(al, rd, rn, rm, ra); 3651 } 3652 3653 void Smlabt( 3654 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3655 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3656 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3657 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3658 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3659 VIXL_ASSERT(allow_macro_instructions_); 3660 VIXL_ASSERT(OutsideITBlock()); 3661 MacroEmissionCheckScope guard(this); 3662 ITScope it_scope(this, &cond); 3663 smlabt(cond, rd, rn, rm, ra); 3664 } 3665 void Smlabt(Register rd, Register rn, Register rm, Register ra) { 3666 Smlabt(al, rd, rn, rm, ra); 3667 } 3668 3669 void Smlad( 3670 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3671 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3672 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3673 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3674 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3675 VIXL_ASSERT(allow_macro_instructions_); 3676 VIXL_ASSERT(OutsideITBlock()); 3677 MacroEmissionCheckScope guard(this); 3678 ITScope it_scope(this, &cond); 3679 smlad(cond, rd, rn, rm, ra); 3680 } 3681 void Smlad(Register rd, Register rn, Register rm, Register ra) { 3682 Smlad(al, rd, rn, rm, ra); 3683 } 3684 3685 void Smladx( 3686 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3687 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3688 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3689 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3690 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3691 VIXL_ASSERT(allow_macro_instructions_); 3692 VIXL_ASSERT(OutsideITBlock()); 3693 MacroEmissionCheckScope guard(this); 3694 ITScope it_scope(this, &cond); 3695 smladx(cond, rd, rn, rm, ra); 3696 } 3697 void Smladx(Register rd, Register rn, Register rm, Register ra) { 3698 Smladx(al, rd, rn, rm, ra); 3699 } 3700 3701 void Smlal( 3702 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3703 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3704 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3705 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3706 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3707 VIXL_ASSERT(allow_macro_instructions_); 3708 VIXL_ASSERT(OutsideITBlock()); 3709 MacroEmissionCheckScope guard(this); 3710 ITScope it_scope(this, &cond); 3711 smlal(cond, rdlo, rdhi, rn, rm); 3712 } 3713 void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) { 3714 Smlal(al, rdlo, rdhi, rn, rm); 3715 } 3716 3717 void Smlalbb( 3718 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3719 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3720 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3721 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3722 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3723 VIXL_ASSERT(allow_macro_instructions_); 3724 VIXL_ASSERT(OutsideITBlock()); 3725 MacroEmissionCheckScope guard(this); 3726 ITScope it_scope(this, &cond); 3727 smlalbb(cond, rdlo, rdhi, rn, rm); 3728 } 3729 void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) { 3730 Smlalbb(al, rdlo, rdhi, rn, rm); 3731 } 3732 3733 void Smlalbt( 3734 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3735 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3736 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3737 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3738 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3739 VIXL_ASSERT(allow_macro_instructions_); 3740 VIXL_ASSERT(OutsideITBlock()); 3741 MacroEmissionCheckScope guard(this); 3742 ITScope it_scope(this, &cond); 3743 smlalbt(cond, rdlo, rdhi, rn, rm); 3744 } 3745 void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) { 3746 Smlalbt(al, rdlo, rdhi, rn, rm); 3747 } 3748 3749 void Smlald( 3750 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3751 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3752 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3753 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3754 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3755 VIXL_ASSERT(allow_macro_instructions_); 3756 VIXL_ASSERT(OutsideITBlock()); 3757 MacroEmissionCheckScope guard(this); 3758 ITScope it_scope(this, &cond); 3759 smlald(cond, rdlo, rdhi, rn, rm); 3760 } 3761 void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) { 3762 Smlald(al, rdlo, rdhi, rn, rm); 3763 } 3764 3765 void Smlaldx( 3766 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3767 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3768 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3769 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3770 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3771 VIXL_ASSERT(allow_macro_instructions_); 3772 VIXL_ASSERT(OutsideITBlock()); 3773 MacroEmissionCheckScope guard(this); 3774 ITScope it_scope(this, &cond); 3775 smlaldx(cond, rdlo, rdhi, rn, rm); 3776 } 3777 void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) { 3778 Smlaldx(al, rdlo, rdhi, rn, rm); 3779 } 3780 3781 void Smlals( 3782 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3783 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3784 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3785 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3786 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3787 VIXL_ASSERT(allow_macro_instructions_); 3788 VIXL_ASSERT(OutsideITBlock()); 3789 MacroEmissionCheckScope guard(this); 3790 ITScope it_scope(this, &cond); 3791 smlals(cond, rdlo, rdhi, rn, rm); 3792 } 3793 void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) { 3794 Smlals(al, rdlo, rdhi, rn, rm); 3795 } 3796 3797 void Smlaltb( 3798 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3799 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3800 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3801 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3802 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3803 VIXL_ASSERT(allow_macro_instructions_); 3804 VIXL_ASSERT(OutsideITBlock()); 3805 MacroEmissionCheckScope guard(this); 3806 ITScope it_scope(this, &cond); 3807 smlaltb(cond, rdlo, rdhi, rn, rm); 3808 } 3809 void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) { 3810 Smlaltb(al, rdlo, rdhi, rn, rm); 3811 } 3812 3813 void Smlaltt( 3814 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3815 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3816 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3817 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3818 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3819 VIXL_ASSERT(allow_macro_instructions_); 3820 VIXL_ASSERT(OutsideITBlock()); 3821 MacroEmissionCheckScope guard(this); 3822 ITScope it_scope(this, &cond); 3823 smlaltt(cond, rdlo, rdhi, rn, rm); 3824 } 3825 void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) { 3826 Smlaltt(al, rdlo, rdhi, rn, rm); 3827 } 3828 3829 void Smlatb( 3830 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3831 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3832 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3833 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3834 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3835 VIXL_ASSERT(allow_macro_instructions_); 3836 VIXL_ASSERT(OutsideITBlock()); 3837 MacroEmissionCheckScope guard(this); 3838 ITScope it_scope(this, &cond); 3839 smlatb(cond, rd, rn, rm, ra); 3840 } 3841 void Smlatb(Register rd, Register rn, Register rm, Register ra) { 3842 Smlatb(al, rd, rn, rm, ra); 3843 } 3844 3845 void Smlatt( 3846 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3847 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3848 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3849 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3850 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3851 VIXL_ASSERT(allow_macro_instructions_); 3852 VIXL_ASSERT(OutsideITBlock()); 3853 MacroEmissionCheckScope guard(this); 3854 ITScope it_scope(this, &cond); 3855 smlatt(cond, rd, rn, rm, ra); 3856 } 3857 void Smlatt(Register rd, Register rn, Register rm, Register ra) { 3858 Smlatt(al, rd, rn, rm, ra); 3859 } 3860 3861 void Smlawb( 3862 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3863 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3864 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3865 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3866 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3867 VIXL_ASSERT(allow_macro_instructions_); 3868 VIXL_ASSERT(OutsideITBlock()); 3869 MacroEmissionCheckScope guard(this); 3870 ITScope it_scope(this, &cond); 3871 smlawb(cond, rd, rn, rm, ra); 3872 } 3873 void Smlawb(Register rd, Register rn, Register rm, Register ra) { 3874 Smlawb(al, rd, rn, rm, ra); 3875 } 3876 3877 void Smlawt( 3878 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3879 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3880 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3881 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3882 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3883 VIXL_ASSERT(allow_macro_instructions_); 3884 VIXL_ASSERT(OutsideITBlock()); 3885 MacroEmissionCheckScope guard(this); 3886 ITScope it_scope(this, &cond); 3887 smlawt(cond, rd, rn, rm, ra); 3888 } 3889 void Smlawt(Register rd, Register rn, Register rm, Register ra) { 3890 Smlawt(al, rd, rn, rm, ra); 3891 } 3892 3893 void Smlsd( 3894 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3895 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3896 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3897 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3898 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3899 VIXL_ASSERT(allow_macro_instructions_); 3900 VIXL_ASSERT(OutsideITBlock()); 3901 MacroEmissionCheckScope guard(this); 3902 ITScope it_scope(this, &cond); 3903 smlsd(cond, rd, rn, rm, ra); 3904 } 3905 void Smlsd(Register rd, Register rn, Register rm, Register ra) { 3906 Smlsd(al, rd, rn, rm, ra); 3907 } 3908 3909 void Smlsdx( 3910 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3911 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3912 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3913 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3914 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3915 VIXL_ASSERT(allow_macro_instructions_); 3916 VIXL_ASSERT(OutsideITBlock()); 3917 MacroEmissionCheckScope guard(this); 3918 ITScope it_scope(this, &cond); 3919 smlsdx(cond, rd, rn, rm, ra); 3920 } 3921 void Smlsdx(Register rd, Register rn, Register rm, Register ra) { 3922 Smlsdx(al, rd, rn, rm, ra); 3923 } 3924 3925 void Smlsld( 3926 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3927 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3928 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3929 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3930 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3931 VIXL_ASSERT(allow_macro_instructions_); 3932 VIXL_ASSERT(OutsideITBlock()); 3933 MacroEmissionCheckScope guard(this); 3934 ITScope it_scope(this, &cond); 3935 smlsld(cond, rdlo, rdhi, rn, rm); 3936 } 3937 void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) { 3938 Smlsld(al, rdlo, rdhi, rn, rm); 3939 } 3940 3941 void Smlsldx( 3942 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3943 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3944 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3945 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3946 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3947 VIXL_ASSERT(allow_macro_instructions_); 3948 VIXL_ASSERT(OutsideITBlock()); 3949 MacroEmissionCheckScope guard(this); 3950 ITScope it_scope(this, &cond); 3951 smlsldx(cond, rdlo, rdhi, rn, rm); 3952 } 3953 void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) { 3954 Smlsldx(al, rdlo, rdhi, rn, rm); 3955 } 3956 3957 void Smmla( 3958 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3959 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3960 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3961 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3962 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3963 VIXL_ASSERT(allow_macro_instructions_); 3964 VIXL_ASSERT(OutsideITBlock()); 3965 MacroEmissionCheckScope guard(this); 3966 ITScope it_scope(this, &cond); 3967 smmla(cond, rd, rn, rm, ra); 3968 } 3969 void Smmla(Register rd, Register rn, Register rm, Register ra) { 3970 Smmla(al, rd, rn, rm, ra); 3971 } 3972 3973 void Smmlar( 3974 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3975 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3976 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3977 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3978 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3979 VIXL_ASSERT(allow_macro_instructions_); 3980 VIXL_ASSERT(OutsideITBlock()); 3981 MacroEmissionCheckScope guard(this); 3982 ITScope it_scope(this, &cond); 3983 smmlar(cond, rd, rn, rm, ra); 3984 } 3985 void Smmlar(Register rd, Register rn, Register rm, Register ra) { 3986 Smmlar(al, rd, rn, rm, ra); 3987 } 3988 3989 void Smmls( 3990 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3992 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3993 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3994 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3995 VIXL_ASSERT(allow_macro_instructions_); 3996 VIXL_ASSERT(OutsideITBlock()); 3997 MacroEmissionCheckScope guard(this); 3998 ITScope it_scope(this, &cond); 3999 smmls(cond, rd, rn, rm, ra); 4000 } 4001 void Smmls(Register rd, Register rn, Register rm, Register ra) { 4002 Smmls(al, rd, rn, rm, ra); 4003 } 4004 4005 void Smmlsr( 4006 Condition cond, Register rd, Register rn, Register rm, Register ra) { 4007 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4008 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4009 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4010 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 4011 VIXL_ASSERT(allow_macro_instructions_); 4012 VIXL_ASSERT(OutsideITBlock()); 4013 MacroEmissionCheckScope guard(this); 4014 ITScope it_scope(this, &cond); 4015 smmlsr(cond, rd, rn, rm, ra); 4016 } 4017 void Smmlsr(Register rd, Register rn, Register rm, Register ra) { 4018 Smmlsr(al, rd, rn, rm, ra); 4019 } 4020 4021 void Smmul(Condition cond, Register rd, Register rn, Register rm) { 4022 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4023 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4024 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4025 VIXL_ASSERT(allow_macro_instructions_); 4026 VIXL_ASSERT(OutsideITBlock()); 4027 MacroEmissionCheckScope guard(this); 4028 ITScope it_scope(this, &cond); 4029 smmul(cond, rd, rn, rm); 4030 } 4031 void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); } 4032 4033 void Smmulr(Condition cond, Register rd, Register rn, Register rm) { 4034 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4035 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4036 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4037 VIXL_ASSERT(allow_macro_instructions_); 4038 VIXL_ASSERT(OutsideITBlock()); 4039 MacroEmissionCheckScope guard(this); 4040 ITScope it_scope(this, &cond); 4041 smmulr(cond, rd, rn, rm); 4042 } 4043 void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); } 4044 4045 void Smuad(Condition cond, Register rd, Register rn, Register rm) { 4046 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4047 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4048 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4049 VIXL_ASSERT(allow_macro_instructions_); 4050 VIXL_ASSERT(OutsideITBlock()); 4051 MacroEmissionCheckScope guard(this); 4052 ITScope it_scope(this, &cond); 4053 smuad(cond, rd, rn, rm); 4054 } 4055 void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); } 4056 4057 void Smuadx(Condition cond, Register rd, Register rn, Register rm) { 4058 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4059 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4060 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4061 VIXL_ASSERT(allow_macro_instructions_); 4062 VIXL_ASSERT(OutsideITBlock()); 4063 MacroEmissionCheckScope guard(this); 4064 ITScope it_scope(this, &cond); 4065 smuadx(cond, rd, rn, rm); 4066 } 4067 void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); } 4068 4069 void Smulbb(Condition cond, Register rd, Register rn, Register rm) { 4070 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4071 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4072 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4073 VIXL_ASSERT(allow_macro_instructions_); 4074 VIXL_ASSERT(OutsideITBlock()); 4075 MacroEmissionCheckScope guard(this); 4076 ITScope it_scope(this, &cond); 4077 smulbb(cond, rd, rn, rm); 4078 } 4079 void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); } 4080 4081 void Smulbt(Condition cond, Register rd, Register rn, Register rm) { 4082 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4083 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4084 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4085 VIXL_ASSERT(allow_macro_instructions_); 4086 VIXL_ASSERT(OutsideITBlock()); 4087 MacroEmissionCheckScope guard(this); 4088 ITScope it_scope(this, &cond); 4089 smulbt(cond, rd, rn, rm); 4090 } 4091 void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); } 4092 4093 void Smull( 4094 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4095 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4096 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4097 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4098 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4099 VIXL_ASSERT(allow_macro_instructions_); 4100 VIXL_ASSERT(OutsideITBlock()); 4101 MacroEmissionCheckScope guard(this); 4102 ITScope it_scope(this, &cond); 4103 smull(cond, rdlo, rdhi, rn, rm); 4104 } 4105 void Smull(Register rdlo, Register rdhi, Register rn, Register rm) { 4106 Smull(al, rdlo, rdhi, rn, rm); 4107 } 4108 void Smull(FlagsUpdate flags, 4109 Condition cond, 4110 Register rdlo, 4111 Register rdhi, 4112 Register rn, 4113 Register rm) { 4114 switch (flags) { 4115 case LeaveFlags: 4116 Smull(cond, rdlo, rdhi, rn, rm); 4117 break; 4118 case SetFlags: 4119 Smulls(cond, rdlo, rdhi, rn, rm); 4120 break; 4121 case DontCare: 4122 Smull(cond, rdlo, rdhi, rn, rm); 4123 break; 4124 } 4125 } 4126 void Smull(FlagsUpdate flags, 4127 Register rdlo, 4128 Register rdhi, 4129 Register rn, 4130 Register rm) { 4131 Smull(flags, al, rdlo, rdhi, rn, rm); 4132 } 4133 4134 void Smulls( 4135 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4136 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4137 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4138 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4139 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4140 VIXL_ASSERT(allow_macro_instructions_); 4141 VIXL_ASSERT(OutsideITBlock()); 4142 MacroEmissionCheckScope guard(this); 4143 ITScope it_scope(this, &cond); 4144 smulls(cond, rdlo, rdhi, rn, rm); 4145 } 4146 void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) { 4147 Smulls(al, rdlo, rdhi, rn, rm); 4148 } 4149 4150 void Smultb(Condition cond, Register rd, Register rn, Register rm) { 4151 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4152 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4153 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4154 VIXL_ASSERT(allow_macro_instructions_); 4155 VIXL_ASSERT(OutsideITBlock()); 4156 MacroEmissionCheckScope guard(this); 4157 ITScope it_scope(this, &cond); 4158 smultb(cond, rd, rn, rm); 4159 } 4160 void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); } 4161 4162 void Smultt(Condition cond, Register rd, Register rn, Register rm) { 4163 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4164 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4165 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4166 VIXL_ASSERT(allow_macro_instructions_); 4167 VIXL_ASSERT(OutsideITBlock()); 4168 MacroEmissionCheckScope guard(this); 4169 ITScope it_scope(this, &cond); 4170 smultt(cond, rd, rn, rm); 4171 } 4172 void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); } 4173 4174 void Smulwb(Condition cond, Register rd, Register rn, Register rm) { 4175 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4176 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4177 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4178 VIXL_ASSERT(allow_macro_instructions_); 4179 VIXL_ASSERT(OutsideITBlock()); 4180 MacroEmissionCheckScope guard(this); 4181 ITScope it_scope(this, &cond); 4182 smulwb(cond, rd, rn, rm); 4183 } 4184 void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); } 4185 4186 void Smulwt(Condition cond, Register rd, Register rn, Register rm) { 4187 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4188 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4189 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4190 VIXL_ASSERT(allow_macro_instructions_); 4191 VIXL_ASSERT(OutsideITBlock()); 4192 MacroEmissionCheckScope guard(this); 4193 ITScope it_scope(this, &cond); 4194 smulwt(cond, rd, rn, rm); 4195 } 4196 void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); } 4197 4198 void Smusd(Condition cond, Register rd, Register rn, Register rm) { 4199 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4200 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4201 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4202 VIXL_ASSERT(allow_macro_instructions_); 4203 VIXL_ASSERT(OutsideITBlock()); 4204 MacroEmissionCheckScope guard(this); 4205 ITScope it_scope(this, &cond); 4206 smusd(cond, rd, rn, rm); 4207 } 4208 void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); } 4209 4210 void Smusdx(Condition cond, Register rd, Register rn, Register rm) { 4211 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4212 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4213 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4214 VIXL_ASSERT(allow_macro_instructions_); 4215 VIXL_ASSERT(OutsideITBlock()); 4216 MacroEmissionCheckScope guard(this); 4217 ITScope it_scope(this, &cond); 4218 smusdx(cond, rd, rn, rm); 4219 } 4220 void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); } 4221 4222 void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) { 4223 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4224 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4225 VIXL_ASSERT(allow_macro_instructions_); 4226 VIXL_ASSERT(OutsideITBlock()); 4227 MacroEmissionCheckScope guard(this); 4228 ITScope it_scope(this, &cond); 4229 ssat(cond, rd, imm, operand); 4230 } 4231 void Ssat(Register rd, uint32_t imm, const Operand& operand) { 4232 Ssat(al, rd, imm, operand); 4233 } 4234 4235 void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) { 4236 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4237 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4238 VIXL_ASSERT(allow_macro_instructions_); 4239 VIXL_ASSERT(OutsideITBlock()); 4240 MacroEmissionCheckScope guard(this); 4241 ITScope it_scope(this, &cond); 4242 ssat16(cond, rd, imm, rn); 4243 } 4244 void Ssat16(Register rd, uint32_t imm, Register rn) { 4245 Ssat16(al, rd, imm, rn); 4246 } 4247 4248 void Ssax(Condition cond, Register rd, Register rn, Register rm) { 4249 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4250 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4251 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4252 VIXL_ASSERT(allow_macro_instructions_); 4253 VIXL_ASSERT(OutsideITBlock()); 4254 MacroEmissionCheckScope guard(this); 4255 ITScope it_scope(this, &cond); 4256 ssax(cond, rd, rn, rm); 4257 } 4258 void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); } 4259 4260 void Ssub16(Condition cond, Register rd, Register rn, Register rm) { 4261 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4262 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4263 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4264 VIXL_ASSERT(allow_macro_instructions_); 4265 VIXL_ASSERT(OutsideITBlock()); 4266 MacroEmissionCheckScope guard(this); 4267 ITScope it_scope(this, &cond); 4268 ssub16(cond, rd, rn, rm); 4269 } 4270 void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); } 4271 4272 void Ssub8(Condition cond, Register rd, Register rn, Register rm) { 4273 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4274 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4275 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4276 VIXL_ASSERT(allow_macro_instructions_); 4277 VIXL_ASSERT(OutsideITBlock()); 4278 MacroEmissionCheckScope guard(this); 4279 ITScope it_scope(this, &cond); 4280 ssub8(cond, rd, rn, rm); 4281 } 4282 void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); } 4283 4284 void Stl(Condition cond, Register rt, const MemOperand& operand) { 4285 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4286 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4287 VIXL_ASSERT(allow_macro_instructions_); 4288 VIXL_ASSERT(OutsideITBlock()); 4289 MacroEmissionCheckScope guard(this); 4290 ITScope it_scope(this, &cond); 4291 stl(cond, rt, operand); 4292 } 4293 void Stl(Register rt, const MemOperand& operand) { Stl(al, rt, operand); } 4294 4295 void Stlb(Condition cond, Register rt, const MemOperand& operand) { 4296 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4297 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4298 VIXL_ASSERT(allow_macro_instructions_); 4299 VIXL_ASSERT(OutsideITBlock()); 4300 MacroEmissionCheckScope guard(this); 4301 ITScope it_scope(this, &cond); 4302 stlb(cond, rt, operand); 4303 } 4304 void Stlb(Register rt, const MemOperand& operand) { Stlb(al, rt, operand); } 4305 4306 void Stlex(Condition cond, 4307 Register rd, 4308 Register rt, 4309 const MemOperand& operand) { 4310 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4311 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4312 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4313 VIXL_ASSERT(allow_macro_instructions_); 4314 VIXL_ASSERT(OutsideITBlock()); 4315 MacroEmissionCheckScope guard(this); 4316 ITScope it_scope(this, &cond); 4317 stlex(cond, rd, rt, operand); 4318 } 4319 void Stlex(Register rd, Register rt, const MemOperand& operand) { 4320 Stlex(al, rd, rt, operand); 4321 } 4322 4323 void Stlexb(Condition cond, 4324 Register rd, 4325 Register rt, 4326 const MemOperand& operand) { 4327 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4328 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4329 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4330 VIXL_ASSERT(allow_macro_instructions_); 4331 VIXL_ASSERT(OutsideITBlock()); 4332 MacroEmissionCheckScope guard(this); 4333 ITScope it_scope(this, &cond); 4334 stlexb(cond, rd, rt, operand); 4335 } 4336 void Stlexb(Register rd, Register rt, const MemOperand& operand) { 4337 Stlexb(al, rd, rt, operand); 4338 } 4339 4340 void Stlexd(Condition cond, 4341 Register rd, 4342 Register rt, 4343 Register rt2, 4344 const MemOperand& operand) { 4345 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4346 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4347 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 4348 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4349 VIXL_ASSERT(allow_macro_instructions_); 4350 VIXL_ASSERT(OutsideITBlock()); 4351 MacroEmissionCheckScope guard(this); 4352 ITScope it_scope(this, &cond); 4353 stlexd(cond, rd, rt, rt2, operand); 4354 } 4355 void Stlexd(Register rd, 4356 Register rt, 4357 Register rt2, 4358 const MemOperand& operand) { 4359 Stlexd(al, rd, rt, rt2, operand); 4360 } 4361 4362 void Stlexh(Condition cond, 4363 Register rd, 4364 Register rt, 4365 const MemOperand& operand) { 4366 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4367 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4368 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4369 VIXL_ASSERT(allow_macro_instructions_); 4370 VIXL_ASSERT(OutsideITBlock()); 4371 MacroEmissionCheckScope guard(this); 4372 ITScope it_scope(this, &cond); 4373 stlexh(cond, rd, rt, operand); 4374 } 4375 void Stlexh(Register rd, Register rt, const MemOperand& operand) { 4376 Stlexh(al, rd, rt, operand); 4377 } 4378 4379 void Stlh(Condition cond, Register rt, const MemOperand& operand) { 4380 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4381 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4382 VIXL_ASSERT(allow_macro_instructions_); 4383 VIXL_ASSERT(OutsideITBlock()); 4384 MacroEmissionCheckScope guard(this); 4385 ITScope it_scope(this, &cond); 4386 stlh(cond, rt, operand); 4387 } 4388 void Stlh(Register rt, const MemOperand& operand) { Stlh(al, rt, operand); } 4389 4390 void Stm(Condition cond, 4391 Register rn, 4392 WriteBack write_back, 4393 RegisterList registers) { 4394 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4395 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4396 VIXL_ASSERT(allow_macro_instructions_); 4397 VIXL_ASSERT(OutsideITBlock()); 4398 MacroEmissionCheckScope guard(this); 4399 ITScope it_scope(this, &cond); 4400 stm(cond, rn, write_back, registers); 4401 } 4402 void Stm(Register rn, WriteBack write_back, RegisterList registers) { 4403 Stm(al, rn, write_back, registers); 4404 } 4405 4406 void Stmda(Condition cond, 4407 Register rn, 4408 WriteBack write_back, 4409 RegisterList registers) { 4410 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4411 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4412 VIXL_ASSERT(allow_macro_instructions_); 4413 VIXL_ASSERT(OutsideITBlock()); 4414 MacroEmissionCheckScope guard(this); 4415 ITScope it_scope(this, &cond); 4416 stmda(cond, rn, write_back, registers); 4417 } 4418 void Stmda(Register rn, WriteBack write_back, RegisterList registers) { 4419 Stmda(al, rn, write_back, registers); 4420 } 4421 4422 void Stmdb(Condition cond, 4423 Register rn, 4424 WriteBack write_back, 4425 RegisterList registers) { 4426 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4427 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4428 VIXL_ASSERT(allow_macro_instructions_); 4429 VIXL_ASSERT(OutsideITBlock()); 4430 MacroEmissionCheckScope guard(this); 4431 ITScope it_scope(this, &cond); 4432 stmdb(cond, rn, write_back, registers); 4433 } 4434 void Stmdb(Register rn, WriteBack write_back, RegisterList registers) { 4435 Stmdb(al, rn, write_back, registers); 4436 } 4437 4438 void Stmea(Condition cond, 4439 Register rn, 4440 WriteBack write_back, 4441 RegisterList registers) { 4442 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4443 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4444 VIXL_ASSERT(allow_macro_instructions_); 4445 VIXL_ASSERT(OutsideITBlock()); 4446 MacroEmissionCheckScope guard(this); 4447 ITScope it_scope(this, &cond); 4448 stmea(cond, rn, write_back, registers); 4449 } 4450 void Stmea(Register rn, WriteBack write_back, RegisterList registers) { 4451 Stmea(al, rn, write_back, registers); 4452 } 4453 4454 void Stmed(Condition cond, 4455 Register rn, 4456 WriteBack write_back, 4457 RegisterList registers) { 4458 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4459 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4460 VIXL_ASSERT(allow_macro_instructions_); 4461 VIXL_ASSERT(OutsideITBlock()); 4462 MacroEmissionCheckScope guard(this); 4463 ITScope it_scope(this, &cond); 4464 stmed(cond, rn, write_back, registers); 4465 } 4466 void Stmed(Register rn, WriteBack write_back, RegisterList registers) { 4467 Stmed(al, rn, write_back, registers); 4468 } 4469 4470 void Stmfa(Condition cond, 4471 Register rn, 4472 WriteBack write_back, 4473 RegisterList registers) { 4474 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4475 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4476 VIXL_ASSERT(allow_macro_instructions_); 4477 VIXL_ASSERT(OutsideITBlock()); 4478 MacroEmissionCheckScope guard(this); 4479 ITScope it_scope(this, &cond); 4480 stmfa(cond, rn, write_back, registers); 4481 } 4482 void Stmfa(Register rn, WriteBack write_back, RegisterList registers) { 4483 Stmfa(al, rn, write_back, registers); 4484 } 4485 4486 void Stmfd(Condition cond, 4487 Register rn, 4488 WriteBack write_back, 4489 RegisterList registers) { 4490 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4491 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4492 VIXL_ASSERT(allow_macro_instructions_); 4493 VIXL_ASSERT(OutsideITBlock()); 4494 MacroEmissionCheckScope guard(this); 4495 ITScope it_scope(this, &cond); 4496 stmfd(cond, rn, write_back, registers); 4497 } 4498 void Stmfd(Register rn, WriteBack write_back, RegisterList registers) { 4499 Stmfd(al, rn, write_back, registers); 4500 } 4501 4502 void Stmib(Condition cond, 4503 Register rn, 4504 WriteBack write_back, 4505 RegisterList registers) { 4506 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4507 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4508 VIXL_ASSERT(allow_macro_instructions_); 4509 VIXL_ASSERT(OutsideITBlock()); 4510 MacroEmissionCheckScope guard(this); 4511 ITScope it_scope(this, &cond); 4512 stmib(cond, rn, write_back, registers); 4513 } 4514 void Stmib(Register rn, WriteBack write_back, RegisterList registers) { 4515 Stmib(al, rn, write_back, registers); 4516 } 4517 4518 void Str(Condition cond, Register rt, const MemOperand& operand) { 4519 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4520 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4521 VIXL_ASSERT(allow_macro_instructions_); 4522 VIXL_ASSERT(OutsideITBlock()); 4523 MacroEmissionCheckScope guard(this); 4524 bool can_use_it = 4525 // STR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 4526 (operand.IsImmediate() && rt.IsLow() && 4527 operand.GetBaseRegister().IsLow() && 4528 operand.IsOffsetImmediateWithinRange(0, 124, 4) && 4529 (operand.GetAddrMode() == Offset)) || 4530 // STR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2 4531 (operand.IsImmediate() && rt.IsLow() && 4532 operand.GetBaseRegister().IsSP() && 4533 operand.IsOffsetImmediateWithinRange(0, 1020, 4) && 4534 (operand.GetAddrMode() == Offset)) || 4535 // STR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 4536 (operand.IsPlainRegister() && rt.IsLow() && 4537 operand.GetBaseRegister().IsLow() && 4538 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 4539 (operand.GetAddrMode() == Offset)); 4540 ITScope it_scope(this, &cond, can_use_it); 4541 str(cond, rt, operand); 4542 } 4543 void Str(Register rt, const MemOperand& operand) { Str(al, rt, operand); } 4544 4545 void Strb(Condition cond, Register rt, const MemOperand& operand) { 4546 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4547 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4548 VIXL_ASSERT(allow_macro_instructions_); 4549 VIXL_ASSERT(OutsideITBlock()); 4550 MacroEmissionCheckScope guard(this); 4551 bool can_use_it = 4552 // STRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 4553 (operand.IsImmediate() && rt.IsLow() && 4554 operand.GetBaseRegister().IsLow() && 4555 operand.IsOffsetImmediateWithinRange(0, 31) && 4556 (operand.GetAddrMode() == Offset)) || 4557 // STRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 4558 (operand.IsPlainRegister() && rt.IsLow() && 4559 operand.GetBaseRegister().IsLow() && 4560 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 4561 (operand.GetAddrMode() == Offset)); 4562 ITScope it_scope(this, &cond, can_use_it); 4563 strb(cond, rt, operand); 4564 } 4565 void Strb(Register rt, const MemOperand& operand) { Strb(al, rt, operand); } 4566 4567 void Strd(Condition cond, 4568 Register rt, 4569 Register rt2, 4570 const MemOperand& operand) { 4571 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4572 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 4573 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4574 VIXL_ASSERT(allow_macro_instructions_); 4575 VIXL_ASSERT(OutsideITBlock()); 4576 MacroEmissionCheckScope guard(this); 4577 ITScope it_scope(this, &cond); 4578 strd(cond, rt, rt2, operand); 4579 } 4580 void Strd(Register rt, Register rt2, const MemOperand& operand) { 4581 Strd(al, rt, rt2, operand); 4582 } 4583 4584 void Strex(Condition cond, 4585 Register rd, 4586 Register rt, 4587 const MemOperand& operand) { 4588 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4589 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4590 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4591 VIXL_ASSERT(allow_macro_instructions_); 4592 VIXL_ASSERT(OutsideITBlock()); 4593 MacroEmissionCheckScope guard(this); 4594 ITScope it_scope(this, &cond); 4595 strex(cond, rd, rt, operand); 4596 } 4597 void Strex(Register rd, Register rt, const MemOperand& operand) { 4598 Strex(al, rd, rt, operand); 4599 } 4600 4601 void Strexb(Condition cond, 4602 Register rd, 4603 Register rt, 4604 const MemOperand& operand) { 4605 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4606 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4607 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4608 VIXL_ASSERT(allow_macro_instructions_); 4609 VIXL_ASSERT(OutsideITBlock()); 4610 MacroEmissionCheckScope guard(this); 4611 ITScope it_scope(this, &cond); 4612 strexb(cond, rd, rt, operand); 4613 } 4614 void Strexb(Register rd, Register rt, const MemOperand& operand) { 4615 Strexb(al, rd, rt, operand); 4616 } 4617 4618 void Strexd(Condition cond, 4619 Register rd, 4620 Register rt, 4621 Register rt2, 4622 const MemOperand& operand) { 4623 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4624 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4625 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 4626 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4627 VIXL_ASSERT(allow_macro_instructions_); 4628 VIXL_ASSERT(OutsideITBlock()); 4629 MacroEmissionCheckScope guard(this); 4630 ITScope it_scope(this, &cond); 4631 strexd(cond, rd, rt, rt2, operand); 4632 } 4633 void Strexd(Register rd, 4634 Register rt, 4635 Register rt2, 4636 const MemOperand& operand) { 4637 Strexd(al, rd, rt, rt2, operand); 4638 } 4639 4640 void Strexh(Condition cond, 4641 Register rd, 4642 Register rt, 4643 const MemOperand& operand) { 4644 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4645 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4646 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4647 VIXL_ASSERT(allow_macro_instructions_); 4648 VIXL_ASSERT(OutsideITBlock()); 4649 MacroEmissionCheckScope guard(this); 4650 ITScope it_scope(this, &cond); 4651 strexh(cond, rd, rt, operand); 4652 } 4653 void Strexh(Register rd, Register rt, const MemOperand& operand) { 4654 Strexh(al, rd, rt, operand); 4655 } 4656 4657 void Strh(Condition cond, Register rt, const MemOperand& operand) { 4658 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4659 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4660 VIXL_ASSERT(allow_macro_instructions_); 4661 VIXL_ASSERT(OutsideITBlock()); 4662 MacroEmissionCheckScope guard(this); 4663 bool can_use_it = 4664 // STRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 4665 (operand.IsImmediate() && rt.IsLow() && 4666 operand.GetBaseRegister().IsLow() && 4667 operand.IsOffsetImmediateWithinRange(0, 62, 2) && 4668 (operand.GetAddrMode() == Offset)) || 4669 // STRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 4670 (operand.IsPlainRegister() && rt.IsLow() && 4671 operand.GetBaseRegister().IsLow() && 4672 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 4673 (operand.GetAddrMode() == Offset)); 4674 ITScope it_scope(this, &cond, can_use_it); 4675 strh(cond, rt, operand); 4676 } 4677 void Strh(Register rt, const MemOperand& operand) { Strh(al, rt, operand); } 4678 4679 void Sub(Condition cond, Register rd, Register rn, const Operand& operand) { 4680 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4681 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4682 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4683 VIXL_ASSERT(allow_macro_instructions_); 4684 VIXL_ASSERT(OutsideITBlock()); 4685 MacroEmissionCheckScope guard(this); 4686 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) { 4687 uint32_t immediate = operand.GetImmediate(); 4688 if (immediate == 0) { 4689 return; 4690 } 4691 } 4692 bool can_use_it = 4693 // SUB<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1 4694 (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() && 4695 rd.IsLow()) || 4696 // SUB<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2 4697 (operand.IsImmediate() && (operand.GetImmediate() <= 255) && 4698 rd.IsLow() && rn.Is(rd)) || 4699 // SUB<c>{<q>} <Rd>, <Rn>, <Rm> 4700 (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 4701 operand.GetBaseRegister().IsLow()); 4702 ITScope it_scope(this, &cond, can_use_it); 4703 sub(cond, rd, rn, operand); 4704 } 4705 void Sub(Register rd, Register rn, const Operand& operand) { 4706 Sub(al, rd, rn, operand); 4707 } 4708 void Sub(FlagsUpdate flags, 4709 Condition cond, 4710 Register rd, 4711 Register rn, 4712 const Operand& operand) { 4713 switch (flags) { 4714 case LeaveFlags: 4715 Sub(cond, rd, rn, operand); 4716 break; 4717 case SetFlags: 4718 Subs(cond, rd, rn, operand); 4719 break; 4720 case DontCare: 4721 bool setflags_is_smaller = 4722 IsUsingT32() && cond.Is(al) && 4723 ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 4724 operand.GetBaseRegister().IsLow()) || 4725 (operand.IsImmediate() && 4726 ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) || 4727 (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256))))); 4728 if (setflags_is_smaller) { 4729 Subs(cond, rd, rn, operand); 4730 } else { 4731 bool changed_op_is_smaller = 4732 operand.IsImmediate() && (operand.GetSignedImmediate() < 0) && 4733 ((rd.IsLow() && rn.IsLow() && 4734 (operand.GetSignedImmediate() >= -7)) || 4735 (rd.IsLow() && rn.Is(rd) && 4736 (operand.GetSignedImmediate() >= -255))); 4737 if (changed_op_is_smaller) { 4738 Adds(cond, rd, rn, -operand.GetSignedImmediate()); 4739 } else { 4740 Sub(cond, rd, rn, operand); 4741 } 4742 } 4743 break; 4744 } 4745 } 4746 void Sub(FlagsUpdate flags, 4747 Register rd, 4748 Register rn, 4749 const Operand& operand) { 4750 Sub(flags, al, rd, rn, operand); 4751 } 4752 4753 void Subs(Condition cond, Register rd, Register rn, const Operand& operand) { 4754 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4755 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4756 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4757 VIXL_ASSERT(allow_macro_instructions_); 4758 VIXL_ASSERT(OutsideITBlock()); 4759 MacroEmissionCheckScope guard(this); 4760 ITScope it_scope(this, &cond); 4761 subs(cond, rd, rn, operand); 4762 } 4763 void Subs(Register rd, Register rn, const Operand& operand) { 4764 Subs(al, rd, rn, operand); 4765 } 4766 4767 void Svc(Condition cond, uint32_t imm) { 4768 VIXL_ASSERT(allow_macro_instructions_); 4769 VIXL_ASSERT(OutsideITBlock()); 4770 MacroEmissionCheckScope guard(this); 4771 ITScope it_scope(this, &cond); 4772 svc(cond, imm); 4773 } 4774 void Svc(uint32_t imm) { Svc(al, imm); } 4775 4776 void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) { 4777 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4778 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4779 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4780 VIXL_ASSERT(allow_macro_instructions_); 4781 VIXL_ASSERT(OutsideITBlock()); 4782 MacroEmissionCheckScope guard(this); 4783 ITScope it_scope(this, &cond); 4784 sxtab(cond, rd, rn, operand); 4785 } 4786 void Sxtab(Register rd, Register rn, const Operand& operand) { 4787 Sxtab(al, rd, rn, operand); 4788 } 4789 4790 void Sxtab16(Condition cond, 4791 Register rd, 4792 Register rn, 4793 const Operand& operand) { 4794 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4795 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4796 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4797 VIXL_ASSERT(allow_macro_instructions_); 4798 VIXL_ASSERT(OutsideITBlock()); 4799 MacroEmissionCheckScope guard(this); 4800 ITScope it_scope(this, &cond); 4801 sxtab16(cond, rd, rn, operand); 4802 } 4803 void Sxtab16(Register rd, Register rn, const Operand& operand) { 4804 Sxtab16(al, rd, rn, operand); 4805 } 4806 4807 void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) { 4808 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4809 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4810 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4811 VIXL_ASSERT(allow_macro_instructions_); 4812 VIXL_ASSERT(OutsideITBlock()); 4813 MacroEmissionCheckScope guard(this); 4814 ITScope it_scope(this, &cond); 4815 sxtah(cond, rd, rn, operand); 4816 } 4817 void Sxtah(Register rd, Register rn, const Operand& operand) { 4818 Sxtah(al, rd, rn, operand); 4819 } 4820 4821 void Sxtb(Condition cond, Register rd, const Operand& operand) { 4822 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4823 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4824 VIXL_ASSERT(allow_macro_instructions_); 4825 VIXL_ASSERT(OutsideITBlock()); 4826 MacroEmissionCheckScope guard(this); 4827 ITScope it_scope(this, &cond); 4828 sxtb(cond, rd, operand); 4829 } 4830 void Sxtb(Register rd, const Operand& operand) { Sxtb(al, rd, operand); } 4831 4832 void Sxtb16(Condition cond, Register rd, const Operand& operand) { 4833 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4834 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4835 VIXL_ASSERT(allow_macro_instructions_); 4836 VIXL_ASSERT(OutsideITBlock()); 4837 MacroEmissionCheckScope guard(this); 4838 ITScope it_scope(this, &cond); 4839 sxtb16(cond, rd, operand); 4840 } 4841 void Sxtb16(Register rd, const Operand& operand) { Sxtb16(al, rd, operand); } 4842 4843 void Sxth(Condition cond, Register rd, const Operand& operand) { 4844 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4845 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4846 VIXL_ASSERT(allow_macro_instructions_); 4847 VIXL_ASSERT(OutsideITBlock()); 4848 MacroEmissionCheckScope guard(this); 4849 ITScope it_scope(this, &cond); 4850 sxth(cond, rd, operand); 4851 } 4852 void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); } 4853 4854 void Teq(Condition cond, Register rn, const Operand& operand) { 4855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4856 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4857 VIXL_ASSERT(allow_macro_instructions_); 4858 VIXL_ASSERT(OutsideITBlock()); 4859 MacroEmissionCheckScope guard(this); 4860 ITScope it_scope(this, &cond); 4861 teq(cond, rn, operand); 4862 } 4863 void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); } 4864 4865 void Tst(Condition cond, Register rn, const Operand& operand) { 4866 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4867 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4868 VIXL_ASSERT(allow_macro_instructions_); 4869 VIXL_ASSERT(OutsideITBlock()); 4870 MacroEmissionCheckScope guard(this); 4871 bool can_use_it = 4872 // TST{<c>}{<q>} <Rn>, <Rm> ; T1 4873 operand.IsPlainRegister() && rn.IsLow() && 4874 operand.GetBaseRegister().IsLow(); 4875 ITScope it_scope(this, &cond, can_use_it); 4876 tst(cond, rn, operand); 4877 } 4878 void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); } 4879 4880 void Uadd16(Condition cond, Register rd, Register rn, Register rm) { 4881 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4882 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4883 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4884 VIXL_ASSERT(allow_macro_instructions_); 4885 VIXL_ASSERT(OutsideITBlock()); 4886 MacroEmissionCheckScope guard(this); 4887 ITScope it_scope(this, &cond); 4888 uadd16(cond, rd, rn, rm); 4889 } 4890 void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); } 4891 4892 void Uadd8(Condition cond, Register rd, Register rn, Register rm) { 4893 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4894 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4895 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4896 VIXL_ASSERT(allow_macro_instructions_); 4897 VIXL_ASSERT(OutsideITBlock()); 4898 MacroEmissionCheckScope guard(this); 4899 ITScope it_scope(this, &cond); 4900 uadd8(cond, rd, rn, rm); 4901 } 4902 void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); } 4903 4904 void Uasx(Condition cond, Register rd, Register rn, Register rm) { 4905 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4906 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4907 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4908 VIXL_ASSERT(allow_macro_instructions_); 4909 VIXL_ASSERT(OutsideITBlock()); 4910 MacroEmissionCheckScope guard(this); 4911 ITScope it_scope(this, &cond); 4912 uasx(cond, rd, rn, rm); 4913 } 4914 void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); } 4915 4916 void Ubfx(Condition cond, 4917 Register rd, 4918 Register rn, 4919 uint32_t lsb, 4920 const Operand& operand) { 4921 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4922 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4923 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4924 VIXL_ASSERT(allow_macro_instructions_); 4925 VIXL_ASSERT(OutsideITBlock()); 4926 MacroEmissionCheckScope guard(this); 4927 ITScope it_scope(this, &cond); 4928 ubfx(cond, rd, rn, lsb, operand); 4929 } 4930 void Ubfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) { 4931 Ubfx(al, rd, rn, lsb, operand); 4932 } 4933 4934 void Udf(Condition cond, uint32_t imm) { 4935 VIXL_ASSERT(allow_macro_instructions_); 4936 VIXL_ASSERT(OutsideITBlock()); 4937 MacroEmissionCheckScope guard(this); 4938 ITScope it_scope(this, &cond); 4939 udf(cond, imm); 4940 } 4941 void Udf(uint32_t imm) { Udf(al, imm); } 4942 4943 void Udiv(Condition cond, Register rd, Register rn, Register rm) { 4944 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4945 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4946 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4947 VIXL_ASSERT(allow_macro_instructions_); 4948 VIXL_ASSERT(OutsideITBlock()); 4949 MacroEmissionCheckScope guard(this); 4950 ITScope it_scope(this, &cond); 4951 udiv(cond, rd, rn, rm); 4952 } 4953 void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); } 4954 4955 void Uhadd16(Condition cond, Register rd, Register rn, Register rm) { 4956 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4957 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4958 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4959 VIXL_ASSERT(allow_macro_instructions_); 4960 VIXL_ASSERT(OutsideITBlock()); 4961 MacroEmissionCheckScope guard(this); 4962 ITScope it_scope(this, &cond); 4963 uhadd16(cond, rd, rn, rm); 4964 } 4965 void Uhadd16(Register rd, Register rn, Register rm) { 4966 Uhadd16(al, rd, rn, rm); 4967 } 4968 4969 void Uhadd8(Condition cond, Register rd, Register rn, Register rm) { 4970 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4971 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4972 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4973 VIXL_ASSERT(allow_macro_instructions_); 4974 VIXL_ASSERT(OutsideITBlock()); 4975 MacroEmissionCheckScope guard(this); 4976 ITScope it_scope(this, &cond); 4977 uhadd8(cond, rd, rn, rm); 4978 } 4979 void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); } 4980 4981 void Uhasx(Condition cond, Register rd, Register rn, Register rm) { 4982 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4983 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4984 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4985 VIXL_ASSERT(allow_macro_instructions_); 4986 VIXL_ASSERT(OutsideITBlock()); 4987 MacroEmissionCheckScope guard(this); 4988 ITScope it_scope(this, &cond); 4989 uhasx(cond, rd, rn, rm); 4990 } 4991 void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); } 4992 4993 void Uhsax(Condition cond, Register rd, Register rn, Register rm) { 4994 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4995 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4996 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4997 VIXL_ASSERT(allow_macro_instructions_); 4998 VIXL_ASSERT(OutsideITBlock()); 4999 MacroEmissionCheckScope guard(this); 5000 ITScope it_scope(this, &cond); 5001 uhsax(cond, rd, rn, rm); 5002 } 5003 void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); } 5004 5005 void Uhsub16(Condition cond, Register rd, Register rn, Register rm) { 5006 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5007 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5008 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5009 VIXL_ASSERT(allow_macro_instructions_); 5010 VIXL_ASSERT(OutsideITBlock()); 5011 MacroEmissionCheckScope guard(this); 5012 ITScope it_scope(this, &cond); 5013 uhsub16(cond, rd, rn, rm); 5014 } 5015 void Uhsub16(Register rd, Register rn, Register rm) { 5016 Uhsub16(al, rd, rn, rm); 5017 } 5018 5019 void Uhsub8(Condition cond, Register rd, Register rn, Register rm) { 5020 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5021 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5022 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5023 VIXL_ASSERT(allow_macro_instructions_); 5024 VIXL_ASSERT(OutsideITBlock()); 5025 MacroEmissionCheckScope guard(this); 5026 ITScope it_scope(this, &cond); 5027 uhsub8(cond, rd, rn, rm); 5028 } 5029 void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); } 5030 5031 void Umaal( 5032 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 5033 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 5034 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 5035 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5036 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5037 VIXL_ASSERT(allow_macro_instructions_); 5038 VIXL_ASSERT(OutsideITBlock()); 5039 MacroEmissionCheckScope guard(this); 5040 ITScope it_scope(this, &cond); 5041 umaal(cond, rdlo, rdhi, rn, rm); 5042 } 5043 void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) { 5044 Umaal(al, rdlo, rdhi, rn, rm); 5045 } 5046 5047 void Umlal( 5048 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 5049 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 5050 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 5051 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5052 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5053 VIXL_ASSERT(allow_macro_instructions_); 5054 VIXL_ASSERT(OutsideITBlock()); 5055 MacroEmissionCheckScope guard(this); 5056 ITScope it_scope(this, &cond); 5057 umlal(cond, rdlo, rdhi, rn, rm); 5058 } 5059 void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) { 5060 Umlal(al, rdlo, rdhi, rn, rm); 5061 } 5062 void Umlal(FlagsUpdate flags, 5063 Condition cond, 5064 Register rdlo, 5065 Register rdhi, 5066 Register rn, 5067 Register rm) { 5068 switch (flags) { 5069 case LeaveFlags: 5070 Umlal(cond, rdlo, rdhi, rn, rm); 5071 break; 5072 case SetFlags: 5073 Umlals(cond, rdlo, rdhi, rn, rm); 5074 break; 5075 case DontCare: 5076 Umlal(cond, rdlo, rdhi, rn, rm); 5077 break; 5078 } 5079 } 5080 void Umlal(FlagsUpdate flags, 5081 Register rdlo, 5082 Register rdhi, 5083 Register rn, 5084 Register rm) { 5085 Umlal(flags, al, rdlo, rdhi, rn, rm); 5086 } 5087 5088 void Umlals( 5089 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 5090 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 5091 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 5092 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5093 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5094 VIXL_ASSERT(allow_macro_instructions_); 5095 VIXL_ASSERT(OutsideITBlock()); 5096 MacroEmissionCheckScope guard(this); 5097 ITScope it_scope(this, &cond); 5098 umlals(cond, rdlo, rdhi, rn, rm); 5099 } 5100 void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) { 5101 Umlals(al, rdlo, rdhi, rn, rm); 5102 } 5103 5104 void Umull( 5105 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 5106 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 5107 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 5108 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5109 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5110 VIXL_ASSERT(allow_macro_instructions_); 5111 VIXL_ASSERT(OutsideITBlock()); 5112 MacroEmissionCheckScope guard(this); 5113 ITScope it_scope(this, &cond); 5114 umull(cond, rdlo, rdhi, rn, rm); 5115 } 5116 void Umull(Register rdlo, Register rdhi, Register rn, Register rm) { 5117 Umull(al, rdlo, rdhi, rn, rm); 5118 } 5119 void Umull(FlagsUpdate flags, 5120 Condition cond, 5121 Register rdlo, 5122 Register rdhi, 5123 Register rn, 5124 Register rm) { 5125 switch (flags) { 5126 case LeaveFlags: 5127 Umull(cond, rdlo, rdhi, rn, rm); 5128 break; 5129 case SetFlags: 5130 Umulls(cond, rdlo, rdhi, rn, rm); 5131 break; 5132 case DontCare: 5133 Umull(cond, rdlo, rdhi, rn, rm); 5134 break; 5135 } 5136 } 5137 void Umull(FlagsUpdate flags, 5138 Register rdlo, 5139 Register rdhi, 5140 Register rn, 5141 Register rm) { 5142 Umull(flags, al, rdlo, rdhi, rn, rm); 5143 } 5144 5145 void Umulls( 5146 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 5147 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 5148 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 5149 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5150 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5151 VIXL_ASSERT(allow_macro_instructions_); 5152 VIXL_ASSERT(OutsideITBlock()); 5153 MacroEmissionCheckScope guard(this); 5154 ITScope it_scope(this, &cond); 5155 umulls(cond, rdlo, rdhi, rn, rm); 5156 } 5157 void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) { 5158 Umulls(al, rdlo, rdhi, rn, rm); 5159 } 5160 5161 void Uqadd16(Condition cond, Register rd, Register rn, Register rm) { 5162 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5163 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5164 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5165 VIXL_ASSERT(allow_macro_instructions_); 5166 VIXL_ASSERT(OutsideITBlock()); 5167 MacroEmissionCheckScope guard(this); 5168 ITScope it_scope(this, &cond); 5169 uqadd16(cond, rd, rn, rm); 5170 } 5171 void Uqadd16(Register rd, Register rn, Register rm) { 5172 Uqadd16(al, rd, rn, rm); 5173 } 5174 5175 void Uqadd8(Condition cond, Register rd, Register rn, Register rm) { 5176 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5177 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5178 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5179 VIXL_ASSERT(allow_macro_instructions_); 5180 VIXL_ASSERT(OutsideITBlock()); 5181 MacroEmissionCheckScope guard(this); 5182 ITScope it_scope(this, &cond); 5183 uqadd8(cond, rd, rn, rm); 5184 } 5185 void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); } 5186 5187 void Uqasx(Condition cond, Register rd, Register rn, Register rm) { 5188 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5189 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5190 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5191 VIXL_ASSERT(allow_macro_instructions_); 5192 VIXL_ASSERT(OutsideITBlock()); 5193 MacroEmissionCheckScope guard(this); 5194 ITScope it_scope(this, &cond); 5195 uqasx(cond, rd, rn, rm); 5196 } 5197 void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); } 5198 5199 void Uqsax(Condition cond, Register rd, Register rn, Register rm) { 5200 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5201 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5202 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5203 VIXL_ASSERT(allow_macro_instructions_); 5204 VIXL_ASSERT(OutsideITBlock()); 5205 MacroEmissionCheckScope guard(this); 5206 ITScope it_scope(this, &cond); 5207 uqsax(cond, rd, rn, rm); 5208 } 5209 void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); } 5210 5211 void Uqsub16(Condition cond, Register rd, Register rn, Register rm) { 5212 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5213 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5214 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5215 VIXL_ASSERT(allow_macro_instructions_); 5216 VIXL_ASSERT(OutsideITBlock()); 5217 MacroEmissionCheckScope guard(this); 5218 ITScope it_scope(this, &cond); 5219 uqsub16(cond, rd, rn, rm); 5220 } 5221 void Uqsub16(Register rd, Register rn, Register rm) { 5222 Uqsub16(al, rd, rn, rm); 5223 } 5224 5225 void Uqsub8(Condition cond, Register rd, Register rn, Register rm) { 5226 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5227 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5228 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5229 VIXL_ASSERT(allow_macro_instructions_); 5230 VIXL_ASSERT(OutsideITBlock()); 5231 MacroEmissionCheckScope guard(this); 5232 ITScope it_scope(this, &cond); 5233 uqsub8(cond, rd, rn, rm); 5234 } 5235 void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); } 5236 5237 void Usad8(Condition cond, Register rd, Register rn, Register rm) { 5238 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5239 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5240 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5241 VIXL_ASSERT(allow_macro_instructions_); 5242 VIXL_ASSERT(OutsideITBlock()); 5243 MacroEmissionCheckScope guard(this); 5244 ITScope it_scope(this, &cond); 5245 usad8(cond, rd, rn, rm); 5246 } 5247 void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); } 5248 5249 void Usada8( 5250 Condition cond, Register rd, Register rn, Register rm, Register ra) { 5251 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5252 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5253 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5254 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 5255 VIXL_ASSERT(allow_macro_instructions_); 5256 VIXL_ASSERT(OutsideITBlock()); 5257 MacroEmissionCheckScope guard(this); 5258 ITScope it_scope(this, &cond); 5259 usada8(cond, rd, rn, rm, ra); 5260 } 5261 void Usada8(Register rd, Register rn, Register rm, Register ra) { 5262 Usada8(al, rd, rn, rm, ra); 5263 } 5264 5265 void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) { 5266 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5267 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5268 VIXL_ASSERT(allow_macro_instructions_); 5269 VIXL_ASSERT(OutsideITBlock()); 5270 MacroEmissionCheckScope guard(this); 5271 ITScope it_scope(this, &cond); 5272 usat(cond, rd, imm, operand); 5273 } 5274 void Usat(Register rd, uint32_t imm, const Operand& operand) { 5275 Usat(al, rd, imm, operand); 5276 } 5277 5278 void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) { 5279 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5280 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5281 VIXL_ASSERT(allow_macro_instructions_); 5282 VIXL_ASSERT(OutsideITBlock()); 5283 MacroEmissionCheckScope guard(this); 5284 ITScope it_scope(this, &cond); 5285 usat16(cond, rd, imm, rn); 5286 } 5287 void Usat16(Register rd, uint32_t imm, Register rn) { 5288 Usat16(al, rd, imm, rn); 5289 } 5290 5291 void Usax(Condition cond, Register rd, Register rn, Register rm) { 5292 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5293 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5294 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5295 VIXL_ASSERT(allow_macro_instructions_); 5296 VIXL_ASSERT(OutsideITBlock()); 5297 MacroEmissionCheckScope guard(this); 5298 ITScope it_scope(this, &cond); 5299 usax(cond, rd, rn, rm); 5300 } 5301 void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); } 5302 5303 void Usub16(Condition cond, Register rd, Register rn, Register rm) { 5304 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5305 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5306 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5307 VIXL_ASSERT(allow_macro_instructions_); 5308 VIXL_ASSERT(OutsideITBlock()); 5309 MacroEmissionCheckScope guard(this); 5310 ITScope it_scope(this, &cond); 5311 usub16(cond, rd, rn, rm); 5312 } 5313 void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); } 5314 5315 void Usub8(Condition cond, Register rd, Register rn, Register rm) { 5316 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5317 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5318 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5319 VIXL_ASSERT(allow_macro_instructions_); 5320 VIXL_ASSERT(OutsideITBlock()); 5321 MacroEmissionCheckScope guard(this); 5322 ITScope it_scope(this, &cond); 5323 usub8(cond, rd, rn, rm); 5324 } 5325 void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); } 5326 5327 void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) { 5328 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5329 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5330 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5331 VIXL_ASSERT(allow_macro_instructions_); 5332 VIXL_ASSERT(OutsideITBlock()); 5333 MacroEmissionCheckScope guard(this); 5334 ITScope it_scope(this, &cond); 5335 uxtab(cond, rd, rn, operand); 5336 } 5337 void Uxtab(Register rd, Register rn, const Operand& operand) { 5338 Uxtab(al, rd, rn, operand); 5339 } 5340 5341 void Uxtab16(Condition cond, 5342 Register rd, 5343 Register rn, 5344 const Operand& operand) { 5345 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5346 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5347 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5348 VIXL_ASSERT(allow_macro_instructions_); 5349 VIXL_ASSERT(OutsideITBlock()); 5350 MacroEmissionCheckScope guard(this); 5351 ITScope it_scope(this, &cond); 5352 uxtab16(cond, rd, rn, operand); 5353 } 5354 void Uxtab16(Register rd, Register rn, const Operand& operand) { 5355 Uxtab16(al, rd, rn, operand); 5356 } 5357 5358 void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) { 5359 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5360 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5361 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5362 VIXL_ASSERT(allow_macro_instructions_); 5363 VIXL_ASSERT(OutsideITBlock()); 5364 MacroEmissionCheckScope guard(this); 5365 ITScope it_scope(this, &cond); 5366 uxtah(cond, rd, rn, operand); 5367 } 5368 void Uxtah(Register rd, Register rn, const Operand& operand) { 5369 Uxtah(al, rd, rn, operand); 5370 } 5371 5372 void Uxtb(Condition cond, Register rd, const Operand& operand) { 5373 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5374 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5375 VIXL_ASSERT(allow_macro_instructions_); 5376 VIXL_ASSERT(OutsideITBlock()); 5377 MacroEmissionCheckScope guard(this); 5378 ITScope it_scope(this, &cond); 5379 uxtb(cond, rd, operand); 5380 } 5381 void Uxtb(Register rd, const Operand& operand) { Uxtb(al, rd, operand); } 5382 5383 void Uxtb16(Condition cond, Register rd, const Operand& operand) { 5384 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5385 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5386 VIXL_ASSERT(allow_macro_instructions_); 5387 VIXL_ASSERT(OutsideITBlock()); 5388 MacroEmissionCheckScope guard(this); 5389 ITScope it_scope(this, &cond); 5390 uxtb16(cond, rd, operand); 5391 } 5392 void Uxtb16(Register rd, const Operand& operand) { Uxtb16(al, rd, operand); } 5393 5394 void Uxth(Condition cond, Register rd, const Operand& operand) { 5395 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5396 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5397 VIXL_ASSERT(allow_macro_instructions_); 5398 VIXL_ASSERT(OutsideITBlock()); 5399 MacroEmissionCheckScope guard(this); 5400 ITScope it_scope(this, &cond); 5401 uxth(cond, rd, operand); 5402 } 5403 void Uxth(Register rd, const Operand& operand) { Uxth(al, rd, operand); } 5404 5405 void Vaba( 5406 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5407 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5408 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5409 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5410 VIXL_ASSERT(allow_macro_instructions_); 5411 VIXL_ASSERT(OutsideITBlock()); 5412 MacroEmissionCheckScope guard(this); 5413 ITScope it_scope(this, &cond); 5414 vaba(cond, dt, rd, rn, rm); 5415 } 5416 void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5417 Vaba(al, dt, rd, rn, rm); 5418 } 5419 5420 void Vaba( 5421 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5422 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5423 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5424 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5425 VIXL_ASSERT(allow_macro_instructions_); 5426 VIXL_ASSERT(OutsideITBlock()); 5427 MacroEmissionCheckScope guard(this); 5428 ITScope it_scope(this, &cond); 5429 vaba(cond, dt, rd, rn, rm); 5430 } 5431 void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5432 Vaba(al, dt, rd, rn, rm); 5433 } 5434 5435 void Vabal( 5436 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5437 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5438 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5439 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5440 VIXL_ASSERT(allow_macro_instructions_); 5441 VIXL_ASSERT(OutsideITBlock()); 5442 MacroEmissionCheckScope guard(this); 5443 ITScope it_scope(this, &cond); 5444 vabal(cond, dt, rd, rn, rm); 5445 } 5446 void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5447 Vabal(al, dt, rd, rn, rm); 5448 } 5449 5450 void Vabd( 5451 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5452 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5453 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5454 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5455 VIXL_ASSERT(allow_macro_instructions_); 5456 VIXL_ASSERT(OutsideITBlock()); 5457 MacroEmissionCheckScope guard(this); 5458 ITScope it_scope(this, &cond); 5459 vabd(cond, dt, rd, rn, rm); 5460 } 5461 void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5462 Vabd(al, dt, rd, rn, rm); 5463 } 5464 5465 void Vabd( 5466 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5467 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5468 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5469 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5470 VIXL_ASSERT(allow_macro_instructions_); 5471 VIXL_ASSERT(OutsideITBlock()); 5472 MacroEmissionCheckScope guard(this); 5473 ITScope it_scope(this, &cond); 5474 vabd(cond, dt, rd, rn, rm); 5475 } 5476 void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5477 Vabd(al, dt, rd, rn, rm); 5478 } 5479 5480 void Vabdl( 5481 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5482 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5483 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5484 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5485 VIXL_ASSERT(allow_macro_instructions_); 5486 VIXL_ASSERT(OutsideITBlock()); 5487 MacroEmissionCheckScope guard(this); 5488 ITScope it_scope(this, &cond); 5489 vabdl(cond, dt, rd, rn, rm); 5490 } 5491 void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5492 Vabdl(al, dt, rd, rn, rm); 5493 } 5494 5495 void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) { 5496 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5497 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5498 VIXL_ASSERT(allow_macro_instructions_); 5499 VIXL_ASSERT(OutsideITBlock()); 5500 MacroEmissionCheckScope guard(this); 5501 ITScope it_scope(this, &cond); 5502 vabs(cond, dt, rd, rm); 5503 } 5504 void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); } 5505 5506 void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) { 5507 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5508 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5509 VIXL_ASSERT(allow_macro_instructions_); 5510 VIXL_ASSERT(OutsideITBlock()); 5511 MacroEmissionCheckScope guard(this); 5512 ITScope it_scope(this, &cond); 5513 vabs(cond, dt, rd, rm); 5514 } 5515 void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); } 5516 5517 void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) { 5518 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5519 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5520 VIXL_ASSERT(allow_macro_instructions_); 5521 VIXL_ASSERT(OutsideITBlock()); 5522 MacroEmissionCheckScope guard(this); 5523 ITScope it_scope(this, &cond); 5524 vabs(cond, dt, rd, rm); 5525 } 5526 void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); } 5527 5528 void Vacge( 5529 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5530 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5531 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5532 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5533 VIXL_ASSERT(allow_macro_instructions_); 5534 VIXL_ASSERT(OutsideITBlock()); 5535 MacroEmissionCheckScope guard(this); 5536 ITScope it_scope(this, &cond); 5537 vacge(cond, dt, rd, rn, rm); 5538 } 5539 void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5540 Vacge(al, dt, rd, rn, rm); 5541 } 5542 5543 void Vacge( 5544 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5545 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5546 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5547 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5548 VIXL_ASSERT(allow_macro_instructions_); 5549 VIXL_ASSERT(OutsideITBlock()); 5550 MacroEmissionCheckScope guard(this); 5551 ITScope it_scope(this, &cond); 5552 vacge(cond, dt, rd, rn, rm); 5553 } 5554 void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5555 Vacge(al, dt, rd, rn, rm); 5556 } 5557 5558 void Vacgt( 5559 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5560 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5561 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5562 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5563 VIXL_ASSERT(allow_macro_instructions_); 5564 VIXL_ASSERT(OutsideITBlock()); 5565 MacroEmissionCheckScope guard(this); 5566 ITScope it_scope(this, &cond); 5567 vacgt(cond, dt, rd, rn, rm); 5568 } 5569 void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5570 Vacgt(al, dt, rd, rn, rm); 5571 } 5572 5573 void Vacgt( 5574 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5575 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5576 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5577 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5578 VIXL_ASSERT(allow_macro_instructions_); 5579 VIXL_ASSERT(OutsideITBlock()); 5580 MacroEmissionCheckScope guard(this); 5581 ITScope it_scope(this, &cond); 5582 vacgt(cond, dt, rd, rn, rm); 5583 } 5584 void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5585 Vacgt(al, dt, rd, rn, rm); 5586 } 5587 5588 void Vacle( 5589 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5590 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5591 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5592 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5593 VIXL_ASSERT(allow_macro_instructions_); 5594 VIXL_ASSERT(OutsideITBlock()); 5595 MacroEmissionCheckScope guard(this); 5596 ITScope it_scope(this, &cond); 5597 vacle(cond, dt, rd, rn, rm); 5598 } 5599 void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5600 Vacle(al, dt, rd, rn, rm); 5601 } 5602 5603 void Vacle( 5604 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5605 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5606 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5607 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5608 VIXL_ASSERT(allow_macro_instructions_); 5609 VIXL_ASSERT(OutsideITBlock()); 5610 MacroEmissionCheckScope guard(this); 5611 ITScope it_scope(this, &cond); 5612 vacle(cond, dt, rd, rn, rm); 5613 } 5614 void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5615 Vacle(al, dt, rd, rn, rm); 5616 } 5617 5618 void Vaclt( 5619 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5620 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5621 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5622 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5623 VIXL_ASSERT(allow_macro_instructions_); 5624 VIXL_ASSERT(OutsideITBlock()); 5625 MacroEmissionCheckScope guard(this); 5626 ITScope it_scope(this, &cond); 5627 vaclt(cond, dt, rd, rn, rm); 5628 } 5629 void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5630 Vaclt(al, dt, rd, rn, rm); 5631 } 5632 5633 void Vaclt( 5634 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5635 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5636 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5637 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5638 VIXL_ASSERT(allow_macro_instructions_); 5639 VIXL_ASSERT(OutsideITBlock()); 5640 MacroEmissionCheckScope guard(this); 5641 ITScope it_scope(this, &cond); 5642 vaclt(cond, dt, rd, rn, rm); 5643 } 5644 void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5645 Vaclt(al, dt, rd, rn, rm); 5646 } 5647 5648 void Vadd( 5649 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5650 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5651 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5652 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5653 VIXL_ASSERT(allow_macro_instructions_); 5654 VIXL_ASSERT(OutsideITBlock()); 5655 MacroEmissionCheckScope guard(this); 5656 ITScope it_scope(this, &cond); 5657 vadd(cond, dt, rd, rn, rm); 5658 } 5659 void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5660 Vadd(al, dt, rd, rn, rm); 5661 } 5662 5663 void Vadd( 5664 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5666 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5667 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5668 VIXL_ASSERT(allow_macro_instructions_); 5669 VIXL_ASSERT(OutsideITBlock()); 5670 MacroEmissionCheckScope guard(this); 5671 ITScope it_scope(this, &cond); 5672 vadd(cond, dt, rd, rn, rm); 5673 } 5674 void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5675 Vadd(al, dt, rd, rn, rm); 5676 } 5677 5678 void Vadd( 5679 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 5680 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5681 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5682 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5683 VIXL_ASSERT(allow_macro_instructions_); 5684 VIXL_ASSERT(OutsideITBlock()); 5685 MacroEmissionCheckScope guard(this); 5686 ITScope it_scope(this, &cond); 5687 vadd(cond, dt, rd, rn, rm); 5688 } 5689 void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 5690 Vadd(al, dt, rd, rn, rm); 5691 } 5692 5693 void Vaddhn( 5694 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 5695 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5696 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5697 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5698 VIXL_ASSERT(allow_macro_instructions_); 5699 VIXL_ASSERT(OutsideITBlock()); 5700 MacroEmissionCheckScope guard(this); 5701 ITScope it_scope(this, &cond); 5702 vaddhn(cond, dt, rd, rn, rm); 5703 } 5704 void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 5705 Vaddhn(al, dt, rd, rn, rm); 5706 } 5707 5708 void Vaddl( 5709 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5710 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5711 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5712 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5713 VIXL_ASSERT(allow_macro_instructions_); 5714 VIXL_ASSERT(OutsideITBlock()); 5715 MacroEmissionCheckScope guard(this); 5716 ITScope it_scope(this, &cond); 5717 vaddl(cond, dt, rd, rn, rm); 5718 } 5719 void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5720 Vaddl(al, dt, rd, rn, rm); 5721 } 5722 5723 void Vaddw( 5724 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) { 5725 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5726 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5727 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5728 VIXL_ASSERT(allow_macro_instructions_); 5729 VIXL_ASSERT(OutsideITBlock()); 5730 MacroEmissionCheckScope guard(this); 5731 ITScope it_scope(this, &cond); 5732 vaddw(cond, dt, rd, rn, rm); 5733 } 5734 void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) { 5735 Vaddw(al, dt, rd, rn, rm); 5736 } 5737 5738 void Vand(Condition cond, 5739 DataType dt, 5740 DRegister rd, 5741 DRegister rn, 5742 const DOperand& operand) { 5743 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5744 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5745 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5746 VIXL_ASSERT(allow_macro_instructions_); 5747 VIXL_ASSERT(OutsideITBlock()); 5748 MacroEmissionCheckScope guard(this); 5749 ITScope it_scope(this, &cond); 5750 vand(cond, dt, rd, rn, operand); 5751 } 5752 void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 5753 Vand(al, dt, rd, rn, operand); 5754 } 5755 5756 void Vand(Condition cond, 5757 DataType dt, 5758 QRegister rd, 5759 QRegister rn, 5760 const QOperand& operand) { 5761 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5762 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5763 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5764 VIXL_ASSERT(allow_macro_instructions_); 5765 VIXL_ASSERT(OutsideITBlock()); 5766 MacroEmissionCheckScope guard(this); 5767 ITScope it_scope(this, &cond); 5768 vand(cond, dt, rd, rn, operand); 5769 } 5770 void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 5771 Vand(al, dt, rd, rn, operand); 5772 } 5773 5774 void Vbic(Condition cond, 5775 DataType dt, 5776 DRegister rd, 5777 DRegister rn, 5778 const DOperand& operand) { 5779 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5780 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5781 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5782 VIXL_ASSERT(allow_macro_instructions_); 5783 VIXL_ASSERT(OutsideITBlock()); 5784 MacroEmissionCheckScope guard(this); 5785 ITScope it_scope(this, &cond); 5786 vbic(cond, dt, rd, rn, operand); 5787 } 5788 void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 5789 Vbic(al, dt, rd, rn, operand); 5790 } 5791 5792 void Vbic(Condition cond, 5793 DataType dt, 5794 QRegister rd, 5795 QRegister rn, 5796 const QOperand& operand) { 5797 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5798 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5799 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5800 VIXL_ASSERT(allow_macro_instructions_); 5801 VIXL_ASSERT(OutsideITBlock()); 5802 MacroEmissionCheckScope guard(this); 5803 ITScope it_scope(this, &cond); 5804 vbic(cond, dt, rd, rn, operand); 5805 } 5806 void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 5807 Vbic(al, dt, rd, rn, operand); 5808 } 5809 5810 void Vbif( 5811 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5812 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5813 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5814 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5815 VIXL_ASSERT(allow_macro_instructions_); 5816 VIXL_ASSERT(OutsideITBlock()); 5817 MacroEmissionCheckScope guard(this); 5818 ITScope it_scope(this, &cond); 5819 vbif(cond, dt, rd, rn, rm); 5820 } 5821 void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5822 Vbif(al, dt, rd, rn, rm); 5823 } 5824 void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 5825 Vbif(cond, kDataTypeValueNone, rd, rn, rm); 5826 } 5827 void Vbif(DRegister rd, DRegister rn, DRegister rm) { 5828 Vbif(al, kDataTypeValueNone, rd, rn, rm); 5829 } 5830 5831 void Vbif( 5832 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5833 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5834 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5835 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5836 VIXL_ASSERT(allow_macro_instructions_); 5837 VIXL_ASSERT(OutsideITBlock()); 5838 MacroEmissionCheckScope guard(this); 5839 ITScope it_scope(this, &cond); 5840 vbif(cond, dt, rd, rn, rm); 5841 } 5842 void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5843 Vbif(al, dt, rd, rn, rm); 5844 } 5845 void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 5846 Vbif(cond, kDataTypeValueNone, rd, rn, rm); 5847 } 5848 void Vbif(QRegister rd, QRegister rn, QRegister rm) { 5849 Vbif(al, kDataTypeValueNone, rd, rn, rm); 5850 } 5851 5852 void Vbit( 5853 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5854 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5856 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5857 VIXL_ASSERT(allow_macro_instructions_); 5858 VIXL_ASSERT(OutsideITBlock()); 5859 MacroEmissionCheckScope guard(this); 5860 ITScope it_scope(this, &cond); 5861 vbit(cond, dt, rd, rn, rm); 5862 } 5863 void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5864 Vbit(al, dt, rd, rn, rm); 5865 } 5866 void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 5867 Vbit(cond, kDataTypeValueNone, rd, rn, rm); 5868 } 5869 void Vbit(DRegister rd, DRegister rn, DRegister rm) { 5870 Vbit(al, kDataTypeValueNone, rd, rn, rm); 5871 } 5872 5873 void Vbit( 5874 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5875 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5876 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5877 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5878 VIXL_ASSERT(allow_macro_instructions_); 5879 VIXL_ASSERT(OutsideITBlock()); 5880 MacroEmissionCheckScope guard(this); 5881 ITScope it_scope(this, &cond); 5882 vbit(cond, dt, rd, rn, rm); 5883 } 5884 void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5885 Vbit(al, dt, rd, rn, rm); 5886 } 5887 void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 5888 Vbit(cond, kDataTypeValueNone, rd, rn, rm); 5889 } 5890 void Vbit(QRegister rd, QRegister rn, QRegister rm) { 5891 Vbit(al, kDataTypeValueNone, rd, rn, rm); 5892 } 5893 5894 void Vbsl( 5895 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5896 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5897 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5898 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5899 VIXL_ASSERT(allow_macro_instructions_); 5900 VIXL_ASSERT(OutsideITBlock()); 5901 MacroEmissionCheckScope guard(this); 5902 ITScope it_scope(this, &cond); 5903 vbsl(cond, dt, rd, rn, rm); 5904 } 5905 void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5906 Vbsl(al, dt, rd, rn, rm); 5907 } 5908 void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 5909 Vbsl(cond, kDataTypeValueNone, rd, rn, rm); 5910 } 5911 void Vbsl(DRegister rd, DRegister rn, DRegister rm) { 5912 Vbsl(al, kDataTypeValueNone, rd, rn, rm); 5913 } 5914 5915 void Vbsl( 5916 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5917 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5918 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5919 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5920 VIXL_ASSERT(allow_macro_instructions_); 5921 VIXL_ASSERT(OutsideITBlock()); 5922 MacroEmissionCheckScope guard(this); 5923 ITScope it_scope(this, &cond); 5924 vbsl(cond, dt, rd, rn, rm); 5925 } 5926 void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5927 Vbsl(al, dt, rd, rn, rm); 5928 } 5929 void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 5930 Vbsl(cond, kDataTypeValueNone, rd, rn, rm); 5931 } 5932 void Vbsl(QRegister rd, QRegister rn, QRegister rm) { 5933 Vbsl(al, kDataTypeValueNone, rd, rn, rm); 5934 } 5935 5936 void Vceq(Condition cond, 5937 DataType dt, 5938 DRegister rd, 5939 DRegister rm, 5940 const DOperand& operand) { 5941 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5942 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5943 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5944 VIXL_ASSERT(allow_macro_instructions_); 5945 VIXL_ASSERT(OutsideITBlock()); 5946 MacroEmissionCheckScope guard(this); 5947 ITScope it_scope(this, &cond); 5948 vceq(cond, dt, rd, rm, operand); 5949 } 5950 void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 5951 Vceq(al, dt, rd, rm, operand); 5952 } 5953 5954 void Vceq(Condition cond, 5955 DataType dt, 5956 QRegister rd, 5957 QRegister rm, 5958 const QOperand& operand) { 5959 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5960 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5961 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5962 VIXL_ASSERT(allow_macro_instructions_); 5963 VIXL_ASSERT(OutsideITBlock()); 5964 MacroEmissionCheckScope guard(this); 5965 ITScope it_scope(this, &cond); 5966 vceq(cond, dt, rd, rm, operand); 5967 } 5968 void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 5969 Vceq(al, dt, rd, rm, operand); 5970 } 5971 5972 void Vceq( 5973 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5974 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5975 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5976 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5977 VIXL_ASSERT(allow_macro_instructions_); 5978 VIXL_ASSERT(OutsideITBlock()); 5979 MacroEmissionCheckScope guard(this); 5980 ITScope it_scope(this, &cond); 5981 vceq(cond, dt, rd, rn, rm); 5982 } 5983 void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5984 Vceq(al, dt, rd, rn, rm); 5985 } 5986 5987 void Vceq( 5988 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5989 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5990 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5992 VIXL_ASSERT(allow_macro_instructions_); 5993 VIXL_ASSERT(OutsideITBlock()); 5994 MacroEmissionCheckScope guard(this); 5995 ITScope it_scope(this, &cond); 5996 vceq(cond, dt, rd, rn, rm); 5997 } 5998 void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5999 Vceq(al, dt, rd, rn, rm); 6000 } 6001 6002 void Vcge(Condition cond, 6003 DataType dt, 6004 DRegister rd, 6005 DRegister rm, 6006 const DOperand& operand) { 6007 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6008 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6009 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6010 VIXL_ASSERT(allow_macro_instructions_); 6011 VIXL_ASSERT(OutsideITBlock()); 6012 MacroEmissionCheckScope guard(this); 6013 ITScope it_scope(this, &cond); 6014 vcge(cond, dt, rd, rm, operand); 6015 } 6016 void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 6017 Vcge(al, dt, rd, rm, operand); 6018 } 6019 6020 void Vcge(Condition cond, 6021 DataType dt, 6022 QRegister rd, 6023 QRegister rm, 6024 const QOperand& operand) { 6025 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6026 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6027 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6028 VIXL_ASSERT(allow_macro_instructions_); 6029 VIXL_ASSERT(OutsideITBlock()); 6030 MacroEmissionCheckScope guard(this); 6031 ITScope it_scope(this, &cond); 6032 vcge(cond, dt, rd, rm, operand); 6033 } 6034 void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 6035 Vcge(al, dt, rd, rm, operand); 6036 } 6037 6038 void Vcge( 6039 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6040 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6041 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6042 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6043 VIXL_ASSERT(allow_macro_instructions_); 6044 VIXL_ASSERT(OutsideITBlock()); 6045 MacroEmissionCheckScope guard(this); 6046 ITScope it_scope(this, &cond); 6047 vcge(cond, dt, rd, rn, rm); 6048 } 6049 void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6050 Vcge(al, dt, rd, rn, rm); 6051 } 6052 6053 void Vcge( 6054 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6055 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6056 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6057 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6058 VIXL_ASSERT(allow_macro_instructions_); 6059 VIXL_ASSERT(OutsideITBlock()); 6060 MacroEmissionCheckScope guard(this); 6061 ITScope it_scope(this, &cond); 6062 vcge(cond, dt, rd, rn, rm); 6063 } 6064 void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6065 Vcge(al, dt, rd, rn, rm); 6066 } 6067 6068 void Vcgt(Condition cond, 6069 DataType dt, 6070 DRegister rd, 6071 DRegister rm, 6072 const DOperand& operand) { 6073 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6074 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6075 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6076 VIXL_ASSERT(allow_macro_instructions_); 6077 VIXL_ASSERT(OutsideITBlock()); 6078 MacroEmissionCheckScope guard(this); 6079 ITScope it_scope(this, &cond); 6080 vcgt(cond, dt, rd, rm, operand); 6081 } 6082 void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 6083 Vcgt(al, dt, rd, rm, operand); 6084 } 6085 6086 void Vcgt(Condition cond, 6087 DataType dt, 6088 QRegister rd, 6089 QRegister rm, 6090 const QOperand& operand) { 6091 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6092 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6093 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6094 VIXL_ASSERT(allow_macro_instructions_); 6095 VIXL_ASSERT(OutsideITBlock()); 6096 MacroEmissionCheckScope guard(this); 6097 ITScope it_scope(this, &cond); 6098 vcgt(cond, dt, rd, rm, operand); 6099 } 6100 void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 6101 Vcgt(al, dt, rd, rm, operand); 6102 } 6103 6104 void Vcgt( 6105 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6106 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6107 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6108 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6109 VIXL_ASSERT(allow_macro_instructions_); 6110 VIXL_ASSERT(OutsideITBlock()); 6111 MacroEmissionCheckScope guard(this); 6112 ITScope it_scope(this, &cond); 6113 vcgt(cond, dt, rd, rn, rm); 6114 } 6115 void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6116 Vcgt(al, dt, rd, rn, rm); 6117 } 6118 6119 void Vcgt( 6120 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6121 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6122 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6123 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6124 VIXL_ASSERT(allow_macro_instructions_); 6125 VIXL_ASSERT(OutsideITBlock()); 6126 MacroEmissionCheckScope guard(this); 6127 ITScope it_scope(this, &cond); 6128 vcgt(cond, dt, rd, rn, rm); 6129 } 6130 void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6131 Vcgt(al, dt, rd, rn, rm); 6132 } 6133 6134 void Vcle(Condition cond, 6135 DataType dt, 6136 DRegister rd, 6137 DRegister rm, 6138 const DOperand& operand) { 6139 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6140 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6141 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6142 VIXL_ASSERT(allow_macro_instructions_); 6143 VIXL_ASSERT(OutsideITBlock()); 6144 MacroEmissionCheckScope guard(this); 6145 ITScope it_scope(this, &cond); 6146 vcle(cond, dt, rd, rm, operand); 6147 } 6148 void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 6149 Vcle(al, dt, rd, rm, operand); 6150 } 6151 6152 void Vcle(Condition cond, 6153 DataType dt, 6154 QRegister rd, 6155 QRegister rm, 6156 const QOperand& operand) { 6157 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6158 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6159 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6160 VIXL_ASSERT(allow_macro_instructions_); 6161 VIXL_ASSERT(OutsideITBlock()); 6162 MacroEmissionCheckScope guard(this); 6163 ITScope it_scope(this, &cond); 6164 vcle(cond, dt, rd, rm, operand); 6165 } 6166 void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 6167 Vcle(al, dt, rd, rm, operand); 6168 } 6169 6170 void Vcle( 6171 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6172 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6173 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6174 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6175 VIXL_ASSERT(allow_macro_instructions_); 6176 VIXL_ASSERT(OutsideITBlock()); 6177 MacroEmissionCheckScope guard(this); 6178 ITScope it_scope(this, &cond); 6179 vcle(cond, dt, rd, rn, rm); 6180 } 6181 void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6182 Vcle(al, dt, rd, rn, rm); 6183 } 6184 6185 void Vcle( 6186 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6187 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6188 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6189 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6190 VIXL_ASSERT(allow_macro_instructions_); 6191 VIXL_ASSERT(OutsideITBlock()); 6192 MacroEmissionCheckScope guard(this); 6193 ITScope it_scope(this, &cond); 6194 vcle(cond, dt, rd, rn, rm); 6195 } 6196 void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6197 Vcle(al, dt, rd, rn, rm); 6198 } 6199 6200 void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6201 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6202 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6203 VIXL_ASSERT(allow_macro_instructions_); 6204 VIXL_ASSERT(OutsideITBlock()); 6205 MacroEmissionCheckScope guard(this); 6206 ITScope it_scope(this, &cond); 6207 vcls(cond, dt, rd, rm); 6208 } 6209 void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); } 6210 6211 void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) { 6212 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6213 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6214 VIXL_ASSERT(allow_macro_instructions_); 6215 VIXL_ASSERT(OutsideITBlock()); 6216 MacroEmissionCheckScope guard(this); 6217 ITScope it_scope(this, &cond); 6218 vcls(cond, dt, rd, rm); 6219 } 6220 void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); } 6221 6222 void Vclt(Condition cond, 6223 DataType dt, 6224 DRegister rd, 6225 DRegister rm, 6226 const DOperand& operand) { 6227 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6228 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6229 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6230 VIXL_ASSERT(allow_macro_instructions_); 6231 VIXL_ASSERT(OutsideITBlock()); 6232 MacroEmissionCheckScope guard(this); 6233 ITScope it_scope(this, &cond); 6234 vclt(cond, dt, rd, rm, operand); 6235 } 6236 void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 6237 Vclt(al, dt, rd, rm, operand); 6238 } 6239 6240 void Vclt(Condition cond, 6241 DataType dt, 6242 QRegister rd, 6243 QRegister rm, 6244 const QOperand& operand) { 6245 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6246 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6247 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6248 VIXL_ASSERT(allow_macro_instructions_); 6249 VIXL_ASSERT(OutsideITBlock()); 6250 MacroEmissionCheckScope guard(this); 6251 ITScope it_scope(this, &cond); 6252 vclt(cond, dt, rd, rm, operand); 6253 } 6254 void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 6255 Vclt(al, dt, rd, rm, operand); 6256 } 6257 6258 void Vclt( 6259 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6260 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6261 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6262 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6263 VIXL_ASSERT(allow_macro_instructions_); 6264 VIXL_ASSERT(OutsideITBlock()); 6265 MacroEmissionCheckScope guard(this); 6266 ITScope it_scope(this, &cond); 6267 vclt(cond, dt, rd, rn, rm); 6268 } 6269 void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6270 Vclt(al, dt, rd, rn, rm); 6271 } 6272 6273 void Vclt( 6274 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6275 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6276 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6277 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6278 VIXL_ASSERT(allow_macro_instructions_); 6279 VIXL_ASSERT(OutsideITBlock()); 6280 MacroEmissionCheckScope guard(this); 6281 ITScope it_scope(this, &cond); 6282 vclt(cond, dt, rd, rn, rm); 6283 } 6284 void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6285 Vclt(al, dt, rd, rn, rm); 6286 } 6287 6288 void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6289 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6290 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6291 VIXL_ASSERT(allow_macro_instructions_); 6292 VIXL_ASSERT(OutsideITBlock()); 6293 MacroEmissionCheckScope guard(this); 6294 ITScope it_scope(this, &cond); 6295 vclz(cond, dt, rd, rm); 6296 } 6297 void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); } 6298 6299 void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) { 6300 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6301 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6302 VIXL_ASSERT(allow_macro_instructions_); 6303 VIXL_ASSERT(OutsideITBlock()); 6304 MacroEmissionCheckScope guard(this); 6305 ITScope it_scope(this, &cond); 6306 vclz(cond, dt, rd, rm); 6307 } 6308 void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); } 6309 6310 void Vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm) { 6311 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6312 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6313 VIXL_ASSERT(allow_macro_instructions_); 6314 VIXL_ASSERT(OutsideITBlock()); 6315 MacroEmissionCheckScope guard(this); 6316 ITScope it_scope(this, &cond); 6317 vcmp(cond, dt, rd, rm); 6318 } 6319 void Vcmp(DataType dt, SRegister rd, SRegister rm) { Vcmp(al, dt, rd, rm); } 6320 6321 void Vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6322 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6323 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6324 VIXL_ASSERT(allow_macro_instructions_); 6325 VIXL_ASSERT(OutsideITBlock()); 6326 MacroEmissionCheckScope guard(this); 6327 ITScope it_scope(this, &cond); 6328 vcmp(cond, dt, rd, rm); 6329 } 6330 void Vcmp(DataType dt, DRegister rd, DRegister rm) { Vcmp(al, dt, rd, rm); } 6331 6332 void Vcmp(Condition cond, DataType dt, SRegister rd, double imm) { 6333 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6334 VIXL_ASSERT(allow_macro_instructions_); 6335 VIXL_ASSERT(OutsideITBlock()); 6336 MacroEmissionCheckScope guard(this); 6337 ITScope it_scope(this, &cond); 6338 vcmp(cond, dt, rd, imm); 6339 } 6340 void Vcmp(DataType dt, SRegister rd, double imm) { Vcmp(al, dt, rd, imm); } 6341 6342 void Vcmp(Condition cond, DataType dt, DRegister rd, double imm) { 6343 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6344 VIXL_ASSERT(allow_macro_instructions_); 6345 VIXL_ASSERT(OutsideITBlock()); 6346 MacroEmissionCheckScope guard(this); 6347 ITScope it_scope(this, &cond); 6348 vcmp(cond, dt, rd, imm); 6349 } 6350 void Vcmp(DataType dt, DRegister rd, double imm) { Vcmp(al, dt, rd, imm); } 6351 6352 void Vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm) { 6353 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6354 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6355 VIXL_ASSERT(allow_macro_instructions_); 6356 VIXL_ASSERT(OutsideITBlock()); 6357 MacroEmissionCheckScope guard(this); 6358 ITScope it_scope(this, &cond); 6359 vcmpe(cond, dt, rd, rm); 6360 } 6361 void Vcmpe(DataType dt, SRegister rd, SRegister rm) { Vcmpe(al, dt, rd, rm); } 6362 6363 void Vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6364 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6365 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6366 VIXL_ASSERT(allow_macro_instructions_); 6367 VIXL_ASSERT(OutsideITBlock()); 6368 MacroEmissionCheckScope guard(this); 6369 ITScope it_scope(this, &cond); 6370 vcmpe(cond, dt, rd, rm); 6371 } 6372 void Vcmpe(DataType dt, DRegister rd, DRegister rm) { Vcmpe(al, dt, rd, rm); } 6373 6374 void Vcmpe(Condition cond, DataType dt, SRegister rd, double imm) { 6375 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6376 VIXL_ASSERT(allow_macro_instructions_); 6377 VIXL_ASSERT(OutsideITBlock()); 6378 MacroEmissionCheckScope guard(this); 6379 ITScope it_scope(this, &cond); 6380 vcmpe(cond, dt, rd, imm); 6381 } 6382 void Vcmpe(DataType dt, SRegister rd, double imm) { Vcmpe(al, dt, rd, imm); } 6383 6384 void Vcmpe(Condition cond, DataType dt, DRegister rd, double imm) { 6385 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6386 VIXL_ASSERT(allow_macro_instructions_); 6387 VIXL_ASSERT(OutsideITBlock()); 6388 MacroEmissionCheckScope guard(this); 6389 ITScope it_scope(this, &cond); 6390 vcmpe(cond, dt, rd, imm); 6391 } 6392 void Vcmpe(DataType dt, DRegister rd, double imm) { Vcmpe(al, dt, rd, imm); } 6393 6394 void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6395 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6396 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6397 VIXL_ASSERT(allow_macro_instructions_); 6398 VIXL_ASSERT(OutsideITBlock()); 6399 MacroEmissionCheckScope guard(this); 6400 ITScope it_scope(this, &cond); 6401 vcnt(cond, dt, rd, rm); 6402 } 6403 void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); } 6404 6405 void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) { 6406 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6407 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6408 VIXL_ASSERT(allow_macro_instructions_); 6409 VIXL_ASSERT(OutsideITBlock()); 6410 MacroEmissionCheckScope guard(this); 6411 ITScope it_scope(this, &cond); 6412 vcnt(cond, dt, rd, rm); 6413 } 6414 void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); } 6415 6416 void Vcvt( 6417 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6418 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6419 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6420 VIXL_ASSERT(allow_macro_instructions_); 6421 VIXL_ASSERT(OutsideITBlock()); 6422 MacroEmissionCheckScope guard(this); 6423 ITScope it_scope(this, &cond); 6424 vcvt(cond, dt1, dt2, rd, rm); 6425 } 6426 void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6427 Vcvt(al, dt1, dt2, rd, rm); 6428 } 6429 6430 void Vcvt( 6431 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6432 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6433 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6434 VIXL_ASSERT(allow_macro_instructions_); 6435 VIXL_ASSERT(OutsideITBlock()); 6436 MacroEmissionCheckScope guard(this); 6437 ITScope it_scope(this, &cond); 6438 vcvt(cond, dt1, dt2, rd, rm); 6439 } 6440 void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6441 Vcvt(al, dt1, dt2, rd, rm); 6442 } 6443 6444 void Vcvt(Condition cond, 6445 DataType dt1, 6446 DataType dt2, 6447 DRegister rd, 6448 DRegister rm, 6449 int32_t fbits) { 6450 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6451 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6452 VIXL_ASSERT(allow_macro_instructions_); 6453 VIXL_ASSERT(OutsideITBlock()); 6454 MacroEmissionCheckScope guard(this); 6455 ITScope it_scope(this, &cond); 6456 vcvt(cond, dt1, dt2, rd, rm, fbits); 6457 } 6458 void Vcvt( 6459 DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) { 6460 Vcvt(al, dt1, dt2, rd, rm, fbits); 6461 } 6462 6463 void Vcvt(Condition cond, 6464 DataType dt1, 6465 DataType dt2, 6466 QRegister rd, 6467 QRegister rm, 6468 int32_t fbits) { 6469 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6470 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6471 VIXL_ASSERT(allow_macro_instructions_); 6472 VIXL_ASSERT(OutsideITBlock()); 6473 MacroEmissionCheckScope guard(this); 6474 ITScope it_scope(this, &cond); 6475 vcvt(cond, dt1, dt2, rd, rm, fbits); 6476 } 6477 void Vcvt( 6478 DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) { 6479 Vcvt(al, dt1, dt2, rd, rm, fbits); 6480 } 6481 6482 void Vcvt(Condition cond, 6483 DataType dt1, 6484 DataType dt2, 6485 SRegister rd, 6486 SRegister rm, 6487 int32_t fbits) { 6488 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6489 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6490 VIXL_ASSERT(allow_macro_instructions_); 6491 VIXL_ASSERT(OutsideITBlock()); 6492 MacroEmissionCheckScope guard(this); 6493 ITScope it_scope(this, &cond); 6494 vcvt(cond, dt1, dt2, rd, rm, fbits); 6495 } 6496 void Vcvt( 6497 DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) { 6498 Vcvt(al, dt1, dt2, rd, rm, fbits); 6499 } 6500 6501 void Vcvt( 6502 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6503 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6504 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6505 VIXL_ASSERT(allow_macro_instructions_); 6506 VIXL_ASSERT(OutsideITBlock()); 6507 MacroEmissionCheckScope guard(this); 6508 ITScope it_scope(this, &cond); 6509 vcvt(cond, dt1, dt2, rd, rm); 6510 } 6511 void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6512 Vcvt(al, dt1, dt2, rd, rm); 6513 } 6514 6515 void Vcvt( 6516 Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6517 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6518 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6519 VIXL_ASSERT(allow_macro_instructions_); 6520 VIXL_ASSERT(OutsideITBlock()); 6521 MacroEmissionCheckScope guard(this); 6522 ITScope it_scope(this, &cond); 6523 vcvt(cond, dt1, dt2, rd, rm); 6524 } 6525 void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6526 Vcvt(al, dt1, dt2, rd, rm); 6527 } 6528 6529 void Vcvt( 6530 Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) { 6531 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6532 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6533 VIXL_ASSERT(allow_macro_instructions_); 6534 VIXL_ASSERT(OutsideITBlock()); 6535 MacroEmissionCheckScope guard(this); 6536 ITScope it_scope(this, &cond); 6537 vcvt(cond, dt1, dt2, rd, rm); 6538 } 6539 void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) { 6540 Vcvt(al, dt1, dt2, rd, rm); 6541 } 6542 6543 void Vcvt( 6544 Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) { 6545 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6546 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6547 VIXL_ASSERT(allow_macro_instructions_); 6548 VIXL_ASSERT(OutsideITBlock()); 6549 MacroEmissionCheckScope guard(this); 6550 ITScope it_scope(this, &cond); 6551 vcvt(cond, dt1, dt2, rd, rm); 6552 } 6553 void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) { 6554 Vcvt(al, dt1, dt2, rd, rm); 6555 } 6556 6557 void Vcvt( 6558 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6559 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6560 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6561 VIXL_ASSERT(allow_macro_instructions_); 6562 VIXL_ASSERT(OutsideITBlock()); 6563 MacroEmissionCheckScope guard(this); 6564 ITScope it_scope(this, &cond); 6565 vcvt(cond, dt1, dt2, rd, rm); 6566 } 6567 void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6568 Vcvt(al, dt1, dt2, rd, rm); 6569 } 6570 6571 void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6572 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6573 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6574 VIXL_ASSERT(allow_macro_instructions_); 6575 VIXL_ASSERT(OutsideITBlock()); 6576 MacroEmissionCheckScope guard(this); 6577 vcvta(dt1, dt2, rd, rm); 6578 } 6579 6580 void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6581 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6582 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6583 VIXL_ASSERT(allow_macro_instructions_); 6584 VIXL_ASSERT(OutsideITBlock()); 6585 MacroEmissionCheckScope guard(this); 6586 vcvta(dt1, dt2, rd, rm); 6587 } 6588 6589 void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6590 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6591 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6592 VIXL_ASSERT(allow_macro_instructions_); 6593 VIXL_ASSERT(OutsideITBlock()); 6594 MacroEmissionCheckScope guard(this); 6595 vcvta(dt1, dt2, rd, rm); 6596 } 6597 6598 void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6599 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6600 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6601 VIXL_ASSERT(allow_macro_instructions_); 6602 VIXL_ASSERT(OutsideITBlock()); 6603 MacroEmissionCheckScope guard(this); 6604 vcvta(dt1, dt2, rd, rm); 6605 } 6606 6607 void Vcvtb( 6608 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6609 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6610 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6611 VIXL_ASSERT(allow_macro_instructions_); 6612 VIXL_ASSERT(OutsideITBlock()); 6613 MacroEmissionCheckScope guard(this); 6614 ITScope it_scope(this, &cond); 6615 vcvtb(cond, dt1, dt2, rd, rm); 6616 } 6617 void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6618 Vcvtb(al, dt1, dt2, rd, rm); 6619 } 6620 6621 void Vcvtb( 6622 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6623 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6624 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6625 VIXL_ASSERT(allow_macro_instructions_); 6626 VIXL_ASSERT(OutsideITBlock()); 6627 MacroEmissionCheckScope guard(this); 6628 ITScope it_scope(this, &cond); 6629 vcvtb(cond, dt1, dt2, rd, rm); 6630 } 6631 void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6632 Vcvtb(al, dt1, dt2, rd, rm); 6633 } 6634 6635 void Vcvtb( 6636 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6637 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6638 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6639 VIXL_ASSERT(allow_macro_instructions_); 6640 VIXL_ASSERT(OutsideITBlock()); 6641 MacroEmissionCheckScope guard(this); 6642 ITScope it_scope(this, &cond); 6643 vcvtb(cond, dt1, dt2, rd, rm); 6644 } 6645 void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6646 Vcvtb(al, dt1, dt2, rd, rm); 6647 } 6648 6649 void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6650 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6651 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6652 VIXL_ASSERT(allow_macro_instructions_); 6653 VIXL_ASSERT(OutsideITBlock()); 6654 MacroEmissionCheckScope guard(this); 6655 vcvtm(dt1, dt2, rd, rm); 6656 } 6657 6658 void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6659 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6660 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6661 VIXL_ASSERT(allow_macro_instructions_); 6662 VIXL_ASSERT(OutsideITBlock()); 6663 MacroEmissionCheckScope guard(this); 6664 vcvtm(dt1, dt2, rd, rm); 6665 } 6666 6667 void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6668 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6669 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6670 VIXL_ASSERT(allow_macro_instructions_); 6671 VIXL_ASSERT(OutsideITBlock()); 6672 MacroEmissionCheckScope guard(this); 6673 vcvtm(dt1, dt2, rd, rm); 6674 } 6675 6676 void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6677 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6678 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6679 VIXL_ASSERT(allow_macro_instructions_); 6680 VIXL_ASSERT(OutsideITBlock()); 6681 MacroEmissionCheckScope guard(this); 6682 vcvtm(dt1, dt2, rd, rm); 6683 } 6684 6685 void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6686 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6687 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6688 VIXL_ASSERT(allow_macro_instructions_); 6689 VIXL_ASSERT(OutsideITBlock()); 6690 MacroEmissionCheckScope guard(this); 6691 vcvtn(dt1, dt2, rd, rm); 6692 } 6693 6694 void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6695 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6696 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6697 VIXL_ASSERT(allow_macro_instructions_); 6698 VIXL_ASSERT(OutsideITBlock()); 6699 MacroEmissionCheckScope guard(this); 6700 vcvtn(dt1, dt2, rd, rm); 6701 } 6702 6703 void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6704 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6705 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6706 VIXL_ASSERT(allow_macro_instructions_); 6707 VIXL_ASSERT(OutsideITBlock()); 6708 MacroEmissionCheckScope guard(this); 6709 vcvtn(dt1, dt2, rd, rm); 6710 } 6711 6712 void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6713 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6714 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6715 VIXL_ASSERT(allow_macro_instructions_); 6716 VIXL_ASSERT(OutsideITBlock()); 6717 MacroEmissionCheckScope guard(this); 6718 vcvtn(dt1, dt2, rd, rm); 6719 } 6720 6721 void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6722 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6723 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6724 VIXL_ASSERT(allow_macro_instructions_); 6725 VIXL_ASSERT(OutsideITBlock()); 6726 MacroEmissionCheckScope guard(this); 6727 vcvtp(dt1, dt2, rd, rm); 6728 } 6729 6730 void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6731 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6732 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6733 VIXL_ASSERT(allow_macro_instructions_); 6734 VIXL_ASSERT(OutsideITBlock()); 6735 MacroEmissionCheckScope guard(this); 6736 vcvtp(dt1, dt2, rd, rm); 6737 } 6738 6739 void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6740 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6741 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6742 VIXL_ASSERT(allow_macro_instructions_); 6743 VIXL_ASSERT(OutsideITBlock()); 6744 MacroEmissionCheckScope guard(this); 6745 vcvtp(dt1, dt2, rd, rm); 6746 } 6747 6748 void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6749 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6750 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6751 VIXL_ASSERT(allow_macro_instructions_); 6752 VIXL_ASSERT(OutsideITBlock()); 6753 MacroEmissionCheckScope guard(this); 6754 vcvtp(dt1, dt2, rd, rm); 6755 } 6756 6757 void Vcvtr( 6758 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6759 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6760 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6761 VIXL_ASSERT(allow_macro_instructions_); 6762 VIXL_ASSERT(OutsideITBlock()); 6763 MacroEmissionCheckScope guard(this); 6764 ITScope it_scope(this, &cond); 6765 vcvtr(cond, dt1, dt2, rd, rm); 6766 } 6767 void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6768 Vcvtr(al, dt1, dt2, rd, rm); 6769 } 6770 6771 void Vcvtr( 6772 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6773 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6774 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6775 VIXL_ASSERT(allow_macro_instructions_); 6776 VIXL_ASSERT(OutsideITBlock()); 6777 MacroEmissionCheckScope guard(this); 6778 ITScope it_scope(this, &cond); 6779 vcvtr(cond, dt1, dt2, rd, rm); 6780 } 6781 void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6782 Vcvtr(al, dt1, dt2, rd, rm); 6783 } 6784 6785 void Vcvtt( 6786 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6787 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6788 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6789 VIXL_ASSERT(allow_macro_instructions_); 6790 VIXL_ASSERT(OutsideITBlock()); 6791 MacroEmissionCheckScope guard(this); 6792 ITScope it_scope(this, &cond); 6793 vcvtt(cond, dt1, dt2, rd, rm); 6794 } 6795 void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6796 Vcvtt(al, dt1, dt2, rd, rm); 6797 } 6798 6799 void Vcvtt( 6800 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6801 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6802 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6803 VIXL_ASSERT(allow_macro_instructions_); 6804 VIXL_ASSERT(OutsideITBlock()); 6805 MacroEmissionCheckScope guard(this); 6806 ITScope it_scope(this, &cond); 6807 vcvtt(cond, dt1, dt2, rd, rm); 6808 } 6809 void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6810 Vcvtt(al, dt1, dt2, rd, rm); 6811 } 6812 6813 void Vcvtt( 6814 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6815 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6816 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6817 VIXL_ASSERT(allow_macro_instructions_); 6818 VIXL_ASSERT(OutsideITBlock()); 6819 MacroEmissionCheckScope guard(this); 6820 ITScope it_scope(this, &cond); 6821 vcvtt(cond, dt1, dt2, rd, rm); 6822 } 6823 void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6824 Vcvtt(al, dt1, dt2, rd, rm); 6825 } 6826 6827 void Vdiv( 6828 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6829 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6830 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6831 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6832 VIXL_ASSERT(allow_macro_instructions_); 6833 VIXL_ASSERT(OutsideITBlock()); 6834 MacroEmissionCheckScope guard(this); 6835 ITScope it_scope(this, &cond); 6836 vdiv(cond, dt, rd, rn, rm); 6837 } 6838 void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6839 Vdiv(al, dt, rd, rn, rm); 6840 } 6841 6842 void Vdiv( 6843 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6844 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6845 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6846 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6847 VIXL_ASSERT(allow_macro_instructions_); 6848 VIXL_ASSERT(OutsideITBlock()); 6849 MacroEmissionCheckScope guard(this); 6850 ITScope it_scope(this, &cond); 6851 vdiv(cond, dt, rd, rn, rm); 6852 } 6853 void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6854 Vdiv(al, dt, rd, rn, rm); 6855 } 6856 6857 void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) { 6858 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6859 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 6860 VIXL_ASSERT(allow_macro_instructions_); 6861 VIXL_ASSERT(OutsideITBlock()); 6862 MacroEmissionCheckScope guard(this); 6863 ITScope it_scope(this, &cond); 6864 vdup(cond, dt, rd, rt); 6865 } 6866 void Vdup(DataType dt, QRegister rd, Register rt) { Vdup(al, dt, rd, rt); } 6867 6868 void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) { 6869 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6870 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 6871 VIXL_ASSERT(allow_macro_instructions_); 6872 VIXL_ASSERT(OutsideITBlock()); 6873 MacroEmissionCheckScope guard(this); 6874 ITScope it_scope(this, &cond); 6875 vdup(cond, dt, rd, rt); 6876 } 6877 void Vdup(DataType dt, DRegister rd, Register rt) { Vdup(al, dt, rd, rt); } 6878 6879 void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) { 6880 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6881 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6882 VIXL_ASSERT(allow_macro_instructions_); 6883 VIXL_ASSERT(OutsideITBlock()); 6884 MacroEmissionCheckScope guard(this); 6885 ITScope it_scope(this, &cond); 6886 vdup(cond, dt, rd, rm); 6887 } 6888 void Vdup(DataType dt, DRegister rd, DRegisterLane rm) { 6889 Vdup(al, dt, rd, rm); 6890 } 6891 6892 void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) { 6893 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6894 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6895 VIXL_ASSERT(allow_macro_instructions_); 6896 VIXL_ASSERT(OutsideITBlock()); 6897 MacroEmissionCheckScope guard(this); 6898 ITScope it_scope(this, &cond); 6899 vdup(cond, dt, rd, rm); 6900 } 6901 void Vdup(DataType dt, QRegister rd, DRegisterLane rm) { 6902 Vdup(al, dt, rd, rm); 6903 } 6904 6905 void Veor( 6906 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6907 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6908 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6909 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6910 VIXL_ASSERT(allow_macro_instructions_); 6911 VIXL_ASSERT(OutsideITBlock()); 6912 MacroEmissionCheckScope guard(this); 6913 ITScope it_scope(this, &cond); 6914 veor(cond, dt, rd, rn, rm); 6915 } 6916 void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6917 Veor(al, dt, rd, rn, rm); 6918 } 6919 void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 6920 Veor(cond, kDataTypeValueNone, rd, rn, rm); 6921 } 6922 void Veor(DRegister rd, DRegister rn, DRegister rm) { 6923 Veor(al, kDataTypeValueNone, rd, rn, rm); 6924 } 6925 6926 void Veor( 6927 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6928 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6929 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6930 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6931 VIXL_ASSERT(allow_macro_instructions_); 6932 VIXL_ASSERT(OutsideITBlock()); 6933 MacroEmissionCheckScope guard(this); 6934 ITScope it_scope(this, &cond); 6935 veor(cond, dt, rd, rn, rm); 6936 } 6937 void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6938 Veor(al, dt, rd, rn, rm); 6939 } 6940 void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 6941 Veor(cond, kDataTypeValueNone, rd, rn, rm); 6942 } 6943 void Veor(QRegister rd, QRegister rn, QRegister rm) { 6944 Veor(al, kDataTypeValueNone, rd, rn, rm); 6945 } 6946 6947 void Vext(Condition cond, 6948 DataType dt, 6949 DRegister rd, 6950 DRegister rn, 6951 DRegister rm, 6952 const DOperand& operand) { 6953 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6954 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6955 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6956 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6957 VIXL_ASSERT(allow_macro_instructions_); 6958 VIXL_ASSERT(OutsideITBlock()); 6959 MacroEmissionCheckScope guard(this); 6960 ITScope it_scope(this, &cond); 6961 vext(cond, dt, rd, rn, rm, operand); 6962 } 6963 void Vext(DataType dt, 6964 DRegister rd, 6965 DRegister rn, 6966 DRegister rm, 6967 const DOperand& operand) { 6968 Vext(al, dt, rd, rn, rm, operand); 6969 } 6970 6971 void Vext(Condition cond, 6972 DataType dt, 6973 QRegister rd, 6974 QRegister rn, 6975 QRegister rm, 6976 const QOperand& operand) { 6977 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6978 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6979 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6980 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6981 VIXL_ASSERT(allow_macro_instructions_); 6982 VIXL_ASSERT(OutsideITBlock()); 6983 MacroEmissionCheckScope guard(this); 6984 ITScope it_scope(this, &cond); 6985 vext(cond, dt, rd, rn, rm, operand); 6986 } 6987 void Vext(DataType dt, 6988 QRegister rd, 6989 QRegister rn, 6990 QRegister rm, 6991 const QOperand& operand) { 6992 Vext(al, dt, rd, rn, rm, operand); 6993 } 6994 6995 void Vfma( 6996 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6997 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6998 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6999 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7000 VIXL_ASSERT(allow_macro_instructions_); 7001 VIXL_ASSERT(OutsideITBlock()); 7002 MacroEmissionCheckScope guard(this); 7003 ITScope it_scope(this, &cond); 7004 vfma(cond, dt, rd, rn, rm); 7005 } 7006 void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7007 Vfma(al, dt, rd, rn, rm); 7008 } 7009 7010 void Vfma( 7011 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7012 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7013 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7014 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7015 VIXL_ASSERT(allow_macro_instructions_); 7016 VIXL_ASSERT(OutsideITBlock()); 7017 MacroEmissionCheckScope guard(this); 7018 ITScope it_scope(this, &cond); 7019 vfma(cond, dt, rd, rn, rm); 7020 } 7021 void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7022 Vfma(al, dt, rd, rn, rm); 7023 } 7024 7025 void Vfma( 7026 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7027 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7028 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7029 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7030 VIXL_ASSERT(allow_macro_instructions_); 7031 VIXL_ASSERT(OutsideITBlock()); 7032 MacroEmissionCheckScope guard(this); 7033 ITScope it_scope(this, &cond); 7034 vfma(cond, dt, rd, rn, rm); 7035 } 7036 void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7037 Vfma(al, dt, rd, rn, rm); 7038 } 7039 7040 void Vfms( 7041 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7042 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7043 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7044 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7045 VIXL_ASSERT(allow_macro_instructions_); 7046 VIXL_ASSERT(OutsideITBlock()); 7047 MacroEmissionCheckScope guard(this); 7048 ITScope it_scope(this, &cond); 7049 vfms(cond, dt, rd, rn, rm); 7050 } 7051 void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7052 Vfms(al, dt, rd, rn, rm); 7053 } 7054 7055 void Vfms( 7056 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7057 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7058 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7059 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7060 VIXL_ASSERT(allow_macro_instructions_); 7061 VIXL_ASSERT(OutsideITBlock()); 7062 MacroEmissionCheckScope guard(this); 7063 ITScope it_scope(this, &cond); 7064 vfms(cond, dt, rd, rn, rm); 7065 } 7066 void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7067 Vfms(al, dt, rd, rn, rm); 7068 } 7069 7070 void Vfms( 7071 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7072 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7073 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7074 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7075 VIXL_ASSERT(allow_macro_instructions_); 7076 VIXL_ASSERT(OutsideITBlock()); 7077 MacroEmissionCheckScope guard(this); 7078 ITScope it_scope(this, &cond); 7079 vfms(cond, dt, rd, rn, rm); 7080 } 7081 void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7082 Vfms(al, dt, rd, rn, rm); 7083 } 7084 7085 void Vfnma( 7086 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7087 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7088 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7089 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7090 VIXL_ASSERT(allow_macro_instructions_); 7091 VIXL_ASSERT(OutsideITBlock()); 7092 MacroEmissionCheckScope guard(this); 7093 ITScope it_scope(this, &cond); 7094 vfnma(cond, dt, rd, rn, rm); 7095 } 7096 void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7097 Vfnma(al, dt, rd, rn, rm); 7098 } 7099 7100 void Vfnma( 7101 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7102 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7103 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7104 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7105 VIXL_ASSERT(allow_macro_instructions_); 7106 VIXL_ASSERT(OutsideITBlock()); 7107 MacroEmissionCheckScope guard(this); 7108 ITScope it_scope(this, &cond); 7109 vfnma(cond, dt, rd, rn, rm); 7110 } 7111 void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7112 Vfnma(al, dt, rd, rn, rm); 7113 } 7114 7115 void Vfnms( 7116 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7117 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7118 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7119 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7120 VIXL_ASSERT(allow_macro_instructions_); 7121 VIXL_ASSERT(OutsideITBlock()); 7122 MacroEmissionCheckScope guard(this); 7123 ITScope it_scope(this, &cond); 7124 vfnms(cond, dt, rd, rn, rm); 7125 } 7126 void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7127 Vfnms(al, dt, rd, rn, rm); 7128 } 7129 7130 void Vfnms( 7131 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7132 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7133 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7134 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7135 VIXL_ASSERT(allow_macro_instructions_); 7136 VIXL_ASSERT(OutsideITBlock()); 7137 MacroEmissionCheckScope guard(this); 7138 ITScope it_scope(this, &cond); 7139 vfnms(cond, dt, rd, rn, rm); 7140 } 7141 void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7142 Vfnms(al, dt, rd, rn, rm); 7143 } 7144 7145 void Vhadd( 7146 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7147 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7148 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7149 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7150 VIXL_ASSERT(allow_macro_instructions_); 7151 VIXL_ASSERT(OutsideITBlock()); 7152 MacroEmissionCheckScope guard(this); 7153 ITScope it_scope(this, &cond); 7154 vhadd(cond, dt, rd, rn, rm); 7155 } 7156 void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7157 Vhadd(al, dt, rd, rn, rm); 7158 } 7159 7160 void Vhadd( 7161 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7162 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7163 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7164 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7165 VIXL_ASSERT(allow_macro_instructions_); 7166 VIXL_ASSERT(OutsideITBlock()); 7167 MacroEmissionCheckScope guard(this); 7168 ITScope it_scope(this, &cond); 7169 vhadd(cond, dt, rd, rn, rm); 7170 } 7171 void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7172 Vhadd(al, dt, rd, rn, rm); 7173 } 7174 7175 void Vhsub( 7176 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7177 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7178 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7179 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7180 VIXL_ASSERT(allow_macro_instructions_); 7181 VIXL_ASSERT(OutsideITBlock()); 7182 MacroEmissionCheckScope guard(this); 7183 ITScope it_scope(this, &cond); 7184 vhsub(cond, dt, rd, rn, rm); 7185 } 7186 void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7187 Vhsub(al, dt, rd, rn, rm); 7188 } 7189 7190 void Vhsub( 7191 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7192 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7193 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7194 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7195 VIXL_ASSERT(allow_macro_instructions_); 7196 VIXL_ASSERT(OutsideITBlock()); 7197 MacroEmissionCheckScope guard(this); 7198 ITScope it_scope(this, &cond); 7199 vhsub(cond, dt, rd, rn, rm); 7200 } 7201 void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7202 Vhsub(al, dt, rd, rn, rm); 7203 } 7204 7205 void Vld1(Condition cond, 7206 DataType dt, 7207 const NeonRegisterList& nreglist, 7208 const AlignedMemOperand& operand) { 7209 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7210 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7211 VIXL_ASSERT(allow_macro_instructions_); 7212 VIXL_ASSERT(OutsideITBlock()); 7213 MacroEmissionCheckScope guard(this); 7214 ITScope it_scope(this, &cond); 7215 vld1(cond, dt, nreglist, operand); 7216 } 7217 void Vld1(DataType dt, 7218 const NeonRegisterList& nreglist, 7219 const AlignedMemOperand& operand) { 7220 Vld1(al, dt, nreglist, operand); 7221 } 7222 7223 void Vld2(Condition cond, 7224 DataType dt, 7225 const NeonRegisterList& nreglist, 7226 const AlignedMemOperand& operand) { 7227 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7228 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7229 VIXL_ASSERT(allow_macro_instructions_); 7230 VIXL_ASSERT(OutsideITBlock()); 7231 MacroEmissionCheckScope guard(this); 7232 ITScope it_scope(this, &cond); 7233 vld2(cond, dt, nreglist, operand); 7234 } 7235 void Vld2(DataType dt, 7236 const NeonRegisterList& nreglist, 7237 const AlignedMemOperand& operand) { 7238 Vld2(al, dt, nreglist, operand); 7239 } 7240 7241 void Vld3(Condition cond, 7242 DataType dt, 7243 const NeonRegisterList& nreglist, 7244 const AlignedMemOperand& operand) { 7245 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7246 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7247 VIXL_ASSERT(allow_macro_instructions_); 7248 VIXL_ASSERT(OutsideITBlock()); 7249 MacroEmissionCheckScope guard(this); 7250 ITScope it_scope(this, &cond); 7251 vld3(cond, dt, nreglist, operand); 7252 } 7253 void Vld3(DataType dt, 7254 const NeonRegisterList& nreglist, 7255 const AlignedMemOperand& operand) { 7256 Vld3(al, dt, nreglist, operand); 7257 } 7258 7259 void Vld3(Condition cond, 7260 DataType dt, 7261 const NeonRegisterList& nreglist, 7262 const MemOperand& operand) { 7263 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7264 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7265 VIXL_ASSERT(allow_macro_instructions_); 7266 VIXL_ASSERT(OutsideITBlock()); 7267 MacroEmissionCheckScope guard(this); 7268 ITScope it_scope(this, &cond); 7269 vld3(cond, dt, nreglist, operand); 7270 } 7271 void Vld3(DataType dt, 7272 const NeonRegisterList& nreglist, 7273 const MemOperand& operand) { 7274 Vld3(al, dt, nreglist, operand); 7275 } 7276 7277 void Vld4(Condition cond, 7278 DataType dt, 7279 const NeonRegisterList& nreglist, 7280 const AlignedMemOperand& operand) { 7281 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7282 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7283 VIXL_ASSERT(allow_macro_instructions_); 7284 VIXL_ASSERT(OutsideITBlock()); 7285 MacroEmissionCheckScope guard(this); 7286 ITScope it_scope(this, &cond); 7287 vld4(cond, dt, nreglist, operand); 7288 } 7289 void Vld4(DataType dt, 7290 const NeonRegisterList& nreglist, 7291 const AlignedMemOperand& operand) { 7292 Vld4(al, dt, nreglist, operand); 7293 } 7294 7295 void Vldm(Condition cond, 7296 DataType dt, 7297 Register rn, 7298 WriteBack write_back, 7299 DRegisterList dreglist) { 7300 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7301 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 7302 VIXL_ASSERT(allow_macro_instructions_); 7303 VIXL_ASSERT(OutsideITBlock()); 7304 MacroEmissionCheckScope guard(this); 7305 ITScope it_scope(this, &cond); 7306 vldm(cond, dt, rn, write_back, dreglist); 7307 } 7308 void Vldm(DataType dt, 7309 Register rn, 7310 WriteBack write_back, 7311 DRegisterList dreglist) { 7312 Vldm(al, dt, rn, write_back, dreglist); 7313 } 7314 void Vldm(Condition cond, 7315 Register rn, 7316 WriteBack write_back, 7317 DRegisterList dreglist) { 7318 Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist); 7319 } 7320 void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) { 7321 Vldm(al, kDataTypeValueNone, rn, write_back, dreglist); 7322 } 7323 7324 void Vldm(Condition cond, 7325 DataType dt, 7326 Register rn, 7327 WriteBack write_back, 7328 SRegisterList sreglist) { 7329 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7330 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 7331 VIXL_ASSERT(allow_macro_instructions_); 7332 VIXL_ASSERT(OutsideITBlock()); 7333 MacroEmissionCheckScope guard(this); 7334 ITScope it_scope(this, &cond); 7335 vldm(cond, dt, rn, write_back, sreglist); 7336 } 7337 void Vldm(DataType dt, 7338 Register rn, 7339 WriteBack write_back, 7340 SRegisterList sreglist) { 7341 Vldm(al, dt, rn, write_back, sreglist); 7342 } 7343 void Vldm(Condition cond, 7344 Register rn, 7345 WriteBack write_back, 7346 SRegisterList sreglist) { 7347 Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist); 7348 } 7349 void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) { 7350 Vldm(al, kDataTypeValueNone, rn, write_back, sreglist); 7351 } 7352 7353 void Vldmdb(Condition cond, 7354 DataType dt, 7355 Register rn, 7356 WriteBack write_back, 7357 DRegisterList dreglist) { 7358 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7359 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 7360 VIXL_ASSERT(allow_macro_instructions_); 7361 VIXL_ASSERT(OutsideITBlock()); 7362 MacroEmissionCheckScope guard(this); 7363 ITScope it_scope(this, &cond); 7364 vldmdb(cond, dt, rn, write_back, dreglist); 7365 } 7366 void Vldmdb(DataType dt, 7367 Register rn, 7368 WriteBack write_back, 7369 DRegisterList dreglist) { 7370 Vldmdb(al, dt, rn, write_back, dreglist); 7371 } 7372 void Vldmdb(Condition cond, 7373 Register rn, 7374 WriteBack write_back, 7375 DRegisterList dreglist) { 7376 Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist); 7377 } 7378 void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) { 7379 Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist); 7380 } 7381 7382 void Vldmdb(Condition cond, 7383 DataType dt, 7384 Register rn, 7385 WriteBack write_back, 7386 SRegisterList sreglist) { 7387 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7388 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 7389 VIXL_ASSERT(allow_macro_instructions_); 7390 VIXL_ASSERT(OutsideITBlock()); 7391 MacroEmissionCheckScope guard(this); 7392 ITScope it_scope(this, &cond); 7393 vldmdb(cond, dt, rn, write_back, sreglist); 7394 } 7395 void Vldmdb(DataType dt, 7396 Register rn, 7397 WriteBack write_back, 7398 SRegisterList sreglist) { 7399 Vldmdb(al, dt, rn, write_back, sreglist); 7400 } 7401 void Vldmdb(Condition cond, 7402 Register rn, 7403 WriteBack write_back, 7404 SRegisterList sreglist) { 7405 Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist); 7406 } 7407 void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) { 7408 Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist); 7409 } 7410 7411 void Vldmia(Condition cond, 7412 DataType dt, 7413 Register rn, 7414 WriteBack write_back, 7415 DRegisterList dreglist) { 7416 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7417 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 7418 VIXL_ASSERT(allow_macro_instructions_); 7419 VIXL_ASSERT(OutsideITBlock()); 7420 MacroEmissionCheckScope guard(this); 7421 ITScope it_scope(this, &cond); 7422 vldmia(cond, dt, rn, write_back, dreglist); 7423 } 7424 void Vldmia(DataType dt, 7425 Register rn, 7426 WriteBack write_back, 7427 DRegisterList dreglist) { 7428 Vldmia(al, dt, rn, write_back, dreglist); 7429 } 7430 void Vldmia(Condition cond, 7431 Register rn, 7432 WriteBack write_back, 7433 DRegisterList dreglist) { 7434 Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist); 7435 } 7436 void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) { 7437 Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist); 7438 } 7439 7440 void Vldmia(Condition cond, 7441 DataType dt, 7442 Register rn, 7443 WriteBack write_back, 7444 SRegisterList sreglist) { 7445 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7446 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 7447 VIXL_ASSERT(allow_macro_instructions_); 7448 VIXL_ASSERT(OutsideITBlock()); 7449 MacroEmissionCheckScope guard(this); 7450 ITScope it_scope(this, &cond); 7451 vldmia(cond, dt, rn, write_back, sreglist); 7452 } 7453 void Vldmia(DataType dt, 7454 Register rn, 7455 WriteBack write_back, 7456 SRegisterList sreglist) { 7457 Vldmia(al, dt, rn, write_back, sreglist); 7458 } 7459 void Vldmia(Condition cond, 7460 Register rn, 7461 WriteBack write_back, 7462 SRegisterList sreglist) { 7463 Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist); 7464 } 7465 void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) { 7466 Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist); 7467 } 7468 7469 void Vldr(Condition cond, DataType dt, DRegister rd, Label* label) { 7470 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7471 VIXL_ASSERT(allow_macro_instructions_); 7472 VIXL_ASSERT(OutsideITBlock()); 7473 MacroEmissionCheckScope guard(this); 7474 ITScope it_scope(this, &cond); 7475 vldr(cond, dt, rd, label); 7476 } 7477 void Vldr(DataType dt, DRegister rd, Label* label) { 7478 Vldr(al, dt, rd, label); 7479 } 7480 void Vldr(Condition cond, DRegister rd, Label* label) { 7481 Vldr(cond, Untyped64, rd, label); 7482 } 7483 void Vldr(DRegister rd, Label* label) { Vldr(al, Untyped64, rd, label); } 7484 7485 void Vldr(Condition cond, 7486 DataType dt, 7487 DRegister rd, 7488 const MemOperand& operand) { 7489 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7490 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7491 VIXL_ASSERT(allow_macro_instructions_); 7492 VIXL_ASSERT(OutsideITBlock()); 7493 MacroEmissionCheckScope guard(this); 7494 ITScope it_scope(this, &cond); 7495 vldr(cond, dt, rd, operand); 7496 } 7497 void Vldr(DataType dt, DRegister rd, const MemOperand& operand) { 7498 Vldr(al, dt, rd, operand); 7499 } 7500 void Vldr(Condition cond, DRegister rd, const MemOperand& operand) { 7501 Vldr(cond, Untyped64, rd, operand); 7502 } 7503 void Vldr(DRegister rd, const MemOperand& operand) { 7504 Vldr(al, Untyped64, rd, operand); 7505 } 7506 7507 void Vldr(Condition cond, DataType dt, SRegister rd, Label* label) { 7508 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7509 VIXL_ASSERT(allow_macro_instructions_); 7510 VIXL_ASSERT(OutsideITBlock()); 7511 MacroEmissionCheckScope guard(this); 7512 ITScope it_scope(this, &cond); 7513 vldr(cond, dt, rd, label); 7514 } 7515 void Vldr(DataType dt, SRegister rd, Label* label) { 7516 Vldr(al, dt, rd, label); 7517 } 7518 void Vldr(Condition cond, SRegister rd, Label* label) { 7519 Vldr(cond, Untyped32, rd, label); 7520 } 7521 void Vldr(SRegister rd, Label* label) { Vldr(al, Untyped32, rd, label); } 7522 7523 void Vldr(Condition cond, 7524 DataType dt, 7525 SRegister rd, 7526 const MemOperand& operand) { 7527 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7528 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7529 VIXL_ASSERT(allow_macro_instructions_); 7530 VIXL_ASSERT(OutsideITBlock()); 7531 MacroEmissionCheckScope guard(this); 7532 ITScope it_scope(this, &cond); 7533 vldr(cond, dt, rd, operand); 7534 } 7535 void Vldr(DataType dt, SRegister rd, const MemOperand& operand) { 7536 Vldr(al, dt, rd, operand); 7537 } 7538 void Vldr(Condition cond, SRegister rd, const MemOperand& operand) { 7539 Vldr(cond, Untyped32, rd, operand); 7540 } 7541 void Vldr(SRegister rd, const MemOperand& operand) { 7542 Vldr(al, Untyped32, rd, operand); 7543 } 7544 7545 void Vmax( 7546 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7547 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7548 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7549 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7550 VIXL_ASSERT(allow_macro_instructions_); 7551 VIXL_ASSERT(OutsideITBlock()); 7552 MacroEmissionCheckScope guard(this); 7553 ITScope it_scope(this, &cond); 7554 vmax(cond, dt, rd, rn, rm); 7555 } 7556 void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7557 Vmax(al, dt, rd, rn, rm); 7558 } 7559 7560 void Vmax( 7561 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7562 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7563 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7564 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7565 VIXL_ASSERT(allow_macro_instructions_); 7566 VIXL_ASSERT(OutsideITBlock()); 7567 MacroEmissionCheckScope guard(this); 7568 ITScope it_scope(this, &cond); 7569 vmax(cond, dt, rd, rn, rm); 7570 } 7571 void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7572 Vmax(al, dt, rd, rn, rm); 7573 } 7574 7575 void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7576 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7577 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7578 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7579 VIXL_ASSERT(allow_macro_instructions_); 7580 VIXL_ASSERT(OutsideITBlock()); 7581 MacroEmissionCheckScope guard(this); 7582 vmaxnm(dt, rd, rn, rm); 7583 } 7584 7585 void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7586 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7587 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7588 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7589 VIXL_ASSERT(allow_macro_instructions_); 7590 VIXL_ASSERT(OutsideITBlock()); 7591 MacroEmissionCheckScope guard(this); 7592 vmaxnm(dt, rd, rn, rm); 7593 } 7594 7595 void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7596 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7597 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7598 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7599 VIXL_ASSERT(allow_macro_instructions_); 7600 VIXL_ASSERT(OutsideITBlock()); 7601 MacroEmissionCheckScope guard(this); 7602 vmaxnm(dt, rd, rn, rm); 7603 } 7604 7605 void Vmin( 7606 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7607 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7608 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7609 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7610 VIXL_ASSERT(allow_macro_instructions_); 7611 VIXL_ASSERT(OutsideITBlock()); 7612 MacroEmissionCheckScope guard(this); 7613 ITScope it_scope(this, &cond); 7614 vmin(cond, dt, rd, rn, rm); 7615 } 7616 void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7617 Vmin(al, dt, rd, rn, rm); 7618 } 7619 7620 void Vmin( 7621 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7622 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7623 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7624 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7625 VIXL_ASSERT(allow_macro_instructions_); 7626 VIXL_ASSERT(OutsideITBlock()); 7627 MacroEmissionCheckScope guard(this); 7628 ITScope it_scope(this, &cond); 7629 vmin(cond, dt, rd, rn, rm); 7630 } 7631 void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7632 Vmin(al, dt, rd, rn, rm); 7633 } 7634 7635 void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7636 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7637 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7638 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7639 VIXL_ASSERT(allow_macro_instructions_); 7640 VIXL_ASSERT(OutsideITBlock()); 7641 MacroEmissionCheckScope guard(this); 7642 vminnm(dt, rd, rn, rm); 7643 } 7644 7645 void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7646 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7647 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7648 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7649 VIXL_ASSERT(allow_macro_instructions_); 7650 VIXL_ASSERT(OutsideITBlock()); 7651 MacroEmissionCheckScope guard(this); 7652 vminnm(dt, rd, rn, rm); 7653 } 7654 7655 void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7656 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7657 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7658 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7659 VIXL_ASSERT(allow_macro_instructions_); 7660 VIXL_ASSERT(OutsideITBlock()); 7661 MacroEmissionCheckScope guard(this); 7662 vminnm(dt, rd, rn, rm); 7663 } 7664 7665 void Vmla(Condition cond, 7666 DataType dt, 7667 DRegister rd, 7668 DRegister rn, 7669 DRegisterLane rm) { 7670 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7671 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7672 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7673 VIXL_ASSERT(allow_macro_instructions_); 7674 VIXL_ASSERT(OutsideITBlock()); 7675 MacroEmissionCheckScope guard(this); 7676 ITScope it_scope(this, &cond); 7677 vmla(cond, dt, rd, rn, rm); 7678 } 7679 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 7680 Vmla(al, dt, rd, rn, rm); 7681 } 7682 7683 void Vmla(Condition cond, 7684 DataType dt, 7685 QRegister rd, 7686 QRegister rn, 7687 DRegisterLane rm) { 7688 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7689 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7690 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7691 VIXL_ASSERT(allow_macro_instructions_); 7692 VIXL_ASSERT(OutsideITBlock()); 7693 MacroEmissionCheckScope guard(this); 7694 ITScope it_scope(this, &cond); 7695 vmla(cond, dt, rd, rn, rm); 7696 } 7697 void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 7698 Vmla(al, dt, rd, rn, rm); 7699 } 7700 7701 void Vmla( 7702 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7703 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7704 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7705 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7706 VIXL_ASSERT(allow_macro_instructions_); 7707 VIXL_ASSERT(OutsideITBlock()); 7708 MacroEmissionCheckScope guard(this); 7709 ITScope it_scope(this, &cond); 7710 vmla(cond, dt, rd, rn, rm); 7711 } 7712 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7713 Vmla(al, dt, rd, rn, rm); 7714 } 7715 7716 void Vmla( 7717 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7718 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7719 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7720 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7721 VIXL_ASSERT(allow_macro_instructions_); 7722 VIXL_ASSERT(OutsideITBlock()); 7723 MacroEmissionCheckScope guard(this); 7724 ITScope it_scope(this, &cond); 7725 vmla(cond, dt, rd, rn, rm); 7726 } 7727 void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7728 Vmla(al, dt, rd, rn, rm); 7729 } 7730 7731 void Vmla( 7732 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7733 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7734 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7735 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7736 VIXL_ASSERT(allow_macro_instructions_); 7737 VIXL_ASSERT(OutsideITBlock()); 7738 MacroEmissionCheckScope guard(this); 7739 ITScope it_scope(this, &cond); 7740 vmla(cond, dt, rd, rn, rm); 7741 } 7742 void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7743 Vmla(al, dt, rd, rn, rm); 7744 } 7745 7746 void Vmlal(Condition cond, 7747 DataType dt, 7748 QRegister rd, 7749 DRegister rn, 7750 DRegisterLane rm) { 7751 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7752 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7753 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7754 VIXL_ASSERT(allow_macro_instructions_); 7755 VIXL_ASSERT(OutsideITBlock()); 7756 MacroEmissionCheckScope guard(this); 7757 ITScope it_scope(this, &cond); 7758 vmlal(cond, dt, rd, rn, rm); 7759 } 7760 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { 7761 Vmlal(al, dt, rd, rn, rm); 7762 } 7763 7764 void Vmlal( 7765 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7766 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7767 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7768 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7769 VIXL_ASSERT(allow_macro_instructions_); 7770 VIXL_ASSERT(OutsideITBlock()); 7771 MacroEmissionCheckScope guard(this); 7772 ITScope it_scope(this, &cond); 7773 vmlal(cond, dt, rd, rn, rm); 7774 } 7775 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7776 Vmlal(al, dt, rd, rn, rm); 7777 } 7778 7779 void Vmls(Condition cond, 7780 DataType dt, 7781 DRegister rd, 7782 DRegister rn, 7783 DRegisterLane rm) { 7784 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7785 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7786 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7787 VIXL_ASSERT(allow_macro_instructions_); 7788 VIXL_ASSERT(OutsideITBlock()); 7789 MacroEmissionCheckScope guard(this); 7790 ITScope it_scope(this, &cond); 7791 vmls(cond, dt, rd, rn, rm); 7792 } 7793 void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 7794 Vmls(al, dt, rd, rn, rm); 7795 } 7796 7797 void Vmls(Condition cond, 7798 DataType dt, 7799 QRegister rd, 7800 QRegister rn, 7801 DRegisterLane rm) { 7802 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7803 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7804 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7805 VIXL_ASSERT(allow_macro_instructions_); 7806 VIXL_ASSERT(OutsideITBlock()); 7807 MacroEmissionCheckScope guard(this); 7808 ITScope it_scope(this, &cond); 7809 vmls(cond, dt, rd, rn, rm); 7810 } 7811 void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 7812 Vmls(al, dt, rd, rn, rm); 7813 } 7814 7815 void Vmls( 7816 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7817 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7818 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7819 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7820 VIXL_ASSERT(allow_macro_instructions_); 7821 VIXL_ASSERT(OutsideITBlock()); 7822 MacroEmissionCheckScope guard(this); 7823 ITScope it_scope(this, &cond); 7824 vmls(cond, dt, rd, rn, rm); 7825 } 7826 void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7827 Vmls(al, dt, rd, rn, rm); 7828 } 7829 7830 void Vmls( 7831 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7832 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7833 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7834 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7835 VIXL_ASSERT(allow_macro_instructions_); 7836 VIXL_ASSERT(OutsideITBlock()); 7837 MacroEmissionCheckScope guard(this); 7838 ITScope it_scope(this, &cond); 7839 vmls(cond, dt, rd, rn, rm); 7840 } 7841 void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7842 Vmls(al, dt, rd, rn, rm); 7843 } 7844 7845 void Vmls( 7846 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7847 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7848 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7849 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7850 VIXL_ASSERT(allow_macro_instructions_); 7851 VIXL_ASSERT(OutsideITBlock()); 7852 MacroEmissionCheckScope guard(this); 7853 ITScope it_scope(this, &cond); 7854 vmls(cond, dt, rd, rn, rm); 7855 } 7856 void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7857 Vmls(al, dt, rd, rn, rm); 7858 } 7859 7860 void Vmlsl(Condition cond, 7861 DataType dt, 7862 QRegister rd, 7863 DRegister rn, 7864 DRegisterLane rm) { 7865 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7866 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7867 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7868 VIXL_ASSERT(allow_macro_instructions_); 7869 VIXL_ASSERT(OutsideITBlock()); 7870 MacroEmissionCheckScope guard(this); 7871 ITScope it_scope(this, &cond); 7872 vmlsl(cond, dt, rd, rn, rm); 7873 } 7874 void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { 7875 Vmlsl(al, dt, rd, rn, rm); 7876 } 7877 7878 void Vmlsl( 7879 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7880 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7881 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7882 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7883 VIXL_ASSERT(allow_macro_instructions_); 7884 VIXL_ASSERT(OutsideITBlock()); 7885 MacroEmissionCheckScope guard(this); 7886 ITScope it_scope(this, &cond); 7887 vmlsl(cond, dt, rd, rn, rm); 7888 } 7889 void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7890 Vmlsl(al, dt, rd, rn, rm); 7891 } 7892 7893 void Vmov(Condition cond, Register rt, SRegister rn) { 7894 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7895 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7896 VIXL_ASSERT(allow_macro_instructions_); 7897 VIXL_ASSERT(OutsideITBlock()); 7898 MacroEmissionCheckScope guard(this); 7899 ITScope it_scope(this, &cond); 7900 vmov(cond, rt, rn); 7901 } 7902 void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); } 7903 7904 void Vmov(Condition cond, SRegister rn, Register rt) { 7905 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7906 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7907 VIXL_ASSERT(allow_macro_instructions_); 7908 VIXL_ASSERT(OutsideITBlock()); 7909 MacroEmissionCheckScope guard(this); 7910 ITScope it_scope(this, &cond); 7911 vmov(cond, rn, rt); 7912 } 7913 void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); } 7914 7915 void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) { 7916 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7917 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7918 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7919 VIXL_ASSERT(allow_macro_instructions_); 7920 VIXL_ASSERT(OutsideITBlock()); 7921 MacroEmissionCheckScope guard(this); 7922 ITScope it_scope(this, &cond); 7923 vmov(cond, rt, rt2, rm); 7924 } 7925 void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); } 7926 7927 void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) { 7928 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7929 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7930 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7931 VIXL_ASSERT(allow_macro_instructions_); 7932 VIXL_ASSERT(OutsideITBlock()); 7933 MacroEmissionCheckScope guard(this); 7934 ITScope it_scope(this, &cond); 7935 vmov(cond, rm, rt, rt2); 7936 } 7937 void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); } 7938 7939 void Vmov( 7940 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) { 7941 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7942 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7943 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7944 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1)); 7945 VIXL_ASSERT(allow_macro_instructions_); 7946 VIXL_ASSERT(OutsideITBlock()); 7947 MacroEmissionCheckScope guard(this); 7948 ITScope it_scope(this, &cond); 7949 vmov(cond, rt, rt2, rm, rm1); 7950 } 7951 void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) { 7952 Vmov(al, rt, rt2, rm, rm1); 7953 } 7954 7955 void Vmov( 7956 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) { 7957 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7958 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1)); 7959 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7960 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7961 VIXL_ASSERT(allow_macro_instructions_); 7962 VIXL_ASSERT(OutsideITBlock()); 7963 MacroEmissionCheckScope guard(this); 7964 ITScope it_scope(this, &cond); 7965 vmov(cond, rm, rm1, rt, rt2); 7966 } 7967 void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) { 7968 Vmov(al, rm, rm1, rt, rt2); 7969 } 7970 7971 void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) { 7972 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7973 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7974 VIXL_ASSERT(allow_macro_instructions_); 7975 VIXL_ASSERT(OutsideITBlock()); 7976 MacroEmissionCheckScope guard(this); 7977 ITScope it_scope(this, &cond); 7978 vmov(cond, dt, rd, rt); 7979 } 7980 void Vmov(DataType dt, DRegisterLane rd, Register rt) { 7981 Vmov(al, dt, rd, rt); 7982 } 7983 void Vmov(Condition cond, DRegisterLane rd, Register rt) { 7984 Vmov(cond, kDataTypeValueNone, rd, rt); 7985 } 7986 void Vmov(DRegisterLane rd, Register rt) { 7987 Vmov(al, kDataTypeValueNone, rd, rt); 7988 } 7989 7990 void Vmov(Condition cond, 7991 DataType dt, 7992 DRegister rd, 7993 const DOperand& operand) { 7994 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7995 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7996 VIXL_ASSERT(allow_macro_instructions_); 7997 VIXL_ASSERT(OutsideITBlock()); 7998 MacroEmissionCheckScope guard(this); 7999 ITScope it_scope(this, &cond); 8000 vmov(cond, dt, rd, operand); 8001 } 8002 void Vmov(DataType dt, DRegister rd, const DOperand& operand) { 8003 Vmov(al, dt, rd, operand); 8004 } 8005 8006 void Vmov(Condition cond, 8007 DataType dt, 8008 QRegister rd, 8009 const QOperand& operand) { 8010 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8011 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8012 VIXL_ASSERT(allow_macro_instructions_); 8013 VIXL_ASSERT(OutsideITBlock()); 8014 MacroEmissionCheckScope guard(this); 8015 ITScope it_scope(this, &cond); 8016 vmov(cond, dt, rd, operand); 8017 } 8018 void Vmov(DataType dt, QRegister rd, const QOperand& operand) { 8019 Vmov(al, dt, rd, operand); 8020 } 8021 8022 void Vmov(Condition cond, 8023 DataType dt, 8024 SRegister rd, 8025 const SOperand& operand) { 8026 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8027 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8028 VIXL_ASSERT(allow_macro_instructions_); 8029 VIXL_ASSERT(OutsideITBlock()); 8030 MacroEmissionCheckScope guard(this); 8031 ITScope it_scope(this, &cond); 8032 vmov(cond, dt, rd, operand); 8033 } 8034 void Vmov(DataType dt, SRegister rd, const SOperand& operand) { 8035 Vmov(al, dt, rd, operand); 8036 } 8037 8038 void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) { 8039 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 8040 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8041 VIXL_ASSERT(allow_macro_instructions_); 8042 VIXL_ASSERT(OutsideITBlock()); 8043 MacroEmissionCheckScope guard(this); 8044 ITScope it_scope(this, &cond); 8045 vmov(cond, dt, rt, rn); 8046 } 8047 void Vmov(DataType dt, Register rt, DRegisterLane rn) { 8048 Vmov(al, dt, rt, rn); 8049 } 8050 void Vmov(Condition cond, Register rt, DRegisterLane rn) { 8051 Vmov(cond, kDataTypeValueNone, rt, rn); 8052 } 8053 void Vmov(Register rt, DRegisterLane rn) { 8054 Vmov(al, kDataTypeValueNone, rt, rn); 8055 } 8056 8057 void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) { 8058 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8059 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8060 VIXL_ASSERT(allow_macro_instructions_); 8061 VIXL_ASSERT(OutsideITBlock()); 8062 MacroEmissionCheckScope guard(this); 8063 ITScope it_scope(this, &cond); 8064 vmovl(cond, dt, rd, rm); 8065 } 8066 void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); } 8067 8068 void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) { 8069 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8070 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8071 VIXL_ASSERT(allow_macro_instructions_); 8072 VIXL_ASSERT(OutsideITBlock()); 8073 MacroEmissionCheckScope guard(this); 8074 ITScope it_scope(this, &cond); 8075 vmovn(cond, dt, rd, rm); 8076 } 8077 void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); } 8078 8079 void Vmrs(Condition cond, 8080 RegisterOrAPSR_nzcv rt, 8081 SpecialFPRegister spec_reg) { 8082 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 8083 VIXL_ASSERT(allow_macro_instructions_); 8084 VIXL_ASSERT(OutsideITBlock()); 8085 MacroEmissionCheckScope guard(this); 8086 ITScope it_scope(this, &cond); 8087 vmrs(cond, rt, spec_reg); 8088 } 8089 void Vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) { 8090 Vmrs(al, rt, spec_reg); 8091 } 8092 8093 void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) { 8094 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 8095 VIXL_ASSERT(allow_macro_instructions_); 8096 VIXL_ASSERT(OutsideITBlock()); 8097 MacroEmissionCheckScope guard(this); 8098 ITScope it_scope(this, &cond); 8099 vmsr(cond, spec_reg, rt); 8100 } 8101 void Vmsr(SpecialFPRegister spec_reg, Register rt) { Vmsr(al, spec_reg, rt); } 8102 8103 void Vmul(Condition cond, 8104 DataType dt, 8105 DRegister rd, 8106 DRegister rn, 8107 DRegister dm, 8108 unsigned index) { 8109 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8110 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8111 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8112 VIXL_ASSERT(allow_macro_instructions_); 8113 VIXL_ASSERT(OutsideITBlock()); 8114 MacroEmissionCheckScope guard(this); 8115 ITScope it_scope(this, &cond); 8116 vmul(cond, dt, rd, rn, dm, index); 8117 } 8118 void Vmul( 8119 DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) { 8120 Vmul(al, dt, rd, rn, dm, index); 8121 } 8122 8123 void Vmul(Condition cond, 8124 DataType dt, 8125 QRegister rd, 8126 QRegister rn, 8127 DRegister dm, 8128 unsigned index) { 8129 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8130 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8131 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8132 VIXL_ASSERT(allow_macro_instructions_); 8133 VIXL_ASSERT(OutsideITBlock()); 8134 MacroEmissionCheckScope guard(this); 8135 ITScope it_scope(this, &cond); 8136 vmul(cond, dt, rd, rn, dm, index); 8137 } 8138 void Vmul( 8139 DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) { 8140 Vmul(al, dt, rd, rn, dm, index); 8141 } 8142 8143 void Vmul( 8144 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8145 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8146 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8147 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8148 VIXL_ASSERT(allow_macro_instructions_); 8149 VIXL_ASSERT(OutsideITBlock()); 8150 MacroEmissionCheckScope guard(this); 8151 ITScope it_scope(this, &cond); 8152 vmul(cond, dt, rd, rn, rm); 8153 } 8154 void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8155 Vmul(al, dt, rd, rn, rm); 8156 } 8157 8158 void Vmul( 8159 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8160 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8161 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8162 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8163 VIXL_ASSERT(allow_macro_instructions_); 8164 VIXL_ASSERT(OutsideITBlock()); 8165 MacroEmissionCheckScope guard(this); 8166 ITScope it_scope(this, &cond); 8167 vmul(cond, dt, rd, rn, rm); 8168 } 8169 void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8170 Vmul(al, dt, rd, rn, rm); 8171 } 8172 8173 void Vmul( 8174 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8175 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8176 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8177 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8178 VIXL_ASSERT(allow_macro_instructions_); 8179 VIXL_ASSERT(OutsideITBlock()); 8180 MacroEmissionCheckScope guard(this); 8181 ITScope it_scope(this, &cond); 8182 vmul(cond, dt, rd, rn, rm); 8183 } 8184 void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8185 Vmul(al, dt, rd, rn, rm); 8186 } 8187 8188 void Vmull(Condition cond, 8189 DataType dt, 8190 QRegister rd, 8191 DRegister rn, 8192 DRegister dm, 8193 unsigned index) { 8194 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8195 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8196 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8197 VIXL_ASSERT(allow_macro_instructions_); 8198 VIXL_ASSERT(OutsideITBlock()); 8199 MacroEmissionCheckScope guard(this); 8200 ITScope it_scope(this, &cond); 8201 vmull(cond, dt, rd, rn, dm, index); 8202 } 8203 void Vmull( 8204 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { 8205 Vmull(al, dt, rd, rn, dm, index); 8206 } 8207 8208 void Vmull( 8209 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8210 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8211 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8212 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8213 VIXL_ASSERT(allow_macro_instructions_); 8214 VIXL_ASSERT(OutsideITBlock()); 8215 MacroEmissionCheckScope guard(this); 8216 ITScope it_scope(this, &cond); 8217 vmull(cond, dt, rd, rn, rm); 8218 } 8219 void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8220 Vmull(al, dt, rd, rn, rm); 8221 } 8222 8223 void Vmvn(Condition cond, 8224 DataType dt, 8225 DRegister rd, 8226 const DOperand& operand) { 8227 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8228 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8229 VIXL_ASSERT(allow_macro_instructions_); 8230 VIXL_ASSERT(OutsideITBlock()); 8231 MacroEmissionCheckScope guard(this); 8232 ITScope it_scope(this, &cond); 8233 vmvn(cond, dt, rd, operand); 8234 } 8235 void Vmvn(DataType dt, DRegister rd, const DOperand& operand) { 8236 Vmvn(al, dt, rd, operand); 8237 } 8238 8239 void Vmvn(Condition cond, 8240 DataType dt, 8241 QRegister rd, 8242 const QOperand& operand) { 8243 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8244 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8245 VIXL_ASSERT(allow_macro_instructions_); 8246 VIXL_ASSERT(OutsideITBlock()); 8247 MacroEmissionCheckScope guard(this); 8248 ITScope it_scope(this, &cond); 8249 vmvn(cond, dt, rd, operand); 8250 } 8251 void Vmvn(DataType dt, QRegister rd, const QOperand& operand) { 8252 Vmvn(al, dt, rd, operand); 8253 } 8254 8255 void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8256 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8257 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8258 VIXL_ASSERT(allow_macro_instructions_); 8259 VIXL_ASSERT(OutsideITBlock()); 8260 MacroEmissionCheckScope guard(this); 8261 ITScope it_scope(this, &cond); 8262 vneg(cond, dt, rd, rm); 8263 } 8264 void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); } 8265 8266 void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8267 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8268 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8269 VIXL_ASSERT(allow_macro_instructions_); 8270 VIXL_ASSERT(OutsideITBlock()); 8271 MacroEmissionCheckScope guard(this); 8272 ITScope it_scope(this, &cond); 8273 vneg(cond, dt, rd, rm); 8274 } 8275 void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); } 8276 8277 void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) { 8278 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8279 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8280 VIXL_ASSERT(allow_macro_instructions_); 8281 VIXL_ASSERT(OutsideITBlock()); 8282 MacroEmissionCheckScope guard(this); 8283 ITScope it_scope(this, &cond); 8284 vneg(cond, dt, rd, rm); 8285 } 8286 void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); } 8287 8288 void Vnmla( 8289 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8290 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8291 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8292 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8293 VIXL_ASSERT(allow_macro_instructions_); 8294 VIXL_ASSERT(OutsideITBlock()); 8295 MacroEmissionCheckScope guard(this); 8296 ITScope it_scope(this, &cond); 8297 vnmla(cond, dt, rd, rn, rm); 8298 } 8299 void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8300 Vnmla(al, dt, rd, rn, rm); 8301 } 8302 8303 void Vnmla( 8304 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8305 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8306 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8307 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8308 VIXL_ASSERT(allow_macro_instructions_); 8309 VIXL_ASSERT(OutsideITBlock()); 8310 MacroEmissionCheckScope guard(this); 8311 ITScope it_scope(this, &cond); 8312 vnmla(cond, dt, rd, rn, rm); 8313 } 8314 void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8315 Vnmla(al, dt, rd, rn, rm); 8316 } 8317 8318 void Vnmls( 8319 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8320 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8321 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8322 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8323 VIXL_ASSERT(allow_macro_instructions_); 8324 VIXL_ASSERT(OutsideITBlock()); 8325 MacroEmissionCheckScope guard(this); 8326 ITScope it_scope(this, &cond); 8327 vnmls(cond, dt, rd, rn, rm); 8328 } 8329 void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8330 Vnmls(al, dt, rd, rn, rm); 8331 } 8332 8333 void Vnmls( 8334 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8335 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8336 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8337 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8338 VIXL_ASSERT(allow_macro_instructions_); 8339 VIXL_ASSERT(OutsideITBlock()); 8340 MacroEmissionCheckScope guard(this); 8341 ITScope it_scope(this, &cond); 8342 vnmls(cond, dt, rd, rn, rm); 8343 } 8344 void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8345 Vnmls(al, dt, rd, rn, rm); 8346 } 8347 8348 void Vnmul( 8349 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8350 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8351 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8352 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8353 VIXL_ASSERT(allow_macro_instructions_); 8354 VIXL_ASSERT(OutsideITBlock()); 8355 MacroEmissionCheckScope guard(this); 8356 ITScope it_scope(this, &cond); 8357 vnmul(cond, dt, rd, rn, rm); 8358 } 8359 void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8360 Vnmul(al, dt, rd, rn, rm); 8361 } 8362 8363 void Vnmul( 8364 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8365 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8366 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8367 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8368 VIXL_ASSERT(allow_macro_instructions_); 8369 VIXL_ASSERT(OutsideITBlock()); 8370 MacroEmissionCheckScope guard(this); 8371 ITScope it_scope(this, &cond); 8372 vnmul(cond, dt, rd, rn, rm); 8373 } 8374 void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8375 Vnmul(al, dt, rd, rn, rm); 8376 } 8377 8378 void Vorn(Condition cond, 8379 DataType dt, 8380 DRegister rd, 8381 DRegister rn, 8382 const DOperand& operand) { 8383 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8384 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8385 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8386 VIXL_ASSERT(allow_macro_instructions_); 8387 VIXL_ASSERT(OutsideITBlock()); 8388 MacroEmissionCheckScope guard(this); 8389 ITScope it_scope(this, &cond); 8390 vorn(cond, dt, rd, rn, operand); 8391 } 8392 void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 8393 Vorn(al, dt, rd, rn, operand); 8394 } 8395 8396 void Vorn(Condition cond, 8397 DataType dt, 8398 QRegister rd, 8399 QRegister rn, 8400 const QOperand& operand) { 8401 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8402 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8403 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8404 VIXL_ASSERT(allow_macro_instructions_); 8405 VIXL_ASSERT(OutsideITBlock()); 8406 MacroEmissionCheckScope guard(this); 8407 ITScope it_scope(this, &cond); 8408 vorn(cond, dt, rd, rn, operand); 8409 } 8410 void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 8411 Vorn(al, dt, rd, rn, operand); 8412 } 8413 8414 void Vorr(Condition cond, 8415 DataType dt, 8416 DRegister rd, 8417 DRegister rn, 8418 const DOperand& operand) { 8419 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8420 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8421 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8422 VIXL_ASSERT(allow_macro_instructions_); 8423 VIXL_ASSERT(OutsideITBlock()); 8424 MacroEmissionCheckScope guard(this); 8425 ITScope it_scope(this, &cond); 8426 vorr(cond, dt, rd, rn, operand); 8427 } 8428 void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 8429 Vorr(al, dt, rd, rn, operand); 8430 } 8431 void Vorr(Condition cond, 8432 DRegister rd, 8433 DRegister rn, 8434 const DOperand& operand) { 8435 Vorr(cond, kDataTypeValueNone, rd, rn, operand); 8436 } 8437 void Vorr(DRegister rd, DRegister rn, const DOperand& operand) { 8438 Vorr(al, kDataTypeValueNone, rd, rn, operand); 8439 } 8440 8441 void Vorr(Condition cond, 8442 DataType dt, 8443 QRegister rd, 8444 QRegister rn, 8445 const QOperand& operand) { 8446 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8447 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8448 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8449 VIXL_ASSERT(allow_macro_instructions_); 8450 VIXL_ASSERT(OutsideITBlock()); 8451 MacroEmissionCheckScope guard(this); 8452 ITScope it_scope(this, &cond); 8453 vorr(cond, dt, rd, rn, operand); 8454 } 8455 void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 8456 Vorr(al, dt, rd, rn, operand); 8457 } 8458 void Vorr(Condition cond, 8459 QRegister rd, 8460 QRegister rn, 8461 const QOperand& operand) { 8462 Vorr(cond, kDataTypeValueNone, rd, rn, operand); 8463 } 8464 void Vorr(QRegister rd, QRegister rn, const QOperand& operand) { 8465 Vorr(al, kDataTypeValueNone, rd, rn, operand); 8466 } 8467 8468 void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8469 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8470 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8471 VIXL_ASSERT(allow_macro_instructions_); 8472 VIXL_ASSERT(OutsideITBlock()); 8473 MacroEmissionCheckScope guard(this); 8474 ITScope it_scope(this, &cond); 8475 vpadal(cond, dt, rd, rm); 8476 } 8477 void Vpadal(DataType dt, DRegister rd, DRegister rm) { 8478 Vpadal(al, dt, rd, rm); 8479 } 8480 8481 void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8482 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8483 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8484 VIXL_ASSERT(allow_macro_instructions_); 8485 VIXL_ASSERT(OutsideITBlock()); 8486 MacroEmissionCheckScope guard(this); 8487 ITScope it_scope(this, &cond); 8488 vpadal(cond, dt, rd, rm); 8489 } 8490 void Vpadal(DataType dt, QRegister rd, QRegister rm) { 8491 Vpadal(al, dt, rd, rm); 8492 } 8493 8494 void Vpadd( 8495 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8496 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8497 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8498 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8499 VIXL_ASSERT(allow_macro_instructions_); 8500 VIXL_ASSERT(OutsideITBlock()); 8501 MacroEmissionCheckScope guard(this); 8502 ITScope it_scope(this, &cond); 8503 vpadd(cond, dt, rd, rn, rm); 8504 } 8505 void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8506 Vpadd(al, dt, rd, rn, rm); 8507 } 8508 8509 void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8510 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8511 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8512 VIXL_ASSERT(allow_macro_instructions_); 8513 VIXL_ASSERT(OutsideITBlock()); 8514 MacroEmissionCheckScope guard(this); 8515 ITScope it_scope(this, &cond); 8516 vpaddl(cond, dt, rd, rm); 8517 } 8518 void Vpaddl(DataType dt, DRegister rd, DRegister rm) { 8519 Vpaddl(al, dt, rd, rm); 8520 } 8521 8522 void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8523 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8524 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8525 VIXL_ASSERT(allow_macro_instructions_); 8526 VIXL_ASSERT(OutsideITBlock()); 8527 MacroEmissionCheckScope guard(this); 8528 ITScope it_scope(this, &cond); 8529 vpaddl(cond, dt, rd, rm); 8530 } 8531 void Vpaddl(DataType dt, QRegister rd, QRegister rm) { 8532 Vpaddl(al, dt, rd, rm); 8533 } 8534 8535 void Vpmax( 8536 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8537 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8538 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8539 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8540 VIXL_ASSERT(allow_macro_instructions_); 8541 VIXL_ASSERT(OutsideITBlock()); 8542 MacroEmissionCheckScope guard(this); 8543 ITScope it_scope(this, &cond); 8544 vpmax(cond, dt, rd, rn, rm); 8545 } 8546 void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8547 Vpmax(al, dt, rd, rn, rm); 8548 } 8549 8550 void Vpmin( 8551 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8552 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8553 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8554 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8555 VIXL_ASSERT(allow_macro_instructions_); 8556 VIXL_ASSERT(OutsideITBlock()); 8557 MacroEmissionCheckScope guard(this); 8558 ITScope it_scope(this, &cond); 8559 vpmin(cond, dt, rd, rn, rm); 8560 } 8561 void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8562 Vpmin(al, dt, rd, rn, rm); 8563 } 8564 8565 void Vpop(Condition cond, DataType dt, DRegisterList dreglist) { 8566 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 8567 VIXL_ASSERT(allow_macro_instructions_); 8568 VIXL_ASSERT(OutsideITBlock()); 8569 MacroEmissionCheckScope guard(this); 8570 ITScope it_scope(this, &cond); 8571 vpop(cond, dt, dreglist); 8572 } 8573 void Vpop(DataType dt, DRegisterList dreglist) { Vpop(al, dt, dreglist); } 8574 void Vpop(Condition cond, DRegisterList dreglist) { 8575 Vpop(cond, kDataTypeValueNone, dreglist); 8576 } 8577 void Vpop(DRegisterList dreglist) { Vpop(al, kDataTypeValueNone, dreglist); } 8578 8579 void Vpop(Condition cond, DataType dt, SRegisterList sreglist) { 8580 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 8581 VIXL_ASSERT(allow_macro_instructions_); 8582 VIXL_ASSERT(OutsideITBlock()); 8583 MacroEmissionCheckScope guard(this); 8584 ITScope it_scope(this, &cond); 8585 vpop(cond, dt, sreglist); 8586 } 8587 void Vpop(DataType dt, SRegisterList sreglist) { Vpop(al, dt, sreglist); } 8588 void Vpop(Condition cond, SRegisterList sreglist) { 8589 Vpop(cond, kDataTypeValueNone, sreglist); 8590 } 8591 void Vpop(SRegisterList sreglist) { Vpop(al, kDataTypeValueNone, sreglist); } 8592 8593 void Vpush(Condition cond, DataType dt, DRegisterList dreglist) { 8594 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 8595 VIXL_ASSERT(allow_macro_instructions_); 8596 VIXL_ASSERT(OutsideITBlock()); 8597 MacroEmissionCheckScope guard(this); 8598 ITScope it_scope(this, &cond); 8599 vpush(cond, dt, dreglist); 8600 } 8601 void Vpush(DataType dt, DRegisterList dreglist) { Vpush(al, dt, dreglist); } 8602 void Vpush(Condition cond, DRegisterList dreglist) { 8603 Vpush(cond, kDataTypeValueNone, dreglist); 8604 } 8605 void Vpush(DRegisterList dreglist) { 8606 Vpush(al, kDataTypeValueNone, dreglist); 8607 } 8608 8609 void Vpush(Condition cond, DataType dt, SRegisterList sreglist) { 8610 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 8611 VIXL_ASSERT(allow_macro_instructions_); 8612 VIXL_ASSERT(OutsideITBlock()); 8613 MacroEmissionCheckScope guard(this); 8614 ITScope it_scope(this, &cond); 8615 vpush(cond, dt, sreglist); 8616 } 8617 void Vpush(DataType dt, SRegisterList sreglist) { Vpush(al, dt, sreglist); } 8618 void Vpush(Condition cond, SRegisterList sreglist) { 8619 Vpush(cond, kDataTypeValueNone, sreglist); 8620 } 8621 void Vpush(SRegisterList sreglist) { 8622 Vpush(al, kDataTypeValueNone, sreglist); 8623 } 8624 8625 void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8626 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8627 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8628 VIXL_ASSERT(allow_macro_instructions_); 8629 VIXL_ASSERT(OutsideITBlock()); 8630 MacroEmissionCheckScope guard(this); 8631 ITScope it_scope(this, &cond); 8632 vqabs(cond, dt, rd, rm); 8633 } 8634 void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); } 8635 8636 void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8637 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8638 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8639 VIXL_ASSERT(allow_macro_instructions_); 8640 VIXL_ASSERT(OutsideITBlock()); 8641 MacroEmissionCheckScope guard(this); 8642 ITScope it_scope(this, &cond); 8643 vqabs(cond, dt, rd, rm); 8644 } 8645 void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); } 8646 8647 void Vqadd( 8648 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8649 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8650 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8651 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8652 VIXL_ASSERT(allow_macro_instructions_); 8653 VIXL_ASSERT(OutsideITBlock()); 8654 MacroEmissionCheckScope guard(this); 8655 ITScope it_scope(this, &cond); 8656 vqadd(cond, dt, rd, rn, rm); 8657 } 8658 void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8659 Vqadd(al, dt, rd, rn, rm); 8660 } 8661 8662 void Vqadd( 8663 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8666 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8667 VIXL_ASSERT(allow_macro_instructions_); 8668 VIXL_ASSERT(OutsideITBlock()); 8669 MacroEmissionCheckScope guard(this); 8670 ITScope it_scope(this, &cond); 8671 vqadd(cond, dt, rd, rn, rm); 8672 } 8673 void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8674 Vqadd(al, dt, rd, rn, rm); 8675 } 8676 8677 void Vqdmlal( 8678 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8679 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8680 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8681 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8682 VIXL_ASSERT(allow_macro_instructions_); 8683 VIXL_ASSERT(OutsideITBlock()); 8684 MacroEmissionCheckScope guard(this); 8685 ITScope it_scope(this, &cond); 8686 vqdmlal(cond, dt, rd, rn, rm); 8687 } 8688 void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8689 Vqdmlal(al, dt, rd, rn, rm); 8690 } 8691 8692 void Vqdmlal(Condition cond, 8693 DataType dt, 8694 QRegister rd, 8695 DRegister rn, 8696 DRegister dm, 8697 unsigned index) { 8698 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8699 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8700 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8701 VIXL_ASSERT(allow_macro_instructions_); 8702 VIXL_ASSERT(OutsideITBlock()); 8703 MacroEmissionCheckScope guard(this); 8704 ITScope it_scope(this, &cond); 8705 vqdmlal(cond, dt, rd, rn, dm, index); 8706 } 8707 void Vqdmlal( 8708 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { 8709 Vqdmlal(al, dt, rd, rn, dm, index); 8710 } 8711 8712 void Vqdmlsl( 8713 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8714 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8715 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8716 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8717 VIXL_ASSERT(allow_macro_instructions_); 8718 VIXL_ASSERT(OutsideITBlock()); 8719 MacroEmissionCheckScope guard(this); 8720 ITScope it_scope(this, &cond); 8721 vqdmlsl(cond, dt, rd, rn, rm); 8722 } 8723 void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8724 Vqdmlsl(al, dt, rd, rn, rm); 8725 } 8726 8727 void Vqdmlsl(Condition cond, 8728 DataType dt, 8729 QRegister rd, 8730 DRegister rn, 8731 DRegister dm, 8732 unsigned index) { 8733 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8734 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8735 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8736 VIXL_ASSERT(allow_macro_instructions_); 8737 VIXL_ASSERT(OutsideITBlock()); 8738 MacroEmissionCheckScope guard(this); 8739 ITScope it_scope(this, &cond); 8740 vqdmlsl(cond, dt, rd, rn, dm, index); 8741 } 8742 void Vqdmlsl( 8743 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { 8744 Vqdmlsl(al, dt, rd, rn, dm, index); 8745 } 8746 8747 void Vqdmulh( 8748 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8749 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8750 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8751 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8752 VIXL_ASSERT(allow_macro_instructions_); 8753 VIXL_ASSERT(OutsideITBlock()); 8754 MacroEmissionCheckScope guard(this); 8755 ITScope it_scope(this, &cond); 8756 vqdmulh(cond, dt, rd, rn, rm); 8757 } 8758 void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8759 Vqdmulh(al, dt, rd, rn, rm); 8760 } 8761 8762 void Vqdmulh( 8763 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8764 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8765 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8766 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8767 VIXL_ASSERT(allow_macro_instructions_); 8768 VIXL_ASSERT(OutsideITBlock()); 8769 MacroEmissionCheckScope guard(this); 8770 ITScope it_scope(this, &cond); 8771 vqdmulh(cond, dt, rd, rn, rm); 8772 } 8773 void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8774 Vqdmulh(al, dt, rd, rn, rm); 8775 } 8776 8777 void Vqdmulh(Condition cond, 8778 DataType dt, 8779 DRegister rd, 8780 DRegister rn, 8781 DRegisterLane rm) { 8782 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8783 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8784 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8785 VIXL_ASSERT(allow_macro_instructions_); 8786 VIXL_ASSERT(OutsideITBlock()); 8787 MacroEmissionCheckScope guard(this); 8788 ITScope it_scope(this, &cond); 8789 vqdmulh(cond, dt, rd, rn, rm); 8790 } 8791 void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 8792 Vqdmulh(al, dt, rd, rn, rm); 8793 } 8794 8795 void Vqdmulh(Condition cond, 8796 DataType dt, 8797 QRegister rd, 8798 QRegister rn, 8799 DRegisterLane rm) { 8800 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8801 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8802 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8803 VIXL_ASSERT(allow_macro_instructions_); 8804 VIXL_ASSERT(OutsideITBlock()); 8805 MacroEmissionCheckScope guard(this); 8806 ITScope it_scope(this, &cond); 8807 vqdmulh(cond, dt, rd, rn, rm); 8808 } 8809 void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 8810 Vqdmulh(al, dt, rd, rn, rm); 8811 } 8812 8813 void Vqdmull( 8814 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8815 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8816 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8817 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8818 VIXL_ASSERT(allow_macro_instructions_); 8819 VIXL_ASSERT(OutsideITBlock()); 8820 MacroEmissionCheckScope guard(this); 8821 ITScope it_scope(this, &cond); 8822 vqdmull(cond, dt, rd, rn, rm); 8823 } 8824 void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8825 Vqdmull(al, dt, rd, rn, rm); 8826 } 8827 8828 void Vqdmull(Condition cond, 8829 DataType dt, 8830 QRegister rd, 8831 DRegister rn, 8832 DRegisterLane rm) { 8833 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8834 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8835 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8836 VIXL_ASSERT(allow_macro_instructions_); 8837 VIXL_ASSERT(OutsideITBlock()); 8838 MacroEmissionCheckScope guard(this); 8839 ITScope it_scope(this, &cond); 8840 vqdmull(cond, dt, rd, rn, rm); 8841 } 8842 void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { 8843 Vqdmull(al, dt, rd, rn, rm); 8844 } 8845 8846 void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) { 8847 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8848 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8849 VIXL_ASSERT(allow_macro_instructions_); 8850 VIXL_ASSERT(OutsideITBlock()); 8851 MacroEmissionCheckScope guard(this); 8852 ITScope it_scope(this, &cond); 8853 vqmovn(cond, dt, rd, rm); 8854 } 8855 void Vqmovn(DataType dt, DRegister rd, QRegister rm) { 8856 Vqmovn(al, dt, rd, rm); 8857 } 8858 8859 void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) { 8860 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8861 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8862 VIXL_ASSERT(allow_macro_instructions_); 8863 VIXL_ASSERT(OutsideITBlock()); 8864 MacroEmissionCheckScope guard(this); 8865 ITScope it_scope(this, &cond); 8866 vqmovun(cond, dt, rd, rm); 8867 } 8868 void Vqmovun(DataType dt, DRegister rd, QRegister rm) { 8869 Vqmovun(al, dt, rd, rm); 8870 } 8871 8872 void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8873 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8874 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8875 VIXL_ASSERT(allow_macro_instructions_); 8876 VIXL_ASSERT(OutsideITBlock()); 8877 MacroEmissionCheckScope guard(this); 8878 ITScope it_scope(this, &cond); 8879 vqneg(cond, dt, rd, rm); 8880 } 8881 void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); } 8882 8883 void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8884 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8885 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8886 VIXL_ASSERT(allow_macro_instructions_); 8887 VIXL_ASSERT(OutsideITBlock()); 8888 MacroEmissionCheckScope guard(this); 8889 ITScope it_scope(this, &cond); 8890 vqneg(cond, dt, rd, rm); 8891 } 8892 void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); } 8893 8894 void Vqrdmulh( 8895 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8896 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8897 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8898 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8899 VIXL_ASSERT(allow_macro_instructions_); 8900 VIXL_ASSERT(OutsideITBlock()); 8901 MacroEmissionCheckScope guard(this); 8902 ITScope it_scope(this, &cond); 8903 vqrdmulh(cond, dt, rd, rn, rm); 8904 } 8905 void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8906 Vqrdmulh(al, dt, rd, rn, rm); 8907 } 8908 8909 void Vqrdmulh( 8910 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8911 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8912 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8913 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8914 VIXL_ASSERT(allow_macro_instructions_); 8915 VIXL_ASSERT(OutsideITBlock()); 8916 MacroEmissionCheckScope guard(this); 8917 ITScope it_scope(this, &cond); 8918 vqrdmulh(cond, dt, rd, rn, rm); 8919 } 8920 void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8921 Vqrdmulh(al, dt, rd, rn, rm); 8922 } 8923 8924 void Vqrdmulh(Condition cond, 8925 DataType dt, 8926 DRegister rd, 8927 DRegister rn, 8928 DRegisterLane rm) { 8929 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8930 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8931 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8932 VIXL_ASSERT(allow_macro_instructions_); 8933 VIXL_ASSERT(OutsideITBlock()); 8934 MacroEmissionCheckScope guard(this); 8935 ITScope it_scope(this, &cond); 8936 vqrdmulh(cond, dt, rd, rn, rm); 8937 } 8938 void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 8939 Vqrdmulh(al, dt, rd, rn, rm); 8940 } 8941 8942 void Vqrdmulh(Condition cond, 8943 DataType dt, 8944 QRegister rd, 8945 QRegister rn, 8946 DRegisterLane rm) { 8947 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8948 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8949 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8950 VIXL_ASSERT(allow_macro_instructions_); 8951 VIXL_ASSERT(OutsideITBlock()); 8952 MacroEmissionCheckScope guard(this); 8953 ITScope it_scope(this, &cond); 8954 vqrdmulh(cond, dt, rd, rn, rm); 8955 } 8956 void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 8957 Vqrdmulh(al, dt, rd, rn, rm); 8958 } 8959 8960 void Vqrshl( 8961 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) { 8962 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8963 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8964 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8965 VIXL_ASSERT(allow_macro_instructions_); 8966 VIXL_ASSERT(OutsideITBlock()); 8967 MacroEmissionCheckScope guard(this); 8968 ITScope it_scope(this, &cond); 8969 vqrshl(cond, dt, rd, rm, rn); 8970 } 8971 void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) { 8972 Vqrshl(al, dt, rd, rm, rn); 8973 } 8974 8975 void Vqrshl( 8976 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) { 8977 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8978 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8979 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8980 VIXL_ASSERT(allow_macro_instructions_); 8981 VIXL_ASSERT(OutsideITBlock()); 8982 MacroEmissionCheckScope guard(this); 8983 ITScope it_scope(this, &cond); 8984 vqrshl(cond, dt, rd, rm, rn); 8985 } 8986 void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) { 8987 Vqrshl(al, dt, rd, rm, rn); 8988 } 8989 8990 void Vqrshrn(Condition cond, 8991 DataType dt, 8992 DRegister rd, 8993 QRegister rm, 8994 const QOperand& operand) { 8995 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8996 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8997 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8998 VIXL_ASSERT(allow_macro_instructions_); 8999 VIXL_ASSERT(OutsideITBlock()); 9000 MacroEmissionCheckScope guard(this); 9001 ITScope it_scope(this, &cond); 9002 vqrshrn(cond, dt, rd, rm, operand); 9003 } 9004 void Vqrshrn(DataType dt, 9005 DRegister rd, 9006 QRegister rm, 9007 const QOperand& operand) { 9008 Vqrshrn(al, dt, rd, rm, operand); 9009 } 9010 9011 void Vqrshrun(Condition cond, 9012 DataType dt, 9013 DRegister rd, 9014 QRegister rm, 9015 const QOperand& operand) { 9016 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9017 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9018 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9019 VIXL_ASSERT(allow_macro_instructions_); 9020 VIXL_ASSERT(OutsideITBlock()); 9021 MacroEmissionCheckScope guard(this); 9022 ITScope it_scope(this, &cond); 9023 vqrshrun(cond, dt, rd, rm, operand); 9024 } 9025 void Vqrshrun(DataType dt, 9026 DRegister rd, 9027 QRegister rm, 9028 const QOperand& operand) { 9029 Vqrshrun(al, dt, rd, rm, operand); 9030 } 9031 9032 void Vqshl(Condition cond, 9033 DataType dt, 9034 DRegister rd, 9035 DRegister rm, 9036 const DOperand& operand) { 9037 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9038 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9039 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9040 VIXL_ASSERT(allow_macro_instructions_); 9041 VIXL_ASSERT(OutsideITBlock()); 9042 MacroEmissionCheckScope guard(this); 9043 ITScope it_scope(this, &cond); 9044 vqshl(cond, dt, rd, rm, operand); 9045 } 9046 void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9047 Vqshl(al, dt, rd, rm, operand); 9048 } 9049 9050 void Vqshl(Condition cond, 9051 DataType dt, 9052 QRegister rd, 9053 QRegister rm, 9054 const QOperand& operand) { 9055 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9056 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9057 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9058 VIXL_ASSERT(allow_macro_instructions_); 9059 VIXL_ASSERT(OutsideITBlock()); 9060 MacroEmissionCheckScope guard(this); 9061 ITScope it_scope(this, &cond); 9062 vqshl(cond, dt, rd, rm, operand); 9063 } 9064 void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9065 Vqshl(al, dt, rd, rm, operand); 9066 } 9067 9068 void Vqshlu(Condition cond, 9069 DataType dt, 9070 DRegister rd, 9071 DRegister rm, 9072 const DOperand& operand) { 9073 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9074 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9075 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9076 VIXL_ASSERT(allow_macro_instructions_); 9077 VIXL_ASSERT(OutsideITBlock()); 9078 MacroEmissionCheckScope guard(this); 9079 ITScope it_scope(this, &cond); 9080 vqshlu(cond, dt, rd, rm, operand); 9081 } 9082 void Vqshlu(DataType dt, 9083 DRegister rd, 9084 DRegister rm, 9085 const DOperand& operand) { 9086 Vqshlu(al, dt, rd, rm, operand); 9087 } 9088 9089 void Vqshlu(Condition cond, 9090 DataType dt, 9091 QRegister rd, 9092 QRegister rm, 9093 const QOperand& operand) { 9094 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9095 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9096 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9097 VIXL_ASSERT(allow_macro_instructions_); 9098 VIXL_ASSERT(OutsideITBlock()); 9099 MacroEmissionCheckScope guard(this); 9100 ITScope it_scope(this, &cond); 9101 vqshlu(cond, dt, rd, rm, operand); 9102 } 9103 void Vqshlu(DataType dt, 9104 QRegister rd, 9105 QRegister rm, 9106 const QOperand& operand) { 9107 Vqshlu(al, dt, rd, rm, operand); 9108 } 9109 9110 void Vqshrn(Condition cond, 9111 DataType dt, 9112 DRegister rd, 9113 QRegister rm, 9114 const QOperand& operand) { 9115 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9116 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9117 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9118 VIXL_ASSERT(allow_macro_instructions_); 9119 VIXL_ASSERT(OutsideITBlock()); 9120 MacroEmissionCheckScope guard(this); 9121 ITScope it_scope(this, &cond); 9122 vqshrn(cond, dt, rd, rm, operand); 9123 } 9124 void Vqshrn(DataType dt, 9125 DRegister rd, 9126 QRegister rm, 9127 const QOperand& operand) { 9128 Vqshrn(al, dt, rd, rm, operand); 9129 } 9130 9131 void Vqshrun(Condition cond, 9132 DataType dt, 9133 DRegister rd, 9134 QRegister rm, 9135 const QOperand& operand) { 9136 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9137 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9138 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9139 VIXL_ASSERT(allow_macro_instructions_); 9140 VIXL_ASSERT(OutsideITBlock()); 9141 MacroEmissionCheckScope guard(this); 9142 ITScope it_scope(this, &cond); 9143 vqshrun(cond, dt, rd, rm, operand); 9144 } 9145 void Vqshrun(DataType dt, 9146 DRegister rd, 9147 QRegister rm, 9148 const QOperand& operand) { 9149 Vqshrun(al, dt, rd, rm, operand); 9150 } 9151 9152 void Vqsub( 9153 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9154 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9155 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9156 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9157 VIXL_ASSERT(allow_macro_instructions_); 9158 VIXL_ASSERT(OutsideITBlock()); 9159 MacroEmissionCheckScope guard(this); 9160 ITScope it_scope(this, &cond); 9161 vqsub(cond, dt, rd, rn, rm); 9162 } 9163 void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9164 Vqsub(al, dt, rd, rn, rm); 9165 } 9166 9167 void Vqsub( 9168 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9169 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9170 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9171 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9172 VIXL_ASSERT(allow_macro_instructions_); 9173 VIXL_ASSERT(OutsideITBlock()); 9174 MacroEmissionCheckScope guard(this); 9175 ITScope it_scope(this, &cond); 9176 vqsub(cond, dt, rd, rn, rm); 9177 } 9178 void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9179 Vqsub(al, dt, rd, rn, rm); 9180 } 9181 9182 void Vraddhn( 9183 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 9184 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9185 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9186 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9187 VIXL_ASSERT(allow_macro_instructions_); 9188 VIXL_ASSERT(OutsideITBlock()); 9189 MacroEmissionCheckScope guard(this); 9190 ITScope it_scope(this, &cond); 9191 vraddhn(cond, dt, rd, rn, rm); 9192 } 9193 void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 9194 Vraddhn(al, dt, rd, rn, rm); 9195 } 9196 9197 void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9198 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9199 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9200 VIXL_ASSERT(allow_macro_instructions_); 9201 VIXL_ASSERT(OutsideITBlock()); 9202 MacroEmissionCheckScope guard(this); 9203 ITScope it_scope(this, &cond); 9204 vrecpe(cond, dt, rd, rm); 9205 } 9206 void Vrecpe(DataType dt, DRegister rd, DRegister rm) { 9207 Vrecpe(al, dt, rd, rm); 9208 } 9209 9210 void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9211 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9212 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9213 VIXL_ASSERT(allow_macro_instructions_); 9214 VIXL_ASSERT(OutsideITBlock()); 9215 MacroEmissionCheckScope guard(this); 9216 ITScope it_scope(this, &cond); 9217 vrecpe(cond, dt, rd, rm); 9218 } 9219 void Vrecpe(DataType dt, QRegister rd, QRegister rm) { 9220 Vrecpe(al, dt, rd, rm); 9221 } 9222 9223 void Vrecps( 9224 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9225 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9226 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9227 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9228 VIXL_ASSERT(allow_macro_instructions_); 9229 VIXL_ASSERT(OutsideITBlock()); 9230 MacroEmissionCheckScope guard(this); 9231 ITScope it_scope(this, &cond); 9232 vrecps(cond, dt, rd, rn, rm); 9233 } 9234 void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9235 Vrecps(al, dt, rd, rn, rm); 9236 } 9237 9238 void Vrecps( 9239 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9240 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9241 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9242 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9243 VIXL_ASSERT(allow_macro_instructions_); 9244 VIXL_ASSERT(OutsideITBlock()); 9245 MacroEmissionCheckScope guard(this); 9246 ITScope it_scope(this, &cond); 9247 vrecps(cond, dt, rd, rn, rm); 9248 } 9249 void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9250 Vrecps(al, dt, rd, rn, rm); 9251 } 9252 9253 void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9254 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9255 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9256 VIXL_ASSERT(allow_macro_instructions_); 9257 VIXL_ASSERT(OutsideITBlock()); 9258 MacroEmissionCheckScope guard(this); 9259 ITScope it_scope(this, &cond); 9260 vrev16(cond, dt, rd, rm); 9261 } 9262 void Vrev16(DataType dt, DRegister rd, DRegister rm) { 9263 Vrev16(al, dt, rd, rm); 9264 } 9265 9266 void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9267 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9268 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9269 VIXL_ASSERT(allow_macro_instructions_); 9270 VIXL_ASSERT(OutsideITBlock()); 9271 MacroEmissionCheckScope guard(this); 9272 ITScope it_scope(this, &cond); 9273 vrev16(cond, dt, rd, rm); 9274 } 9275 void Vrev16(DataType dt, QRegister rd, QRegister rm) { 9276 Vrev16(al, dt, rd, rm); 9277 } 9278 9279 void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9280 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9281 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9282 VIXL_ASSERT(allow_macro_instructions_); 9283 VIXL_ASSERT(OutsideITBlock()); 9284 MacroEmissionCheckScope guard(this); 9285 ITScope it_scope(this, &cond); 9286 vrev32(cond, dt, rd, rm); 9287 } 9288 void Vrev32(DataType dt, DRegister rd, DRegister rm) { 9289 Vrev32(al, dt, rd, rm); 9290 } 9291 9292 void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9293 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9294 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9295 VIXL_ASSERT(allow_macro_instructions_); 9296 VIXL_ASSERT(OutsideITBlock()); 9297 MacroEmissionCheckScope guard(this); 9298 ITScope it_scope(this, &cond); 9299 vrev32(cond, dt, rd, rm); 9300 } 9301 void Vrev32(DataType dt, QRegister rd, QRegister rm) { 9302 Vrev32(al, dt, rd, rm); 9303 } 9304 9305 void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9306 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9307 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9308 VIXL_ASSERT(allow_macro_instructions_); 9309 VIXL_ASSERT(OutsideITBlock()); 9310 MacroEmissionCheckScope guard(this); 9311 ITScope it_scope(this, &cond); 9312 vrev64(cond, dt, rd, rm); 9313 } 9314 void Vrev64(DataType dt, DRegister rd, DRegister rm) { 9315 Vrev64(al, dt, rd, rm); 9316 } 9317 9318 void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9319 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9320 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9321 VIXL_ASSERT(allow_macro_instructions_); 9322 VIXL_ASSERT(OutsideITBlock()); 9323 MacroEmissionCheckScope guard(this); 9324 ITScope it_scope(this, &cond); 9325 vrev64(cond, dt, rd, rm); 9326 } 9327 void Vrev64(DataType dt, QRegister rd, QRegister rm) { 9328 Vrev64(al, dt, rd, rm); 9329 } 9330 9331 void Vrhadd( 9332 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9333 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9334 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9335 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9336 VIXL_ASSERT(allow_macro_instructions_); 9337 VIXL_ASSERT(OutsideITBlock()); 9338 MacroEmissionCheckScope guard(this); 9339 ITScope it_scope(this, &cond); 9340 vrhadd(cond, dt, rd, rn, rm); 9341 } 9342 void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9343 Vrhadd(al, dt, rd, rn, rm); 9344 } 9345 9346 void Vrhadd( 9347 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9348 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9349 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9350 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9351 VIXL_ASSERT(allow_macro_instructions_); 9352 VIXL_ASSERT(OutsideITBlock()); 9353 MacroEmissionCheckScope guard(this); 9354 ITScope it_scope(this, &cond); 9355 vrhadd(cond, dt, rd, rn, rm); 9356 } 9357 void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9358 Vrhadd(al, dt, rd, rn, rm); 9359 } 9360 9361 void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9362 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9363 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9364 VIXL_ASSERT(allow_macro_instructions_); 9365 VIXL_ASSERT(OutsideITBlock()); 9366 MacroEmissionCheckScope guard(this); 9367 vrinta(dt1, dt2, rd, rm); 9368 } 9369 9370 void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9371 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9372 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9373 VIXL_ASSERT(allow_macro_instructions_); 9374 VIXL_ASSERT(OutsideITBlock()); 9375 MacroEmissionCheckScope guard(this); 9376 vrinta(dt1, dt2, rd, rm); 9377 } 9378 9379 void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9380 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9381 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9382 VIXL_ASSERT(allow_macro_instructions_); 9383 VIXL_ASSERT(OutsideITBlock()); 9384 MacroEmissionCheckScope guard(this); 9385 vrinta(dt1, dt2, rd, rm); 9386 } 9387 9388 void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9389 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9390 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9391 VIXL_ASSERT(allow_macro_instructions_); 9392 VIXL_ASSERT(OutsideITBlock()); 9393 MacroEmissionCheckScope guard(this); 9394 vrintm(dt1, dt2, rd, rm); 9395 } 9396 9397 void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9398 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9399 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9400 VIXL_ASSERT(allow_macro_instructions_); 9401 VIXL_ASSERT(OutsideITBlock()); 9402 MacroEmissionCheckScope guard(this); 9403 vrintm(dt1, dt2, rd, rm); 9404 } 9405 9406 void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9407 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9408 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9409 VIXL_ASSERT(allow_macro_instructions_); 9410 VIXL_ASSERT(OutsideITBlock()); 9411 MacroEmissionCheckScope guard(this); 9412 vrintm(dt1, dt2, rd, rm); 9413 } 9414 9415 void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9416 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9417 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9418 VIXL_ASSERT(allow_macro_instructions_); 9419 VIXL_ASSERT(OutsideITBlock()); 9420 MacroEmissionCheckScope guard(this); 9421 vrintn(dt1, dt2, rd, rm); 9422 } 9423 9424 void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9425 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9426 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9427 VIXL_ASSERT(allow_macro_instructions_); 9428 VIXL_ASSERT(OutsideITBlock()); 9429 MacroEmissionCheckScope guard(this); 9430 vrintn(dt1, dt2, rd, rm); 9431 } 9432 9433 void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9434 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9435 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9436 VIXL_ASSERT(allow_macro_instructions_); 9437 VIXL_ASSERT(OutsideITBlock()); 9438 MacroEmissionCheckScope guard(this); 9439 vrintn(dt1, dt2, rd, rm); 9440 } 9441 9442 void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9443 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9444 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9445 VIXL_ASSERT(allow_macro_instructions_); 9446 VIXL_ASSERT(OutsideITBlock()); 9447 MacroEmissionCheckScope guard(this); 9448 vrintp(dt1, dt2, rd, rm); 9449 } 9450 9451 void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9452 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9453 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9454 VIXL_ASSERT(allow_macro_instructions_); 9455 VIXL_ASSERT(OutsideITBlock()); 9456 MacroEmissionCheckScope guard(this); 9457 vrintp(dt1, dt2, rd, rm); 9458 } 9459 9460 void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9461 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9462 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9463 VIXL_ASSERT(allow_macro_instructions_); 9464 VIXL_ASSERT(OutsideITBlock()); 9465 MacroEmissionCheckScope guard(this); 9466 vrintp(dt1, dt2, rd, rm); 9467 } 9468 9469 void Vrintr( 9470 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9471 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9472 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9473 VIXL_ASSERT(allow_macro_instructions_); 9474 VIXL_ASSERT(OutsideITBlock()); 9475 MacroEmissionCheckScope guard(this); 9476 ITScope it_scope(this, &cond); 9477 vrintr(cond, dt1, dt2, rd, rm); 9478 } 9479 void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9480 Vrintr(al, dt1, dt2, rd, rm); 9481 } 9482 9483 void Vrintr( 9484 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9485 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9486 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9487 VIXL_ASSERT(allow_macro_instructions_); 9488 VIXL_ASSERT(OutsideITBlock()); 9489 MacroEmissionCheckScope guard(this); 9490 ITScope it_scope(this, &cond); 9491 vrintr(cond, dt1, dt2, rd, rm); 9492 } 9493 void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9494 Vrintr(al, dt1, dt2, rd, rm); 9495 } 9496 9497 void Vrintx( 9498 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9499 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9500 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9501 VIXL_ASSERT(allow_macro_instructions_); 9502 VIXL_ASSERT(OutsideITBlock()); 9503 MacroEmissionCheckScope guard(this); 9504 ITScope it_scope(this, &cond); 9505 vrintx(cond, dt1, dt2, rd, rm); 9506 } 9507 void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9508 Vrintx(al, dt1, dt2, rd, rm); 9509 } 9510 9511 void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9512 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9513 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9514 VIXL_ASSERT(allow_macro_instructions_); 9515 VIXL_ASSERT(OutsideITBlock()); 9516 MacroEmissionCheckScope guard(this); 9517 vrintx(dt1, dt2, rd, rm); 9518 } 9519 9520 void Vrintx( 9521 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9522 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9523 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9524 VIXL_ASSERT(allow_macro_instructions_); 9525 VIXL_ASSERT(OutsideITBlock()); 9526 MacroEmissionCheckScope guard(this); 9527 ITScope it_scope(this, &cond); 9528 vrintx(cond, dt1, dt2, rd, rm); 9529 } 9530 void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9531 Vrintx(al, dt1, dt2, rd, rm); 9532 } 9533 9534 void Vrintz( 9535 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9536 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9537 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9538 VIXL_ASSERT(allow_macro_instructions_); 9539 VIXL_ASSERT(OutsideITBlock()); 9540 MacroEmissionCheckScope guard(this); 9541 ITScope it_scope(this, &cond); 9542 vrintz(cond, dt1, dt2, rd, rm); 9543 } 9544 void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9545 Vrintz(al, dt1, dt2, rd, rm); 9546 } 9547 9548 void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9549 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9550 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9551 VIXL_ASSERT(allow_macro_instructions_); 9552 VIXL_ASSERT(OutsideITBlock()); 9553 MacroEmissionCheckScope guard(this); 9554 vrintz(dt1, dt2, rd, rm); 9555 } 9556 9557 void Vrintz( 9558 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9559 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9560 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9561 VIXL_ASSERT(allow_macro_instructions_); 9562 VIXL_ASSERT(OutsideITBlock()); 9563 MacroEmissionCheckScope guard(this); 9564 ITScope it_scope(this, &cond); 9565 vrintz(cond, dt1, dt2, rd, rm); 9566 } 9567 void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9568 Vrintz(al, dt1, dt2, rd, rm); 9569 } 9570 9571 void Vrshl( 9572 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) { 9573 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9574 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9575 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9576 VIXL_ASSERT(allow_macro_instructions_); 9577 VIXL_ASSERT(OutsideITBlock()); 9578 MacroEmissionCheckScope guard(this); 9579 ITScope it_scope(this, &cond); 9580 vrshl(cond, dt, rd, rm, rn); 9581 } 9582 void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) { 9583 Vrshl(al, dt, rd, rm, rn); 9584 } 9585 9586 void Vrshl( 9587 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) { 9588 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9589 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9590 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9591 VIXL_ASSERT(allow_macro_instructions_); 9592 VIXL_ASSERT(OutsideITBlock()); 9593 MacroEmissionCheckScope guard(this); 9594 ITScope it_scope(this, &cond); 9595 vrshl(cond, dt, rd, rm, rn); 9596 } 9597 void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) { 9598 Vrshl(al, dt, rd, rm, rn); 9599 } 9600 9601 void Vrshr(Condition cond, 9602 DataType dt, 9603 DRegister rd, 9604 DRegister rm, 9605 const DOperand& operand) { 9606 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9607 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9608 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9609 VIXL_ASSERT(allow_macro_instructions_); 9610 VIXL_ASSERT(OutsideITBlock()); 9611 MacroEmissionCheckScope guard(this); 9612 ITScope it_scope(this, &cond); 9613 vrshr(cond, dt, rd, rm, operand); 9614 } 9615 void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9616 Vrshr(al, dt, rd, rm, operand); 9617 } 9618 9619 void Vrshr(Condition cond, 9620 DataType dt, 9621 QRegister rd, 9622 QRegister rm, 9623 const QOperand& operand) { 9624 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9625 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9626 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9627 VIXL_ASSERT(allow_macro_instructions_); 9628 VIXL_ASSERT(OutsideITBlock()); 9629 MacroEmissionCheckScope guard(this); 9630 ITScope it_scope(this, &cond); 9631 vrshr(cond, dt, rd, rm, operand); 9632 } 9633 void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9634 Vrshr(al, dt, rd, rm, operand); 9635 } 9636 9637 void Vrshrn(Condition cond, 9638 DataType dt, 9639 DRegister rd, 9640 QRegister rm, 9641 const QOperand& operand) { 9642 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9643 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9644 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9645 VIXL_ASSERT(allow_macro_instructions_); 9646 VIXL_ASSERT(OutsideITBlock()); 9647 MacroEmissionCheckScope guard(this); 9648 ITScope it_scope(this, &cond); 9649 vrshrn(cond, dt, rd, rm, operand); 9650 } 9651 void Vrshrn(DataType dt, 9652 DRegister rd, 9653 QRegister rm, 9654 const QOperand& operand) { 9655 Vrshrn(al, dt, rd, rm, operand); 9656 } 9657 9658 void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9659 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9660 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9661 VIXL_ASSERT(allow_macro_instructions_); 9662 VIXL_ASSERT(OutsideITBlock()); 9663 MacroEmissionCheckScope guard(this); 9664 ITScope it_scope(this, &cond); 9665 vrsqrte(cond, dt, rd, rm); 9666 } 9667 void Vrsqrte(DataType dt, DRegister rd, DRegister rm) { 9668 Vrsqrte(al, dt, rd, rm); 9669 } 9670 9671 void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9672 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9673 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9674 VIXL_ASSERT(allow_macro_instructions_); 9675 VIXL_ASSERT(OutsideITBlock()); 9676 MacroEmissionCheckScope guard(this); 9677 ITScope it_scope(this, &cond); 9678 vrsqrte(cond, dt, rd, rm); 9679 } 9680 void Vrsqrte(DataType dt, QRegister rd, QRegister rm) { 9681 Vrsqrte(al, dt, rd, rm); 9682 } 9683 9684 void Vrsqrts( 9685 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9686 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9687 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9688 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9689 VIXL_ASSERT(allow_macro_instructions_); 9690 VIXL_ASSERT(OutsideITBlock()); 9691 MacroEmissionCheckScope guard(this); 9692 ITScope it_scope(this, &cond); 9693 vrsqrts(cond, dt, rd, rn, rm); 9694 } 9695 void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9696 Vrsqrts(al, dt, rd, rn, rm); 9697 } 9698 9699 void Vrsqrts( 9700 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9701 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9702 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9703 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9704 VIXL_ASSERT(allow_macro_instructions_); 9705 VIXL_ASSERT(OutsideITBlock()); 9706 MacroEmissionCheckScope guard(this); 9707 ITScope it_scope(this, &cond); 9708 vrsqrts(cond, dt, rd, rn, rm); 9709 } 9710 void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9711 Vrsqrts(al, dt, rd, rn, rm); 9712 } 9713 9714 void Vrsra(Condition cond, 9715 DataType dt, 9716 DRegister rd, 9717 DRegister rm, 9718 const DOperand& operand) { 9719 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9720 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9721 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9722 VIXL_ASSERT(allow_macro_instructions_); 9723 VIXL_ASSERT(OutsideITBlock()); 9724 MacroEmissionCheckScope guard(this); 9725 ITScope it_scope(this, &cond); 9726 vrsra(cond, dt, rd, rm, operand); 9727 } 9728 void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9729 Vrsra(al, dt, rd, rm, operand); 9730 } 9731 9732 void Vrsra(Condition cond, 9733 DataType dt, 9734 QRegister rd, 9735 QRegister rm, 9736 const QOperand& operand) { 9737 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9738 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9739 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9740 VIXL_ASSERT(allow_macro_instructions_); 9741 VIXL_ASSERT(OutsideITBlock()); 9742 MacroEmissionCheckScope guard(this); 9743 ITScope it_scope(this, &cond); 9744 vrsra(cond, dt, rd, rm, operand); 9745 } 9746 void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9747 Vrsra(al, dt, rd, rm, operand); 9748 } 9749 9750 void Vrsubhn( 9751 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 9752 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9753 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9754 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9755 VIXL_ASSERT(allow_macro_instructions_); 9756 VIXL_ASSERT(OutsideITBlock()); 9757 MacroEmissionCheckScope guard(this); 9758 ITScope it_scope(this, &cond); 9759 vrsubhn(cond, dt, rd, rn, rm); 9760 } 9761 void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 9762 Vrsubhn(al, dt, rd, rn, rm); 9763 } 9764 9765 void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9766 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9767 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9768 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9769 VIXL_ASSERT(allow_macro_instructions_); 9770 VIXL_ASSERT(OutsideITBlock()); 9771 MacroEmissionCheckScope guard(this); 9772 vseleq(dt, rd, rn, rm); 9773 } 9774 9775 void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9776 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9777 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9778 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9779 VIXL_ASSERT(allow_macro_instructions_); 9780 VIXL_ASSERT(OutsideITBlock()); 9781 MacroEmissionCheckScope guard(this); 9782 vseleq(dt, rd, rn, rm); 9783 } 9784 9785 void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9786 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9787 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9788 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9789 VIXL_ASSERT(allow_macro_instructions_); 9790 VIXL_ASSERT(OutsideITBlock()); 9791 MacroEmissionCheckScope guard(this); 9792 vselge(dt, rd, rn, rm); 9793 } 9794 9795 void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9796 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9797 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9798 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9799 VIXL_ASSERT(allow_macro_instructions_); 9800 VIXL_ASSERT(OutsideITBlock()); 9801 MacroEmissionCheckScope guard(this); 9802 vselge(dt, rd, rn, rm); 9803 } 9804 9805 void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9806 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9807 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9808 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9809 VIXL_ASSERT(allow_macro_instructions_); 9810 VIXL_ASSERT(OutsideITBlock()); 9811 MacroEmissionCheckScope guard(this); 9812 vselgt(dt, rd, rn, rm); 9813 } 9814 9815 void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9816 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9817 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9818 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9819 VIXL_ASSERT(allow_macro_instructions_); 9820 VIXL_ASSERT(OutsideITBlock()); 9821 MacroEmissionCheckScope guard(this); 9822 vselgt(dt, rd, rn, rm); 9823 } 9824 9825 void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9826 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9827 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9828 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9829 VIXL_ASSERT(allow_macro_instructions_); 9830 VIXL_ASSERT(OutsideITBlock()); 9831 MacroEmissionCheckScope guard(this); 9832 vselvs(dt, rd, rn, rm); 9833 } 9834 9835 void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9836 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9837 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9838 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9839 VIXL_ASSERT(allow_macro_instructions_); 9840 VIXL_ASSERT(OutsideITBlock()); 9841 MacroEmissionCheckScope guard(this); 9842 vselvs(dt, rd, rn, rm); 9843 } 9844 9845 void Vshl(Condition cond, 9846 DataType dt, 9847 DRegister rd, 9848 DRegister rm, 9849 const DOperand& operand) { 9850 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9851 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9852 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9853 VIXL_ASSERT(allow_macro_instructions_); 9854 VIXL_ASSERT(OutsideITBlock()); 9855 MacroEmissionCheckScope guard(this); 9856 ITScope it_scope(this, &cond); 9857 vshl(cond, dt, rd, rm, operand); 9858 } 9859 void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9860 Vshl(al, dt, rd, rm, operand); 9861 } 9862 9863 void Vshl(Condition cond, 9864 DataType dt, 9865 QRegister rd, 9866 QRegister rm, 9867 const QOperand& operand) { 9868 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9869 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9870 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9871 VIXL_ASSERT(allow_macro_instructions_); 9872 VIXL_ASSERT(OutsideITBlock()); 9873 MacroEmissionCheckScope guard(this); 9874 ITScope it_scope(this, &cond); 9875 vshl(cond, dt, rd, rm, operand); 9876 } 9877 void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9878 Vshl(al, dt, rd, rm, operand); 9879 } 9880 9881 void Vshll(Condition cond, 9882 DataType dt, 9883 QRegister rd, 9884 DRegister rm, 9885 const DOperand& operand) { 9886 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9887 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9888 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9889 VIXL_ASSERT(allow_macro_instructions_); 9890 VIXL_ASSERT(OutsideITBlock()); 9891 MacroEmissionCheckScope guard(this); 9892 ITScope it_scope(this, &cond); 9893 vshll(cond, dt, rd, rm, operand); 9894 } 9895 void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) { 9896 Vshll(al, dt, rd, rm, operand); 9897 } 9898 9899 void Vshr(Condition cond, 9900 DataType dt, 9901 DRegister rd, 9902 DRegister rm, 9903 const DOperand& operand) { 9904 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9905 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9906 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9907 VIXL_ASSERT(allow_macro_instructions_); 9908 VIXL_ASSERT(OutsideITBlock()); 9909 MacroEmissionCheckScope guard(this); 9910 ITScope it_scope(this, &cond); 9911 vshr(cond, dt, rd, rm, operand); 9912 } 9913 void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9914 Vshr(al, dt, rd, rm, operand); 9915 } 9916 9917 void Vshr(Condition cond, 9918 DataType dt, 9919 QRegister rd, 9920 QRegister rm, 9921 const QOperand& operand) { 9922 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9923 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9924 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9925 VIXL_ASSERT(allow_macro_instructions_); 9926 VIXL_ASSERT(OutsideITBlock()); 9927 MacroEmissionCheckScope guard(this); 9928 ITScope it_scope(this, &cond); 9929 vshr(cond, dt, rd, rm, operand); 9930 } 9931 void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9932 Vshr(al, dt, rd, rm, operand); 9933 } 9934 9935 void Vshrn(Condition cond, 9936 DataType dt, 9937 DRegister rd, 9938 QRegister rm, 9939 const QOperand& operand) { 9940 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9941 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9942 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9943 VIXL_ASSERT(allow_macro_instructions_); 9944 VIXL_ASSERT(OutsideITBlock()); 9945 MacroEmissionCheckScope guard(this); 9946 ITScope it_scope(this, &cond); 9947 vshrn(cond, dt, rd, rm, operand); 9948 } 9949 void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) { 9950 Vshrn(al, dt, rd, rm, operand); 9951 } 9952 9953 void Vsli(Condition cond, 9954 DataType dt, 9955 DRegister rd, 9956 DRegister rm, 9957 const DOperand& operand) { 9958 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9959 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9960 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9961 VIXL_ASSERT(allow_macro_instructions_); 9962 VIXL_ASSERT(OutsideITBlock()); 9963 MacroEmissionCheckScope guard(this); 9964 ITScope it_scope(this, &cond); 9965 vsli(cond, dt, rd, rm, operand); 9966 } 9967 void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9968 Vsli(al, dt, rd, rm, operand); 9969 } 9970 9971 void Vsli(Condition cond, 9972 DataType dt, 9973 QRegister rd, 9974 QRegister rm, 9975 const QOperand& operand) { 9976 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9977 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9978 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9979 VIXL_ASSERT(allow_macro_instructions_); 9980 VIXL_ASSERT(OutsideITBlock()); 9981 MacroEmissionCheckScope guard(this); 9982 ITScope it_scope(this, &cond); 9983 vsli(cond, dt, rd, rm, operand); 9984 } 9985 void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9986 Vsli(al, dt, rd, rm, operand); 9987 } 9988 9989 void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) { 9990 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9992 VIXL_ASSERT(allow_macro_instructions_); 9993 VIXL_ASSERT(OutsideITBlock()); 9994 MacroEmissionCheckScope guard(this); 9995 ITScope it_scope(this, &cond); 9996 vsqrt(cond, dt, rd, rm); 9997 } 9998 void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); } 9999 10000 void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10001 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10002 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10003 VIXL_ASSERT(allow_macro_instructions_); 10004 VIXL_ASSERT(OutsideITBlock()); 10005 MacroEmissionCheckScope guard(this); 10006 ITScope it_scope(this, &cond); 10007 vsqrt(cond, dt, rd, rm); 10008 } 10009 void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); } 10010 10011 void Vsra(Condition cond, 10012 DataType dt, 10013 DRegister rd, 10014 DRegister rm, 10015 const DOperand& operand) { 10016 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10017 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10018 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10019 VIXL_ASSERT(allow_macro_instructions_); 10020 VIXL_ASSERT(OutsideITBlock()); 10021 MacroEmissionCheckScope guard(this); 10022 ITScope it_scope(this, &cond); 10023 vsra(cond, dt, rd, rm, operand); 10024 } 10025 void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 10026 Vsra(al, dt, rd, rm, operand); 10027 } 10028 10029 void Vsra(Condition cond, 10030 DataType dt, 10031 QRegister rd, 10032 QRegister rm, 10033 const QOperand& operand) { 10034 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10035 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10036 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10037 VIXL_ASSERT(allow_macro_instructions_); 10038 VIXL_ASSERT(OutsideITBlock()); 10039 MacroEmissionCheckScope guard(this); 10040 ITScope it_scope(this, &cond); 10041 vsra(cond, dt, rd, rm, operand); 10042 } 10043 void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 10044 Vsra(al, dt, rd, rm, operand); 10045 } 10046 10047 void Vsri(Condition cond, 10048 DataType dt, 10049 DRegister rd, 10050 DRegister rm, 10051 const DOperand& operand) { 10052 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10053 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10054 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10055 VIXL_ASSERT(allow_macro_instructions_); 10056 VIXL_ASSERT(OutsideITBlock()); 10057 MacroEmissionCheckScope guard(this); 10058 ITScope it_scope(this, &cond); 10059 vsri(cond, dt, rd, rm, operand); 10060 } 10061 void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 10062 Vsri(al, dt, rd, rm, operand); 10063 } 10064 10065 void Vsri(Condition cond, 10066 DataType dt, 10067 QRegister rd, 10068 QRegister rm, 10069 const QOperand& operand) { 10070 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10071 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10072 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10073 VIXL_ASSERT(allow_macro_instructions_); 10074 VIXL_ASSERT(OutsideITBlock()); 10075 MacroEmissionCheckScope guard(this); 10076 ITScope it_scope(this, &cond); 10077 vsri(cond, dt, rd, rm, operand); 10078 } 10079 void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 10080 Vsri(al, dt, rd, rm, operand); 10081 } 10082 10083 void Vst1(Condition cond, 10084 DataType dt, 10085 const NeonRegisterList& nreglist, 10086 const AlignedMemOperand& operand) { 10087 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10088 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10089 VIXL_ASSERT(allow_macro_instructions_); 10090 VIXL_ASSERT(OutsideITBlock()); 10091 MacroEmissionCheckScope guard(this); 10092 ITScope it_scope(this, &cond); 10093 vst1(cond, dt, nreglist, operand); 10094 } 10095 void Vst1(DataType dt, 10096 const NeonRegisterList& nreglist, 10097 const AlignedMemOperand& operand) { 10098 Vst1(al, dt, nreglist, operand); 10099 } 10100 10101 void Vst2(Condition cond, 10102 DataType dt, 10103 const NeonRegisterList& nreglist, 10104 const AlignedMemOperand& operand) { 10105 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10106 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10107 VIXL_ASSERT(allow_macro_instructions_); 10108 VIXL_ASSERT(OutsideITBlock()); 10109 MacroEmissionCheckScope guard(this); 10110 ITScope it_scope(this, &cond); 10111 vst2(cond, dt, nreglist, operand); 10112 } 10113 void Vst2(DataType dt, 10114 const NeonRegisterList& nreglist, 10115 const AlignedMemOperand& operand) { 10116 Vst2(al, dt, nreglist, operand); 10117 } 10118 10119 void Vst3(Condition cond, 10120 DataType dt, 10121 const NeonRegisterList& nreglist, 10122 const AlignedMemOperand& operand) { 10123 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10124 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10125 VIXL_ASSERT(allow_macro_instructions_); 10126 VIXL_ASSERT(OutsideITBlock()); 10127 MacroEmissionCheckScope guard(this); 10128 ITScope it_scope(this, &cond); 10129 vst3(cond, dt, nreglist, operand); 10130 } 10131 void Vst3(DataType dt, 10132 const NeonRegisterList& nreglist, 10133 const AlignedMemOperand& operand) { 10134 Vst3(al, dt, nreglist, operand); 10135 } 10136 10137 void Vst3(Condition cond, 10138 DataType dt, 10139 const NeonRegisterList& nreglist, 10140 const MemOperand& operand) { 10141 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10142 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10143 VIXL_ASSERT(allow_macro_instructions_); 10144 VIXL_ASSERT(OutsideITBlock()); 10145 MacroEmissionCheckScope guard(this); 10146 ITScope it_scope(this, &cond); 10147 vst3(cond, dt, nreglist, operand); 10148 } 10149 void Vst3(DataType dt, 10150 const NeonRegisterList& nreglist, 10151 const MemOperand& operand) { 10152 Vst3(al, dt, nreglist, operand); 10153 } 10154 10155 void Vst4(Condition cond, 10156 DataType dt, 10157 const NeonRegisterList& nreglist, 10158 const AlignedMemOperand& operand) { 10159 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10160 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10161 VIXL_ASSERT(allow_macro_instructions_); 10162 VIXL_ASSERT(OutsideITBlock()); 10163 MacroEmissionCheckScope guard(this); 10164 ITScope it_scope(this, &cond); 10165 vst4(cond, dt, nreglist, operand); 10166 } 10167 void Vst4(DataType dt, 10168 const NeonRegisterList& nreglist, 10169 const AlignedMemOperand& operand) { 10170 Vst4(al, dt, nreglist, operand); 10171 } 10172 10173 void Vstm(Condition cond, 10174 DataType dt, 10175 Register rn, 10176 WriteBack write_back, 10177 DRegisterList dreglist) { 10178 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10179 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 10180 VIXL_ASSERT(allow_macro_instructions_); 10181 VIXL_ASSERT(OutsideITBlock()); 10182 MacroEmissionCheckScope guard(this); 10183 ITScope it_scope(this, &cond); 10184 vstm(cond, dt, rn, write_back, dreglist); 10185 } 10186 void Vstm(DataType dt, 10187 Register rn, 10188 WriteBack write_back, 10189 DRegisterList dreglist) { 10190 Vstm(al, dt, rn, write_back, dreglist); 10191 } 10192 void Vstm(Condition cond, 10193 Register rn, 10194 WriteBack write_back, 10195 DRegisterList dreglist) { 10196 Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist); 10197 } 10198 void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) { 10199 Vstm(al, kDataTypeValueNone, rn, write_back, dreglist); 10200 } 10201 10202 void Vstm(Condition cond, 10203 DataType dt, 10204 Register rn, 10205 WriteBack write_back, 10206 SRegisterList sreglist) { 10207 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10208 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 10209 VIXL_ASSERT(allow_macro_instructions_); 10210 VIXL_ASSERT(OutsideITBlock()); 10211 MacroEmissionCheckScope guard(this); 10212 ITScope it_scope(this, &cond); 10213 vstm(cond, dt, rn, write_back, sreglist); 10214 } 10215 void Vstm(DataType dt, 10216 Register rn, 10217 WriteBack write_back, 10218 SRegisterList sreglist) { 10219 Vstm(al, dt, rn, write_back, sreglist); 10220 } 10221 void Vstm(Condition cond, 10222 Register rn, 10223 WriteBack write_back, 10224 SRegisterList sreglist) { 10225 Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist); 10226 } 10227 void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) { 10228 Vstm(al, kDataTypeValueNone, rn, write_back, sreglist); 10229 } 10230 10231 void Vstmdb(Condition cond, 10232 DataType dt, 10233 Register rn, 10234 WriteBack write_back, 10235 DRegisterList dreglist) { 10236 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10237 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 10238 VIXL_ASSERT(allow_macro_instructions_); 10239 VIXL_ASSERT(OutsideITBlock()); 10240 MacroEmissionCheckScope guard(this); 10241 ITScope it_scope(this, &cond); 10242 vstmdb(cond, dt, rn, write_back, dreglist); 10243 } 10244 void Vstmdb(DataType dt, 10245 Register rn, 10246 WriteBack write_back, 10247 DRegisterList dreglist) { 10248 Vstmdb(al, dt, rn, write_back, dreglist); 10249 } 10250 void Vstmdb(Condition cond, 10251 Register rn, 10252 WriteBack write_back, 10253 DRegisterList dreglist) { 10254 Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist); 10255 } 10256 void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) { 10257 Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist); 10258 } 10259 10260 void Vstmdb(Condition cond, 10261 DataType dt, 10262 Register rn, 10263 WriteBack write_back, 10264 SRegisterList sreglist) { 10265 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10266 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 10267 VIXL_ASSERT(allow_macro_instructions_); 10268 VIXL_ASSERT(OutsideITBlock()); 10269 MacroEmissionCheckScope guard(this); 10270 ITScope it_scope(this, &cond); 10271 vstmdb(cond, dt, rn, write_back, sreglist); 10272 } 10273 void Vstmdb(DataType dt, 10274 Register rn, 10275 WriteBack write_back, 10276 SRegisterList sreglist) { 10277 Vstmdb(al, dt, rn, write_back, sreglist); 10278 } 10279 void Vstmdb(Condition cond, 10280 Register rn, 10281 WriteBack write_back, 10282 SRegisterList sreglist) { 10283 Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist); 10284 } 10285 void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) { 10286 Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist); 10287 } 10288 10289 void Vstmia(Condition cond, 10290 DataType dt, 10291 Register rn, 10292 WriteBack write_back, 10293 DRegisterList dreglist) { 10294 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10295 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 10296 VIXL_ASSERT(allow_macro_instructions_); 10297 VIXL_ASSERT(OutsideITBlock()); 10298 MacroEmissionCheckScope guard(this); 10299 ITScope it_scope(this, &cond); 10300 vstmia(cond, dt, rn, write_back, dreglist); 10301 } 10302 void Vstmia(DataType dt, 10303 Register rn, 10304 WriteBack write_back, 10305 DRegisterList dreglist) { 10306 Vstmia(al, dt, rn, write_back, dreglist); 10307 } 10308 void Vstmia(Condition cond, 10309 Register rn, 10310 WriteBack write_back, 10311 DRegisterList dreglist) { 10312 Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist); 10313 } 10314 void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) { 10315 Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist); 10316 } 10317 10318 void Vstmia(Condition cond, 10319 DataType dt, 10320 Register rn, 10321 WriteBack write_back, 10322 SRegisterList sreglist) { 10323 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10324 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 10325 VIXL_ASSERT(allow_macro_instructions_); 10326 VIXL_ASSERT(OutsideITBlock()); 10327 MacroEmissionCheckScope guard(this); 10328 ITScope it_scope(this, &cond); 10329 vstmia(cond, dt, rn, write_back, sreglist); 10330 } 10331 void Vstmia(DataType dt, 10332 Register rn, 10333 WriteBack write_back, 10334 SRegisterList sreglist) { 10335 Vstmia(al, dt, rn, write_back, sreglist); 10336 } 10337 void Vstmia(Condition cond, 10338 Register rn, 10339 WriteBack write_back, 10340 SRegisterList sreglist) { 10341 Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist); 10342 } 10343 void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) { 10344 Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist); 10345 } 10346 10347 void Vstr(Condition cond, 10348 DataType dt, 10349 DRegister rd, 10350 const MemOperand& operand) { 10351 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10352 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10353 VIXL_ASSERT(allow_macro_instructions_); 10354 VIXL_ASSERT(OutsideITBlock()); 10355 MacroEmissionCheckScope guard(this); 10356 ITScope it_scope(this, &cond); 10357 vstr(cond, dt, rd, operand); 10358 } 10359 void Vstr(DataType dt, DRegister rd, const MemOperand& operand) { 10360 Vstr(al, dt, rd, operand); 10361 } 10362 void Vstr(Condition cond, DRegister rd, const MemOperand& operand) { 10363 Vstr(cond, Untyped64, rd, operand); 10364 } 10365 void Vstr(DRegister rd, const MemOperand& operand) { 10366 Vstr(al, Untyped64, rd, operand); 10367 } 10368 10369 void Vstr(Condition cond, 10370 DataType dt, 10371 SRegister rd, 10372 const MemOperand& operand) { 10373 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10374 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10375 VIXL_ASSERT(allow_macro_instructions_); 10376 VIXL_ASSERT(OutsideITBlock()); 10377 MacroEmissionCheckScope guard(this); 10378 ITScope it_scope(this, &cond); 10379 vstr(cond, dt, rd, operand); 10380 } 10381 void Vstr(DataType dt, SRegister rd, const MemOperand& operand) { 10382 Vstr(al, dt, rd, operand); 10383 } 10384 void Vstr(Condition cond, SRegister rd, const MemOperand& operand) { 10385 Vstr(cond, Untyped32, rd, operand); 10386 } 10387 void Vstr(SRegister rd, const MemOperand& operand) { 10388 Vstr(al, Untyped32, rd, operand); 10389 } 10390 10391 void Vsub( 10392 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10393 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10394 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10395 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10396 VIXL_ASSERT(allow_macro_instructions_); 10397 VIXL_ASSERT(OutsideITBlock()); 10398 MacroEmissionCheckScope guard(this); 10399 ITScope it_scope(this, &cond); 10400 vsub(cond, dt, rd, rn, rm); 10401 } 10402 void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10403 Vsub(al, dt, rd, rn, rm); 10404 } 10405 10406 void Vsub( 10407 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10408 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10409 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10410 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10411 VIXL_ASSERT(allow_macro_instructions_); 10412 VIXL_ASSERT(OutsideITBlock()); 10413 MacroEmissionCheckScope guard(this); 10414 ITScope it_scope(this, &cond); 10415 vsub(cond, dt, rd, rn, rm); 10416 } 10417 void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10418 Vsub(al, dt, rd, rn, rm); 10419 } 10420 10421 void Vsub( 10422 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 10423 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10424 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10425 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10426 VIXL_ASSERT(allow_macro_instructions_); 10427 VIXL_ASSERT(OutsideITBlock()); 10428 MacroEmissionCheckScope guard(this); 10429 ITScope it_scope(this, &cond); 10430 vsub(cond, dt, rd, rn, rm); 10431 } 10432 void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 10433 Vsub(al, dt, rd, rn, rm); 10434 } 10435 10436 void Vsubhn( 10437 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 10438 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10439 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10440 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10441 VIXL_ASSERT(allow_macro_instructions_); 10442 VIXL_ASSERT(OutsideITBlock()); 10443 MacroEmissionCheckScope guard(this); 10444 ITScope it_scope(this, &cond); 10445 vsubhn(cond, dt, rd, rn, rm); 10446 } 10447 void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 10448 Vsubhn(al, dt, rd, rn, rm); 10449 } 10450 10451 void Vsubl( 10452 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 10453 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10454 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10455 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10456 VIXL_ASSERT(allow_macro_instructions_); 10457 VIXL_ASSERT(OutsideITBlock()); 10458 MacroEmissionCheckScope guard(this); 10459 ITScope it_scope(this, &cond); 10460 vsubl(cond, dt, rd, rn, rm); 10461 } 10462 void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 10463 Vsubl(al, dt, rd, rn, rm); 10464 } 10465 10466 void Vsubw( 10467 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) { 10468 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10469 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10470 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10471 VIXL_ASSERT(allow_macro_instructions_); 10472 VIXL_ASSERT(OutsideITBlock()); 10473 MacroEmissionCheckScope guard(this); 10474 ITScope it_scope(this, &cond); 10475 vsubw(cond, dt, rd, rn, rm); 10476 } 10477 void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) { 10478 Vsubw(al, dt, rd, rn, rm); 10479 } 10480 10481 void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10482 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10483 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10484 VIXL_ASSERT(allow_macro_instructions_); 10485 VIXL_ASSERT(OutsideITBlock()); 10486 MacroEmissionCheckScope guard(this); 10487 ITScope it_scope(this, &cond); 10488 vswp(cond, dt, rd, rm); 10489 } 10490 void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); } 10491 void Vswp(Condition cond, DRegister rd, DRegister rm) { 10492 Vswp(cond, kDataTypeValueNone, rd, rm); 10493 } 10494 void Vswp(DRegister rd, DRegister rm) { 10495 Vswp(al, kDataTypeValueNone, rd, rm); 10496 } 10497 10498 void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10499 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10500 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10501 VIXL_ASSERT(allow_macro_instructions_); 10502 VIXL_ASSERT(OutsideITBlock()); 10503 MacroEmissionCheckScope guard(this); 10504 ITScope it_scope(this, &cond); 10505 vswp(cond, dt, rd, rm); 10506 } 10507 void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); } 10508 void Vswp(Condition cond, QRegister rd, QRegister rm) { 10509 Vswp(cond, kDataTypeValueNone, rd, rm); 10510 } 10511 void Vswp(QRegister rd, QRegister rm) { 10512 Vswp(al, kDataTypeValueNone, rd, rm); 10513 } 10514 10515 void Vtbl(Condition cond, 10516 DataType dt, 10517 DRegister rd, 10518 const NeonRegisterList& nreglist, 10519 DRegister rm) { 10520 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10521 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10522 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10523 VIXL_ASSERT(allow_macro_instructions_); 10524 VIXL_ASSERT(OutsideITBlock()); 10525 MacroEmissionCheckScope guard(this); 10526 ITScope it_scope(this, &cond); 10527 vtbl(cond, dt, rd, nreglist, rm); 10528 } 10529 void Vtbl(DataType dt, 10530 DRegister rd, 10531 const NeonRegisterList& nreglist, 10532 DRegister rm) { 10533 Vtbl(al, dt, rd, nreglist, rm); 10534 } 10535 10536 void Vtbx(Condition cond, 10537 DataType dt, 10538 DRegister rd, 10539 const NeonRegisterList& nreglist, 10540 DRegister rm) { 10541 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10542 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10543 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10544 VIXL_ASSERT(allow_macro_instructions_); 10545 VIXL_ASSERT(OutsideITBlock()); 10546 MacroEmissionCheckScope guard(this); 10547 ITScope it_scope(this, &cond); 10548 vtbx(cond, dt, rd, nreglist, rm); 10549 } 10550 void Vtbx(DataType dt, 10551 DRegister rd, 10552 const NeonRegisterList& nreglist, 10553 DRegister rm) { 10554 Vtbx(al, dt, rd, nreglist, rm); 10555 } 10556 10557 void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10558 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10559 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10560 VIXL_ASSERT(allow_macro_instructions_); 10561 VIXL_ASSERT(OutsideITBlock()); 10562 MacroEmissionCheckScope guard(this); 10563 ITScope it_scope(this, &cond); 10564 vtrn(cond, dt, rd, rm); 10565 } 10566 void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); } 10567 10568 void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10569 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10570 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10571 VIXL_ASSERT(allow_macro_instructions_); 10572 VIXL_ASSERT(OutsideITBlock()); 10573 MacroEmissionCheckScope guard(this); 10574 ITScope it_scope(this, &cond); 10575 vtrn(cond, dt, rd, rm); 10576 } 10577 void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); } 10578 10579 void Vtst( 10580 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10581 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10582 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10583 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10584 VIXL_ASSERT(allow_macro_instructions_); 10585 VIXL_ASSERT(OutsideITBlock()); 10586 MacroEmissionCheckScope guard(this); 10587 ITScope it_scope(this, &cond); 10588 vtst(cond, dt, rd, rn, rm); 10589 } 10590 void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10591 Vtst(al, dt, rd, rn, rm); 10592 } 10593 10594 void Vtst( 10595 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10596 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10597 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10598 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10599 VIXL_ASSERT(allow_macro_instructions_); 10600 VIXL_ASSERT(OutsideITBlock()); 10601 MacroEmissionCheckScope guard(this); 10602 ITScope it_scope(this, &cond); 10603 vtst(cond, dt, rd, rn, rm); 10604 } 10605 void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10606 Vtst(al, dt, rd, rn, rm); 10607 } 10608 10609 void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10610 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10611 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10612 VIXL_ASSERT(allow_macro_instructions_); 10613 VIXL_ASSERT(OutsideITBlock()); 10614 MacroEmissionCheckScope guard(this); 10615 ITScope it_scope(this, &cond); 10616 vuzp(cond, dt, rd, rm); 10617 } 10618 void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); } 10619 10620 void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10621 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10622 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10623 VIXL_ASSERT(allow_macro_instructions_); 10624 VIXL_ASSERT(OutsideITBlock()); 10625 MacroEmissionCheckScope guard(this); 10626 ITScope it_scope(this, &cond); 10627 vuzp(cond, dt, rd, rm); 10628 } 10629 void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); } 10630 10631 void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10632 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10633 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10634 VIXL_ASSERT(allow_macro_instructions_); 10635 VIXL_ASSERT(OutsideITBlock()); 10636 MacroEmissionCheckScope guard(this); 10637 ITScope it_scope(this, &cond); 10638 vzip(cond, dt, rd, rm); 10639 } 10640 void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); } 10641 10642 void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10643 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10644 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10645 VIXL_ASSERT(allow_macro_instructions_); 10646 VIXL_ASSERT(OutsideITBlock()); 10647 MacroEmissionCheckScope guard(this); 10648 ITScope it_scope(this, &cond); 10649 vzip(cond, dt, rd, rm); 10650 } 10651 void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); } 10652 10653 void Yield(Condition cond) { 10654 VIXL_ASSERT(allow_macro_instructions_); 10655 VIXL_ASSERT(OutsideITBlock()); 10656 MacroEmissionCheckScope guard(this); 10657 ITScope it_scope(this, &cond); 10658 yield(cond); 10659 } 10660 void Yield() { Yield(al); } 10661 void Vabs(Condition cond, VRegister rd, VRegister rm) { 10662 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10663 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10664 if (rd.IsS()) { 10665 Vabs(cond, F32, rd.S(), rm.S()); 10666 } else { 10667 Vabs(cond, F64, rd.D(), rm.D()); 10668 } 10669 } 10670 void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); } 10671 void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10672 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10673 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10674 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10675 if (rd.IsS()) { 10676 Vadd(cond, F32, rd.S(), rn.S(), rm.S()); 10677 } else { 10678 Vadd(cond, F64, rd.D(), rn.D(), rm.D()); 10679 } 10680 } 10681 void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); } 10682 void Vcmp(Condition cond, VRegister rd, VRegister rm) { 10683 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10684 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10685 if (rd.IsS()) { 10686 Vcmp(cond, F32, rd.S(), rm.S()); 10687 } else { 10688 Vcmp(cond, F64, rd.D(), rm.D()); 10689 } 10690 } 10691 void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); } 10692 void Vcmpe(Condition cond, VRegister rd, VRegister rm) { 10693 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10694 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10695 if (rd.IsS()) { 10696 Vcmpe(cond, F32, rd.S(), rm.S()); 10697 } else { 10698 Vcmpe(cond, F64, rd.D(), rm.D()); 10699 } 10700 } 10701 void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); } 10702 void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10703 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10704 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10705 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10706 if (rd.IsS()) { 10707 Vdiv(cond, F32, rd.S(), rn.S(), rm.S()); 10708 } else { 10709 Vdiv(cond, F64, rd.D(), rn.D(), rm.D()); 10710 } 10711 } 10712 void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); } 10713 void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10714 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10715 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10716 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10717 if (rd.IsS()) { 10718 Vfma(cond, F32, rd.S(), rn.S(), rm.S()); 10719 } else { 10720 Vfma(cond, F64, rd.D(), rn.D(), rm.D()); 10721 } 10722 } 10723 void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); } 10724 void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10725 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10726 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10727 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10728 if (rd.IsS()) { 10729 Vfms(cond, F32, rd.S(), rn.S(), rm.S()); 10730 } else { 10731 Vfms(cond, F64, rd.D(), rn.D(), rm.D()); 10732 } 10733 } 10734 void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); } 10735 void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10736 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10737 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10738 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10739 if (rd.IsS()) { 10740 Vfnma(cond, F32, rd.S(), rn.S(), rm.S()); 10741 } else { 10742 Vfnma(cond, F64, rd.D(), rn.D(), rm.D()); 10743 } 10744 } 10745 void Vfnma(VRegister rd, VRegister rn, VRegister rm) { 10746 Vfnma(al, rd, rn, rm); 10747 } 10748 void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10749 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10750 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10751 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10752 if (rd.IsS()) { 10753 Vfnms(cond, F32, rd.S(), rn.S(), rm.S()); 10754 } else { 10755 Vfnms(cond, F64, rd.D(), rn.D(), rm.D()); 10756 } 10757 } 10758 void Vfnms(VRegister rd, VRegister rn, VRegister rm) { 10759 Vfnms(al, rd, rn, rm); 10760 } 10761 void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) { 10762 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10763 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10764 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10765 if (rd.IsS()) { 10766 Vmaxnm(F32, rd.S(), rn.S(), rm.S()); 10767 } else { 10768 Vmaxnm(F64, rd.D(), rn.D(), rm.D()); 10769 } 10770 } 10771 void Vminnm(VRegister rd, VRegister rn, VRegister rm) { 10772 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10773 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10774 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10775 if (rd.IsS()) { 10776 Vminnm(F32, rd.S(), rn.S(), rm.S()); 10777 } else { 10778 Vminnm(F64, rd.D(), rn.D(), rm.D()); 10779 } 10780 } 10781 void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10782 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10783 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10784 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10785 if (rd.IsS()) { 10786 Vmla(cond, F32, rd.S(), rn.S(), rm.S()); 10787 } else { 10788 Vmla(cond, F64, rd.D(), rn.D(), rm.D()); 10789 } 10790 } 10791 void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); } 10792 void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10793 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10794 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10795 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10796 if (rd.IsS()) { 10797 Vmls(cond, F32, rd.S(), rn.S(), rm.S()); 10798 } else { 10799 Vmls(cond, F64, rd.D(), rn.D(), rm.D()); 10800 } 10801 } 10802 void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); } 10803 void Vmov(Condition cond, VRegister rd, VRegister rm) { 10804 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10805 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10806 if (rd.IsS()) { 10807 Vmov(cond, F32, rd.S(), rm.S()); 10808 } else { 10809 Vmov(cond, F64, rd.D(), rm.D()); 10810 } 10811 } 10812 void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); } 10813 void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10814 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10815 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10816 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10817 if (rd.IsS()) { 10818 Vmul(cond, F32, rd.S(), rn.S(), rm.S()); 10819 } else { 10820 Vmul(cond, F64, rd.D(), rn.D(), rm.D()); 10821 } 10822 } 10823 void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); } 10824 void Vneg(Condition cond, VRegister rd, VRegister rm) { 10825 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10826 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10827 if (rd.IsS()) { 10828 Vneg(cond, F32, rd.S(), rm.S()); 10829 } else { 10830 Vneg(cond, F64, rd.D(), rm.D()); 10831 } 10832 } 10833 void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); } 10834 void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10835 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10836 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10837 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10838 if (rd.IsS()) { 10839 Vnmla(cond, F32, rd.S(), rn.S(), rm.S()); 10840 } else { 10841 Vnmla(cond, F64, rd.D(), rn.D(), rm.D()); 10842 } 10843 } 10844 void Vnmla(VRegister rd, VRegister rn, VRegister rm) { 10845 Vnmla(al, rd, rn, rm); 10846 } 10847 void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10848 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10849 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10850 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10851 if (rd.IsS()) { 10852 Vnmls(cond, F32, rd.S(), rn.S(), rm.S()); 10853 } else { 10854 Vnmls(cond, F64, rd.D(), rn.D(), rm.D()); 10855 } 10856 } 10857 void Vnmls(VRegister rd, VRegister rn, VRegister rm) { 10858 Vnmls(al, rd, rn, rm); 10859 } 10860 void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10861 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10862 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10863 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10864 if (rd.IsS()) { 10865 Vnmul(cond, F32, rd.S(), rn.S(), rm.S()); 10866 } else { 10867 Vnmul(cond, F64, rd.D(), rn.D(), rm.D()); 10868 } 10869 } 10870 void Vnmul(VRegister rd, VRegister rn, VRegister rm) { 10871 Vnmul(al, rd, rn, rm); 10872 } 10873 void Vseleq(VRegister rd, VRegister rn, VRegister rm) { 10874 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10875 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10876 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10877 if (rd.IsS()) { 10878 Vseleq(F32, rd.S(), rn.S(), rm.S()); 10879 } else { 10880 Vseleq(F64, rd.D(), rn.D(), rm.D()); 10881 } 10882 } 10883 void Vselge(VRegister rd, VRegister rn, VRegister rm) { 10884 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10885 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10886 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10887 if (rd.IsS()) { 10888 Vselge(F32, rd.S(), rn.S(), rm.S()); 10889 } else { 10890 Vselge(F64, rd.D(), rn.D(), rm.D()); 10891 } 10892 } 10893 void Vselgt(VRegister rd, VRegister rn, VRegister rm) { 10894 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10895 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10896 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10897 if (rd.IsS()) { 10898 Vselgt(F32, rd.S(), rn.S(), rm.S()); 10899 } else { 10900 Vselgt(F64, rd.D(), rn.D(), rm.D()); 10901 } 10902 } 10903 void Vselvs(VRegister rd, VRegister rn, VRegister rm) { 10904 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10905 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10906 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10907 if (rd.IsS()) { 10908 Vselvs(F32, rd.S(), rn.S(), rm.S()); 10909 } else { 10910 Vselvs(F64, rd.D(), rn.D(), rm.D()); 10911 } 10912 } 10913 void Vsqrt(Condition cond, VRegister rd, VRegister rm) { 10914 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10915 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10916 if (rd.IsS()) { 10917 Vsqrt(cond, F32, rd.S(), rm.S()); 10918 } else { 10919 Vsqrt(cond, F64, rd.D(), rm.D()); 10920 } 10921 } 10922 void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); } 10923 void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10924 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10925 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10926 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10927 if (rd.IsS()) { 10928 Vsub(cond, F32, rd.S(), rn.S(), rm.S()); 10929 } else { 10930 Vsub(cond, F64, rd.D(), rn.D(), rm.D()); 10931 } 10932 } 10933 void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); } 10934 // End of generated code. 10935 10936 virtual bool AllowUnpredictable() VIXL_OVERRIDE { 10937 VIXL_ABORT_WITH_MSG("Unpredictable instruction.\n"); 10938 return false; 10939 } 10940 virtual bool AllowStronglyDiscouraged() VIXL_OVERRIDE { 10941 VIXL_ABORT_WITH_MSG( 10942 "ARM strongly recommends to not use this instruction.\n"); 10943 return false; 10944 } 10945 10946 private: 10947 RegisterList available_; 10948 VRegisterList available_vfp_; 10949 UseScratchRegisterScope* current_scratch_scope_; 10950 MacroAssemblerContext context_; 10951 Label::Offset checkpoint_; 10952 LiteralPoolManager literal_pool_manager_; 10953 VeneerPoolManager veneer_pool_manager_; 10954 bool generate_simulator_code_; 10955 bool allow_macro_instructions_; 10956}; 10957 10958// This scope utility allows scratch registers to be managed safely. The 10959// MacroAssembler's GetScratchRegisterList() is used as a pool of scratch 10960// registers. These registers can be allocated on demand, and will be returned 10961// at the end of the scope. 10962// 10963// When the scope ends, the MacroAssembler's lists will be restored to their 10964// original state, even if the lists were modified by some other means. 10965// 10966// Scopes must nest perfectly. That is, they must be destructed in reverse 10967// construction order. Otherwise, it is not clear how to handle cases where one 10968// scope acquires a register that was included in a now-closing scope. With 10969// perfect nesting, this cannot occur. 10970class UseScratchRegisterScope { 10971 public: 10972 // This constructor implicitly calls the `Open` function to initialise the 10973 // scope, so it is ready to use immediately after it has been constructed. 10974 explicit UseScratchRegisterScope(MacroAssembler* masm) 10975 : masm_(NULL), parent_(NULL), old_available_(0), old_available_vfp_(0) { 10976 Open(masm); 10977 } 10978 // This constructor allows deferred and optional initialisation of the scope. 10979 // The user is required to explicitly call the `Open` function before using 10980 // the scope. 10981 UseScratchRegisterScope() 10982 : masm_(NULL), parent_(NULL), old_available_(0), old_available_vfp_(0) {} 10983 10984 // This function performs the actual initialisation work. 10985 void Open(MacroAssembler* masm); 10986 10987 // The destructor always implicitly calls the `Close` function. 10988 ~UseScratchRegisterScope() { Close(); } 10989 10990 // This function performs the cleaning-up work. It must succeed even if the 10991 // scope has not been opened. It is safe to call multiple times. 10992 void Close(); 10993 10994 bool IsAvailable(const Register& reg) const; 10995 bool IsAvailable(const VRegister& reg) const; 10996 10997 // Take a register from the temp list. It will be returned automatically when 10998 // the scope ends. 10999 Register Acquire(); 11000 VRegister AcquireV(unsigned size_in_bits); 11001 QRegister AcquireQ(); 11002 DRegister AcquireD(); 11003 SRegister AcquireS(); 11004 11005 // Explicitly release an acquired (or excluded) register, putting it back in 11006 // the temp list. 11007 void Release(const Register& reg); 11008 void Release(const VRegister& reg); 11009 11010 // Make the specified registers available as scratch registers for the 11011 // duration of this scope. 11012 void Include(const RegisterList& list); 11013 void Include(const Register& reg1, 11014 const Register& reg2 = NoReg, 11015 const Register& reg3 = NoReg, 11016 const Register& reg4 = NoReg) { 11017 Include(RegisterList(reg1, reg2, reg3, reg4)); 11018 } 11019 void Include(const VRegisterList& list); 11020 void Include(const VRegister& reg1, 11021 const VRegister& reg2 = NoVReg, 11022 const VRegister& reg3 = NoVReg, 11023 const VRegister& reg4 = NoVReg) { 11024 Include(VRegisterList(reg1, reg2, reg3, reg4)); 11025 } 11026 11027 // Make sure that the specified registers are not available in this scope. 11028 // This can be used to prevent helper functions from using sensitive 11029 // registers, for example. 11030 void Exclude(const RegisterList& list); 11031 void Exclude(const Register& reg1, 11032 const Register& reg2 = NoReg, 11033 const Register& reg3 = NoReg, 11034 const Register& reg4 = NoReg) { 11035 Exclude(RegisterList(reg1, reg2, reg3, reg4)); 11036 } 11037 void Exclude(const VRegisterList& list); 11038 void Exclude(const VRegister& reg1, 11039 const VRegister& reg2 = NoVReg, 11040 const VRegister& reg3 = NoVReg, 11041 const VRegister& reg4 = NoVReg) { 11042 Exclude(VRegisterList(reg1, reg2, reg3, reg4)); 11043 } 11044 11045 // A convenience helper to exclude any registers used by the operand. 11046 void Exclude(const Operand& operand); 11047 11048 // Prevent any scratch registers from being used in this scope. 11049 void ExcludeAll(); 11050 11051 private: 11052 // The MacroAssembler maintains a list of available scratch registers, and 11053 // also keeps track of the most recently-opened scope so that on destruction 11054 // we can check that scopes do not outlive their parents. 11055 MacroAssembler* masm_; 11056 UseScratchRegisterScope* parent_; 11057 11058 // The state of the available lists at the start of this scope. 11059 uint32_t old_available_; // kRRegister 11060 uint64_t old_available_vfp_; // kVRegister 11061 11062 VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) { 11063 VIXL_UNREACHABLE(); 11064 } 11065 VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) { 11066 VIXL_UNREACHABLE(); 11067 } 11068}; 11069 11070 11071} // namespace aarch32 11072} // namespace vixl 11073 11074#endif // VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_ 11075