macro-assembler-aarch32.h revision 80b4a1f554a92b2c4d4504265d0bac545c74c69b 
1// Copyright 2015, VIXL authors
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3//
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27
28#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
29#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
30
31#include "code-generation-scopes-vixl.h"
32#include "macro-assembler-interface.h"
33#include "utils-vixl.h"
34
35#include "aarch32/instructions-aarch32.h"
36#include "aarch32/assembler-aarch32.h"
37#include "aarch32/operands-aarch32.h"
38
39namespace vixl {
40namespace aarch32 {
41
42class JumpTableBase;
43class UseScratchRegisterScope;
44
45enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 };
46
47// LiteralPool class, defined as a container for literals
48class LiteralPool {
49 public:
50  typedef std::list<RawLiteral*>::iterator RawLiteralListIterator;
51
52 public:
53  LiteralPool() : size_(0) {}
54  ~LiteralPool() {
55    VIXL_ASSERT(literals_.empty() && (size_ == 0));
56    for (RawLiteralListIterator literal_it = keep_until_delete_.begin();
57         literal_it != keep_until_delete_.end();
58         literal_it++) {
59      delete *literal_it;
60    }
61    keep_until_delete_.clear();
62  }
63
64  unsigned GetSize() const { return size_; }
65
66  // Add a literal to the literal container.
67  void AddLiteral(RawLiteral* literal) {
68    // Manually placed literals can't be added to a literal pool.
69    VIXL_ASSERT(!literal->IsManuallyPlaced());
70    VIXL_ASSERT(!literal->IsBound());
71    if (literal->GetPositionInPool() == Label::kMaxOffset) {
72      uint32_t position = GetSize();
73      literal->SetPositionInPool(position);
74      literals_.push_back(literal);
75      size_ += literal->GetAlignedSize();
76    }
77  }
78
79  // First literal to be emitted.
80  RawLiteralListIterator GetFirst() { return literals_.begin(); }
81
82  // Mark the end of the literal container.
83  RawLiteralListIterator GetEnd() { return literals_.end(); }
84
85  // Remove all the literals from the container.
86  // If the literal's memory management has been delegated to the container
87  // it will be delete'd.
88  void Clear() {
89    for (RawLiteralListIterator literal_it = GetFirst(); literal_it != GetEnd();
90         literal_it++) {
91      RawLiteral* literal = *literal_it;
92      switch (literal->GetDeletionPolicy()) {
93        case RawLiteral::kDeletedOnPlacementByPool:
94          delete literal;
95          break;
96        case RawLiteral::kDeletedOnPoolDestruction:
97          keep_until_delete_.push_back(literal);
98          break;
99        case RawLiteral::kManuallyDeleted:
100          break;
101      }
102    }
103    literals_.clear();
104    size_ = 0;
105  }
106
107 private:
108  // Size (in bytes and including alignments) of the literal pool.
109  unsigned size_;
110
111  // Literal container.
112  std::list<RawLiteral*> literals_;
113  // Already bound Literal container the app requested this pool to keep.
114  std::list<RawLiteral*> keep_until_delete_;
115};
116
117
118// Macro assembler for aarch32 instruction set.
119class MacroAssembler : public Assembler, public MacroAssemblerInterface {
120 public:
121  enum EmitOption { kBranchRequired, kNoBranchRequired };
122
123  virtual internal::AssemblerBase* AsAssemblerBase() VIXL_OVERRIDE {
124    return this;
125  }
126
127  virtual void BlockPools() VIXL_OVERRIDE {
128    literal_pool_manager_.Block();
129    veneer_pool_manager_.Block();
130  }
131  virtual void ReleasePools() VIXL_OVERRIDE {
132    literal_pool_manager_.Release();
133    veneer_pool_manager_.Release();
134  }
135  virtual void EnsureEmitPoolsFor(size_t size) VIXL_OVERRIDE {
136    // TODO: Optimise this. It also checks that there is space in the buffer,
137    // which we do not need to do here.
138    VIXL_ASSERT(IsUint32(size));
139    EnsureEmitFor(static_cast<uint32_t>(size));
140  }
141
142 private:
143  class MacroEmissionCheckScope : public EmissionCheckScope {
144   public:
145    explicit MacroEmissionCheckScope(MacroAssemblerInterface* masm)
146        : EmissionCheckScope(masm, kTypicalMacroInstructionMaxSize) {}
147
148   private:
149    static const size_t kTypicalMacroInstructionMaxSize =
150        8 * kMaxInstructionSizeInBytes;
151  };
152
153  class MacroAssemblerContext {
154   public:
155    MacroAssemblerContext() : count_(0) {}
156    ~MacroAssemblerContext() {}
157    unsigned GetRecursiveCount() const { return count_; }
158    void Up(const char* loc) {
159      location_stack_[count_] = loc;
160      count_++;
161      if (count_ >= kMaxRecursion) {
162        printf(
163            "Recursion limit reached; unable to resolve macro assembler "
164            "call.\n");
165        printf("Macro assembler context stack:\n");
166        for (unsigned i = 0; i < kMaxRecursion; i++) {
167          printf("%10s %s\n", (i == 0) ? "oldest -> " : "", location_stack_[i]);
168        }
169        VIXL_ABORT();
170      }
171    }
172    void Down() {
173      VIXL_ASSERT((count_ > 0) && (count_ < kMaxRecursion));
174      count_--;
175    }
176
177   private:
178    unsigned count_;
179    static const uint32_t kMaxRecursion = 6;
180    const char* location_stack_[kMaxRecursion];
181  };
182
183  // This scope is used at each Delegate entry to avoid infinite recursion of
184  // Delegate calls. The limit is defined by
185  // MacroAssemblerContext::kMaxRecursion.
186  class ContextScope {
187   public:
188    explicit ContextScope(MacroAssembler* const masm, const char* loc)
189        : masm_(masm) {
190      VIXL_ASSERT(masm_->AllowMacroInstructions());
191      masm_->GetContext()->Up(loc);
192    }
193    ~ContextScope() { masm_->GetContext()->Down(); }
194
195   private:
196    MacroAssembler* const masm_;
197  };
198
199  MacroAssemblerContext* GetContext() { return &context_; }
200
201  class ITScope {
202   public:
203    ITScope(MacroAssembler* masm, Condition* cond, bool can_use_it = false)
204        : masm_(masm), cond_(*cond), can_use_it_(can_use_it) {
205      if (!cond_.Is(al) && masm->IsUsingT32()) {
206        if (can_use_it_) {
207          // IT is not deprecated (that implies a 16 bit T32 instruction).
208          // We generate an IT instruction and a conditional instruction.
209          masm->it(cond_);
210        } else {
211          // The usage of IT is deprecated for the instruction.
212          // We generate a conditional branch and an unconditional instruction.
213          // TODO: Use a scope utility with a size check. To do that, we'd need
214          // one with Open() and Close() implemented.
215          masm_->EnsureEmitFor(kMaxT32MacroInstructionSizeInBytes);
216          // Generate the branch.
217          masm_->b(cond_.Negate(), Narrow, &label_);
218          // Tell the macro-assembler to generate unconditional instructions.
219          *cond = al;
220        }
221      }
222#ifdef VIXL_DEBUG
223      initial_cursor_offset_ = masm->GetCursorOffset();
224#else
225      USE(initial_cursor_offset_);
226#endif
227    }
228    ~ITScope() {
229      if (label_.IsReferenced()) {
230        // We only use the label for conditional T32 instructions for which we
231        // cannot use IT.
232        VIXL_ASSERT(!cond_.Is(al));
233        VIXL_ASSERT(masm_->IsUsingT32());
234        VIXL_ASSERT(!can_use_it_);
235        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
236                    kMaxT32MacroInstructionSizeInBytes);
237        masm_->BindHelper(&label_);
238      } else if (masm_->IsUsingT32() && !cond_.Is(al)) {
239        // If we've generated a conditional T32 instruction but haven't used the
240        // label, we must have used IT. Check that we did not generate a
241        // deprecated sequence.
242        VIXL_ASSERT(can_use_it_);
243        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
244                    k16BitT32InstructionSizeInBytes);
245      }
246    }
247
248   private:
249    MacroAssembler* masm_;
250    Condition cond_;
251    Label label_;
252    bool can_use_it_;
253    uint32_t initial_cursor_offset_;
254  };
255
256  template <Assembler::InstructionCondDtDL asmfn>
257  class EmitLiteralCondDtDL {
258   public:
259    EmitLiteralCondDtDL(DataType dt, DRegister rt) : dt_(dt), rt_(rt) {}
260    void emit(MacroAssembler* const masm,
261              Condition cond,
262              RawLiteral* const literal) {
263      (masm->*asmfn)(cond, dt_, rt_, literal);
264    }
265
266   private:
267    DataType dt_;
268    DRegister rt_;
269  };
270
271  template <Assembler::InstructionCondDtSL asmfn>
272  class EmitLiteralCondDtSL {
273   public:
274    EmitLiteralCondDtSL(DataType dt, SRegister rt) : dt_(dt), rt_(rt) {}
275    void emit(MacroAssembler* const masm,
276              Condition cond,
277              RawLiteral* const literal) {
278      (masm->*asmfn)(cond, dt_, rt_, literal);
279    }
280
281   private:
282    DataType dt_;
283    SRegister rt_;
284  };
285
286  template <Assembler::InstructionCondRL asmfn>
287  class EmitLiteralCondRL {
288   public:
289    explicit EmitLiteralCondRL(Register rt) : rt_(rt) {}
290    void emit(MacroAssembler* const masm,
291              Condition cond,
292              RawLiteral* const literal) {
293      (masm->*asmfn)(cond, rt_, literal);
294    }
295
296   private:
297    Register rt_;
298  };
299
300  template <Assembler::InstructionCondRRL asmfn>
301  class EmitLiteralCondRRL {
302   public:
303    EmitLiteralCondRRL(Register rt, Register rt2) : rt_(rt), rt2_(rt2) {}
304    void emit(MacroAssembler* const masm,
305              Condition cond,
306              RawLiteral* const literal) {
307      (masm->*asmfn)(cond, rt_, rt2_, literal);
308    }
309
310   private:
311    Register rt_, rt2_;
312  };
313
314  class LiteralPoolManager {
315   public:
316    explicit LiteralPoolManager(MacroAssembler* const masm)
317        : masm_(masm), monitor_(0) {
318      ResetCheckpoint();
319    }
320
321    void ResetCheckpoint() { checkpoint_ = Label::kMaxOffset; }
322
323    LiteralPool* GetLiteralPool() { return &literal_pool_; }
324    Label::Offset GetCheckpoint() const {
325      // Make room for a branch over the pools.
326      return checkpoint_ - kMaxInstructionSizeInBytes;
327    }
328    size_t GetLiteralPoolSize() const { return literal_pool_.GetSize(); }
329
330    // Checks if the insertion of the literal will put the forward reference
331    // too far in the literal pool.
332    // This function is called after generating an instruction with a literal.
333    // We want to know if the literal can be reached by the instruction.
334    // If not, we will unwind the instruction, generate the pool (without the
335    // last literal) and generate the instruction again.
336    // "literal" is the literal we want to insert into the pool.
337    // "from" is the location where the instruction which uses the literal has
338    // been generated.
339    bool WasInsertedTooFar(RawLiteral* literal) const {
340      // Last accessible location for the instruction we just generated, which
341      // uses the literal.
342      Label::ForwardReference& reference = literal->GetBackForwardRef();
343      Label::Offset new_checkpoint = AlignDown(reference.GetCheckpoint(), 4);
344
345      // TODO: We should not need to get the min of new_checkpoint and the
346      // existing checkpoint. The existing checkpoint should already have
347      // been checked when reserving space for this load literal instruction.
348      // The assertion below asserts that we don't need the min operation here.
349      Label::Offset checkpoint =
350          std::min(new_checkpoint, literal->GetAlignedCheckpoint(4));
351      bool literal_in_pool =
352          (literal->GetPositionInPool() != Label::kMaxOffset);
353      Label::Offset position_in_pool = literal_in_pool
354                                           ? literal->GetPositionInPool()
355                                           : literal_pool_.GetSize();
356      // Compare the checkpoint to the location where the literal should be
357      // added.
358      // We add space for two instructions: one branch and one potential veneer
359      // which may be added after the check. In this particular use case, no
360      // veneer can be added but, this way, we are consistent with all the
361      // literal pool checks.
362      int32_t from =
363          reference.GetLocation() + masm_->GetArchitectureStatePCOffset();
364      bool too_far =
365          checkpoint < from + position_in_pool +
366                           2 * static_cast<int32_t>(kMaxInstructionSizeInBytes);
367      // Assert if the literal is already in the pool and the existing
368      // checkpoint triggers a rewind here, as this means the pool should
369      // already have been emitted (perhaps we have not reserved enough space
370      // for the instruction we are about to rewind).
371      VIXL_ASSERT(!(too_far && (literal->GetCheckpoint() < new_checkpoint)));
372      return too_far;
373    }
374
375    // Set the different checkpoints where the literal pool has to be emited.
376    void UpdateCheckpoint(RawLiteral* literal) {
377      // The literal should have been placed somewhere in the literal pool
378      VIXL_ASSERT(literal->GetPositionInPool() != Label::kMaxOffset);
379      // TODO(all): Consider AddForwardRef as a  virtual so the checkpoint is
380      //   updated when inserted. Or move checkpoint_ into Label,
381      literal->UpdateCheckpoint();
382      Label::Offset tmp =
383          literal->GetAlignedCheckpoint(4) - literal->GetPositionInPool();
384      if (checkpoint_ > tmp) {
385        checkpoint_ = tmp;
386        masm_->ComputeCheckpoint();
387      }
388    }
389
390    bool IsEmpty() const { return GetLiteralPoolSize() == 0; }
391
392    void Block() { monitor_++; }
393    void Release() {
394      VIXL_ASSERT(IsBlocked());
395      if (--monitor_ == 0) {
396        // Ensure the pool has not been blocked for too long.
397        VIXL_ASSERT(masm_->GetCursorOffset() <= checkpoint_);
398      }
399    }
400    bool IsBlocked() const { return monitor_ != 0; }
401
402   private:
403    MacroAssembler* const masm_;
404    LiteralPool literal_pool_;
405
406    // Max offset in the code buffer where the literal needs to be
407    // emitted. A default value of Label::kMaxOffset means that the checkpoint
408    // is invalid.
409    Label::Offset checkpoint_;
410    // Indicates whether the emission of this pool is blocked.
411    int monitor_;
412  };
413
414  void PerformEnsureEmit(Label::Offset target, uint32_t extra_size);
415
416 protected:
417  void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm);
418  void PadToMinimumBranchRange(Label* label);
419
420  // Generate the instruction and if it's not possible revert the whole thing.
421  // emit the literal pool and regenerate the instruction.
422  // Note: The instruction is generated via
423  // void T::emit(MacroAssembler* const, RawLiteral* const)
424  template <typename T>
425  void GenerateInstruction(Condition cond,
426                           T instr_callback,
427                           RawLiteral* const literal) {
428    int32_t cursor = GetCursorOffset();
429    // Emit the instruction, via the assembler
430    {
431      MacroEmissionCheckScope guard(this);
432      // The ITScope can change the condition and we want to be able to revert
433      // this.
434      Condition c(cond);
435      ITScope it_scope(this, &c);
436      instr_callback.emit(this, c, literal);
437    }
438    if (!literal->IsManuallyPlaced() && !literal->IsBound()) {
439      if (WasInsertedTooFar(literal)) {
440        // The instruction's data is too far: revert the emission
441        GetBuffer()->Rewind(cursor);
442        literal->InvalidateLastForwardReference(RawLiteral::kNoUpdateNecessary);
443        EmitLiteralPool(kBranchRequired);
444        MacroEmissionCheckScope guard(this);
445        ITScope it_scope(this, &cond);
446        instr_callback.emit(this, cond, literal);
447      }
448      // The literal pool above might have included the literal - in which
449      // case it will now be bound.
450      if (!literal->IsBound()) {
451        literal_pool_manager_.GetLiteralPool()->AddLiteral(literal);
452        literal_pool_manager_.UpdateCheckpoint(literal);
453      }
454    }
455  }
456
457 public:
458  explicit MacroAssembler(InstructionSet isa = A32)
459      : Assembler(isa),
460        available_(r12),
461        current_scratch_scope_(NULL),
462        checkpoint_(Label::kMaxOffset),
463        literal_pool_manager_(this),
464        veneer_pool_manager_(this),
465        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
466        doing_veneer_pool_generation_(false) {
467#ifdef VIXL_DEBUG
468    SetAllowMacroInstructions(true);
469#else
470    USE(literal_pool_manager_);
471    USE(allow_macro_instructions_);
472#endif
473    ComputeCheckpoint();
474  }
475  explicit MacroAssembler(size_t size, InstructionSet isa = A32)
476      : Assembler(size, isa),
477        available_(r12),
478        current_scratch_scope_(NULL),
479        checkpoint_(Label::kMaxOffset),
480        literal_pool_manager_(this),
481        veneer_pool_manager_(this),
482        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
483        doing_veneer_pool_generation_(false) {
484#ifdef VIXL_DEBUG
485    SetAllowMacroInstructions(true);
486#endif
487    ComputeCheckpoint();
488  }
489  MacroAssembler(byte* buffer, size_t size, InstructionSet isa = A32)
490      : Assembler(buffer, size, isa),
491        available_(r12),
492        current_scratch_scope_(NULL),
493        checkpoint_(Label::kMaxOffset),
494        literal_pool_manager_(this),
495        veneer_pool_manager_(this),
496        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
497        doing_veneer_pool_generation_(false) {
498#ifdef VIXL_DEBUG
499    SetAllowMacroInstructions(true);
500#endif
501    ComputeCheckpoint();
502  }
503
504  bool GenerateSimulatorCode() const { return generate_simulator_code_; }
505
506  // Tell whether any of the macro instruction can be used. When false the
507  // MacroAssembler will assert if a method which can emit a variable number
508  // of instructions is called.
509  virtual void SetAllowMacroInstructions(bool value) VIXL_OVERRIDE {
510    allow_macro_instructions_ = value;
511  }
512  virtual bool AllowMacroInstructions() const VIXL_OVERRIDE {
513    return allow_macro_instructions_;
514  }
515
516  void FinalizeCode() {
517    EmitLiteralPool(kNoBranchRequired);
518    Assembler::FinalizeCode();
519  }
520
521  RegisterList* GetScratchRegisterList() { return &available_; }
522  VRegisterList* GetScratchVRegisterList() { return &available_vfp_; }
523
524  // Get or set the current (most-deeply-nested) UseScratchRegisterScope.
525  void SetCurrentScratchRegisterScope(UseScratchRegisterScope* scope) {
526    current_scratch_scope_ = scope;
527  }
528  UseScratchRegisterScope* GetCurrentScratchRegisterScope() {
529    return current_scratch_scope_;
530  }
531
532  // Given an address calculation (Register + immediate), generate code to
533  // partially compute the address. The returned MemOperand will perform any
534  // remaining computation in a subsequent load or store instruction.
535  //
536  // The offset provided should be the offset that would be used in a load or
537  // store instruction (if it had sufficient range). This only matters where
538  // base.Is(pc), since load and store instructions align the pc before
539  // dereferencing it.
540  //
541  // TODO: Improve the handling of negative offsets. They are not implemented
542  // precisely for now because they only have a marginal benefit for the
543  // existing uses (in delegates).
544  MemOperand MemOperandComputationHelper(Condition cond,
545                                         Register scratch,
546                                         Register base,
547                                         uint32_t offset,
548                                         uint32_t extra_offset_mask = 0);
549
550  MemOperand MemOperandComputationHelper(Register scratch,
551                                         Register base,
552                                         uint32_t offset,
553                                         uint32_t extra_offset_mask = 0) {
554    return MemOperandComputationHelper(al,
555                                       scratch,
556                                       base,
557                                       offset,
558                                       extra_offset_mask);
559  }
560  MemOperand MemOperandComputationHelper(Condition cond,
561                                         Register scratch,
562                                         Label* label,
563                                         uint32_t extra_offset_mask = 0) {
564    // Check for buffer space _before_ calculating the offset, in case we
565    // generate a pool that affects the offset calculation.
566    CodeBufferCheckScope scope(this, 4 * kMaxInstructionSizeInBytes);
567    Label::Offset offset =
568        label->GetLocation() -
569        AlignDown(GetCursorOffset() + GetArchitectureStatePCOffset(), 4);
570    return MemOperandComputationHelper(cond,
571                                       scratch,
572                                       pc,
573                                       offset,
574                                       extra_offset_mask);
575  }
576  MemOperand MemOperandComputationHelper(Register scratch,
577                                         Label* label,
578                                         uint32_t extra_offset_mask = 0) {
579    return MemOperandComputationHelper(al, scratch, label, extra_offset_mask);
580  }
581
582  // Determine the appropriate mask to pass into MemOperandComputationHelper.
583  uint32_t GetOffsetMask(InstructionType type, AddrMode addrmode);
584
585  // State and type helpers.
586  bool IsModifiedImmediate(uint32_t imm) {
587    return IsUsingT32() ? ImmediateT32::IsImmediateT32(imm)
588                        : ImmediateA32::IsImmediateA32(imm);
589  }
590
591  void Bind(Label* label) {
592    VIXL_ASSERT(allow_macro_instructions_);
593    PadToMinimumBranchRange(label);
594    BindHelper(label);
595  }
596
597  void AddBranchLabel(Label* label) {
598    if (label->IsBound()) return;
599    veneer_pool_manager_.AddLabel(label);
600  }
601
602  void Place(RawLiteral* literal) {
603    VIXL_ASSERT(allow_macro_instructions_);
604    VIXL_ASSERT(literal->IsManuallyPlaced());
605    // We have two calls to `GetBuffer()->Align()` below, that aligns on word
606    // (4 bytes) boundaries. Only one is taken into account in
607    // `GetAlignedSize()`.
608    static const size_t kMaxAlignSize = 3;
609    size_t size = literal->GetAlignedSize() + kMaxAlignSize;
610    VIXL_ASSERT(IsUint32(size));
611    // TODO: We should use a scope here to check the size of data emitted.  We
612    // currently cannot because `aarch32::CodeBufferCheckScope` currently checks
613    // for pools, so that could lead to an infinite loop.
614    EnsureEmitFor(static_cast<uint32_t>(size));
615    // Literals must be emitted aligned on word (4 bytes) boundaries.
616    GetBuffer()->Align();
617    PlaceHelper(literal);
618    GetBuffer()->Align();
619  }
620
621  void ComputeCheckpoint();
622
623  int32_t GetMarginBeforeVeneerEmission() const {
624    return veneer_pool_manager_.GetCheckpoint() - GetCursorOffset();
625  }
626
627  Label::Offset GetTargetForLiteralEmission() const {
628    if (literal_pool_manager_.IsEmpty()) return Label::kMaxOffset;
629    // We add an instruction to the size as the instruction which calls this
630    // function may add a veneer and, without this extra instruction, could put
631    // the literals out of range. For example, it's the case for a "B"
632    // instruction. At the beginning of the instruction we call EnsureEmitFor
633    // which calls this function. However, the target of the branch hasn't been
634    // inserted yet in the veneer pool.
635    size_t veneer_max_size =
636        veneer_pool_manager_.GetMaxSize() + kMaxInstructionSizeInBytes;
637    VIXL_ASSERT(IsInt32(veneer_max_size));
638    // We must be able to generate the veneer pool first.
639    Label::Offset tmp = literal_pool_manager_.GetCheckpoint() -
640                        static_cast<Label::Offset>(veneer_max_size);
641    VIXL_ASSERT(tmp >= 0);
642    return tmp;
643  }
644
645  int32_t GetMarginBeforeLiteralEmission() const {
646    Label::Offset tmp = GetTargetForLiteralEmission();
647    VIXL_ASSERT(tmp >= GetCursorOffset());
648    return tmp - GetCursorOffset();
649  }
650
651  bool VeneerPoolIsEmpty() const { return veneer_pool_manager_.IsEmpty(); }
652  bool LiteralPoolIsEmpty() const { return literal_pool_manager_.IsEmpty(); }
653
654  void EnsureEmitFor(uint32_t size) {
655    Label::Offset target = GetCursorOffset() + size;
656    if (target <= checkpoint_) return;
657    PerformEnsureEmit(target, size);
658  }
659
660  bool WasInsertedTooFar(RawLiteral* literal) {
661    return literal_pool_manager_.WasInsertedTooFar(literal);
662  }
663
664  bool AliasesAvailableScratchRegister(Register reg) {
665    return GetScratchRegisterList()->Includes(reg);
666  }
667
668  bool AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg) {
669    if (reg.IsAPSR_nzcv()) return false;
670    return GetScratchRegisterList()->Includes(reg.AsRegister());
671  }
672
673  bool AliasesAvailableScratchRegister(VRegister reg) {
674    return GetScratchVRegisterList()->IncludesAliasOf(reg);
675  }
676
677  bool AliasesAvailableScratchRegister(const Operand& operand) {
678    if (operand.IsImmediate()) return false;
679    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
680           (operand.IsRegisterShiftedRegister() &&
681            AliasesAvailableScratchRegister(operand.GetShiftRegister()));
682  }
683
684  bool AliasesAvailableScratchRegister(const NeonOperand& operand) {
685    if (operand.IsImmediate()) return false;
686    return AliasesAvailableScratchRegister(operand.GetRegister());
687  }
688
689  bool AliasesAvailableScratchRegister(SRegisterList list) {
690    for (int n = 0; n < list.GetLength(); n++) {
691      if (AliasesAvailableScratchRegister(list.GetSRegister(n))) return true;
692    }
693    return false;
694  }
695
696  bool AliasesAvailableScratchRegister(DRegisterList list) {
697    for (int n = 0; n < list.GetLength(); n++) {
698      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
699    }
700    return false;
701  }
702
703  bool AliasesAvailableScratchRegister(NeonRegisterList list) {
704    for (int n = 0; n < list.GetLength(); n++) {
705      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
706    }
707    return false;
708  }
709
710  bool AliasesAvailableScratchRegister(RegisterList list) {
711    return GetScratchRegisterList()->Overlaps(list);
712  }
713
714  bool AliasesAvailableScratchRegister(const MemOperand& operand) {
715    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
716           (operand.IsShiftedRegister() &&
717            AliasesAvailableScratchRegister(operand.GetOffsetRegister()));
718  }
719
720  // Emit the literal pool in the code buffer.
721  // Every literal is placed on a 32bit boundary
722  // All the literals in the pool will be removed from the pool and potentially
723  // delete'd.
724  void EmitLiteralPool(LiteralPool* const literal_pool, EmitOption option);
725  void EmitLiteralPool(EmitOption option = kBranchRequired) {
726    VIXL_ASSERT(!literal_pool_manager_.IsBlocked());
727    EmitLiteralPool(literal_pool_manager_.GetLiteralPool(), option);
728    literal_pool_manager_.ResetCheckpoint();
729    ComputeCheckpoint();
730  }
731
732  size_t GetLiteralPoolSize() const {
733    return literal_pool_manager_.GetLiteralPoolSize();
734  }
735
736  // Adr with a literal already constructed. Add the literal to the pool if it
737  // is not already done.
738  void Adr(Condition cond, Register rd, RawLiteral* literal) {
739    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
740    VIXL_ASSERT(allow_macro_instructions_);
741    VIXL_ASSERT(OutsideITBlock());
742    EmitLiteralCondRL<&Assembler::adr> emit_helper(rd);
743    GenerateInstruction(cond, emit_helper, literal);
744  }
745  void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); }
746
747  // Loads with literals already constructed. Add the literal to the pool
748  // if it is not already done.
749  void Ldr(Condition cond, Register rt, RawLiteral* literal) {
750    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
751    VIXL_ASSERT(allow_macro_instructions_);
752    VIXL_ASSERT(OutsideITBlock());
753    EmitLiteralCondRL<&Assembler::ldr> emit_helper(rt);
754    GenerateInstruction(cond, emit_helper, literal);
755  }
756  void Ldr(Register rt, RawLiteral* literal) { Ldr(al, rt, literal); }
757
758  void Ldrb(Condition cond, Register rt, RawLiteral* literal) {
759    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
760    VIXL_ASSERT(allow_macro_instructions_);
761    VIXL_ASSERT(OutsideITBlock());
762    EmitLiteralCondRL<&Assembler::ldrb> emit_helper(rt);
763    GenerateInstruction(cond, emit_helper, literal);
764  }
765  void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); }
766
767  void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) {
768    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
769    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
770    VIXL_ASSERT(allow_macro_instructions_);
771    VIXL_ASSERT(OutsideITBlock());
772    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(rt, rt2);
773    GenerateInstruction(cond, emit_helper, literal);
774  }
775  void Ldrd(Register rt, Register rt2, RawLiteral* literal) {
776    Ldrd(al, rt, rt2, literal);
777  }
778
779  void Ldrh(Condition cond, Register rt, RawLiteral* literal) {
780    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
781    VIXL_ASSERT(allow_macro_instructions_);
782    VIXL_ASSERT(OutsideITBlock());
783    EmitLiteralCondRL<&Assembler::ldrh> emit_helper(rt);
784    GenerateInstruction(cond, emit_helper, literal);
785  }
786  void Ldrh(Register rt, RawLiteral* literal) { Ldrh(al, rt, literal); }
787
788  void Ldrsb(Condition cond, Register rt, RawLiteral* literal) {
789    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
790    VIXL_ASSERT(allow_macro_instructions_);
791    VIXL_ASSERT(OutsideITBlock());
792    EmitLiteralCondRL<&Assembler::ldrsb> emit_helper(rt);
793    GenerateInstruction(cond, emit_helper, literal);
794  }
795  void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); }
796
797  void Ldrsh(Condition cond, Register rt, RawLiteral* literal) {
798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
799    VIXL_ASSERT(allow_macro_instructions_);
800    VIXL_ASSERT(OutsideITBlock());
801    EmitLiteralCondRL<&Assembler::ldrsh> emit_helper(rt);
802    GenerateInstruction(cond, emit_helper, literal);
803  }
804  void Ldrsh(Register rt, RawLiteral* literal) { Ldrsh(al, rt, literal); }
805
806  void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) {
807    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
808    VIXL_ASSERT(allow_macro_instructions_);
809    VIXL_ASSERT(OutsideITBlock());
810    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(dt, rd);
811    GenerateInstruction(cond, emit_helper, literal);
812  }
813  void Vldr(DataType dt, DRegister rd, RawLiteral* literal) {
814    Vldr(al, dt, rd, literal);
815  }
816  void Vldr(Condition cond, DRegister rd, RawLiteral* literal) {
817    Vldr(cond, Untyped64, rd, literal);
818  }
819  void Vldr(DRegister rd, RawLiteral* literal) {
820    Vldr(al, Untyped64, rd, literal);
821  }
822
823  void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) {
824    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
825    VIXL_ASSERT(allow_macro_instructions_);
826    VIXL_ASSERT(OutsideITBlock());
827    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(dt, rd);
828    GenerateInstruction(cond, emit_helper, literal);
829  }
830  void Vldr(DataType dt, SRegister rd, RawLiteral* literal) {
831    Vldr(al, dt, rd, literal);
832  }
833  void Vldr(Condition cond, SRegister rd, RawLiteral* literal) {
834    Vldr(cond, Untyped32, rd, literal);
835  }
836  void Vldr(SRegister rd, RawLiteral* literal) {
837    Vldr(al, Untyped32, rd, literal);
838  }
839
840  // Generic Ldr(register, data)
841  void Ldr(Condition cond, Register rt, uint32_t v) {
842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
843    VIXL_ASSERT(allow_macro_instructions_);
844    VIXL_ASSERT(OutsideITBlock());
845    RawLiteral* literal =
846        new Literal<uint32_t>(v, RawLiteral::kDeletedOnPlacementByPool);
847    EmitLiteralCondRL<&Assembler::ldr> emit_helper(rt);
848    GenerateInstruction(cond, emit_helper, literal);
849  }
850  template <typename T>
851  void Ldr(Register rt, T v) {
852    Ldr(al, rt, v);
853  }
854
855  // Generic Ldrd(rt, rt2, data)
856  void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) {
857    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
859    VIXL_ASSERT(allow_macro_instructions_);
860    VIXL_ASSERT(OutsideITBlock());
861    RawLiteral* literal =
862        new Literal<uint64_t>(v, RawLiteral::kDeletedOnPlacementByPool);
863    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(rt, rt2);
864    GenerateInstruction(cond, emit_helper, literal);
865  }
866  template <typename T>
867  void Ldrd(Register rt, Register rt2, T v) {
868    Ldrd(al, rt, rt2, v);
869  }
870
871  void Vldr(Condition cond, SRegister rd, float v) {
872    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
873    VIXL_ASSERT(allow_macro_instructions_);
874    VIXL_ASSERT(OutsideITBlock());
875    RawLiteral* literal =
876        new Literal<float>(v, RawLiteral::kDeletedOnPlacementByPool);
877    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(Untyped32, rd);
878    GenerateInstruction(cond, emit_helper, literal);
879  }
880  void Vldr(SRegister rd, float v) { Vldr(al, rd, v); }
881
882  void Vldr(Condition cond, DRegister rd, double v) {
883    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
884    VIXL_ASSERT(allow_macro_instructions_);
885    VIXL_ASSERT(OutsideITBlock());
886    RawLiteral* literal =
887        new Literal<double>(v, RawLiteral::kDeletedOnPlacementByPool);
888    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(Untyped64, rd);
889    GenerateInstruction(cond, emit_helper, literal);
890  }
891  void Vldr(DRegister rd, double v) { Vldr(al, rd, v); }
892
893  void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); }
894  void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); }
895  void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); }
896  void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); }
897
898  void Switch(Register reg, JumpTableBase* table);
899  void GenerateSwitchTable(JumpTableBase* table, int table_size);
900  void Case(JumpTableBase* table, int case_index);
901  void Break(JumpTableBase* table);
902  void Default(JumpTableBase* table);
903  void EndSwitch(JumpTableBase* table);
904
905  // Claim memory on the stack.
906  // Note that the Claim, Drop, and Peek helpers below ensure that offsets used
907  // are multiples of 32 bits to help maintain 32-bit SP alignment.
908  // We could `Align{Up,Down}(size, 4)`, but that's potentially problematic:
909  //     Claim(3)
910  //     Claim(1)
911  //     Drop(4)
912  // would seem correct, when in fact:
913  //    Claim(3) -> sp = sp - 4
914  //    Claim(1) -> sp = sp - 4
915  //    Drop(4)  -> sp = sp + 4
916  //
917  void Claim(int32_t size) {
918    if (size == 0) return;
919    // The stack must be kept 32bit aligned.
920    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
921    Sub(sp, sp, size);
922  }
923  // Release memory on the stack
924  void Drop(int32_t size) {
925    if (size == 0) return;
926    // The stack must be kept 32bit aligned.
927    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
928    Add(sp, sp, size);
929  }
930  void Peek(Register dst, int32_t offset) {
931    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
932    Ldr(dst, MemOperand(sp, offset));
933  }
934  void Poke(Register src, int32_t offset) {
935    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
936    Str(src, MemOperand(sp, offset));
937  }
938  void Printf(const char* format,
939              CPURegister reg1 = NoReg,
940              CPURegister reg2 = NoReg,
941              CPURegister reg3 = NoReg,
942              CPURegister reg4 = NoReg);
943  // Functions used by Printf for generation.
944  void PushRegister(CPURegister reg);
945  void PreparePrintfArgument(CPURegister reg,
946                             int* core_count,
947                             int* vfp_count,
948                             uint32_t* printf_type);
949  // Handlers for cases not handled by the assembler.
950  // ADD, MOVT, MOVW, SUB, SXTB16, TEQ, UXTB16
951  virtual void Delegate(InstructionType type,
952                        InstructionCondROp instruction,
953                        Condition cond,
954                        Register rn,
955                        const Operand& operand) VIXL_OVERRIDE;
956  // CMN, CMP, MOV, MOVS, MVN, MVNS, SXTB, SXTH, TST, UXTB, UXTH
957  virtual void Delegate(InstructionType type,
958                        InstructionCondSizeROp instruction,
959                        Condition cond,
960                        EncodingSize size,
961                        Register rn,
962                        const Operand& operand) VIXL_OVERRIDE;
963  // ADDW, ORN, ORNS, PKHBT, PKHTB, RSC, RSCS, SUBW, SXTAB, SXTAB16, SXTAH,
964  // UXTAB, UXTAB16, UXTAH
965  virtual void Delegate(InstructionType type,
966                        InstructionCondRROp instruction,
967                        Condition cond,
968                        Register rd,
969                        Register rn,
970                        const Operand& operand) VIXL_OVERRIDE;
971  // ADC, ADCS, ADD, ADDS, AND, ANDS, ASR, ASRS, BIC, BICS, EOR, EORS, LSL,
972  // LSLS, LSR, LSRS, ORR, ORRS, ROR, RORS, RSB, RSBS, SBC, SBCS, SUB, SUBS
973  virtual void Delegate(InstructionType type,
974                        InstructionCondSizeRL instruction,
975                        Condition cond,
976                        EncodingSize size,
977                        Register rd,
978                        Label* label) VIXL_OVERRIDE;
979  bool GenerateSplitInstruction(InstructionCondSizeRROp instruction,
980                                Condition cond,
981                                Register rd,
982                                Register rn,
983                                uint32_t imm,
984                                uint32_t mask);
985  virtual void Delegate(InstructionType type,
986                        InstructionCondSizeRROp instruction,
987                        Condition cond,
988                        EncodingSize size,
989                        Register rd,
990                        Register rn,
991                        const Operand& operand) VIXL_OVERRIDE;
992  // CBNZ, CBZ
993  virtual void Delegate(InstructionType type,
994                        InstructionRL instruction,
995                        Register rn,
996                        Label* label) VIXL_OVERRIDE;
997  // VMOV
998  virtual void Delegate(InstructionType type,
999                        InstructionCondDtSSop instruction,
1000                        Condition cond,
1001                        DataType dt,
1002                        SRegister rd,
1003                        const SOperand& operand) VIXL_OVERRIDE;
1004  // VMOV, VMVN
1005  virtual void Delegate(InstructionType type,
1006                        InstructionCondDtDDop instruction,
1007                        Condition cond,
1008                        DataType dt,
1009                        DRegister rd,
1010                        const DOperand& operand) VIXL_OVERRIDE;
1011  // VMOV, VMVN
1012  virtual void Delegate(InstructionType type,
1013                        InstructionCondDtQQop instruction,
1014                        Condition cond,
1015                        DataType dt,
1016                        QRegister rd,
1017                        const QOperand& operand) VIXL_OVERRIDE;
1018  // LDR, LDRB, LDRH, LDRSB, LDRSH, STR, STRB, STRH
1019  virtual void Delegate(InstructionType type,
1020                        InstructionCondSizeRMop instruction,
1021                        Condition cond,
1022                        EncodingSize size,
1023                        Register rd,
1024                        const MemOperand& operand) VIXL_OVERRIDE;
1025  // LDAEXD, LDRD, LDREXD, STLEX, STLEXB, STLEXH, STRD, STREX, STREXB, STREXH
1026  virtual void Delegate(InstructionType type,
1027                        InstructionCondRL instruction,
1028                        Condition cond,
1029                        Register rt,
1030                        Label* label) VIXL_OVERRIDE;
1031  virtual void Delegate(InstructionType type,
1032                        InstructionCondRRL instruction,
1033                        Condition cond,
1034                        Register rt,
1035                        Register rt2,
1036                        Label* label) VIXL_OVERRIDE;
1037  virtual void Delegate(InstructionType type,
1038                        InstructionCondRRMop instruction,
1039                        Condition cond,
1040                        Register rt,
1041                        Register rt2,
1042                        const MemOperand& operand) VIXL_OVERRIDE;
1043  // VLDR, VSTR
1044  virtual void Delegate(InstructionType type,
1045                        InstructionCondDtSMop instruction,
1046                        Condition cond,
1047                        DataType dt,
1048                        SRegister rd,
1049                        const MemOperand& operand) VIXL_OVERRIDE;
1050  // VLDR, VSTR
1051  virtual void Delegate(InstructionType type,
1052                        InstructionCondDtDMop instruction,
1053                        Condition cond,
1054                        DataType dt,
1055                        DRegister rd,
1056                        const MemOperand& operand) VIXL_OVERRIDE;
1057  // MSR
1058  virtual void Delegate(InstructionType type,
1059                        InstructionCondMsrOp instruction,
1060                        Condition cond,
1061                        MaskedSpecialRegister spec_reg,
1062                        const Operand& operand) VIXL_OVERRIDE;
1063  virtual void Delegate(InstructionType type,
1064                        InstructionCondDtDL instruction,
1065                        Condition cond,
1066                        DataType dt,
1067                        DRegister rd,
1068                        Label* label) VIXL_OVERRIDE;
1069  virtual void Delegate(InstructionType type,
1070                        InstructionCondDtSL instruction,
1071                        Condition cond,
1072                        DataType dt,
1073                        SRegister rd,
1074                        Label* label) VIXL_OVERRIDE;
1075
1076  // Start of generated code.
1077
1078  void Adc(Condition cond, Register rd, Register rn, const Operand& operand) {
1079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1081    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1082    VIXL_ASSERT(allow_macro_instructions_);
1083    VIXL_ASSERT(OutsideITBlock());
1084    MacroEmissionCheckScope guard(this);
1085    bool can_use_it =
1086        // ADC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1087        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
1088        operand.GetBaseRegister().IsLow();
1089    ITScope it_scope(this, &cond, can_use_it);
1090    adc(cond, rd, rn, operand);
1091  }
1092  void Adc(Register rd, Register rn, const Operand& operand) {
1093    Adc(al, rd, rn, operand);
1094  }
1095  void Adc(FlagsUpdate flags,
1096           Condition cond,
1097           Register rd,
1098           Register rn,
1099           const Operand& operand) {
1100    switch (flags) {
1101      case LeaveFlags:
1102        Adc(cond, rd, rn, operand);
1103        break;
1104      case SetFlags:
1105        Adcs(cond, rd, rn, operand);
1106        break;
1107      case DontCare:
1108        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1109                                   rn.Is(rd) && operand.IsPlainRegister() &&
1110                                   operand.GetBaseRegister().IsLow();
1111        if (setflags_is_smaller) {
1112          Adcs(cond, rd, rn, operand);
1113        } else {
1114          Adc(cond, rd, rn, operand);
1115        }
1116        break;
1117    }
1118  }
1119  void Adc(FlagsUpdate flags,
1120           Register rd,
1121           Register rn,
1122           const Operand& operand) {
1123    Adc(flags, al, rd, rn, operand);
1124  }
1125
1126  void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) {
1127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1129    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1130    VIXL_ASSERT(allow_macro_instructions_);
1131    VIXL_ASSERT(OutsideITBlock());
1132    MacroEmissionCheckScope guard(this);
1133    ITScope it_scope(this, &cond);
1134    adcs(cond, rd, rn, operand);
1135  }
1136  void Adcs(Register rd, Register rn, const Operand& operand) {
1137    Adcs(al, rd, rn, operand);
1138  }
1139
1140  void Add(Condition cond, Register rd, Register rn, const Operand& operand) {
1141    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1142    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1143    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1144    VIXL_ASSERT(allow_macro_instructions_);
1145    VIXL_ASSERT(OutsideITBlock());
1146    MacroEmissionCheckScope guard(this);
1147    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1148      uint32_t immediate = operand.GetImmediate();
1149      if (immediate == 0) {
1150        return;
1151      }
1152    }
1153    bool can_use_it =
1154        // ADD<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
1155        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
1156         rd.IsLow()) ||
1157        // ADD<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
1158        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1159         rd.IsLow() && rn.Is(rd)) ||
1160        // ADD{<c>}{<q>} <Rd>, SP, #<imm8> ; T1
1161        (operand.IsImmediate() && (operand.GetImmediate() <= 1020) &&
1162         ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) ||
1163        // ADD<c>{<q>} <Rd>, <Rn>, <Rm>
1164        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1165         operand.GetBaseRegister().IsLow()) ||
1166        // ADD<c>{<q>} <Rdn>, <Rm> ; T2
1167        (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) &&
1168         !operand.GetBaseRegister().IsSP() &&
1169         !operand.GetBaseRegister().IsPC()) ||
1170        // ADD{<c>}{<q>} {<Rdm>,} SP, <Rdm> ; T1
1171        (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() &&
1172         operand.GetBaseRegister().Is(rd));
1173    ITScope it_scope(this, &cond, can_use_it);
1174    add(cond, rd, rn, operand);
1175  }
1176  void Add(Register rd, Register rn, const Operand& operand) {
1177    Add(al, rd, rn, operand);
1178  }
1179  void Add(FlagsUpdate flags,
1180           Condition cond,
1181           Register rd,
1182           Register rn,
1183           const Operand& operand) {
1184    switch (flags) {
1185      case LeaveFlags:
1186        Add(cond, rd, rn, operand);
1187        break;
1188      case SetFlags:
1189        Adds(cond, rd, rn, operand);
1190        break;
1191      case DontCare:
1192        bool setflags_is_smaller =
1193            IsUsingT32() && cond.Is(al) &&
1194            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1195              !rd.Is(rn) && operand.GetBaseRegister().IsLow()) ||
1196             (operand.IsImmediate() &&
1197              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
1198               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
1199        if (setflags_is_smaller) {
1200          Adds(cond, rd, rn, operand);
1201        } else {
1202          bool changed_op_is_smaller =
1203              operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
1204              ((rd.IsLow() && rn.IsLow() &&
1205                (operand.GetSignedImmediate() >= -7)) ||
1206               (rd.IsLow() && rn.Is(rd) &&
1207                (operand.GetSignedImmediate() >= -255)));
1208          if (changed_op_is_smaller) {
1209            Subs(cond, rd, rn, -operand.GetSignedImmediate());
1210          } else {
1211            Add(cond, rd, rn, operand);
1212          }
1213        }
1214        break;
1215    }
1216  }
1217  void Add(FlagsUpdate flags,
1218           Register rd,
1219           Register rn,
1220           const Operand& operand) {
1221    Add(flags, al, rd, rn, operand);
1222  }
1223
1224  void Adds(Condition cond, Register rd, Register rn, const Operand& operand) {
1225    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1226    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1227    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1228    VIXL_ASSERT(allow_macro_instructions_);
1229    VIXL_ASSERT(OutsideITBlock());
1230    MacroEmissionCheckScope guard(this);
1231    ITScope it_scope(this, &cond);
1232    adds(cond, rd, rn, operand);
1233  }
1234  void Adds(Register rd, Register rn, const Operand& operand) {
1235    Adds(al, rd, rn, operand);
1236  }
1237
1238  void Adr(Condition cond, Register rd, Label* label) {
1239    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1240    VIXL_ASSERT(allow_macro_instructions_);
1241    VIXL_ASSERT(OutsideITBlock());
1242    MacroEmissionCheckScope guard(this);
1243    ITScope it_scope(this, &cond);
1244    adr(cond, rd, label);
1245  }
1246  void Adr(Register rd, Label* label) { Adr(al, rd, label); }
1247
1248  void And(Condition cond, Register rd, Register rn, const Operand& operand) {
1249    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1250    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1251    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1252    VIXL_ASSERT(allow_macro_instructions_);
1253    VIXL_ASSERT(OutsideITBlock());
1254    MacroEmissionCheckScope guard(this);
1255    if (rd.Is(rn) && operand.IsPlainRegister() &&
1256        rd.Is(operand.GetBaseRegister())) {
1257      return;
1258    }
1259    if (cond.Is(al) && operand.IsImmediate()) {
1260      uint32_t immediate = operand.GetImmediate();
1261      if (immediate == 0) {
1262        mov(rd, 0);
1263        return;
1264      }
1265      if ((immediate == 0xffffffff) && rd.Is(rn)) {
1266        return;
1267      }
1268    }
1269    bool can_use_it =
1270        // AND<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1271        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1272        operand.GetBaseRegister().IsLow();
1273    ITScope it_scope(this, &cond, can_use_it);
1274    and_(cond, rd, rn, operand);
1275  }
1276  void And(Register rd, Register rn, const Operand& operand) {
1277    And(al, rd, rn, operand);
1278  }
1279  void And(FlagsUpdate flags,
1280           Condition cond,
1281           Register rd,
1282           Register rn,
1283           const Operand& operand) {
1284    switch (flags) {
1285      case LeaveFlags:
1286        And(cond, rd, rn, operand);
1287        break;
1288      case SetFlags:
1289        Ands(cond, rd, rn, operand);
1290        break;
1291      case DontCare:
1292        if (operand.IsPlainRegister() && rd.Is(rn) &&
1293            rd.Is(operand.GetBaseRegister())) {
1294          return;
1295        }
1296        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1297                                   rn.Is(rd) && operand.IsPlainRegister() &&
1298                                   operand.GetBaseRegister().IsLow();
1299        if (setflags_is_smaller) {
1300          Ands(cond, rd, rn, operand);
1301        } else {
1302          And(cond, rd, rn, operand);
1303        }
1304        break;
1305    }
1306  }
1307  void And(FlagsUpdate flags,
1308           Register rd,
1309           Register rn,
1310           const Operand& operand) {
1311    And(flags, al, rd, rn, operand);
1312  }
1313
1314  void Ands(Condition cond, Register rd, Register rn, const Operand& operand) {
1315    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1316    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1317    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1318    VIXL_ASSERT(allow_macro_instructions_);
1319    VIXL_ASSERT(OutsideITBlock());
1320    MacroEmissionCheckScope guard(this);
1321    ITScope it_scope(this, &cond);
1322    ands(cond, rd, rn, operand);
1323  }
1324  void Ands(Register rd, Register rn, const Operand& operand) {
1325    Ands(al, rd, rn, operand);
1326  }
1327
1328  void Asr(Condition cond, Register rd, Register rm, const Operand& operand) {
1329    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1330    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1331    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1332    VIXL_ASSERT(allow_macro_instructions_);
1333    VIXL_ASSERT(OutsideITBlock());
1334    MacroEmissionCheckScope guard(this);
1335    bool can_use_it =
1336        // ASR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
1337        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1338         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
1339        // ASR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
1340        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
1341         operand.GetBaseRegister().IsLow());
1342    ITScope it_scope(this, &cond, can_use_it);
1343    asr(cond, rd, rm, operand);
1344  }
1345  void Asr(Register rd, Register rm, const Operand& operand) {
1346    Asr(al, rd, rm, operand);
1347  }
1348  void Asr(FlagsUpdate flags,
1349           Condition cond,
1350           Register rd,
1351           Register rm,
1352           const Operand& operand) {
1353    switch (flags) {
1354      case LeaveFlags:
1355        Asr(cond, rd, rm, operand);
1356        break;
1357      case SetFlags:
1358        Asrs(cond, rd, rm, operand);
1359        break;
1360      case DontCare:
1361        bool setflags_is_smaller =
1362            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
1363            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1364              (operand.GetImmediate() <= 32)) ||
1365             (operand.IsPlainRegister() && rd.Is(rm)));
1366        if (setflags_is_smaller) {
1367          Asrs(cond, rd, rm, operand);
1368        } else {
1369          Asr(cond, rd, rm, operand);
1370        }
1371        break;
1372    }
1373  }
1374  void Asr(FlagsUpdate flags,
1375           Register rd,
1376           Register rm,
1377           const Operand& operand) {
1378    Asr(flags, al, rd, rm, operand);
1379  }
1380
1381  void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) {
1382    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1384    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1385    VIXL_ASSERT(allow_macro_instructions_);
1386    VIXL_ASSERT(OutsideITBlock());
1387    MacroEmissionCheckScope guard(this);
1388    ITScope it_scope(this, &cond);
1389    asrs(cond, rd, rm, operand);
1390  }
1391  void Asrs(Register rd, Register rm, const Operand& operand) {
1392    Asrs(al, rd, rm, operand);
1393  }
1394
1395  void B(Condition cond, Label* label, BranchHint hint = kBranchWithoutHint) {
1396    VIXL_ASSERT(allow_macro_instructions_);
1397    VIXL_ASSERT(OutsideITBlock());
1398    MacroEmissionCheckScope guard(this);
1399    if (hint == kNear) {
1400      if (label->IsBound()) {
1401        b(cond, label);
1402      } else {
1403        b(cond, Narrow, label);
1404      }
1405    } else {
1406      b(cond, label);
1407    }
1408    AddBranchLabel(label);
1409  }
1410  void B(Label* label, BranchHint hint = kBranchWithoutHint) {
1411    B(al, label, hint);
1412  }
1413  void BPreferNear(Condition cond, Label* label) { B(cond, label, kNear); }
1414  void BPreferNear(Label* label) { B(al, label, kNear); }
1415
1416  void Bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand) {
1417    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1418    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1419    VIXL_ASSERT(allow_macro_instructions_);
1420    VIXL_ASSERT(OutsideITBlock());
1421    MacroEmissionCheckScope guard(this);
1422    ITScope it_scope(this, &cond);
1423    bfc(cond, rd, lsb, operand);
1424  }
1425  void Bfc(Register rd, uint32_t lsb, const Operand& operand) {
1426    Bfc(al, rd, lsb, operand);
1427  }
1428
1429  void Bfi(Condition cond,
1430           Register rd,
1431           Register rn,
1432           uint32_t lsb,
1433           const Operand& operand) {
1434    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1435    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1436    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1437    VIXL_ASSERT(allow_macro_instructions_);
1438    VIXL_ASSERT(OutsideITBlock());
1439    MacroEmissionCheckScope guard(this);
1440    ITScope it_scope(this, &cond);
1441    bfi(cond, rd, rn, lsb, operand);
1442  }
1443  void Bfi(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
1444    Bfi(al, rd, rn, lsb, operand);
1445  }
1446
1447  void Bic(Condition cond, Register rd, Register rn, const Operand& operand) {
1448    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1450    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1451    VIXL_ASSERT(allow_macro_instructions_);
1452    VIXL_ASSERT(OutsideITBlock());
1453    MacroEmissionCheckScope guard(this);
1454    if (cond.Is(al) && operand.IsImmediate()) {
1455      uint32_t immediate = operand.GetImmediate();
1456      if ((immediate == 0) && rd.Is(rn)) {
1457        return;
1458      }
1459      if (immediate == 0xffffffff) {
1460        mov(rd, 0);
1461        return;
1462      }
1463    }
1464    bool can_use_it =
1465        // BIC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1466        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1467        operand.GetBaseRegister().IsLow();
1468    ITScope it_scope(this, &cond, can_use_it);
1469    bic(cond, rd, rn, operand);
1470  }
1471  void Bic(Register rd, Register rn, const Operand& operand) {
1472    Bic(al, rd, rn, operand);
1473  }
1474  void Bic(FlagsUpdate flags,
1475           Condition cond,
1476           Register rd,
1477           Register rn,
1478           const Operand& operand) {
1479    switch (flags) {
1480      case LeaveFlags:
1481        Bic(cond, rd, rn, operand);
1482        break;
1483      case SetFlags:
1484        Bics(cond, rd, rn, operand);
1485        break;
1486      case DontCare:
1487        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1488                                   rn.Is(rd) && operand.IsPlainRegister() &&
1489                                   operand.GetBaseRegister().IsLow();
1490        if (setflags_is_smaller) {
1491          Bics(cond, rd, rn, operand);
1492        } else {
1493          Bic(cond, rd, rn, operand);
1494        }
1495        break;
1496    }
1497  }
1498  void Bic(FlagsUpdate flags,
1499           Register rd,
1500           Register rn,
1501           const Operand& operand) {
1502    Bic(flags, al, rd, rn, operand);
1503  }
1504
1505  void Bics(Condition cond, Register rd, Register rn, const Operand& operand) {
1506    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1508    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1509    VIXL_ASSERT(allow_macro_instructions_);
1510    VIXL_ASSERT(OutsideITBlock());
1511    MacroEmissionCheckScope guard(this);
1512    ITScope it_scope(this, &cond);
1513    bics(cond, rd, rn, operand);
1514  }
1515  void Bics(Register rd, Register rn, const Operand& operand) {
1516    Bics(al, rd, rn, operand);
1517  }
1518
1519  void Bkpt(Condition cond, uint32_t imm) {
1520    VIXL_ASSERT(allow_macro_instructions_);
1521    VIXL_ASSERT(OutsideITBlock());
1522    MacroEmissionCheckScope guard(this);
1523    ITScope it_scope(this, &cond);
1524    bkpt(cond, imm);
1525  }
1526  void Bkpt(uint32_t imm) { Bkpt(al, imm); }
1527
1528  void Bl(Condition cond, Label* label) {
1529    VIXL_ASSERT(allow_macro_instructions_);
1530    VIXL_ASSERT(OutsideITBlock());
1531    MacroEmissionCheckScope guard(this);
1532    ITScope it_scope(this, &cond);
1533    bl(cond, label);
1534    AddBranchLabel(label);
1535  }
1536  void Bl(Label* label) { Bl(al, label); }
1537
1538  void Blx(Condition cond, Label* label) {
1539    VIXL_ASSERT(allow_macro_instructions_);
1540    VIXL_ASSERT(OutsideITBlock());
1541    MacroEmissionCheckScope guard(this);
1542    ITScope it_scope(this, &cond);
1543    blx(cond, label);
1544    AddBranchLabel(label);
1545  }
1546  void Blx(Label* label) { Blx(al, label); }
1547
1548  void Blx(Condition cond, Register rm) {
1549    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1550    VIXL_ASSERT(allow_macro_instructions_);
1551    VIXL_ASSERT(OutsideITBlock());
1552    MacroEmissionCheckScope guard(this);
1553    bool can_use_it =
1554        // BLX{<c>}{<q>} <Rm> ; T1
1555        !rm.IsPC();
1556    ITScope it_scope(this, &cond, can_use_it);
1557    blx(cond, rm);
1558  }
1559  void Blx(Register rm) { Blx(al, rm); }
1560
1561  void Bx(Condition cond, Register rm) {
1562    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1563    VIXL_ASSERT(allow_macro_instructions_);
1564    VIXL_ASSERT(OutsideITBlock());
1565    MacroEmissionCheckScope guard(this);
1566    bool can_use_it =
1567        // BX{<c>}{<q>} <Rm> ; T1
1568        !rm.IsPC();
1569    ITScope it_scope(this, &cond, can_use_it);
1570    bx(cond, rm);
1571  }
1572  void Bx(Register rm) { Bx(al, rm); }
1573
1574  void Bxj(Condition cond, Register rm) {
1575    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1576    VIXL_ASSERT(allow_macro_instructions_);
1577    VIXL_ASSERT(OutsideITBlock());
1578    MacroEmissionCheckScope guard(this);
1579    ITScope it_scope(this, &cond);
1580    bxj(cond, rm);
1581  }
1582  void Bxj(Register rm) { Bxj(al, rm); }
1583
1584  void Cbnz(Register rn, Label* label) {
1585    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1586    VIXL_ASSERT(allow_macro_instructions_);
1587    VIXL_ASSERT(OutsideITBlock());
1588    MacroEmissionCheckScope guard(this);
1589    cbnz(rn, label);
1590    AddBranchLabel(label);
1591  }
1592
1593  void Cbz(Register rn, Label* label) {
1594    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1595    VIXL_ASSERT(allow_macro_instructions_);
1596    VIXL_ASSERT(OutsideITBlock());
1597    MacroEmissionCheckScope guard(this);
1598    cbz(rn, label);
1599    AddBranchLabel(label);
1600  }
1601
1602  void Clrex(Condition cond) {
1603    VIXL_ASSERT(allow_macro_instructions_);
1604    VIXL_ASSERT(OutsideITBlock());
1605    MacroEmissionCheckScope guard(this);
1606    ITScope it_scope(this, &cond);
1607    clrex(cond);
1608  }
1609  void Clrex() { Clrex(al); }
1610
1611  void Clz(Condition cond, Register rd, Register rm) {
1612    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1613    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1614    VIXL_ASSERT(allow_macro_instructions_);
1615    VIXL_ASSERT(OutsideITBlock());
1616    MacroEmissionCheckScope guard(this);
1617    ITScope it_scope(this, &cond);
1618    clz(cond, rd, rm);
1619  }
1620  void Clz(Register rd, Register rm) { Clz(al, rd, rm); }
1621
1622  void Cmn(Condition cond, Register rn, const Operand& operand) {
1623    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1624    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1625    VIXL_ASSERT(allow_macro_instructions_);
1626    VIXL_ASSERT(OutsideITBlock());
1627    MacroEmissionCheckScope guard(this);
1628    bool can_use_it =
1629        // CMN{<c>}{<q>} <Rn>, <Rm> ; T1
1630        operand.IsPlainRegister() && rn.IsLow() &&
1631        operand.GetBaseRegister().IsLow();
1632    ITScope it_scope(this, &cond, can_use_it);
1633    cmn(cond, rn, operand);
1634  }
1635  void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); }
1636
1637  void Cmp(Condition cond, Register rn, const Operand& operand) {
1638    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1639    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1640    VIXL_ASSERT(allow_macro_instructions_);
1641    VIXL_ASSERT(OutsideITBlock());
1642    MacroEmissionCheckScope guard(this);
1643    bool can_use_it =
1644        // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1
1645        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1646         rn.IsLow()) ||
1647        // CMP{<c>}{<q>} <Rn>, <Rm> ; T1 T2
1648        (operand.IsPlainRegister() && !rn.IsPC() &&
1649         !operand.GetBaseRegister().IsPC());
1650    ITScope it_scope(this, &cond, can_use_it);
1651    cmp(cond, rn, operand);
1652  }
1653  void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); }
1654
1655  void Crc32b(Condition cond, Register rd, Register rn, Register rm) {
1656    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1657    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1658    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1659    VIXL_ASSERT(allow_macro_instructions_);
1660    VIXL_ASSERT(OutsideITBlock());
1661    MacroEmissionCheckScope guard(this);
1662    ITScope it_scope(this, &cond);
1663    crc32b(cond, rd, rn, rm);
1664  }
1665  void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); }
1666
1667  void Crc32cb(Condition cond, Register rd, Register rn, Register rm) {
1668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1671    VIXL_ASSERT(allow_macro_instructions_);
1672    VIXL_ASSERT(OutsideITBlock());
1673    MacroEmissionCheckScope guard(this);
1674    ITScope it_scope(this, &cond);
1675    crc32cb(cond, rd, rn, rm);
1676  }
1677  void Crc32cb(Register rd, Register rn, Register rm) {
1678    Crc32cb(al, rd, rn, rm);
1679  }
1680
1681  void Crc32ch(Condition cond, Register rd, Register rn, Register rm) {
1682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1685    VIXL_ASSERT(allow_macro_instructions_);
1686    VIXL_ASSERT(OutsideITBlock());
1687    MacroEmissionCheckScope guard(this);
1688    ITScope it_scope(this, &cond);
1689    crc32ch(cond, rd, rn, rm);
1690  }
1691  void Crc32ch(Register rd, Register rn, Register rm) {
1692    Crc32ch(al, rd, rn, rm);
1693  }
1694
1695  void Crc32cw(Condition cond, Register rd, Register rn, Register rm) {
1696    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1699    VIXL_ASSERT(allow_macro_instructions_);
1700    VIXL_ASSERT(OutsideITBlock());
1701    MacroEmissionCheckScope guard(this);
1702    ITScope it_scope(this, &cond);
1703    crc32cw(cond, rd, rn, rm);
1704  }
1705  void Crc32cw(Register rd, Register rn, Register rm) {
1706    Crc32cw(al, rd, rn, rm);
1707  }
1708
1709  void Crc32h(Condition cond, Register rd, Register rn, Register rm) {
1710    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1711    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1712    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1713    VIXL_ASSERT(allow_macro_instructions_);
1714    VIXL_ASSERT(OutsideITBlock());
1715    MacroEmissionCheckScope guard(this);
1716    ITScope it_scope(this, &cond);
1717    crc32h(cond, rd, rn, rm);
1718  }
1719  void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); }
1720
1721  void Crc32w(Condition cond, Register rd, Register rn, Register rm) {
1722    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1723    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1725    VIXL_ASSERT(allow_macro_instructions_);
1726    VIXL_ASSERT(OutsideITBlock());
1727    MacroEmissionCheckScope guard(this);
1728    ITScope it_scope(this, &cond);
1729    crc32w(cond, rd, rn, rm);
1730  }
1731  void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); }
1732
1733  void Dmb(Condition cond, MemoryBarrier option) {
1734    VIXL_ASSERT(allow_macro_instructions_);
1735    VIXL_ASSERT(OutsideITBlock());
1736    MacroEmissionCheckScope guard(this);
1737    ITScope it_scope(this, &cond);
1738    dmb(cond, option);
1739  }
1740  void Dmb(MemoryBarrier option) { Dmb(al, option); }
1741
1742  void Dsb(Condition cond, MemoryBarrier option) {
1743    VIXL_ASSERT(allow_macro_instructions_);
1744    VIXL_ASSERT(OutsideITBlock());
1745    MacroEmissionCheckScope guard(this);
1746    ITScope it_scope(this, &cond);
1747    dsb(cond, option);
1748  }
1749  void Dsb(MemoryBarrier option) { Dsb(al, option); }
1750
1751  void Eor(Condition cond, Register rd, Register rn, const Operand& operand) {
1752    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1753    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1754    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1755    VIXL_ASSERT(allow_macro_instructions_);
1756    VIXL_ASSERT(OutsideITBlock());
1757    MacroEmissionCheckScope guard(this);
1758    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1759      uint32_t immediate = operand.GetImmediate();
1760      if (immediate == 0) {
1761        return;
1762      }
1763      if (immediate == 0xffffffff) {
1764        mvn(rd, rn);
1765        return;
1766      }
1767    }
1768    bool can_use_it =
1769        // EOR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1770        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1771        operand.GetBaseRegister().IsLow();
1772    ITScope it_scope(this, &cond, can_use_it);
1773    eor(cond, rd, rn, operand);
1774  }
1775  void Eor(Register rd, Register rn, const Operand& operand) {
1776    Eor(al, rd, rn, operand);
1777  }
1778  void Eor(FlagsUpdate flags,
1779           Condition cond,
1780           Register rd,
1781           Register rn,
1782           const Operand& operand) {
1783    switch (flags) {
1784      case LeaveFlags:
1785        Eor(cond, rd, rn, operand);
1786        break;
1787      case SetFlags:
1788        Eors(cond, rd, rn, operand);
1789        break;
1790      case DontCare:
1791        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1792                                   rn.Is(rd) && operand.IsPlainRegister() &&
1793                                   operand.GetBaseRegister().IsLow();
1794        if (setflags_is_smaller) {
1795          Eors(cond, rd, rn, operand);
1796        } else {
1797          Eor(cond, rd, rn, operand);
1798        }
1799        break;
1800    }
1801  }
1802  void Eor(FlagsUpdate flags,
1803           Register rd,
1804           Register rn,
1805           const Operand& operand) {
1806    Eor(flags, al, rd, rn, operand);
1807  }
1808
1809  void Eors(Condition cond, Register rd, Register rn, const Operand& operand) {
1810    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1811    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1812    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1813    VIXL_ASSERT(allow_macro_instructions_);
1814    VIXL_ASSERT(OutsideITBlock());
1815    MacroEmissionCheckScope guard(this);
1816    ITScope it_scope(this, &cond);
1817    eors(cond, rd, rn, operand);
1818  }
1819  void Eors(Register rd, Register rn, const Operand& operand) {
1820    Eors(al, rd, rn, operand);
1821  }
1822
1823  void Fldmdbx(Condition cond,
1824               Register rn,
1825               WriteBack write_back,
1826               DRegisterList dreglist) {
1827    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1828    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1829    VIXL_ASSERT(allow_macro_instructions_);
1830    VIXL_ASSERT(OutsideITBlock());
1831    MacroEmissionCheckScope guard(this);
1832    ITScope it_scope(this, &cond);
1833    fldmdbx(cond, rn, write_back, dreglist);
1834  }
1835  void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1836    Fldmdbx(al, rn, write_back, dreglist);
1837  }
1838
1839  void Fldmiax(Condition cond,
1840               Register rn,
1841               WriteBack write_back,
1842               DRegisterList dreglist) {
1843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1844    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1845    VIXL_ASSERT(allow_macro_instructions_);
1846    VIXL_ASSERT(OutsideITBlock());
1847    MacroEmissionCheckScope guard(this);
1848    ITScope it_scope(this, &cond);
1849    fldmiax(cond, rn, write_back, dreglist);
1850  }
1851  void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1852    Fldmiax(al, rn, write_back, dreglist);
1853  }
1854
1855  void Fstmdbx(Condition cond,
1856               Register rn,
1857               WriteBack write_back,
1858               DRegisterList dreglist) {
1859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1860    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1861    VIXL_ASSERT(allow_macro_instructions_);
1862    VIXL_ASSERT(OutsideITBlock());
1863    MacroEmissionCheckScope guard(this);
1864    ITScope it_scope(this, &cond);
1865    fstmdbx(cond, rn, write_back, dreglist);
1866  }
1867  void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1868    Fstmdbx(al, rn, write_back, dreglist);
1869  }
1870
1871  void Fstmiax(Condition cond,
1872               Register rn,
1873               WriteBack write_back,
1874               DRegisterList dreglist) {
1875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1876    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1877    VIXL_ASSERT(allow_macro_instructions_);
1878    VIXL_ASSERT(OutsideITBlock());
1879    MacroEmissionCheckScope guard(this);
1880    ITScope it_scope(this, &cond);
1881    fstmiax(cond, rn, write_back, dreglist);
1882  }
1883  void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1884    Fstmiax(al, rn, write_back, dreglist);
1885  }
1886
1887  void Hlt(Condition cond, uint32_t imm) {
1888    VIXL_ASSERT(allow_macro_instructions_);
1889    VIXL_ASSERT(OutsideITBlock());
1890    MacroEmissionCheckScope guard(this);
1891    ITScope it_scope(this, &cond);
1892    hlt(cond, imm);
1893  }
1894  void Hlt(uint32_t imm) { Hlt(al, imm); }
1895
1896  void Hvc(Condition cond, uint32_t imm) {
1897    VIXL_ASSERT(allow_macro_instructions_);
1898    VIXL_ASSERT(OutsideITBlock());
1899    MacroEmissionCheckScope guard(this);
1900    ITScope it_scope(this, &cond);
1901    hvc(cond, imm);
1902  }
1903  void Hvc(uint32_t imm) { Hvc(al, imm); }
1904
1905  void Isb(Condition cond, MemoryBarrier option) {
1906    VIXL_ASSERT(allow_macro_instructions_);
1907    VIXL_ASSERT(OutsideITBlock());
1908    MacroEmissionCheckScope guard(this);
1909    ITScope it_scope(this, &cond);
1910    isb(cond, option);
1911  }
1912  void Isb(MemoryBarrier option) { Isb(al, option); }
1913
1914  void Lda(Condition cond, Register rt, const MemOperand& operand) {
1915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1916    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1917    VIXL_ASSERT(allow_macro_instructions_);
1918    VIXL_ASSERT(OutsideITBlock());
1919    MacroEmissionCheckScope guard(this);
1920    ITScope it_scope(this, &cond);
1921    lda(cond, rt, operand);
1922  }
1923  void Lda(Register rt, const MemOperand& operand) { Lda(al, rt, operand); }
1924
1925  void Ldab(Condition cond, Register rt, const MemOperand& operand) {
1926    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1927    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1928    VIXL_ASSERT(allow_macro_instructions_);
1929    VIXL_ASSERT(OutsideITBlock());
1930    MacroEmissionCheckScope guard(this);
1931    ITScope it_scope(this, &cond);
1932    ldab(cond, rt, operand);
1933  }
1934  void Ldab(Register rt, const MemOperand& operand) { Ldab(al, rt, operand); }
1935
1936  void Ldaex(Condition cond, Register rt, const MemOperand& operand) {
1937    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1938    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1939    VIXL_ASSERT(allow_macro_instructions_);
1940    VIXL_ASSERT(OutsideITBlock());
1941    MacroEmissionCheckScope guard(this);
1942    ITScope it_scope(this, &cond);
1943    ldaex(cond, rt, operand);
1944  }
1945  void Ldaex(Register rt, const MemOperand& operand) { Ldaex(al, rt, operand); }
1946
1947  void Ldaexb(Condition cond, Register rt, const MemOperand& operand) {
1948    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1949    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1950    VIXL_ASSERT(allow_macro_instructions_);
1951    VIXL_ASSERT(OutsideITBlock());
1952    MacroEmissionCheckScope guard(this);
1953    ITScope it_scope(this, &cond);
1954    ldaexb(cond, rt, operand);
1955  }
1956  void Ldaexb(Register rt, const MemOperand& operand) {
1957    Ldaexb(al, rt, operand);
1958  }
1959
1960  void Ldaexd(Condition cond,
1961              Register rt,
1962              Register rt2,
1963              const MemOperand& operand) {
1964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1965    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
1966    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1967    VIXL_ASSERT(allow_macro_instructions_);
1968    VIXL_ASSERT(OutsideITBlock());
1969    MacroEmissionCheckScope guard(this);
1970    ITScope it_scope(this, &cond);
1971    ldaexd(cond, rt, rt2, operand);
1972  }
1973  void Ldaexd(Register rt, Register rt2, const MemOperand& operand) {
1974    Ldaexd(al, rt, rt2, operand);
1975  }
1976
1977  void Ldaexh(Condition cond, Register rt, const MemOperand& operand) {
1978    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1979    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1980    VIXL_ASSERT(allow_macro_instructions_);
1981    VIXL_ASSERT(OutsideITBlock());
1982    MacroEmissionCheckScope guard(this);
1983    ITScope it_scope(this, &cond);
1984    ldaexh(cond, rt, operand);
1985  }
1986  void Ldaexh(Register rt, const MemOperand& operand) {
1987    Ldaexh(al, rt, operand);
1988  }
1989
1990  void Ldah(Condition cond, Register rt, const MemOperand& operand) {
1991    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1992    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1993    VIXL_ASSERT(allow_macro_instructions_);
1994    VIXL_ASSERT(OutsideITBlock());
1995    MacroEmissionCheckScope guard(this);
1996    ITScope it_scope(this, &cond);
1997    ldah(cond, rt, operand);
1998  }
1999  void Ldah(Register rt, const MemOperand& operand) { Ldah(al, rt, operand); }
2000
2001  void Ldm(Condition cond,
2002           Register rn,
2003           WriteBack write_back,
2004           RegisterList registers) {
2005    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2006    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2007    VIXL_ASSERT(allow_macro_instructions_);
2008    VIXL_ASSERT(OutsideITBlock());
2009    MacroEmissionCheckScope guard(this);
2010    ITScope it_scope(this, &cond);
2011    ldm(cond, rn, write_back, registers);
2012  }
2013  void Ldm(Register rn, WriteBack write_back, RegisterList registers) {
2014    Ldm(al, rn, write_back, registers);
2015  }
2016
2017  void Ldmda(Condition cond,
2018             Register rn,
2019             WriteBack write_back,
2020             RegisterList registers) {
2021    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2022    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2023    VIXL_ASSERT(allow_macro_instructions_);
2024    VIXL_ASSERT(OutsideITBlock());
2025    MacroEmissionCheckScope guard(this);
2026    ITScope it_scope(this, &cond);
2027    ldmda(cond, rn, write_back, registers);
2028  }
2029  void Ldmda(Register rn, WriteBack write_back, RegisterList registers) {
2030    Ldmda(al, rn, write_back, registers);
2031  }
2032
2033  void Ldmdb(Condition cond,
2034             Register rn,
2035             WriteBack write_back,
2036             RegisterList registers) {
2037    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2038    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2039    VIXL_ASSERT(allow_macro_instructions_);
2040    VIXL_ASSERT(OutsideITBlock());
2041    MacroEmissionCheckScope guard(this);
2042    ITScope it_scope(this, &cond);
2043    ldmdb(cond, rn, write_back, registers);
2044  }
2045  void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) {
2046    Ldmdb(al, rn, write_back, registers);
2047  }
2048
2049  void Ldmea(Condition cond,
2050             Register rn,
2051             WriteBack write_back,
2052             RegisterList registers) {
2053    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2054    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2055    VIXL_ASSERT(allow_macro_instructions_);
2056    VIXL_ASSERT(OutsideITBlock());
2057    MacroEmissionCheckScope guard(this);
2058    ITScope it_scope(this, &cond);
2059    ldmea(cond, rn, write_back, registers);
2060  }
2061  void Ldmea(Register rn, WriteBack write_back, RegisterList registers) {
2062    Ldmea(al, rn, write_back, registers);
2063  }
2064
2065  void Ldmed(Condition cond,
2066             Register rn,
2067             WriteBack write_back,
2068             RegisterList registers) {
2069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2070    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2071    VIXL_ASSERT(allow_macro_instructions_);
2072    VIXL_ASSERT(OutsideITBlock());
2073    MacroEmissionCheckScope guard(this);
2074    ITScope it_scope(this, &cond);
2075    ldmed(cond, rn, write_back, registers);
2076  }
2077  void Ldmed(Register rn, WriteBack write_back, RegisterList registers) {
2078    Ldmed(al, rn, write_back, registers);
2079  }
2080
2081  void Ldmfa(Condition cond,
2082             Register rn,
2083             WriteBack write_back,
2084             RegisterList registers) {
2085    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2086    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2087    VIXL_ASSERT(allow_macro_instructions_);
2088    VIXL_ASSERT(OutsideITBlock());
2089    MacroEmissionCheckScope guard(this);
2090    ITScope it_scope(this, &cond);
2091    ldmfa(cond, rn, write_back, registers);
2092  }
2093  void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) {
2094    Ldmfa(al, rn, write_back, registers);
2095  }
2096
2097  void Ldmfd(Condition cond,
2098             Register rn,
2099             WriteBack write_back,
2100             RegisterList registers) {
2101    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2102    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2103    VIXL_ASSERT(allow_macro_instructions_);
2104    VIXL_ASSERT(OutsideITBlock());
2105    MacroEmissionCheckScope guard(this);
2106    ITScope it_scope(this, &cond);
2107    ldmfd(cond, rn, write_back, registers);
2108  }
2109  void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) {
2110    Ldmfd(al, rn, write_back, registers);
2111  }
2112
2113  void Ldmib(Condition cond,
2114             Register rn,
2115             WriteBack write_back,
2116             RegisterList registers) {
2117    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2118    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2119    VIXL_ASSERT(allow_macro_instructions_);
2120    VIXL_ASSERT(OutsideITBlock());
2121    MacroEmissionCheckScope guard(this);
2122    ITScope it_scope(this, &cond);
2123    ldmib(cond, rn, write_back, registers);
2124  }
2125  void Ldmib(Register rn, WriteBack write_back, RegisterList registers) {
2126    Ldmib(al, rn, write_back, registers);
2127  }
2128
2129  void Ldr(Condition cond, Register rt, const MemOperand& operand) {
2130    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2131    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2132    VIXL_ASSERT(allow_macro_instructions_);
2133    VIXL_ASSERT(OutsideITBlock());
2134    MacroEmissionCheckScope guard(this);
2135    bool can_use_it =
2136        // LDR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2137        (operand.IsImmediate() && rt.IsLow() &&
2138         operand.GetBaseRegister().IsLow() &&
2139         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
2140         (operand.GetAddrMode() == Offset)) ||
2141        // LDR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
2142        (operand.IsImmediate() && rt.IsLow() &&
2143         operand.GetBaseRegister().IsSP() &&
2144         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
2145         (operand.GetAddrMode() == Offset)) ||
2146        // LDR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2147        (operand.IsPlainRegister() && rt.IsLow() &&
2148         operand.GetBaseRegister().IsLow() &&
2149         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2150         (operand.GetAddrMode() == Offset));
2151    ITScope it_scope(this, &cond, can_use_it);
2152    ldr(cond, rt, operand);
2153  }
2154  void Ldr(Register rt, const MemOperand& operand) { Ldr(al, rt, operand); }
2155
2156  void Ldr(Condition cond, Register rt, Label* label) {
2157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2158    VIXL_ASSERT(allow_macro_instructions_);
2159    VIXL_ASSERT(OutsideITBlock());
2160    MacroEmissionCheckScope guard(this);
2161    ITScope it_scope(this, &cond);
2162    ldr(cond, rt, label);
2163  }
2164  void Ldr(Register rt, Label* label) { Ldr(al, rt, label); }
2165
2166  void Ldrb(Condition cond, Register rt, const MemOperand& operand) {
2167    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2168    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2169    VIXL_ASSERT(allow_macro_instructions_);
2170    VIXL_ASSERT(OutsideITBlock());
2171    MacroEmissionCheckScope guard(this);
2172    bool can_use_it =
2173        // LDRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2174        (operand.IsImmediate() && rt.IsLow() &&
2175         operand.GetBaseRegister().IsLow() &&
2176         operand.IsOffsetImmediateWithinRange(0, 31) &&
2177         (operand.GetAddrMode() == Offset)) ||
2178        // LDRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2179        (operand.IsPlainRegister() && rt.IsLow() &&
2180         operand.GetBaseRegister().IsLow() &&
2181         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2182         (operand.GetAddrMode() == Offset));
2183    ITScope it_scope(this, &cond, can_use_it);
2184    ldrb(cond, rt, operand);
2185  }
2186  void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); }
2187
2188  void Ldrb(Condition cond, Register rt, Label* label) {
2189    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2190    VIXL_ASSERT(allow_macro_instructions_);
2191    VIXL_ASSERT(OutsideITBlock());
2192    MacroEmissionCheckScope guard(this);
2193    ITScope it_scope(this, &cond);
2194    ldrb(cond, rt, label);
2195  }
2196  void Ldrb(Register rt, Label* label) { Ldrb(al, rt, label); }
2197
2198  void Ldrd(Condition cond,
2199            Register rt,
2200            Register rt2,
2201            const MemOperand& operand) {
2202    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2203    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2204    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2205    VIXL_ASSERT(allow_macro_instructions_);
2206    VIXL_ASSERT(OutsideITBlock());
2207    MacroEmissionCheckScope guard(this);
2208    ITScope it_scope(this, &cond);
2209    ldrd(cond, rt, rt2, operand);
2210  }
2211  void Ldrd(Register rt, Register rt2, const MemOperand& operand) {
2212    Ldrd(al, rt, rt2, operand);
2213  }
2214
2215  void Ldrd(Condition cond, Register rt, Register rt2, Label* label) {
2216    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2217    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2218    VIXL_ASSERT(allow_macro_instructions_);
2219    VIXL_ASSERT(OutsideITBlock());
2220    MacroEmissionCheckScope guard(this);
2221    ITScope it_scope(this, &cond);
2222    ldrd(cond, rt, rt2, label);
2223  }
2224  void Ldrd(Register rt, Register rt2, Label* label) {
2225    Ldrd(al, rt, rt2, label);
2226  }
2227
2228  void Ldrex(Condition cond, Register rt, const MemOperand& operand) {
2229    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2230    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2231    VIXL_ASSERT(allow_macro_instructions_);
2232    VIXL_ASSERT(OutsideITBlock());
2233    MacroEmissionCheckScope guard(this);
2234    ITScope it_scope(this, &cond);
2235    ldrex(cond, rt, operand);
2236  }
2237  void Ldrex(Register rt, const MemOperand& operand) { Ldrex(al, rt, operand); }
2238
2239  void Ldrexb(Condition cond, Register rt, const MemOperand& operand) {
2240    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2241    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2242    VIXL_ASSERT(allow_macro_instructions_);
2243    VIXL_ASSERT(OutsideITBlock());
2244    MacroEmissionCheckScope guard(this);
2245    ITScope it_scope(this, &cond);
2246    ldrexb(cond, rt, operand);
2247  }
2248  void Ldrexb(Register rt, const MemOperand& operand) {
2249    Ldrexb(al, rt, operand);
2250  }
2251
2252  void Ldrexd(Condition cond,
2253              Register rt,
2254              Register rt2,
2255              const MemOperand& operand) {
2256    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2257    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2258    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2259    VIXL_ASSERT(allow_macro_instructions_);
2260    VIXL_ASSERT(OutsideITBlock());
2261    MacroEmissionCheckScope guard(this);
2262    ITScope it_scope(this, &cond);
2263    ldrexd(cond, rt, rt2, operand);
2264  }
2265  void Ldrexd(Register rt, Register rt2, const MemOperand& operand) {
2266    Ldrexd(al, rt, rt2, operand);
2267  }
2268
2269  void Ldrexh(Condition cond, Register rt, const MemOperand& operand) {
2270    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2271    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2272    VIXL_ASSERT(allow_macro_instructions_);
2273    VIXL_ASSERT(OutsideITBlock());
2274    MacroEmissionCheckScope guard(this);
2275    ITScope it_scope(this, &cond);
2276    ldrexh(cond, rt, operand);
2277  }
2278  void Ldrexh(Register rt, const MemOperand& operand) {
2279    Ldrexh(al, rt, operand);
2280  }
2281
2282  void Ldrh(Condition cond, Register rt, const MemOperand& operand) {
2283    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2284    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2285    VIXL_ASSERT(allow_macro_instructions_);
2286    VIXL_ASSERT(OutsideITBlock());
2287    MacroEmissionCheckScope guard(this);
2288    bool can_use_it =
2289        // LDRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2290        (operand.IsImmediate() && rt.IsLow() &&
2291         operand.GetBaseRegister().IsLow() &&
2292         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
2293         (operand.GetAddrMode() == Offset)) ||
2294        // LDRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2295        (operand.IsPlainRegister() && rt.IsLow() &&
2296         operand.GetBaseRegister().IsLow() &&
2297         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2298         (operand.GetAddrMode() == Offset));
2299    ITScope it_scope(this, &cond, can_use_it);
2300    ldrh(cond, rt, operand);
2301  }
2302  void Ldrh(Register rt, const MemOperand& operand) { Ldrh(al, rt, operand); }
2303
2304  void Ldrh(Condition cond, Register rt, Label* label) {
2305    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2306    VIXL_ASSERT(allow_macro_instructions_);
2307    VIXL_ASSERT(OutsideITBlock());
2308    MacroEmissionCheckScope guard(this);
2309    ITScope it_scope(this, &cond);
2310    ldrh(cond, rt, label);
2311  }
2312  void Ldrh(Register rt, Label* label) { Ldrh(al, rt, label); }
2313
2314  void Ldrsb(Condition cond, Register rt, const MemOperand& operand) {
2315    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2316    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2317    VIXL_ASSERT(allow_macro_instructions_);
2318    VIXL_ASSERT(OutsideITBlock());
2319    MacroEmissionCheckScope guard(this);
2320    bool can_use_it =
2321        // LDRSB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2322        operand.IsPlainRegister() && rt.IsLow() &&
2323        operand.GetBaseRegister().IsLow() &&
2324        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2325        (operand.GetAddrMode() == Offset);
2326    ITScope it_scope(this, &cond, can_use_it);
2327    ldrsb(cond, rt, operand);
2328  }
2329  void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); }
2330
2331  void Ldrsb(Condition cond, Register rt, Label* label) {
2332    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2333    VIXL_ASSERT(allow_macro_instructions_);
2334    VIXL_ASSERT(OutsideITBlock());
2335    MacroEmissionCheckScope guard(this);
2336    ITScope it_scope(this, &cond);
2337    ldrsb(cond, rt, label);
2338  }
2339  void Ldrsb(Register rt, Label* label) { Ldrsb(al, rt, label); }
2340
2341  void Ldrsh(Condition cond, Register rt, const MemOperand& operand) {
2342    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2343    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2344    VIXL_ASSERT(allow_macro_instructions_);
2345    VIXL_ASSERT(OutsideITBlock());
2346    MacroEmissionCheckScope guard(this);
2347    bool can_use_it =
2348        // LDRSH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2349        operand.IsPlainRegister() && rt.IsLow() &&
2350        operand.GetBaseRegister().IsLow() &&
2351        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2352        (operand.GetAddrMode() == Offset);
2353    ITScope it_scope(this, &cond, can_use_it);
2354    ldrsh(cond, rt, operand);
2355  }
2356  void Ldrsh(Register rt, const MemOperand& operand) { Ldrsh(al, rt, operand); }
2357
2358  void Ldrsh(Condition cond, Register rt, Label* label) {
2359    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2360    VIXL_ASSERT(allow_macro_instructions_);
2361    VIXL_ASSERT(OutsideITBlock());
2362    MacroEmissionCheckScope guard(this);
2363    ITScope it_scope(this, &cond);
2364    ldrsh(cond, rt, label);
2365  }
2366  void Ldrsh(Register rt, Label* label) { Ldrsh(al, rt, label); }
2367
2368  void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) {
2369    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2371    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2372    VIXL_ASSERT(allow_macro_instructions_);
2373    VIXL_ASSERT(OutsideITBlock());
2374    MacroEmissionCheckScope guard(this);
2375    bool can_use_it =
2376        // LSL<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2377        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2378         (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) ||
2379        // LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2380        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2381         operand.GetBaseRegister().IsLow());
2382    ITScope it_scope(this, &cond, can_use_it);
2383    lsl(cond, rd, rm, operand);
2384  }
2385  void Lsl(Register rd, Register rm, const Operand& operand) {
2386    Lsl(al, rd, rm, operand);
2387  }
2388  void Lsl(FlagsUpdate flags,
2389           Condition cond,
2390           Register rd,
2391           Register rm,
2392           const Operand& operand) {
2393    switch (flags) {
2394      case LeaveFlags:
2395        Lsl(cond, rd, rm, operand);
2396        break;
2397      case SetFlags:
2398        Lsls(cond, rd, rm, operand);
2399        break;
2400      case DontCare:
2401        bool setflags_is_smaller =
2402            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2403            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2404              (operand.GetImmediate() < 32)) ||
2405             (operand.IsPlainRegister() && rd.Is(rm)));
2406        if (setflags_is_smaller) {
2407          Lsls(cond, rd, rm, operand);
2408        } else {
2409          Lsl(cond, rd, rm, operand);
2410        }
2411        break;
2412    }
2413  }
2414  void Lsl(FlagsUpdate flags,
2415           Register rd,
2416           Register rm,
2417           const Operand& operand) {
2418    Lsl(flags, al, rd, rm, operand);
2419  }
2420
2421  void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) {
2422    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2423    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2424    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2425    VIXL_ASSERT(allow_macro_instructions_);
2426    VIXL_ASSERT(OutsideITBlock());
2427    MacroEmissionCheckScope guard(this);
2428    ITScope it_scope(this, &cond);
2429    lsls(cond, rd, rm, operand);
2430  }
2431  void Lsls(Register rd, Register rm, const Operand& operand) {
2432    Lsls(al, rd, rm, operand);
2433  }
2434
2435  void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) {
2436    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2437    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2438    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2439    VIXL_ASSERT(allow_macro_instructions_);
2440    VIXL_ASSERT(OutsideITBlock());
2441    MacroEmissionCheckScope guard(this);
2442    bool can_use_it =
2443        // LSR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2444        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2445         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
2446        // LSR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2447        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2448         operand.GetBaseRegister().IsLow());
2449    ITScope it_scope(this, &cond, can_use_it);
2450    lsr(cond, rd, rm, operand);
2451  }
2452  void Lsr(Register rd, Register rm, const Operand& operand) {
2453    Lsr(al, rd, rm, operand);
2454  }
2455  void Lsr(FlagsUpdate flags,
2456           Condition cond,
2457           Register rd,
2458           Register rm,
2459           const Operand& operand) {
2460    switch (flags) {
2461      case LeaveFlags:
2462        Lsr(cond, rd, rm, operand);
2463        break;
2464      case SetFlags:
2465        Lsrs(cond, rd, rm, operand);
2466        break;
2467      case DontCare:
2468        bool setflags_is_smaller =
2469            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2470            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2471              (operand.GetImmediate() <= 32)) ||
2472             (operand.IsPlainRegister() && rd.Is(rm)));
2473        if (setflags_is_smaller) {
2474          Lsrs(cond, rd, rm, operand);
2475        } else {
2476          Lsr(cond, rd, rm, operand);
2477        }
2478        break;
2479    }
2480  }
2481  void Lsr(FlagsUpdate flags,
2482           Register rd,
2483           Register rm,
2484           const Operand& operand) {
2485    Lsr(flags, al, rd, rm, operand);
2486  }
2487
2488  void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) {
2489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2490    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2491    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2492    VIXL_ASSERT(allow_macro_instructions_);
2493    VIXL_ASSERT(OutsideITBlock());
2494    MacroEmissionCheckScope guard(this);
2495    ITScope it_scope(this, &cond);
2496    lsrs(cond, rd, rm, operand);
2497  }
2498  void Lsrs(Register rd, Register rm, const Operand& operand) {
2499    Lsrs(al, rd, rm, operand);
2500  }
2501
2502  void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2504    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2505    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2506    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2507    VIXL_ASSERT(allow_macro_instructions_);
2508    VIXL_ASSERT(OutsideITBlock());
2509    MacroEmissionCheckScope guard(this);
2510    ITScope it_scope(this, &cond);
2511    mla(cond, rd, rn, rm, ra);
2512  }
2513  void Mla(Register rd, Register rn, Register rm, Register ra) {
2514    Mla(al, rd, rn, rm, ra);
2515  }
2516  void Mla(FlagsUpdate flags,
2517           Condition cond,
2518           Register rd,
2519           Register rn,
2520           Register rm,
2521           Register ra) {
2522    switch (flags) {
2523      case LeaveFlags:
2524        Mla(cond, rd, rn, rm, ra);
2525        break;
2526      case SetFlags:
2527        Mlas(cond, rd, rn, rm, ra);
2528        break;
2529      case DontCare:
2530        Mla(cond, rd, rn, rm, ra);
2531        break;
2532    }
2533  }
2534  void Mla(
2535      FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) {
2536    Mla(flags, al, rd, rn, rm, ra);
2537  }
2538
2539  void Mlas(
2540      Condition cond, Register rd, Register rn, Register rm, Register ra) {
2541    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2542    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2543    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2544    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2545    VIXL_ASSERT(allow_macro_instructions_);
2546    VIXL_ASSERT(OutsideITBlock());
2547    MacroEmissionCheckScope guard(this);
2548    ITScope it_scope(this, &cond);
2549    mlas(cond, rd, rn, rm, ra);
2550  }
2551  void Mlas(Register rd, Register rn, Register rm, Register ra) {
2552    Mlas(al, rd, rn, rm, ra);
2553  }
2554
2555  void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2557    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2558    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2559    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2560    VIXL_ASSERT(allow_macro_instructions_);
2561    VIXL_ASSERT(OutsideITBlock());
2562    MacroEmissionCheckScope guard(this);
2563    ITScope it_scope(this, &cond);
2564    mls(cond, rd, rn, rm, ra);
2565  }
2566  void Mls(Register rd, Register rn, Register rm, Register ra) {
2567    Mls(al, rd, rn, rm, ra);
2568  }
2569
2570  void Mov(Condition cond, Register rd, const Operand& operand) {
2571    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2572    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2573    VIXL_ASSERT(allow_macro_instructions_);
2574    VIXL_ASSERT(OutsideITBlock());
2575    MacroEmissionCheckScope guard(this);
2576    if (operand.IsPlainRegister() && rd.Is(operand.GetBaseRegister())) {
2577      return;
2578    }
2579    bool can_use_it =
2580        // MOV<c>{<q>} <Rd>, #<imm8> ; T1
2581        (operand.IsImmediate() && rd.IsLow() &&
2582         (operand.GetImmediate() <= 255)) ||
2583        // MOV{<c>}{<q>} <Rd>, <Rm> ; T1
2584        (operand.IsPlainRegister() && !rd.IsPC() &&
2585         !operand.GetBaseRegister().IsPC()) ||
2586        // MOV<c>{<q>} <Rd>, <Rm> {, <shift> #<amount>} ; T2
2587        (operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2588         operand.GetBaseRegister().IsLow() &&
2589         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2590          operand.GetShift().Is(ASR))) ||
2591        // MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs> ; T1
2592        // MOV<c>{<q>} <Rdm>, <Rdm>, LSR <Rs> ; T1
2593        // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1
2594        // MOV<c>{<q>} <Rdm>, <Rdm>, ROR <Rs> ; T1
2595        (operand.IsRegisterShiftedRegister() &&
2596         rd.Is(operand.GetBaseRegister()) && rd.IsLow() &&
2597         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2598          operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) &&
2599         operand.GetShiftRegister().IsLow());
2600    ITScope it_scope(this, &cond, can_use_it);
2601    mov(cond, rd, operand);
2602  }
2603  void Mov(Register rd, const Operand& operand) { Mov(al, rd, operand); }
2604  void Mov(FlagsUpdate flags,
2605           Condition cond,
2606           Register rd,
2607           const Operand& operand) {
2608    switch (flags) {
2609      case LeaveFlags:
2610        Mov(cond, rd, operand);
2611        break;
2612      case SetFlags:
2613        Movs(cond, rd, operand);
2614        break;
2615      case DontCare:
2616        if (operand.IsPlainRegister() && rd.Is(operand.GetBaseRegister())) {
2617          return;
2618        }
2619        bool setflags_is_smaller =
2620            IsUsingT32() && cond.Is(al) &&
2621            ((operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2622              operand.GetBaseRegister().IsLow() &&
2623              (operand.GetShiftAmount() >= 1) &&
2624              (((operand.GetShiftAmount() <= 32) &&
2625                ((operand.GetShift().IsLSR() || operand.GetShift().IsASR()))) ||
2626               ((operand.GetShiftAmount() < 32) &&
2627                operand.GetShift().IsLSL()))) ||
2628             (operand.IsRegisterShiftedRegister() && rd.IsLow() &&
2629              operand.GetBaseRegister().Is(rd) &&
2630              operand.GetShiftRegister().IsLow() &&
2631              (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() ||
2632               operand.GetShift().IsASR() || operand.GetShift().IsROR())) ||
2633             (operand.IsImmediate() && rd.IsLow() &&
2634              (operand.GetImmediate() < 256)));
2635        if (setflags_is_smaller) {
2636          Movs(cond, rd, operand);
2637        } else {
2638          Mov(cond, rd, operand);
2639        }
2640        break;
2641    }
2642  }
2643  void Mov(FlagsUpdate flags, Register rd, const Operand& operand) {
2644    Mov(flags, al, rd, operand);
2645  }
2646
2647  void Movs(Condition cond, Register rd, const Operand& operand) {
2648    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2649    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2650    VIXL_ASSERT(allow_macro_instructions_);
2651    VIXL_ASSERT(OutsideITBlock());
2652    MacroEmissionCheckScope guard(this);
2653    ITScope it_scope(this, &cond);
2654    movs(cond, rd, operand);
2655  }
2656  void Movs(Register rd, const Operand& operand) { Movs(al, rd, operand); }
2657
2658  void Movt(Condition cond, Register rd, const Operand& operand) {
2659    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2660    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2661    VIXL_ASSERT(allow_macro_instructions_);
2662    VIXL_ASSERT(OutsideITBlock());
2663    MacroEmissionCheckScope guard(this);
2664    ITScope it_scope(this, &cond);
2665    movt(cond, rd, operand);
2666  }
2667  void Movt(Register rd, const Operand& operand) { Movt(al, rd, operand); }
2668
2669  void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
2670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2671    VIXL_ASSERT(allow_macro_instructions_);
2672    VIXL_ASSERT(OutsideITBlock());
2673    MacroEmissionCheckScope guard(this);
2674    ITScope it_scope(this, &cond);
2675    mrs(cond, rd, spec_reg);
2676  }
2677  void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); }
2678
2679  void Msr(Condition cond,
2680           MaskedSpecialRegister spec_reg,
2681           const Operand& operand) {
2682    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2683    VIXL_ASSERT(allow_macro_instructions_);
2684    VIXL_ASSERT(OutsideITBlock());
2685    MacroEmissionCheckScope guard(this);
2686    ITScope it_scope(this, &cond);
2687    msr(cond, spec_reg, operand);
2688  }
2689  void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) {
2690    Msr(al, spec_reg, operand);
2691  }
2692
2693  void Mul(Condition cond, Register rd, Register rn, Register rm) {
2694    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2695    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2696    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2697    VIXL_ASSERT(allow_macro_instructions_);
2698    VIXL_ASSERT(OutsideITBlock());
2699    MacroEmissionCheckScope guard(this);
2700    bool can_use_it =
2701        // MUL<c>{<q>} <Rdm>, <Rn>{, <Rdm>} ; T1
2702        rd.Is(rm) && rn.IsLow() && rm.IsLow();
2703    ITScope it_scope(this, &cond, can_use_it);
2704    mul(cond, rd, rn, rm);
2705  }
2706  void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); }
2707  void Mul(FlagsUpdate flags,
2708           Condition cond,
2709           Register rd,
2710           Register rn,
2711           Register rm) {
2712    switch (flags) {
2713      case LeaveFlags:
2714        Mul(cond, rd, rn, rm);
2715        break;
2716      case SetFlags:
2717        Muls(cond, rd, rn, rm);
2718        break;
2719      case DontCare:
2720        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2721                                   rn.IsLow() && rm.Is(rd);
2722        if (setflags_is_smaller) {
2723          Muls(cond, rd, rn, rm);
2724        } else {
2725          Mul(cond, rd, rn, rm);
2726        }
2727        break;
2728    }
2729  }
2730  void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) {
2731    Mul(flags, al, rd, rn, rm);
2732  }
2733
2734  void Muls(Condition cond, Register rd, Register rn, Register rm) {
2735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2737    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2738    VIXL_ASSERT(allow_macro_instructions_);
2739    VIXL_ASSERT(OutsideITBlock());
2740    MacroEmissionCheckScope guard(this);
2741    ITScope it_scope(this, &cond);
2742    muls(cond, rd, rn, rm);
2743  }
2744  void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); }
2745
2746  void Mvn(Condition cond, Register rd, const Operand& operand) {
2747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2748    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2749    VIXL_ASSERT(allow_macro_instructions_);
2750    VIXL_ASSERT(OutsideITBlock());
2751    MacroEmissionCheckScope guard(this);
2752    bool can_use_it =
2753        // MVN<c>{<q>} <Rd>, <Rm> ; T1
2754        operand.IsPlainRegister() && rd.IsLow() &&
2755        operand.GetBaseRegister().IsLow();
2756    ITScope it_scope(this, &cond, can_use_it);
2757    mvn(cond, rd, operand);
2758  }
2759  void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); }
2760  void Mvn(FlagsUpdate flags,
2761           Condition cond,
2762           Register rd,
2763           const Operand& operand) {
2764    switch (flags) {
2765      case LeaveFlags:
2766        Mvn(cond, rd, operand);
2767        break;
2768      case SetFlags:
2769        Mvns(cond, rd, operand);
2770        break;
2771      case DontCare:
2772        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2773                                   operand.IsPlainRegister() &&
2774                                   operand.GetBaseRegister().IsLow();
2775        if (setflags_is_smaller) {
2776          Mvns(cond, rd, operand);
2777        } else {
2778          Mvn(cond, rd, operand);
2779        }
2780        break;
2781    }
2782  }
2783  void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) {
2784    Mvn(flags, al, rd, operand);
2785  }
2786
2787  void Mvns(Condition cond, Register rd, const Operand& operand) {
2788    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2789    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2790    VIXL_ASSERT(allow_macro_instructions_);
2791    VIXL_ASSERT(OutsideITBlock());
2792    MacroEmissionCheckScope guard(this);
2793    ITScope it_scope(this, &cond);
2794    mvns(cond, rd, operand);
2795  }
2796  void Mvns(Register rd, const Operand& operand) { Mvns(al, rd, operand); }
2797
2798  void Nop(Condition cond) {
2799    VIXL_ASSERT(allow_macro_instructions_);
2800    VIXL_ASSERT(OutsideITBlock());
2801    MacroEmissionCheckScope guard(this);
2802    ITScope it_scope(this, &cond);
2803    nop(cond);
2804  }
2805  void Nop() { Nop(al); }
2806
2807  void Orn(Condition cond, Register rd, Register rn, const Operand& operand) {
2808    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2809    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2810    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2811    VIXL_ASSERT(allow_macro_instructions_);
2812    VIXL_ASSERT(OutsideITBlock());
2813    MacroEmissionCheckScope guard(this);
2814    if (cond.Is(al) && operand.IsImmediate()) {
2815      uint32_t immediate = operand.GetImmediate();
2816      if (immediate == 0) {
2817        mvn(rd, 0);
2818        return;
2819      }
2820      if ((immediate == 0xffffffff) && rd.Is(rn)) {
2821        return;
2822      }
2823    }
2824    ITScope it_scope(this, &cond);
2825    orn(cond, rd, rn, operand);
2826  }
2827  void Orn(Register rd, Register rn, const Operand& operand) {
2828    Orn(al, rd, rn, operand);
2829  }
2830  void Orn(FlagsUpdate flags,
2831           Condition cond,
2832           Register rd,
2833           Register rn,
2834           const Operand& operand) {
2835    switch (flags) {
2836      case LeaveFlags:
2837        Orn(cond, rd, rn, operand);
2838        break;
2839      case SetFlags:
2840        Orns(cond, rd, rn, operand);
2841        break;
2842      case DontCare:
2843        Orn(cond, rd, rn, operand);
2844        break;
2845    }
2846  }
2847  void Orn(FlagsUpdate flags,
2848           Register rd,
2849           Register rn,
2850           const Operand& operand) {
2851    Orn(flags, al, rd, rn, operand);
2852  }
2853
2854  void Orns(Condition cond, Register rd, Register rn, const Operand& operand) {
2855    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2856    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2857    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2858    VIXL_ASSERT(allow_macro_instructions_);
2859    VIXL_ASSERT(OutsideITBlock());
2860    MacroEmissionCheckScope guard(this);
2861    ITScope it_scope(this, &cond);
2862    orns(cond, rd, rn, operand);
2863  }
2864  void Orns(Register rd, Register rn, const Operand& operand) {
2865    Orns(al, rd, rn, operand);
2866  }
2867
2868  void Orr(Condition cond, Register rd, Register rn, const Operand& operand) {
2869    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2870    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2871    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2872    VIXL_ASSERT(allow_macro_instructions_);
2873    VIXL_ASSERT(OutsideITBlock());
2874    MacroEmissionCheckScope guard(this);
2875    if (rd.Is(rn) && operand.IsPlainRegister() &&
2876        rd.Is(operand.GetBaseRegister())) {
2877      return;
2878    }
2879    if (cond.Is(al) && operand.IsImmediate()) {
2880      uint32_t immediate = operand.GetImmediate();
2881      if ((immediate == 0) && rd.Is(rn)) {
2882        return;
2883      }
2884      if (immediate == 0xffffffff) {
2885        mvn(rd, 0);
2886        return;
2887      }
2888    }
2889    bool can_use_it =
2890        // ORR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
2891        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
2892        operand.GetBaseRegister().IsLow();
2893    ITScope it_scope(this, &cond, can_use_it);
2894    orr(cond, rd, rn, operand);
2895  }
2896  void Orr(Register rd, Register rn, const Operand& operand) {
2897    Orr(al, rd, rn, operand);
2898  }
2899  void Orr(FlagsUpdate flags,
2900           Condition cond,
2901           Register rd,
2902           Register rn,
2903           const Operand& operand) {
2904    switch (flags) {
2905      case LeaveFlags:
2906        Orr(cond, rd, rn, operand);
2907        break;
2908      case SetFlags:
2909        Orrs(cond, rd, rn, operand);
2910        break;
2911      case DontCare:
2912        if (operand.IsPlainRegister() && rd.Is(rn) &&
2913            rd.Is(operand.GetBaseRegister())) {
2914          return;
2915        }
2916        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2917                                   rn.Is(rd) && operand.IsPlainRegister() &&
2918                                   operand.GetBaseRegister().IsLow();
2919        if (setflags_is_smaller) {
2920          Orrs(cond, rd, rn, operand);
2921        } else {
2922          Orr(cond, rd, rn, operand);
2923        }
2924        break;
2925    }
2926  }
2927  void Orr(FlagsUpdate flags,
2928           Register rd,
2929           Register rn,
2930           const Operand& operand) {
2931    Orr(flags, al, rd, rn, operand);
2932  }
2933
2934  void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) {
2935    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2936    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2937    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2938    VIXL_ASSERT(allow_macro_instructions_);
2939    VIXL_ASSERT(OutsideITBlock());
2940    MacroEmissionCheckScope guard(this);
2941    ITScope it_scope(this, &cond);
2942    orrs(cond, rd, rn, operand);
2943  }
2944  void Orrs(Register rd, Register rn, const Operand& operand) {
2945    Orrs(al, rd, rn, operand);
2946  }
2947
2948  void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) {
2949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2951    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2952    VIXL_ASSERT(allow_macro_instructions_);
2953    VIXL_ASSERT(OutsideITBlock());
2954    MacroEmissionCheckScope guard(this);
2955    ITScope it_scope(this, &cond);
2956    pkhbt(cond, rd, rn, operand);
2957  }
2958  void Pkhbt(Register rd, Register rn, const Operand& operand) {
2959    Pkhbt(al, rd, rn, operand);
2960  }
2961
2962  void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) {
2963    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2965    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2966    VIXL_ASSERT(allow_macro_instructions_);
2967    VIXL_ASSERT(OutsideITBlock());
2968    MacroEmissionCheckScope guard(this);
2969    ITScope it_scope(this, &cond);
2970    pkhtb(cond, rd, rn, operand);
2971  }
2972  void Pkhtb(Register rd, Register rn, const Operand& operand) {
2973    Pkhtb(al, rd, rn, operand);
2974  }
2975
2976  void Pld(Condition cond, Label* label) {
2977    VIXL_ASSERT(allow_macro_instructions_);
2978    VIXL_ASSERT(OutsideITBlock());
2979    MacroEmissionCheckScope guard(this);
2980    ITScope it_scope(this, &cond);
2981    pld(cond, label);
2982  }
2983  void Pld(Label* label) { Pld(al, label); }
2984
2985  void Pld(Condition cond, const MemOperand& operand) {
2986    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2987    VIXL_ASSERT(allow_macro_instructions_);
2988    VIXL_ASSERT(OutsideITBlock());
2989    MacroEmissionCheckScope guard(this);
2990    ITScope it_scope(this, &cond);
2991    pld(cond, operand);
2992  }
2993  void Pld(const MemOperand& operand) { Pld(al, operand); }
2994
2995  void Pldw(Condition cond, const MemOperand& operand) {
2996    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2997    VIXL_ASSERT(allow_macro_instructions_);
2998    VIXL_ASSERT(OutsideITBlock());
2999    MacroEmissionCheckScope guard(this);
3000    ITScope it_scope(this, &cond);
3001    pldw(cond, operand);
3002  }
3003  void Pldw(const MemOperand& operand) { Pldw(al, operand); }
3004
3005  void Pli(Condition cond, const MemOperand& operand) {
3006    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3007    VIXL_ASSERT(allow_macro_instructions_);
3008    VIXL_ASSERT(OutsideITBlock());
3009    MacroEmissionCheckScope guard(this);
3010    ITScope it_scope(this, &cond);
3011    pli(cond, operand);
3012  }
3013  void Pli(const MemOperand& operand) { Pli(al, operand); }
3014
3015  void Pli(Condition cond, Label* label) {
3016    VIXL_ASSERT(allow_macro_instructions_);
3017    VIXL_ASSERT(OutsideITBlock());
3018    MacroEmissionCheckScope guard(this);
3019    ITScope it_scope(this, &cond);
3020    pli(cond, label);
3021  }
3022  void Pli(Label* label) { Pli(al, label); }
3023
3024  void Pop(Condition cond, RegisterList registers) {
3025    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
3026    VIXL_ASSERT(allow_macro_instructions_);
3027    VIXL_ASSERT(OutsideITBlock());
3028    MacroEmissionCheckScope guard(this);
3029    ITScope it_scope(this, &cond);
3030    pop(cond, registers);
3031  }
3032  void Pop(RegisterList registers) { Pop(al, registers); }
3033
3034  void Pop(Condition cond, Register rt) {
3035    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
3036    VIXL_ASSERT(allow_macro_instructions_);
3037    VIXL_ASSERT(OutsideITBlock());
3038    MacroEmissionCheckScope guard(this);
3039    ITScope it_scope(this, &cond);
3040    pop(cond, rt);
3041  }
3042  void Pop(Register rt) { Pop(al, rt); }
3043
3044  void Push(Condition cond, RegisterList registers) {
3045    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
3046    VIXL_ASSERT(allow_macro_instructions_);
3047    VIXL_ASSERT(OutsideITBlock());
3048    MacroEmissionCheckScope guard(this);
3049    ITScope it_scope(this, &cond);
3050    push(cond, registers);
3051  }
3052  void Push(RegisterList registers) { Push(al, registers); }
3053
3054  void Push(Condition cond, Register rt) {
3055    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
3056    VIXL_ASSERT(allow_macro_instructions_);
3057    VIXL_ASSERT(OutsideITBlock());
3058    MacroEmissionCheckScope guard(this);
3059    ITScope it_scope(this, &cond);
3060    push(cond, rt);
3061  }
3062  void Push(Register rt) { Push(al, rt); }
3063
3064  void Qadd(Condition cond, Register rd, Register rm, Register rn) {
3065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3066    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3067    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3068    VIXL_ASSERT(allow_macro_instructions_);
3069    VIXL_ASSERT(OutsideITBlock());
3070    MacroEmissionCheckScope guard(this);
3071    ITScope it_scope(this, &cond);
3072    qadd(cond, rd, rm, rn);
3073  }
3074  void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); }
3075
3076  void Qadd16(Condition cond, Register rd, Register rn, Register rm) {
3077    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3080    VIXL_ASSERT(allow_macro_instructions_);
3081    VIXL_ASSERT(OutsideITBlock());
3082    MacroEmissionCheckScope guard(this);
3083    ITScope it_scope(this, &cond);
3084    qadd16(cond, rd, rn, rm);
3085  }
3086  void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); }
3087
3088  void Qadd8(Condition cond, Register rd, Register rn, Register rm) {
3089    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3092    VIXL_ASSERT(allow_macro_instructions_);
3093    VIXL_ASSERT(OutsideITBlock());
3094    MacroEmissionCheckScope guard(this);
3095    ITScope it_scope(this, &cond);
3096    qadd8(cond, rd, rn, rm);
3097  }
3098  void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); }
3099
3100  void Qasx(Condition cond, Register rd, Register rn, Register rm) {
3101    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3103    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3104    VIXL_ASSERT(allow_macro_instructions_);
3105    VIXL_ASSERT(OutsideITBlock());
3106    MacroEmissionCheckScope guard(this);
3107    ITScope it_scope(this, &cond);
3108    qasx(cond, rd, rn, rm);
3109  }
3110  void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); }
3111
3112  void Qdadd(Condition cond, Register rd, Register rm, Register rn) {
3113    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3115    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3116    VIXL_ASSERT(allow_macro_instructions_);
3117    VIXL_ASSERT(OutsideITBlock());
3118    MacroEmissionCheckScope guard(this);
3119    ITScope it_scope(this, &cond);
3120    qdadd(cond, rd, rm, rn);
3121  }
3122  void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); }
3123
3124  void Qdsub(Condition cond, Register rd, Register rm, Register rn) {
3125    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3126    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3128    VIXL_ASSERT(allow_macro_instructions_);
3129    VIXL_ASSERT(OutsideITBlock());
3130    MacroEmissionCheckScope guard(this);
3131    ITScope it_scope(this, &cond);
3132    qdsub(cond, rd, rm, rn);
3133  }
3134  void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); }
3135
3136  void Qsax(Condition cond, Register rd, Register rn, Register rm) {
3137    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3138    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3139    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3140    VIXL_ASSERT(allow_macro_instructions_);
3141    VIXL_ASSERT(OutsideITBlock());
3142    MacroEmissionCheckScope guard(this);
3143    ITScope it_scope(this, &cond);
3144    qsax(cond, rd, rn, rm);
3145  }
3146  void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); }
3147
3148  void Qsub(Condition cond, Register rd, Register rm, Register rn) {
3149    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3150    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3151    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3152    VIXL_ASSERT(allow_macro_instructions_);
3153    VIXL_ASSERT(OutsideITBlock());
3154    MacroEmissionCheckScope guard(this);
3155    ITScope it_scope(this, &cond);
3156    qsub(cond, rd, rm, rn);
3157  }
3158  void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); }
3159
3160  void Qsub16(Condition cond, Register rd, Register rn, Register rm) {
3161    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3162    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3163    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3164    VIXL_ASSERT(allow_macro_instructions_);
3165    VIXL_ASSERT(OutsideITBlock());
3166    MacroEmissionCheckScope guard(this);
3167    ITScope it_scope(this, &cond);
3168    qsub16(cond, rd, rn, rm);
3169  }
3170  void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); }
3171
3172  void Qsub8(Condition cond, Register rd, Register rn, Register rm) {
3173    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3174    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3175    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3176    VIXL_ASSERT(allow_macro_instructions_);
3177    VIXL_ASSERT(OutsideITBlock());
3178    MacroEmissionCheckScope guard(this);
3179    ITScope it_scope(this, &cond);
3180    qsub8(cond, rd, rn, rm);
3181  }
3182  void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); }
3183
3184  void Rbit(Condition cond, Register rd, Register rm) {
3185    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3186    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3187    VIXL_ASSERT(allow_macro_instructions_);
3188    VIXL_ASSERT(OutsideITBlock());
3189    MacroEmissionCheckScope guard(this);
3190    ITScope it_scope(this, &cond);
3191    rbit(cond, rd, rm);
3192  }
3193  void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); }
3194
3195  void Rev(Condition cond, Register rd, Register rm) {
3196    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3198    VIXL_ASSERT(allow_macro_instructions_);
3199    VIXL_ASSERT(OutsideITBlock());
3200    MacroEmissionCheckScope guard(this);
3201    ITScope it_scope(this, &cond);
3202    rev(cond, rd, rm);
3203  }
3204  void Rev(Register rd, Register rm) { Rev(al, rd, rm); }
3205
3206  void Rev16(Condition cond, Register rd, Register rm) {
3207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3209    VIXL_ASSERT(allow_macro_instructions_);
3210    VIXL_ASSERT(OutsideITBlock());
3211    MacroEmissionCheckScope guard(this);
3212    ITScope it_scope(this, &cond);
3213    rev16(cond, rd, rm);
3214  }
3215  void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); }
3216
3217  void Revsh(Condition cond, Register rd, Register rm) {
3218    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3219    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3220    VIXL_ASSERT(allow_macro_instructions_);
3221    VIXL_ASSERT(OutsideITBlock());
3222    MacroEmissionCheckScope guard(this);
3223    ITScope it_scope(this, &cond);
3224    revsh(cond, rd, rm);
3225  }
3226  void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); }
3227
3228  void Ror(Condition cond, Register rd, Register rm, const Operand& operand) {
3229    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3230    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3231    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3232    VIXL_ASSERT(allow_macro_instructions_);
3233    VIXL_ASSERT(OutsideITBlock());
3234    MacroEmissionCheckScope guard(this);
3235    bool can_use_it =
3236        // ROR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
3237        operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
3238        operand.GetBaseRegister().IsLow();
3239    ITScope it_scope(this, &cond, can_use_it);
3240    ror(cond, rd, rm, operand);
3241  }
3242  void Ror(Register rd, Register rm, const Operand& operand) {
3243    Ror(al, rd, rm, operand);
3244  }
3245  void Ror(FlagsUpdate flags,
3246           Condition cond,
3247           Register rd,
3248           Register rm,
3249           const Operand& operand) {
3250    switch (flags) {
3251      case LeaveFlags:
3252        Ror(cond, rd, rm, operand);
3253        break;
3254      case SetFlags:
3255        Rors(cond, rd, rm, operand);
3256        break;
3257      case DontCare:
3258        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3259                                   rm.IsLow() && operand.IsPlainRegister() &&
3260                                   rd.Is(rm);
3261        if (setflags_is_smaller) {
3262          Rors(cond, rd, rm, operand);
3263        } else {
3264          Ror(cond, rd, rm, operand);
3265        }
3266        break;
3267    }
3268  }
3269  void Ror(FlagsUpdate flags,
3270           Register rd,
3271           Register rm,
3272           const Operand& operand) {
3273    Ror(flags, al, rd, rm, operand);
3274  }
3275
3276  void Rors(Condition cond, Register rd, Register rm, const Operand& operand) {
3277    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3278    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3279    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3280    VIXL_ASSERT(allow_macro_instructions_);
3281    VIXL_ASSERT(OutsideITBlock());
3282    MacroEmissionCheckScope guard(this);
3283    ITScope it_scope(this, &cond);
3284    rors(cond, rd, rm, operand);
3285  }
3286  void Rors(Register rd, Register rm, const Operand& operand) {
3287    Rors(al, rd, rm, operand);
3288  }
3289
3290  void Rrx(Condition cond, Register rd, Register rm) {
3291    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3292    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3293    VIXL_ASSERT(allow_macro_instructions_);
3294    VIXL_ASSERT(OutsideITBlock());
3295    MacroEmissionCheckScope guard(this);
3296    ITScope it_scope(this, &cond);
3297    rrx(cond, rd, rm);
3298  }
3299  void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); }
3300  void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) {
3301    switch (flags) {
3302      case LeaveFlags:
3303        Rrx(cond, rd, rm);
3304        break;
3305      case SetFlags:
3306        Rrxs(cond, rd, rm);
3307        break;
3308      case DontCare:
3309        Rrx(cond, rd, rm);
3310        break;
3311    }
3312  }
3313  void Rrx(FlagsUpdate flags, Register rd, Register rm) {
3314    Rrx(flags, al, rd, rm);
3315  }
3316
3317  void Rrxs(Condition cond, Register rd, Register rm) {
3318    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3319    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3320    VIXL_ASSERT(allow_macro_instructions_);
3321    VIXL_ASSERT(OutsideITBlock());
3322    MacroEmissionCheckScope guard(this);
3323    ITScope it_scope(this, &cond);
3324    rrxs(cond, rd, rm);
3325  }
3326  void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); }
3327
3328  void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) {
3329    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3330    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3331    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3332    VIXL_ASSERT(allow_macro_instructions_);
3333    VIXL_ASSERT(OutsideITBlock());
3334    MacroEmissionCheckScope guard(this);
3335    bool can_use_it =
3336        // RSB<c>{<q>} {<Rd>, }<Rn>, #0 ; T1
3337        operand.IsImmediate() && rd.IsLow() && rn.IsLow() &&
3338        (operand.GetImmediate() == 0);
3339    ITScope it_scope(this, &cond, can_use_it);
3340    rsb(cond, rd, rn, operand);
3341  }
3342  void Rsb(Register rd, Register rn, const Operand& operand) {
3343    Rsb(al, rd, rn, operand);
3344  }
3345  void Rsb(FlagsUpdate flags,
3346           Condition cond,
3347           Register rd,
3348           Register rn,
3349           const Operand& operand) {
3350    switch (flags) {
3351      case LeaveFlags:
3352        Rsb(cond, rd, rn, operand);
3353        break;
3354      case SetFlags:
3355        Rsbs(cond, rd, rn, operand);
3356        break;
3357      case DontCare:
3358        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3359                                   rn.IsLow() && operand.IsImmediate() &&
3360                                   (operand.GetImmediate() == 0);
3361        if (setflags_is_smaller) {
3362          Rsbs(cond, rd, rn, operand);
3363        } else {
3364          Rsb(cond, rd, rn, operand);
3365        }
3366        break;
3367    }
3368  }
3369  void Rsb(FlagsUpdate flags,
3370           Register rd,
3371           Register rn,
3372           const Operand& operand) {
3373    Rsb(flags, al, rd, rn, operand);
3374  }
3375
3376  void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) {
3377    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3378    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3379    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3380    VIXL_ASSERT(allow_macro_instructions_);
3381    VIXL_ASSERT(OutsideITBlock());
3382    MacroEmissionCheckScope guard(this);
3383    ITScope it_scope(this, &cond);
3384    rsbs(cond, rd, rn, operand);
3385  }
3386  void Rsbs(Register rd, Register rn, const Operand& operand) {
3387    Rsbs(al, rd, rn, operand);
3388  }
3389
3390  void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) {
3391    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3392    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3393    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3394    VIXL_ASSERT(allow_macro_instructions_);
3395    VIXL_ASSERT(OutsideITBlock());
3396    MacroEmissionCheckScope guard(this);
3397    ITScope it_scope(this, &cond);
3398    rsc(cond, rd, rn, operand);
3399  }
3400  void Rsc(Register rd, Register rn, const Operand& operand) {
3401    Rsc(al, rd, rn, operand);
3402  }
3403  void Rsc(FlagsUpdate flags,
3404           Condition cond,
3405           Register rd,
3406           Register rn,
3407           const Operand& operand) {
3408    switch (flags) {
3409      case LeaveFlags:
3410        Rsc(cond, rd, rn, operand);
3411        break;
3412      case SetFlags:
3413        Rscs(cond, rd, rn, operand);
3414        break;
3415      case DontCare:
3416        Rsc(cond, rd, rn, operand);
3417        break;
3418    }
3419  }
3420  void Rsc(FlagsUpdate flags,
3421           Register rd,
3422           Register rn,
3423           const Operand& operand) {
3424    Rsc(flags, al, rd, rn, operand);
3425  }
3426
3427  void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) {
3428    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3429    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3430    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3431    VIXL_ASSERT(allow_macro_instructions_);
3432    VIXL_ASSERT(OutsideITBlock());
3433    MacroEmissionCheckScope guard(this);
3434    ITScope it_scope(this, &cond);
3435    rscs(cond, rd, rn, operand);
3436  }
3437  void Rscs(Register rd, Register rn, const Operand& operand) {
3438    Rscs(al, rd, rn, operand);
3439  }
3440
3441  void Sadd16(Condition cond, Register rd, Register rn, Register rm) {
3442    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3443    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3444    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3445    VIXL_ASSERT(allow_macro_instructions_);
3446    VIXL_ASSERT(OutsideITBlock());
3447    MacroEmissionCheckScope guard(this);
3448    ITScope it_scope(this, &cond);
3449    sadd16(cond, rd, rn, rm);
3450  }
3451  void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); }
3452
3453  void Sadd8(Condition cond, Register rd, Register rn, Register rm) {
3454    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3455    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3456    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3457    VIXL_ASSERT(allow_macro_instructions_);
3458    VIXL_ASSERT(OutsideITBlock());
3459    MacroEmissionCheckScope guard(this);
3460    ITScope it_scope(this, &cond);
3461    sadd8(cond, rd, rn, rm);
3462  }
3463  void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); }
3464
3465  void Sasx(Condition cond, Register rd, Register rn, Register rm) {
3466    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3467    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3468    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3469    VIXL_ASSERT(allow_macro_instructions_);
3470    VIXL_ASSERT(OutsideITBlock());
3471    MacroEmissionCheckScope guard(this);
3472    ITScope it_scope(this, &cond);
3473    sasx(cond, rd, rn, rm);
3474  }
3475  void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); }
3476
3477  void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) {
3478    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3480    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3481    VIXL_ASSERT(allow_macro_instructions_);
3482    VIXL_ASSERT(OutsideITBlock());
3483    MacroEmissionCheckScope guard(this);
3484    bool can_use_it =
3485        // SBC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
3486        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
3487        operand.GetBaseRegister().IsLow();
3488    ITScope it_scope(this, &cond, can_use_it);
3489    sbc(cond, rd, rn, operand);
3490  }
3491  void Sbc(Register rd, Register rn, const Operand& operand) {
3492    Sbc(al, rd, rn, operand);
3493  }
3494  void Sbc(FlagsUpdate flags,
3495           Condition cond,
3496           Register rd,
3497           Register rn,
3498           const Operand& operand) {
3499    switch (flags) {
3500      case LeaveFlags:
3501        Sbc(cond, rd, rn, operand);
3502        break;
3503      case SetFlags:
3504        Sbcs(cond, rd, rn, operand);
3505        break;
3506      case DontCare:
3507        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3508                                   rn.Is(rd) && operand.IsPlainRegister() &&
3509                                   operand.GetBaseRegister().IsLow();
3510        if (setflags_is_smaller) {
3511          Sbcs(cond, rd, rn, operand);
3512        } else {
3513          Sbc(cond, rd, rn, operand);
3514        }
3515        break;
3516    }
3517  }
3518  void Sbc(FlagsUpdate flags,
3519           Register rd,
3520           Register rn,
3521           const Operand& operand) {
3522    Sbc(flags, al, rd, rn, operand);
3523  }
3524
3525  void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) {
3526    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3528    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3529    VIXL_ASSERT(allow_macro_instructions_);
3530    VIXL_ASSERT(OutsideITBlock());
3531    MacroEmissionCheckScope guard(this);
3532    ITScope it_scope(this, &cond);
3533    sbcs(cond, rd, rn, operand);
3534  }
3535  void Sbcs(Register rd, Register rn, const Operand& operand) {
3536    Sbcs(al, rd, rn, operand);
3537  }
3538
3539  void Sbfx(Condition cond,
3540            Register rd,
3541            Register rn,
3542            uint32_t lsb,
3543            const Operand& operand) {
3544    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3545    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3546    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3547    VIXL_ASSERT(allow_macro_instructions_);
3548    VIXL_ASSERT(OutsideITBlock());
3549    MacroEmissionCheckScope guard(this);
3550    ITScope it_scope(this, &cond);
3551    sbfx(cond, rd, rn, lsb, operand);
3552  }
3553  void Sbfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
3554    Sbfx(al, rd, rn, lsb, operand);
3555  }
3556
3557  void Sdiv(Condition cond, Register rd, Register rn, Register rm) {
3558    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3559    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3560    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3561    VIXL_ASSERT(allow_macro_instructions_);
3562    VIXL_ASSERT(OutsideITBlock());
3563    MacroEmissionCheckScope guard(this);
3564    ITScope it_scope(this, &cond);
3565    sdiv(cond, rd, rn, rm);
3566  }
3567  void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); }
3568
3569  void Sel(Condition cond, Register rd, Register rn, Register rm) {
3570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3571    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3572    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3573    VIXL_ASSERT(allow_macro_instructions_);
3574    VIXL_ASSERT(OutsideITBlock());
3575    MacroEmissionCheckScope guard(this);
3576    ITScope it_scope(this, &cond);
3577    sel(cond, rd, rn, rm);
3578  }
3579  void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); }
3580
3581  void Shadd16(Condition cond, Register rd, Register rn, Register rm) {
3582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3583    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3584    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3585    VIXL_ASSERT(allow_macro_instructions_);
3586    VIXL_ASSERT(OutsideITBlock());
3587    MacroEmissionCheckScope guard(this);
3588    ITScope it_scope(this, &cond);
3589    shadd16(cond, rd, rn, rm);
3590  }
3591  void Shadd16(Register rd, Register rn, Register rm) {
3592    Shadd16(al, rd, rn, rm);
3593  }
3594
3595  void Shadd8(Condition cond, Register rd, Register rn, Register rm) {
3596    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3599    VIXL_ASSERT(allow_macro_instructions_);
3600    VIXL_ASSERT(OutsideITBlock());
3601    MacroEmissionCheckScope guard(this);
3602    ITScope it_scope(this, &cond);
3603    shadd8(cond, rd, rn, rm);
3604  }
3605  void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); }
3606
3607  void Shasx(Condition cond, Register rd, Register rn, Register rm) {
3608    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3609    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3610    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3611    VIXL_ASSERT(allow_macro_instructions_);
3612    VIXL_ASSERT(OutsideITBlock());
3613    MacroEmissionCheckScope guard(this);
3614    ITScope it_scope(this, &cond);
3615    shasx(cond, rd, rn, rm);
3616  }
3617  void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); }
3618
3619  void Shsax(Condition cond, Register rd, Register rn, Register rm) {
3620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3621    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3622    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3623    VIXL_ASSERT(allow_macro_instructions_);
3624    VIXL_ASSERT(OutsideITBlock());
3625    MacroEmissionCheckScope guard(this);
3626    ITScope it_scope(this, &cond);
3627    shsax(cond, rd, rn, rm);
3628  }
3629  void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); }
3630
3631  void Shsub16(Condition cond, Register rd, Register rn, Register rm) {
3632    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3633    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3635    VIXL_ASSERT(allow_macro_instructions_);
3636    VIXL_ASSERT(OutsideITBlock());
3637    MacroEmissionCheckScope guard(this);
3638    ITScope it_scope(this, &cond);
3639    shsub16(cond, rd, rn, rm);
3640  }
3641  void Shsub16(Register rd, Register rn, Register rm) {
3642    Shsub16(al, rd, rn, rm);
3643  }
3644
3645  void Shsub8(Condition cond, Register rd, Register rn, Register rm) {
3646    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3647    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3648    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3649    VIXL_ASSERT(allow_macro_instructions_);
3650    VIXL_ASSERT(OutsideITBlock());
3651    MacroEmissionCheckScope guard(this);
3652    ITScope it_scope(this, &cond);
3653    shsub8(cond, rd, rn, rm);
3654  }
3655  void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); }
3656
3657  void Smlabb(
3658      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3659    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3662    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3663    VIXL_ASSERT(allow_macro_instructions_);
3664    VIXL_ASSERT(OutsideITBlock());
3665    MacroEmissionCheckScope guard(this);
3666    ITScope it_scope(this, &cond);
3667    smlabb(cond, rd, rn, rm, ra);
3668  }
3669  void Smlabb(Register rd, Register rn, Register rm, Register ra) {
3670    Smlabb(al, rd, rn, rm, ra);
3671  }
3672
3673  void Smlabt(
3674      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3675    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3678    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3679    VIXL_ASSERT(allow_macro_instructions_);
3680    VIXL_ASSERT(OutsideITBlock());
3681    MacroEmissionCheckScope guard(this);
3682    ITScope it_scope(this, &cond);
3683    smlabt(cond, rd, rn, rm, ra);
3684  }
3685  void Smlabt(Register rd, Register rn, Register rm, Register ra) {
3686    Smlabt(al, rd, rn, rm, ra);
3687  }
3688
3689  void Smlad(
3690      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3691    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3692    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3693    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3694    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3695    VIXL_ASSERT(allow_macro_instructions_);
3696    VIXL_ASSERT(OutsideITBlock());
3697    MacroEmissionCheckScope guard(this);
3698    ITScope it_scope(this, &cond);
3699    smlad(cond, rd, rn, rm, ra);
3700  }
3701  void Smlad(Register rd, Register rn, Register rm, Register ra) {
3702    Smlad(al, rd, rn, rm, ra);
3703  }
3704
3705  void Smladx(
3706      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3708    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3709    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3710    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3711    VIXL_ASSERT(allow_macro_instructions_);
3712    VIXL_ASSERT(OutsideITBlock());
3713    MacroEmissionCheckScope guard(this);
3714    ITScope it_scope(this, &cond);
3715    smladx(cond, rd, rn, rm, ra);
3716  }
3717  void Smladx(Register rd, Register rn, Register rm, Register ra) {
3718    Smladx(al, rd, rn, rm, ra);
3719  }
3720
3721  void Smlal(
3722      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3723    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3725    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3726    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3727    VIXL_ASSERT(allow_macro_instructions_);
3728    VIXL_ASSERT(OutsideITBlock());
3729    MacroEmissionCheckScope guard(this);
3730    ITScope it_scope(this, &cond);
3731    smlal(cond, rdlo, rdhi, rn, rm);
3732  }
3733  void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
3734    Smlal(al, rdlo, rdhi, rn, rm);
3735  }
3736
3737  void Smlalbb(
3738      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3739    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3740    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3741    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3742    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3743    VIXL_ASSERT(allow_macro_instructions_);
3744    VIXL_ASSERT(OutsideITBlock());
3745    MacroEmissionCheckScope guard(this);
3746    ITScope it_scope(this, &cond);
3747    smlalbb(cond, rdlo, rdhi, rn, rm);
3748  }
3749  void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
3750    Smlalbb(al, rdlo, rdhi, rn, rm);
3751  }
3752
3753  void Smlalbt(
3754      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3755    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3756    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3757    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3758    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3759    VIXL_ASSERT(allow_macro_instructions_);
3760    VIXL_ASSERT(OutsideITBlock());
3761    MacroEmissionCheckScope guard(this);
3762    ITScope it_scope(this, &cond);
3763    smlalbt(cond, rdlo, rdhi, rn, rm);
3764  }
3765  void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
3766    Smlalbt(al, rdlo, rdhi, rn, rm);
3767  }
3768
3769  void Smlald(
3770      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3771    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3772    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3773    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3774    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3775    VIXL_ASSERT(allow_macro_instructions_);
3776    VIXL_ASSERT(OutsideITBlock());
3777    MacroEmissionCheckScope guard(this);
3778    ITScope it_scope(this, &cond);
3779    smlald(cond, rdlo, rdhi, rn, rm);
3780  }
3781  void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
3782    Smlald(al, rdlo, rdhi, rn, rm);
3783  }
3784
3785  void Smlaldx(
3786      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3787    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3788    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3789    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3790    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3791    VIXL_ASSERT(allow_macro_instructions_);
3792    VIXL_ASSERT(OutsideITBlock());
3793    MacroEmissionCheckScope guard(this);
3794    ITScope it_scope(this, &cond);
3795    smlaldx(cond, rdlo, rdhi, rn, rm);
3796  }
3797  void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3798    Smlaldx(al, rdlo, rdhi, rn, rm);
3799  }
3800
3801  void Smlals(
3802      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3803    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3805    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3806    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3807    VIXL_ASSERT(allow_macro_instructions_);
3808    VIXL_ASSERT(OutsideITBlock());
3809    MacroEmissionCheckScope guard(this);
3810    ITScope it_scope(this, &cond);
3811    smlals(cond, rdlo, rdhi, rn, rm);
3812  }
3813  void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
3814    Smlals(al, rdlo, rdhi, rn, rm);
3815  }
3816
3817  void Smlaltb(
3818      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3820    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3821    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3822    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3823    VIXL_ASSERT(allow_macro_instructions_);
3824    VIXL_ASSERT(OutsideITBlock());
3825    MacroEmissionCheckScope guard(this);
3826    ITScope it_scope(this, &cond);
3827    smlaltb(cond, rdlo, rdhi, rn, rm);
3828  }
3829  void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
3830    Smlaltb(al, rdlo, rdhi, rn, rm);
3831  }
3832
3833  void Smlaltt(
3834      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3835    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3836    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3837    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3838    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3839    VIXL_ASSERT(allow_macro_instructions_);
3840    VIXL_ASSERT(OutsideITBlock());
3841    MacroEmissionCheckScope guard(this);
3842    ITScope it_scope(this, &cond);
3843    smlaltt(cond, rdlo, rdhi, rn, rm);
3844  }
3845  void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
3846    Smlaltt(al, rdlo, rdhi, rn, rm);
3847  }
3848
3849  void Smlatb(
3850      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3851    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3852    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3853    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3854    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3855    VIXL_ASSERT(allow_macro_instructions_);
3856    VIXL_ASSERT(OutsideITBlock());
3857    MacroEmissionCheckScope guard(this);
3858    ITScope it_scope(this, &cond);
3859    smlatb(cond, rd, rn, rm, ra);
3860  }
3861  void Smlatb(Register rd, Register rn, Register rm, Register ra) {
3862    Smlatb(al, rd, rn, rm, ra);
3863  }
3864
3865  void Smlatt(
3866      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3867    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3868    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3869    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3870    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3871    VIXL_ASSERT(allow_macro_instructions_);
3872    VIXL_ASSERT(OutsideITBlock());
3873    MacroEmissionCheckScope guard(this);
3874    ITScope it_scope(this, &cond);
3875    smlatt(cond, rd, rn, rm, ra);
3876  }
3877  void Smlatt(Register rd, Register rn, Register rm, Register ra) {
3878    Smlatt(al, rd, rn, rm, ra);
3879  }
3880
3881  void Smlawb(
3882      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3883    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3884    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3885    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3886    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3887    VIXL_ASSERT(allow_macro_instructions_);
3888    VIXL_ASSERT(OutsideITBlock());
3889    MacroEmissionCheckScope guard(this);
3890    ITScope it_scope(this, &cond);
3891    smlawb(cond, rd, rn, rm, ra);
3892  }
3893  void Smlawb(Register rd, Register rn, Register rm, Register ra) {
3894    Smlawb(al, rd, rn, rm, ra);
3895  }
3896
3897  void Smlawt(
3898      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3899    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3900    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3901    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3902    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3903    VIXL_ASSERT(allow_macro_instructions_);
3904    VIXL_ASSERT(OutsideITBlock());
3905    MacroEmissionCheckScope guard(this);
3906    ITScope it_scope(this, &cond);
3907    smlawt(cond, rd, rn, rm, ra);
3908  }
3909  void Smlawt(Register rd, Register rn, Register rm, Register ra) {
3910    Smlawt(al, rd, rn, rm, ra);
3911  }
3912
3913  void Smlsd(
3914      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3916    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3917    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3918    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3919    VIXL_ASSERT(allow_macro_instructions_);
3920    VIXL_ASSERT(OutsideITBlock());
3921    MacroEmissionCheckScope guard(this);
3922    ITScope it_scope(this, &cond);
3923    smlsd(cond, rd, rn, rm, ra);
3924  }
3925  void Smlsd(Register rd, Register rn, Register rm, Register ra) {
3926    Smlsd(al, rd, rn, rm, ra);
3927  }
3928
3929  void Smlsdx(
3930      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3931    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3932    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3933    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3934    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3935    VIXL_ASSERT(allow_macro_instructions_);
3936    VIXL_ASSERT(OutsideITBlock());
3937    MacroEmissionCheckScope guard(this);
3938    ITScope it_scope(this, &cond);
3939    smlsdx(cond, rd, rn, rm, ra);
3940  }
3941  void Smlsdx(Register rd, Register rn, Register rm, Register ra) {
3942    Smlsdx(al, rd, rn, rm, ra);
3943  }
3944
3945  void Smlsld(
3946      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3947    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3948    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3951    VIXL_ASSERT(allow_macro_instructions_);
3952    VIXL_ASSERT(OutsideITBlock());
3953    MacroEmissionCheckScope guard(this);
3954    ITScope it_scope(this, &cond);
3955    smlsld(cond, rdlo, rdhi, rn, rm);
3956  }
3957  void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
3958    Smlsld(al, rdlo, rdhi, rn, rm);
3959  }
3960
3961  void Smlsldx(
3962      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3963    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3965    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3966    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3967    VIXL_ASSERT(allow_macro_instructions_);
3968    VIXL_ASSERT(OutsideITBlock());
3969    MacroEmissionCheckScope guard(this);
3970    ITScope it_scope(this, &cond);
3971    smlsldx(cond, rdlo, rdhi, rn, rm);
3972  }
3973  void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3974    Smlsldx(al, rdlo, rdhi, rn, rm);
3975  }
3976
3977  void Smmla(
3978      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3979    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3980    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3981    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3982    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3983    VIXL_ASSERT(allow_macro_instructions_);
3984    VIXL_ASSERT(OutsideITBlock());
3985    MacroEmissionCheckScope guard(this);
3986    ITScope it_scope(this, &cond);
3987    smmla(cond, rd, rn, rm, ra);
3988  }
3989  void Smmla(Register rd, Register rn, Register rm, Register ra) {
3990    Smmla(al, rd, rn, rm, ra);
3991  }
3992
3993  void Smmlar(
3994      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3997    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3998    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3999    VIXL_ASSERT(allow_macro_instructions_);
4000    VIXL_ASSERT(OutsideITBlock());
4001    MacroEmissionCheckScope guard(this);
4002    ITScope it_scope(this, &cond);
4003    smmlar(cond, rd, rn, rm, ra);
4004  }
4005  void Smmlar(Register rd, Register rn, Register rm, Register ra) {
4006    Smmlar(al, rd, rn, rm, ra);
4007  }
4008
4009  void Smmls(
4010      Condition cond, Register rd, Register rn, Register rm, Register ra) {
4011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4012    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4013    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4014    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
4015    VIXL_ASSERT(allow_macro_instructions_);
4016    VIXL_ASSERT(OutsideITBlock());
4017    MacroEmissionCheckScope guard(this);
4018    ITScope it_scope(this, &cond);
4019    smmls(cond, rd, rn, rm, ra);
4020  }
4021  void Smmls(Register rd, Register rn, Register rm, Register ra) {
4022    Smmls(al, rd, rn, rm, ra);
4023  }
4024
4025  void Smmlsr(
4026      Condition cond, Register rd, Register rn, Register rm, Register ra) {
4027    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4028    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4029    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4030    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
4031    VIXL_ASSERT(allow_macro_instructions_);
4032    VIXL_ASSERT(OutsideITBlock());
4033    MacroEmissionCheckScope guard(this);
4034    ITScope it_scope(this, &cond);
4035    smmlsr(cond, rd, rn, rm, ra);
4036  }
4037  void Smmlsr(Register rd, Register rn, Register rm, Register ra) {
4038    Smmlsr(al, rd, rn, rm, ra);
4039  }
4040
4041  void Smmul(Condition cond, Register rd, Register rn, Register rm) {
4042    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4043    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4044    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4045    VIXL_ASSERT(allow_macro_instructions_);
4046    VIXL_ASSERT(OutsideITBlock());
4047    MacroEmissionCheckScope guard(this);
4048    ITScope it_scope(this, &cond);
4049    smmul(cond, rd, rn, rm);
4050  }
4051  void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); }
4052
4053  void Smmulr(Condition cond, Register rd, Register rn, Register rm) {
4054    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4055    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4056    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4057    VIXL_ASSERT(allow_macro_instructions_);
4058    VIXL_ASSERT(OutsideITBlock());
4059    MacroEmissionCheckScope guard(this);
4060    ITScope it_scope(this, &cond);
4061    smmulr(cond, rd, rn, rm);
4062  }
4063  void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); }
4064
4065  void Smuad(Condition cond, Register rd, Register rn, Register rm) {
4066    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4067    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4068    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4069    VIXL_ASSERT(allow_macro_instructions_);
4070    VIXL_ASSERT(OutsideITBlock());
4071    MacroEmissionCheckScope guard(this);
4072    ITScope it_scope(this, &cond);
4073    smuad(cond, rd, rn, rm);
4074  }
4075  void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); }
4076
4077  void Smuadx(Condition cond, Register rd, Register rn, Register rm) {
4078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4081    VIXL_ASSERT(allow_macro_instructions_);
4082    VIXL_ASSERT(OutsideITBlock());
4083    MacroEmissionCheckScope guard(this);
4084    ITScope it_scope(this, &cond);
4085    smuadx(cond, rd, rn, rm);
4086  }
4087  void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); }
4088
4089  void Smulbb(Condition cond, Register rd, Register rn, Register rm) {
4090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4092    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4093    VIXL_ASSERT(allow_macro_instructions_);
4094    VIXL_ASSERT(OutsideITBlock());
4095    MacroEmissionCheckScope guard(this);
4096    ITScope it_scope(this, &cond);
4097    smulbb(cond, rd, rn, rm);
4098  }
4099  void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); }
4100
4101  void Smulbt(Condition cond, Register rd, Register rn, Register rm) {
4102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4103    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4104    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4105    VIXL_ASSERT(allow_macro_instructions_);
4106    VIXL_ASSERT(OutsideITBlock());
4107    MacroEmissionCheckScope guard(this);
4108    ITScope it_scope(this, &cond);
4109    smulbt(cond, rd, rn, rm);
4110  }
4111  void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); }
4112
4113  void Smull(
4114      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4115    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4116    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4117    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4118    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4119    VIXL_ASSERT(allow_macro_instructions_);
4120    VIXL_ASSERT(OutsideITBlock());
4121    MacroEmissionCheckScope guard(this);
4122    ITScope it_scope(this, &cond);
4123    smull(cond, rdlo, rdhi, rn, rm);
4124  }
4125  void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
4126    Smull(al, rdlo, rdhi, rn, rm);
4127  }
4128  void Smull(FlagsUpdate flags,
4129             Condition cond,
4130             Register rdlo,
4131             Register rdhi,
4132             Register rn,
4133             Register rm) {
4134    switch (flags) {
4135      case LeaveFlags:
4136        Smull(cond, rdlo, rdhi, rn, rm);
4137        break;
4138      case SetFlags:
4139        Smulls(cond, rdlo, rdhi, rn, rm);
4140        break;
4141      case DontCare:
4142        Smull(cond, rdlo, rdhi, rn, rm);
4143        break;
4144    }
4145  }
4146  void Smull(FlagsUpdate flags,
4147             Register rdlo,
4148             Register rdhi,
4149             Register rn,
4150             Register rm) {
4151    Smull(flags, al, rdlo, rdhi, rn, rm);
4152  }
4153
4154  void Smulls(
4155      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4156    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4158    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4159    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4160    VIXL_ASSERT(allow_macro_instructions_);
4161    VIXL_ASSERT(OutsideITBlock());
4162    MacroEmissionCheckScope guard(this);
4163    ITScope it_scope(this, &cond);
4164    smulls(cond, rdlo, rdhi, rn, rm);
4165  }
4166  void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4167    Smulls(al, rdlo, rdhi, rn, rm);
4168  }
4169
4170  void Smultb(Condition cond, Register rd, Register rn, Register rm) {
4171    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4172    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4173    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4174    VIXL_ASSERT(allow_macro_instructions_);
4175    VIXL_ASSERT(OutsideITBlock());
4176    MacroEmissionCheckScope guard(this);
4177    ITScope it_scope(this, &cond);
4178    smultb(cond, rd, rn, rm);
4179  }
4180  void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); }
4181
4182  void Smultt(Condition cond, Register rd, Register rn, Register rm) {
4183    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4184    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4185    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4186    VIXL_ASSERT(allow_macro_instructions_);
4187    VIXL_ASSERT(OutsideITBlock());
4188    MacroEmissionCheckScope guard(this);
4189    ITScope it_scope(this, &cond);
4190    smultt(cond, rd, rn, rm);
4191  }
4192  void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); }
4193
4194  void Smulwb(Condition cond, Register rd, Register rn, Register rm) {
4195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4196    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4198    VIXL_ASSERT(allow_macro_instructions_);
4199    VIXL_ASSERT(OutsideITBlock());
4200    MacroEmissionCheckScope guard(this);
4201    ITScope it_scope(this, &cond);
4202    smulwb(cond, rd, rn, rm);
4203  }
4204  void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); }
4205
4206  void Smulwt(Condition cond, Register rd, Register rn, Register rm) {
4207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4210    VIXL_ASSERT(allow_macro_instructions_);
4211    VIXL_ASSERT(OutsideITBlock());
4212    MacroEmissionCheckScope guard(this);
4213    ITScope it_scope(this, &cond);
4214    smulwt(cond, rd, rn, rm);
4215  }
4216  void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); }
4217
4218  void Smusd(Condition cond, Register rd, Register rn, Register rm) {
4219    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4220    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4222    VIXL_ASSERT(allow_macro_instructions_);
4223    VIXL_ASSERT(OutsideITBlock());
4224    MacroEmissionCheckScope guard(this);
4225    ITScope it_scope(this, &cond);
4226    smusd(cond, rd, rn, rm);
4227  }
4228  void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); }
4229
4230  void Smusdx(Condition cond, Register rd, Register rn, Register rm) {
4231    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4232    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4233    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4234    VIXL_ASSERT(allow_macro_instructions_);
4235    VIXL_ASSERT(OutsideITBlock());
4236    MacroEmissionCheckScope guard(this);
4237    ITScope it_scope(this, &cond);
4238    smusdx(cond, rd, rn, rm);
4239  }
4240  void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); }
4241
4242  void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
4243    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4244    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4245    VIXL_ASSERT(allow_macro_instructions_);
4246    VIXL_ASSERT(OutsideITBlock());
4247    MacroEmissionCheckScope guard(this);
4248    ITScope it_scope(this, &cond);
4249    ssat(cond, rd, imm, operand);
4250  }
4251  void Ssat(Register rd, uint32_t imm, const Operand& operand) {
4252    Ssat(al, rd, imm, operand);
4253  }
4254
4255  void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) {
4256    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4257    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4258    VIXL_ASSERT(allow_macro_instructions_);
4259    VIXL_ASSERT(OutsideITBlock());
4260    MacroEmissionCheckScope guard(this);
4261    ITScope it_scope(this, &cond);
4262    ssat16(cond, rd, imm, rn);
4263  }
4264  void Ssat16(Register rd, uint32_t imm, Register rn) {
4265    Ssat16(al, rd, imm, rn);
4266  }
4267
4268  void Ssax(Condition cond, Register rd, Register rn, Register rm) {
4269    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4270    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4272    VIXL_ASSERT(allow_macro_instructions_);
4273    VIXL_ASSERT(OutsideITBlock());
4274    MacroEmissionCheckScope guard(this);
4275    ITScope it_scope(this, &cond);
4276    ssax(cond, rd, rn, rm);
4277  }
4278  void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); }
4279
4280  void Ssub16(Condition cond, Register rd, Register rn, Register rm) {
4281    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4282    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4283    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4284    VIXL_ASSERT(allow_macro_instructions_);
4285    VIXL_ASSERT(OutsideITBlock());
4286    MacroEmissionCheckScope guard(this);
4287    ITScope it_scope(this, &cond);
4288    ssub16(cond, rd, rn, rm);
4289  }
4290  void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); }
4291
4292  void Ssub8(Condition cond, Register rd, Register rn, Register rm) {
4293    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4294    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4295    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4296    VIXL_ASSERT(allow_macro_instructions_);
4297    VIXL_ASSERT(OutsideITBlock());
4298    MacroEmissionCheckScope guard(this);
4299    ITScope it_scope(this, &cond);
4300    ssub8(cond, rd, rn, rm);
4301  }
4302  void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); }
4303
4304  void Stl(Condition cond, Register rt, const MemOperand& operand) {
4305    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4306    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4307    VIXL_ASSERT(allow_macro_instructions_);
4308    VIXL_ASSERT(OutsideITBlock());
4309    MacroEmissionCheckScope guard(this);
4310    ITScope it_scope(this, &cond);
4311    stl(cond, rt, operand);
4312  }
4313  void Stl(Register rt, const MemOperand& operand) { Stl(al, rt, operand); }
4314
4315  void Stlb(Condition cond, Register rt, const MemOperand& operand) {
4316    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4317    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4318    VIXL_ASSERT(allow_macro_instructions_);
4319    VIXL_ASSERT(OutsideITBlock());
4320    MacroEmissionCheckScope guard(this);
4321    ITScope it_scope(this, &cond);
4322    stlb(cond, rt, operand);
4323  }
4324  void Stlb(Register rt, const MemOperand& operand) { Stlb(al, rt, operand); }
4325
4326  void Stlex(Condition cond,
4327             Register rd,
4328             Register rt,
4329             const MemOperand& operand) {
4330    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4331    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4332    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4333    VIXL_ASSERT(allow_macro_instructions_);
4334    VIXL_ASSERT(OutsideITBlock());
4335    MacroEmissionCheckScope guard(this);
4336    ITScope it_scope(this, &cond);
4337    stlex(cond, rd, rt, operand);
4338  }
4339  void Stlex(Register rd, Register rt, const MemOperand& operand) {
4340    Stlex(al, rd, rt, operand);
4341  }
4342
4343  void Stlexb(Condition cond,
4344              Register rd,
4345              Register rt,
4346              const MemOperand& operand) {
4347    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4348    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4349    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4350    VIXL_ASSERT(allow_macro_instructions_);
4351    VIXL_ASSERT(OutsideITBlock());
4352    MacroEmissionCheckScope guard(this);
4353    ITScope it_scope(this, &cond);
4354    stlexb(cond, rd, rt, operand);
4355  }
4356  void Stlexb(Register rd, Register rt, const MemOperand& operand) {
4357    Stlexb(al, rd, rt, operand);
4358  }
4359
4360  void Stlexd(Condition cond,
4361              Register rd,
4362              Register rt,
4363              Register rt2,
4364              const MemOperand& operand) {
4365    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4366    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4367    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4368    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4369    VIXL_ASSERT(allow_macro_instructions_);
4370    VIXL_ASSERT(OutsideITBlock());
4371    MacroEmissionCheckScope guard(this);
4372    ITScope it_scope(this, &cond);
4373    stlexd(cond, rd, rt, rt2, operand);
4374  }
4375  void Stlexd(Register rd,
4376              Register rt,
4377              Register rt2,
4378              const MemOperand& operand) {
4379    Stlexd(al, rd, rt, rt2, operand);
4380  }
4381
4382  void Stlexh(Condition cond,
4383              Register rd,
4384              Register rt,
4385              const MemOperand& operand) {
4386    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4387    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4388    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4389    VIXL_ASSERT(allow_macro_instructions_);
4390    VIXL_ASSERT(OutsideITBlock());
4391    MacroEmissionCheckScope guard(this);
4392    ITScope it_scope(this, &cond);
4393    stlexh(cond, rd, rt, operand);
4394  }
4395  void Stlexh(Register rd, Register rt, const MemOperand& operand) {
4396    Stlexh(al, rd, rt, operand);
4397  }
4398
4399  void Stlh(Condition cond, Register rt, const MemOperand& operand) {
4400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4401    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4402    VIXL_ASSERT(allow_macro_instructions_);
4403    VIXL_ASSERT(OutsideITBlock());
4404    MacroEmissionCheckScope guard(this);
4405    ITScope it_scope(this, &cond);
4406    stlh(cond, rt, operand);
4407  }
4408  void Stlh(Register rt, const MemOperand& operand) { Stlh(al, rt, operand); }
4409
4410  void Stm(Condition cond,
4411           Register rn,
4412           WriteBack write_back,
4413           RegisterList registers) {
4414    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4415    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4416    VIXL_ASSERT(allow_macro_instructions_);
4417    VIXL_ASSERT(OutsideITBlock());
4418    MacroEmissionCheckScope guard(this);
4419    ITScope it_scope(this, &cond);
4420    stm(cond, rn, write_back, registers);
4421  }
4422  void Stm(Register rn, WriteBack write_back, RegisterList registers) {
4423    Stm(al, rn, write_back, registers);
4424  }
4425
4426  void Stmda(Condition cond,
4427             Register rn,
4428             WriteBack write_back,
4429             RegisterList registers) {
4430    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4431    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4432    VIXL_ASSERT(allow_macro_instructions_);
4433    VIXL_ASSERT(OutsideITBlock());
4434    MacroEmissionCheckScope guard(this);
4435    ITScope it_scope(this, &cond);
4436    stmda(cond, rn, write_back, registers);
4437  }
4438  void Stmda(Register rn, WriteBack write_back, RegisterList registers) {
4439    Stmda(al, rn, write_back, registers);
4440  }
4441
4442  void Stmdb(Condition cond,
4443             Register rn,
4444             WriteBack write_back,
4445             RegisterList registers) {
4446    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4447    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4448    VIXL_ASSERT(allow_macro_instructions_);
4449    VIXL_ASSERT(OutsideITBlock());
4450    MacroEmissionCheckScope guard(this);
4451    ITScope it_scope(this, &cond);
4452    stmdb(cond, rn, write_back, registers);
4453  }
4454  void Stmdb(Register rn, WriteBack write_back, RegisterList registers) {
4455    Stmdb(al, rn, write_back, registers);
4456  }
4457
4458  void Stmea(Condition cond,
4459             Register rn,
4460             WriteBack write_back,
4461             RegisterList registers) {
4462    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4463    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4464    VIXL_ASSERT(allow_macro_instructions_);
4465    VIXL_ASSERT(OutsideITBlock());
4466    MacroEmissionCheckScope guard(this);
4467    ITScope it_scope(this, &cond);
4468    stmea(cond, rn, write_back, registers);
4469  }
4470  void Stmea(Register rn, WriteBack write_back, RegisterList registers) {
4471    Stmea(al, rn, write_back, registers);
4472  }
4473
4474  void Stmed(Condition cond,
4475             Register rn,
4476             WriteBack write_back,
4477             RegisterList registers) {
4478    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4479    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4480    VIXL_ASSERT(allow_macro_instructions_);
4481    VIXL_ASSERT(OutsideITBlock());
4482    MacroEmissionCheckScope guard(this);
4483    ITScope it_scope(this, &cond);
4484    stmed(cond, rn, write_back, registers);
4485  }
4486  void Stmed(Register rn, WriteBack write_back, RegisterList registers) {
4487    Stmed(al, rn, write_back, registers);
4488  }
4489
4490  void Stmfa(Condition cond,
4491             Register rn,
4492             WriteBack write_back,
4493             RegisterList registers) {
4494    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4495    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4496    VIXL_ASSERT(allow_macro_instructions_);
4497    VIXL_ASSERT(OutsideITBlock());
4498    MacroEmissionCheckScope guard(this);
4499    ITScope it_scope(this, &cond);
4500    stmfa(cond, rn, write_back, registers);
4501  }
4502  void Stmfa(Register rn, WriteBack write_back, RegisterList registers) {
4503    Stmfa(al, rn, write_back, registers);
4504  }
4505
4506  void Stmfd(Condition cond,
4507             Register rn,
4508             WriteBack write_back,
4509             RegisterList registers) {
4510    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4511    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4512    VIXL_ASSERT(allow_macro_instructions_);
4513    VIXL_ASSERT(OutsideITBlock());
4514    MacroEmissionCheckScope guard(this);
4515    ITScope it_scope(this, &cond);
4516    stmfd(cond, rn, write_back, registers);
4517  }
4518  void Stmfd(Register rn, WriteBack write_back, RegisterList registers) {
4519    Stmfd(al, rn, write_back, registers);
4520  }
4521
4522  void Stmib(Condition cond,
4523             Register rn,
4524             WriteBack write_back,
4525             RegisterList registers) {
4526    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4527    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4528    VIXL_ASSERT(allow_macro_instructions_);
4529    VIXL_ASSERT(OutsideITBlock());
4530    MacroEmissionCheckScope guard(this);
4531    ITScope it_scope(this, &cond);
4532    stmib(cond, rn, write_back, registers);
4533  }
4534  void Stmib(Register rn, WriteBack write_back, RegisterList registers) {
4535    Stmib(al, rn, write_back, registers);
4536  }
4537
4538  void Str(Condition cond, Register rt, const MemOperand& operand) {
4539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4540    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4541    VIXL_ASSERT(allow_macro_instructions_);
4542    VIXL_ASSERT(OutsideITBlock());
4543    MacroEmissionCheckScope guard(this);
4544    bool can_use_it =
4545        // STR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4546        (operand.IsImmediate() && rt.IsLow() &&
4547         operand.GetBaseRegister().IsLow() &&
4548         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
4549         (operand.GetAddrMode() == Offset)) ||
4550        // STR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
4551        (operand.IsImmediate() && rt.IsLow() &&
4552         operand.GetBaseRegister().IsSP() &&
4553         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
4554         (operand.GetAddrMode() == Offset)) ||
4555        // STR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4556        (operand.IsPlainRegister() && rt.IsLow() &&
4557         operand.GetBaseRegister().IsLow() &&
4558         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4559         (operand.GetAddrMode() == Offset));
4560    ITScope it_scope(this, &cond, can_use_it);
4561    str(cond, rt, operand);
4562  }
4563  void Str(Register rt, const MemOperand& operand) { Str(al, rt, operand); }
4564
4565  void Strb(Condition cond, Register rt, const MemOperand& operand) {
4566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4567    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4568    VIXL_ASSERT(allow_macro_instructions_);
4569    VIXL_ASSERT(OutsideITBlock());
4570    MacroEmissionCheckScope guard(this);
4571    bool can_use_it =
4572        // STRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4573        (operand.IsImmediate() && rt.IsLow() &&
4574         operand.GetBaseRegister().IsLow() &&
4575         operand.IsOffsetImmediateWithinRange(0, 31) &&
4576         (operand.GetAddrMode() == Offset)) ||
4577        // STRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4578        (operand.IsPlainRegister() && rt.IsLow() &&
4579         operand.GetBaseRegister().IsLow() &&
4580         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4581         (operand.GetAddrMode() == Offset));
4582    ITScope it_scope(this, &cond, can_use_it);
4583    strb(cond, rt, operand);
4584  }
4585  void Strb(Register rt, const MemOperand& operand) { Strb(al, rt, operand); }
4586
4587  void Strd(Condition cond,
4588            Register rt,
4589            Register rt2,
4590            const MemOperand& operand) {
4591    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4592    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4593    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4594    VIXL_ASSERT(allow_macro_instructions_);
4595    VIXL_ASSERT(OutsideITBlock());
4596    MacroEmissionCheckScope guard(this);
4597    ITScope it_scope(this, &cond);
4598    strd(cond, rt, rt2, operand);
4599  }
4600  void Strd(Register rt, Register rt2, const MemOperand& operand) {
4601    Strd(al, rt, rt2, operand);
4602  }
4603
4604  void Strex(Condition cond,
4605             Register rd,
4606             Register rt,
4607             const MemOperand& operand) {
4608    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4609    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4610    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4611    VIXL_ASSERT(allow_macro_instructions_);
4612    VIXL_ASSERT(OutsideITBlock());
4613    MacroEmissionCheckScope guard(this);
4614    ITScope it_scope(this, &cond);
4615    strex(cond, rd, rt, operand);
4616  }
4617  void Strex(Register rd, Register rt, const MemOperand& operand) {
4618    Strex(al, rd, rt, operand);
4619  }
4620
4621  void Strexb(Condition cond,
4622              Register rd,
4623              Register rt,
4624              const MemOperand& operand) {
4625    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4626    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4627    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4628    VIXL_ASSERT(allow_macro_instructions_);
4629    VIXL_ASSERT(OutsideITBlock());
4630    MacroEmissionCheckScope guard(this);
4631    ITScope it_scope(this, &cond);
4632    strexb(cond, rd, rt, operand);
4633  }
4634  void Strexb(Register rd, Register rt, const MemOperand& operand) {
4635    Strexb(al, rd, rt, operand);
4636  }
4637
4638  void Strexd(Condition cond,
4639              Register rd,
4640              Register rt,
4641              Register rt2,
4642              const MemOperand& operand) {
4643    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4645    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4646    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4647    VIXL_ASSERT(allow_macro_instructions_);
4648    VIXL_ASSERT(OutsideITBlock());
4649    MacroEmissionCheckScope guard(this);
4650    ITScope it_scope(this, &cond);
4651    strexd(cond, rd, rt, rt2, operand);
4652  }
4653  void Strexd(Register rd,
4654              Register rt,
4655              Register rt2,
4656              const MemOperand& operand) {
4657    Strexd(al, rd, rt, rt2, operand);
4658  }
4659
4660  void Strexh(Condition cond,
4661              Register rd,
4662              Register rt,
4663              const MemOperand& operand) {
4664    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4665    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4666    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4667    VIXL_ASSERT(allow_macro_instructions_);
4668    VIXL_ASSERT(OutsideITBlock());
4669    MacroEmissionCheckScope guard(this);
4670    ITScope it_scope(this, &cond);
4671    strexh(cond, rd, rt, operand);
4672  }
4673  void Strexh(Register rd, Register rt, const MemOperand& operand) {
4674    Strexh(al, rd, rt, operand);
4675  }
4676
4677  void Strh(Condition cond, Register rt, const MemOperand& operand) {
4678    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4679    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4680    VIXL_ASSERT(allow_macro_instructions_);
4681    VIXL_ASSERT(OutsideITBlock());
4682    MacroEmissionCheckScope guard(this);
4683    bool can_use_it =
4684        // STRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4685        (operand.IsImmediate() && rt.IsLow() &&
4686         operand.GetBaseRegister().IsLow() &&
4687         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
4688         (operand.GetAddrMode() == Offset)) ||
4689        // STRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4690        (operand.IsPlainRegister() && rt.IsLow() &&
4691         operand.GetBaseRegister().IsLow() &&
4692         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4693         (operand.GetAddrMode() == Offset));
4694    ITScope it_scope(this, &cond, can_use_it);
4695    strh(cond, rt, operand);
4696  }
4697  void Strh(Register rt, const MemOperand& operand) { Strh(al, rt, operand); }
4698
4699  void Sub(Condition cond, Register rd, Register rn, const Operand& operand) {
4700    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4701    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4702    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4703    VIXL_ASSERT(allow_macro_instructions_);
4704    VIXL_ASSERT(OutsideITBlock());
4705    MacroEmissionCheckScope guard(this);
4706    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
4707      uint32_t immediate = operand.GetImmediate();
4708      if (immediate == 0) {
4709        return;
4710      }
4711    }
4712    bool can_use_it =
4713        // SUB<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
4714        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
4715         rd.IsLow()) ||
4716        // SUB<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
4717        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
4718         rd.IsLow() && rn.Is(rd)) ||
4719        // SUB<c>{<q>} <Rd>, <Rn>, <Rm>
4720        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4721         operand.GetBaseRegister().IsLow());
4722    ITScope it_scope(this, &cond, can_use_it);
4723    sub(cond, rd, rn, operand);
4724  }
4725  void Sub(Register rd, Register rn, const Operand& operand) {
4726    Sub(al, rd, rn, operand);
4727  }
4728  void Sub(FlagsUpdate flags,
4729           Condition cond,
4730           Register rd,
4731           Register rn,
4732           const Operand& operand) {
4733    switch (flags) {
4734      case LeaveFlags:
4735        Sub(cond, rd, rn, operand);
4736        break;
4737      case SetFlags:
4738        Subs(cond, rd, rn, operand);
4739        break;
4740      case DontCare:
4741        bool setflags_is_smaller =
4742            IsUsingT32() && cond.Is(al) &&
4743            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4744              operand.GetBaseRegister().IsLow()) ||
4745             (operand.IsImmediate() &&
4746              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
4747               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
4748        if (setflags_is_smaller) {
4749          Subs(cond, rd, rn, operand);
4750        } else {
4751          bool changed_op_is_smaller =
4752              operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
4753              ((rd.IsLow() && rn.IsLow() &&
4754                (operand.GetSignedImmediate() >= -7)) ||
4755               (rd.IsLow() && rn.Is(rd) &&
4756                (operand.GetSignedImmediate() >= -255)));
4757          if (changed_op_is_smaller) {
4758            Adds(cond, rd, rn, -operand.GetSignedImmediate());
4759          } else {
4760            Sub(cond, rd, rn, operand);
4761          }
4762        }
4763        break;
4764    }
4765  }
4766  void Sub(FlagsUpdate flags,
4767           Register rd,
4768           Register rn,
4769           const Operand& operand) {
4770    Sub(flags, al, rd, rn, operand);
4771  }
4772
4773  void Subs(Condition cond, Register rd, Register rn, const Operand& operand) {
4774    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4775    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4776    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4777    VIXL_ASSERT(allow_macro_instructions_);
4778    VIXL_ASSERT(OutsideITBlock());
4779    MacroEmissionCheckScope guard(this);
4780    ITScope it_scope(this, &cond);
4781    subs(cond, rd, rn, operand);
4782  }
4783  void Subs(Register rd, Register rn, const Operand& operand) {
4784    Subs(al, rd, rn, operand);
4785  }
4786
4787  void Svc(Condition cond, uint32_t imm) {
4788    VIXL_ASSERT(allow_macro_instructions_);
4789    VIXL_ASSERT(OutsideITBlock());
4790    MacroEmissionCheckScope guard(this);
4791    ITScope it_scope(this, &cond);
4792    svc(cond, imm);
4793  }
4794  void Svc(uint32_t imm) { Svc(al, imm); }
4795
4796  void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
4797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4799    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4800    VIXL_ASSERT(allow_macro_instructions_);
4801    VIXL_ASSERT(OutsideITBlock());
4802    MacroEmissionCheckScope guard(this);
4803    ITScope it_scope(this, &cond);
4804    sxtab(cond, rd, rn, operand);
4805  }
4806  void Sxtab(Register rd, Register rn, const Operand& operand) {
4807    Sxtab(al, rd, rn, operand);
4808  }
4809
4810  void Sxtab16(Condition cond,
4811               Register rd,
4812               Register rn,
4813               const Operand& operand) {
4814    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4815    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4816    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4817    VIXL_ASSERT(allow_macro_instructions_);
4818    VIXL_ASSERT(OutsideITBlock());
4819    MacroEmissionCheckScope guard(this);
4820    ITScope it_scope(this, &cond);
4821    sxtab16(cond, rd, rn, operand);
4822  }
4823  void Sxtab16(Register rd, Register rn, const Operand& operand) {
4824    Sxtab16(al, rd, rn, operand);
4825  }
4826
4827  void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
4828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4829    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4830    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4831    VIXL_ASSERT(allow_macro_instructions_);
4832    VIXL_ASSERT(OutsideITBlock());
4833    MacroEmissionCheckScope guard(this);
4834    ITScope it_scope(this, &cond);
4835    sxtah(cond, rd, rn, operand);
4836  }
4837  void Sxtah(Register rd, Register rn, const Operand& operand) {
4838    Sxtah(al, rd, rn, operand);
4839  }
4840
4841  void Sxtb(Condition cond, Register rd, const Operand& operand) {
4842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4843    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4844    VIXL_ASSERT(allow_macro_instructions_);
4845    VIXL_ASSERT(OutsideITBlock());
4846    MacroEmissionCheckScope guard(this);
4847    ITScope it_scope(this, &cond);
4848    sxtb(cond, rd, operand);
4849  }
4850  void Sxtb(Register rd, const Operand& operand) { Sxtb(al, rd, operand); }
4851
4852  void Sxtb16(Condition cond, Register rd, const Operand& operand) {
4853    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4854    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4855    VIXL_ASSERT(allow_macro_instructions_);
4856    VIXL_ASSERT(OutsideITBlock());
4857    MacroEmissionCheckScope guard(this);
4858    ITScope it_scope(this, &cond);
4859    sxtb16(cond, rd, operand);
4860  }
4861  void Sxtb16(Register rd, const Operand& operand) { Sxtb16(al, rd, operand); }
4862
4863  void Sxth(Condition cond, Register rd, const Operand& operand) {
4864    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4865    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4866    VIXL_ASSERT(allow_macro_instructions_);
4867    VIXL_ASSERT(OutsideITBlock());
4868    MacroEmissionCheckScope guard(this);
4869    ITScope it_scope(this, &cond);
4870    sxth(cond, rd, operand);
4871  }
4872  void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); }
4873
4874  void Teq(Condition cond, Register rn, const Operand& operand) {
4875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4876    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4877    VIXL_ASSERT(allow_macro_instructions_);
4878    VIXL_ASSERT(OutsideITBlock());
4879    MacroEmissionCheckScope guard(this);
4880    ITScope it_scope(this, &cond);
4881    teq(cond, rn, operand);
4882  }
4883  void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); }
4884
4885  void Tst(Condition cond, Register rn, const Operand& operand) {
4886    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4887    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4888    VIXL_ASSERT(allow_macro_instructions_);
4889    VIXL_ASSERT(OutsideITBlock());
4890    MacroEmissionCheckScope guard(this);
4891    bool can_use_it =
4892        // TST{<c>}{<q>} <Rn>, <Rm> ; T1
4893        operand.IsPlainRegister() && rn.IsLow() &&
4894        operand.GetBaseRegister().IsLow();
4895    ITScope it_scope(this, &cond, can_use_it);
4896    tst(cond, rn, operand);
4897  }
4898  void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); }
4899
4900  void Uadd16(Condition cond, Register rd, Register rn, Register rm) {
4901    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4902    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4903    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4904    VIXL_ASSERT(allow_macro_instructions_);
4905    VIXL_ASSERT(OutsideITBlock());
4906    MacroEmissionCheckScope guard(this);
4907    ITScope it_scope(this, &cond);
4908    uadd16(cond, rd, rn, rm);
4909  }
4910  void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); }
4911
4912  void Uadd8(Condition cond, Register rd, Register rn, Register rm) {
4913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4916    VIXL_ASSERT(allow_macro_instructions_);
4917    VIXL_ASSERT(OutsideITBlock());
4918    MacroEmissionCheckScope guard(this);
4919    ITScope it_scope(this, &cond);
4920    uadd8(cond, rd, rn, rm);
4921  }
4922  void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); }
4923
4924  void Uasx(Condition cond, Register rd, Register rn, Register rm) {
4925    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4926    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4927    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4928    VIXL_ASSERT(allow_macro_instructions_);
4929    VIXL_ASSERT(OutsideITBlock());
4930    MacroEmissionCheckScope guard(this);
4931    ITScope it_scope(this, &cond);
4932    uasx(cond, rd, rn, rm);
4933  }
4934  void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); }
4935
4936  void Ubfx(Condition cond,
4937            Register rd,
4938            Register rn,
4939            uint32_t lsb,
4940            const Operand& operand) {
4941    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4942    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4943    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4944    VIXL_ASSERT(allow_macro_instructions_);
4945    VIXL_ASSERT(OutsideITBlock());
4946    MacroEmissionCheckScope guard(this);
4947    ITScope it_scope(this, &cond);
4948    ubfx(cond, rd, rn, lsb, operand);
4949  }
4950  void Ubfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
4951    Ubfx(al, rd, rn, lsb, operand);
4952  }
4953
4954  void Udf(Condition cond, uint32_t imm) {
4955    VIXL_ASSERT(allow_macro_instructions_);
4956    VIXL_ASSERT(OutsideITBlock());
4957    MacroEmissionCheckScope guard(this);
4958    ITScope it_scope(this, &cond);
4959    udf(cond, imm);
4960  }
4961  void Udf(uint32_t imm) { Udf(al, imm); }
4962
4963  void Udiv(Condition cond, Register rd, Register rn, Register rm) {
4964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4965    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4966    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4967    VIXL_ASSERT(allow_macro_instructions_);
4968    VIXL_ASSERT(OutsideITBlock());
4969    MacroEmissionCheckScope guard(this);
4970    ITScope it_scope(this, &cond);
4971    udiv(cond, rd, rn, rm);
4972  }
4973  void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); }
4974
4975  void Uhadd16(Condition cond, Register rd, Register rn, Register rm) {
4976    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4977    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4978    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4979    VIXL_ASSERT(allow_macro_instructions_);
4980    VIXL_ASSERT(OutsideITBlock());
4981    MacroEmissionCheckScope guard(this);
4982    ITScope it_scope(this, &cond);
4983    uhadd16(cond, rd, rn, rm);
4984  }
4985  void Uhadd16(Register rd, Register rn, Register rm) {
4986    Uhadd16(al, rd, rn, rm);
4987  }
4988
4989  void Uhadd8(Condition cond, Register rd, Register rn, Register rm) {
4990    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4991    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4992    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4993    VIXL_ASSERT(allow_macro_instructions_);
4994    VIXL_ASSERT(OutsideITBlock());
4995    MacroEmissionCheckScope guard(this);
4996    ITScope it_scope(this, &cond);
4997    uhadd8(cond, rd, rn, rm);
4998  }
4999  void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); }
5000
5001  void Uhasx(Condition cond, Register rd, Register rn, Register rm) {
5002    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5003    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5004    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5005    VIXL_ASSERT(allow_macro_instructions_);
5006    VIXL_ASSERT(OutsideITBlock());
5007    MacroEmissionCheckScope guard(this);
5008    ITScope it_scope(this, &cond);
5009    uhasx(cond, rd, rn, rm);
5010  }
5011  void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); }
5012
5013  void Uhsax(Condition cond, Register rd, Register rn, Register rm) {
5014    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5015    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5016    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5017    VIXL_ASSERT(allow_macro_instructions_);
5018    VIXL_ASSERT(OutsideITBlock());
5019    MacroEmissionCheckScope guard(this);
5020    ITScope it_scope(this, &cond);
5021    uhsax(cond, rd, rn, rm);
5022  }
5023  void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); }
5024
5025  void Uhsub16(Condition cond, Register rd, Register rn, Register rm) {
5026    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5027    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5028    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5029    VIXL_ASSERT(allow_macro_instructions_);
5030    VIXL_ASSERT(OutsideITBlock());
5031    MacroEmissionCheckScope guard(this);
5032    ITScope it_scope(this, &cond);
5033    uhsub16(cond, rd, rn, rm);
5034  }
5035  void Uhsub16(Register rd, Register rn, Register rm) {
5036    Uhsub16(al, rd, rn, rm);
5037  }
5038
5039  void Uhsub8(Condition cond, Register rd, Register rn, Register rm) {
5040    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5041    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5042    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5043    VIXL_ASSERT(allow_macro_instructions_);
5044    VIXL_ASSERT(OutsideITBlock());
5045    MacroEmissionCheckScope guard(this);
5046    ITScope it_scope(this, &cond);
5047    uhsub8(cond, rd, rn, rm);
5048  }
5049  void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); }
5050
5051  void Umaal(
5052      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5053    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5054    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5055    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5056    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5057    VIXL_ASSERT(allow_macro_instructions_);
5058    VIXL_ASSERT(OutsideITBlock());
5059    MacroEmissionCheckScope guard(this);
5060    ITScope it_scope(this, &cond);
5061    umaal(cond, rdlo, rdhi, rn, rm);
5062  }
5063  void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
5064    Umaal(al, rdlo, rdhi, rn, rm);
5065  }
5066
5067  void Umlal(
5068      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5070    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5071    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5072    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5073    VIXL_ASSERT(allow_macro_instructions_);
5074    VIXL_ASSERT(OutsideITBlock());
5075    MacroEmissionCheckScope guard(this);
5076    ITScope it_scope(this, &cond);
5077    umlal(cond, rdlo, rdhi, rn, rm);
5078  }
5079  void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
5080    Umlal(al, rdlo, rdhi, rn, rm);
5081  }
5082  void Umlal(FlagsUpdate flags,
5083             Condition cond,
5084             Register rdlo,
5085             Register rdhi,
5086             Register rn,
5087             Register rm) {
5088    switch (flags) {
5089      case LeaveFlags:
5090        Umlal(cond, rdlo, rdhi, rn, rm);
5091        break;
5092      case SetFlags:
5093        Umlals(cond, rdlo, rdhi, rn, rm);
5094        break;
5095      case DontCare:
5096        Umlal(cond, rdlo, rdhi, rn, rm);
5097        break;
5098    }
5099  }
5100  void Umlal(FlagsUpdate flags,
5101             Register rdlo,
5102             Register rdhi,
5103             Register rn,
5104             Register rm) {
5105    Umlal(flags, al, rdlo, rdhi, rn, rm);
5106  }
5107
5108  void Umlals(
5109      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5110    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5112    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5113    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5114    VIXL_ASSERT(allow_macro_instructions_);
5115    VIXL_ASSERT(OutsideITBlock());
5116    MacroEmissionCheckScope guard(this);
5117    ITScope it_scope(this, &cond);
5118    umlals(cond, rdlo, rdhi, rn, rm);
5119  }
5120  void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
5121    Umlals(al, rdlo, rdhi, rn, rm);
5122  }
5123
5124  void Umull(
5125      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5126    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5129    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5130    VIXL_ASSERT(allow_macro_instructions_);
5131    VIXL_ASSERT(OutsideITBlock());
5132    MacroEmissionCheckScope guard(this);
5133    ITScope it_scope(this, &cond);
5134    umull(cond, rdlo, rdhi, rn, rm);
5135  }
5136  void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
5137    Umull(al, rdlo, rdhi, rn, rm);
5138  }
5139  void Umull(FlagsUpdate flags,
5140             Condition cond,
5141             Register rdlo,
5142             Register rdhi,
5143             Register rn,
5144             Register rm) {
5145    switch (flags) {
5146      case LeaveFlags:
5147        Umull(cond, rdlo, rdhi, rn, rm);
5148        break;
5149      case SetFlags:
5150        Umulls(cond, rdlo, rdhi, rn, rm);
5151        break;
5152      case DontCare:
5153        Umull(cond, rdlo, rdhi, rn, rm);
5154        break;
5155    }
5156  }
5157  void Umull(FlagsUpdate flags,
5158             Register rdlo,
5159             Register rdhi,
5160             Register rn,
5161             Register rm) {
5162    Umull(flags, al, rdlo, rdhi, rn, rm);
5163  }
5164
5165  void Umulls(
5166      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5167    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5168    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5169    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5170    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5171    VIXL_ASSERT(allow_macro_instructions_);
5172    VIXL_ASSERT(OutsideITBlock());
5173    MacroEmissionCheckScope guard(this);
5174    ITScope it_scope(this, &cond);
5175    umulls(cond, rdlo, rdhi, rn, rm);
5176  }
5177  void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
5178    Umulls(al, rdlo, rdhi, rn, rm);
5179  }
5180
5181  void Uqadd16(Condition cond, Register rd, Register rn, Register rm) {
5182    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5183    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5184    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5185    VIXL_ASSERT(allow_macro_instructions_);
5186    VIXL_ASSERT(OutsideITBlock());
5187    MacroEmissionCheckScope guard(this);
5188    ITScope it_scope(this, &cond);
5189    uqadd16(cond, rd, rn, rm);
5190  }
5191  void Uqadd16(Register rd, Register rn, Register rm) {
5192    Uqadd16(al, rd, rn, rm);
5193  }
5194
5195  void Uqadd8(Condition cond, Register rd, Register rn, Register rm) {
5196    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5198    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5199    VIXL_ASSERT(allow_macro_instructions_);
5200    VIXL_ASSERT(OutsideITBlock());
5201    MacroEmissionCheckScope guard(this);
5202    ITScope it_scope(this, &cond);
5203    uqadd8(cond, rd, rn, rm);
5204  }
5205  void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); }
5206
5207  void Uqasx(Condition cond, Register rd, Register rn, Register rm) {
5208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5210    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5211    VIXL_ASSERT(allow_macro_instructions_);
5212    VIXL_ASSERT(OutsideITBlock());
5213    MacroEmissionCheckScope guard(this);
5214    ITScope it_scope(this, &cond);
5215    uqasx(cond, rd, rn, rm);
5216  }
5217  void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); }
5218
5219  void Uqsax(Condition cond, Register rd, Register rn, Register rm) {
5220    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5223    VIXL_ASSERT(allow_macro_instructions_);
5224    VIXL_ASSERT(OutsideITBlock());
5225    MacroEmissionCheckScope guard(this);
5226    ITScope it_scope(this, &cond);
5227    uqsax(cond, rd, rn, rm);
5228  }
5229  void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); }
5230
5231  void Uqsub16(Condition cond, Register rd, Register rn, Register rm) {
5232    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5233    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5234    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5235    VIXL_ASSERT(allow_macro_instructions_);
5236    VIXL_ASSERT(OutsideITBlock());
5237    MacroEmissionCheckScope guard(this);
5238    ITScope it_scope(this, &cond);
5239    uqsub16(cond, rd, rn, rm);
5240  }
5241  void Uqsub16(Register rd, Register rn, Register rm) {
5242    Uqsub16(al, rd, rn, rm);
5243  }
5244
5245  void Uqsub8(Condition cond, Register rd, Register rn, Register rm) {
5246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5247    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5248    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5249    VIXL_ASSERT(allow_macro_instructions_);
5250    VIXL_ASSERT(OutsideITBlock());
5251    MacroEmissionCheckScope guard(this);
5252    ITScope it_scope(this, &cond);
5253    uqsub8(cond, rd, rn, rm);
5254  }
5255  void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); }
5256
5257  void Usad8(Condition cond, Register rd, Register rn, Register rm) {
5258    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5259    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5260    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5261    VIXL_ASSERT(allow_macro_instructions_);
5262    VIXL_ASSERT(OutsideITBlock());
5263    MacroEmissionCheckScope guard(this);
5264    ITScope it_scope(this, &cond);
5265    usad8(cond, rd, rn, rm);
5266  }
5267  void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); }
5268
5269  void Usada8(
5270      Condition cond, Register rd, Register rn, Register rm, Register ra) {
5271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5272    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5273    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5274    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
5275    VIXL_ASSERT(allow_macro_instructions_);
5276    VIXL_ASSERT(OutsideITBlock());
5277    MacroEmissionCheckScope guard(this);
5278    ITScope it_scope(this, &cond);
5279    usada8(cond, rd, rn, rm, ra);
5280  }
5281  void Usada8(Register rd, Register rn, Register rm, Register ra) {
5282    Usada8(al, rd, rn, rm, ra);
5283  }
5284
5285  void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
5286    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5287    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5288    VIXL_ASSERT(allow_macro_instructions_);
5289    VIXL_ASSERT(OutsideITBlock());
5290    MacroEmissionCheckScope guard(this);
5291    ITScope it_scope(this, &cond);
5292    usat(cond, rd, imm, operand);
5293  }
5294  void Usat(Register rd, uint32_t imm, const Operand& operand) {
5295    Usat(al, rd, imm, operand);
5296  }
5297
5298  void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) {
5299    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5300    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5301    VIXL_ASSERT(allow_macro_instructions_);
5302    VIXL_ASSERT(OutsideITBlock());
5303    MacroEmissionCheckScope guard(this);
5304    ITScope it_scope(this, &cond);
5305    usat16(cond, rd, imm, rn);
5306  }
5307  void Usat16(Register rd, uint32_t imm, Register rn) {
5308    Usat16(al, rd, imm, rn);
5309  }
5310
5311  void Usax(Condition cond, Register rd, Register rn, Register rm) {
5312    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5313    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5314    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5315    VIXL_ASSERT(allow_macro_instructions_);
5316    VIXL_ASSERT(OutsideITBlock());
5317    MacroEmissionCheckScope guard(this);
5318    ITScope it_scope(this, &cond);
5319    usax(cond, rd, rn, rm);
5320  }
5321  void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); }
5322
5323  void Usub16(Condition cond, Register rd, Register rn, Register rm) {
5324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5327    VIXL_ASSERT(allow_macro_instructions_);
5328    VIXL_ASSERT(OutsideITBlock());
5329    MacroEmissionCheckScope guard(this);
5330    ITScope it_scope(this, &cond);
5331    usub16(cond, rd, rn, rm);
5332  }
5333  void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); }
5334
5335  void Usub8(Condition cond, Register rd, Register rn, Register rm) {
5336    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5337    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5338    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5339    VIXL_ASSERT(allow_macro_instructions_);
5340    VIXL_ASSERT(OutsideITBlock());
5341    MacroEmissionCheckScope guard(this);
5342    ITScope it_scope(this, &cond);
5343    usub8(cond, rd, rn, rm);
5344  }
5345  void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); }
5346
5347  void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
5348    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5349    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5350    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5351    VIXL_ASSERT(allow_macro_instructions_);
5352    VIXL_ASSERT(OutsideITBlock());
5353    MacroEmissionCheckScope guard(this);
5354    ITScope it_scope(this, &cond);
5355    uxtab(cond, rd, rn, operand);
5356  }
5357  void Uxtab(Register rd, Register rn, const Operand& operand) {
5358    Uxtab(al, rd, rn, operand);
5359  }
5360
5361  void Uxtab16(Condition cond,
5362               Register rd,
5363               Register rn,
5364               const Operand& operand) {
5365    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5366    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5367    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5368    VIXL_ASSERT(allow_macro_instructions_);
5369    VIXL_ASSERT(OutsideITBlock());
5370    MacroEmissionCheckScope guard(this);
5371    ITScope it_scope(this, &cond);
5372    uxtab16(cond, rd, rn, operand);
5373  }
5374  void Uxtab16(Register rd, Register rn, const Operand& operand) {
5375    Uxtab16(al, rd, rn, operand);
5376  }
5377
5378  void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
5379    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5380    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5381    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5382    VIXL_ASSERT(allow_macro_instructions_);
5383    VIXL_ASSERT(OutsideITBlock());
5384    MacroEmissionCheckScope guard(this);
5385    ITScope it_scope(this, &cond);
5386    uxtah(cond, rd, rn, operand);
5387  }
5388  void Uxtah(Register rd, Register rn, const Operand& operand) {
5389    Uxtah(al, rd, rn, operand);
5390  }
5391
5392  void Uxtb(Condition cond, Register rd, const Operand& operand) {
5393    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5394    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5395    VIXL_ASSERT(allow_macro_instructions_);
5396    VIXL_ASSERT(OutsideITBlock());
5397    MacroEmissionCheckScope guard(this);
5398    ITScope it_scope(this, &cond);
5399    uxtb(cond, rd, operand);
5400  }
5401  void Uxtb(Register rd, const Operand& operand) { Uxtb(al, rd, operand); }
5402
5403  void Uxtb16(Condition cond, Register rd, const Operand& operand) {
5404    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5405    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5406    VIXL_ASSERT(allow_macro_instructions_);
5407    VIXL_ASSERT(OutsideITBlock());
5408    MacroEmissionCheckScope guard(this);
5409    ITScope it_scope(this, &cond);
5410    uxtb16(cond, rd, operand);
5411  }
5412  void Uxtb16(Register rd, const Operand& operand) { Uxtb16(al, rd, operand); }
5413
5414  void Uxth(Condition cond, Register rd, const Operand& operand) {
5415    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5416    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5417    VIXL_ASSERT(allow_macro_instructions_);
5418    VIXL_ASSERT(OutsideITBlock());
5419    MacroEmissionCheckScope guard(this);
5420    ITScope it_scope(this, &cond);
5421    uxth(cond, rd, operand);
5422  }
5423  void Uxth(Register rd, const Operand& operand) { Uxth(al, rd, operand); }
5424
5425  void Vaba(
5426      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5427    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5428    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5429    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5430    VIXL_ASSERT(allow_macro_instructions_);
5431    VIXL_ASSERT(OutsideITBlock());
5432    MacroEmissionCheckScope guard(this);
5433    ITScope it_scope(this, &cond);
5434    vaba(cond, dt, rd, rn, rm);
5435  }
5436  void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5437    Vaba(al, dt, rd, rn, rm);
5438  }
5439
5440  void Vaba(
5441      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5442    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5443    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5444    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5445    VIXL_ASSERT(allow_macro_instructions_);
5446    VIXL_ASSERT(OutsideITBlock());
5447    MacroEmissionCheckScope guard(this);
5448    ITScope it_scope(this, &cond);
5449    vaba(cond, dt, rd, rn, rm);
5450  }
5451  void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5452    Vaba(al, dt, rd, rn, rm);
5453  }
5454
5455  void Vabal(
5456      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5457    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5458    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5459    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5460    VIXL_ASSERT(allow_macro_instructions_);
5461    VIXL_ASSERT(OutsideITBlock());
5462    MacroEmissionCheckScope guard(this);
5463    ITScope it_scope(this, &cond);
5464    vabal(cond, dt, rd, rn, rm);
5465  }
5466  void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5467    Vabal(al, dt, rd, rn, rm);
5468  }
5469
5470  void Vabd(
5471      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5472    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5473    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5474    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5475    VIXL_ASSERT(allow_macro_instructions_);
5476    VIXL_ASSERT(OutsideITBlock());
5477    MacroEmissionCheckScope guard(this);
5478    ITScope it_scope(this, &cond);
5479    vabd(cond, dt, rd, rn, rm);
5480  }
5481  void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5482    Vabd(al, dt, rd, rn, rm);
5483  }
5484
5485  void Vabd(
5486      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5488    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5490    VIXL_ASSERT(allow_macro_instructions_);
5491    VIXL_ASSERT(OutsideITBlock());
5492    MacroEmissionCheckScope guard(this);
5493    ITScope it_scope(this, &cond);
5494    vabd(cond, dt, rd, rn, rm);
5495  }
5496  void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5497    Vabd(al, dt, rd, rn, rm);
5498  }
5499
5500  void Vabdl(
5501      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5502    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5504    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5505    VIXL_ASSERT(allow_macro_instructions_);
5506    VIXL_ASSERT(OutsideITBlock());
5507    MacroEmissionCheckScope guard(this);
5508    ITScope it_scope(this, &cond);
5509    vabdl(cond, dt, rd, rn, rm);
5510  }
5511  void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5512    Vabdl(al, dt, rd, rn, rm);
5513  }
5514
5515  void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
5516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5517    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5518    VIXL_ASSERT(allow_macro_instructions_);
5519    VIXL_ASSERT(OutsideITBlock());
5520    MacroEmissionCheckScope guard(this);
5521    ITScope it_scope(this, &cond);
5522    vabs(cond, dt, rd, rm);
5523  }
5524  void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); }
5525
5526  void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
5527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5528    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5529    VIXL_ASSERT(allow_macro_instructions_);
5530    VIXL_ASSERT(OutsideITBlock());
5531    MacroEmissionCheckScope guard(this);
5532    ITScope it_scope(this, &cond);
5533    vabs(cond, dt, rd, rm);
5534  }
5535  void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); }
5536
5537  void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) {
5538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5540    VIXL_ASSERT(allow_macro_instructions_);
5541    VIXL_ASSERT(OutsideITBlock());
5542    MacroEmissionCheckScope guard(this);
5543    ITScope it_scope(this, &cond);
5544    vabs(cond, dt, rd, rm);
5545  }
5546  void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); }
5547
5548  void Vacge(
5549      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5550    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5551    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5552    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5553    VIXL_ASSERT(allow_macro_instructions_);
5554    VIXL_ASSERT(OutsideITBlock());
5555    MacroEmissionCheckScope guard(this);
5556    ITScope it_scope(this, &cond);
5557    vacge(cond, dt, rd, rn, rm);
5558  }
5559  void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5560    Vacge(al, dt, rd, rn, rm);
5561  }
5562
5563  void Vacge(
5564      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5565    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5567    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5568    VIXL_ASSERT(allow_macro_instructions_);
5569    VIXL_ASSERT(OutsideITBlock());
5570    MacroEmissionCheckScope guard(this);
5571    ITScope it_scope(this, &cond);
5572    vacge(cond, dt, rd, rn, rm);
5573  }
5574  void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5575    Vacge(al, dt, rd, rn, rm);
5576  }
5577
5578  void Vacgt(
5579      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5581    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5583    VIXL_ASSERT(allow_macro_instructions_);
5584    VIXL_ASSERT(OutsideITBlock());
5585    MacroEmissionCheckScope guard(this);
5586    ITScope it_scope(this, &cond);
5587    vacgt(cond, dt, rd, rn, rm);
5588  }
5589  void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5590    Vacgt(al, dt, rd, rn, rm);
5591  }
5592
5593  void Vacgt(
5594      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5595    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5596    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5598    VIXL_ASSERT(allow_macro_instructions_);
5599    VIXL_ASSERT(OutsideITBlock());
5600    MacroEmissionCheckScope guard(this);
5601    ITScope it_scope(this, &cond);
5602    vacgt(cond, dt, rd, rn, rm);
5603  }
5604  void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5605    Vacgt(al, dt, rd, rn, rm);
5606  }
5607
5608  void Vacle(
5609      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5610    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5611    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5612    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5613    VIXL_ASSERT(allow_macro_instructions_);
5614    VIXL_ASSERT(OutsideITBlock());
5615    MacroEmissionCheckScope guard(this);
5616    ITScope it_scope(this, &cond);
5617    vacle(cond, dt, rd, rn, rm);
5618  }
5619  void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5620    Vacle(al, dt, rd, rn, rm);
5621  }
5622
5623  void Vacle(
5624      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5625    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5626    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5627    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5628    VIXL_ASSERT(allow_macro_instructions_);
5629    VIXL_ASSERT(OutsideITBlock());
5630    MacroEmissionCheckScope guard(this);
5631    ITScope it_scope(this, &cond);
5632    vacle(cond, dt, rd, rn, rm);
5633  }
5634  void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5635    Vacle(al, dt, rd, rn, rm);
5636  }
5637
5638  void Vaclt(
5639      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5640    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5641    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5642    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5643    VIXL_ASSERT(allow_macro_instructions_);
5644    VIXL_ASSERT(OutsideITBlock());
5645    MacroEmissionCheckScope guard(this);
5646    ITScope it_scope(this, &cond);
5647    vaclt(cond, dt, rd, rn, rm);
5648  }
5649  void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5650    Vaclt(al, dt, rd, rn, rm);
5651  }
5652
5653  void Vaclt(
5654      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5655    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5656    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5657    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5658    VIXL_ASSERT(allow_macro_instructions_);
5659    VIXL_ASSERT(OutsideITBlock());
5660    MacroEmissionCheckScope guard(this);
5661    ITScope it_scope(this, &cond);
5662    vaclt(cond, dt, rd, rn, rm);
5663  }
5664  void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5665    Vaclt(al, dt, rd, rn, rm);
5666  }
5667
5668  void Vadd(
5669      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5671    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5672    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5673    VIXL_ASSERT(allow_macro_instructions_);
5674    VIXL_ASSERT(OutsideITBlock());
5675    MacroEmissionCheckScope guard(this);
5676    ITScope it_scope(this, &cond);
5677    vadd(cond, dt, rd, rn, rm);
5678  }
5679  void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5680    Vadd(al, dt, rd, rn, rm);
5681  }
5682
5683  void Vadd(
5684      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5686    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5687    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5688    VIXL_ASSERT(allow_macro_instructions_);
5689    VIXL_ASSERT(OutsideITBlock());
5690    MacroEmissionCheckScope guard(this);
5691    ITScope it_scope(this, &cond);
5692    vadd(cond, dt, rd, rn, rm);
5693  }
5694  void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5695    Vadd(al, dt, rd, rn, rm);
5696  }
5697
5698  void Vadd(
5699      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5700    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5701    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5702    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5703    VIXL_ASSERT(allow_macro_instructions_);
5704    VIXL_ASSERT(OutsideITBlock());
5705    MacroEmissionCheckScope guard(this);
5706    ITScope it_scope(this, &cond);
5707    vadd(cond, dt, rd, rn, rm);
5708  }
5709  void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5710    Vadd(al, dt, rd, rn, rm);
5711  }
5712
5713  void Vaddhn(
5714      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5716    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5717    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5718    VIXL_ASSERT(allow_macro_instructions_);
5719    VIXL_ASSERT(OutsideITBlock());
5720    MacroEmissionCheckScope guard(this);
5721    ITScope it_scope(this, &cond);
5722    vaddhn(cond, dt, rd, rn, rm);
5723  }
5724  void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5725    Vaddhn(al, dt, rd, rn, rm);
5726  }
5727
5728  void Vaddl(
5729      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5733    VIXL_ASSERT(allow_macro_instructions_);
5734    VIXL_ASSERT(OutsideITBlock());
5735    MacroEmissionCheckScope guard(this);
5736    ITScope it_scope(this, &cond);
5737    vaddl(cond, dt, rd, rn, rm);
5738  }
5739  void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5740    Vaddl(al, dt, rd, rn, rm);
5741  }
5742
5743  void Vaddw(
5744      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5745    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5746    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5748    VIXL_ASSERT(allow_macro_instructions_);
5749    VIXL_ASSERT(OutsideITBlock());
5750    MacroEmissionCheckScope guard(this);
5751    ITScope it_scope(this, &cond);
5752    vaddw(cond, dt, rd, rn, rm);
5753  }
5754  void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5755    Vaddw(al, dt, rd, rn, rm);
5756  }
5757
5758  void Vand(Condition cond,
5759            DataType dt,
5760            DRegister rd,
5761            DRegister rn,
5762            const DOperand& operand) {
5763    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5764    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5765    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5766    VIXL_ASSERT(allow_macro_instructions_);
5767    VIXL_ASSERT(OutsideITBlock());
5768    MacroEmissionCheckScope guard(this);
5769    ITScope it_scope(this, &cond);
5770    vand(cond, dt, rd, rn, operand);
5771  }
5772  void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5773    Vand(al, dt, rd, rn, operand);
5774  }
5775
5776  void Vand(Condition cond,
5777            DataType dt,
5778            QRegister rd,
5779            QRegister rn,
5780            const QOperand& operand) {
5781    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5782    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5783    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5784    VIXL_ASSERT(allow_macro_instructions_);
5785    VIXL_ASSERT(OutsideITBlock());
5786    MacroEmissionCheckScope guard(this);
5787    ITScope it_scope(this, &cond);
5788    vand(cond, dt, rd, rn, operand);
5789  }
5790  void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5791    Vand(al, dt, rd, rn, operand);
5792  }
5793
5794  void Vbic(Condition cond,
5795            DataType dt,
5796            DRegister rd,
5797            DRegister rn,
5798            const DOperand& operand) {
5799    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5800    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5801    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5802    VIXL_ASSERT(allow_macro_instructions_);
5803    VIXL_ASSERT(OutsideITBlock());
5804    MacroEmissionCheckScope guard(this);
5805    ITScope it_scope(this, &cond);
5806    vbic(cond, dt, rd, rn, operand);
5807  }
5808  void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5809    Vbic(al, dt, rd, rn, operand);
5810  }
5811
5812  void Vbic(Condition cond,
5813            DataType dt,
5814            QRegister rd,
5815            QRegister rn,
5816            const QOperand& operand) {
5817    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5819    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5820    VIXL_ASSERT(allow_macro_instructions_);
5821    VIXL_ASSERT(OutsideITBlock());
5822    MacroEmissionCheckScope guard(this);
5823    ITScope it_scope(this, &cond);
5824    vbic(cond, dt, rd, rn, operand);
5825  }
5826  void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5827    Vbic(al, dt, rd, rn, operand);
5828  }
5829
5830  void Vbif(
5831      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5832    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5833    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5834    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5835    VIXL_ASSERT(allow_macro_instructions_);
5836    VIXL_ASSERT(OutsideITBlock());
5837    MacroEmissionCheckScope guard(this);
5838    ITScope it_scope(this, &cond);
5839    vbif(cond, dt, rd, rn, rm);
5840  }
5841  void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5842    Vbif(al, dt, rd, rn, rm);
5843  }
5844  void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5845    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5846  }
5847  void Vbif(DRegister rd, DRegister rn, DRegister rm) {
5848    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5849  }
5850
5851  void Vbif(
5852      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5853    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5855    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5856    VIXL_ASSERT(allow_macro_instructions_);
5857    VIXL_ASSERT(OutsideITBlock());
5858    MacroEmissionCheckScope guard(this);
5859    ITScope it_scope(this, &cond);
5860    vbif(cond, dt, rd, rn, rm);
5861  }
5862  void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5863    Vbif(al, dt, rd, rn, rm);
5864  }
5865  void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5866    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5867  }
5868  void Vbif(QRegister rd, QRegister rn, QRegister rm) {
5869    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5870  }
5871
5872  void Vbit(
5873      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5874    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5877    VIXL_ASSERT(allow_macro_instructions_);
5878    VIXL_ASSERT(OutsideITBlock());
5879    MacroEmissionCheckScope guard(this);
5880    ITScope it_scope(this, &cond);
5881    vbit(cond, dt, rd, rn, rm);
5882  }
5883  void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5884    Vbit(al, dt, rd, rn, rm);
5885  }
5886  void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5887    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5888  }
5889  void Vbit(DRegister rd, DRegister rn, DRegister rm) {
5890    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5891  }
5892
5893  void Vbit(
5894      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5895    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5896    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5897    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5898    VIXL_ASSERT(allow_macro_instructions_);
5899    VIXL_ASSERT(OutsideITBlock());
5900    MacroEmissionCheckScope guard(this);
5901    ITScope it_scope(this, &cond);
5902    vbit(cond, dt, rd, rn, rm);
5903  }
5904  void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5905    Vbit(al, dt, rd, rn, rm);
5906  }
5907  void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5908    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5909  }
5910  void Vbit(QRegister rd, QRegister rn, QRegister rm) {
5911    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5912  }
5913
5914  void Vbsl(
5915      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5916    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5917    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5918    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5919    VIXL_ASSERT(allow_macro_instructions_);
5920    VIXL_ASSERT(OutsideITBlock());
5921    MacroEmissionCheckScope guard(this);
5922    ITScope it_scope(this, &cond);
5923    vbsl(cond, dt, rd, rn, rm);
5924  }
5925  void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5926    Vbsl(al, dt, rd, rn, rm);
5927  }
5928  void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5929    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5930  }
5931  void Vbsl(DRegister rd, DRegister rn, DRegister rm) {
5932    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5933  }
5934
5935  void Vbsl(
5936      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5937    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5940    VIXL_ASSERT(allow_macro_instructions_);
5941    VIXL_ASSERT(OutsideITBlock());
5942    MacroEmissionCheckScope guard(this);
5943    ITScope it_scope(this, &cond);
5944    vbsl(cond, dt, rd, rn, rm);
5945  }
5946  void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5947    Vbsl(al, dt, rd, rn, rm);
5948  }
5949  void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5950    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5951  }
5952  void Vbsl(QRegister rd, QRegister rn, QRegister rm) {
5953    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5954  }
5955
5956  void Vceq(Condition cond,
5957            DataType dt,
5958            DRegister rd,
5959            DRegister rm,
5960            const DOperand& operand) {
5961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5962    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5963    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5964    VIXL_ASSERT(allow_macro_instructions_);
5965    VIXL_ASSERT(OutsideITBlock());
5966    MacroEmissionCheckScope guard(this);
5967    ITScope it_scope(this, &cond);
5968    vceq(cond, dt, rd, rm, operand);
5969  }
5970  void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5971    Vceq(al, dt, rd, rm, operand);
5972  }
5973
5974  void Vceq(Condition cond,
5975            DataType dt,
5976            QRegister rd,
5977            QRegister rm,
5978            const QOperand& operand) {
5979    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5980    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5981    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5982    VIXL_ASSERT(allow_macro_instructions_);
5983    VIXL_ASSERT(OutsideITBlock());
5984    MacroEmissionCheckScope guard(this);
5985    ITScope it_scope(this, &cond);
5986    vceq(cond, dt, rd, rm, operand);
5987  }
5988  void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5989    Vceq(al, dt, rd, rm, operand);
5990  }
5991
5992  void Vceq(
5993      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5997    VIXL_ASSERT(allow_macro_instructions_);
5998    VIXL_ASSERT(OutsideITBlock());
5999    MacroEmissionCheckScope guard(this);
6000    ITScope it_scope(this, &cond);
6001    vceq(cond, dt, rd, rn, rm);
6002  }
6003  void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6004    Vceq(al, dt, rd, rn, rm);
6005  }
6006
6007  void Vceq(
6008      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6010    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6012    VIXL_ASSERT(allow_macro_instructions_);
6013    VIXL_ASSERT(OutsideITBlock());
6014    MacroEmissionCheckScope guard(this);
6015    ITScope it_scope(this, &cond);
6016    vceq(cond, dt, rd, rn, rm);
6017  }
6018  void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6019    Vceq(al, dt, rd, rn, rm);
6020  }
6021
6022  void Vcge(Condition cond,
6023            DataType dt,
6024            DRegister rd,
6025            DRegister rm,
6026            const DOperand& operand) {
6027    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6028    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6029    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6030    VIXL_ASSERT(allow_macro_instructions_);
6031    VIXL_ASSERT(OutsideITBlock());
6032    MacroEmissionCheckScope guard(this);
6033    ITScope it_scope(this, &cond);
6034    vcge(cond, dt, rd, rm, operand);
6035  }
6036  void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6037    Vcge(al, dt, rd, rm, operand);
6038  }
6039
6040  void Vcge(Condition cond,
6041            DataType dt,
6042            QRegister rd,
6043            QRegister rm,
6044            const QOperand& operand) {
6045    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6046    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6047    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6048    VIXL_ASSERT(allow_macro_instructions_);
6049    VIXL_ASSERT(OutsideITBlock());
6050    MacroEmissionCheckScope guard(this);
6051    ITScope it_scope(this, &cond);
6052    vcge(cond, dt, rd, rm, operand);
6053  }
6054  void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6055    Vcge(al, dt, rd, rm, operand);
6056  }
6057
6058  void Vcge(
6059      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6060    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6061    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6062    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6063    VIXL_ASSERT(allow_macro_instructions_);
6064    VIXL_ASSERT(OutsideITBlock());
6065    MacroEmissionCheckScope guard(this);
6066    ITScope it_scope(this, &cond);
6067    vcge(cond, dt, rd, rn, rm);
6068  }
6069  void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6070    Vcge(al, dt, rd, rn, rm);
6071  }
6072
6073  void Vcge(
6074      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6076    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6077    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6078    VIXL_ASSERT(allow_macro_instructions_);
6079    VIXL_ASSERT(OutsideITBlock());
6080    MacroEmissionCheckScope guard(this);
6081    ITScope it_scope(this, &cond);
6082    vcge(cond, dt, rd, rn, rm);
6083  }
6084  void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6085    Vcge(al, dt, rd, rn, rm);
6086  }
6087
6088  void Vcgt(Condition cond,
6089            DataType dt,
6090            DRegister rd,
6091            DRegister rm,
6092            const DOperand& operand) {
6093    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6095    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6096    VIXL_ASSERT(allow_macro_instructions_);
6097    VIXL_ASSERT(OutsideITBlock());
6098    MacroEmissionCheckScope guard(this);
6099    ITScope it_scope(this, &cond);
6100    vcgt(cond, dt, rd, rm, operand);
6101  }
6102  void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6103    Vcgt(al, dt, rd, rm, operand);
6104  }
6105
6106  void Vcgt(Condition cond,
6107            DataType dt,
6108            QRegister rd,
6109            QRegister rm,
6110            const QOperand& operand) {
6111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6112    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6113    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6114    VIXL_ASSERT(allow_macro_instructions_);
6115    VIXL_ASSERT(OutsideITBlock());
6116    MacroEmissionCheckScope guard(this);
6117    ITScope it_scope(this, &cond);
6118    vcgt(cond, dt, rd, rm, operand);
6119  }
6120  void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6121    Vcgt(al, dt, rd, rm, operand);
6122  }
6123
6124  void Vcgt(
6125      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6126    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6129    VIXL_ASSERT(allow_macro_instructions_);
6130    VIXL_ASSERT(OutsideITBlock());
6131    MacroEmissionCheckScope guard(this);
6132    ITScope it_scope(this, &cond);
6133    vcgt(cond, dt, rd, rn, rm);
6134  }
6135  void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6136    Vcgt(al, dt, rd, rn, rm);
6137  }
6138
6139  void Vcgt(
6140      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6141    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6142    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6143    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6144    VIXL_ASSERT(allow_macro_instructions_);
6145    VIXL_ASSERT(OutsideITBlock());
6146    MacroEmissionCheckScope guard(this);
6147    ITScope it_scope(this, &cond);
6148    vcgt(cond, dt, rd, rn, rm);
6149  }
6150  void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6151    Vcgt(al, dt, rd, rn, rm);
6152  }
6153
6154  void Vcle(Condition cond,
6155            DataType dt,
6156            DRegister rd,
6157            DRegister rm,
6158            const DOperand& operand) {
6159    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6160    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6161    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6162    VIXL_ASSERT(allow_macro_instructions_);
6163    VIXL_ASSERT(OutsideITBlock());
6164    MacroEmissionCheckScope guard(this);
6165    ITScope it_scope(this, &cond);
6166    vcle(cond, dt, rd, rm, operand);
6167  }
6168  void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6169    Vcle(al, dt, rd, rm, operand);
6170  }
6171
6172  void Vcle(Condition cond,
6173            DataType dt,
6174            QRegister rd,
6175            QRegister rm,
6176            const QOperand& operand) {
6177    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6178    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6179    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6180    VIXL_ASSERT(allow_macro_instructions_);
6181    VIXL_ASSERT(OutsideITBlock());
6182    MacroEmissionCheckScope guard(this);
6183    ITScope it_scope(this, &cond);
6184    vcle(cond, dt, rd, rm, operand);
6185  }
6186  void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6187    Vcle(al, dt, rd, rm, operand);
6188  }
6189
6190  void Vcle(
6191      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6192    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6193    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6194    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6195    VIXL_ASSERT(allow_macro_instructions_);
6196    VIXL_ASSERT(OutsideITBlock());
6197    MacroEmissionCheckScope guard(this);
6198    ITScope it_scope(this, &cond);
6199    vcle(cond, dt, rd, rn, rm);
6200  }
6201  void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6202    Vcle(al, dt, rd, rn, rm);
6203  }
6204
6205  void Vcle(
6206      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6210    VIXL_ASSERT(allow_macro_instructions_);
6211    VIXL_ASSERT(OutsideITBlock());
6212    MacroEmissionCheckScope guard(this);
6213    ITScope it_scope(this, &cond);
6214    vcle(cond, dt, rd, rn, rm);
6215  }
6216  void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6217    Vcle(al, dt, rd, rn, rm);
6218  }
6219
6220  void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6223    VIXL_ASSERT(allow_macro_instructions_);
6224    VIXL_ASSERT(OutsideITBlock());
6225    MacroEmissionCheckScope guard(this);
6226    ITScope it_scope(this, &cond);
6227    vcls(cond, dt, rd, rm);
6228  }
6229  void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); }
6230
6231  void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6232    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6233    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6234    VIXL_ASSERT(allow_macro_instructions_);
6235    VIXL_ASSERT(OutsideITBlock());
6236    MacroEmissionCheckScope guard(this);
6237    ITScope it_scope(this, &cond);
6238    vcls(cond, dt, rd, rm);
6239  }
6240  void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); }
6241
6242  void Vclt(Condition cond,
6243            DataType dt,
6244            DRegister rd,
6245            DRegister rm,
6246            const DOperand& operand) {
6247    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6248    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6249    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6250    VIXL_ASSERT(allow_macro_instructions_);
6251    VIXL_ASSERT(OutsideITBlock());
6252    MacroEmissionCheckScope guard(this);
6253    ITScope it_scope(this, &cond);
6254    vclt(cond, dt, rd, rm, operand);
6255  }
6256  void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6257    Vclt(al, dt, rd, rm, operand);
6258  }
6259
6260  void Vclt(Condition cond,
6261            DataType dt,
6262            QRegister rd,
6263            QRegister rm,
6264            const QOperand& operand) {
6265    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6266    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6267    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6268    VIXL_ASSERT(allow_macro_instructions_);
6269    VIXL_ASSERT(OutsideITBlock());
6270    MacroEmissionCheckScope guard(this);
6271    ITScope it_scope(this, &cond);
6272    vclt(cond, dt, rd, rm, operand);
6273  }
6274  void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6275    Vclt(al, dt, rd, rm, operand);
6276  }
6277
6278  void Vclt(
6279      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6280    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6281    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6282    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6283    VIXL_ASSERT(allow_macro_instructions_);
6284    VIXL_ASSERT(OutsideITBlock());
6285    MacroEmissionCheckScope guard(this);
6286    ITScope it_scope(this, &cond);
6287    vclt(cond, dt, rd, rn, rm);
6288  }
6289  void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6290    Vclt(al, dt, rd, rn, rm);
6291  }
6292
6293  void Vclt(
6294      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6295    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6296    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6297    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6298    VIXL_ASSERT(allow_macro_instructions_);
6299    VIXL_ASSERT(OutsideITBlock());
6300    MacroEmissionCheckScope guard(this);
6301    ITScope it_scope(this, &cond);
6302    vclt(cond, dt, rd, rn, rm);
6303  }
6304  void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6305    Vclt(al, dt, rd, rn, rm);
6306  }
6307
6308  void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6311    VIXL_ASSERT(allow_macro_instructions_);
6312    VIXL_ASSERT(OutsideITBlock());
6313    MacroEmissionCheckScope guard(this);
6314    ITScope it_scope(this, &cond);
6315    vclz(cond, dt, rd, rm);
6316  }
6317  void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); }
6318
6319  void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6320    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6321    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6322    VIXL_ASSERT(allow_macro_instructions_);
6323    VIXL_ASSERT(OutsideITBlock());
6324    MacroEmissionCheckScope guard(this);
6325    ITScope it_scope(this, &cond);
6326    vclz(cond, dt, rd, rm);
6327  }
6328  void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); }
6329
6330  void Vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6331    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6332    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6333    VIXL_ASSERT(allow_macro_instructions_);
6334    VIXL_ASSERT(OutsideITBlock());
6335    MacroEmissionCheckScope guard(this);
6336    ITScope it_scope(this, &cond);
6337    vcmp(cond, dt, rd, rm);
6338  }
6339  void Vcmp(DataType dt, SRegister rd, SRegister rm) { Vcmp(al, dt, rd, rm); }
6340
6341  void Vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6342    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6343    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6344    VIXL_ASSERT(allow_macro_instructions_);
6345    VIXL_ASSERT(OutsideITBlock());
6346    MacroEmissionCheckScope guard(this);
6347    ITScope it_scope(this, &cond);
6348    vcmp(cond, dt, rd, rm);
6349  }
6350  void Vcmp(DataType dt, DRegister rd, DRegister rm) { Vcmp(al, dt, rd, rm); }
6351
6352  void Vcmp(Condition cond, DataType dt, SRegister rd, double imm) {
6353    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6354    VIXL_ASSERT(allow_macro_instructions_);
6355    VIXL_ASSERT(OutsideITBlock());
6356    MacroEmissionCheckScope guard(this);
6357    ITScope it_scope(this, &cond);
6358    vcmp(cond, dt, rd, imm);
6359  }
6360  void Vcmp(DataType dt, SRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6361
6362  void Vcmp(Condition cond, DataType dt, DRegister rd, double imm) {
6363    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6364    VIXL_ASSERT(allow_macro_instructions_);
6365    VIXL_ASSERT(OutsideITBlock());
6366    MacroEmissionCheckScope guard(this);
6367    ITScope it_scope(this, &cond);
6368    vcmp(cond, dt, rd, imm);
6369  }
6370  void Vcmp(DataType dt, DRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6371
6372  void Vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6373    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6374    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6375    VIXL_ASSERT(allow_macro_instructions_);
6376    VIXL_ASSERT(OutsideITBlock());
6377    MacroEmissionCheckScope guard(this);
6378    ITScope it_scope(this, &cond);
6379    vcmpe(cond, dt, rd, rm);
6380  }
6381  void Vcmpe(DataType dt, SRegister rd, SRegister rm) { Vcmpe(al, dt, rd, rm); }
6382
6383  void Vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6384    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6385    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6386    VIXL_ASSERT(allow_macro_instructions_);
6387    VIXL_ASSERT(OutsideITBlock());
6388    MacroEmissionCheckScope guard(this);
6389    ITScope it_scope(this, &cond);
6390    vcmpe(cond, dt, rd, rm);
6391  }
6392  void Vcmpe(DataType dt, DRegister rd, DRegister rm) { Vcmpe(al, dt, rd, rm); }
6393
6394  void Vcmpe(Condition cond, DataType dt, SRegister rd, double imm) {
6395    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6396    VIXL_ASSERT(allow_macro_instructions_);
6397    VIXL_ASSERT(OutsideITBlock());
6398    MacroEmissionCheckScope guard(this);
6399    ITScope it_scope(this, &cond);
6400    vcmpe(cond, dt, rd, imm);
6401  }
6402  void Vcmpe(DataType dt, SRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6403
6404  void Vcmpe(Condition cond, DataType dt, DRegister rd, double imm) {
6405    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6406    VIXL_ASSERT(allow_macro_instructions_);
6407    VIXL_ASSERT(OutsideITBlock());
6408    MacroEmissionCheckScope guard(this);
6409    ITScope it_scope(this, &cond);
6410    vcmpe(cond, dt, rd, imm);
6411  }
6412  void Vcmpe(DataType dt, DRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6413
6414  void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6415    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6416    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6417    VIXL_ASSERT(allow_macro_instructions_);
6418    VIXL_ASSERT(OutsideITBlock());
6419    MacroEmissionCheckScope guard(this);
6420    ITScope it_scope(this, &cond);
6421    vcnt(cond, dt, rd, rm);
6422  }
6423  void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); }
6424
6425  void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6427    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6428    VIXL_ASSERT(allow_macro_instructions_);
6429    VIXL_ASSERT(OutsideITBlock());
6430    MacroEmissionCheckScope guard(this);
6431    ITScope it_scope(this, &cond);
6432    vcnt(cond, dt, rd, rm);
6433  }
6434  void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); }
6435
6436  void Vcvt(
6437      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6438    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6440    VIXL_ASSERT(allow_macro_instructions_);
6441    VIXL_ASSERT(OutsideITBlock());
6442    MacroEmissionCheckScope guard(this);
6443    ITScope it_scope(this, &cond);
6444    vcvt(cond, dt1, dt2, rd, rm);
6445  }
6446  void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6447    Vcvt(al, dt1, dt2, rd, rm);
6448  }
6449
6450  void Vcvt(
6451      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6452    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6453    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6454    VIXL_ASSERT(allow_macro_instructions_);
6455    VIXL_ASSERT(OutsideITBlock());
6456    MacroEmissionCheckScope guard(this);
6457    ITScope it_scope(this, &cond);
6458    vcvt(cond, dt1, dt2, rd, rm);
6459  }
6460  void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6461    Vcvt(al, dt1, dt2, rd, rm);
6462  }
6463
6464  void Vcvt(Condition cond,
6465            DataType dt1,
6466            DataType dt2,
6467            DRegister rd,
6468            DRegister rm,
6469            int32_t fbits) {
6470    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6471    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6472    VIXL_ASSERT(allow_macro_instructions_);
6473    VIXL_ASSERT(OutsideITBlock());
6474    MacroEmissionCheckScope guard(this);
6475    ITScope it_scope(this, &cond);
6476    vcvt(cond, dt1, dt2, rd, rm, fbits);
6477  }
6478  void Vcvt(
6479      DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) {
6480    Vcvt(al, dt1, dt2, rd, rm, fbits);
6481  }
6482
6483  void Vcvt(Condition cond,
6484            DataType dt1,
6485            DataType dt2,
6486            QRegister rd,
6487            QRegister rm,
6488            int32_t fbits) {
6489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6490    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6491    VIXL_ASSERT(allow_macro_instructions_);
6492    VIXL_ASSERT(OutsideITBlock());
6493    MacroEmissionCheckScope guard(this);
6494    ITScope it_scope(this, &cond);
6495    vcvt(cond, dt1, dt2, rd, rm, fbits);
6496  }
6497  void Vcvt(
6498      DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) {
6499    Vcvt(al, dt1, dt2, rd, rm, fbits);
6500  }
6501
6502  void Vcvt(Condition cond,
6503            DataType dt1,
6504            DataType dt2,
6505            SRegister rd,
6506            SRegister rm,
6507            int32_t fbits) {
6508    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6509    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6510    VIXL_ASSERT(allow_macro_instructions_);
6511    VIXL_ASSERT(OutsideITBlock());
6512    MacroEmissionCheckScope guard(this);
6513    ITScope it_scope(this, &cond);
6514    vcvt(cond, dt1, dt2, rd, rm, fbits);
6515  }
6516  void Vcvt(
6517      DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) {
6518    Vcvt(al, dt1, dt2, rd, rm, fbits);
6519  }
6520
6521  void Vcvt(
6522      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6523    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6524    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6525    VIXL_ASSERT(allow_macro_instructions_);
6526    VIXL_ASSERT(OutsideITBlock());
6527    MacroEmissionCheckScope guard(this);
6528    ITScope it_scope(this, &cond);
6529    vcvt(cond, dt1, dt2, rd, rm);
6530  }
6531  void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6532    Vcvt(al, dt1, dt2, rd, rm);
6533  }
6534
6535  void Vcvt(
6536      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6537    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6539    VIXL_ASSERT(allow_macro_instructions_);
6540    VIXL_ASSERT(OutsideITBlock());
6541    MacroEmissionCheckScope guard(this);
6542    ITScope it_scope(this, &cond);
6543    vcvt(cond, dt1, dt2, rd, rm);
6544  }
6545  void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6546    Vcvt(al, dt1, dt2, rd, rm);
6547  }
6548
6549  void Vcvt(
6550      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6551    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6552    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6553    VIXL_ASSERT(allow_macro_instructions_);
6554    VIXL_ASSERT(OutsideITBlock());
6555    MacroEmissionCheckScope guard(this);
6556    ITScope it_scope(this, &cond);
6557    vcvt(cond, dt1, dt2, rd, rm);
6558  }
6559  void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6560    Vcvt(al, dt1, dt2, rd, rm);
6561  }
6562
6563  void Vcvt(
6564      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6565    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6567    VIXL_ASSERT(allow_macro_instructions_);
6568    VIXL_ASSERT(OutsideITBlock());
6569    MacroEmissionCheckScope guard(this);
6570    ITScope it_scope(this, &cond);
6571    vcvt(cond, dt1, dt2, rd, rm);
6572  }
6573  void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6574    Vcvt(al, dt1, dt2, rd, rm);
6575  }
6576
6577  void Vcvt(
6578      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6581    VIXL_ASSERT(allow_macro_instructions_);
6582    VIXL_ASSERT(OutsideITBlock());
6583    MacroEmissionCheckScope guard(this);
6584    ITScope it_scope(this, &cond);
6585    vcvt(cond, dt1, dt2, rd, rm);
6586  }
6587  void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6588    Vcvt(al, dt1, dt2, rd, rm);
6589  }
6590
6591  void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6592    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6593    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6594    VIXL_ASSERT(allow_macro_instructions_);
6595    VIXL_ASSERT(OutsideITBlock());
6596    MacroEmissionCheckScope guard(this);
6597    vcvta(dt1, dt2, rd, rm);
6598  }
6599
6600  void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6601    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6602    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6603    VIXL_ASSERT(allow_macro_instructions_);
6604    VIXL_ASSERT(OutsideITBlock());
6605    MacroEmissionCheckScope guard(this);
6606    vcvta(dt1, dt2, rd, rm);
6607  }
6608
6609  void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6610    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6611    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6612    VIXL_ASSERT(allow_macro_instructions_);
6613    VIXL_ASSERT(OutsideITBlock());
6614    MacroEmissionCheckScope guard(this);
6615    vcvta(dt1, dt2, rd, rm);
6616  }
6617
6618  void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6621    VIXL_ASSERT(allow_macro_instructions_);
6622    VIXL_ASSERT(OutsideITBlock());
6623    MacroEmissionCheckScope guard(this);
6624    vcvta(dt1, dt2, rd, rm);
6625  }
6626
6627  void Vcvtb(
6628      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6629    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6630    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6631    VIXL_ASSERT(allow_macro_instructions_);
6632    VIXL_ASSERT(OutsideITBlock());
6633    MacroEmissionCheckScope guard(this);
6634    ITScope it_scope(this, &cond);
6635    vcvtb(cond, dt1, dt2, rd, rm);
6636  }
6637  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6638    Vcvtb(al, dt1, dt2, rd, rm);
6639  }
6640
6641  void Vcvtb(
6642      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6643    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6645    VIXL_ASSERT(allow_macro_instructions_);
6646    VIXL_ASSERT(OutsideITBlock());
6647    MacroEmissionCheckScope guard(this);
6648    ITScope it_scope(this, &cond);
6649    vcvtb(cond, dt1, dt2, rd, rm);
6650  }
6651  void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6652    Vcvtb(al, dt1, dt2, rd, rm);
6653  }
6654
6655  void Vcvtb(
6656      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6657    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6658    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6659    VIXL_ASSERT(allow_macro_instructions_);
6660    VIXL_ASSERT(OutsideITBlock());
6661    MacroEmissionCheckScope guard(this);
6662    ITScope it_scope(this, &cond);
6663    vcvtb(cond, dt1, dt2, rd, rm);
6664  }
6665  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6666    Vcvtb(al, dt1, dt2, rd, rm);
6667  }
6668
6669  void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6671    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6672    VIXL_ASSERT(allow_macro_instructions_);
6673    VIXL_ASSERT(OutsideITBlock());
6674    MacroEmissionCheckScope guard(this);
6675    vcvtm(dt1, dt2, rd, rm);
6676  }
6677
6678  void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6679    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6680    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6681    VIXL_ASSERT(allow_macro_instructions_);
6682    VIXL_ASSERT(OutsideITBlock());
6683    MacroEmissionCheckScope guard(this);
6684    vcvtm(dt1, dt2, rd, rm);
6685  }
6686
6687  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6688    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6689    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6690    VIXL_ASSERT(allow_macro_instructions_);
6691    VIXL_ASSERT(OutsideITBlock());
6692    MacroEmissionCheckScope guard(this);
6693    vcvtm(dt1, dt2, rd, rm);
6694  }
6695
6696  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6699    VIXL_ASSERT(allow_macro_instructions_);
6700    VIXL_ASSERT(OutsideITBlock());
6701    MacroEmissionCheckScope guard(this);
6702    vcvtm(dt1, dt2, rd, rm);
6703  }
6704
6705  void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6706    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6708    VIXL_ASSERT(allow_macro_instructions_);
6709    VIXL_ASSERT(OutsideITBlock());
6710    MacroEmissionCheckScope guard(this);
6711    vcvtn(dt1, dt2, rd, rm);
6712  }
6713
6714  void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6716    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6717    VIXL_ASSERT(allow_macro_instructions_);
6718    VIXL_ASSERT(OutsideITBlock());
6719    MacroEmissionCheckScope guard(this);
6720    vcvtn(dt1, dt2, rd, rm);
6721  }
6722
6723  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6725    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6726    VIXL_ASSERT(allow_macro_instructions_);
6727    VIXL_ASSERT(OutsideITBlock());
6728    MacroEmissionCheckScope guard(this);
6729    vcvtn(dt1, dt2, rd, rm);
6730  }
6731
6732  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6734    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6735    VIXL_ASSERT(allow_macro_instructions_);
6736    VIXL_ASSERT(OutsideITBlock());
6737    MacroEmissionCheckScope guard(this);
6738    vcvtn(dt1, dt2, rd, rm);
6739  }
6740
6741  void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6742    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6743    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6744    VIXL_ASSERT(allow_macro_instructions_);
6745    VIXL_ASSERT(OutsideITBlock());
6746    MacroEmissionCheckScope guard(this);
6747    vcvtp(dt1, dt2, rd, rm);
6748  }
6749
6750  void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6752    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6753    VIXL_ASSERT(allow_macro_instructions_);
6754    VIXL_ASSERT(OutsideITBlock());
6755    MacroEmissionCheckScope guard(this);
6756    vcvtp(dt1, dt2, rd, rm);
6757  }
6758
6759  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6760    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6761    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6762    VIXL_ASSERT(allow_macro_instructions_);
6763    VIXL_ASSERT(OutsideITBlock());
6764    MacroEmissionCheckScope guard(this);
6765    vcvtp(dt1, dt2, rd, rm);
6766  }
6767
6768  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6769    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6770    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6771    VIXL_ASSERT(allow_macro_instructions_);
6772    VIXL_ASSERT(OutsideITBlock());
6773    MacroEmissionCheckScope guard(this);
6774    vcvtp(dt1, dt2, rd, rm);
6775  }
6776
6777  void Vcvtr(
6778      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6779    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6780    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6781    VIXL_ASSERT(allow_macro_instructions_);
6782    VIXL_ASSERT(OutsideITBlock());
6783    MacroEmissionCheckScope guard(this);
6784    ITScope it_scope(this, &cond);
6785    vcvtr(cond, dt1, dt2, rd, rm);
6786  }
6787  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6788    Vcvtr(al, dt1, dt2, rd, rm);
6789  }
6790
6791  void Vcvtr(
6792      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6793    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6795    VIXL_ASSERT(allow_macro_instructions_);
6796    VIXL_ASSERT(OutsideITBlock());
6797    MacroEmissionCheckScope guard(this);
6798    ITScope it_scope(this, &cond);
6799    vcvtr(cond, dt1, dt2, rd, rm);
6800  }
6801  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6802    Vcvtr(al, dt1, dt2, rd, rm);
6803  }
6804
6805  void Vcvtt(
6806      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6807    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6808    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6809    VIXL_ASSERT(allow_macro_instructions_);
6810    VIXL_ASSERT(OutsideITBlock());
6811    MacroEmissionCheckScope guard(this);
6812    ITScope it_scope(this, &cond);
6813    vcvtt(cond, dt1, dt2, rd, rm);
6814  }
6815  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6816    Vcvtt(al, dt1, dt2, rd, rm);
6817  }
6818
6819  void Vcvtt(
6820      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6821    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6822    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6823    VIXL_ASSERT(allow_macro_instructions_);
6824    VIXL_ASSERT(OutsideITBlock());
6825    MacroEmissionCheckScope guard(this);
6826    ITScope it_scope(this, &cond);
6827    vcvtt(cond, dt1, dt2, rd, rm);
6828  }
6829  void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6830    Vcvtt(al, dt1, dt2, rd, rm);
6831  }
6832
6833  void Vcvtt(
6834      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6835    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6836    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6837    VIXL_ASSERT(allow_macro_instructions_);
6838    VIXL_ASSERT(OutsideITBlock());
6839    MacroEmissionCheckScope guard(this);
6840    ITScope it_scope(this, &cond);
6841    vcvtt(cond, dt1, dt2, rd, rm);
6842  }
6843  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6844    Vcvtt(al, dt1, dt2, rd, rm);
6845  }
6846
6847  void Vdiv(
6848      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6849    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6850    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6851    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6852    VIXL_ASSERT(allow_macro_instructions_);
6853    VIXL_ASSERT(OutsideITBlock());
6854    MacroEmissionCheckScope guard(this);
6855    ITScope it_scope(this, &cond);
6856    vdiv(cond, dt, rd, rn, rm);
6857  }
6858  void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6859    Vdiv(al, dt, rd, rn, rm);
6860  }
6861
6862  void Vdiv(
6863      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6864    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6865    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6866    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6867    VIXL_ASSERT(allow_macro_instructions_);
6868    VIXL_ASSERT(OutsideITBlock());
6869    MacroEmissionCheckScope guard(this);
6870    ITScope it_scope(this, &cond);
6871    vdiv(cond, dt, rd, rn, rm);
6872  }
6873  void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6874    Vdiv(al, dt, rd, rn, rm);
6875  }
6876
6877  void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) {
6878    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6879    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6880    VIXL_ASSERT(allow_macro_instructions_);
6881    VIXL_ASSERT(OutsideITBlock());
6882    MacroEmissionCheckScope guard(this);
6883    ITScope it_scope(this, &cond);
6884    vdup(cond, dt, rd, rt);
6885  }
6886  void Vdup(DataType dt, QRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6887
6888  void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) {
6889    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6891    VIXL_ASSERT(allow_macro_instructions_);
6892    VIXL_ASSERT(OutsideITBlock());
6893    MacroEmissionCheckScope guard(this);
6894    ITScope it_scope(this, &cond);
6895    vdup(cond, dt, rd, rt);
6896  }
6897  void Vdup(DataType dt, DRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6898
6899  void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) {
6900    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6901    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6902    VIXL_ASSERT(allow_macro_instructions_);
6903    VIXL_ASSERT(OutsideITBlock());
6904    MacroEmissionCheckScope guard(this);
6905    ITScope it_scope(this, &cond);
6906    vdup(cond, dt, rd, rm);
6907  }
6908  void Vdup(DataType dt, DRegister rd, DRegisterLane rm) {
6909    Vdup(al, dt, rd, rm);
6910  }
6911
6912  void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) {
6913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6915    VIXL_ASSERT(allow_macro_instructions_);
6916    VIXL_ASSERT(OutsideITBlock());
6917    MacroEmissionCheckScope guard(this);
6918    ITScope it_scope(this, &cond);
6919    vdup(cond, dt, rd, rm);
6920  }
6921  void Vdup(DataType dt, QRegister rd, DRegisterLane rm) {
6922    Vdup(al, dt, rd, rm);
6923  }
6924
6925  void Veor(
6926      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6927    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6928    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6929    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6930    VIXL_ASSERT(allow_macro_instructions_);
6931    VIXL_ASSERT(OutsideITBlock());
6932    MacroEmissionCheckScope guard(this);
6933    ITScope it_scope(this, &cond);
6934    veor(cond, dt, rd, rn, rm);
6935  }
6936  void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6937    Veor(al, dt, rd, rn, rm);
6938  }
6939  void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6940    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6941  }
6942  void Veor(DRegister rd, DRegister rn, DRegister rm) {
6943    Veor(al, kDataTypeValueNone, rd, rn, rm);
6944  }
6945
6946  void Veor(
6947      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6948    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6951    VIXL_ASSERT(allow_macro_instructions_);
6952    VIXL_ASSERT(OutsideITBlock());
6953    MacroEmissionCheckScope guard(this);
6954    ITScope it_scope(this, &cond);
6955    veor(cond, dt, rd, rn, rm);
6956  }
6957  void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6958    Veor(al, dt, rd, rn, rm);
6959  }
6960  void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
6961    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6962  }
6963  void Veor(QRegister rd, QRegister rn, QRegister rm) {
6964    Veor(al, kDataTypeValueNone, rd, rn, rm);
6965  }
6966
6967  void Vext(Condition cond,
6968            DataType dt,
6969            DRegister rd,
6970            DRegister rn,
6971            DRegister rm,
6972            const DOperand& operand) {
6973    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6976    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6977    VIXL_ASSERT(allow_macro_instructions_);
6978    VIXL_ASSERT(OutsideITBlock());
6979    MacroEmissionCheckScope guard(this);
6980    ITScope it_scope(this, &cond);
6981    vext(cond, dt, rd, rn, rm, operand);
6982  }
6983  void Vext(DataType dt,
6984            DRegister rd,
6985            DRegister rn,
6986            DRegister rm,
6987            const DOperand& operand) {
6988    Vext(al, dt, rd, rn, rm, operand);
6989  }
6990
6991  void Vext(Condition cond,
6992            DataType dt,
6993            QRegister rd,
6994            QRegister rn,
6995            QRegister rm,
6996            const QOperand& operand) {
6997    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6998    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6999    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7000    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7001    VIXL_ASSERT(allow_macro_instructions_);
7002    VIXL_ASSERT(OutsideITBlock());
7003    MacroEmissionCheckScope guard(this);
7004    ITScope it_scope(this, &cond);
7005    vext(cond, dt, rd, rn, rm, operand);
7006  }
7007  void Vext(DataType dt,
7008            QRegister rd,
7009            QRegister rn,
7010            QRegister rm,
7011            const QOperand& operand) {
7012    Vext(al, dt, rd, rn, rm, operand);
7013  }
7014
7015  void Vfma(
7016      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7017    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7018    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7019    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7020    VIXL_ASSERT(allow_macro_instructions_);
7021    VIXL_ASSERT(OutsideITBlock());
7022    MacroEmissionCheckScope guard(this);
7023    ITScope it_scope(this, &cond);
7024    vfma(cond, dt, rd, rn, rm);
7025  }
7026  void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7027    Vfma(al, dt, rd, rn, rm);
7028  }
7029
7030  void Vfma(
7031      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7032    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7033    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7034    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7035    VIXL_ASSERT(allow_macro_instructions_);
7036    VIXL_ASSERT(OutsideITBlock());
7037    MacroEmissionCheckScope guard(this);
7038    ITScope it_scope(this, &cond);
7039    vfma(cond, dt, rd, rn, rm);
7040  }
7041  void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7042    Vfma(al, dt, rd, rn, rm);
7043  }
7044
7045  void Vfma(
7046      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7047    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7048    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7049    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7050    VIXL_ASSERT(allow_macro_instructions_);
7051    VIXL_ASSERT(OutsideITBlock());
7052    MacroEmissionCheckScope guard(this);
7053    ITScope it_scope(this, &cond);
7054    vfma(cond, dt, rd, rn, rm);
7055  }
7056  void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7057    Vfma(al, dt, rd, rn, rm);
7058  }
7059
7060  void Vfms(
7061      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7062    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7065    VIXL_ASSERT(allow_macro_instructions_);
7066    VIXL_ASSERT(OutsideITBlock());
7067    MacroEmissionCheckScope guard(this);
7068    ITScope it_scope(this, &cond);
7069    vfms(cond, dt, rd, rn, rm);
7070  }
7071  void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7072    Vfms(al, dt, rd, rn, rm);
7073  }
7074
7075  void Vfms(
7076      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7077    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7080    VIXL_ASSERT(allow_macro_instructions_);
7081    VIXL_ASSERT(OutsideITBlock());
7082    MacroEmissionCheckScope guard(this);
7083    ITScope it_scope(this, &cond);
7084    vfms(cond, dt, rd, rn, rm);
7085  }
7086  void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7087    Vfms(al, dt, rd, rn, rm);
7088  }
7089
7090  void Vfms(
7091      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7092    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7093    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7095    VIXL_ASSERT(allow_macro_instructions_);
7096    VIXL_ASSERT(OutsideITBlock());
7097    MacroEmissionCheckScope guard(this);
7098    ITScope it_scope(this, &cond);
7099    vfms(cond, dt, rd, rn, rm);
7100  }
7101  void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7102    Vfms(al, dt, rd, rn, rm);
7103  }
7104
7105  void Vfnma(
7106      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7107    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7109    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7110    VIXL_ASSERT(allow_macro_instructions_);
7111    VIXL_ASSERT(OutsideITBlock());
7112    MacroEmissionCheckScope guard(this);
7113    ITScope it_scope(this, &cond);
7114    vfnma(cond, dt, rd, rn, rm);
7115  }
7116  void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7117    Vfnma(al, dt, rd, rn, rm);
7118  }
7119
7120  void Vfnma(
7121      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7122    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7123    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7124    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7125    VIXL_ASSERT(allow_macro_instructions_);
7126    VIXL_ASSERT(OutsideITBlock());
7127    MacroEmissionCheckScope guard(this);
7128    ITScope it_scope(this, &cond);
7129    vfnma(cond, dt, rd, rn, rm);
7130  }
7131  void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7132    Vfnma(al, dt, rd, rn, rm);
7133  }
7134
7135  void Vfnms(
7136      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7137    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7138    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7139    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7140    VIXL_ASSERT(allow_macro_instructions_);
7141    VIXL_ASSERT(OutsideITBlock());
7142    MacroEmissionCheckScope guard(this);
7143    ITScope it_scope(this, &cond);
7144    vfnms(cond, dt, rd, rn, rm);
7145  }
7146  void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7147    Vfnms(al, dt, rd, rn, rm);
7148  }
7149
7150  void Vfnms(
7151      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7152    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7153    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7154    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7155    VIXL_ASSERT(allow_macro_instructions_);
7156    VIXL_ASSERT(OutsideITBlock());
7157    MacroEmissionCheckScope guard(this);
7158    ITScope it_scope(this, &cond);
7159    vfnms(cond, dt, rd, rn, rm);
7160  }
7161  void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7162    Vfnms(al, dt, rd, rn, rm);
7163  }
7164
7165  void Vhadd(
7166      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7167    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7168    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7169    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7170    VIXL_ASSERT(allow_macro_instructions_);
7171    VIXL_ASSERT(OutsideITBlock());
7172    MacroEmissionCheckScope guard(this);
7173    ITScope it_scope(this, &cond);
7174    vhadd(cond, dt, rd, rn, rm);
7175  }
7176  void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7177    Vhadd(al, dt, rd, rn, rm);
7178  }
7179
7180  void Vhadd(
7181      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7182    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7183    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7184    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7185    VIXL_ASSERT(allow_macro_instructions_);
7186    VIXL_ASSERT(OutsideITBlock());
7187    MacroEmissionCheckScope guard(this);
7188    ITScope it_scope(this, &cond);
7189    vhadd(cond, dt, rd, rn, rm);
7190  }
7191  void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7192    Vhadd(al, dt, rd, rn, rm);
7193  }
7194
7195  void Vhsub(
7196      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7198    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7199    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7200    VIXL_ASSERT(allow_macro_instructions_);
7201    VIXL_ASSERT(OutsideITBlock());
7202    MacroEmissionCheckScope guard(this);
7203    ITScope it_scope(this, &cond);
7204    vhsub(cond, dt, rd, rn, rm);
7205  }
7206  void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7207    Vhsub(al, dt, rd, rn, rm);
7208  }
7209
7210  void Vhsub(
7211      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7212    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7213    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7214    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7215    VIXL_ASSERT(allow_macro_instructions_);
7216    VIXL_ASSERT(OutsideITBlock());
7217    MacroEmissionCheckScope guard(this);
7218    ITScope it_scope(this, &cond);
7219    vhsub(cond, dt, rd, rn, rm);
7220  }
7221  void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7222    Vhsub(al, dt, rd, rn, rm);
7223  }
7224
7225  void Vld1(Condition cond,
7226            DataType dt,
7227            const NeonRegisterList& nreglist,
7228            const AlignedMemOperand& operand) {
7229    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7230    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7231    VIXL_ASSERT(allow_macro_instructions_);
7232    VIXL_ASSERT(OutsideITBlock());
7233    MacroEmissionCheckScope guard(this);
7234    ITScope it_scope(this, &cond);
7235    vld1(cond, dt, nreglist, operand);
7236  }
7237  void Vld1(DataType dt,
7238            const NeonRegisterList& nreglist,
7239            const AlignedMemOperand& operand) {
7240    Vld1(al, dt, nreglist, operand);
7241  }
7242
7243  void Vld2(Condition cond,
7244            DataType dt,
7245            const NeonRegisterList& nreglist,
7246            const AlignedMemOperand& operand) {
7247    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7248    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7249    VIXL_ASSERT(allow_macro_instructions_);
7250    VIXL_ASSERT(OutsideITBlock());
7251    MacroEmissionCheckScope guard(this);
7252    ITScope it_scope(this, &cond);
7253    vld2(cond, dt, nreglist, operand);
7254  }
7255  void Vld2(DataType dt,
7256            const NeonRegisterList& nreglist,
7257            const AlignedMemOperand& operand) {
7258    Vld2(al, dt, nreglist, operand);
7259  }
7260
7261  void Vld3(Condition cond,
7262            DataType dt,
7263            const NeonRegisterList& nreglist,
7264            const AlignedMemOperand& operand) {
7265    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7266    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7267    VIXL_ASSERT(allow_macro_instructions_);
7268    VIXL_ASSERT(OutsideITBlock());
7269    MacroEmissionCheckScope guard(this);
7270    ITScope it_scope(this, &cond);
7271    vld3(cond, dt, nreglist, operand);
7272  }
7273  void Vld3(DataType dt,
7274            const NeonRegisterList& nreglist,
7275            const AlignedMemOperand& operand) {
7276    Vld3(al, dt, nreglist, operand);
7277  }
7278
7279  void Vld3(Condition cond,
7280            DataType dt,
7281            const NeonRegisterList& nreglist,
7282            const MemOperand& operand) {
7283    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7284    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7285    VIXL_ASSERT(allow_macro_instructions_);
7286    VIXL_ASSERT(OutsideITBlock());
7287    MacroEmissionCheckScope guard(this);
7288    ITScope it_scope(this, &cond);
7289    vld3(cond, dt, nreglist, operand);
7290  }
7291  void Vld3(DataType dt,
7292            const NeonRegisterList& nreglist,
7293            const MemOperand& operand) {
7294    Vld3(al, dt, nreglist, operand);
7295  }
7296
7297  void Vld4(Condition cond,
7298            DataType dt,
7299            const NeonRegisterList& nreglist,
7300            const AlignedMemOperand& operand) {
7301    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7302    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7303    VIXL_ASSERT(allow_macro_instructions_);
7304    VIXL_ASSERT(OutsideITBlock());
7305    MacroEmissionCheckScope guard(this);
7306    ITScope it_scope(this, &cond);
7307    vld4(cond, dt, nreglist, operand);
7308  }
7309  void Vld4(DataType dt,
7310            const NeonRegisterList& nreglist,
7311            const AlignedMemOperand& operand) {
7312    Vld4(al, dt, nreglist, operand);
7313  }
7314
7315  void Vldm(Condition cond,
7316            DataType dt,
7317            Register rn,
7318            WriteBack write_back,
7319            DRegisterList dreglist) {
7320    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7321    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7322    VIXL_ASSERT(allow_macro_instructions_);
7323    VIXL_ASSERT(OutsideITBlock());
7324    MacroEmissionCheckScope guard(this);
7325    ITScope it_scope(this, &cond);
7326    vldm(cond, dt, rn, write_back, dreglist);
7327  }
7328  void Vldm(DataType dt,
7329            Register rn,
7330            WriteBack write_back,
7331            DRegisterList dreglist) {
7332    Vldm(al, dt, rn, write_back, dreglist);
7333  }
7334  void Vldm(Condition cond,
7335            Register rn,
7336            WriteBack write_back,
7337            DRegisterList dreglist) {
7338    Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist);
7339  }
7340  void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) {
7341    Vldm(al, kDataTypeValueNone, rn, write_back, dreglist);
7342  }
7343
7344  void Vldm(Condition cond,
7345            DataType dt,
7346            Register rn,
7347            WriteBack write_back,
7348            SRegisterList sreglist) {
7349    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7350    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7351    VIXL_ASSERT(allow_macro_instructions_);
7352    VIXL_ASSERT(OutsideITBlock());
7353    MacroEmissionCheckScope guard(this);
7354    ITScope it_scope(this, &cond);
7355    vldm(cond, dt, rn, write_back, sreglist);
7356  }
7357  void Vldm(DataType dt,
7358            Register rn,
7359            WriteBack write_back,
7360            SRegisterList sreglist) {
7361    Vldm(al, dt, rn, write_back, sreglist);
7362  }
7363  void Vldm(Condition cond,
7364            Register rn,
7365            WriteBack write_back,
7366            SRegisterList sreglist) {
7367    Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist);
7368  }
7369  void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) {
7370    Vldm(al, kDataTypeValueNone, rn, write_back, sreglist);
7371  }
7372
7373  void Vldmdb(Condition cond,
7374              DataType dt,
7375              Register rn,
7376              WriteBack write_back,
7377              DRegisterList dreglist) {
7378    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7379    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7380    VIXL_ASSERT(allow_macro_instructions_);
7381    VIXL_ASSERT(OutsideITBlock());
7382    MacroEmissionCheckScope guard(this);
7383    ITScope it_scope(this, &cond);
7384    vldmdb(cond, dt, rn, write_back, dreglist);
7385  }
7386  void Vldmdb(DataType dt,
7387              Register rn,
7388              WriteBack write_back,
7389              DRegisterList dreglist) {
7390    Vldmdb(al, dt, rn, write_back, dreglist);
7391  }
7392  void Vldmdb(Condition cond,
7393              Register rn,
7394              WriteBack write_back,
7395              DRegisterList dreglist) {
7396    Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
7397  }
7398  void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
7399    Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
7400  }
7401
7402  void Vldmdb(Condition cond,
7403              DataType dt,
7404              Register rn,
7405              WriteBack write_back,
7406              SRegisterList sreglist) {
7407    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7408    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7409    VIXL_ASSERT(allow_macro_instructions_);
7410    VIXL_ASSERT(OutsideITBlock());
7411    MacroEmissionCheckScope guard(this);
7412    ITScope it_scope(this, &cond);
7413    vldmdb(cond, dt, rn, write_back, sreglist);
7414  }
7415  void Vldmdb(DataType dt,
7416              Register rn,
7417              WriteBack write_back,
7418              SRegisterList sreglist) {
7419    Vldmdb(al, dt, rn, write_back, sreglist);
7420  }
7421  void Vldmdb(Condition cond,
7422              Register rn,
7423              WriteBack write_back,
7424              SRegisterList sreglist) {
7425    Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
7426  }
7427  void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
7428    Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
7429  }
7430
7431  void Vldmia(Condition cond,
7432              DataType dt,
7433              Register rn,
7434              WriteBack write_back,
7435              DRegisterList dreglist) {
7436    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7437    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7438    VIXL_ASSERT(allow_macro_instructions_);
7439    VIXL_ASSERT(OutsideITBlock());
7440    MacroEmissionCheckScope guard(this);
7441    ITScope it_scope(this, &cond);
7442    vldmia(cond, dt, rn, write_back, dreglist);
7443  }
7444  void Vldmia(DataType dt,
7445              Register rn,
7446              WriteBack write_back,
7447              DRegisterList dreglist) {
7448    Vldmia(al, dt, rn, write_back, dreglist);
7449  }
7450  void Vldmia(Condition cond,
7451              Register rn,
7452              WriteBack write_back,
7453              DRegisterList dreglist) {
7454    Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
7455  }
7456  void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
7457    Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist);
7458  }
7459
7460  void Vldmia(Condition cond,
7461              DataType dt,
7462              Register rn,
7463              WriteBack write_back,
7464              SRegisterList sreglist) {
7465    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7466    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7467    VIXL_ASSERT(allow_macro_instructions_);
7468    VIXL_ASSERT(OutsideITBlock());
7469    MacroEmissionCheckScope guard(this);
7470    ITScope it_scope(this, &cond);
7471    vldmia(cond, dt, rn, write_back, sreglist);
7472  }
7473  void Vldmia(DataType dt,
7474              Register rn,
7475              WriteBack write_back,
7476              SRegisterList sreglist) {
7477    Vldmia(al, dt, rn, write_back, sreglist);
7478  }
7479  void Vldmia(Condition cond,
7480              Register rn,
7481              WriteBack write_back,
7482              SRegisterList sreglist) {
7483    Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
7484  }
7485  void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
7486    Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist);
7487  }
7488
7489  void Vldr(Condition cond, DataType dt, DRegister rd, Label* label) {
7490    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7491    VIXL_ASSERT(allow_macro_instructions_);
7492    VIXL_ASSERT(OutsideITBlock());
7493    MacroEmissionCheckScope guard(this);
7494    ITScope it_scope(this, &cond);
7495    vldr(cond, dt, rd, label);
7496  }
7497  void Vldr(DataType dt, DRegister rd, Label* label) {
7498    Vldr(al, dt, rd, label);
7499  }
7500  void Vldr(Condition cond, DRegister rd, Label* label) {
7501    Vldr(cond, Untyped64, rd, label);
7502  }
7503  void Vldr(DRegister rd, Label* label) { Vldr(al, Untyped64, rd, label); }
7504
7505  void Vldr(Condition cond,
7506            DataType dt,
7507            DRegister rd,
7508            const MemOperand& operand) {
7509    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7510    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7511    VIXL_ASSERT(allow_macro_instructions_);
7512    VIXL_ASSERT(OutsideITBlock());
7513    MacroEmissionCheckScope guard(this);
7514    ITScope it_scope(this, &cond);
7515    vldr(cond, dt, rd, operand);
7516  }
7517  void Vldr(DataType dt, DRegister rd, const MemOperand& operand) {
7518    Vldr(al, dt, rd, operand);
7519  }
7520  void Vldr(Condition cond, DRegister rd, const MemOperand& operand) {
7521    Vldr(cond, Untyped64, rd, operand);
7522  }
7523  void Vldr(DRegister rd, const MemOperand& operand) {
7524    Vldr(al, Untyped64, rd, operand);
7525  }
7526
7527  void Vldr(Condition cond, DataType dt, SRegister rd, Label* label) {
7528    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7529    VIXL_ASSERT(allow_macro_instructions_);
7530    VIXL_ASSERT(OutsideITBlock());
7531    MacroEmissionCheckScope guard(this);
7532    ITScope it_scope(this, &cond);
7533    vldr(cond, dt, rd, label);
7534  }
7535  void Vldr(DataType dt, SRegister rd, Label* label) {
7536    Vldr(al, dt, rd, label);
7537  }
7538  void Vldr(Condition cond, SRegister rd, Label* label) {
7539    Vldr(cond, Untyped32, rd, label);
7540  }
7541  void Vldr(SRegister rd, Label* label) { Vldr(al, Untyped32, rd, label); }
7542
7543  void Vldr(Condition cond,
7544            DataType dt,
7545            SRegister rd,
7546            const MemOperand& operand) {
7547    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7548    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7549    VIXL_ASSERT(allow_macro_instructions_);
7550    VIXL_ASSERT(OutsideITBlock());
7551    MacroEmissionCheckScope guard(this);
7552    ITScope it_scope(this, &cond);
7553    vldr(cond, dt, rd, operand);
7554  }
7555  void Vldr(DataType dt, SRegister rd, const MemOperand& operand) {
7556    Vldr(al, dt, rd, operand);
7557  }
7558  void Vldr(Condition cond, SRegister rd, const MemOperand& operand) {
7559    Vldr(cond, Untyped32, rd, operand);
7560  }
7561  void Vldr(SRegister rd, const MemOperand& operand) {
7562    Vldr(al, Untyped32, rd, operand);
7563  }
7564
7565  void Vmax(
7566      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7567    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7570    VIXL_ASSERT(allow_macro_instructions_);
7571    VIXL_ASSERT(OutsideITBlock());
7572    MacroEmissionCheckScope guard(this);
7573    ITScope it_scope(this, &cond);
7574    vmax(cond, dt, rd, rn, rm);
7575  }
7576  void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7577    Vmax(al, dt, rd, rn, rm);
7578  }
7579
7580  void Vmax(
7581      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7583    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7584    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7585    VIXL_ASSERT(allow_macro_instructions_);
7586    VIXL_ASSERT(OutsideITBlock());
7587    MacroEmissionCheckScope guard(this);
7588    ITScope it_scope(this, &cond);
7589    vmax(cond, dt, rd, rn, rm);
7590  }
7591  void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7592    Vmax(al, dt, rd, rn, rm);
7593  }
7594
7595  void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7596    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7599    VIXL_ASSERT(allow_macro_instructions_);
7600    VIXL_ASSERT(OutsideITBlock());
7601    MacroEmissionCheckScope guard(this);
7602    vmaxnm(dt, rd, rn, rm);
7603  }
7604
7605  void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7607    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7608    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7609    VIXL_ASSERT(allow_macro_instructions_);
7610    VIXL_ASSERT(OutsideITBlock());
7611    MacroEmissionCheckScope guard(this);
7612    vmaxnm(dt, rd, rn, rm);
7613  }
7614
7615  void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7617    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7619    VIXL_ASSERT(allow_macro_instructions_);
7620    VIXL_ASSERT(OutsideITBlock());
7621    MacroEmissionCheckScope guard(this);
7622    vmaxnm(dt, rd, rn, rm);
7623  }
7624
7625  void Vmin(
7626      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7627    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7628    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7629    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7630    VIXL_ASSERT(allow_macro_instructions_);
7631    VIXL_ASSERT(OutsideITBlock());
7632    MacroEmissionCheckScope guard(this);
7633    ITScope it_scope(this, &cond);
7634    vmin(cond, dt, rd, rn, rm);
7635  }
7636  void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7637    Vmin(al, dt, rd, rn, rm);
7638  }
7639
7640  void Vmin(
7641      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7642    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7643    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7645    VIXL_ASSERT(allow_macro_instructions_);
7646    VIXL_ASSERT(OutsideITBlock());
7647    MacroEmissionCheckScope guard(this);
7648    ITScope it_scope(this, &cond);
7649    vmin(cond, dt, rd, rn, rm);
7650  }
7651  void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7652    Vmin(al, dt, rd, rn, rm);
7653  }
7654
7655  void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7656    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7657    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7658    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7659    VIXL_ASSERT(allow_macro_instructions_);
7660    VIXL_ASSERT(OutsideITBlock());
7661    MacroEmissionCheckScope guard(this);
7662    vminnm(dt, rd, rn, rm);
7663  }
7664
7665  void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7666    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7669    VIXL_ASSERT(allow_macro_instructions_);
7670    VIXL_ASSERT(OutsideITBlock());
7671    MacroEmissionCheckScope guard(this);
7672    vminnm(dt, rd, rn, rm);
7673  }
7674
7675  void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7678    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7679    VIXL_ASSERT(allow_macro_instructions_);
7680    VIXL_ASSERT(OutsideITBlock());
7681    MacroEmissionCheckScope guard(this);
7682    vminnm(dt, rd, rn, rm);
7683  }
7684
7685  void Vmla(Condition cond,
7686            DataType dt,
7687            DRegister rd,
7688            DRegister rn,
7689            DRegisterLane rm) {
7690    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7691    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7692    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7693    VIXL_ASSERT(allow_macro_instructions_);
7694    VIXL_ASSERT(OutsideITBlock());
7695    MacroEmissionCheckScope guard(this);
7696    ITScope it_scope(this, &cond);
7697    vmla(cond, dt, rd, rn, rm);
7698  }
7699  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7700    Vmla(al, dt, rd, rn, rm);
7701  }
7702
7703  void Vmla(Condition cond,
7704            DataType dt,
7705            QRegister rd,
7706            QRegister rn,
7707            DRegisterLane rm) {
7708    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7709    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7710    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7711    VIXL_ASSERT(allow_macro_instructions_);
7712    VIXL_ASSERT(OutsideITBlock());
7713    MacroEmissionCheckScope guard(this);
7714    ITScope it_scope(this, &cond);
7715    vmla(cond, dt, rd, rn, rm);
7716  }
7717  void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7718    Vmla(al, dt, rd, rn, rm);
7719  }
7720
7721  void Vmla(
7722      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7723    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7725    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7726    VIXL_ASSERT(allow_macro_instructions_);
7727    VIXL_ASSERT(OutsideITBlock());
7728    MacroEmissionCheckScope guard(this);
7729    ITScope it_scope(this, &cond);
7730    vmla(cond, dt, rd, rn, rm);
7731  }
7732  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7733    Vmla(al, dt, rd, rn, rm);
7734  }
7735
7736  void Vmla(
7737      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7738    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7739    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7740    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7741    VIXL_ASSERT(allow_macro_instructions_);
7742    VIXL_ASSERT(OutsideITBlock());
7743    MacroEmissionCheckScope guard(this);
7744    ITScope it_scope(this, &cond);
7745    vmla(cond, dt, rd, rn, rm);
7746  }
7747  void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7748    Vmla(al, dt, rd, rn, rm);
7749  }
7750
7751  void Vmla(
7752      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7753    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7754    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7755    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7756    VIXL_ASSERT(allow_macro_instructions_);
7757    VIXL_ASSERT(OutsideITBlock());
7758    MacroEmissionCheckScope guard(this);
7759    ITScope it_scope(this, &cond);
7760    vmla(cond, dt, rd, rn, rm);
7761  }
7762  void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7763    Vmla(al, dt, rd, rn, rm);
7764  }
7765
7766  void Vmlal(Condition cond,
7767             DataType dt,
7768             QRegister rd,
7769             DRegister rn,
7770             DRegisterLane rm) {
7771    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7772    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7773    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7774    VIXL_ASSERT(allow_macro_instructions_);
7775    VIXL_ASSERT(OutsideITBlock());
7776    MacroEmissionCheckScope guard(this);
7777    ITScope it_scope(this, &cond);
7778    vmlal(cond, dt, rd, rn, rm);
7779  }
7780  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7781    Vmlal(al, dt, rd, rn, rm);
7782  }
7783
7784  void Vmlal(
7785      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7787    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7788    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7789    VIXL_ASSERT(allow_macro_instructions_);
7790    VIXL_ASSERT(OutsideITBlock());
7791    MacroEmissionCheckScope guard(this);
7792    ITScope it_scope(this, &cond);
7793    vmlal(cond, dt, rd, rn, rm);
7794  }
7795  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7796    Vmlal(al, dt, rd, rn, rm);
7797  }
7798
7799  void Vmls(Condition cond,
7800            DataType dt,
7801            DRegister rd,
7802            DRegister rn,
7803            DRegisterLane rm) {
7804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7805    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7806    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7807    VIXL_ASSERT(allow_macro_instructions_);
7808    VIXL_ASSERT(OutsideITBlock());
7809    MacroEmissionCheckScope guard(this);
7810    ITScope it_scope(this, &cond);
7811    vmls(cond, dt, rd, rn, rm);
7812  }
7813  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7814    Vmls(al, dt, rd, rn, rm);
7815  }
7816
7817  void Vmls(Condition cond,
7818            DataType dt,
7819            QRegister rd,
7820            QRegister rn,
7821            DRegisterLane rm) {
7822    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7823    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7824    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7825    VIXL_ASSERT(allow_macro_instructions_);
7826    VIXL_ASSERT(OutsideITBlock());
7827    MacroEmissionCheckScope guard(this);
7828    ITScope it_scope(this, &cond);
7829    vmls(cond, dt, rd, rn, rm);
7830  }
7831  void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7832    Vmls(al, dt, rd, rn, rm);
7833  }
7834
7835  void Vmls(
7836      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7837    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7838    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7839    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7840    VIXL_ASSERT(allow_macro_instructions_);
7841    VIXL_ASSERT(OutsideITBlock());
7842    MacroEmissionCheckScope guard(this);
7843    ITScope it_scope(this, &cond);
7844    vmls(cond, dt, rd, rn, rm);
7845  }
7846  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7847    Vmls(al, dt, rd, rn, rm);
7848  }
7849
7850  void Vmls(
7851      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7852    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7853    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7855    VIXL_ASSERT(allow_macro_instructions_);
7856    VIXL_ASSERT(OutsideITBlock());
7857    MacroEmissionCheckScope guard(this);
7858    ITScope it_scope(this, &cond);
7859    vmls(cond, dt, rd, rn, rm);
7860  }
7861  void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7862    Vmls(al, dt, rd, rn, rm);
7863  }
7864
7865  void Vmls(
7866      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7867    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7868    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7869    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7870    VIXL_ASSERT(allow_macro_instructions_);
7871    VIXL_ASSERT(OutsideITBlock());
7872    MacroEmissionCheckScope guard(this);
7873    ITScope it_scope(this, &cond);
7874    vmls(cond, dt, rd, rn, rm);
7875  }
7876  void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7877    Vmls(al, dt, rd, rn, rm);
7878  }
7879
7880  void Vmlsl(Condition cond,
7881             DataType dt,
7882             QRegister rd,
7883             DRegister rn,
7884             DRegisterLane rm) {
7885    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7886    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7887    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7888    VIXL_ASSERT(allow_macro_instructions_);
7889    VIXL_ASSERT(OutsideITBlock());
7890    MacroEmissionCheckScope guard(this);
7891    ITScope it_scope(this, &cond);
7892    vmlsl(cond, dt, rd, rn, rm);
7893  }
7894  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7895    Vmlsl(al, dt, rd, rn, rm);
7896  }
7897
7898  void Vmlsl(
7899      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7900    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7901    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7902    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7903    VIXL_ASSERT(allow_macro_instructions_);
7904    VIXL_ASSERT(OutsideITBlock());
7905    MacroEmissionCheckScope guard(this);
7906    ITScope it_scope(this, &cond);
7907    vmlsl(cond, dt, rd, rn, rm);
7908  }
7909  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7910    Vmlsl(al, dt, rd, rn, rm);
7911  }
7912
7913  void Vmov(Condition cond, Register rt, SRegister rn) {
7914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7916    VIXL_ASSERT(allow_macro_instructions_);
7917    VIXL_ASSERT(OutsideITBlock());
7918    MacroEmissionCheckScope guard(this);
7919    ITScope it_scope(this, &cond);
7920    vmov(cond, rt, rn);
7921  }
7922  void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); }
7923
7924  void Vmov(Condition cond, SRegister rn, Register rt) {
7925    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7926    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7927    VIXL_ASSERT(allow_macro_instructions_);
7928    VIXL_ASSERT(OutsideITBlock());
7929    MacroEmissionCheckScope guard(this);
7930    ITScope it_scope(this, &cond);
7931    vmov(cond, rn, rt);
7932  }
7933  void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); }
7934
7935  void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) {
7936    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7937    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7939    VIXL_ASSERT(allow_macro_instructions_);
7940    VIXL_ASSERT(OutsideITBlock());
7941    MacroEmissionCheckScope guard(this);
7942    ITScope it_scope(this, &cond);
7943    vmov(cond, rt, rt2, rm);
7944  }
7945  void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); }
7946
7947  void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) {
7948    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7951    VIXL_ASSERT(allow_macro_instructions_);
7952    VIXL_ASSERT(OutsideITBlock());
7953    MacroEmissionCheckScope guard(this);
7954    ITScope it_scope(this, &cond);
7955    vmov(cond, rm, rt, rt2);
7956  }
7957  void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); }
7958
7959  void Vmov(
7960      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) {
7961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7962    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7963    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7965    VIXL_ASSERT(allow_macro_instructions_);
7966    VIXL_ASSERT(OutsideITBlock());
7967    MacroEmissionCheckScope guard(this);
7968    ITScope it_scope(this, &cond);
7969    vmov(cond, rt, rt2, rm, rm1);
7970  }
7971  void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) {
7972    Vmov(al, rt, rt2, rm, rm1);
7973  }
7974
7975  void Vmov(
7976      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) {
7977    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7978    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7979    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7980    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7981    VIXL_ASSERT(allow_macro_instructions_);
7982    VIXL_ASSERT(OutsideITBlock());
7983    MacroEmissionCheckScope guard(this);
7984    ITScope it_scope(this, &cond);
7985    vmov(cond, rm, rm1, rt, rt2);
7986  }
7987  void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) {
7988    Vmov(al, rm, rm1, rt, rt2);
7989  }
7990
7991  void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) {
7992    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7993    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7994    VIXL_ASSERT(allow_macro_instructions_);
7995    VIXL_ASSERT(OutsideITBlock());
7996    MacroEmissionCheckScope guard(this);
7997    ITScope it_scope(this, &cond);
7998    vmov(cond, dt, rd, rt);
7999  }
8000  void Vmov(DataType dt, DRegisterLane rd, Register rt) {
8001    Vmov(al, dt, rd, rt);
8002  }
8003  void Vmov(Condition cond, DRegisterLane rd, Register rt) {
8004    Vmov(cond, kDataTypeValueNone, rd, rt);
8005  }
8006  void Vmov(DRegisterLane rd, Register rt) {
8007    Vmov(al, kDataTypeValueNone, rd, rt);
8008  }
8009
8010  void Vmov(Condition cond,
8011            DataType dt,
8012            DRegister rd,
8013            const DOperand& operand) {
8014    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8015    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8016    VIXL_ASSERT(allow_macro_instructions_);
8017    VIXL_ASSERT(OutsideITBlock());
8018    MacroEmissionCheckScope guard(this);
8019    ITScope it_scope(this, &cond);
8020    vmov(cond, dt, rd, operand);
8021  }
8022  void Vmov(DataType dt, DRegister rd, const DOperand& operand) {
8023    Vmov(al, dt, rd, operand);
8024  }
8025
8026  void Vmov(Condition cond,
8027            DataType dt,
8028            QRegister rd,
8029            const QOperand& operand) {
8030    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8031    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8032    VIXL_ASSERT(allow_macro_instructions_);
8033    VIXL_ASSERT(OutsideITBlock());
8034    MacroEmissionCheckScope guard(this);
8035    ITScope it_scope(this, &cond);
8036    vmov(cond, dt, rd, operand);
8037  }
8038  void Vmov(DataType dt, QRegister rd, const QOperand& operand) {
8039    Vmov(al, dt, rd, operand);
8040  }
8041
8042  void Vmov(Condition cond,
8043            DataType dt,
8044            SRegister rd,
8045            const SOperand& operand) {
8046    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8047    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8048    VIXL_ASSERT(allow_macro_instructions_);
8049    VIXL_ASSERT(OutsideITBlock());
8050    MacroEmissionCheckScope guard(this);
8051    ITScope it_scope(this, &cond);
8052    vmov(cond, dt, rd, operand);
8053  }
8054  void Vmov(DataType dt, SRegister rd, const SOperand& operand) {
8055    Vmov(al, dt, rd, operand);
8056  }
8057
8058  void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) {
8059    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8060    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8061    VIXL_ASSERT(allow_macro_instructions_);
8062    VIXL_ASSERT(OutsideITBlock());
8063    MacroEmissionCheckScope guard(this);
8064    ITScope it_scope(this, &cond);
8065    vmov(cond, dt, rt, rn);
8066  }
8067  void Vmov(DataType dt, Register rt, DRegisterLane rn) {
8068    Vmov(al, dt, rt, rn);
8069  }
8070  void Vmov(Condition cond, Register rt, DRegisterLane rn) {
8071    Vmov(cond, kDataTypeValueNone, rt, rn);
8072  }
8073  void Vmov(Register rt, DRegisterLane rn) {
8074    Vmov(al, kDataTypeValueNone, rt, rn);
8075  }
8076
8077  void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) {
8078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8080    VIXL_ASSERT(allow_macro_instructions_);
8081    VIXL_ASSERT(OutsideITBlock());
8082    MacroEmissionCheckScope guard(this);
8083    ITScope it_scope(this, &cond);
8084    vmovl(cond, dt, rd, rm);
8085  }
8086  void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); }
8087
8088  void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8089    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8091    VIXL_ASSERT(allow_macro_instructions_);
8092    VIXL_ASSERT(OutsideITBlock());
8093    MacroEmissionCheckScope guard(this);
8094    ITScope it_scope(this, &cond);
8095    vmovn(cond, dt, rd, rm);
8096  }
8097  void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); }
8098
8099  void Vmrs(Condition cond,
8100            RegisterOrAPSR_nzcv rt,
8101            SpecialFPRegister spec_reg) {
8102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8103    VIXL_ASSERT(allow_macro_instructions_);
8104    VIXL_ASSERT(OutsideITBlock());
8105    MacroEmissionCheckScope guard(this);
8106    ITScope it_scope(this, &cond);
8107    vmrs(cond, rt, spec_reg);
8108  }
8109  void Vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) {
8110    Vmrs(al, rt, spec_reg);
8111  }
8112
8113  void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) {
8114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8115    VIXL_ASSERT(allow_macro_instructions_);
8116    VIXL_ASSERT(OutsideITBlock());
8117    MacroEmissionCheckScope guard(this);
8118    ITScope it_scope(this, &cond);
8119    vmsr(cond, spec_reg, rt);
8120  }
8121  void Vmsr(SpecialFPRegister spec_reg, Register rt) { Vmsr(al, spec_reg, rt); }
8122
8123  void Vmul(Condition cond,
8124            DataType dt,
8125            DRegister rd,
8126            DRegister rn,
8127            DRegister dm,
8128            unsigned index) {
8129    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8130    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8131    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8132    VIXL_ASSERT(allow_macro_instructions_);
8133    VIXL_ASSERT(OutsideITBlock());
8134    MacroEmissionCheckScope guard(this);
8135    ITScope it_scope(this, &cond);
8136    vmul(cond, dt, rd, rn, dm, index);
8137  }
8138  void Vmul(
8139      DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) {
8140    Vmul(al, dt, rd, rn, dm, index);
8141  }
8142
8143  void Vmul(Condition cond,
8144            DataType dt,
8145            QRegister rd,
8146            QRegister rn,
8147            DRegister dm,
8148            unsigned index) {
8149    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8150    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8151    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8152    VIXL_ASSERT(allow_macro_instructions_);
8153    VIXL_ASSERT(OutsideITBlock());
8154    MacroEmissionCheckScope guard(this);
8155    ITScope it_scope(this, &cond);
8156    vmul(cond, dt, rd, rn, dm, index);
8157  }
8158  void Vmul(
8159      DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) {
8160    Vmul(al, dt, rd, rn, dm, index);
8161  }
8162
8163  void Vmul(
8164      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8165    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8166    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8167    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8168    VIXL_ASSERT(allow_macro_instructions_);
8169    VIXL_ASSERT(OutsideITBlock());
8170    MacroEmissionCheckScope guard(this);
8171    ITScope it_scope(this, &cond);
8172    vmul(cond, dt, rd, rn, rm);
8173  }
8174  void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8175    Vmul(al, dt, rd, rn, rm);
8176  }
8177
8178  void Vmul(
8179      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8180    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8181    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8182    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8183    VIXL_ASSERT(allow_macro_instructions_);
8184    VIXL_ASSERT(OutsideITBlock());
8185    MacroEmissionCheckScope guard(this);
8186    ITScope it_scope(this, &cond);
8187    vmul(cond, dt, rd, rn, rm);
8188  }
8189  void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8190    Vmul(al, dt, rd, rn, rm);
8191  }
8192
8193  void Vmul(
8194      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8196    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8198    VIXL_ASSERT(allow_macro_instructions_);
8199    VIXL_ASSERT(OutsideITBlock());
8200    MacroEmissionCheckScope guard(this);
8201    ITScope it_scope(this, &cond);
8202    vmul(cond, dt, rd, rn, rm);
8203  }
8204  void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8205    Vmul(al, dt, rd, rn, rm);
8206  }
8207
8208  void Vmull(Condition cond,
8209             DataType dt,
8210             QRegister rd,
8211             DRegister rn,
8212             DRegister dm,
8213             unsigned index) {
8214    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8215    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8216    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8217    VIXL_ASSERT(allow_macro_instructions_);
8218    VIXL_ASSERT(OutsideITBlock());
8219    MacroEmissionCheckScope guard(this);
8220    ITScope it_scope(this, &cond);
8221    vmull(cond, dt, rd, rn, dm, index);
8222  }
8223  void Vmull(
8224      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8225    Vmull(al, dt, rd, rn, dm, index);
8226  }
8227
8228  void Vmull(
8229      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8230    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8231    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8232    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8233    VIXL_ASSERT(allow_macro_instructions_);
8234    VIXL_ASSERT(OutsideITBlock());
8235    MacroEmissionCheckScope guard(this);
8236    ITScope it_scope(this, &cond);
8237    vmull(cond, dt, rd, rn, rm);
8238  }
8239  void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8240    Vmull(al, dt, rd, rn, rm);
8241  }
8242
8243  void Vmvn(Condition cond,
8244            DataType dt,
8245            DRegister rd,
8246            const DOperand& operand) {
8247    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8248    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8249    VIXL_ASSERT(allow_macro_instructions_);
8250    VIXL_ASSERT(OutsideITBlock());
8251    MacroEmissionCheckScope guard(this);
8252    ITScope it_scope(this, &cond);
8253    vmvn(cond, dt, rd, operand);
8254  }
8255  void Vmvn(DataType dt, DRegister rd, const DOperand& operand) {
8256    Vmvn(al, dt, rd, operand);
8257  }
8258
8259  void Vmvn(Condition cond,
8260            DataType dt,
8261            QRegister rd,
8262            const QOperand& operand) {
8263    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8264    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8265    VIXL_ASSERT(allow_macro_instructions_);
8266    VIXL_ASSERT(OutsideITBlock());
8267    MacroEmissionCheckScope guard(this);
8268    ITScope it_scope(this, &cond);
8269    vmvn(cond, dt, rd, operand);
8270  }
8271  void Vmvn(DataType dt, QRegister rd, const QOperand& operand) {
8272    Vmvn(al, dt, rd, operand);
8273  }
8274
8275  void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8276    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8277    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8278    VIXL_ASSERT(allow_macro_instructions_);
8279    VIXL_ASSERT(OutsideITBlock());
8280    MacroEmissionCheckScope guard(this);
8281    ITScope it_scope(this, &cond);
8282    vneg(cond, dt, rd, rm);
8283  }
8284  void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); }
8285
8286  void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8287    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8288    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8289    VIXL_ASSERT(allow_macro_instructions_);
8290    VIXL_ASSERT(OutsideITBlock());
8291    MacroEmissionCheckScope guard(this);
8292    ITScope it_scope(this, &cond);
8293    vneg(cond, dt, rd, rm);
8294  }
8295  void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); }
8296
8297  void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) {
8298    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8299    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8300    VIXL_ASSERT(allow_macro_instructions_);
8301    VIXL_ASSERT(OutsideITBlock());
8302    MacroEmissionCheckScope guard(this);
8303    ITScope it_scope(this, &cond);
8304    vneg(cond, dt, rd, rm);
8305  }
8306  void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); }
8307
8308  void Vnmla(
8309      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8311    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8312    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8313    VIXL_ASSERT(allow_macro_instructions_);
8314    VIXL_ASSERT(OutsideITBlock());
8315    MacroEmissionCheckScope guard(this);
8316    ITScope it_scope(this, &cond);
8317    vnmla(cond, dt, rd, rn, rm);
8318  }
8319  void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8320    Vnmla(al, dt, rd, rn, rm);
8321  }
8322
8323  void Vnmla(
8324      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8327    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8328    VIXL_ASSERT(allow_macro_instructions_);
8329    VIXL_ASSERT(OutsideITBlock());
8330    MacroEmissionCheckScope guard(this);
8331    ITScope it_scope(this, &cond);
8332    vnmla(cond, dt, rd, rn, rm);
8333  }
8334  void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8335    Vnmla(al, dt, rd, rn, rm);
8336  }
8337
8338  void Vnmls(
8339      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8340    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8341    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8342    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8343    VIXL_ASSERT(allow_macro_instructions_);
8344    VIXL_ASSERT(OutsideITBlock());
8345    MacroEmissionCheckScope guard(this);
8346    ITScope it_scope(this, &cond);
8347    vnmls(cond, dt, rd, rn, rm);
8348  }
8349  void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8350    Vnmls(al, dt, rd, rn, rm);
8351  }
8352
8353  void Vnmls(
8354      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8355    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8356    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8357    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8358    VIXL_ASSERT(allow_macro_instructions_);
8359    VIXL_ASSERT(OutsideITBlock());
8360    MacroEmissionCheckScope guard(this);
8361    ITScope it_scope(this, &cond);
8362    vnmls(cond, dt, rd, rn, rm);
8363  }
8364  void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8365    Vnmls(al, dt, rd, rn, rm);
8366  }
8367
8368  void Vnmul(
8369      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8372    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8373    VIXL_ASSERT(allow_macro_instructions_);
8374    VIXL_ASSERT(OutsideITBlock());
8375    MacroEmissionCheckScope guard(this);
8376    ITScope it_scope(this, &cond);
8377    vnmul(cond, dt, rd, rn, rm);
8378  }
8379  void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8380    Vnmul(al, dt, rd, rn, rm);
8381  }
8382
8383  void Vnmul(
8384      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8385    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8386    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8387    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8388    VIXL_ASSERT(allow_macro_instructions_);
8389    VIXL_ASSERT(OutsideITBlock());
8390    MacroEmissionCheckScope guard(this);
8391    ITScope it_scope(this, &cond);
8392    vnmul(cond, dt, rd, rn, rm);
8393  }
8394  void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8395    Vnmul(al, dt, rd, rn, rm);
8396  }
8397
8398  void Vorn(Condition cond,
8399            DataType dt,
8400            DRegister rd,
8401            DRegister rn,
8402            const DOperand& operand) {
8403    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8404    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8405    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8406    VIXL_ASSERT(allow_macro_instructions_);
8407    VIXL_ASSERT(OutsideITBlock());
8408    MacroEmissionCheckScope guard(this);
8409    ITScope it_scope(this, &cond);
8410    vorn(cond, dt, rd, rn, operand);
8411  }
8412  void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8413    Vorn(al, dt, rd, rn, operand);
8414  }
8415
8416  void Vorn(Condition cond,
8417            DataType dt,
8418            QRegister rd,
8419            QRegister rn,
8420            const QOperand& operand) {
8421    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8422    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8423    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8424    VIXL_ASSERT(allow_macro_instructions_);
8425    VIXL_ASSERT(OutsideITBlock());
8426    MacroEmissionCheckScope guard(this);
8427    ITScope it_scope(this, &cond);
8428    vorn(cond, dt, rd, rn, operand);
8429  }
8430  void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8431    Vorn(al, dt, rd, rn, operand);
8432  }
8433
8434  void Vorr(Condition cond,
8435            DataType dt,
8436            DRegister rd,
8437            DRegister rn,
8438            const DOperand& operand) {
8439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8441    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8442    VIXL_ASSERT(allow_macro_instructions_);
8443    VIXL_ASSERT(OutsideITBlock());
8444    MacroEmissionCheckScope guard(this);
8445    ITScope it_scope(this, &cond);
8446    vorr(cond, dt, rd, rn, operand);
8447  }
8448  void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8449    Vorr(al, dt, rd, rn, operand);
8450  }
8451  void Vorr(Condition cond,
8452            DRegister rd,
8453            DRegister rn,
8454            const DOperand& operand) {
8455    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8456  }
8457  void Vorr(DRegister rd, DRegister rn, const DOperand& operand) {
8458    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8459  }
8460
8461  void Vorr(Condition cond,
8462            DataType dt,
8463            QRegister rd,
8464            QRegister rn,
8465            const QOperand& operand) {
8466    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8467    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8468    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8469    VIXL_ASSERT(allow_macro_instructions_);
8470    VIXL_ASSERT(OutsideITBlock());
8471    MacroEmissionCheckScope guard(this);
8472    ITScope it_scope(this, &cond);
8473    vorr(cond, dt, rd, rn, operand);
8474  }
8475  void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8476    Vorr(al, dt, rd, rn, operand);
8477  }
8478  void Vorr(Condition cond,
8479            QRegister rd,
8480            QRegister rn,
8481            const QOperand& operand) {
8482    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8483  }
8484  void Vorr(QRegister rd, QRegister rn, const QOperand& operand) {
8485    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8486  }
8487
8488  void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8490    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8491    VIXL_ASSERT(allow_macro_instructions_);
8492    VIXL_ASSERT(OutsideITBlock());
8493    MacroEmissionCheckScope guard(this);
8494    ITScope it_scope(this, &cond);
8495    vpadal(cond, dt, rd, rm);
8496  }
8497  void Vpadal(DataType dt, DRegister rd, DRegister rm) {
8498    Vpadal(al, dt, rd, rm);
8499  }
8500
8501  void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8502    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8504    VIXL_ASSERT(allow_macro_instructions_);
8505    VIXL_ASSERT(OutsideITBlock());
8506    MacroEmissionCheckScope guard(this);
8507    ITScope it_scope(this, &cond);
8508    vpadal(cond, dt, rd, rm);
8509  }
8510  void Vpadal(DataType dt, QRegister rd, QRegister rm) {
8511    Vpadal(al, dt, rd, rm);
8512  }
8513
8514  void Vpadd(
8515      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8517    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8518    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8519    VIXL_ASSERT(allow_macro_instructions_);
8520    VIXL_ASSERT(OutsideITBlock());
8521    MacroEmissionCheckScope guard(this);
8522    ITScope it_scope(this, &cond);
8523    vpadd(cond, dt, rd, rn, rm);
8524  }
8525  void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8526    Vpadd(al, dt, rd, rn, rm);
8527  }
8528
8529  void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8530    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8531    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8532    VIXL_ASSERT(allow_macro_instructions_);
8533    VIXL_ASSERT(OutsideITBlock());
8534    MacroEmissionCheckScope guard(this);
8535    ITScope it_scope(this, &cond);
8536    vpaddl(cond, dt, rd, rm);
8537  }
8538  void Vpaddl(DataType dt, DRegister rd, DRegister rm) {
8539    Vpaddl(al, dt, rd, rm);
8540  }
8541
8542  void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8543    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8544    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8545    VIXL_ASSERT(allow_macro_instructions_);
8546    VIXL_ASSERT(OutsideITBlock());
8547    MacroEmissionCheckScope guard(this);
8548    ITScope it_scope(this, &cond);
8549    vpaddl(cond, dt, rd, rm);
8550  }
8551  void Vpaddl(DataType dt, QRegister rd, QRegister rm) {
8552    Vpaddl(al, dt, rd, rm);
8553  }
8554
8555  void Vpmax(
8556      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8557    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8558    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8559    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8560    VIXL_ASSERT(allow_macro_instructions_);
8561    VIXL_ASSERT(OutsideITBlock());
8562    MacroEmissionCheckScope guard(this);
8563    ITScope it_scope(this, &cond);
8564    vpmax(cond, dt, rd, rn, rm);
8565  }
8566  void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8567    Vpmax(al, dt, rd, rn, rm);
8568  }
8569
8570  void Vpmin(
8571      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8572    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8573    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8574    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8575    VIXL_ASSERT(allow_macro_instructions_);
8576    VIXL_ASSERT(OutsideITBlock());
8577    MacroEmissionCheckScope guard(this);
8578    ITScope it_scope(this, &cond);
8579    vpmin(cond, dt, rd, rn, rm);
8580  }
8581  void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8582    Vpmin(al, dt, rd, rn, rm);
8583  }
8584
8585  void Vpop(Condition cond, DataType dt, DRegisterList dreglist) {
8586    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8587    VIXL_ASSERT(allow_macro_instructions_);
8588    VIXL_ASSERT(OutsideITBlock());
8589    MacroEmissionCheckScope guard(this);
8590    ITScope it_scope(this, &cond);
8591    vpop(cond, dt, dreglist);
8592  }
8593  void Vpop(DataType dt, DRegisterList dreglist) { Vpop(al, dt, dreglist); }
8594  void Vpop(Condition cond, DRegisterList dreglist) {
8595    Vpop(cond, kDataTypeValueNone, dreglist);
8596  }
8597  void Vpop(DRegisterList dreglist) { Vpop(al, kDataTypeValueNone, dreglist); }
8598
8599  void Vpop(Condition cond, DataType dt, SRegisterList sreglist) {
8600    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8601    VIXL_ASSERT(allow_macro_instructions_);
8602    VIXL_ASSERT(OutsideITBlock());
8603    MacroEmissionCheckScope guard(this);
8604    ITScope it_scope(this, &cond);
8605    vpop(cond, dt, sreglist);
8606  }
8607  void Vpop(DataType dt, SRegisterList sreglist) { Vpop(al, dt, sreglist); }
8608  void Vpop(Condition cond, SRegisterList sreglist) {
8609    Vpop(cond, kDataTypeValueNone, sreglist);
8610  }
8611  void Vpop(SRegisterList sreglist) { Vpop(al, kDataTypeValueNone, sreglist); }
8612
8613  void Vpush(Condition cond, DataType dt, DRegisterList dreglist) {
8614    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8615    VIXL_ASSERT(allow_macro_instructions_);
8616    VIXL_ASSERT(OutsideITBlock());
8617    MacroEmissionCheckScope guard(this);
8618    ITScope it_scope(this, &cond);
8619    vpush(cond, dt, dreglist);
8620  }
8621  void Vpush(DataType dt, DRegisterList dreglist) { Vpush(al, dt, dreglist); }
8622  void Vpush(Condition cond, DRegisterList dreglist) {
8623    Vpush(cond, kDataTypeValueNone, dreglist);
8624  }
8625  void Vpush(DRegisterList dreglist) {
8626    Vpush(al, kDataTypeValueNone, dreglist);
8627  }
8628
8629  void Vpush(Condition cond, DataType dt, SRegisterList sreglist) {
8630    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8631    VIXL_ASSERT(allow_macro_instructions_);
8632    VIXL_ASSERT(OutsideITBlock());
8633    MacroEmissionCheckScope guard(this);
8634    ITScope it_scope(this, &cond);
8635    vpush(cond, dt, sreglist);
8636  }
8637  void Vpush(DataType dt, SRegisterList sreglist) { Vpush(al, dt, sreglist); }
8638  void Vpush(Condition cond, SRegisterList sreglist) {
8639    Vpush(cond, kDataTypeValueNone, sreglist);
8640  }
8641  void Vpush(SRegisterList sreglist) {
8642    Vpush(al, kDataTypeValueNone, sreglist);
8643  }
8644
8645  void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8646    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8647    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8648    VIXL_ASSERT(allow_macro_instructions_);
8649    VIXL_ASSERT(OutsideITBlock());
8650    MacroEmissionCheckScope guard(this);
8651    ITScope it_scope(this, &cond);
8652    vqabs(cond, dt, rd, rm);
8653  }
8654  void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); }
8655
8656  void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8657    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8658    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8659    VIXL_ASSERT(allow_macro_instructions_);
8660    VIXL_ASSERT(OutsideITBlock());
8661    MacroEmissionCheckScope guard(this);
8662    ITScope it_scope(this, &cond);
8663    vqabs(cond, dt, rd, rm);
8664  }
8665  void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); }
8666
8667  void Vqadd(
8668      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8671    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8672    VIXL_ASSERT(allow_macro_instructions_);
8673    VIXL_ASSERT(OutsideITBlock());
8674    MacroEmissionCheckScope guard(this);
8675    ITScope it_scope(this, &cond);
8676    vqadd(cond, dt, rd, rn, rm);
8677  }
8678  void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8679    Vqadd(al, dt, rd, rn, rm);
8680  }
8681
8682  void Vqadd(
8683      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8686    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8687    VIXL_ASSERT(allow_macro_instructions_);
8688    VIXL_ASSERT(OutsideITBlock());
8689    MacroEmissionCheckScope guard(this);
8690    ITScope it_scope(this, &cond);
8691    vqadd(cond, dt, rd, rn, rm);
8692  }
8693  void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8694    Vqadd(al, dt, rd, rn, rm);
8695  }
8696
8697  void Vqdmlal(
8698      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8700    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8701    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8702    VIXL_ASSERT(allow_macro_instructions_);
8703    VIXL_ASSERT(OutsideITBlock());
8704    MacroEmissionCheckScope guard(this);
8705    ITScope it_scope(this, &cond);
8706    vqdmlal(cond, dt, rd, rn, rm);
8707  }
8708  void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8709    Vqdmlal(al, dt, rd, rn, rm);
8710  }
8711
8712  void Vqdmlal(Condition cond,
8713               DataType dt,
8714               QRegister rd,
8715               DRegister rn,
8716               DRegister dm,
8717               unsigned index) {
8718    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8720    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8721    VIXL_ASSERT(allow_macro_instructions_);
8722    VIXL_ASSERT(OutsideITBlock());
8723    MacroEmissionCheckScope guard(this);
8724    ITScope it_scope(this, &cond);
8725    vqdmlal(cond, dt, rd, rn, dm, index);
8726  }
8727  void Vqdmlal(
8728      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8729    Vqdmlal(al, dt, rd, rn, dm, index);
8730  }
8731
8732  void Vqdmlsl(
8733      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8734    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8737    VIXL_ASSERT(allow_macro_instructions_);
8738    VIXL_ASSERT(OutsideITBlock());
8739    MacroEmissionCheckScope guard(this);
8740    ITScope it_scope(this, &cond);
8741    vqdmlsl(cond, dt, rd, rn, rm);
8742  }
8743  void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8744    Vqdmlsl(al, dt, rd, rn, rm);
8745  }
8746
8747  void Vqdmlsl(Condition cond,
8748               DataType dt,
8749               QRegister rd,
8750               DRegister rn,
8751               DRegister dm,
8752               unsigned index) {
8753    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8754    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8755    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8756    VIXL_ASSERT(allow_macro_instructions_);
8757    VIXL_ASSERT(OutsideITBlock());
8758    MacroEmissionCheckScope guard(this);
8759    ITScope it_scope(this, &cond);
8760    vqdmlsl(cond, dt, rd, rn, dm, index);
8761  }
8762  void Vqdmlsl(
8763      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8764    Vqdmlsl(al, dt, rd, rn, dm, index);
8765  }
8766
8767  void Vqdmulh(
8768      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8769    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8770    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8771    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8772    VIXL_ASSERT(allow_macro_instructions_);
8773    VIXL_ASSERT(OutsideITBlock());
8774    MacroEmissionCheckScope guard(this);
8775    ITScope it_scope(this, &cond);
8776    vqdmulh(cond, dt, rd, rn, rm);
8777  }
8778  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8779    Vqdmulh(al, dt, rd, rn, rm);
8780  }
8781
8782  void Vqdmulh(
8783      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8784    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8785    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8787    VIXL_ASSERT(allow_macro_instructions_);
8788    VIXL_ASSERT(OutsideITBlock());
8789    MacroEmissionCheckScope guard(this);
8790    ITScope it_scope(this, &cond);
8791    vqdmulh(cond, dt, rd, rn, rm);
8792  }
8793  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8794    Vqdmulh(al, dt, rd, rn, rm);
8795  }
8796
8797  void Vqdmulh(Condition cond,
8798               DataType dt,
8799               DRegister rd,
8800               DRegister rn,
8801               DRegisterLane rm) {
8802    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8803    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8805    VIXL_ASSERT(allow_macro_instructions_);
8806    VIXL_ASSERT(OutsideITBlock());
8807    MacroEmissionCheckScope guard(this);
8808    ITScope it_scope(this, &cond);
8809    vqdmulh(cond, dt, rd, rn, rm);
8810  }
8811  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8812    Vqdmulh(al, dt, rd, rn, rm);
8813  }
8814
8815  void Vqdmulh(Condition cond,
8816               DataType dt,
8817               QRegister rd,
8818               QRegister rn,
8819               DRegisterLane rm) {
8820    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8821    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8822    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8823    VIXL_ASSERT(allow_macro_instructions_);
8824    VIXL_ASSERT(OutsideITBlock());
8825    MacroEmissionCheckScope guard(this);
8826    ITScope it_scope(this, &cond);
8827    vqdmulh(cond, dt, rd, rn, rm);
8828  }
8829  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8830    Vqdmulh(al, dt, rd, rn, rm);
8831  }
8832
8833  void Vqdmull(
8834      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8835    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8836    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8837    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8838    VIXL_ASSERT(allow_macro_instructions_);
8839    VIXL_ASSERT(OutsideITBlock());
8840    MacroEmissionCheckScope guard(this);
8841    ITScope it_scope(this, &cond);
8842    vqdmull(cond, dt, rd, rn, rm);
8843  }
8844  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8845    Vqdmull(al, dt, rd, rn, rm);
8846  }
8847
8848  void Vqdmull(Condition cond,
8849               DataType dt,
8850               QRegister rd,
8851               DRegister rn,
8852               DRegisterLane rm) {
8853    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8855    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8856    VIXL_ASSERT(allow_macro_instructions_);
8857    VIXL_ASSERT(OutsideITBlock());
8858    MacroEmissionCheckScope guard(this);
8859    ITScope it_scope(this, &cond);
8860    vqdmull(cond, dt, rd, rn, rm);
8861  }
8862  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
8863    Vqdmull(al, dt, rd, rn, rm);
8864  }
8865
8866  void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8867    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8868    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8869    VIXL_ASSERT(allow_macro_instructions_);
8870    VIXL_ASSERT(OutsideITBlock());
8871    MacroEmissionCheckScope guard(this);
8872    ITScope it_scope(this, &cond);
8873    vqmovn(cond, dt, rd, rm);
8874  }
8875  void Vqmovn(DataType dt, DRegister rd, QRegister rm) {
8876    Vqmovn(al, dt, rd, rm);
8877  }
8878
8879  void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8880    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8881    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8882    VIXL_ASSERT(allow_macro_instructions_);
8883    VIXL_ASSERT(OutsideITBlock());
8884    MacroEmissionCheckScope guard(this);
8885    ITScope it_scope(this, &cond);
8886    vqmovun(cond, dt, rd, rm);
8887  }
8888  void Vqmovun(DataType dt, DRegister rd, QRegister rm) {
8889    Vqmovun(al, dt, rd, rm);
8890  }
8891
8892  void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8893    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8894    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8895    VIXL_ASSERT(allow_macro_instructions_);
8896    VIXL_ASSERT(OutsideITBlock());
8897    MacroEmissionCheckScope guard(this);
8898    ITScope it_scope(this, &cond);
8899    vqneg(cond, dt, rd, rm);
8900  }
8901  void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); }
8902
8903  void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8904    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8905    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8906    VIXL_ASSERT(allow_macro_instructions_);
8907    VIXL_ASSERT(OutsideITBlock());
8908    MacroEmissionCheckScope guard(this);
8909    ITScope it_scope(this, &cond);
8910    vqneg(cond, dt, rd, rm);
8911  }
8912  void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); }
8913
8914  void Vqrdmulh(
8915      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8916    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8917    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8918    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8919    VIXL_ASSERT(allow_macro_instructions_);
8920    VIXL_ASSERT(OutsideITBlock());
8921    MacroEmissionCheckScope guard(this);
8922    ITScope it_scope(this, &cond);
8923    vqrdmulh(cond, dt, rd, rn, rm);
8924  }
8925  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8926    Vqrdmulh(al, dt, rd, rn, rm);
8927  }
8928
8929  void Vqrdmulh(
8930      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8931    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8932    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8933    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8934    VIXL_ASSERT(allow_macro_instructions_);
8935    VIXL_ASSERT(OutsideITBlock());
8936    MacroEmissionCheckScope guard(this);
8937    ITScope it_scope(this, &cond);
8938    vqrdmulh(cond, dt, rd, rn, rm);
8939  }
8940  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8941    Vqrdmulh(al, dt, rd, rn, rm);
8942  }
8943
8944  void Vqrdmulh(Condition cond,
8945                DataType dt,
8946                DRegister rd,
8947                DRegister rn,
8948                DRegisterLane rm) {
8949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8952    VIXL_ASSERT(allow_macro_instructions_);
8953    VIXL_ASSERT(OutsideITBlock());
8954    MacroEmissionCheckScope guard(this);
8955    ITScope it_scope(this, &cond);
8956    vqrdmulh(cond, dt, rd, rn, rm);
8957  }
8958  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8959    Vqrdmulh(al, dt, rd, rn, rm);
8960  }
8961
8962  void Vqrdmulh(Condition cond,
8963                DataType dt,
8964                QRegister rd,
8965                QRegister rn,
8966                DRegisterLane rm) {
8967    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8968    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8969    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8970    VIXL_ASSERT(allow_macro_instructions_);
8971    VIXL_ASSERT(OutsideITBlock());
8972    MacroEmissionCheckScope guard(this);
8973    ITScope it_scope(this, &cond);
8974    vqrdmulh(cond, dt, rd, rn, rm);
8975  }
8976  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8977    Vqrdmulh(al, dt, rd, rn, rm);
8978  }
8979
8980  void Vqrshl(
8981      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8982    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8983    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8984    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8985    VIXL_ASSERT(allow_macro_instructions_);
8986    VIXL_ASSERT(OutsideITBlock());
8987    MacroEmissionCheckScope guard(this);
8988    ITScope it_scope(this, &cond);
8989    vqrshl(cond, dt, rd, rm, rn);
8990  }
8991  void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8992    Vqrshl(al, dt, rd, rm, rn);
8993  }
8994
8995  void Vqrshl(
8996      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8997    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8998    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8999    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9000    VIXL_ASSERT(allow_macro_instructions_);
9001    VIXL_ASSERT(OutsideITBlock());
9002    MacroEmissionCheckScope guard(this);
9003    ITScope it_scope(this, &cond);
9004    vqrshl(cond, dt, rd, rm, rn);
9005  }
9006  void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9007    Vqrshl(al, dt, rd, rm, rn);
9008  }
9009
9010  void Vqrshrn(Condition cond,
9011               DataType dt,
9012               DRegister rd,
9013               QRegister rm,
9014               const QOperand& operand) {
9015    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9016    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9017    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9018    VIXL_ASSERT(allow_macro_instructions_);
9019    VIXL_ASSERT(OutsideITBlock());
9020    MacroEmissionCheckScope guard(this);
9021    ITScope it_scope(this, &cond);
9022    vqrshrn(cond, dt, rd, rm, operand);
9023  }
9024  void Vqrshrn(DataType dt,
9025               DRegister rd,
9026               QRegister rm,
9027               const QOperand& operand) {
9028    Vqrshrn(al, dt, rd, rm, operand);
9029  }
9030
9031  void Vqrshrun(Condition cond,
9032                DataType dt,
9033                DRegister rd,
9034                QRegister rm,
9035                const QOperand& operand) {
9036    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9037    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9038    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9039    VIXL_ASSERT(allow_macro_instructions_);
9040    VIXL_ASSERT(OutsideITBlock());
9041    MacroEmissionCheckScope guard(this);
9042    ITScope it_scope(this, &cond);
9043    vqrshrun(cond, dt, rd, rm, operand);
9044  }
9045  void Vqrshrun(DataType dt,
9046                DRegister rd,
9047                QRegister rm,
9048                const QOperand& operand) {
9049    Vqrshrun(al, dt, rd, rm, operand);
9050  }
9051
9052  void Vqshl(Condition cond,
9053             DataType dt,
9054             DRegister rd,
9055             DRegister rm,
9056             const DOperand& operand) {
9057    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9058    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9059    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9060    VIXL_ASSERT(allow_macro_instructions_);
9061    VIXL_ASSERT(OutsideITBlock());
9062    MacroEmissionCheckScope guard(this);
9063    ITScope it_scope(this, &cond);
9064    vqshl(cond, dt, rd, rm, operand);
9065  }
9066  void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9067    Vqshl(al, dt, rd, rm, operand);
9068  }
9069
9070  void Vqshl(Condition cond,
9071             DataType dt,
9072             QRegister rd,
9073             QRegister rm,
9074             const QOperand& operand) {
9075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9076    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9077    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9078    VIXL_ASSERT(allow_macro_instructions_);
9079    VIXL_ASSERT(OutsideITBlock());
9080    MacroEmissionCheckScope guard(this);
9081    ITScope it_scope(this, &cond);
9082    vqshl(cond, dt, rd, rm, operand);
9083  }
9084  void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9085    Vqshl(al, dt, rd, rm, operand);
9086  }
9087
9088  void Vqshlu(Condition cond,
9089              DataType dt,
9090              DRegister rd,
9091              DRegister rm,
9092              const DOperand& operand) {
9093    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9095    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9096    VIXL_ASSERT(allow_macro_instructions_);
9097    VIXL_ASSERT(OutsideITBlock());
9098    MacroEmissionCheckScope guard(this);
9099    ITScope it_scope(this, &cond);
9100    vqshlu(cond, dt, rd, rm, operand);
9101  }
9102  void Vqshlu(DataType dt,
9103              DRegister rd,
9104              DRegister rm,
9105              const DOperand& operand) {
9106    Vqshlu(al, dt, rd, rm, operand);
9107  }
9108
9109  void Vqshlu(Condition cond,
9110              DataType dt,
9111              QRegister rd,
9112              QRegister rm,
9113              const QOperand& operand) {
9114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9115    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9116    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9117    VIXL_ASSERT(allow_macro_instructions_);
9118    VIXL_ASSERT(OutsideITBlock());
9119    MacroEmissionCheckScope guard(this);
9120    ITScope it_scope(this, &cond);
9121    vqshlu(cond, dt, rd, rm, operand);
9122  }
9123  void Vqshlu(DataType dt,
9124              QRegister rd,
9125              QRegister rm,
9126              const QOperand& operand) {
9127    Vqshlu(al, dt, rd, rm, operand);
9128  }
9129
9130  void Vqshrn(Condition cond,
9131              DataType dt,
9132              DRegister rd,
9133              QRegister rm,
9134              const QOperand& operand) {
9135    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9136    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9137    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9138    VIXL_ASSERT(allow_macro_instructions_);
9139    VIXL_ASSERT(OutsideITBlock());
9140    MacroEmissionCheckScope guard(this);
9141    ITScope it_scope(this, &cond);
9142    vqshrn(cond, dt, rd, rm, operand);
9143  }
9144  void Vqshrn(DataType dt,
9145              DRegister rd,
9146              QRegister rm,
9147              const QOperand& operand) {
9148    Vqshrn(al, dt, rd, rm, operand);
9149  }
9150
9151  void Vqshrun(Condition cond,
9152               DataType dt,
9153               DRegister rd,
9154               QRegister rm,
9155               const QOperand& operand) {
9156    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9158    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9159    VIXL_ASSERT(allow_macro_instructions_);
9160    VIXL_ASSERT(OutsideITBlock());
9161    MacroEmissionCheckScope guard(this);
9162    ITScope it_scope(this, &cond);
9163    vqshrun(cond, dt, rd, rm, operand);
9164  }
9165  void Vqshrun(DataType dt,
9166               DRegister rd,
9167               QRegister rm,
9168               const QOperand& operand) {
9169    Vqshrun(al, dt, rd, rm, operand);
9170  }
9171
9172  void Vqsub(
9173      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9174    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9175    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9176    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9177    VIXL_ASSERT(allow_macro_instructions_);
9178    VIXL_ASSERT(OutsideITBlock());
9179    MacroEmissionCheckScope guard(this);
9180    ITScope it_scope(this, &cond);
9181    vqsub(cond, dt, rd, rn, rm);
9182  }
9183  void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9184    Vqsub(al, dt, rd, rn, rm);
9185  }
9186
9187  void Vqsub(
9188      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9189    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9190    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9191    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9192    VIXL_ASSERT(allow_macro_instructions_);
9193    VIXL_ASSERT(OutsideITBlock());
9194    MacroEmissionCheckScope guard(this);
9195    ITScope it_scope(this, &cond);
9196    vqsub(cond, dt, rd, rn, rm);
9197  }
9198  void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9199    Vqsub(al, dt, rd, rn, rm);
9200  }
9201
9202  void Vraddhn(
9203      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9204    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9205    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9206    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9207    VIXL_ASSERT(allow_macro_instructions_);
9208    VIXL_ASSERT(OutsideITBlock());
9209    MacroEmissionCheckScope guard(this);
9210    ITScope it_scope(this, &cond);
9211    vraddhn(cond, dt, rd, rn, rm);
9212  }
9213  void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9214    Vraddhn(al, dt, rd, rn, rm);
9215  }
9216
9217  void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9218    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9219    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9220    VIXL_ASSERT(allow_macro_instructions_);
9221    VIXL_ASSERT(OutsideITBlock());
9222    MacroEmissionCheckScope guard(this);
9223    ITScope it_scope(this, &cond);
9224    vrecpe(cond, dt, rd, rm);
9225  }
9226  void Vrecpe(DataType dt, DRegister rd, DRegister rm) {
9227    Vrecpe(al, dt, rd, rm);
9228  }
9229
9230  void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9231    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9232    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9233    VIXL_ASSERT(allow_macro_instructions_);
9234    VIXL_ASSERT(OutsideITBlock());
9235    MacroEmissionCheckScope guard(this);
9236    ITScope it_scope(this, &cond);
9237    vrecpe(cond, dt, rd, rm);
9238  }
9239  void Vrecpe(DataType dt, QRegister rd, QRegister rm) {
9240    Vrecpe(al, dt, rd, rm);
9241  }
9242
9243  void Vrecps(
9244      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9245    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9247    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9248    VIXL_ASSERT(allow_macro_instructions_);
9249    VIXL_ASSERT(OutsideITBlock());
9250    MacroEmissionCheckScope guard(this);
9251    ITScope it_scope(this, &cond);
9252    vrecps(cond, dt, rd, rn, rm);
9253  }
9254  void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9255    Vrecps(al, dt, rd, rn, rm);
9256  }
9257
9258  void Vrecps(
9259      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9260    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9261    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9262    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9263    VIXL_ASSERT(allow_macro_instructions_);
9264    VIXL_ASSERT(OutsideITBlock());
9265    MacroEmissionCheckScope guard(this);
9266    ITScope it_scope(this, &cond);
9267    vrecps(cond, dt, rd, rn, rm);
9268  }
9269  void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9270    Vrecps(al, dt, rd, rn, rm);
9271  }
9272
9273  void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9274    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9275    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9276    VIXL_ASSERT(allow_macro_instructions_);
9277    VIXL_ASSERT(OutsideITBlock());
9278    MacroEmissionCheckScope guard(this);
9279    ITScope it_scope(this, &cond);
9280    vrev16(cond, dt, rd, rm);
9281  }
9282  void Vrev16(DataType dt, DRegister rd, DRegister rm) {
9283    Vrev16(al, dt, rd, rm);
9284  }
9285
9286  void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9287    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9288    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9289    VIXL_ASSERT(allow_macro_instructions_);
9290    VIXL_ASSERT(OutsideITBlock());
9291    MacroEmissionCheckScope guard(this);
9292    ITScope it_scope(this, &cond);
9293    vrev16(cond, dt, rd, rm);
9294  }
9295  void Vrev16(DataType dt, QRegister rd, QRegister rm) {
9296    Vrev16(al, dt, rd, rm);
9297  }
9298
9299  void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9300    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9301    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9302    VIXL_ASSERT(allow_macro_instructions_);
9303    VIXL_ASSERT(OutsideITBlock());
9304    MacroEmissionCheckScope guard(this);
9305    ITScope it_scope(this, &cond);
9306    vrev32(cond, dt, rd, rm);
9307  }
9308  void Vrev32(DataType dt, DRegister rd, DRegister rm) {
9309    Vrev32(al, dt, rd, rm);
9310  }
9311
9312  void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9313    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9314    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9315    VIXL_ASSERT(allow_macro_instructions_);
9316    VIXL_ASSERT(OutsideITBlock());
9317    MacroEmissionCheckScope guard(this);
9318    ITScope it_scope(this, &cond);
9319    vrev32(cond, dt, rd, rm);
9320  }
9321  void Vrev32(DataType dt, QRegister rd, QRegister rm) {
9322    Vrev32(al, dt, rd, rm);
9323  }
9324
9325  void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9327    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9328    VIXL_ASSERT(allow_macro_instructions_);
9329    VIXL_ASSERT(OutsideITBlock());
9330    MacroEmissionCheckScope guard(this);
9331    ITScope it_scope(this, &cond);
9332    vrev64(cond, dt, rd, rm);
9333  }
9334  void Vrev64(DataType dt, DRegister rd, DRegister rm) {
9335    Vrev64(al, dt, rd, rm);
9336  }
9337
9338  void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9340    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9341    VIXL_ASSERT(allow_macro_instructions_);
9342    VIXL_ASSERT(OutsideITBlock());
9343    MacroEmissionCheckScope guard(this);
9344    ITScope it_scope(this, &cond);
9345    vrev64(cond, dt, rd, rm);
9346  }
9347  void Vrev64(DataType dt, QRegister rd, QRegister rm) {
9348    Vrev64(al, dt, rd, rm);
9349  }
9350
9351  void Vrhadd(
9352      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9353    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9354    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9355    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9356    VIXL_ASSERT(allow_macro_instructions_);
9357    VIXL_ASSERT(OutsideITBlock());
9358    MacroEmissionCheckScope guard(this);
9359    ITScope it_scope(this, &cond);
9360    vrhadd(cond, dt, rd, rn, rm);
9361  }
9362  void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9363    Vrhadd(al, dt, rd, rn, rm);
9364  }
9365
9366  void Vrhadd(
9367      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9368    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9369    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9371    VIXL_ASSERT(allow_macro_instructions_);
9372    VIXL_ASSERT(OutsideITBlock());
9373    MacroEmissionCheckScope guard(this);
9374    ITScope it_scope(this, &cond);
9375    vrhadd(cond, dt, rd, rn, rm);
9376  }
9377  void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9378    Vrhadd(al, dt, rd, rn, rm);
9379  }
9380
9381  void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9382    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9384    VIXL_ASSERT(allow_macro_instructions_);
9385    VIXL_ASSERT(OutsideITBlock());
9386    MacroEmissionCheckScope guard(this);
9387    vrinta(dt1, dt2, rd, rm);
9388  }
9389
9390  void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9391    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9392    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9393    VIXL_ASSERT(allow_macro_instructions_);
9394    VIXL_ASSERT(OutsideITBlock());
9395    MacroEmissionCheckScope guard(this);
9396    vrinta(dt1, dt2, rd, rm);
9397  }
9398
9399  void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9401    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9402    VIXL_ASSERT(allow_macro_instructions_);
9403    VIXL_ASSERT(OutsideITBlock());
9404    MacroEmissionCheckScope guard(this);
9405    vrinta(dt1, dt2, rd, rm);
9406  }
9407
9408  void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9409    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9410    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9411    VIXL_ASSERT(allow_macro_instructions_);
9412    VIXL_ASSERT(OutsideITBlock());
9413    MacroEmissionCheckScope guard(this);
9414    vrintm(dt1, dt2, rd, rm);
9415  }
9416
9417  void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9418    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9419    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9420    VIXL_ASSERT(allow_macro_instructions_);
9421    VIXL_ASSERT(OutsideITBlock());
9422    MacroEmissionCheckScope guard(this);
9423    vrintm(dt1, dt2, rd, rm);
9424  }
9425
9426  void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9427    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9428    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9429    VIXL_ASSERT(allow_macro_instructions_);
9430    VIXL_ASSERT(OutsideITBlock());
9431    MacroEmissionCheckScope guard(this);
9432    vrintm(dt1, dt2, rd, rm);
9433  }
9434
9435  void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9436    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9437    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9438    VIXL_ASSERT(allow_macro_instructions_);
9439    VIXL_ASSERT(OutsideITBlock());
9440    MacroEmissionCheckScope guard(this);
9441    vrintn(dt1, dt2, rd, rm);
9442  }
9443
9444  void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9445    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9446    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9447    VIXL_ASSERT(allow_macro_instructions_);
9448    VIXL_ASSERT(OutsideITBlock());
9449    MacroEmissionCheckScope guard(this);
9450    vrintn(dt1, dt2, rd, rm);
9451  }
9452
9453  void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9454    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9455    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9456    VIXL_ASSERT(allow_macro_instructions_);
9457    VIXL_ASSERT(OutsideITBlock());
9458    MacroEmissionCheckScope guard(this);
9459    vrintn(dt1, dt2, rd, rm);
9460  }
9461
9462  void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9464    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9465    VIXL_ASSERT(allow_macro_instructions_);
9466    VIXL_ASSERT(OutsideITBlock());
9467    MacroEmissionCheckScope guard(this);
9468    vrintp(dt1, dt2, rd, rm);
9469  }
9470
9471  void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9472    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9473    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9474    VIXL_ASSERT(allow_macro_instructions_);
9475    VIXL_ASSERT(OutsideITBlock());
9476    MacroEmissionCheckScope guard(this);
9477    vrintp(dt1, dt2, rd, rm);
9478  }
9479
9480  void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9481    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9482    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9483    VIXL_ASSERT(allow_macro_instructions_);
9484    VIXL_ASSERT(OutsideITBlock());
9485    MacroEmissionCheckScope guard(this);
9486    vrintp(dt1, dt2, rd, rm);
9487  }
9488
9489  void Vrintr(
9490      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9491    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9493    VIXL_ASSERT(allow_macro_instructions_);
9494    VIXL_ASSERT(OutsideITBlock());
9495    MacroEmissionCheckScope guard(this);
9496    ITScope it_scope(this, &cond);
9497    vrintr(cond, dt1, dt2, rd, rm);
9498  }
9499  void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9500    Vrintr(al, dt1, dt2, rd, rm);
9501  }
9502
9503  void Vrintr(
9504      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9505    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9506    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9507    VIXL_ASSERT(allow_macro_instructions_);
9508    VIXL_ASSERT(OutsideITBlock());
9509    MacroEmissionCheckScope guard(this);
9510    ITScope it_scope(this, &cond);
9511    vrintr(cond, dt1, dt2, rd, rm);
9512  }
9513  void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9514    Vrintr(al, dt1, dt2, rd, rm);
9515  }
9516
9517  void Vrintx(
9518      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9519    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9520    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9521    VIXL_ASSERT(allow_macro_instructions_);
9522    VIXL_ASSERT(OutsideITBlock());
9523    MacroEmissionCheckScope guard(this);
9524    ITScope it_scope(this, &cond);
9525    vrintx(cond, dt1, dt2, rd, rm);
9526  }
9527  void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9528    Vrintx(al, dt1, dt2, rd, rm);
9529  }
9530
9531  void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9532    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9533    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9534    VIXL_ASSERT(allow_macro_instructions_);
9535    VIXL_ASSERT(OutsideITBlock());
9536    MacroEmissionCheckScope guard(this);
9537    vrintx(dt1, dt2, rd, rm);
9538  }
9539
9540  void Vrintx(
9541      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9542    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9543    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9544    VIXL_ASSERT(allow_macro_instructions_);
9545    VIXL_ASSERT(OutsideITBlock());
9546    MacroEmissionCheckScope guard(this);
9547    ITScope it_scope(this, &cond);
9548    vrintx(cond, dt1, dt2, rd, rm);
9549  }
9550  void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9551    Vrintx(al, dt1, dt2, rd, rm);
9552  }
9553
9554  void Vrintz(
9555      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9557    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9558    VIXL_ASSERT(allow_macro_instructions_);
9559    VIXL_ASSERT(OutsideITBlock());
9560    MacroEmissionCheckScope guard(this);
9561    ITScope it_scope(this, &cond);
9562    vrintz(cond, dt1, dt2, rd, rm);
9563  }
9564  void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9565    Vrintz(al, dt1, dt2, rd, rm);
9566  }
9567
9568  void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9571    VIXL_ASSERT(allow_macro_instructions_);
9572    VIXL_ASSERT(OutsideITBlock());
9573    MacroEmissionCheckScope guard(this);
9574    vrintz(dt1, dt2, rd, rm);
9575  }
9576
9577  void Vrintz(
9578      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9581    VIXL_ASSERT(allow_macro_instructions_);
9582    VIXL_ASSERT(OutsideITBlock());
9583    MacroEmissionCheckScope guard(this);
9584    ITScope it_scope(this, &cond);
9585    vrintz(cond, dt1, dt2, rd, rm);
9586  }
9587  void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9588    Vrintz(al, dt1, dt2, rd, rm);
9589  }
9590
9591  void Vrshl(
9592      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9593    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9594    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9595    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9596    VIXL_ASSERT(allow_macro_instructions_);
9597    VIXL_ASSERT(OutsideITBlock());
9598    MacroEmissionCheckScope guard(this);
9599    ITScope it_scope(this, &cond);
9600    vrshl(cond, dt, rd, rm, rn);
9601  }
9602  void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9603    Vrshl(al, dt, rd, rm, rn);
9604  }
9605
9606  void Vrshl(
9607      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9608    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9609    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9610    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9611    VIXL_ASSERT(allow_macro_instructions_);
9612    VIXL_ASSERT(OutsideITBlock());
9613    MacroEmissionCheckScope guard(this);
9614    ITScope it_scope(this, &cond);
9615    vrshl(cond, dt, rd, rm, rn);
9616  }
9617  void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9618    Vrshl(al, dt, rd, rm, rn);
9619  }
9620
9621  void Vrshr(Condition cond,
9622             DataType dt,
9623             DRegister rd,
9624             DRegister rm,
9625             const DOperand& operand) {
9626    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9627    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9628    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9629    VIXL_ASSERT(allow_macro_instructions_);
9630    VIXL_ASSERT(OutsideITBlock());
9631    MacroEmissionCheckScope guard(this);
9632    ITScope it_scope(this, &cond);
9633    vrshr(cond, dt, rd, rm, operand);
9634  }
9635  void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9636    Vrshr(al, dt, rd, rm, operand);
9637  }
9638
9639  void Vrshr(Condition cond,
9640             DataType dt,
9641             QRegister rd,
9642             QRegister rm,
9643             const QOperand& operand) {
9644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9645    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9646    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9647    VIXL_ASSERT(allow_macro_instructions_);
9648    VIXL_ASSERT(OutsideITBlock());
9649    MacroEmissionCheckScope guard(this);
9650    ITScope it_scope(this, &cond);
9651    vrshr(cond, dt, rd, rm, operand);
9652  }
9653  void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9654    Vrshr(al, dt, rd, rm, operand);
9655  }
9656
9657  void Vrshrn(Condition cond,
9658              DataType dt,
9659              DRegister rd,
9660              QRegister rm,
9661              const QOperand& operand) {
9662    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9663    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9664    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9665    VIXL_ASSERT(allow_macro_instructions_);
9666    VIXL_ASSERT(OutsideITBlock());
9667    MacroEmissionCheckScope guard(this);
9668    ITScope it_scope(this, &cond);
9669    vrshrn(cond, dt, rd, rm, operand);
9670  }
9671  void Vrshrn(DataType dt,
9672              DRegister rd,
9673              QRegister rm,
9674              const QOperand& operand) {
9675    Vrshrn(al, dt, rd, rm, operand);
9676  }
9677
9678  void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9679    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9680    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9681    VIXL_ASSERT(allow_macro_instructions_);
9682    VIXL_ASSERT(OutsideITBlock());
9683    MacroEmissionCheckScope guard(this);
9684    ITScope it_scope(this, &cond);
9685    vrsqrte(cond, dt, rd, rm);
9686  }
9687  void Vrsqrte(DataType dt, DRegister rd, DRegister rm) {
9688    Vrsqrte(al, dt, rd, rm);
9689  }
9690
9691  void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9692    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9693    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9694    VIXL_ASSERT(allow_macro_instructions_);
9695    VIXL_ASSERT(OutsideITBlock());
9696    MacroEmissionCheckScope guard(this);
9697    ITScope it_scope(this, &cond);
9698    vrsqrte(cond, dt, rd, rm);
9699  }
9700  void Vrsqrte(DataType dt, QRegister rd, QRegister rm) {
9701    Vrsqrte(al, dt, rd, rm);
9702  }
9703
9704  void Vrsqrts(
9705      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9706    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9708    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9709    VIXL_ASSERT(allow_macro_instructions_);
9710    VIXL_ASSERT(OutsideITBlock());
9711    MacroEmissionCheckScope guard(this);
9712    ITScope it_scope(this, &cond);
9713    vrsqrts(cond, dt, rd, rn, rm);
9714  }
9715  void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9716    Vrsqrts(al, dt, rd, rn, rm);
9717  }
9718
9719  void Vrsqrts(
9720      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9721    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9722    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9723    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9724    VIXL_ASSERT(allow_macro_instructions_);
9725    VIXL_ASSERT(OutsideITBlock());
9726    MacroEmissionCheckScope guard(this);
9727    ITScope it_scope(this, &cond);
9728    vrsqrts(cond, dt, rd, rn, rm);
9729  }
9730  void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9731    Vrsqrts(al, dt, rd, rn, rm);
9732  }
9733
9734  void Vrsra(Condition cond,
9735             DataType dt,
9736             DRegister rd,
9737             DRegister rm,
9738             const DOperand& operand) {
9739    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9740    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9741    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9742    VIXL_ASSERT(allow_macro_instructions_);
9743    VIXL_ASSERT(OutsideITBlock());
9744    MacroEmissionCheckScope guard(this);
9745    ITScope it_scope(this, &cond);
9746    vrsra(cond, dt, rd, rm, operand);
9747  }
9748  void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9749    Vrsra(al, dt, rd, rm, operand);
9750  }
9751
9752  void Vrsra(Condition cond,
9753             DataType dt,
9754             QRegister rd,
9755             QRegister rm,
9756             const QOperand& operand) {
9757    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9758    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9759    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9760    VIXL_ASSERT(allow_macro_instructions_);
9761    VIXL_ASSERT(OutsideITBlock());
9762    MacroEmissionCheckScope guard(this);
9763    ITScope it_scope(this, &cond);
9764    vrsra(cond, dt, rd, rm, operand);
9765  }
9766  void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9767    Vrsra(al, dt, rd, rm, operand);
9768  }
9769
9770  void Vrsubhn(
9771      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9772    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9773    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9774    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9775    VIXL_ASSERT(allow_macro_instructions_);
9776    VIXL_ASSERT(OutsideITBlock());
9777    MacroEmissionCheckScope guard(this);
9778    ITScope it_scope(this, &cond);
9779    vrsubhn(cond, dt, rd, rn, rm);
9780  }
9781  void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9782    Vrsubhn(al, dt, rd, rn, rm);
9783  }
9784
9785  void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9787    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9788    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9789    VIXL_ASSERT(allow_macro_instructions_);
9790    VIXL_ASSERT(OutsideITBlock());
9791    MacroEmissionCheckScope guard(this);
9792    vseleq(dt, rd, rn, rm);
9793  }
9794
9795  void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9799    VIXL_ASSERT(allow_macro_instructions_);
9800    VIXL_ASSERT(OutsideITBlock());
9801    MacroEmissionCheckScope guard(this);
9802    vseleq(dt, rd, rn, rm);
9803  }
9804
9805  void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9806    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9807    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9808    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9809    VIXL_ASSERT(allow_macro_instructions_);
9810    VIXL_ASSERT(OutsideITBlock());
9811    MacroEmissionCheckScope guard(this);
9812    vselge(dt, rd, rn, rm);
9813  }
9814
9815  void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9816    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9817    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9819    VIXL_ASSERT(allow_macro_instructions_);
9820    VIXL_ASSERT(OutsideITBlock());
9821    MacroEmissionCheckScope guard(this);
9822    vselge(dt, rd, rn, rm);
9823  }
9824
9825  void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9826    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9827    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9829    VIXL_ASSERT(allow_macro_instructions_);
9830    VIXL_ASSERT(OutsideITBlock());
9831    MacroEmissionCheckScope guard(this);
9832    vselgt(dt, rd, rn, rm);
9833  }
9834
9835  void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9836    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9837    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9838    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9839    VIXL_ASSERT(allow_macro_instructions_);
9840    VIXL_ASSERT(OutsideITBlock());
9841    MacroEmissionCheckScope guard(this);
9842    vselgt(dt, rd, rn, rm);
9843  }
9844
9845  void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9846    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9847    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9848    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9849    VIXL_ASSERT(allow_macro_instructions_);
9850    VIXL_ASSERT(OutsideITBlock());
9851    MacroEmissionCheckScope guard(this);
9852    vselvs(dt, rd, rn, rm);
9853  }
9854
9855  void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9856    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9857    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9859    VIXL_ASSERT(allow_macro_instructions_);
9860    VIXL_ASSERT(OutsideITBlock());
9861    MacroEmissionCheckScope guard(this);
9862    vselvs(dt, rd, rn, rm);
9863  }
9864
9865  void Vshl(Condition cond,
9866            DataType dt,
9867            DRegister rd,
9868            DRegister rm,
9869            const DOperand& operand) {
9870    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9871    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9872    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9873    VIXL_ASSERT(allow_macro_instructions_);
9874    VIXL_ASSERT(OutsideITBlock());
9875    MacroEmissionCheckScope guard(this);
9876    ITScope it_scope(this, &cond);
9877    vshl(cond, dt, rd, rm, operand);
9878  }
9879  void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9880    Vshl(al, dt, rd, rm, operand);
9881  }
9882
9883  void Vshl(Condition cond,
9884            DataType dt,
9885            QRegister rd,
9886            QRegister rm,
9887            const QOperand& operand) {
9888    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9889    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9890    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9891    VIXL_ASSERT(allow_macro_instructions_);
9892    VIXL_ASSERT(OutsideITBlock());
9893    MacroEmissionCheckScope guard(this);
9894    ITScope it_scope(this, &cond);
9895    vshl(cond, dt, rd, rm, operand);
9896  }
9897  void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9898    Vshl(al, dt, rd, rm, operand);
9899  }
9900
9901  void Vshll(Condition cond,
9902             DataType dt,
9903             QRegister rd,
9904             DRegister rm,
9905             const DOperand& operand) {
9906    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9907    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9908    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9909    VIXL_ASSERT(allow_macro_instructions_);
9910    VIXL_ASSERT(OutsideITBlock());
9911    MacroEmissionCheckScope guard(this);
9912    ITScope it_scope(this, &cond);
9913    vshll(cond, dt, rd, rm, operand);
9914  }
9915  void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) {
9916    Vshll(al, dt, rd, rm, operand);
9917  }
9918
9919  void Vshr(Condition cond,
9920            DataType dt,
9921            DRegister rd,
9922            DRegister rm,
9923            const DOperand& operand) {
9924    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9925    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9926    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9927    VIXL_ASSERT(allow_macro_instructions_);
9928    VIXL_ASSERT(OutsideITBlock());
9929    MacroEmissionCheckScope guard(this);
9930    ITScope it_scope(this, &cond);
9931    vshr(cond, dt, rd, rm, operand);
9932  }
9933  void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9934    Vshr(al, dt, rd, rm, operand);
9935  }
9936
9937  void Vshr(Condition cond,
9938            DataType dt,
9939            QRegister rd,
9940            QRegister rm,
9941            const QOperand& operand) {
9942    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9943    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9944    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9945    VIXL_ASSERT(allow_macro_instructions_);
9946    VIXL_ASSERT(OutsideITBlock());
9947    MacroEmissionCheckScope guard(this);
9948    ITScope it_scope(this, &cond);
9949    vshr(cond, dt, rd, rm, operand);
9950  }
9951  void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9952    Vshr(al, dt, rd, rm, operand);
9953  }
9954
9955  void Vshrn(Condition cond,
9956             DataType dt,
9957             DRegister rd,
9958             QRegister rm,
9959             const QOperand& operand) {
9960    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9962    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9963    VIXL_ASSERT(allow_macro_instructions_);
9964    VIXL_ASSERT(OutsideITBlock());
9965    MacroEmissionCheckScope guard(this);
9966    ITScope it_scope(this, &cond);
9967    vshrn(cond, dt, rd, rm, operand);
9968  }
9969  void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) {
9970    Vshrn(al, dt, rd, rm, operand);
9971  }
9972
9973  void Vsli(Condition cond,
9974            DataType dt,
9975            DRegister rd,
9976            DRegister rm,
9977            const DOperand& operand) {
9978    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9979    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9980    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9981    VIXL_ASSERT(allow_macro_instructions_);
9982    VIXL_ASSERT(OutsideITBlock());
9983    MacroEmissionCheckScope guard(this);
9984    ITScope it_scope(this, &cond);
9985    vsli(cond, dt, rd, rm, operand);
9986  }
9987  void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9988    Vsli(al, dt, rd, rm, operand);
9989  }
9990
9991  void Vsli(Condition cond,
9992            DataType dt,
9993            QRegister rd,
9994            QRegister rm,
9995            const QOperand& operand) {
9996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9997    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9998    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9999    VIXL_ASSERT(allow_macro_instructions_);
10000    VIXL_ASSERT(OutsideITBlock());
10001    MacroEmissionCheckScope guard(this);
10002    ITScope it_scope(this, &cond);
10003    vsli(cond, dt, rd, rm, operand);
10004  }
10005  void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
10006    Vsli(al, dt, rd, rm, operand);
10007  }
10008
10009  void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) {
10010    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10012    VIXL_ASSERT(allow_macro_instructions_);
10013    VIXL_ASSERT(OutsideITBlock());
10014    MacroEmissionCheckScope guard(this);
10015    ITScope it_scope(this, &cond);
10016    vsqrt(cond, dt, rd, rm);
10017  }
10018  void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); }
10019
10020  void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10021    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10022    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10023    VIXL_ASSERT(allow_macro_instructions_);
10024    VIXL_ASSERT(OutsideITBlock());
10025    MacroEmissionCheckScope guard(this);
10026    ITScope it_scope(this, &cond);
10027    vsqrt(cond, dt, rd, rm);
10028  }
10029  void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); }
10030
10031  void Vsra(Condition cond,
10032            DataType dt,
10033            DRegister rd,
10034            DRegister rm,
10035            const DOperand& operand) {
10036    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10037    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10038    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10039    VIXL_ASSERT(allow_macro_instructions_);
10040    VIXL_ASSERT(OutsideITBlock());
10041    MacroEmissionCheckScope guard(this);
10042    ITScope it_scope(this, &cond);
10043    vsra(cond, dt, rd, rm, operand);
10044  }
10045  void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
10046    Vsra(al, dt, rd, rm, operand);
10047  }
10048
10049  void Vsra(Condition cond,
10050            DataType dt,
10051            QRegister rd,
10052            QRegister rm,
10053            const QOperand& operand) {
10054    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10055    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10056    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10057    VIXL_ASSERT(allow_macro_instructions_);
10058    VIXL_ASSERT(OutsideITBlock());
10059    MacroEmissionCheckScope guard(this);
10060    ITScope it_scope(this, &cond);
10061    vsra(cond, dt, rd, rm, operand);
10062  }
10063  void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
10064    Vsra(al, dt, rd, rm, operand);
10065  }
10066
10067  void Vsri(Condition cond,
10068            DataType dt,
10069            DRegister rd,
10070            DRegister rm,
10071            const DOperand& operand) {
10072    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10073    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10074    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10075    VIXL_ASSERT(allow_macro_instructions_);
10076    VIXL_ASSERT(OutsideITBlock());
10077    MacroEmissionCheckScope guard(this);
10078    ITScope it_scope(this, &cond);
10079    vsri(cond, dt, rd, rm, operand);
10080  }
10081  void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
10082    Vsri(al, dt, rd, rm, operand);
10083  }
10084
10085  void Vsri(Condition cond,
10086            DataType dt,
10087            QRegister rd,
10088            QRegister rm,
10089            const QOperand& operand) {
10090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10092    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10093    VIXL_ASSERT(allow_macro_instructions_);
10094    VIXL_ASSERT(OutsideITBlock());
10095    MacroEmissionCheckScope guard(this);
10096    ITScope it_scope(this, &cond);
10097    vsri(cond, dt, rd, rm, operand);
10098  }
10099  void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
10100    Vsri(al, dt, rd, rm, operand);
10101  }
10102
10103  void Vst1(Condition cond,
10104            DataType dt,
10105            const NeonRegisterList& nreglist,
10106            const AlignedMemOperand& operand) {
10107    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10108    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10109    VIXL_ASSERT(allow_macro_instructions_);
10110    VIXL_ASSERT(OutsideITBlock());
10111    MacroEmissionCheckScope guard(this);
10112    ITScope it_scope(this, &cond);
10113    vst1(cond, dt, nreglist, operand);
10114  }
10115  void Vst1(DataType dt,
10116            const NeonRegisterList& nreglist,
10117            const AlignedMemOperand& operand) {
10118    Vst1(al, dt, nreglist, operand);
10119  }
10120
10121  void Vst2(Condition cond,
10122            DataType dt,
10123            const NeonRegisterList& nreglist,
10124            const AlignedMemOperand& operand) {
10125    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10126    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10127    VIXL_ASSERT(allow_macro_instructions_);
10128    VIXL_ASSERT(OutsideITBlock());
10129    MacroEmissionCheckScope guard(this);
10130    ITScope it_scope(this, &cond);
10131    vst2(cond, dt, nreglist, operand);
10132  }
10133  void Vst2(DataType dt,
10134            const NeonRegisterList& nreglist,
10135            const AlignedMemOperand& operand) {
10136    Vst2(al, dt, nreglist, operand);
10137  }
10138
10139  void Vst3(Condition cond,
10140            DataType dt,
10141            const NeonRegisterList& nreglist,
10142            const AlignedMemOperand& operand) {
10143    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10144    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10145    VIXL_ASSERT(allow_macro_instructions_);
10146    VIXL_ASSERT(OutsideITBlock());
10147    MacroEmissionCheckScope guard(this);
10148    ITScope it_scope(this, &cond);
10149    vst3(cond, dt, nreglist, operand);
10150  }
10151  void Vst3(DataType dt,
10152            const NeonRegisterList& nreglist,
10153            const AlignedMemOperand& operand) {
10154    Vst3(al, dt, nreglist, operand);
10155  }
10156
10157  void Vst3(Condition cond,
10158            DataType dt,
10159            const NeonRegisterList& nreglist,
10160            const MemOperand& operand) {
10161    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10162    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10163    VIXL_ASSERT(allow_macro_instructions_);
10164    VIXL_ASSERT(OutsideITBlock());
10165    MacroEmissionCheckScope guard(this);
10166    ITScope it_scope(this, &cond);
10167    vst3(cond, dt, nreglist, operand);
10168  }
10169  void Vst3(DataType dt,
10170            const NeonRegisterList& nreglist,
10171            const MemOperand& operand) {
10172    Vst3(al, dt, nreglist, operand);
10173  }
10174
10175  void Vst4(Condition cond,
10176            DataType dt,
10177            const NeonRegisterList& nreglist,
10178            const AlignedMemOperand& operand) {
10179    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10180    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10181    VIXL_ASSERT(allow_macro_instructions_);
10182    VIXL_ASSERT(OutsideITBlock());
10183    MacroEmissionCheckScope guard(this);
10184    ITScope it_scope(this, &cond);
10185    vst4(cond, dt, nreglist, operand);
10186  }
10187  void Vst4(DataType dt,
10188            const NeonRegisterList& nreglist,
10189            const AlignedMemOperand& operand) {
10190    Vst4(al, dt, nreglist, operand);
10191  }
10192
10193  void Vstm(Condition cond,
10194            DataType dt,
10195            Register rn,
10196            WriteBack write_back,
10197            DRegisterList dreglist) {
10198    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10199    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10200    VIXL_ASSERT(allow_macro_instructions_);
10201    VIXL_ASSERT(OutsideITBlock());
10202    MacroEmissionCheckScope guard(this);
10203    ITScope it_scope(this, &cond);
10204    vstm(cond, dt, rn, write_back, dreglist);
10205  }
10206  void Vstm(DataType dt,
10207            Register rn,
10208            WriteBack write_back,
10209            DRegisterList dreglist) {
10210    Vstm(al, dt, rn, write_back, dreglist);
10211  }
10212  void Vstm(Condition cond,
10213            Register rn,
10214            WriteBack write_back,
10215            DRegisterList dreglist) {
10216    Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist);
10217  }
10218  void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) {
10219    Vstm(al, kDataTypeValueNone, rn, write_back, dreglist);
10220  }
10221
10222  void Vstm(Condition cond,
10223            DataType dt,
10224            Register rn,
10225            WriteBack write_back,
10226            SRegisterList sreglist) {
10227    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10228    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10229    VIXL_ASSERT(allow_macro_instructions_);
10230    VIXL_ASSERT(OutsideITBlock());
10231    MacroEmissionCheckScope guard(this);
10232    ITScope it_scope(this, &cond);
10233    vstm(cond, dt, rn, write_back, sreglist);
10234  }
10235  void Vstm(DataType dt,
10236            Register rn,
10237            WriteBack write_back,
10238            SRegisterList sreglist) {
10239    Vstm(al, dt, rn, write_back, sreglist);
10240  }
10241  void Vstm(Condition cond,
10242            Register rn,
10243            WriteBack write_back,
10244            SRegisterList sreglist) {
10245    Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist);
10246  }
10247  void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) {
10248    Vstm(al, kDataTypeValueNone, rn, write_back, sreglist);
10249  }
10250
10251  void Vstmdb(Condition cond,
10252              DataType dt,
10253              Register rn,
10254              WriteBack write_back,
10255              DRegisterList dreglist) {
10256    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10257    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10258    VIXL_ASSERT(allow_macro_instructions_);
10259    VIXL_ASSERT(OutsideITBlock());
10260    MacroEmissionCheckScope guard(this);
10261    ITScope it_scope(this, &cond);
10262    vstmdb(cond, dt, rn, write_back, dreglist);
10263  }
10264  void Vstmdb(DataType dt,
10265              Register rn,
10266              WriteBack write_back,
10267              DRegisterList dreglist) {
10268    Vstmdb(al, dt, rn, write_back, dreglist);
10269  }
10270  void Vstmdb(Condition cond,
10271              Register rn,
10272              WriteBack write_back,
10273              DRegisterList dreglist) {
10274    Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
10275  }
10276  void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
10277    Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
10278  }
10279
10280  void Vstmdb(Condition cond,
10281              DataType dt,
10282              Register rn,
10283              WriteBack write_back,
10284              SRegisterList sreglist) {
10285    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10286    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10287    VIXL_ASSERT(allow_macro_instructions_);
10288    VIXL_ASSERT(OutsideITBlock());
10289    MacroEmissionCheckScope guard(this);
10290    ITScope it_scope(this, &cond);
10291    vstmdb(cond, dt, rn, write_back, sreglist);
10292  }
10293  void Vstmdb(DataType dt,
10294              Register rn,
10295              WriteBack write_back,
10296              SRegisterList sreglist) {
10297    Vstmdb(al, dt, rn, write_back, sreglist);
10298  }
10299  void Vstmdb(Condition cond,
10300              Register rn,
10301              WriteBack write_back,
10302              SRegisterList sreglist) {
10303    Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
10304  }
10305  void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
10306    Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
10307  }
10308
10309  void Vstmia(Condition cond,
10310              DataType dt,
10311              Register rn,
10312              WriteBack write_back,
10313              DRegisterList dreglist) {
10314    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10315    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10316    VIXL_ASSERT(allow_macro_instructions_);
10317    VIXL_ASSERT(OutsideITBlock());
10318    MacroEmissionCheckScope guard(this);
10319    ITScope it_scope(this, &cond);
10320    vstmia(cond, dt, rn, write_back, dreglist);
10321  }
10322  void Vstmia(DataType dt,
10323              Register rn,
10324              WriteBack write_back,
10325              DRegisterList dreglist) {
10326    Vstmia(al, dt, rn, write_back, dreglist);
10327  }
10328  void Vstmia(Condition cond,
10329              Register rn,
10330              WriteBack write_back,
10331              DRegisterList dreglist) {
10332    Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
10333  }
10334  void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
10335    Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist);
10336  }
10337
10338  void Vstmia(Condition cond,
10339              DataType dt,
10340              Register rn,
10341              WriteBack write_back,
10342              SRegisterList sreglist) {
10343    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10344    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10345    VIXL_ASSERT(allow_macro_instructions_);
10346    VIXL_ASSERT(OutsideITBlock());
10347    MacroEmissionCheckScope guard(this);
10348    ITScope it_scope(this, &cond);
10349    vstmia(cond, dt, rn, write_back, sreglist);
10350  }
10351  void Vstmia(DataType dt,
10352              Register rn,
10353              WriteBack write_back,
10354              SRegisterList sreglist) {
10355    Vstmia(al, dt, rn, write_back, sreglist);
10356  }
10357  void Vstmia(Condition cond,
10358              Register rn,
10359              WriteBack write_back,
10360              SRegisterList sreglist) {
10361    Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
10362  }
10363  void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
10364    Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist);
10365  }
10366
10367  void Vstr(Condition cond,
10368            DataType dt,
10369            DRegister rd,
10370            const MemOperand& operand) {
10371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10372    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10373    VIXL_ASSERT(allow_macro_instructions_);
10374    VIXL_ASSERT(OutsideITBlock());
10375    MacroEmissionCheckScope guard(this);
10376    ITScope it_scope(this, &cond);
10377    vstr(cond, dt, rd, operand);
10378  }
10379  void Vstr(DataType dt, DRegister rd, const MemOperand& operand) {
10380    Vstr(al, dt, rd, operand);
10381  }
10382  void Vstr(Condition cond, DRegister rd, const MemOperand& operand) {
10383    Vstr(cond, Untyped64, rd, operand);
10384  }
10385  void Vstr(DRegister rd, const MemOperand& operand) {
10386    Vstr(al, Untyped64, rd, operand);
10387  }
10388
10389  void Vstr(Condition cond,
10390            DataType dt,
10391            SRegister rd,
10392            const MemOperand& operand) {
10393    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10394    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10395    VIXL_ASSERT(allow_macro_instructions_);
10396    VIXL_ASSERT(OutsideITBlock());
10397    MacroEmissionCheckScope guard(this);
10398    ITScope it_scope(this, &cond);
10399    vstr(cond, dt, rd, operand);
10400  }
10401  void Vstr(DataType dt, SRegister rd, const MemOperand& operand) {
10402    Vstr(al, dt, rd, operand);
10403  }
10404  void Vstr(Condition cond, SRegister rd, const MemOperand& operand) {
10405    Vstr(cond, Untyped32, rd, operand);
10406  }
10407  void Vstr(SRegister rd, const MemOperand& operand) {
10408    Vstr(al, Untyped32, rd, operand);
10409  }
10410
10411  void Vsub(
10412      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10413    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10414    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10415    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10416    VIXL_ASSERT(allow_macro_instructions_);
10417    VIXL_ASSERT(OutsideITBlock());
10418    MacroEmissionCheckScope guard(this);
10419    ITScope it_scope(this, &cond);
10420    vsub(cond, dt, rd, rn, rm);
10421  }
10422  void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10423    Vsub(al, dt, rd, rn, rm);
10424  }
10425
10426  void Vsub(
10427      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10428    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10429    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10430    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10431    VIXL_ASSERT(allow_macro_instructions_);
10432    VIXL_ASSERT(OutsideITBlock());
10433    MacroEmissionCheckScope guard(this);
10434    ITScope it_scope(this, &cond);
10435    vsub(cond, dt, rd, rn, rm);
10436  }
10437  void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10438    Vsub(al, dt, rd, rn, rm);
10439  }
10440
10441  void Vsub(
10442      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10443    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10444    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10445    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10446    VIXL_ASSERT(allow_macro_instructions_);
10447    VIXL_ASSERT(OutsideITBlock());
10448    MacroEmissionCheckScope guard(this);
10449    ITScope it_scope(this, &cond);
10450    vsub(cond, dt, rd, rn, rm);
10451  }
10452  void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10453    Vsub(al, dt, rd, rn, rm);
10454  }
10455
10456  void Vsubhn(
10457      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10458    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10459    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10460    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10461    VIXL_ASSERT(allow_macro_instructions_);
10462    VIXL_ASSERT(OutsideITBlock());
10463    MacroEmissionCheckScope guard(this);
10464    ITScope it_scope(this, &cond);
10465    vsubhn(cond, dt, rd, rn, rm);
10466  }
10467  void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10468    Vsubhn(al, dt, rd, rn, rm);
10469  }
10470
10471  void Vsubl(
10472      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10473    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10474    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10475    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10476    VIXL_ASSERT(allow_macro_instructions_);
10477    VIXL_ASSERT(OutsideITBlock());
10478    MacroEmissionCheckScope guard(this);
10479    ITScope it_scope(this, &cond);
10480    vsubl(cond, dt, rd, rn, rm);
10481  }
10482  void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10483    Vsubl(al, dt, rd, rn, rm);
10484  }
10485
10486  void Vsubw(
10487      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10488    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10490    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10491    VIXL_ASSERT(allow_macro_instructions_);
10492    VIXL_ASSERT(OutsideITBlock());
10493    MacroEmissionCheckScope guard(this);
10494    ITScope it_scope(this, &cond);
10495    vsubw(cond, dt, rd, rn, rm);
10496  }
10497  void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10498    Vsubw(al, dt, rd, rn, rm);
10499  }
10500
10501  void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10502    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10504    VIXL_ASSERT(allow_macro_instructions_);
10505    VIXL_ASSERT(OutsideITBlock());
10506    MacroEmissionCheckScope guard(this);
10507    ITScope it_scope(this, &cond);
10508    vswp(cond, dt, rd, rm);
10509  }
10510  void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); }
10511  void Vswp(Condition cond, DRegister rd, DRegister rm) {
10512    Vswp(cond, kDataTypeValueNone, rd, rm);
10513  }
10514  void Vswp(DRegister rd, DRegister rm) {
10515    Vswp(al, kDataTypeValueNone, rd, rm);
10516  }
10517
10518  void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10519    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10520    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10521    VIXL_ASSERT(allow_macro_instructions_);
10522    VIXL_ASSERT(OutsideITBlock());
10523    MacroEmissionCheckScope guard(this);
10524    ITScope it_scope(this, &cond);
10525    vswp(cond, dt, rd, rm);
10526  }
10527  void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); }
10528  void Vswp(Condition cond, QRegister rd, QRegister rm) {
10529    Vswp(cond, kDataTypeValueNone, rd, rm);
10530  }
10531  void Vswp(QRegister rd, QRegister rm) {
10532    Vswp(al, kDataTypeValueNone, rd, rm);
10533  }
10534
10535  void Vtbl(Condition cond,
10536            DataType dt,
10537            DRegister rd,
10538            const NeonRegisterList& nreglist,
10539            DRegister rm) {
10540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10541    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10542    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10543    VIXL_ASSERT(allow_macro_instructions_);
10544    VIXL_ASSERT(OutsideITBlock());
10545    MacroEmissionCheckScope guard(this);
10546    ITScope it_scope(this, &cond);
10547    vtbl(cond, dt, rd, nreglist, rm);
10548  }
10549  void Vtbl(DataType dt,
10550            DRegister rd,
10551            const NeonRegisterList& nreglist,
10552            DRegister rm) {
10553    Vtbl(al, dt, rd, nreglist, rm);
10554  }
10555
10556  void Vtbx(Condition cond,
10557            DataType dt,
10558            DRegister rd,
10559            const NeonRegisterList& nreglist,
10560            DRegister rm) {
10561    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10562    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10563    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10564    VIXL_ASSERT(allow_macro_instructions_);
10565    VIXL_ASSERT(OutsideITBlock());
10566    MacroEmissionCheckScope guard(this);
10567    ITScope it_scope(this, &cond);
10568    vtbx(cond, dt, rd, nreglist, rm);
10569  }
10570  void Vtbx(DataType dt,
10571            DRegister rd,
10572            const NeonRegisterList& nreglist,
10573            DRegister rm) {
10574    Vtbx(al, dt, rd, nreglist, rm);
10575  }
10576
10577  void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10578    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10580    VIXL_ASSERT(allow_macro_instructions_);
10581    VIXL_ASSERT(OutsideITBlock());
10582    MacroEmissionCheckScope guard(this);
10583    ITScope it_scope(this, &cond);
10584    vtrn(cond, dt, rd, rm);
10585  }
10586  void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); }
10587
10588  void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10589    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10590    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10591    VIXL_ASSERT(allow_macro_instructions_);
10592    VIXL_ASSERT(OutsideITBlock());
10593    MacroEmissionCheckScope guard(this);
10594    ITScope it_scope(this, &cond);
10595    vtrn(cond, dt, rd, rm);
10596  }
10597  void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); }
10598
10599  void Vtst(
10600      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10601    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10602    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10604    VIXL_ASSERT(allow_macro_instructions_);
10605    VIXL_ASSERT(OutsideITBlock());
10606    MacroEmissionCheckScope guard(this);
10607    ITScope it_scope(this, &cond);
10608    vtst(cond, dt, rd, rn, rm);
10609  }
10610  void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10611    Vtst(al, dt, rd, rn, rm);
10612  }
10613
10614  void Vtst(
10615      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10617    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10619    VIXL_ASSERT(allow_macro_instructions_);
10620    VIXL_ASSERT(OutsideITBlock());
10621    MacroEmissionCheckScope guard(this);
10622    ITScope it_scope(this, &cond);
10623    vtst(cond, dt, rd, rn, rm);
10624  }
10625  void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10626    Vtst(al, dt, rd, rn, rm);
10627  }
10628
10629  void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10630    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10631    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10632    VIXL_ASSERT(allow_macro_instructions_);
10633    VIXL_ASSERT(OutsideITBlock());
10634    MacroEmissionCheckScope guard(this);
10635    ITScope it_scope(this, &cond);
10636    vuzp(cond, dt, rd, rm);
10637  }
10638  void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); }
10639
10640  void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10641    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10642    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10643    VIXL_ASSERT(allow_macro_instructions_);
10644    VIXL_ASSERT(OutsideITBlock());
10645    MacroEmissionCheckScope guard(this);
10646    ITScope it_scope(this, &cond);
10647    vuzp(cond, dt, rd, rm);
10648  }
10649  void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); }
10650
10651  void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10652    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10654    VIXL_ASSERT(allow_macro_instructions_);
10655    VIXL_ASSERT(OutsideITBlock());
10656    MacroEmissionCheckScope guard(this);
10657    ITScope it_scope(this, &cond);
10658    vzip(cond, dt, rd, rm);
10659  }
10660  void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); }
10661
10662  void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10663    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10664    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10665    VIXL_ASSERT(allow_macro_instructions_);
10666    VIXL_ASSERT(OutsideITBlock());
10667    MacroEmissionCheckScope guard(this);
10668    ITScope it_scope(this, &cond);
10669    vzip(cond, dt, rd, rm);
10670  }
10671  void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); }
10672
10673  void Yield(Condition cond) {
10674    VIXL_ASSERT(allow_macro_instructions_);
10675    VIXL_ASSERT(OutsideITBlock());
10676    MacroEmissionCheckScope guard(this);
10677    ITScope it_scope(this, &cond);
10678    yield(cond);
10679  }
10680  void Yield() { Yield(al); }
10681  void Vabs(Condition cond, VRegister rd, VRegister rm) {
10682    VIXL_ASSERT(rd.IsS() || rd.IsD());
10683    VIXL_ASSERT(rd.GetType() == rm.GetType());
10684    if (rd.IsS()) {
10685      Vabs(cond, F32, rd.S(), rm.S());
10686    } else {
10687      Vabs(cond, F64, rd.D(), rm.D());
10688    }
10689  }
10690  void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); }
10691  void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10692    VIXL_ASSERT(rd.IsS() || rd.IsD());
10693    VIXL_ASSERT(rd.GetType() == rn.GetType());
10694    VIXL_ASSERT(rd.GetType() == rm.GetType());
10695    if (rd.IsS()) {
10696      Vadd(cond, F32, rd.S(), rn.S(), rm.S());
10697    } else {
10698      Vadd(cond, F64, rd.D(), rn.D(), rm.D());
10699    }
10700  }
10701  void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); }
10702  void Vcmp(Condition cond, VRegister rd, VRegister rm) {
10703    VIXL_ASSERT(rd.IsS() || rd.IsD());
10704    VIXL_ASSERT(rd.GetType() == rm.GetType());
10705    if (rd.IsS()) {
10706      Vcmp(cond, F32, rd.S(), rm.S());
10707    } else {
10708      Vcmp(cond, F64, rd.D(), rm.D());
10709    }
10710  }
10711  void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); }
10712  void Vcmpe(Condition cond, VRegister rd, VRegister rm) {
10713    VIXL_ASSERT(rd.IsS() || rd.IsD());
10714    VIXL_ASSERT(rd.GetType() == rm.GetType());
10715    if (rd.IsS()) {
10716      Vcmpe(cond, F32, rd.S(), rm.S());
10717    } else {
10718      Vcmpe(cond, F64, rd.D(), rm.D());
10719    }
10720  }
10721  void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); }
10722  void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10723    VIXL_ASSERT(rd.IsS() || rd.IsD());
10724    VIXL_ASSERT(rd.GetType() == rn.GetType());
10725    VIXL_ASSERT(rd.GetType() == rm.GetType());
10726    if (rd.IsS()) {
10727      Vdiv(cond, F32, rd.S(), rn.S(), rm.S());
10728    } else {
10729      Vdiv(cond, F64, rd.D(), rn.D(), rm.D());
10730    }
10731  }
10732  void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); }
10733  void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10734    VIXL_ASSERT(rd.IsS() || rd.IsD());
10735    VIXL_ASSERT(rd.GetType() == rn.GetType());
10736    VIXL_ASSERT(rd.GetType() == rm.GetType());
10737    if (rd.IsS()) {
10738      Vfma(cond, F32, rd.S(), rn.S(), rm.S());
10739    } else {
10740      Vfma(cond, F64, rd.D(), rn.D(), rm.D());
10741    }
10742  }
10743  void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); }
10744  void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10745    VIXL_ASSERT(rd.IsS() || rd.IsD());
10746    VIXL_ASSERT(rd.GetType() == rn.GetType());
10747    VIXL_ASSERT(rd.GetType() == rm.GetType());
10748    if (rd.IsS()) {
10749      Vfms(cond, F32, rd.S(), rn.S(), rm.S());
10750    } else {
10751      Vfms(cond, F64, rd.D(), rn.D(), rm.D());
10752    }
10753  }
10754  void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); }
10755  void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10756    VIXL_ASSERT(rd.IsS() || rd.IsD());
10757    VIXL_ASSERT(rd.GetType() == rn.GetType());
10758    VIXL_ASSERT(rd.GetType() == rm.GetType());
10759    if (rd.IsS()) {
10760      Vfnma(cond, F32, rd.S(), rn.S(), rm.S());
10761    } else {
10762      Vfnma(cond, F64, rd.D(), rn.D(), rm.D());
10763    }
10764  }
10765  void Vfnma(VRegister rd, VRegister rn, VRegister rm) {
10766    Vfnma(al, rd, rn, rm);
10767  }
10768  void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10769    VIXL_ASSERT(rd.IsS() || rd.IsD());
10770    VIXL_ASSERT(rd.GetType() == rn.GetType());
10771    VIXL_ASSERT(rd.GetType() == rm.GetType());
10772    if (rd.IsS()) {
10773      Vfnms(cond, F32, rd.S(), rn.S(), rm.S());
10774    } else {
10775      Vfnms(cond, F64, rd.D(), rn.D(), rm.D());
10776    }
10777  }
10778  void Vfnms(VRegister rd, VRegister rn, VRegister rm) {
10779    Vfnms(al, rd, rn, rm);
10780  }
10781  void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) {
10782    VIXL_ASSERT(rd.IsS() || rd.IsD());
10783    VIXL_ASSERT(rd.GetType() == rn.GetType());
10784    VIXL_ASSERT(rd.GetType() == rm.GetType());
10785    if (rd.IsS()) {
10786      Vmaxnm(F32, rd.S(), rn.S(), rm.S());
10787    } else {
10788      Vmaxnm(F64, rd.D(), rn.D(), rm.D());
10789    }
10790  }
10791  void Vminnm(VRegister rd, VRegister rn, VRegister rm) {
10792    VIXL_ASSERT(rd.IsS() || rd.IsD());
10793    VIXL_ASSERT(rd.GetType() == rn.GetType());
10794    VIXL_ASSERT(rd.GetType() == rm.GetType());
10795    if (rd.IsS()) {
10796      Vminnm(F32, rd.S(), rn.S(), rm.S());
10797    } else {
10798      Vminnm(F64, rd.D(), rn.D(), rm.D());
10799    }
10800  }
10801  void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10802    VIXL_ASSERT(rd.IsS() || rd.IsD());
10803    VIXL_ASSERT(rd.GetType() == rn.GetType());
10804    VIXL_ASSERT(rd.GetType() == rm.GetType());
10805    if (rd.IsS()) {
10806      Vmla(cond, F32, rd.S(), rn.S(), rm.S());
10807    } else {
10808      Vmla(cond, F64, rd.D(), rn.D(), rm.D());
10809    }
10810  }
10811  void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); }
10812  void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10813    VIXL_ASSERT(rd.IsS() || rd.IsD());
10814    VIXL_ASSERT(rd.GetType() == rn.GetType());
10815    VIXL_ASSERT(rd.GetType() == rm.GetType());
10816    if (rd.IsS()) {
10817      Vmls(cond, F32, rd.S(), rn.S(), rm.S());
10818    } else {
10819      Vmls(cond, F64, rd.D(), rn.D(), rm.D());
10820    }
10821  }
10822  void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); }
10823  void Vmov(Condition cond, VRegister rd, VRegister rm) {
10824    VIXL_ASSERT(rd.IsS() || rd.IsD());
10825    VIXL_ASSERT(rd.GetType() == rm.GetType());
10826    if (rd.IsS()) {
10827      Vmov(cond, F32, rd.S(), rm.S());
10828    } else {
10829      Vmov(cond, F64, rd.D(), rm.D());
10830    }
10831  }
10832  void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); }
10833  void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10834    VIXL_ASSERT(rd.IsS() || rd.IsD());
10835    VIXL_ASSERT(rd.GetType() == rn.GetType());
10836    VIXL_ASSERT(rd.GetType() == rm.GetType());
10837    if (rd.IsS()) {
10838      Vmul(cond, F32, rd.S(), rn.S(), rm.S());
10839    } else {
10840      Vmul(cond, F64, rd.D(), rn.D(), rm.D());
10841    }
10842  }
10843  void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); }
10844  void Vneg(Condition cond, VRegister rd, VRegister rm) {
10845    VIXL_ASSERT(rd.IsS() || rd.IsD());
10846    VIXL_ASSERT(rd.GetType() == rm.GetType());
10847    if (rd.IsS()) {
10848      Vneg(cond, F32, rd.S(), rm.S());
10849    } else {
10850      Vneg(cond, F64, rd.D(), rm.D());
10851    }
10852  }
10853  void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); }
10854  void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10855    VIXL_ASSERT(rd.IsS() || rd.IsD());
10856    VIXL_ASSERT(rd.GetType() == rn.GetType());
10857    VIXL_ASSERT(rd.GetType() == rm.GetType());
10858    if (rd.IsS()) {
10859      Vnmla(cond, F32, rd.S(), rn.S(), rm.S());
10860    } else {
10861      Vnmla(cond, F64, rd.D(), rn.D(), rm.D());
10862    }
10863  }
10864  void Vnmla(VRegister rd, VRegister rn, VRegister rm) {
10865    Vnmla(al, rd, rn, rm);
10866  }
10867  void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10868    VIXL_ASSERT(rd.IsS() || rd.IsD());
10869    VIXL_ASSERT(rd.GetType() == rn.GetType());
10870    VIXL_ASSERT(rd.GetType() == rm.GetType());
10871    if (rd.IsS()) {
10872      Vnmls(cond, F32, rd.S(), rn.S(), rm.S());
10873    } else {
10874      Vnmls(cond, F64, rd.D(), rn.D(), rm.D());
10875    }
10876  }
10877  void Vnmls(VRegister rd, VRegister rn, VRegister rm) {
10878    Vnmls(al, rd, rn, rm);
10879  }
10880  void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10881    VIXL_ASSERT(rd.IsS() || rd.IsD());
10882    VIXL_ASSERT(rd.GetType() == rn.GetType());
10883    VIXL_ASSERT(rd.GetType() == rm.GetType());
10884    if (rd.IsS()) {
10885      Vnmul(cond, F32, rd.S(), rn.S(), rm.S());
10886    } else {
10887      Vnmul(cond, F64, rd.D(), rn.D(), rm.D());
10888    }
10889  }
10890  void Vnmul(VRegister rd, VRegister rn, VRegister rm) {
10891    Vnmul(al, rd, rn, rm);
10892  }
10893  void Vseleq(VRegister rd, VRegister rn, VRegister rm) {
10894    VIXL_ASSERT(rd.IsS() || rd.IsD());
10895    VIXL_ASSERT(rd.GetType() == rn.GetType());
10896    VIXL_ASSERT(rd.GetType() == rm.GetType());
10897    if (rd.IsS()) {
10898      Vseleq(F32, rd.S(), rn.S(), rm.S());
10899    } else {
10900      Vseleq(F64, rd.D(), rn.D(), rm.D());
10901    }
10902  }
10903  void Vselge(VRegister rd, VRegister rn, VRegister rm) {
10904    VIXL_ASSERT(rd.IsS() || rd.IsD());
10905    VIXL_ASSERT(rd.GetType() == rn.GetType());
10906    VIXL_ASSERT(rd.GetType() == rm.GetType());
10907    if (rd.IsS()) {
10908      Vselge(F32, rd.S(), rn.S(), rm.S());
10909    } else {
10910      Vselge(F64, rd.D(), rn.D(), rm.D());
10911    }
10912  }
10913  void Vselgt(VRegister rd, VRegister rn, VRegister rm) {
10914    VIXL_ASSERT(rd.IsS() || rd.IsD());
10915    VIXL_ASSERT(rd.GetType() == rn.GetType());
10916    VIXL_ASSERT(rd.GetType() == rm.GetType());
10917    if (rd.IsS()) {
10918      Vselgt(F32, rd.S(), rn.S(), rm.S());
10919    } else {
10920      Vselgt(F64, rd.D(), rn.D(), rm.D());
10921    }
10922  }
10923  void Vselvs(VRegister rd, VRegister rn, VRegister rm) {
10924    VIXL_ASSERT(rd.IsS() || rd.IsD());
10925    VIXL_ASSERT(rd.GetType() == rn.GetType());
10926    VIXL_ASSERT(rd.GetType() == rm.GetType());
10927    if (rd.IsS()) {
10928      Vselvs(F32, rd.S(), rn.S(), rm.S());
10929    } else {
10930      Vselvs(F64, rd.D(), rn.D(), rm.D());
10931    }
10932  }
10933  void Vsqrt(Condition cond, VRegister rd, VRegister rm) {
10934    VIXL_ASSERT(rd.IsS() || rd.IsD());
10935    VIXL_ASSERT(rd.GetType() == rm.GetType());
10936    if (rd.IsS()) {
10937      Vsqrt(cond, F32, rd.S(), rm.S());
10938    } else {
10939      Vsqrt(cond, F64, rd.D(), rm.D());
10940    }
10941  }
10942  void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); }
10943  void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10944    VIXL_ASSERT(rd.IsS() || rd.IsD());
10945    VIXL_ASSERT(rd.GetType() == rn.GetType());
10946    VIXL_ASSERT(rd.GetType() == rm.GetType());
10947    if (rd.IsS()) {
10948      Vsub(cond, F32, rd.S(), rn.S(), rm.S());
10949    } else {
10950      Vsub(cond, F64, rd.D(), rn.D(), rm.D());
10951    }
10952  }
10953  void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); }
10954  // End of generated code.
10955
10956  virtual bool AllowUnpredictable() VIXL_OVERRIDE {
10957    VIXL_ABORT_WITH_MSG("Unpredictable instruction.\n");
10958    return false;
10959  }
10960  virtual bool AllowStronglyDiscouraged() VIXL_OVERRIDE {
10961    VIXL_ABORT_WITH_MSG(
10962        "ARM strongly recommends to not use this instruction.\n");
10963    return false;
10964  }
10965
10966 private:
10967  RegisterList available_;
10968  VRegisterList available_vfp_;
10969  UseScratchRegisterScope* current_scratch_scope_;
10970  MacroAssemblerContext context_;
10971  Label::Offset checkpoint_;
10972  LiteralPoolManager literal_pool_manager_;
10973  VeneerPoolManager veneer_pool_manager_;
10974  bool generate_simulator_code_;
10975  bool allow_macro_instructions_;
10976  bool doing_veneer_pool_generation_;
10977};
10978
10979// This scope utility allows scratch registers to be managed safely. The
10980// MacroAssembler's GetScratchRegisterList() is used as a pool of scratch
10981// registers. These registers can be allocated on demand, and will be returned
10982// at the end of the scope.
10983//
10984// When the scope ends, the MacroAssembler's lists will be restored to their
10985// original state, even if the lists were modified by some other means.
10986//
10987// Scopes must nest perfectly. That is, they must be destructed in reverse
10988// construction order. Otherwise, it is not clear how to handle cases where one
10989// scope acquires a register that was included in a now-closing scope. With
10990// perfect nesting, this cannot occur.
10991class UseScratchRegisterScope {
10992 public:
10993  // This constructor implicitly calls the `Open` function to initialise the
10994  // scope, so it is ready to use immediately after it has been constructed.
10995  explicit UseScratchRegisterScope(MacroAssembler* masm)
10996      : masm_(NULL), parent_(NULL), old_available_(0), old_available_vfp_(0) {
10997    Open(masm);
10998  }
10999  // This constructor allows deferred and optional initialisation of the scope.
11000  // The user is required to explicitly call the `Open` function before using
11001  // the scope.
11002  UseScratchRegisterScope()
11003      : masm_(NULL), parent_(NULL), old_available_(0), old_available_vfp_(0) {}
11004
11005  // This function performs the actual initialisation work.
11006  void Open(MacroAssembler* masm);
11007
11008  // The destructor always implicitly calls the `Close` function.
11009  ~UseScratchRegisterScope() { Close(); }
11010
11011  // This function performs the cleaning-up work. It must succeed even if the
11012  // scope has not been opened. It is safe to call multiple times.
11013  void Close();
11014
11015  bool IsAvailable(const Register& reg) const;
11016  bool IsAvailable(const VRegister& reg) const;
11017
11018  // Take a register from the temp list. It will be returned automatically when
11019  // the scope ends.
11020  Register Acquire();
11021  VRegister AcquireV(unsigned size_in_bits);
11022  QRegister AcquireQ();
11023  DRegister AcquireD();
11024  SRegister AcquireS();
11025
11026  // Explicitly release an acquired (or excluded) register, putting it back in
11027  // the temp list.
11028  void Release(const Register& reg);
11029  void Release(const VRegister& reg);
11030
11031  // Make the specified registers available as scratch registers for the
11032  // duration of this scope.
11033  void Include(const RegisterList& list);
11034  void Include(const Register& reg1,
11035               const Register& reg2 = NoReg,
11036               const Register& reg3 = NoReg,
11037               const Register& reg4 = NoReg) {
11038    Include(RegisterList(reg1, reg2, reg3, reg4));
11039  }
11040  void Include(const VRegisterList& list);
11041  void Include(const VRegister& reg1,
11042               const VRegister& reg2 = NoVReg,
11043               const VRegister& reg3 = NoVReg,
11044               const VRegister& reg4 = NoVReg) {
11045    Include(VRegisterList(reg1, reg2, reg3, reg4));
11046  }
11047
11048  // Make sure that the specified registers are not available in this scope.
11049  // This can be used to prevent helper functions from using sensitive
11050  // registers, for example.
11051  void Exclude(const RegisterList& list);
11052  void Exclude(const Register& reg1,
11053               const Register& reg2 = NoReg,
11054               const Register& reg3 = NoReg,
11055               const Register& reg4 = NoReg) {
11056    Exclude(RegisterList(reg1, reg2, reg3, reg4));
11057  }
11058  void Exclude(const VRegisterList& list);
11059  void Exclude(const VRegister& reg1,
11060               const VRegister& reg2 = NoVReg,
11061               const VRegister& reg3 = NoVReg,
11062               const VRegister& reg4 = NoVReg) {
11063    Exclude(VRegisterList(reg1, reg2, reg3, reg4));
11064  }
11065
11066  // A convenience helper to exclude any registers used by the operand.
11067  void Exclude(const Operand& operand);
11068
11069  // Prevent any scratch registers from being used in this scope.
11070  void ExcludeAll();
11071
11072 private:
11073  // The MacroAssembler maintains a list of available scratch registers, and
11074  // also keeps track of the most recently-opened scope so that on destruction
11075  // we can check that scopes do not outlive their parents.
11076  MacroAssembler* masm_;
11077  UseScratchRegisterScope* parent_;
11078
11079  // The state of the available lists at the start of this scope.
11080  uint32_t old_available_;      // kRRegister
11081  uint64_t old_available_vfp_;  // kVRegister
11082
11083  VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) {
11084    VIXL_UNREACHABLE();
11085  }
11086  VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) {
11087    VIXL_UNREACHABLE();
11088  }
11089};
11090
11091class JumpTableBase {
11092 protected:
11093  JumpTableBase(int len, int offset_size)
11094      : table_location_(Label::kMaxOffset),
11095        branch_location_(Label::kMaxOffset),
11096        length_(len),
11097        offset_shift_(WhichPowerOf2(offset_size)),
11098        presence_(length_) {
11099    VIXL_ASSERT((length_ >= 0) && (offset_size <= 4));
11100  }
11101  virtual ~JumpTableBase() {}
11102
11103 public:
11104  int GetTableSizeInBytes() const { return length_ * (1 << offset_shift_); }
11105  int GetOffsetShift() const { return offset_shift_; }
11106  int GetLength() const { return length_; }
11107  Label* GetDefaultLabel() { return &default_; }
11108  Label* GetEndLabel() { return &end_; }
11109  void SetBranchLocation(uint32_t branch_location) {
11110    branch_location_ = branch_location;
11111  }
11112  uint32_t GetBranchLocation() const { return branch_location_; }
11113  void BindTable(uint32_t location) { table_location_ = location; }
11114  virtual void Link(MacroAssembler* masm,
11115                    int case_index,
11116                    uint32_t location) = 0;
11117
11118  uint32_t GetLocationForCase(int i) {
11119    VIXL_ASSERT((i >= 0) && (i < length_));
11120    return table_location_ + (i * (1 << offset_shift_));
11121  }
11122  void SetPresenceBitForCase(int i) {
11123    VIXL_ASSERT((i >= 0) && (i < length_));
11124    presence_.Set(i);
11125  }
11126
11127  void Finalize(MacroAssembler* masm) {
11128    if (!default_.IsBound()) {
11129      masm->Bind(&default_);
11130    }
11131    masm->Bind(&end_);
11132
11133    presence_.ForEachBitNotSet(LinkIt(this, masm, default_.GetLocation()));
11134  }
11135
11136 private:
11137  uint32_t table_location_;
11138  uint32_t branch_location_;
11139  const int length_;
11140  const int offset_shift_;
11141  BitField presence_;
11142  Label default_;
11143  Label end_;
11144  struct LinkIt {
11145    JumpTableBase* table_;
11146    MacroAssembler* const masm_;
11147    const uint32_t location_;
11148    LinkIt(JumpTableBase* table, MacroAssembler* const masm, uint32_t location)
11149        : table_(table), masm_(masm), location_(location) {}
11150    bool execute(int id) const {
11151      VIXL_ASSERT(id < table_->GetLength());
11152      table_->Link(masm_, static_cast<int>(id), location_);
11153      return true;
11154    }
11155  };
11156};
11157
11158// JumpTable<T>(len): Helper to describe a jump table
11159// len here describes the number of possible case. Values in [0, n[ can have a
11160// jump offset. Any other value will assert.
11161template <typename T>
11162class JumpTable : public JumpTableBase {
11163 protected:
11164  explicit JumpTable(int length) : JumpTableBase(length, sizeof(T)) {}
11165
11166 public:
11167  virtual void Link(MacroAssembler* masm,
11168                    int case_index,
11169                    uint32_t location) VIXL_OVERRIDE {
11170    uint32_t position_in_table = GetLocationForCase(case_index);
11171    uint32_t from = GetBranchLocation();
11172    int offset = location - from;
11173    T* case_offset = masm->GetBuffer()->GetOffsetAddress<T*>(position_in_table);
11174    if (masm->IsUsingT32()) {
11175      *case_offset = offset >> 1;
11176    } else {
11177      *case_offset = offset >> 2;
11178    }
11179  }
11180};
11181
11182class JumpTable8bitOffset : public JumpTable<uint8_t> {
11183 public:
11184  explicit JumpTable8bitOffset(int length) : JumpTable<uint8_t>(length) {}
11185};
11186
11187class JumpTable16bitOffset : public JumpTable<uint16_t> {
11188 public:
11189  explicit JumpTable16bitOffset(int length) : JumpTable<uint16_t>(length) {}
11190};
11191
11192class JumpTable32bitOffset : public JumpTable<uint32_t> {
11193 public:
11194  explicit JumpTable32bitOffset(int length) : JumpTable<uint32_t>(length) {}
11195};
11196
11197}  // namespace aarch32
11198}  // namespace vixl
11199
11200#endif  // VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
11201