macro-assembler-aarch32.h revision 9c112d81bf7bc65d6bea5a1d889ef3db7609771d 
1// Copyright 2015, VIXL authors
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3//
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27
28#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
29#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
30
31#include "code-generation-scopes-vixl.h"
32#include "macro-assembler-interface.h"
33#include "utils-vixl.h"
34
35#include "aarch32/instructions-aarch32.h"
36#include "aarch32/assembler-aarch32.h"
37#include "aarch32/operands-aarch32.h"
38
39namespace vixl {
40namespace aarch32 {
41
42class JumpTableBase;
43
44enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 };
45
46// LiteralPool class, defined as a container for literals
47class LiteralPool {
48 public:
49  typedef std::list<RawLiteral*>::iterator RawLiteralListIterator;
50
51 public:
52  LiteralPool() : size_(0) {}
53  ~LiteralPool() {
54    VIXL_ASSERT(literals_.empty() && (size_ == 0));
55    for (RawLiteralListIterator literal_it = keep_until_delete_.begin();
56         literal_it != keep_until_delete_.end();
57         literal_it++) {
58      delete *literal_it;
59    }
60    keep_until_delete_.clear();
61  }
62
63  unsigned GetSize() const { return size_; }
64
65  // Add a literal to the literal container.
66  void AddLiteral(RawLiteral* literal) {
67    // Manually placed literals can't be added to a literal pool.
68    VIXL_ASSERT(!literal->IsManuallyPlaced());
69    if (literal->GetPositionInPool() == Label::kMaxOffset) {
70      uint32_t position = GetSize();
71      literal->SetPositionInPool(position);
72      literals_.push_back(literal);
73      size_ += literal->GetAlignedSize();
74    }
75  }
76
77  // First literal to be emitted.
78  RawLiteralListIterator GetFirst() { return literals_.begin(); }
79
80  // Mark the end of the literal container.
81  RawLiteralListIterator GetEnd() { return literals_.end(); }
82
83  // Remove all the literals from the container.
84  // If the literal's memory management has been delegated to the container
85  // it will be delete'd.
86  void Clear() {
87    for (RawLiteralListIterator literal_it = GetFirst(); literal_it != GetEnd();
88         literal_it++) {
89      RawLiteral* literal = *literal_it;
90      switch (literal->GetDeletionPolicy()) {
91        case RawLiteral::kDeletedOnPlacementByPool:
92          delete literal;
93          break;
94        case RawLiteral::kDeletedOnPoolDestruction:
95          keep_until_delete_.push_back(literal);
96          break;
97        case RawLiteral::kManuallyDeleted:
98          break;
99      }
100    }
101    literals_.clear();
102    size_ = 0;
103  }
104
105 private:
106  // Size (in bytes and including alignments) of the literal pool.
107  unsigned size_;
108
109  // Literal container.
110  std::list<RawLiteral*> literals_;
111  // Already bound Literal container the app requested this pool to keep.
112  std::list<RawLiteral*> keep_until_delete_;
113};
114
115
116// Macro assembler for aarch32 instruction set.
117class MacroAssembler : public Assembler, public MacroAssemblerInterface {
118 public:
119  enum EmitOption { kBranchRequired, kNoBranchRequired };
120
121  virtual internal::AssemblerBase* AsAssemblerBase() VIXL_OVERRIDE {
122    return this;
123  }
124
125  virtual void BlockPools() VIXL_OVERRIDE {
126    literal_pool_manager_.Block();
127    veneer_pool_manager_.Block();
128  }
129  virtual void ReleasePools() VIXL_OVERRIDE {
130    literal_pool_manager_.Release();
131    veneer_pool_manager_.Release();
132  }
133  virtual void EnsureEmitPoolsFor(size_t size) VIXL_OVERRIDE {
134    // TODO: Optimise this. It also checks that there is space in the buffer,
135    // which we do not need to do here.
136    VIXL_ASSERT(IsUint32(size));
137    EnsureEmitFor(static_cast<uint32_t>(size));
138  }
139
140 private:
141  class MacroEmissionCheckScope : public EmissionCheckScope {
142   public:
143    explicit MacroEmissionCheckScope(MacroAssemblerInterface* masm)
144        : EmissionCheckScope(masm, kTypicalMacroInstructionMaxSize) {}
145
146   private:
147    static const size_t kTypicalMacroInstructionMaxSize =
148        8 * kMaxInstructionSizeInBytes;
149  };
150
151  class MacroAssemblerContext {
152   public:
153    MacroAssemblerContext() : count_(0) {}
154    ~MacroAssemblerContext() {}
155    unsigned GetRecursiveCount() const { return count_; }
156    void Up(const char* loc) {
157      location_stack_[count_] = loc;
158      count_++;
159      if (count_ >= kMaxRecursion) {
160        printf(
161            "Recursion limit reached; unable to resolve macro assembler "
162            "call.\n");
163        printf("Macro assembler context stack:\n");
164        for (unsigned i = 0; i < kMaxRecursion; i++) {
165          printf("%10s %s\n", (i == 0) ? "oldest -> " : "", location_stack_[i]);
166        }
167        VIXL_ABORT();
168      }
169    }
170    void Down() {
171      VIXL_ASSERT((count_ > 0) && (count_ < kMaxRecursion));
172      count_--;
173    }
174
175   private:
176    unsigned count_;
177    static const uint32_t kMaxRecursion = 5;
178    const char* location_stack_[kMaxRecursion];
179  };
180
181  // This scope is used at each Delegate entry to avoid infinite recursion of
182  // Delegate calls. The limit is defined by
183  // MacroAssemblerContext::kMaxRecursion.
184  class ContextScope {
185   public:
186    explicit ContextScope(MacroAssembler* const masm, const char* loc)
187        : masm_(masm) {
188      VIXL_ASSERT(masm_->AllowMacroInstructions());
189      masm_->GetContext()->Up(loc);
190    }
191    ~ContextScope() { masm_->GetContext()->Down(); }
192
193   private:
194    MacroAssembler* const masm_;
195  };
196
197  MacroAssemblerContext* GetContext() { return &context_; }
198
199  class ITScope {
200   public:
201    ITScope(MacroAssembler* masm, Condition* cond, bool can_use_it = false)
202        : masm_(masm), cond_(*cond), can_use_it_(can_use_it) {
203      if (!cond_.Is(al) && masm->IsUsingT32()) {
204        if (can_use_it_) {
205          // IT is not deprecated (that implies a 16 bit T32 instruction).
206          // We generate an IT instruction and a conditional instruction.
207          masm->it(cond_);
208        } else {
209          // The usage of IT is deprecated for the instruction.
210          // We generate a conditional branch and an unconditional instruction.
211          // TODO: Use a scope utility with a size check. To do that, we'd need
212          // one with Open() and Close() implemented.
213          masm_->EnsureEmitFor(k16BitT32InstructionSizeInBytes +
214                               kMaxT32MacroInstructionSizeInBytes);
215          // Generate the branch.
216          masm_->b(cond_.Negate(), Narrow, &label_);
217          // Tell the macro-assembler to generate unconditional instructions.
218          *cond = al;
219        }
220      }
221#ifdef VIXL_DEBUG
222      initial_cursor_offset_ = masm->GetCursorOffset();
223#else
224      USE(initial_cursor_offset_);
225#endif
226    }
227    ~ITScope() {
228      if (!cond_.Is(al) && masm_->IsUsingT32() && !can_use_it_) {
229        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
230                    kMaxT32MacroInstructionSizeInBytes);
231        masm_->BindHelper(&label_);
232      }
233    }
234
235   private:
236    MacroAssembler* masm_;
237    Condition cond_;
238    Label label_;
239    bool can_use_it_;
240    uint32_t initial_cursor_offset_;
241  };
242
243  template <Assembler::InstructionCondDtDL asmfn>
244  class EmitLiteralCondDtDL {
245   public:
246    EmitLiteralCondDtDL(Condition cond, DataType dt, DRegister rt)
247        : cond_(cond), dt_(dt), rt_(rt) {}
248    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
249      (masm->*asmfn)(cond_, dt_, rt_, literal);
250    }
251
252   private:
253    Condition cond_;
254    DataType dt_;
255    DRegister rt_;
256  };
257
258  template <Assembler::InstructionCondDtSL asmfn>
259  class EmitLiteralCondDtSL {
260   public:
261    EmitLiteralCondDtSL(Condition cond, DataType dt, SRegister rt)
262        : cond_(cond), dt_(dt), rt_(rt) {}
263    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
264      (masm->*asmfn)(cond_, dt_, rt_, literal);
265    }
266
267   private:
268    Condition cond_;
269    DataType dt_;
270    SRegister rt_;
271  };
272
273  template <Assembler::InstructionCondRL asmfn>
274  class EmitLiteralCondRL {
275   public:
276    EmitLiteralCondRL(Condition cond, Register rt) : cond_(cond), rt_(rt) {}
277    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
278      (masm->*asmfn)(cond_, rt_, literal);
279    }
280
281   private:
282    Condition cond_;
283    Register rt_;
284  };
285
286  template <Assembler::InstructionCondRRL asmfn>
287  class EmitLiteralCondRRL {
288   public:
289    EmitLiteralCondRRL(Condition cond, Register rt, Register rt2)
290        : cond_(cond), rt_(rt), rt2_(rt2) {}
291    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
292      (masm->*asmfn)(cond_, rt_, rt2_, literal);
293    }
294
295   private:
296    Condition cond_;
297    Register rt_, rt2_;
298  };
299
300  class LiteralPoolManager {
301   public:
302    explicit LiteralPoolManager(MacroAssembler* const masm)
303        : masm_(masm), monitor_(0) {
304      ResetCheckpoint();
305    }
306
307    void ResetCheckpoint() { checkpoint_ = Label::kMaxOffset; }
308
309    LiteralPool* GetLiteralPool() { return &literal_pool_; }
310    Label::Offset GetCheckpoint() const {
311      // Make room for a branch over the pools.
312      return checkpoint_ - kMaxInstructionSizeInBytes;
313    }
314    size_t GetLiteralPoolSize() const { return literal_pool_.GetSize(); }
315
316    // Checks if the insertion of the literal will put the forward reference
317    // too far in the literal pool.
318    bool IsInsertTooFar(RawLiteral* literal, uint32_t from) const {
319      uint32_t checkpoint = from + literal->GetLastInsertForwardDistance();
320      checkpoint =
321          std::min(checkpoint, static_cast<uint32_t>(literal->GetCheckpoint()));
322      bool too_far = AlignDown(checkpoint, 4) < from + literal_pool_.GetSize() +
323                                                    kMaxInstructionSizeInBytes;
324      return too_far;
325    }
326
327    // Set the different checkpoints where the literal pool has to be emited.
328    void UpdateCheckpoint(RawLiteral* literal) {
329      // The literal should have been placed somewhere in the literal pool
330      VIXL_ASSERT(literal->GetPositionInPool() != Label::kMaxOffset);
331      // TODO(all): Consider AddForwardRef as a  virtual so the checkpoint is
332      //   updated when inserted. Or move checkpoint_ into Label,
333      literal->UpdateCheckpoint();
334      Label::Offset tmp =
335          literal->GetAlignedCheckpoint(4) - literal->GetPositionInPool();
336      if (checkpoint_ > tmp) {
337        checkpoint_ = tmp;
338        masm_->ComputeCheckpoint();
339      }
340    }
341
342    bool IsEmpty() const { return GetLiteralPoolSize() == 0; }
343
344    void Block() { monitor_++; }
345    void Release() {
346      VIXL_ASSERT(IsBlocked());
347      if (--monitor_ == 0) {
348        // Ensure the pool has not been blocked for too long.
349        VIXL_ASSERT(masm_->GetCursorOffset() <= checkpoint_);
350      }
351    }
352    bool IsBlocked() const { return monitor_ != 0; }
353
354   private:
355    MacroAssembler* const masm_;
356    LiteralPool literal_pool_;
357
358    // Max offset in the code buffer where the literal needs to be
359    // emitted. A default value of Label::kMaxOffset means that the checkpoint
360    // is invalid.
361    Label::Offset checkpoint_;
362    // Indicates whether the emission of this pool is blocked.
363    int monitor_;
364  };
365
366  void PerformEnsureEmit(Label::Offset target, uint32_t extra_size);
367
368 protected:
369  void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm);
370  void PadToMinimumBranchRange(Label* label);
371
372  // Generate the instruction and if it's not possible revert the whole thing.
373  // emit the literal pool and regenerate the instruction.
374  // Note: The instruction is generated via
375  // void T::emit(MacroAssembler* const, RawLiteral* const)
376  template <typename T>
377  void GenerateInstruction(T instr_callback, RawLiteral* const literal) {
378    int32_t cursor = GetCursorOffset();
379    uint32_t where = cursor + GetArchitectureStatePCOffset();
380    bool already_bound = literal->IsBound();
381    // Emit the instruction, via the assembler
382    {
383      MacroEmissionCheckScope guard(this);
384      instr_callback.emit(this, literal);
385    }
386    if (!literal->IsManuallyPlaced() && !already_bound) {
387      if (IsInsertTooFar(literal, where)) {
388        // The instruction's data is too far: revert the emission
389        GetBuffer()->Rewind(cursor);
390        literal->InvalidateLastForwardReference(RawLiteral::kNoUpdateNecessary);
391        EmitLiteralPool(kBranchRequired);
392        MacroEmissionCheckScope guard(this);
393        instr_callback.emit(this, literal);
394      }
395      literal_pool_manager_.GetLiteralPool()->AddLiteral(literal);
396      literal_pool_manager_.UpdateCheckpoint(literal);
397    }
398  }
399
400 public:
401  explicit MacroAssembler(InstructionSet isa = A32)
402      : Assembler(isa),
403        available_(r12),
404        checkpoint_(Label::kMaxOffset),
405        literal_pool_manager_(this),
406        veneer_pool_manager_(this),
407        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) {
408#ifdef VIXL_DEBUG
409    SetAllowMacroInstructions(true);
410#else
411    USE(literal_pool_manager_);
412    USE(allow_macro_instructions_);
413#endif
414    ComputeCheckpoint();
415  }
416  explicit MacroAssembler(size_t size, InstructionSet isa = A32)
417      : Assembler(size, isa),
418        available_(r12),
419        checkpoint_(Label::kMaxOffset),
420        literal_pool_manager_(this),
421        veneer_pool_manager_(this),
422        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) {
423#ifdef VIXL_DEBUG
424    SetAllowMacroInstructions(true);
425#endif
426    ComputeCheckpoint();
427  }
428  MacroAssembler(byte* buffer, size_t size, InstructionSet isa = A32)
429      : Assembler(buffer, size, isa),
430        available_(r12),
431        checkpoint_(Label::kMaxOffset),
432        literal_pool_manager_(this),
433        veneer_pool_manager_(this),
434        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) {
435#ifdef VIXL_DEBUG
436    SetAllowMacroInstructions(true);
437#endif
438    ComputeCheckpoint();
439  }
440
441  bool GenerateSimulatorCode() const { return generate_simulator_code_; }
442
443  // Tell whether any of the macro instruction can be used. When false the
444  // MacroAssembler will assert if a method which can emit a variable number
445  // of instructions is called.
446  virtual void SetAllowMacroInstructions(bool value) VIXL_OVERRIDE {
447    allow_macro_instructions_ = value;
448  }
449  virtual bool AllowMacroInstructions() const VIXL_OVERRIDE {
450    return allow_macro_instructions_;
451  }
452
453  void FinalizeCode() {
454    EmitLiteralPool(kNoBranchRequired);
455    Assembler::FinalizeCode();
456  }
457
458  RegisterList* GetScratchRegisterList() { return &available_; }
459  VRegisterList* GetScratchVRegisterList() { return &available_vfp_; }
460
461  // Given an address calculation (Register + immediate), generate code to
462  // partially compute the address. The returned MemOperand will perform any
463  // remaining computation in a subsequent load or store instruction.
464  //
465  // The offset provided should be the offset that would be used in a load or
466  // store instruction (if it had sufficient range). This only matters where
467  // base.Is(pc), since load and store instructions align the pc before
468  // dereferencing it.
469  //
470  // TODO: Improve the handling of negative offsets. They are not implemented
471  // precisely for now because they only have a marginal benefit for the
472  // existing uses (in delegates).
473  MemOperand MemOperandComputationHelper(Condition cond,
474                                         Register scratch,
475                                         Register base,
476                                         uint32_t offset,
477                                         uint32_t extra_offset_mask = 0);
478
479  MemOperand MemOperandComputationHelper(Register scratch,
480                                         Register base,
481                                         uint32_t offset,
482                                         uint32_t extra_offset_mask = 0) {
483    return MemOperandComputationHelper(al,
484                                       scratch,
485                                       base,
486                                       offset,
487                                       extra_offset_mask);
488  }
489  MemOperand MemOperandComputationHelper(Condition cond,
490                                         Register scratch,
491                                         Label* label,
492                                         uint32_t extra_offset_mask = 0) {
493    // Check for buffer space _before_ calculating the offset, in case we
494    // generate a pool that affects the offset calculation.
495    CodeBufferCheckScope scope(this, 3 * kMaxInstructionSizeInBytes);
496    Label::Offset offset =
497        label->GetLocation() -
498        AlignDown(GetCursorOffset() + GetArchitectureStatePCOffset(), 4);
499    return MemOperandComputationHelper(cond,
500                                       scratch,
501                                       pc,
502                                       offset,
503                                       extra_offset_mask);
504  }
505  MemOperand MemOperandComputationHelper(Register scratch,
506                                         Label* label,
507                                         uint32_t extra_offset_mask = 0) {
508    return MemOperandComputationHelper(al, scratch, label, extra_offset_mask);
509  }
510
511  // Determine the appropriate mask to pass into MemOperandComputationHelper.
512  uint32_t GetOffsetMask(InstructionType type, AddrMode addrmode);
513
514  // State and type helpers.
515  bool IsModifiedImmediate(uint32_t imm) {
516    return (IsUsingT32() && ImmediateT32(imm).IsValid()) ||
517           ImmediateA32(imm).IsValid();
518  }
519
520  void Bind(Label* label) {
521    VIXL_ASSERT(allow_macro_instructions_);
522    PadToMinimumBranchRange(label);
523    BindHelper(label);
524  }
525
526  void AddBranchLabel(Label* label) {
527    if (label->IsBound()) return;
528    veneer_pool_manager_.AddLabel(label);
529  }
530
531  void Place(RawLiteral* literal) {
532    VIXL_ASSERT(allow_macro_instructions_);
533    VIXL_ASSERT(literal->IsManuallyPlaced());
534    // We have two calls to `GetBuffer()->Align()` below, that aligns on word
535    // (4 bytes) boundaries. Only one is taken into account in
536    // `GetAlignedSize()`.
537    static const size_t kMaxAlignSize = 3;
538    size_t size = literal->GetAlignedSize() + kMaxAlignSize;
539    VIXL_ASSERT(IsUint32(size));
540    // TODO: We should use a scope here to check the size of data emitted.  We
541    // currently cannot because `aarch32::CodeBufferCheckScope` currently checks
542    // for pools, so that could lead to an infinite loop.
543    EnsureEmitFor(static_cast<uint32_t>(size));
544    // Literals must be emitted aligned on word (4 bytes) boundaries.
545    GetBuffer()->Align();
546    PlaceHelper(literal);
547    GetBuffer()->Align();
548  }
549
550  void ComputeCheckpoint();
551
552  int32_t GetMarginBeforeVeneerEmission() const {
553    return veneer_pool_manager_.GetCheckpoint() - GetCursorOffset();
554  }
555
556  int32_t GetMarginBeforeLiteralEmission() const {
557    return literal_pool_manager_.GetCheckpoint() - GetCursorOffset();
558  }
559
560  bool VeneerPoolIsEmpty() const { return veneer_pool_manager_.IsEmpty(); }
561  bool LiteralPoolIsEmpty() const { return literal_pool_manager_.IsEmpty(); }
562
563  void EnsureEmitFor(uint32_t size) {
564    Label::Offset target = GetCursorOffset() + size;
565    if (target <= checkpoint_) return;
566    PerformEnsureEmit(target, size);
567  }
568
569  bool IsInsertTooFar(RawLiteral* literal, uint32_t where) {
570    return literal_pool_manager_.IsInsertTooFar(literal, where);
571  }
572
573  bool AliasesAvailableScratchRegister(Register reg) {
574    return GetScratchRegisterList()->Includes(reg);
575  }
576
577  bool AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg) {
578    if (reg.IsAPSR_nzcv()) return false;
579    return GetScratchRegisterList()->Includes(reg.AsRegister());
580  }
581
582  bool AliasesAvailableScratchRegister(VRegister reg) {
583    return GetScratchVRegisterList()->IncludesAliasOf(reg);
584  }
585
586  bool AliasesAvailableScratchRegister(const Operand& operand) {
587    if (operand.IsImmediate()) return false;
588    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
589           (operand.IsRegisterShiftedRegister() &&
590            AliasesAvailableScratchRegister(operand.GetShiftRegister()));
591  }
592
593  bool AliasesAvailableScratchRegister(const NeonOperand& operand) {
594    if (operand.IsImmediate()) return false;
595    return AliasesAvailableScratchRegister(operand.GetRegister());
596  }
597
598  bool AliasesAvailableScratchRegister(SRegisterList list) {
599    for (int n = 0; n < list.GetLength(); n++) {
600      if (AliasesAvailableScratchRegister(list.GetSRegister(n))) return true;
601    }
602    return false;
603  }
604
605  bool AliasesAvailableScratchRegister(DRegisterList list) {
606    for (int n = 0; n < list.GetLength(); n++) {
607      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
608    }
609    return false;
610  }
611
612  bool AliasesAvailableScratchRegister(NeonRegisterList list) {
613    for (int n = 0; n < list.GetLength(); n++) {
614      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
615    }
616    return false;
617  }
618
619  bool AliasesAvailableScratchRegister(RegisterList list) {
620    return GetScratchRegisterList()->Overlaps(list);
621  }
622
623  bool AliasesAvailableScratchRegister(const MemOperand& operand) {
624    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
625           (operand.IsShiftedRegister() &&
626            AliasesAvailableScratchRegister(operand.GetOffsetRegister()));
627  }
628
629  // Emit the literal pool in the code buffer.
630  // Every literal is placed on a 32bit boundary
631  // All the literals in the pool will be removed from the pool and potentially
632  // delete'd.
633  void EmitLiteralPool(LiteralPool* const literal_pool, EmitOption option);
634  void EmitLiteralPool(EmitOption option = kBranchRequired) {
635    VIXL_ASSERT(!literal_pool_manager_.IsBlocked());
636    EmitLiteralPool(literal_pool_manager_.GetLiteralPool(), option);
637    literal_pool_manager_.ResetCheckpoint();
638    ComputeCheckpoint();
639  }
640
641  size_t GetLiteralPoolSize() const {
642    return literal_pool_manager_.GetLiteralPoolSize();
643  }
644
645  // Adr with a literal already constructed. Add the literal to the pool if it
646  // is not already done.
647  void Adr(Condition cond, Register rd, RawLiteral* literal) {
648    EmitLiteralCondRL<&Assembler::adr> emit_helper(cond, rd);
649    GenerateInstruction(emit_helper, literal);
650  }
651  void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); }
652
653  // Loads with literals already constructed. Add the literal to the pool
654  // if it is not already done.
655  void Ldr(Condition cond, Register rt, RawLiteral* literal) {
656    EmitLiteralCondRL<&Assembler::ldr> emit_helper(cond, rt);
657    GenerateInstruction(emit_helper, literal);
658  }
659  void Ldr(Register rt, RawLiteral* literal) { Ldr(al, rt, literal); }
660
661  void Ldrb(Condition cond, Register rt, RawLiteral* literal) {
662    EmitLiteralCondRL<&Assembler::ldrb> emit_helper(cond, rt);
663    GenerateInstruction(emit_helper, literal);
664  }
665  void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); }
666
667  void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) {
668    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(cond, rt, rt2);
669    GenerateInstruction(emit_helper, literal);
670  }
671  void Ldrd(Register rt, Register rt2, RawLiteral* literal) {
672    Ldrd(al, rt, rt2, literal);
673  }
674
675  void Ldrh(Condition cond, Register rt, RawLiteral* literal) {
676    EmitLiteralCondRL<&Assembler::ldrh> emit_helper(cond, rt);
677    GenerateInstruction(emit_helper, literal);
678  }
679  void Ldrh(Register rt, RawLiteral* literal) { Ldrh(al, rt, literal); }
680
681  void Ldrsb(Condition cond, Register rt, RawLiteral* literal) {
682    EmitLiteralCondRL<&Assembler::ldrsb> emit_helper(cond, rt);
683    GenerateInstruction(emit_helper, literal);
684  }
685  void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); }
686
687  void Ldrsh(Condition cond, Register rt, RawLiteral* literal) {
688    EmitLiteralCondRL<&Assembler::ldrsh> emit_helper(cond, rt);
689    GenerateInstruction(emit_helper, literal);
690  }
691  void Ldrsh(Register rt, RawLiteral* literal) { Ldrsh(al, rt, literal); }
692
693  void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) {
694    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(cond, dt, rd);
695    GenerateInstruction(emit_helper, literal);
696  }
697  void Vldr(DataType dt, DRegister rd, RawLiteral* literal) {
698    Vldr(al, dt, rd, literal);
699  }
700  void Vldr(Condition cond, DRegister rd, RawLiteral* literal) {
701    Vldr(cond, Untyped64, rd, literal);
702  }
703  void Vldr(DRegister rd, RawLiteral* literal) {
704    Vldr(al, Untyped64, rd, literal);
705  }
706
707  void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) {
708    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(cond, dt, rd);
709    GenerateInstruction(emit_helper, literal);
710  }
711  void Vldr(DataType dt, SRegister rd, RawLiteral* literal) {
712    Vldr(al, dt, rd, literal);
713  }
714  void Vldr(Condition cond, SRegister rd, RawLiteral* literal) {
715    Vldr(cond, Untyped32, rd, literal);
716  }
717  void Vldr(SRegister rd, RawLiteral* literal) {
718    Vldr(al, Untyped32, rd, literal);
719  }
720
721  // Generic Ldr(register, data)
722  void Ldr(Condition cond, Register rt, uint32_t v) {
723    RawLiteral* literal =
724        new Literal<uint32_t>(v, RawLiteral::kDeletedOnPlacementByPool);
725    EmitLiteralCondRL<&Assembler::ldr> emit_helper(cond, rt);
726    GenerateInstruction(emit_helper, literal);
727  }
728  template <typename T>
729  void Ldr(Register rt, T v) {
730    Ldr(al, rt, v);
731  }
732
733  // Generic Ldrd(rt, rt2, data)
734  void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) {
735    RawLiteral* literal =
736        new Literal<uint64_t>(v, RawLiteral::kDeletedOnPlacementByPool);
737    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(cond, rt, rt2);
738    GenerateInstruction(emit_helper, literal);
739  }
740  template <typename T>
741  void Ldrd(Register rt, Register rt2, T v) {
742    Ldrd(al, rt, rt2, v);
743  }
744
745  void Vldr(Condition cond, SRegister rd, float v) {
746    RawLiteral* literal =
747        new Literal<float>(v, RawLiteral::kDeletedOnPlacementByPool);
748    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(cond, Untyped32, rd);
749    GenerateInstruction(emit_helper, literal);
750  }
751  void Vldr(SRegister rd, float v) { Vldr(al, rd, v); }
752
753  void Vldr(Condition cond, DRegister rd, double v) {
754    RawLiteral* literal =
755        new Literal<double>(v, RawLiteral::kDeletedOnPlacementByPool);
756    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(cond, Untyped64, rd);
757    GenerateInstruction(emit_helper, literal);
758  }
759  void Vldr(DRegister rd, double v) { Vldr(al, rd, v); }
760
761  void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); }
762  void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); }
763  void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); }
764  void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); }
765
766  void Switch(Register reg, JumpTableBase* table);
767  void GenerateSwitchTable(JumpTableBase* table, int table_size);
768  void Case(JumpTableBase* table, int case_index);
769  void Break(JumpTableBase* table);
770  void Default(JumpTableBase* table);
771  void EndSwitch(JumpTableBase* table);
772
773  // Claim memory on the stack.
774  // Note that the Claim, Drop, and Peek helpers below ensure that offsets used
775  // are multiples of 32 bits to help maintain 32-bit SP alignment.
776  // We could `Align{Up,Down}(size, 4)`, but that's potentially problematic:
777  //     Claim(3)
778  //     Claim(1)
779  //     Drop(4)
780  // would seem correct, when in fact:
781  //    Claim(3) -> sp = sp - 4
782  //    Claim(1) -> sp = sp - 4
783  //    Drop(4)  -> sp = sp + 4
784  //
785  void Claim(int32_t size) {
786    if (size == 0) return;
787    // The stack must be kept 32bit aligned.
788    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
789    Sub(sp, sp, size);
790  }
791  // Release memory on the stack
792  void Drop(int32_t size) {
793    if (size == 0) return;
794    // The stack must be kept 32bit aligned.
795    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
796    Add(sp, sp, size);
797  }
798  void Peek(Register dst, int32_t offset) {
799    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
800    Ldr(dst, MemOperand(sp, offset));
801  }
802  void Poke(Register src, int32_t offset) {
803    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
804    Str(src, MemOperand(sp, offset));
805  }
806  void Printf(const char* format,
807              CPURegister reg1 = NoReg,
808              CPURegister reg2 = NoReg,
809              CPURegister reg3 = NoReg,
810              CPURegister reg4 = NoReg);
811  // Functions used by Printf for generation.
812  void PushRegister(CPURegister reg);
813  void PreparePrintfArgument(CPURegister reg,
814                             int* core_count,
815                             int* vfp_count,
816                             uint32_t* printf_type);
817  // Handlers for cases not handled by the assembler.
818  virtual void Delegate(InstructionType type,
819                        InstructionCondROp instruction,
820                        Condition cond,
821                        Register rn,
822                        const Operand& operand) VIXL_OVERRIDE;
823  virtual void Delegate(InstructionType type,
824                        InstructionCondSizeROp instruction,
825                        Condition cond,
826                        EncodingSize size,
827                        Register rn,
828                        const Operand& operand) VIXL_OVERRIDE;
829  virtual void Delegate(InstructionType type,
830                        InstructionCondRROp instruction,
831                        Condition cond,
832                        Register rd,
833                        Register rn,
834                        const Operand& operand) VIXL_OVERRIDE;
835  virtual void Delegate(InstructionType type,
836                        InstructionCondSizeRL instruction,
837                        Condition cond,
838                        EncodingSize size,
839                        Register rd,
840                        Label* label) VIXL_OVERRIDE;
841  virtual void Delegate(InstructionType type,
842                        InstructionCondSizeRROp instruction,
843                        Condition cond,
844                        EncodingSize size,
845                        Register rd,
846                        Register rn,
847                        const Operand& operand) VIXL_OVERRIDE;
848  virtual void Delegate(InstructionType type,
849                        InstructionRL instruction,
850                        Register rn,
851                        Label* label) VIXL_OVERRIDE;
852  virtual void Delegate(InstructionType type,
853                        InstructionCondDtSSop instruction,
854                        Condition cond,
855                        DataType dt,
856                        SRegister rd,
857                        const SOperand& operand) VIXL_OVERRIDE;
858  virtual void Delegate(InstructionType type,
859                        InstructionCondDtDDop instruction,
860                        Condition cond,
861                        DataType dt,
862                        DRegister rd,
863                        const DOperand& operand) VIXL_OVERRIDE;
864  virtual void Delegate(InstructionType type,
865                        InstructionCondDtQQop instruction,
866                        Condition cond,
867                        DataType dt,
868                        QRegister rd,
869                        const QOperand& operand) VIXL_OVERRIDE;
870  virtual void Delegate(InstructionType type,
871                        InstructionCondSizeRMop instruction,
872                        Condition cond,
873                        EncodingSize size,
874                        Register rd,
875                        const MemOperand& operand) VIXL_OVERRIDE;
876  virtual void Delegate(InstructionType type,
877                        InstructionCondRL instruction,
878                        Condition cond,
879                        Register rt,
880                        Label* label) VIXL_OVERRIDE;
881  virtual void Delegate(InstructionType type,
882                        InstructionCondRRL instruction,
883                        Condition cond,
884                        Register rt,
885                        Register rt2,
886                        Label* label) VIXL_OVERRIDE;
887  virtual void Delegate(InstructionType type,
888                        InstructionCondRRMop instruction,
889                        Condition cond,
890                        Register rt,
891                        Register rt2,
892                        const MemOperand& operand) VIXL_OVERRIDE;
893  virtual void Delegate(InstructionType type,
894                        InstructionCondDtSMop instruction,
895                        Condition cond,
896                        DataType dt,
897                        SRegister rd,
898                        const MemOperand& operand) VIXL_OVERRIDE;
899  virtual void Delegate(InstructionType type,
900                        InstructionCondDtDMop instruction,
901                        Condition cond,
902                        DataType dt,
903                        DRegister rd,
904                        const MemOperand& operand) VIXL_OVERRIDE;
905  virtual void Delegate(InstructionType type,
906                        InstructionCondMsrOp instruction,
907                        Condition cond,
908                        MaskedSpecialRegister spec_reg,
909                        const Operand& operand) VIXL_OVERRIDE;
910  virtual void Delegate(InstructionType type,
911                        InstructionCondDtDL instruction,
912                        Condition cond,
913                        DataType dt,
914                        DRegister rd,
915                        Label* label) VIXL_OVERRIDE;
916  virtual void Delegate(InstructionType type,
917                        InstructionCondDtSL instruction,
918                        Condition cond,
919                        DataType dt,
920                        SRegister rd,
921                        Label* label) VIXL_OVERRIDE;
922
923  // Start of generated code.
924
925  void Adc(Condition cond, Register rd, Register rn, const Operand& operand) {
926    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
927    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
928    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
929    VIXL_ASSERT(allow_macro_instructions_);
930    VIXL_ASSERT(OutsideITBlock());
931    MacroEmissionCheckScope guard(this);
932    bool can_use_it =
933        // ADC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
934        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
935        operand.GetBaseRegister().IsLow();
936    ITScope it_scope(this, &cond, can_use_it);
937    adc(cond, rd, rn, operand);
938  }
939  void Adc(Register rd, Register rn, const Operand& operand) {
940    Adc(al, rd, rn, operand);
941  }
942  void Adc(FlagsUpdate flags,
943           Condition cond,
944           Register rd,
945           Register rn,
946           const Operand& operand) {
947    switch (flags) {
948      case LeaveFlags:
949        Adc(cond, rd, rn, operand);
950        break;
951      case SetFlags:
952        Adcs(cond, rd, rn, operand);
953        break;
954      case DontCare:
955        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
956                                    rn.Is(rd) && operand.IsPlainRegister() &&
957                                    operand.GetBaseRegister().IsLow();
958        if (can_be_16bit_encoded) {
959          Adcs(cond, rd, rn, operand);
960        } else {
961          Adc(cond, rd, rn, operand);
962        }
963        break;
964    }
965  }
966  void Adc(FlagsUpdate flags,
967           Register rd,
968           Register rn,
969           const Operand& operand) {
970    Adc(flags, al, rd, rn, operand);
971  }
972
973  void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) {
974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
976    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
977    VIXL_ASSERT(allow_macro_instructions_);
978    VIXL_ASSERT(OutsideITBlock());
979    MacroEmissionCheckScope guard(this);
980    ITScope it_scope(this, &cond);
981    adcs(cond, rd, rn, operand);
982  }
983  void Adcs(Register rd, Register rn, const Operand& operand) {
984    Adcs(al, rd, rn, operand);
985  }
986
987  void Add(Condition cond, Register rd, Register rn, const Operand& operand) {
988    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
989    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
990    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
991    VIXL_ASSERT(allow_macro_instructions_);
992    VIXL_ASSERT(OutsideITBlock());
993    MacroEmissionCheckScope guard(this);
994    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
995      uint32_t immediate = operand.GetImmediate();
996      if (immediate == 0) {
997        return;
998      }
999    }
1000    bool can_use_it =
1001        // ADD<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
1002        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
1003         rd.IsLow()) ||
1004        // ADD<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
1005        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1006         rd.IsLow() && rn.Is(rd)) ||
1007        // ADD{<c>}{<q>} <Rd>, SP, #<imm8> ; T1
1008        (operand.IsImmediate() && (operand.GetImmediate() <= 508) &&
1009         ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) ||
1010        // ADD<c>{<q>} <Rd>, <Rn>, <Rm>
1011        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1012         operand.GetBaseRegister().IsLow()) ||
1013        // ADD<c>{<q>} <Rdn>, <Rm> ; T2
1014        (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) &&
1015         !operand.GetBaseRegister().IsSP() &&
1016         !operand.GetBaseRegister().IsPC()) ||
1017        // ADD{<c>}{<q>} {<Rdm>,} SP, <Rdm> ; T1
1018        (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() &&
1019         operand.GetBaseRegister().Is(rd));
1020    ITScope it_scope(this, &cond, can_use_it);
1021    add(cond, rd, rn, operand);
1022  }
1023  void Add(Register rd, Register rn, const Operand& operand) {
1024    Add(al, rd, rn, operand);
1025  }
1026  void Add(FlagsUpdate flags,
1027           Condition cond,
1028           Register rd,
1029           Register rn,
1030           const Operand& operand) {
1031    switch (flags) {
1032      case LeaveFlags:
1033        Add(cond, rd, rn, operand);
1034        break;
1035      case SetFlags:
1036        Adds(cond, rd, rn, operand);
1037        break;
1038      case DontCare:
1039        bool can_be_16bit_encoded =
1040            IsUsingT32() && cond.Is(al) &&
1041            ((operand.IsPlainRegister() &&
1042              ((rd.IsLow() && rn.IsLow() &&
1043                operand.GetBaseRegister().IsLow()) ||
1044               rd.Is(rn))) ||
1045             (operand.IsImmediate() &&
1046              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
1047               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
1048        if (can_be_16bit_encoded) {
1049          Adds(cond, rd, rn, operand);
1050        } else {
1051          Add(cond, rd, rn, operand);
1052        }
1053        break;
1054    }
1055  }
1056  void Add(FlagsUpdate flags,
1057           Register rd,
1058           Register rn,
1059           const Operand& operand) {
1060    Add(flags, al, rd, rn, operand);
1061  }
1062
1063  void Adds(Condition cond, Register rd, Register rn, const Operand& operand) {
1064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1066    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1067    VIXL_ASSERT(allow_macro_instructions_);
1068    VIXL_ASSERT(OutsideITBlock());
1069    MacroEmissionCheckScope guard(this);
1070    ITScope it_scope(this, &cond);
1071    adds(cond, rd, rn, operand);
1072  }
1073  void Adds(Register rd, Register rn, const Operand& operand) {
1074    Adds(al, rd, rn, operand);
1075  }
1076
1077  void Adr(Condition cond, Register rd, Label* label) {
1078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1079    VIXL_ASSERT(allow_macro_instructions_);
1080    VIXL_ASSERT(OutsideITBlock());
1081    MacroEmissionCheckScope guard(this);
1082    ITScope it_scope(this, &cond);
1083    adr(cond, rd, label);
1084  }
1085  void Adr(Register rd, Label* label) { Adr(al, rd, label); }
1086
1087  void And(Condition cond, Register rd, Register rn, const Operand& operand) {
1088    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1089    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1090    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1091    VIXL_ASSERT(allow_macro_instructions_);
1092    VIXL_ASSERT(OutsideITBlock());
1093    MacroEmissionCheckScope guard(this);
1094    if (cond.Is(al) && operand.IsImmediate()) {
1095      uint32_t immediate = operand.GetImmediate();
1096      if (immediate == 0) {
1097        mov(rd, 0);
1098        return;
1099      }
1100      if ((immediate == 0xffffffff) && rd.Is(rn)) {
1101        return;
1102      }
1103    }
1104    bool can_use_it =
1105        // AND<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1106        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1107        operand.GetBaseRegister().IsLow();
1108    ITScope it_scope(this, &cond, can_use_it);
1109    and_(cond, rd, rn, operand);
1110  }
1111  void And(Register rd, Register rn, const Operand& operand) {
1112    And(al, rd, rn, operand);
1113  }
1114  void And(FlagsUpdate flags,
1115           Condition cond,
1116           Register rd,
1117           Register rn,
1118           const Operand& operand) {
1119    switch (flags) {
1120      case LeaveFlags:
1121        And(cond, rd, rn, operand);
1122        break;
1123      case SetFlags:
1124        Ands(cond, rd, rn, operand);
1125        break;
1126      case DontCare:
1127        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1128                                    rn.Is(rd) && operand.IsPlainRegister() &&
1129                                    operand.GetBaseRegister().IsLow();
1130        if (can_be_16bit_encoded) {
1131          Ands(cond, rd, rn, operand);
1132        } else {
1133          And(cond, rd, rn, operand);
1134        }
1135        break;
1136    }
1137  }
1138  void And(FlagsUpdate flags,
1139           Register rd,
1140           Register rn,
1141           const Operand& operand) {
1142    And(flags, al, rd, rn, operand);
1143  }
1144
1145  void Ands(Condition cond, Register rd, Register rn, const Operand& operand) {
1146    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1147    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1148    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1149    VIXL_ASSERT(allow_macro_instructions_);
1150    VIXL_ASSERT(OutsideITBlock());
1151    MacroEmissionCheckScope guard(this);
1152    ITScope it_scope(this, &cond);
1153    ands(cond, rd, rn, operand);
1154  }
1155  void Ands(Register rd, Register rn, const Operand& operand) {
1156    Ands(al, rd, rn, operand);
1157  }
1158
1159  void Asr(Condition cond, Register rd, Register rm, const Operand& operand) {
1160    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1161    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1162    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1163    VIXL_ASSERT(allow_macro_instructions_);
1164    VIXL_ASSERT(OutsideITBlock());
1165    MacroEmissionCheckScope guard(this);
1166    bool can_use_it =
1167        // ASR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
1168        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1169         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
1170        // ASR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
1171        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
1172         operand.GetBaseRegister().IsLow());
1173    ITScope it_scope(this, &cond, can_use_it);
1174    asr(cond, rd, rm, operand);
1175  }
1176  void Asr(Register rd, Register rm, const Operand& operand) {
1177    Asr(al, rd, rm, operand);
1178  }
1179  void Asr(FlagsUpdate flags,
1180           Condition cond,
1181           Register rd,
1182           Register rm,
1183           const Operand& operand) {
1184    switch (flags) {
1185      case LeaveFlags:
1186        Asr(cond, rd, rm, operand);
1187        break;
1188      case SetFlags:
1189        Asrs(cond, rd, rm, operand);
1190        break;
1191      case DontCare:
1192        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1193                                    rm.IsLow() && operand.IsImmediate() &&
1194                                    (operand.GetImmediate() < 32);
1195        if (can_be_16bit_encoded) {
1196          Asrs(cond, rd, rm, operand);
1197        } else {
1198          Asr(cond, rd, rm, operand);
1199        }
1200        break;
1201    }
1202  }
1203  void Asr(FlagsUpdate flags,
1204           Register rd,
1205           Register rm,
1206           const Operand& operand) {
1207    Asr(flags, al, rd, rm, operand);
1208  }
1209
1210  void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) {
1211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1212    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1213    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1214    VIXL_ASSERT(allow_macro_instructions_);
1215    VIXL_ASSERT(OutsideITBlock());
1216    MacroEmissionCheckScope guard(this);
1217    ITScope it_scope(this, &cond);
1218    asrs(cond, rd, rm, operand);
1219  }
1220  void Asrs(Register rd, Register rm, const Operand& operand) {
1221    Asrs(al, rd, rm, operand);
1222  }
1223
1224  void B(Condition cond, Label* label) {
1225    VIXL_ASSERT(allow_macro_instructions_);
1226    VIXL_ASSERT(OutsideITBlock());
1227    MacroEmissionCheckScope guard(this);
1228    b(cond, label);
1229    AddBranchLabel(label);
1230  }
1231  void B(Label* label) { B(al, label); }
1232
1233  void Bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand) {
1234    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1235    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1236    VIXL_ASSERT(allow_macro_instructions_);
1237    VIXL_ASSERT(OutsideITBlock());
1238    MacroEmissionCheckScope guard(this);
1239    ITScope it_scope(this, &cond);
1240    bfc(cond, rd, lsb, operand);
1241  }
1242  void Bfc(Register rd, uint32_t lsb, const Operand& operand) {
1243    Bfc(al, rd, lsb, operand);
1244  }
1245
1246  void Bfi(Condition cond,
1247           Register rd,
1248           Register rn,
1249           uint32_t lsb,
1250           const Operand& operand) {
1251    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1252    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1253    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1254    VIXL_ASSERT(allow_macro_instructions_);
1255    VIXL_ASSERT(OutsideITBlock());
1256    MacroEmissionCheckScope guard(this);
1257    ITScope it_scope(this, &cond);
1258    bfi(cond, rd, rn, lsb, operand);
1259  }
1260  void Bfi(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
1261    Bfi(al, rd, rn, lsb, operand);
1262  }
1263
1264  void Bic(Condition cond, Register rd, Register rn, const Operand& operand) {
1265    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1266    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1267    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1268    VIXL_ASSERT(allow_macro_instructions_);
1269    VIXL_ASSERT(OutsideITBlock());
1270    MacroEmissionCheckScope guard(this);
1271    if (cond.Is(al) && operand.IsImmediate()) {
1272      uint32_t immediate = operand.GetImmediate();
1273      if ((immediate == 0) && rd.Is(rn)) {
1274        return;
1275      }
1276      if (immediate == 0xffffffff) {
1277        mov(rd, 0);
1278        return;
1279      }
1280    }
1281    bool can_use_it =
1282        // BIC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1283        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1284        operand.GetBaseRegister().IsLow();
1285    ITScope it_scope(this, &cond, can_use_it);
1286    bic(cond, rd, rn, operand);
1287  }
1288  void Bic(Register rd, Register rn, const Operand& operand) {
1289    Bic(al, rd, rn, operand);
1290  }
1291  void Bic(FlagsUpdate flags,
1292           Condition cond,
1293           Register rd,
1294           Register rn,
1295           const Operand& operand) {
1296    switch (flags) {
1297      case LeaveFlags:
1298        Bic(cond, rd, rn, operand);
1299        break;
1300      case SetFlags:
1301        Bics(cond, rd, rn, operand);
1302        break;
1303      case DontCare:
1304        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1305                                    rn.Is(rd) && operand.IsPlainRegister() &&
1306                                    operand.GetBaseRegister().IsLow();
1307        if (can_be_16bit_encoded) {
1308          Bics(cond, rd, rn, operand);
1309        } else {
1310          Bic(cond, rd, rn, operand);
1311        }
1312        break;
1313    }
1314  }
1315  void Bic(FlagsUpdate flags,
1316           Register rd,
1317           Register rn,
1318           const Operand& operand) {
1319    Bic(flags, al, rd, rn, operand);
1320  }
1321
1322  void Bics(Condition cond, Register rd, Register rn, const Operand& operand) {
1323    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1325    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1326    VIXL_ASSERT(allow_macro_instructions_);
1327    VIXL_ASSERT(OutsideITBlock());
1328    MacroEmissionCheckScope guard(this);
1329    ITScope it_scope(this, &cond);
1330    bics(cond, rd, rn, operand);
1331  }
1332  void Bics(Register rd, Register rn, const Operand& operand) {
1333    Bics(al, rd, rn, operand);
1334  }
1335
1336  void Bkpt(Condition cond, uint32_t imm) {
1337    VIXL_ASSERT(allow_macro_instructions_);
1338    VIXL_ASSERT(OutsideITBlock());
1339    MacroEmissionCheckScope guard(this);
1340    ITScope it_scope(this, &cond);
1341    bkpt(cond, imm);
1342  }
1343  void Bkpt(uint32_t imm) { Bkpt(al, imm); }
1344
1345  void Bl(Condition cond, Label* label) {
1346    VIXL_ASSERT(allow_macro_instructions_);
1347    VIXL_ASSERT(OutsideITBlock());
1348    MacroEmissionCheckScope guard(this);
1349    ITScope it_scope(this, &cond);
1350    bl(cond, label);
1351    AddBranchLabel(label);
1352  }
1353  void Bl(Label* label) { Bl(al, label); }
1354
1355  void Blx(Condition cond, Label* label) {
1356    VIXL_ASSERT(allow_macro_instructions_);
1357    VIXL_ASSERT(OutsideITBlock());
1358    MacroEmissionCheckScope guard(this);
1359    ITScope it_scope(this, &cond);
1360    blx(cond, label);
1361    AddBranchLabel(label);
1362  }
1363  void Blx(Label* label) { Blx(al, label); }
1364
1365  void Blx(Condition cond, Register rm) {
1366    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1367    VIXL_ASSERT(allow_macro_instructions_);
1368    VIXL_ASSERT(OutsideITBlock());
1369    MacroEmissionCheckScope guard(this);
1370    bool can_use_it =
1371        // BLX{<c>}{<q>} <Rm> ; T1
1372        !rm.IsPC();
1373    ITScope it_scope(this, &cond, can_use_it);
1374    blx(cond, rm);
1375  }
1376  void Blx(Register rm) { Blx(al, rm); }
1377
1378  void Bx(Condition cond, Register rm) {
1379    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1380    VIXL_ASSERT(allow_macro_instructions_);
1381    VIXL_ASSERT(OutsideITBlock());
1382    MacroEmissionCheckScope guard(this);
1383    bool can_use_it =
1384        // BX{<c>}{<q>} <Rm> ; T1
1385        !rm.IsPC();
1386    ITScope it_scope(this, &cond, can_use_it);
1387    bx(cond, rm);
1388  }
1389  void Bx(Register rm) { Bx(al, rm); }
1390
1391  void Bxj(Condition cond, Register rm) {
1392    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1393    VIXL_ASSERT(allow_macro_instructions_);
1394    VIXL_ASSERT(OutsideITBlock());
1395    MacroEmissionCheckScope guard(this);
1396    ITScope it_scope(this, &cond);
1397    bxj(cond, rm);
1398  }
1399  void Bxj(Register rm) { Bxj(al, rm); }
1400
1401  void Cbnz(Register rn, Label* label) {
1402    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1403    VIXL_ASSERT(allow_macro_instructions_);
1404    VIXL_ASSERT(OutsideITBlock());
1405    MacroEmissionCheckScope guard(this);
1406    cbnz(rn, label);
1407    AddBranchLabel(label);
1408  }
1409
1410  void Cbz(Register rn, Label* label) {
1411    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1412    VIXL_ASSERT(allow_macro_instructions_);
1413    VIXL_ASSERT(OutsideITBlock());
1414    MacroEmissionCheckScope guard(this);
1415    cbz(rn, label);
1416    AddBranchLabel(label);
1417  }
1418
1419  void Clrex(Condition cond) {
1420    VIXL_ASSERT(allow_macro_instructions_);
1421    VIXL_ASSERT(OutsideITBlock());
1422    MacroEmissionCheckScope guard(this);
1423    ITScope it_scope(this, &cond);
1424    clrex(cond);
1425  }
1426  void Clrex() { Clrex(al); }
1427
1428  void Clz(Condition cond, Register rd, Register rm) {
1429    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1430    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1431    VIXL_ASSERT(allow_macro_instructions_);
1432    VIXL_ASSERT(OutsideITBlock());
1433    MacroEmissionCheckScope guard(this);
1434    ITScope it_scope(this, &cond);
1435    clz(cond, rd, rm);
1436  }
1437  void Clz(Register rd, Register rm) { Clz(al, rd, rm); }
1438
1439  void Cmn(Condition cond, Register rn, const Operand& operand) {
1440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1441    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1442    VIXL_ASSERT(allow_macro_instructions_);
1443    VIXL_ASSERT(OutsideITBlock());
1444    MacroEmissionCheckScope guard(this);
1445    bool can_use_it =
1446        // CMN{<c>}{<q>} <Rn>, <Rm> ; T1
1447        operand.IsPlainRegister() && rn.IsLow() &&
1448        operand.GetBaseRegister().IsLow();
1449    ITScope it_scope(this, &cond, can_use_it);
1450    cmn(cond, rn, operand);
1451  }
1452  void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); }
1453
1454  void Cmp(Condition cond, Register rn, const Operand& operand) {
1455    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1456    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1457    VIXL_ASSERT(allow_macro_instructions_);
1458    VIXL_ASSERT(OutsideITBlock());
1459    MacroEmissionCheckScope guard(this);
1460    bool can_use_it =
1461        // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1
1462        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1463         rn.IsLow()) ||
1464        // CMP{<c>}{<q>} <Rn>, <Rm> ; T1 T2
1465        (operand.IsPlainRegister() && !rn.IsPC() &&
1466         !operand.GetBaseRegister().IsPC());
1467    ITScope it_scope(this, &cond, can_use_it);
1468    cmp(cond, rn, operand);
1469  }
1470  void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); }
1471
1472  void Crc32b(Condition cond, Register rd, Register rn, Register rm) {
1473    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1474    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1475    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1476    VIXL_ASSERT(allow_macro_instructions_);
1477    VIXL_ASSERT(OutsideITBlock());
1478    MacroEmissionCheckScope guard(this);
1479    ITScope it_scope(this, &cond);
1480    crc32b(cond, rd, rn, rm);
1481  }
1482  void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); }
1483
1484  void Crc32cb(Condition cond, Register rd, Register rn, Register rm) {
1485    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1486    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1488    VIXL_ASSERT(allow_macro_instructions_);
1489    VIXL_ASSERT(OutsideITBlock());
1490    MacroEmissionCheckScope guard(this);
1491    ITScope it_scope(this, &cond);
1492    crc32cb(cond, rd, rn, rm);
1493  }
1494  void Crc32cb(Register rd, Register rn, Register rm) {
1495    Crc32cb(al, rd, rn, rm);
1496  }
1497
1498  void Crc32ch(Condition cond, Register rd, Register rn, Register rm) {
1499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1501    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1502    VIXL_ASSERT(allow_macro_instructions_);
1503    VIXL_ASSERT(OutsideITBlock());
1504    MacroEmissionCheckScope guard(this);
1505    ITScope it_scope(this, &cond);
1506    crc32ch(cond, rd, rn, rm);
1507  }
1508  void Crc32ch(Register rd, Register rn, Register rm) {
1509    Crc32ch(al, rd, rn, rm);
1510  }
1511
1512  void Crc32cw(Condition cond, Register rd, Register rn, Register rm) {
1513    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1514    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1515    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1516    VIXL_ASSERT(allow_macro_instructions_);
1517    VIXL_ASSERT(OutsideITBlock());
1518    MacroEmissionCheckScope guard(this);
1519    ITScope it_scope(this, &cond);
1520    crc32cw(cond, rd, rn, rm);
1521  }
1522  void Crc32cw(Register rd, Register rn, Register rm) {
1523    Crc32cw(al, rd, rn, rm);
1524  }
1525
1526  void Crc32h(Condition cond, Register rd, Register rn, Register rm) {
1527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1528    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1529    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1530    VIXL_ASSERT(allow_macro_instructions_);
1531    VIXL_ASSERT(OutsideITBlock());
1532    MacroEmissionCheckScope guard(this);
1533    ITScope it_scope(this, &cond);
1534    crc32h(cond, rd, rn, rm);
1535  }
1536  void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); }
1537
1538  void Crc32w(Condition cond, Register rd, Register rn, Register rm) {
1539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1541    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1542    VIXL_ASSERT(allow_macro_instructions_);
1543    VIXL_ASSERT(OutsideITBlock());
1544    MacroEmissionCheckScope guard(this);
1545    ITScope it_scope(this, &cond);
1546    crc32w(cond, rd, rn, rm);
1547  }
1548  void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); }
1549
1550  void Dmb(Condition cond, MemoryBarrier option) {
1551    VIXL_ASSERT(allow_macro_instructions_);
1552    VIXL_ASSERT(OutsideITBlock());
1553    MacroEmissionCheckScope guard(this);
1554    ITScope it_scope(this, &cond);
1555    dmb(cond, option);
1556  }
1557  void Dmb(MemoryBarrier option) { Dmb(al, option); }
1558
1559  void Dsb(Condition cond, MemoryBarrier option) {
1560    VIXL_ASSERT(allow_macro_instructions_);
1561    VIXL_ASSERT(OutsideITBlock());
1562    MacroEmissionCheckScope guard(this);
1563    ITScope it_scope(this, &cond);
1564    dsb(cond, option);
1565  }
1566  void Dsb(MemoryBarrier option) { Dsb(al, option); }
1567
1568  void Eor(Condition cond, Register rd, Register rn, const Operand& operand) {
1569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1571    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1572    VIXL_ASSERT(allow_macro_instructions_);
1573    VIXL_ASSERT(OutsideITBlock());
1574    MacroEmissionCheckScope guard(this);
1575    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1576      uint32_t immediate = operand.GetImmediate();
1577      if (immediate == 0) {
1578        return;
1579      }
1580      if (immediate == 0xffffffff) {
1581        mvn(rd, rn);
1582        return;
1583      }
1584    }
1585    bool can_use_it =
1586        // EOR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1587        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1588        operand.GetBaseRegister().IsLow();
1589    ITScope it_scope(this, &cond, can_use_it);
1590    eor(cond, rd, rn, operand);
1591  }
1592  void Eor(Register rd, Register rn, const Operand& operand) {
1593    Eor(al, rd, rn, operand);
1594  }
1595  void Eor(FlagsUpdate flags,
1596           Condition cond,
1597           Register rd,
1598           Register rn,
1599           const Operand& operand) {
1600    switch (flags) {
1601      case LeaveFlags:
1602        Eor(cond, rd, rn, operand);
1603        break;
1604      case SetFlags:
1605        Eors(cond, rd, rn, operand);
1606        break;
1607      case DontCare:
1608        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1609                                    rn.Is(rd) && operand.IsPlainRegister() &&
1610                                    operand.GetBaseRegister().IsLow();
1611        if (can_be_16bit_encoded) {
1612          Eors(cond, rd, rn, operand);
1613        } else {
1614          Eor(cond, rd, rn, operand);
1615        }
1616        break;
1617    }
1618  }
1619  void Eor(FlagsUpdate flags,
1620           Register rd,
1621           Register rn,
1622           const Operand& operand) {
1623    Eor(flags, al, rd, rn, operand);
1624  }
1625
1626  void Eors(Condition cond, Register rd, Register rn, const Operand& operand) {
1627    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1628    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1629    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1630    VIXL_ASSERT(allow_macro_instructions_);
1631    VIXL_ASSERT(OutsideITBlock());
1632    MacroEmissionCheckScope guard(this);
1633    ITScope it_scope(this, &cond);
1634    eors(cond, rd, rn, operand);
1635  }
1636  void Eors(Register rd, Register rn, const Operand& operand) {
1637    Eors(al, rd, rn, operand);
1638  }
1639
1640  void Fldmdbx(Condition cond,
1641               Register rn,
1642               WriteBack write_back,
1643               DRegisterList dreglist) {
1644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1645    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1646    VIXL_ASSERT(allow_macro_instructions_);
1647    VIXL_ASSERT(OutsideITBlock());
1648    MacroEmissionCheckScope guard(this);
1649    ITScope it_scope(this, &cond);
1650    fldmdbx(cond, rn, write_back, dreglist);
1651  }
1652  void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1653    Fldmdbx(al, rn, write_back, dreglist);
1654  }
1655
1656  void Fldmiax(Condition cond,
1657               Register rn,
1658               WriteBack write_back,
1659               DRegisterList dreglist) {
1660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1661    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1662    VIXL_ASSERT(allow_macro_instructions_);
1663    VIXL_ASSERT(OutsideITBlock());
1664    MacroEmissionCheckScope guard(this);
1665    ITScope it_scope(this, &cond);
1666    fldmiax(cond, rn, write_back, dreglist);
1667  }
1668  void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1669    Fldmiax(al, rn, write_back, dreglist);
1670  }
1671
1672  void Fstmdbx(Condition cond,
1673               Register rn,
1674               WriteBack write_back,
1675               DRegisterList dreglist) {
1676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1677    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1678    VIXL_ASSERT(allow_macro_instructions_);
1679    VIXL_ASSERT(OutsideITBlock());
1680    MacroEmissionCheckScope guard(this);
1681    ITScope it_scope(this, &cond);
1682    fstmdbx(cond, rn, write_back, dreglist);
1683  }
1684  void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1685    Fstmdbx(al, rn, write_back, dreglist);
1686  }
1687
1688  void Fstmiax(Condition cond,
1689               Register rn,
1690               WriteBack write_back,
1691               DRegisterList dreglist) {
1692    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1693    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1694    VIXL_ASSERT(allow_macro_instructions_);
1695    VIXL_ASSERT(OutsideITBlock());
1696    MacroEmissionCheckScope guard(this);
1697    ITScope it_scope(this, &cond);
1698    fstmiax(cond, rn, write_back, dreglist);
1699  }
1700  void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1701    Fstmiax(al, rn, write_back, dreglist);
1702  }
1703
1704  void Hlt(Condition cond, uint32_t imm) {
1705    VIXL_ASSERT(allow_macro_instructions_);
1706    VIXL_ASSERT(OutsideITBlock());
1707    MacroEmissionCheckScope guard(this);
1708    ITScope it_scope(this, &cond);
1709    hlt(cond, imm);
1710  }
1711  void Hlt(uint32_t imm) { Hlt(al, imm); }
1712
1713  void Hvc(Condition cond, uint32_t imm) {
1714    VIXL_ASSERT(allow_macro_instructions_);
1715    VIXL_ASSERT(OutsideITBlock());
1716    MacroEmissionCheckScope guard(this);
1717    ITScope it_scope(this, &cond);
1718    hvc(cond, imm);
1719  }
1720  void Hvc(uint32_t imm) { Hvc(al, imm); }
1721
1722  void Isb(Condition cond, MemoryBarrier option) {
1723    VIXL_ASSERT(allow_macro_instructions_);
1724    VIXL_ASSERT(OutsideITBlock());
1725    MacroEmissionCheckScope guard(this);
1726    ITScope it_scope(this, &cond);
1727    isb(cond, option);
1728  }
1729  void Isb(MemoryBarrier option) { Isb(al, option); }
1730
1731
1732  void Lda(Condition cond, Register rt, const MemOperand& operand) {
1733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1734    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1735    VIXL_ASSERT(allow_macro_instructions_);
1736    VIXL_ASSERT(OutsideITBlock());
1737    MacroEmissionCheckScope guard(this);
1738    ITScope it_scope(this, &cond);
1739    lda(cond, rt, operand);
1740  }
1741  void Lda(Register rt, const MemOperand& operand) { Lda(al, rt, operand); }
1742
1743  void Ldab(Condition cond, Register rt, const MemOperand& operand) {
1744    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1745    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1746    VIXL_ASSERT(allow_macro_instructions_);
1747    VIXL_ASSERT(OutsideITBlock());
1748    MacroEmissionCheckScope guard(this);
1749    ITScope it_scope(this, &cond);
1750    ldab(cond, rt, operand);
1751  }
1752  void Ldab(Register rt, const MemOperand& operand) { Ldab(al, rt, operand); }
1753
1754  void Ldaex(Condition cond, Register rt, const MemOperand& operand) {
1755    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1756    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1757    VIXL_ASSERT(allow_macro_instructions_);
1758    VIXL_ASSERT(OutsideITBlock());
1759    MacroEmissionCheckScope guard(this);
1760    ITScope it_scope(this, &cond);
1761    ldaex(cond, rt, operand);
1762  }
1763  void Ldaex(Register rt, const MemOperand& operand) { Ldaex(al, rt, operand); }
1764
1765  void Ldaexb(Condition cond, Register rt, const MemOperand& operand) {
1766    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1767    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1768    VIXL_ASSERT(allow_macro_instructions_);
1769    VIXL_ASSERT(OutsideITBlock());
1770    MacroEmissionCheckScope guard(this);
1771    ITScope it_scope(this, &cond);
1772    ldaexb(cond, rt, operand);
1773  }
1774  void Ldaexb(Register rt, const MemOperand& operand) {
1775    Ldaexb(al, rt, operand);
1776  }
1777
1778  void Ldaexd(Condition cond,
1779              Register rt,
1780              Register rt2,
1781              const MemOperand& operand) {
1782    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1783    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
1784    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1785    VIXL_ASSERT(allow_macro_instructions_);
1786    VIXL_ASSERT(OutsideITBlock());
1787    MacroEmissionCheckScope guard(this);
1788    ITScope it_scope(this, &cond);
1789    ldaexd(cond, rt, rt2, operand);
1790  }
1791  void Ldaexd(Register rt, Register rt2, const MemOperand& operand) {
1792    Ldaexd(al, rt, rt2, operand);
1793  }
1794
1795  void Ldaexh(Condition cond, Register rt, const MemOperand& operand) {
1796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1797    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1798    VIXL_ASSERT(allow_macro_instructions_);
1799    VIXL_ASSERT(OutsideITBlock());
1800    MacroEmissionCheckScope guard(this);
1801    ITScope it_scope(this, &cond);
1802    ldaexh(cond, rt, operand);
1803  }
1804  void Ldaexh(Register rt, const MemOperand& operand) {
1805    Ldaexh(al, rt, operand);
1806  }
1807
1808  void Ldah(Condition cond, Register rt, const MemOperand& operand) {
1809    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1810    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1811    VIXL_ASSERT(allow_macro_instructions_);
1812    VIXL_ASSERT(OutsideITBlock());
1813    MacroEmissionCheckScope guard(this);
1814    ITScope it_scope(this, &cond);
1815    ldah(cond, rt, operand);
1816  }
1817  void Ldah(Register rt, const MemOperand& operand) { Ldah(al, rt, operand); }
1818
1819  void Ldm(Condition cond,
1820           Register rn,
1821           WriteBack write_back,
1822           RegisterList registers) {
1823    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1824    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1825    VIXL_ASSERT(allow_macro_instructions_);
1826    VIXL_ASSERT(OutsideITBlock());
1827    MacroEmissionCheckScope guard(this);
1828    ITScope it_scope(this, &cond);
1829    ldm(cond, rn, write_back, registers);
1830  }
1831  void Ldm(Register rn, WriteBack write_back, RegisterList registers) {
1832    Ldm(al, rn, write_back, registers);
1833  }
1834
1835  void Ldmda(Condition cond,
1836             Register rn,
1837             WriteBack write_back,
1838             RegisterList registers) {
1839    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1840    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1841    VIXL_ASSERT(allow_macro_instructions_);
1842    VIXL_ASSERT(OutsideITBlock());
1843    MacroEmissionCheckScope guard(this);
1844    ITScope it_scope(this, &cond);
1845    ldmda(cond, rn, write_back, registers);
1846  }
1847  void Ldmda(Register rn, WriteBack write_back, RegisterList registers) {
1848    Ldmda(al, rn, write_back, registers);
1849  }
1850
1851  void Ldmdb(Condition cond,
1852             Register rn,
1853             WriteBack write_back,
1854             RegisterList registers) {
1855    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1856    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1857    VIXL_ASSERT(allow_macro_instructions_);
1858    VIXL_ASSERT(OutsideITBlock());
1859    MacroEmissionCheckScope guard(this);
1860    ITScope it_scope(this, &cond);
1861    ldmdb(cond, rn, write_back, registers);
1862  }
1863  void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) {
1864    Ldmdb(al, rn, write_back, registers);
1865  }
1866
1867  void Ldmea(Condition cond,
1868             Register rn,
1869             WriteBack write_back,
1870             RegisterList registers) {
1871    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1872    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1873    VIXL_ASSERT(allow_macro_instructions_);
1874    VIXL_ASSERT(OutsideITBlock());
1875    MacroEmissionCheckScope guard(this);
1876    ITScope it_scope(this, &cond);
1877    ldmea(cond, rn, write_back, registers);
1878  }
1879  void Ldmea(Register rn, WriteBack write_back, RegisterList registers) {
1880    Ldmea(al, rn, write_back, registers);
1881  }
1882
1883  void Ldmed(Condition cond,
1884             Register rn,
1885             WriteBack write_back,
1886             RegisterList registers) {
1887    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1888    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1889    VIXL_ASSERT(allow_macro_instructions_);
1890    VIXL_ASSERT(OutsideITBlock());
1891    MacroEmissionCheckScope guard(this);
1892    ITScope it_scope(this, &cond);
1893    ldmed(cond, rn, write_back, registers);
1894  }
1895  void Ldmed(Register rn, WriteBack write_back, RegisterList registers) {
1896    Ldmed(al, rn, write_back, registers);
1897  }
1898
1899  void Ldmfa(Condition cond,
1900             Register rn,
1901             WriteBack write_back,
1902             RegisterList registers) {
1903    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1904    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1905    VIXL_ASSERT(allow_macro_instructions_);
1906    VIXL_ASSERT(OutsideITBlock());
1907    MacroEmissionCheckScope guard(this);
1908    ITScope it_scope(this, &cond);
1909    ldmfa(cond, rn, write_back, registers);
1910  }
1911  void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) {
1912    Ldmfa(al, rn, write_back, registers);
1913  }
1914
1915  void Ldmfd(Condition cond,
1916             Register rn,
1917             WriteBack write_back,
1918             RegisterList registers) {
1919    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1920    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1921    VIXL_ASSERT(allow_macro_instructions_);
1922    VIXL_ASSERT(OutsideITBlock());
1923    MacroEmissionCheckScope guard(this);
1924    ITScope it_scope(this, &cond);
1925    ldmfd(cond, rn, write_back, registers);
1926  }
1927  void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) {
1928    Ldmfd(al, rn, write_back, registers);
1929  }
1930
1931  void Ldmib(Condition cond,
1932             Register rn,
1933             WriteBack write_back,
1934             RegisterList registers) {
1935    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1936    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1937    VIXL_ASSERT(allow_macro_instructions_);
1938    VIXL_ASSERT(OutsideITBlock());
1939    MacroEmissionCheckScope guard(this);
1940    ITScope it_scope(this, &cond);
1941    ldmib(cond, rn, write_back, registers);
1942  }
1943  void Ldmib(Register rn, WriteBack write_back, RegisterList registers) {
1944    Ldmib(al, rn, write_back, registers);
1945  }
1946
1947  void Ldr(Condition cond, Register rt, const MemOperand& operand) {
1948    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1949    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1950    VIXL_ASSERT(allow_macro_instructions_);
1951    VIXL_ASSERT(OutsideITBlock());
1952    MacroEmissionCheckScope guard(this);
1953    bool can_use_it =
1954        // LDR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
1955        (operand.IsImmediate() && rt.IsLow() &&
1956         operand.GetBaseRegister().IsLow() &&
1957         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
1958         (operand.GetAddrMode() == Offset)) ||
1959        // LDR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
1960        (operand.IsImmediate() && rt.IsLow() &&
1961         operand.GetBaseRegister().IsSP() &&
1962         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
1963         (operand.GetAddrMode() == Offset)) ||
1964        // LDR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
1965        (operand.IsPlainRegister() && rt.IsLow() &&
1966         operand.GetBaseRegister().IsLow() &&
1967         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
1968         (operand.GetAddrMode() == Offset));
1969    ITScope it_scope(this, &cond, can_use_it);
1970    ldr(cond, rt, operand);
1971  }
1972  void Ldr(Register rt, const MemOperand& operand) { Ldr(al, rt, operand); }
1973
1974  void Ldr(Condition cond, Register rt, Label* label) {
1975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1976    VIXL_ASSERT(allow_macro_instructions_);
1977    VIXL_ASSERT(OutsideITBlock());
1978    MacroEmissionCheckScope guard(this);
1979    ITScope it_scope(this, &cond);
1980    ldr(cond, rt, label);
1981  }
1982  void Ldr(Register rt, Label* label) { Ldr(al, rt, label); }
1983
1984  void Ldrb(Condition cond, Register rt, const MemOperand& operand) {
1985    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1986    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1987    VIXL_ASSERT(allow_macro_instructions_);
1988    VIXL_ASSERT(OutsideITBlock());
1989    MacroEmissionCheckScope guard(this);
1990    bool can_use_it =
1991        // LDRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
1992        (operand.IsImmediate() && rt.IsLow() &&
1993         operand.GetBaseRegister().IsLow() &&
1994         operand.IsOffsetImmediateWithinRange(0, 31) &&
1995         (operand.GetAddrMode() == Offset)) ||
1996        // LDRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
1997        (operand.IsPlainRegister() && rt.IsLow() &&
1998         operand.GetBaseRegister().IsLow() &&
1999         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2000         (operand.GetAddrMode() == Offset));
2001    ITScope it_scope(this, &cond, can_use_it);
2002    ldrb(cond, rt, operand);
2003  }
2004  void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); }
2005
2006  void Ldrb(Condition cond, Register rt, Label* label) {
2007    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2008    VIXL_ASSERT(allow_macro_instructions_);
2009    VIXL_ASSERT(OutsideITBlock());
2010    MacroEmissionCheckScope guard(this);
2011    ITScope it_scope(this, &cond);
2012    ldrb(cond, rt, label);
2013  }
2014  void Ldrb(Register rt, Label* label) { Ldrb(al, rt, label); }
2015
2016  void Ldrd(Condition cond,
2017            Register rt,
2018            Register rt2,
2019            const MemOperand& operand) {
2020    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2021    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2022    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2023    VIXL_ASSERT(allow_macro_instructions_);
2024    VIXL_ASSERT(OutsideITBlock());
2025    MacroEmissionCheckScope guard(this);
2026    ITScope it_scope(this, &cond);
2027    ldrd(cond, rt, rt2, operand);
2028  }
2029  void Ldrd(Register rt, Register rt2, const MemOperand& operand) {
2030    Ldrd(al, rt, rt2, operand);
2031  }
2032
2033  void Ldrd(Condition cond, Register rt, Register rt2, Label* label) {
2034    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2035    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2036    VIXL_ASSERT(allow_macro_instructions_);
2037    VIXL_ASSERT(OutsideITBlock());
2038    MacroEmissionCheckScope guard(this);
2039    ITScope it_scope(this, &cond);
2040    ldrd(cond, rt, rt2, label);
2041  }
2042  void Ldrd(Register rt, Register rt2, Label* label) {
2043    Ldrd(al, rt, rt2, label);
2044  }
2045
2046  void Ldrex(Condition cond, Register rt, const MemOperand& operand) {
2047    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2048    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2049    VIXL_ASSERT(allow_macro_instructions_);
2050    VIXL_ASSERT(OutsideITBlock());
2051    MacroEmissionCheckScope guard(this);
2052    ITScope it_scope(this, &cond);
2053    ldrex(cond, rt, operand);
2054  }
2055  void Ldrex(Register rt, const MemOperand& operand) { Ldrex(al, rt, operand); }
2056
2057  void Ldrexb(Condition cond, Register rt, const MemOperand& operand) {
2058    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2059    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2060    VIXL_ASSERT(allow_macro_instructions_);
2061    VIXL_ASSERT(OutsideITBlock());
2062    MacroEmissionCheckScope guard(this);
2063    ITScope it_scope(this, &cond);
2064    ldrexb(cond, rt, operand);
2065  }
2066  void Ldrexb(Register rt, const MemOperand& operand) {
2067    Ldrexb(al, rt, operand);
2068  }
2069
2070  void Ldrexd(Condition cond,
2071              Register rt,
2072              Register rt2,
2073              const MemOperand& operand) {
2074    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2076    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2077    VIXL_ASSERT(allow_macro_instructions_);
2078    VIXL_ASSERT(OutsideITBlock());
2079    MacroEmissionCheckScope guard(this);
2080    ITScope it_scope(this, &cond);
2081    ldrexd(cond, rt, rt2, operand);
2082  }
2083  void Ldrexd(Register rt, Register rt2, const MemOperand& operand) {
2084    Ldrexd(al, rt, rt2, operand);
2085  }
2086
2087  void Ldrexh(Condition cond, Register rt, const MemOperand& operand) {
2088    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2089    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2090    VIXL_ASSERT(allow_macro_instructions_);
2091    VIXL_ASSERT(OutsideITBlock());
2092    MacroEmissionCheckScope guard(this);
2093    ITScope it_scope(this, &cond);
2094    ldrexh(cond, rt, operand);
2095  }
2096  void Ldrexh(Register rt, const MemOperand& operand) {
2097    Ldrexh(al, rt, operand);
2098  }
2099
2100  void Ldrh(Condition cond, Register rt, const MemOperand& operand) {
2101    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2102    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2103    VIXL_ASSERT(allow_macro_instructions_);
2104    VIXL_ASSERT(OutsideITBlock());
2105    MacroEmissionCheckScope guard(this);
2106    bool can_use_it =
2107        // LDRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2108        (operand.IsImmediate() && rt.IsLow() &&
2109         operand.GetBaseRegister().IsLow() &&
2110         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
2111         (operand.GetAddrMode() == Offset)) ||
2112        // LDRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2113        (operand.IsPlainRegister() && rt.IsLow() &&
2114         operand.GetBaseRegister().IsLow() &&
2115         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2116         (operand.GetAddrMode() == Offset));
2117    ITScope it_scope(this, &cond, can_use_it);
2118    ldrh(cond, rt, operand);
2119  }
2120  void Ldrh(Register rt, const MemOperand& operand) { Ldrh(al, rt, operand); }
2121
2122  void Ldrh(Condition cond, Register rt, Label* label) {
2123    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2124    VIXL_ASSERT(allow_macro_instructions_);
2125    VIXL_ASSERT(OutsideITBlock());
2126    MacroEmissionCheckScope guard(this);
2127    ITScope it_scope(this, &cond);
2128    ldrh(cond, rt, label);
2129  }
2130  void Ldrh(Register rt, Label* label) { Ldrh(al, rt, label); }
2131
2132  void Ldrsb(Condition cond, Register rt, const MemOperand& operand) {
2133    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2134    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2135    VIXL_ASSERT(allow_macro_instructions_);
2136    VIXL_ASSERT(OutsideITBlock());
2137    MacroEmissionCheckScope guard(this);
2138    bool can_use_it =
2139        // LDRSB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2140        operand.IsPlainRegister() && rt.IsLow() &&
2141        operand.GetBaseRegister().IsLow() &&
2142        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2143        (operand.GetAddrMode() == Offset);
2144    ITScope it_scope(this, &cond, can_use_it);
2145    ldrsb(cond, rt, operand);
2146  }
2147  void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); }
2148
2149  void Ldrsb(Condition cond, Register rt, Label* label) {
2150    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2151    VIXL_ASSERT(allow_macro_instructions_);
2152    VIXL_ASSERT(OutsideITBlock());
2153    MacroEmissionCheckScope guard(this);
2154    ITScope it_scope(this, &cond);
2155    ldrsb(cond, rt, label);
2156  }
2157  void Ldrsb(Register rt, Label* label) { Ldrsb(al, rt, label); }
2158
2159  void Ldrsh(Condition cond, Register rt, const MemOperand& operand) {
2160    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2161    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2162    VIXL_ASSERT(allow_macro_instructions_);
2163    VIXL_ASSERT(OutsideITBlock());
2164    MacroEmissionCheckScope guard(this);
2165    bool can_use_it =
2166        // LDRSH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2167        operand.IsPlainRegister() && rt.IsLow() &&
2168        operand.GetBaseRegister().IsLow() &&
2169        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2170        (operand.GetAddrMode() == Offset);
2171    ITScope it_scope(this, &cond, can_use_it);
2172    ldrsh(cond, rt, operand);
2173  }
2174  void Ldrsh(Register rt, const MemOperand& operand) { Ldrsh(al, rt, operand); }
2175
2176  void Ldrsh(Condition cond, Register rt, Label* label) {
2177    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2178    VIXL_ASSERT(allow_macro_instructions_);
2179    VIXL_ASSERT(OutsideITBlock());
2180    MacroEmissionCheckScope guard(this);
2181    ITScope it_scope(this, &cond);
2182    ldrsh(cond, rt, label);
2183  }
2184  void Ldrsh(Register rt, Label* label) { Ldrsh(al, rt, label); }
2185
2186  void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) {
2187    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2188    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2189    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2190    VIXL_ASSERT(allow_macro_instructions_);
2191    VIXL_ASSERT(OutsideITBlock());
2192    MacroEmissionCheckScope guard(this);
2193    bool can_use_it =
2194        // LSL<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2195        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2196         (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) ||
2197        // LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2198        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2199         operand.GetBaseRegister().IsLow());
2200    ITScope it_scope(this, &cond, can_use_it);
2201    lsl(cond, rd, rm, operand);
2202  }
2203  void Lsl(Register rd, Register rm, const Operand& operand) {
2204    Lsl(al, rd, rm, operand);
2205  }
2206  void Lsl(FlagsUpdate flags,
2207           Condition cond,
2208           Register rd,
2209           Register rm,
2210           const Operand& operand) {
2211    switch (flags) {
2212      case LeaveFlags:
2213        Lsl(cond, rd, rm, operand);
2214        break;
2215      case SetFlags:
2216        Lsls(cond, rd, rm, operand);
2217        break;
2218      case DontCare:
2219        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2220                                    rm.IsLow() && operand.IsImmediate() &&
2221                                    (operand.GetImmediate() < 32) &&
2222                                    (operand.GetImmediate() != 0);
2223        if (can_be_16bit_encoded) {
2224          Lsls(cond, rd, rm, operand);
2225        } else {
2226          Lsl(cond, rd, rm, operand);
2227        }
2228        break;
2229    }
2230  }
2231  void Lsl(FlagsUpdate flags,
2232           Register rd,
2233           Register rm,
2234           const Operand& operand) {
2235    Lsl(flags, al, rd, rm, operand);
2236  }
2237
2238  void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) {
2239    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2240    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2241    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2242    VIXL_ASSERT(allow_macro_instructions_);
2243    VIXL_ASSERT(OutsideITBlock());
2244    MacroEmissionCheckScope guard(this);
2245    ITScope it_scope(this, &cond);
2246    lsls(cond, rd, rm, operand);
2247  }
2248  void Lsls(Register rd, Register rm, const Operand& operand) {
2249    Lsls(al, rd, rm, operand);
2250  }
2251
2252  void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) {
2253    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2254    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2255    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2256    VIXL_ASSERT(allow_macro_instructions_);
2257    VIXL_ASSERT(OutsideITBlock());
2258    MacroEmissionCheckScope guard(this);
2259    bool can_use_it =
2260        // LSR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2261        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2262         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
2263        // LSR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2264        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2265         operand.GetBaseRegister().IsLow());
2266    ITScope it_scope(this, &cond, can_use_it);
2267    lsr(cond, rd, rm, operand);
2268  }
2269  void Lsr(Register rd, Register rm, const Operand& operand) {
2270    Lsr(al, rd, rm, operand);
2271  }
2272  void Lsr(FlagsUpdate flags,
2273           Condition cond,
2274           Register rd,
2275           Register rm,
2276           const Operand& operand) {
2277    switch (flags) {
2278      case LeaveFlags:
2279        Lsr(cond, rd, rm, operand);
2280        break;
2281      case SetFlags:
2282        Lsrs(cond, rd, rm, operand);
2283        break;
2284      case DontCare:
2285        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2286                                    rm.IsLow() && operand.IsImmediate() &&
2287                                    (operand.GetImmediate() < 32);
2288        if (can_be_16bit_encoded) {
2289          Lsrs(cond, rd, rm, operand);
2290        } else {
2291          Lsr(cond, rd, rm, operand);
2292        }
2293        break;
2294    }
2295  }
2296  void Lsr(FlagsUpdate flags,
2297           Register rd,
2298           Register rm,
2299           const Operand& operand) {
2300    Lsr(flags, al, rd, rm, operand);
2301  }
2302
2303  void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) {
2304    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2305    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2306    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2307    VIXL_ASSERT(allow_macro_instructions_);
2308    VIXL_ASSERT(OutsideITBlock());
2309    MacroEmissionCheckScope guard(this);
2310    ITScope it_scope(this, &cond);
2311    lsrs(cond, rd, rm, operand);
2312  }
2313  void Lsrs(Register rd, Register rm, const Operand& operand) {
2314    Lsrs(al, rd, rm, operand);
2315  }
2316
2317  void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2318    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2319    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2320    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2321    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2322    VIXL_ASSERT(allow_macro_instructions_);
2323    VIXL_ASSERT(OutsideITBlock());
2324    MacroEmissionCheckScope guard(this);
2325    ITScope it_scope(this, &cond);
2326    mla(cond, rd, rn, rm, ra);
2327  }
2328  void Mla(Register rd, Register rn, Register rm, Register ra) {
2329    Mla(al, rd, rn, rm, ra);
2330  }
2331  void Mla(FlagsUpdate flags,
2332           Condition cond,
2333           Register rd,
2334           Register rn,
2335           Register rm,
2336           Register ra) {
2337    switch (flags) {
2338      case LeaveFlags:
2339        Mla(cond, rd, rn, rm, ra);
2340        break;
2341      case SetFlags:
2342        Mlas(cond, rd, rn, rm, ra);
2343        break;
2344      case DontCare:
2345        Mla(cond, rd, rn, rm, ra);
2346        break;
2347    }
2348  }
2349  void Mla(
2350      FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) {
2351    Mla(flags, al, rd, rn, rm, ra);
2352  }
2353
2354  void Mlas(
2355      Condition cond, Register rd, Register rn, Register rm, Register ra) {
2356    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2357    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2358    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2359    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2360    VIXL_ASSERT(allow_macro_instructions_);
2361    VIXL_ASSERT(OutsideITBlock());
2362    MacroEmissionCheckScope guard(this);
2363    ITScope it_scope(this, &cond);
2364    mlas(cond, rd, rn, rm, ra);
2365  }
2366  void Mlas(Register rd, Register rn, Register rm, Register ra) {
2367    Mlas(al, rd, rn, rm, ra);
2368  }
2369
2370  void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2372    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2373    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2374    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2375    VIXL_ASSERT(allow_macro_instructions_);
2376    VIXL_ASSERT(OutsideITBlock());
2377    MacroEmissionCheckScope guard(this);
2378    ITScope it_scope(this, &cond);
2379    mls(cond, rd, rn, rm, ra);
2380  }
2381  void Mls(Register rd, Register rn, Register rm, Register ra) {
2382    Mls(al, rd, rn, rm, ra);
2383  }
2384
2385  void Mov(Condition cond, Register rd, const Operand& operand) {
2386    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2387    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2388    VIXL_ASSERT(allow_macro_instructions_);
2389    VIXL_ASSERT(OutsideITBlock());
2390    MacroEmissionCheckScope guard(this);
2391    bool can_use_it =
2392        // MOV<c>{<q>} <Rd>, #<imm8> ; T1
2393        (operand.IsImmediate() && rd.IsLow() &&
2394         (operand.GetImmediate() <= 255)) ||
2395        // MOV{<c>}{<q>} <Rd>, <Rm> ; T1
2396        (operand.IsPlainRegister() && !rd.IsPC() &&
2397         !operand.GetBaseRegister().IsPC()) ||
2398        // MOV<c>{<q>} <Rd>, <Rm> {, <shift> #<amount>} ; T2
2399        (operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2400         operand.GetBaseRegister().IsLow() &&
2401         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2402          operand.GetShift().Is(ASR))) ||
2403        // MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs> ; T1
2404        // MOV<c>{<q>} <Rdm>, <Rdm>, LSR <Rs> ; T1
2405        // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1
2406        // MOV<c>{<q>} <Rdm>, <Rdm>, ROR <Rs> ; T1
2407        (operand.IsRegisterShiftedRegister() &&
2408         rd.Is(operand.GetBaseRegister()) && rd.IsLow() &&
2409         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2410          operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) &&
2411         operand.GetShiftRegister().IsLow());
2412    ITScope it_scope(this, &cond, can_use_it);
2413    mov(cond, rd, operand);
2414  }
2415  void Mov(Register rd, const Operand& operand) { Mov(al, rd, operand); }
2416  void Mov(FlagsUpdate flags,
2417           Condition cond,
2418           Register rd,
2419           const Operand& operand) {
2420    switch (flags) {
2421      case LeaveFlags:
2422        Mov(cond, rd, operand);
2423        break;
2424      case SetFlags:
2425        Movs(cond, rd, operand);
2426        break;
2427      case DontCare:
2428        bool can_be_16bit_encoded =
2429            IsUsingT32() && cond.Is(al) &&
2430            ((operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2431              operand.GetBaseRegister().IsLow() &&
2432              (operand.GetShiftAmount() < 32) &&
2433              (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() ||
2434               operand.GetShift().IsASR())) ||
2435             (operand.IsRegisterShiftedRegister() && rd.IsLow() &&
2436              operand.GetBaseRegister().Is(rd) &&
2437              operand.GetShiftRegister().IsLow() &&
2438              (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() ||
2439               operand.GetShift().IsASR() || operand.GetShift().IsROR())) ||
2440             (operand.IsImmediate() && rd.IsLow() &&
2441              (operand.GetImmediate() < 256)));
2442        if (can_be_16bit_encoded) {
2443          Movs(cond, rd, operand);
2444        } else {
2445          Mov(cond, rd, operand);
2446        }
2447        break;
2448    }
2449  }
2450  void Mov(FlagsUpdate flags, Register rd, const Operand& operand) {
2451    Mov(flags, al, rd, operand);
2452  }
2453
2454  void Movs(Condition cond, Register rd, const Operand& operand) {
2455    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2456    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2457    VIXL_ASSERT(allow_macro_instructions_);
2458    VIXL_ASSERT(OutsideITBlock());
2459    MacroEmissionCheckScope guard(this);
2460    ITScope it_scope(this, &cond);
2461    movs(cond, rd, operand);
2462  }
2463  void Movs(Register rd, const Operand& operand) { Movs(al, rd, operand); }
2464
2465  void Movt(Condition cond, Register rd, const Operand& operand) {
2466    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2467    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2468    VIXL_ASSERT(allow_macro_instructions_);
2469    VIXL_ASSERT(OutsideITBlock());
2470    MacroEmissionCheckScope guard(this);
2471    ITScope it_scope(this, &cond);
2472    movt(cond, rd, operand);
2473  }
2474  void Movt(Register rd, const Operand& operand) { Movt(al, rd, operand); }
2475
2476  void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
2477    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2478    VIXL_ASSERT(allow_macro_instructions_);
2479    VIXL_ASSERT(OutsideITBlock());
2480    MacroEmissionCheckScope guard(this);
2481    ITScope it_scope(this, &cond);
2482    mrs(cond, rd, spec_reg);
2483  }
2484  void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); }
2485
2486  void Msr(Condition cond,
2487           MaskedSpecialRegister spec_reg,
2488           const Operand& operand) {
2489    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2490    VIXL_ASSERT(allow_macro_instructions_);
2491    VIXL_ASSERT(OutsideITBlock());
2492    MacroEmissionCheckScope guard(this);
2493    ITScope it_scope(this, &cond);
2494    msr(cond, spec_reg, operand);
2495  }
2496  void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) {
2497    Msr(al, spec_reg, operand);
2498  }
2499
2500  void Mul(Condition cond, Register rd, Register rn, Register rm) {
2501    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2502    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2504    VIXL_ASSERT(allow_macro_instructions_);
2505    VIXL_ASSERT(OutsideITBlock());
2506    MacroEmissionCheckScope guard(this);
2507    bool can_use_it =
2508        // MUL<c>{<q>} <Rdm>, <Rn>{, <Rdm>} ; T1
2509        rd.Is(rm) && rn.IsLow() && rm.IsLow();
2510    ITScope it_scope(this, &cond, can_use_it);
2511    mul(cond, rd, rn, rm);
2512  }
2513  void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); }
2514  void Mul(FlagsUpdate flags,
2515           Condition cond,
2516           Register rd,
2517           Register rn,
2518           Register rm) {
2519    switch (flags) {
2520      case LeaveFlags:
2521        Mul(cond, rd, rn, rm);
2522        break;
2523      case SetFlags:
2524        Muls(cond, rd, rn, rm);
2525        break;
2526      case DontCare:
2527        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2528                                    rn.IsLow() && rm.Is(rd);
2529        if (can_be_16bit_encoded) {
2530          Muls(cond, rd, rn, rm);
2531        } else {
2532          Mul(cond, rd, rn, rm);
2533        }
2534        break;
2535    }
2536  }
2537  void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) {
2538    Mul(flags, al, rd, rn, rm);
2539  }
2540
2541  void Muls(Condition cond, Register rd, Register rn, Register rm) {
2542    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2543    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2544    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2545    VIXL_ASSERT(allow_macro_instructions_);
2546    VIXL_ASSERT(OutsideITBlock());
2547    MacroEmissionCheckScope guard(this);
2548    ITScope it_scope(this, &cond);
2549    muls(cond, rd, rn, rm);
2550  }
2551  void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); }
2552
2553  void Mvn(Condition cond, Register rd, const Operand& operand) {
2554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2555    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2556    VIXL_ASSERT(allow_macro_instructions_);
2557    VIXL_ASSERT(OutsideITBlock());
2558    MacroEmissionCheckScope guard(this);
2559    bool can_use_it =
2560        // MVN<c>{<q>} <Rd>, <Rm> ; T1
2561        operand.IsPlainRegister() && rd.IsLow() &&
2562        operand.GetBaseRegister().IsLow();
2563    ITScope it_scope(this, &cond, can_use_it);
2564    mvn(cond, rd, operand);
2565  }
2566  void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); }
2567  void Mvn(FlagsUpdate flags,
2568           Condition cond,
2569           Register rd,
2570           const Operand& operand) {
2571    switch (flags) {
2572      case LeaveFlags:
2573        Mvn(cond, rd, operand);
2574        break;
2575      case SetFlags:
2576        Mvns(cond, rd, operand);
2577        break;
2578      case DontCare:
2579        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2580                                    operand.IsPlainRegister() &&
2581                                    operand.GetBaseRegister().IsLow();
2582        if (can_be_16bit_encoded) {
2583          Mvns(cond, rd, operand);
2584        } else {
2585          Mvn(cond, rd, operand);
2586        }
2587        break;
2588    }
2589  }
2590  void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) {
2591    Mvn(flags, al, rd, operand);
2592  }
2593
2594  void Mvns(Condition cond, Register rd, const Operand& operand) {
2595    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2596    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2597    VIXL_ASSERT(allow_macro_instructions_);
2598    VIXL_ASSERT(OutsideITBlock());
2599    MacroEmissionCheckScope guard(this);
2600    ITScope it_scope(this, &cond);
2601    mvns(cond, rd, operand);
2602  }
2603  void Mvns(Register rd, const Operand& operand) { Mvns(al, rd, operand); }
2604
2605  void Nop(Condition cond) {
2606    VIXL_ASSERT(allow_macro_instructions_);
2607    VIXL_ASSERT(OutsideITBlock());
2608    MacroEmissionCheckScope guard(this);
2609    ITScope it_scope(this, &cond);
2610    nop(cond);
2611  }
2612  void Nop() { Nop(al); }
2613
2614  void Orn(Condition cond, Register rd, Register rn, const Operand& operand) {
2615    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2617    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2618    VIXL_ASSERT(allow_macro_instructions_);
2619    VIXL_ASSERT(OutsideITBlock());
2620    MacroEmissionCheckScope guard(this);
2621    if (cond.Is(al) && operand.IsImmediate()) {
2622      uint32_t immediate = operand.GetImmediate();
2623      if (immediate == 0) {
2624        mvn(rd, 0);
2625        return;
2626      }
2627      if ((immediate == 0xffffffff) && rd.Is(rn)) {
2628        return;
2629      }
2630    }
2631    ITScope it_scope(this, &cond);
2632    orn(cond, rd, rn, operand);
2633  }
2634  void Orn(Register rd, Register rn, const Operand& operand) {
2635    Orn(al, rd, rn, operand);
2636  }
2637  void Orn(FlagsUpdate flags,
2638           Condition cond,
2639           Register rd,
2640           Register rn,
2641           const Operand& operand) {
2642    switch (flags) {
2643      case LeaveFlags:
2644        Orn(cond, rd, rn, operand);
2645        break;
2646      case SetFlags:
2647        Orns(cond, rd, rn, operand);
2648        break;
2649      case DontCare:
2650        Orn(cond, rd, rn, operand);
2651        break;
2652    }
2653  }
2654  void Orn(FlagsUpdate flags,
2655           Register rd,
2656           Register rn,
2657           const Operand& operand) {
2658    Orn(flags, al, rd, rn, operand);
2659  }
2660
2661  void Orns(Condition cond, Register rd, Register rn, const Operand& operand) {
2662    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2663    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2664    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2665    VIXL_ASSERT(allow_macro_instructions_);
2666    VIXL_ASSERT(OutsideITBlock());
2667    MacroEmissionCheckScope guard(this);
2668    ITScope it_scope(this, &cond);
2669    orns(cond, rd, rn, operand);
2670  }
2671  void Orns(Register rd, Register rn, const Operand& operand) {
2672    Orns(al, rd, rn, operand);
2673  }
2674
2675  void Orr(Condition cond, Register rd, Register rn, const Operand& operand) {
2676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2678    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2679    VIXL_ASSERT(allow_macro_instructions_);
2680    VIXL_ASSERT(OutsideITBlock());
2681    MacroEmissionCheckScope guard(this);
2682    if (cond.Is(al) && operand.IsImmediate()) {
2683      uint32_t immediate = operand.GetImmediate();
2684      if ((immediate == 0) && rd.Is(rn)) {
2685        return;
2686      }
2687      if (immediate == 0xffffffff) {
2688        mvn(rd, 0);
2689        return;
2690      }
2691    }
2692    bool can_use_it =
2693        // ORR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
2694        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
2695        operand.GetBaseRegister().IsLow();
2696    ITScope it_scope(this, &cond, can_use_it);
2697    orr(cond, rd, rn, operand);
2698  }
2699  void Orr(Register rd, Register rn, const Operand& operand) {
2700    Orr(al, rd, rn, operand);
2701  }
2702  void Orr(FlagsUpdate flags,
2703           Condition cond,
2704           Register rd,
2705           Register rn,
2706           const Operand& operand) {
2707    switch (flags) {
2708      case LeaveFlags:
2709        Orr(cond, rd, rn, operand);
2710        break;
2711      case SetFlags:
2712        Orrs(cond, rd, rn, operand);
2713        break;
2714      case DontCare:
2715        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2716                                    rn.Is(rd) && operand.IsPlainRegister() &&
2717                                    operand.GetBaseRegister().IsLow();
2718        if (can_be_16bit_encoded) {
2719          Orrs(cond, rd, rn, operand);
2720        } else {
2721          Orr(cond, rd, rn, operand);
2722        }
2723        break;
2724    }
2725  }
2726  void Orr(FlagsUpdate flags,
2727           Register rd,
2728           Register rn,
2729           const Operand& operand) {
2730    Orr(flags, al, rd, rn, operand);
2731  }
2732
2733  void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) {
2734    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2736    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2737    VIXL_ASSERT(allow_macro_instructions_);
2738    VIXL_ASSERT(OutsideITBlock());
2739    MacroEmissionCheckScope guard(this);
2740    ITScope it_scope(this, &cond);
2741    orrs(cond, rd, rn, operand);
2742  }
2743  void Orrs(Register rd, Register rn, const Operand& operand) {
2744    Orrs(al, rd, rn, operand);
2745  }
2746
2747  void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) {
2748    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2749    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2750    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2751    VIXL_ASSERT(allow_macro_instructions_);
2752    VIXL_ASSERT(OutsideITBlock());
2753    MacroEmissionCheckScope guard(this);
2754    ITScope it_scope(this, &cond);
2755    pkhbt(cond, rd, rn, operand);
2756  }
2757  void Pkhbt(Register rd, Register rn, const Operand& operand) {
2758    Pkhbt(al, rd, rn, operand);
2759  }
2760
2761  void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) {
2762    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2763    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2764    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2765    VIXL_ASSERT(allow_macro_instructions_);
2766    VIXL_ASSERT(OutsideITBlock());
2767    MacroEmissionCheckScope guard(this);
2768    ITScope it_scope(this, &cond);
2769    pkhtb(cond, rd, rn, operand);
2770  }
2771  void Pkhtb(Register rd, Register rn, const Operand& operand) {
2772    Pkhtb(al, rd, rn, operand);
2773  }
2774
2775  void Pld(Condition cond, Label* label) {
2776    VIXL_ASSERT(allow_macro_instructions_);
2777    VIXL_ASSERT(OutsideITBlock());
2778    MacroEmissionCheckScope guard(this);
2779    ITScope it_scope(this, &cond);
2780    pld(cond, label);
2781  }
2782  void Pld(Label* label) { Pld(al, label); }
2783
2784  void Pld(Condition cond, const MemOperand& operand) {
2785    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2786    VIXL_ASSERT(allow_macro_instructions_);
2787    VIXL_ASSERT(OutsideITBlock());
2788    MacroEmissionCheckScope guard(this);
2789    ITScope it_scope(this, &cond);
2790    pld(cond, operand);
2791  }
2792  void Pld(const MemOperand& operand) { Pld(al, operand); }
2793
2794  void Pldw(Condition cond, const MemOperand& operand) {
2795    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2796    VIXL_ASSERT(allow_macro_instructions_);
2797    VIXL_ASSERT(OutsideITBlock());
2798    MacroEmissionCheckScope guard(this);
2799    ITScope it_scope(this, &cond);
2800    pldw(cond, operand);
2801  }
2802  void Pldw(const MemOperand& operand) { Pldw(al, operand); }
2803
2804  void Pli(Condition cond, const MemOperand& operand) {
2805    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2806    VIXL_ASSERT(allow_macro_instructions_);
2807    VIXL_ASSERT(OutsideITBlock());
2808    MacroEmissionCheckScope guard(this);
2809    ITScope it_scope(this, &cond);
2810    pli(cond, operand);
2811  }
2812  void Pli(const MemOperand& operand) { Pli(al, operand); }
2813
2814  void Pli(Condition cond, Label* label) {
2815    VIXL_ASSERT(allow_macro_instructions_);
2816    VIXL_ASSERT(OutsideITBlock());
2817    MacroEmissionCheckScope guard(this);
2818    ITScope it_scope(this, &cond);
2819    pli(cond, label);
2820  }
2821  void Pli(Label* label) { Pli(al, label); }
2822
2823  void Pop(Condition cond, RegisterList registers) {
2824    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2825    VIXL_ASSERT(allow_macro_instructions_);
2826    VIXL_ASSERT(OutsideITBlock());
2827    MacroEmissionCheckScope guard(this);
2828    ITScope it_scope(this, &cond);
2829    pop(cond, registers);
2830  }
2831  void Pop(RegisterList registers) { Pop(al, registers); }
2832
2833  void Pop(Condition cond, Register rt) {
2834    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2835    VIXL_ASSERT(allow_macro_instructions_);
2836    VIXL_ASSERT(OutsideITBlock());
2837    MacroEmissionCheckScope guard(this);
2838    ITScope it_scope(this, &cond);
2839    pop(cond, rt);
2840  }
2841  void Pop(Register rt) { Pop(al, rt); }
2842
2843  void Push(Condition cond, RegisterList registers) {
2844    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2845    VIXL_ASSERT(allow_macro_instructions_);
2846    VIXL_ASSERT(OutsideITBlock());
2847    MacroEmissionCheckScope guard(this);
2848    ITScope it_scope(this, &cond);
2849    push(cond, registers);
2850  }
2851  void Push(RegisterList registers) { Push(al, registers); }
2852
2853  void Push(Condition cond, Register rt) {
2854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2855    VIXL_ASSERT(allow_macro_instructions_);
2856    VIXL_ASSERT(OutsideITBlock());
2857    MacroEmissionCheckScope guard(this);
2858    ITScope it_scope(this, &cond);
2859    push(cond, rt);
2860  }
2861  void Push(Register rt) { Push(al, rt); }
2862
2863  void Qadd(Condition cond, Register rd, Register rm, Register rn) {
2864    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2865    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2866    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2867    VIXL_ASSERT(allow_macro_instructions_);
2868    VIXL_ASSERT(OutsideITBlock());
2869    MacroEmissionCheckScope guard(this);
2870    ITScope it_scope(this, &cond);
2871    qadd(cond, rd, rm, rn);
2872  }
2873  void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); }
2874
2875  void Qadd16(Condition cond, Register rd, Register rn, Register rm) {
2876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2877    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2878    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2879    VIXL_ASSERT(allow_macro_instructions_);
2880    VIXL_ASSERT(OutsideITBlock());
2881    MacroEmissionCheckScope guard(this);
2882    ITScope it_scope(this, &cond);
2883    qadd16(cond, rd, rn, rm);
2884  }
2885  void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); }
2886
2887  void Qadd8(Condition cond, Register rd, Register rn, Register rm) {
2888    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2889    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2891    VIXL_ASSERT(allow_macro_instructions_);
2892    VIXL_ASSERT(OutsideITBlock());
2893    MacroEmissionCheckScope guard(this);
2894    ITScope it_scope(this, &cond);
2895    qadd8(cond, rd, rn, rm);
2896  }
2897  void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); }
2898
2899  void Qasx(Condition cond, Register rd, Register rn, Register rm) {
2900    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2901    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2902    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2903    VIXL_ASSERT(allow_macro_instructions_);
2904    VIXL_ASSERT(OutsideITBlock());
2905    MacroEmissionCheckScope guard(this);
2906    ITScope it_scope(this, &cond);
2907    qasx(cond, rd, rn, rm);
2908  }
2909  void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); }
2910
2911  void Qdadd(Condition cond, Register rd, Register rm, Register rn) {
2912    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2915    VIXL_ASSERT(allow_macro_instructions_);
2916    VIXL_ASSERT(OutsideITBlock());
2917    MacroEmissionCheckScope guard(this);
2918    ITScope it_scope(this, &cond);
2919    qdadd(cond, rd, rm, rn);
2920  }
2921  void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); }
2922
2923  void Qdsub(Condition cond, Register rd, Register rm, Register rn) {
2924    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2925    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2926    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2927    VIXL_ASSERT(allow_macro_instructions_);
2928    VIXL_ASSERT(OutsideITBlock());
2929    MacroEmissionCheckScope guard(this);
2930    ITScope it_scope(this, &cond);
2931    qdsub(cond, rd, rm, rn);
2932  }
2933  void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); }
2934
2935  void Qsax(Condition cond, Register rd, Register rn, Register rm) {
2936    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2937    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2939    VIXL_ASSERT(allow_macro_instructions_);
2940    VIXL_ASSERT(OutsideITBlock());
2941    MacroEmissionCheckScope guard(this);
2942    ITScope it_scope(this, &cond);
2943    qsax(cond, rd, rn, rm);
2944  }
2945  void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); }
2946
2947  void Qsub(Condition cond, Register rd, Register rm, Register rn) {
2948    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2951    VIXL_ASSERT(allow_macro_instructions_);
2952    VIXL_ASSERT(OutsideITBlock());
2953    MacroEmissionCheckScope guard(this);
2954    ITScope it_scope(this, &cond);
2955    qsub(cond, rd, rm, rn);
2956  }
2957  void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); }
2958
2959  void Qsub16(Condition cond, Register rd, Register rn, Register rm) {
2960    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2962    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2963    VIXL_ASSERT(allow_macro_instructions_);
2964    VIXL_ASSERT(OutsideITBlock());
2965    MacroEmissionCheckScope guard(this);
2966    ITScope it_scope(this, &cond);
2967    qsub16(cond, rd, rn, rm);
2968  }
2969  void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); }
2970
2971  void Qsub8(Condition cond, Register rd, Register rn, Register rm) {
2972    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2973    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2975    VIXL_ASSERT(allow_macro_instructions_);
2976    VIXL_ASSERT(OutsideITBlock());
2977    MacroEmissionCheckScope guard(this);
2978    ITScope it_scope(this, &cond);
2979    qsub8(cond, rd, rn, rm);
2980  }
2981  void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); }
2982
2983  void Rbit(Condition cond, Register rd, Register rm) {
2984    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2985    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2986    VIXL_ASSERT(allow_macro_instructions_);
2987    VIXL_ASSERT(OutsideITBlock());
2988    MacroEmissionCheckScope guard(this);
2989    ITScope it_scope(this, &cond);
2990    rbit(cond, rd, rm);
2991  }
2992  void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); }
2993
2994  void Rev(Condition cond, Register rd, Register rm) {
2995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2997    VIXL_ASSERT(allow_macro_instructions_);
2998    VIXL_ASSERT(OutsideITBlock());
2999    MacroEmissionCheckScope guard(this);
3000    ITScope it_scope(this, &cond);
3001    rev(cond, rd, rm);
3002  }
3003  void Rev(Register rd, Register rm) { Rev(al, rd, rm); }
3004
3005  void Rev16(Condition cond, Register rd, Register rm) {
3006    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3007    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3008    VIXL_ASSERT(allow_macro_instructions_);
3009    VIXL_ASSERT(OutsideITBlock());
3010    MacroEmissionCheckScope guard(this);
3011    ITScope it_scope(this, &cond);
3012    rev16(cond, rd, rm);
3013  }
3014  void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); }
3015
3016  void Revsh(Condition cond, Register rd, Register rm) {
3017    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3018    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3019    VIXL_ASSERT(allow_macro_instructions_);
3020    VIXL_ASSERT(OutsideITBlock());
3021    MacroEmissionCheckScope guard(this);
3022    ITScope it_scope(this, &cond);
3023    revsh(cond, rd, rm);
3024  }
3025  void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); }
3026
3027  void Ror(Condition cond, Register rd, Register rm, const Operand& operand) {
3028    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3029    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3030    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3031    VIXL_ASSERT(allow_macro_instructions_);
3032    VIXL_ASSERT(OutsideITBlock());
3033    MacroEmissionCheckScope guard(this);
3034    bool can_use_it =
3035        // ROR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
3036        operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
3037        operand.GetBaseRegister().IsLow();
3038    ITScope it_scope(this, &cond, can_use_it);
3039    ror(cond, rd, rm, operand);
3040  }
3041  void Ror(Register rd, Register rm, const Operand& operand) {
3042    Ror(al, rd, rm, operand);
3043  }
3044  void Ror(FlagsUpdate flags,
3045           Condition cond,
3046           Register rd,
3047           Register rm,
3048           const Operand& operand) {
3049    switch (flags) {
3050      case LeaveFlags:
3051        Ror(cond, rd, rm, operand);
3052        break;
3053      case SetFlags:
3054        Rors(cond, rd, rm, operand);
3055        break;
3056      case DontCare:
3057        Ror(cond, rd, rm, operand);
3058        break;
3059    }
3060  }
3061  void Ror(FlagsUpdate flags,
3062           Register rd,
3063           Register rm,
3064           const Operand& operand) {
3065    Ror(flags, al, rd, rm, operand);
3066  }
3067
3068  void Rors(Condition cond, Register rd, Register rm, const Operand& operand) {
3069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3070    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3071    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3072    VIXL_ASSERT(allow_macro_instructions_);
3073    VIXL_ASSERT(OutsideITBlock());
3074    MacroEmissionCheckScope guard(this);
3075    ITScope it_scope(this, &cond);
3076    rors(cond, rd, rm, operand);
3077  }
3078  void Rors(Register rd, Register rm, const Operand& operand) {
3079    Rors(al, rd, rm, operand);
3080  }
3081
3082  void Rrx(Condition cond, Register rd, Register rm) {
3083    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3084    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3085    VIXL_ASSERT(allow_macro_instructions_);
3086    VIXL_ASSERT(OutsideITBlock());
3087    MacroEmissionCheckScope guard(this);
3088    ITScope it_scope(this, &cond);
3089    rrx(cond, rd, rm);
3090  }
3091  void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); }
3092  void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) {
3093    switch (flags) {
3094      case LeaveFlags:
3095        Rrx(cond, rd, rm);
3096        break;
3097      case SetFlags:
3098        Rrxs(cond, rd, rm);
3099        break;
3100      case DontCare:
3101        Rrx(cond, rd, rm);
3102        break;
3103    }
3104  }
3105  void Rrx(FlagsUpdate flags, Register rd, Register rm) {
3106    Rrx(flags, al, rd, rm);
3107  }
3108
3109  void Rrxs(Condition cond, Register rd, Register rm) {
3110    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3112    VIXL_ASSERT(allow_macro_instructions_);
3113    VIXL_ASSERT(OutsideITBlock());
3114    MacroEmissionCheckScope guard(this);
3115    ITScope it_scope(this, &cond);
3116    rrxs(cond, rd, rm);
3117  }
3118  void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); }
3119
3120  void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) {
3121    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3122    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3123    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3124    VIXL_ASSERT(allow_macro_instructions_);
3125    VIXL_ASSERT(OutsideITBlock());
3126    MacroEmissionCheckScope guard(this);
3127    bool can_use_it =
3128        // RSB<c>{<q>} {<Rd>, }<Rn>, #0 ; T1
3129        operand.IsImmediate() && rd.IsLow() && rn.IsLow() &&
3130        (operand.GetImmediate() == 0);
3131    ITScope it_scope(this, &cond, can_use_it);
3132    rsb(cond, rd, rn, operand);
3133  }
3134  void Rsb(Register rd, Register rn, const Operand& operand) {
3135    Rsb(al, rd, rn, operand);
3136  }
3137  void Rsb(FlagsUpdate flags,
3138           Condition cond,
3139           Register rd,
3140           Register rn,
3141           const Operand& operand) {
3142    switch (flags) {
3143      case LeaveFlags:
3144        Rsb(cond, rd, rn, operand);
3145        break;
3146      case SetFlags:
3147        Rsbs(cond, rd, rn, operand);
3148        break;
3149      case DontCare:
3150        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3151                                    rn.IsLow() && operand.IsImmediate() &&
3152                                    (operand.GetImmediate() == 0);
3153        if (can_be_16bit_encoded) {
3154          Rsbs(cond, rd, rn, operand);
3155        } else {
3156          Rsb(cond, rd, rn, operand);
3157        }
3158        break;
3159    }
3160  }
3161  void Rsb(FlagsUpdate flags,
3162           Register rd,
3163           Register rn,
3164           const Operand& operand) {
3165    Rsb(flags, al, rd, rn, operand);
3166  }
3167
3168  void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) {
3169    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3170    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3171    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3172    VIXL_ASSERT(allow_macro_instructions_);
3173    VIXL_ASSERT(OutsideITBlock());
3174    MacroEmissionCheckScope guard(this);
3175    ITScope it_scope(this, &cond);
3176    rsbs(cond, rd, rn, operand);
3177  }
3178  void Rsbs(Register rd, Register rn, const Operand& operand) {
3179    Rsbs(al, rd, rn, operand);
3180  }
3181
3182  void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) {
3183    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3184    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3185    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3186    VIXL_ASSERT(allow_macro_instructions_);
3187    VIXL_ASSERT(OutsideITBlock());
3188    MacroEmissionCheckScope guard(this);
3189    ITScope it_scope(this, &cond);
3190    rsc(cond, rd, rn, operand);
3191  }
3192  void Rsc(Register rd, Register rn, const Operand& operand) {
3193    Rsc(al, rd, rn, operand);
3194  }
3195  void Rsc(FlagsUpdate flags,
3196           Condition cond,
3197           Register rd,
3198           Register rn,
3199           const Operand& operand) {
3200    switch (flags) {
3201      case LeaveFlags:
3202        Rsc(cond, rd, rn, operand);
3203        break;
3204      case SetFlags:
3205        Rscs(cond, rd, rn, operand);
3206        break;
3207      case DontCare:
3208        Rsc(cond, rd, rn, operand);
3209        break;
3210    }
3211  }
3212  void Rsc(FlagsUpdate flags,
3213           Register rd,
3214           Register rn,
3215           const Operand& operand) {
3216    Rsc(flags, al, rd, rn, operand);
3217  }
3218
3219  void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) {
3220    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3222    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3223    VIXL_ASSERT(allow_macro_instructions_);
3224    VIXL_ASSERT(OutsideITBlock());
3225    MacroEmissionCheckScope guard(this);
3226    ITScope it_scope(this, &cond);
3227    rscs(cond, rd, rn, operand);
3228  }
3229  void Rscs(Register rd, Register rn, const Operand& operand) {
3230    Rscs(al, rd, rn, operand);
3231  }
3232
3233  void Sadd16(Condition cond, Register rd, Register rn, Register rm) {
3234    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3235    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3236    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3237    VIXL_ASSERT(allow_macro_instructions_);
3238    VIXL_ASSERT(OutsideITBlock());
3239    MacroEmissionCheckScope guard(this);
3240    ITScope it_scope(this, &cond);
3241    sadd16(cond, rd, rn, rm);
3242  }
3243  void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); }
3244
3245  void Sadd8(Condition cond, Register rd, Register rn, Register rm) {
3246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3247    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3248    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3249    VIXL_ASSERT(allow_macro_instructions_);
3250    VIXL_ASSERT(OutsideITBlock());
3251    MacroEmissionCheckScope guard(this);
3252    ITScope it_scope(this, &cond);
3253    sadd8(cond, rd, rn, rm);
3254  }
3255  void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); }
3256
3257  void Sasx(Condition cond, Register rd, Register rn, Register rm) {
3258    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3259    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3260    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3261    VIXL_ASSERT(allow_macro_instructions_);
3262    VIXL_ASSERT(OutsideITBlock());
3263    MacroEmissionCheckScope guard(this);
3264    ITScope it_scope(this, &cond);
3265    sasx(cond, rd, rn, rm);
3266  }
3267  void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); }
3268
3269  void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) {
3270    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3272    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3273    VIXL_ASSERT(allow_macro_instructions_);
3274    VIXL_ASSERT(OutsideITBlock());
3275    MacroEmissionCheckScope guard(this);
3276    bool can_use_it =
3277        // SBC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
3278        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
3279        operand.GetBaseRegister().IsLow();
3280    ITScope it_scope(this, &cond, can_use_it);
3281    sbc(cond, rd, rn, operand);
3282  }
3283  void Sbc(Register rd, Register rn, const Operand& operand) {
3284    Sbc(al, rd, rn, operand);
3285  }
3286  void Sbc(FlagsUpdate flags,
3287           Condition cond,
3288           Register rd,
3289           Register rn,
3290           const Operand& operand) {
3291    switch (flags) {
3292      case LeaveFlags:
3293        Sbc(cond, rd, rn, operand);
3294        break;
3295      case SetFlags:
3296        Sbcs(cond, rd, rn, operand);
3297        break;
3298      case DontCare:
3299        bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3300                                    rn.Is(rd) && operand.IsPlainRegister() &&
3301                                    operand.GetBaseRegister().IsLow();
3302        if (can_be_16bit_encoded) {
3303          Sbcs(cond, rd, rn, operand);
3304        } else {
3305          Sbc(cond, rd, rn, operand);
3306        }
3307        break;
3308    }
3309  }
3310  void Sbc(FlagsUpdate flags,
3311           Register rd,
3312           Register rn,
3313           const Operand& operand) {
3314    Sbc(flags, al, rd, rn, operand);
3315  }
3316
3317  void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) {
3318    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3319    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3320    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3321    VIXL_ASSERT(allow_macro_instructions_);
3322    VIXL_ASSERT(OutsideITBlock());
3323    MacroEmissionCheckScope guard(this);
3324    ITScope it_scope(this, &cond);
3325    sbcs(cond, rd, rn, operand);
3326  }
3327  void Sbcs(Register rd, Register rn, const Operand& operand) {
3328    Sbcs(al, rd, rn, operand);
3329  }
3330
3331  void Sbfx(Condition cond,
3332            Register rd,
3333            Register rn,
3334            uint32_t lsb,
3335            const Operand& operand) {
3336    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3337    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3338    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3339    VIXL_ASSERT(allow_macro_instructions_);
3340    VIXL_ASSERT(OutsideITBlock());
3341    MacroEmissionCheckScope guard(this);
3342    ITScope it_scope(this, &cond);
3343    sbfx(cond, rd, rn, lsb, operand);
3344  }
3345  void Sbfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
3346    Sbfx(al, rd, rn, lsb, operand);
3347  }
3348
3349  void Sdiv(Condition cond, Register rd, Register rn, Register rm) {
3350    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3351    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3352    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3353    VIXL_ASSERT(allow_macro_instructions_);
3354    VIXL_ASSERT(OutsideITBlock());
3355    MacroEmissionCheckScope guard(this);
3356    ITScope it_scope(this, &cond);
3357    sdiv(cond, rd, rn, rm);
3358  }
3359  void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); }
3360
3361  void Sel(Condition cond, Register rd, Register rn, Register rm) {
3362    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3363    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3364    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3365    VIXL_ASSERT(allow_macro_instructions_);
3366    VIXL_ASSERT(OutsideITBlock());
3367    MacroEmissionCheckScope guard(this);
3368    ITScope it_scope(this, &cond);
3369    sel(cond, rd, rn, rm);
3370  }
3371  void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); }
3372
3373  void Shadd16(Condition cond, Register rd, Register rn, Register rm) {
3374    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3375    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3376    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3377    VIXL_ASSERT(allow_macro_instructions_);
3378    VIXL_ASSERT(OutsideITBlock());
3379    MacroEmissionCheckScope guard(this);
3380    ITScope it_scope(this, &cond);
3381    shadd16(cond, rd, rn, rm);
3382  }
3383  void Shadd16(Register rd, Register rn, Register rm) {
3384    Shadd16(al, rd, rn, rm);
3385  }
3386
3387  void Shadd8(Condition cond, Register rd, Register rn, Register rm) {
3388    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3389    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3390    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3391    VIXL_ASSERT(allow_macro_instructions_);
3392    VIXL_ASSERT(OutsideITBlock());
3393    MacroEmissionCheckScope guard(this);
3394    ITScope it_scope(this, &cond);
3395    shadd8(cond, rd, rn, rm);
3396  }
3397  void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); }
3398
3399  void Shasx(Condition cond, Register rd, Register rn, Register rm) {
3400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3401    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3402    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3403    VIXL_ASSERT(allow_macro_instructions_);
3404    VIXL_ASSERT(OutsideITBlock());
3405    MacroEmissionCheckScope guard(this);
3406    ITScope it_scope(this, &cond);
3407    shasx(cond, rd, rn, rm);
3408  }
3409  void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); }
3410
3411  void Shsax(Condition cond, Register rd, Register rn, Register rm) {
3412    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3413    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3414    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3415    VIXL_ASSERT(allow_macro_instructions_);
3416    VIXL_ASSERT(OutsideITBlock());
3417    MacroEmissionCheckScope guard(this);
3418    ITScope it_scope(this, &cond);
3419    shsax(cond, rd, rn, rm);
3420  }
3421  void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); }
3422
3423  void Shsub16(Condition cond, Register rd, Register rn, Register rm) {
3424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3427    VIXL_ASSERT(allow_macro_instructions_);
3428    VIXL_ASSERT(OutsideITBlock());
3429    MacroEmissionCheckScope guard(this);
3430    ITScope it_scope(this, &cond);
3431    shsub16(cond, rd, rn, rm);
3432  }
3433  void Shsub16(Register rd, Register rn, Register rm) {
3434    Shsub16(al, rd, rn, rm);
3435  }
3436
3437  void Shsub8(Condition cond, Register rd, Register rn, Register rm) {
3438    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3441    VIXL_ASSERT(allow_macro_instructions_);
3442    VIXL_ASSERT(OutsideITBlock());
3443    MacroEmissionCheckScope guard(this);
3444    ITScope it_scope(this, &cond);
3445    shsub8(cond, rd, rn, rm);
3446  }
3447  void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); }
3448
3449  void Smlabb(
3450      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3451    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3452    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3453    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3454    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3455    VIXL_ASSERT(allow_macro_instructions_);
3456    VIXL_ASSERT(OutsideITBlock());
3457    MacroEmissionCheckScope guard(this);
3458    ITScope it_scope(this, &cond);
3459    smlabb(cond, rd, rn, rm, ra);
3460  }
3461  void Smlabb(Register rd, Register rn, Register rm, Register ra) {
3462    Smlabb(al, rd, rn, rm, ra);
3463  }
3464
3465  void Smlabt(
3466      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3467    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3468    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3469    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3470    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3471    VIXL_ASSERT(allow_macro_instructions_);
3472    VIXL_ASSERT(OutsideITBlock());
3473    MacroEmissionCheckScope guard(this);
3474    ITScope it_scope(this, &cond);
3475    smlabt(cond, rd, rn, rm, ra);
3476  }
3477  void Smlabt(Register rd, Register rn, Register rm, Register ra) {
3478    Smlabt(al, rd, rn, rm, ra);
3479  }
3480
3481  void Smlad(
3482      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3483    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3484    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3485    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3486    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3487    VIXL_ASSERT(allow_macro_instructions_);
3488    VIXL_ASSERT(OutsideITBlock());
3489    MacroEmissionCheckScope guard(this);
3490    ITScope it_scope(this, &cond);
3491    smlad(cond, rd, rn, rm, ra);
3492  }
3493  void Smlad(Register rd, Register rn, Register rm, Register ra) {
3494    Smlad(al, rd, rn, rm, ra);
3495  }
3496
3497  void Smladx(
3498      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3501    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3502    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3503    VIXL_ASSERT(allow_macro_instructions_);
3504    VIXL_ASSERT(OutsideITBlock());
3505    MacroEmissionCheckScope guard(this);
3506    ITScope it_scope(this, &cond);
3507    smladx(cond, rd, rn, rm, ra);
3508  }
3509  void Smladx(Register rd, Register rn, Register rm, Register ra) {
3510    Smladx(al, rd, rn, rm, ra);
3511  }
3512
3513  void Smlal(
3514      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3515    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3517    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3518    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3519    VIXL_ASSERT(allow_macro_instructions_);
3520    VIXL_ASSERT(OutsideITBlock());
3521    MacroEmissionCheckScope guard(this);
3522    ITScope it_scope(this, &cond);
3523    smlal(cond, rdlo, rdhi, rn, rm);
3524  }
3525  void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
3526    Smlal(al, rdlo, rdhi, rn, rm);
3527  }
3528
3529  void Smlalbb(
3530      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3531    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3532    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3533    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3534    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3535    VIXL_ASSERT(allow_macro_instructions_);
3536    VIXL_ASSERT(OutsideITBlock());
3537    MacroEmissionCheckScope guard(this);
3538    ITScope it_scope(this, &cond);
3539    smlalbb(cond, rdlo, rdhi, rn, rm);
3540  }
3541  void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
3542    Smlalbb(al, rdlo, rdhi, rn, rm);
3543  }
3544
3545  void Smlalbt(
3546      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3547    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3548    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3549    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3550    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3551    VIXL_ASSERT(allow_macro_instructions_);
3552    VIXL_ASSERT(OutsideITBlock());
3553    MacroEmissionCheckScope guard(this);
3554    ITScope it_scope(this, &cond);
3555    smlalbt(cond, rdlo, rdhi, rn, rm);
3556  }
3557  void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
3558    Smlalbt(al, rdlo, rdhi, rn, rm);
3559  }
3560
3561  void Smlald(
3562      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3563    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3564    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3565    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3567    VIXL_ASSERT(allow_macro_instructions_);
3568    VIXL_ASSERT(OutsideITBlock());
3569    MacroEmissionCheckScope guard(this);
3570    ITScope it_scope(this, &cond);
3571    smlald(cond, rdlo, rdhi, rn, rm);
3572  }
3573  void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
3574    Smlald(al, rdlo, rdhi, rn, rm);
3575  }
3576
3577  void Smlaldx(
3578      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3581    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3583    VIXL_ASSERT(allow_macro_instructions_);
3584    VIXL_ASSERT(OutsideITBlock());
3585    MacroEmissionCheckScope guard(this);
3586    ITScope it_scope(this, &cond);
3587    smlaldx(cond, rdlo, rdhi, rn, rm);
3588  }
3589  void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3590    Smlaldx(al, rdlo, rdhi, rn, rm);
3591  }
3592
3593  void Smlals(
3594      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3595    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3596    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3599    VIXL_ASSERT(allow_macro_instructions_);
3600    VIXL_ASSERT(OutsideITBlock());
3601    MacroEmissionCheckScope guard(this);
3602    ITScope it_scope(this, &cond);
3603    smlals(cond, rdlo, rdhi, rn, rm);
3604  }
3605  void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
3606    Smlals(al, rdlo, rdhi, rn, rm);
3607  }
3608
3609  void Smlaltb(
3610      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3611    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3612    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3613    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3614    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3615    VIXL_ASSERT(allow_macro_instructions_);
3616    VIXL_ASSERT(OutsideITBlock());
3617    MacroEmissionCheckScope guard(this);
3618    ITScope it_scope(this, &cond);
3619    smlaltb(cond, rdlo, rdhi, rn, rm);
3620  }
3621  void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
3622    Smlaltb(al, rdlo, rdhi, rn, rm);
3623  }
3624
3625  void Smlaltt(
3626      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3627    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3628    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3629    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3630    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3631    VIXL_ASSERT(allow_macro_instructions_);
3632    VIXL_ASSERT(OutsideITBlock());
3633    MacroEmissionCheckScope guard(this);
3634    ITScope it_scope(this, &cond);
3635    smlaltt(cond, rdlo, rdhi, rn, rm);
3636  }
3637  void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
3638    Smlaltt(al, rdlo, rdhi, rn, rm);
3639  }
3640
3641  void Smlatb(
3642      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3643    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3645    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3646    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3647    VIXL_ASSERT(allow_macro_instructions_);
3648    VIXL_ASSERT(OutsideITBlock());
3649    MacroEmissionCheckScope guard(this);
3650    ITScope it_scope(this, &cond);
3651    smlatb(cond, rd, rn, rm, ra);
3652  }
3653  void Smlatb(Register rd, Register rn, Register rm, Register ra) {
3654    Smlatb(al, rd, rn, rm, ra);
3655  }
3656
3657  void Smlatt(
3658      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3659    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3662    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3663    VIXL_ASSERT(allow_macro_instructions_);
3664    VIXL_ASSERT(OutsideITBlock());
3665    MacroEmissionCheckScope guard(this);
3666    ITScope it_scope(this, &cond);
3667    smlatt(cond, rd, rn, rm, ra);
3668  }
3669  void Smlatt(Register rd, Register rn, Register rm, Register ra) {
3670    Smlatt(al, rd, rn, rm, ra);
3671  }
3672
3673  void Smlawb(
3674      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3675    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3678    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3679    VIXL_ASSERT(allow_macro_instructions_);
3680    VIXL_ASSERT(OutsideITBlock());
3681    MacroEmissionCheckScope guard(this);
3682    ITScope it_scope(this, &cond);
3683    smlawb(cond, rd, rn, rm, ra);
3684  }
3685  void Smlawb(Register rd, Register rn, Register rm, Register ra) {
3686    Smlawb(al, rd, rn, rm, ra);
3687  }
3688
3689  void Smlawt(
3690      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3691    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3692    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3693    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3694    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3695    VIXL_ASSERT(allow_macro_instructions_);
3696    VIXL_ASSERT(OutsideITBlock());
3697    MacroEmissionCheckScope guard(this);
3698    ITScope it_scope(this, &cond);
3699    smlawt(cond, rd, rn, rm, ra);
3700  }
3701  void Smlawt(Register rd, Register rn, Register rm, Register ra) {
3702    Smlawt(al, rd, rn, rm, ra);
3703  }
3704
3705  void Smlsd(
3706      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3708    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3709    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3710    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3711    VIXL_ASSERT(allow_macro_instructions_);
3712    VIXL_ASSERT(OutsideITBlock());
3713    MacroEmissionCheckScope guard(this);
3714    ITScope it_scope(this, &cond);
3715    smlsd(cond, rd, rn, rm, ra);
3716  }
3717  void Smlsd(Register rd, Register rn, Register rm, Register ra) {
3718    Smlsd(al, rd, rn, rm, ra);
3719  }
3720
3721  void Smlsdx(
3722      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3723    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3725    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3726    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3727    VIXL_ASSERT(allow_macro_instructions_);
3728    VIXL_ASSERT(OutsideITBlock());
3729    MacroEmissionCheckScope guard(this);
3730    ITScope it_scope(this, &cond);
3731    smlsdx(cond, rd, rn, rm, ra);
3732  }
3733  void Smlsdx(Register rd, Register rn, Register rm, Register ra) {
3734    Smlsdx(al, rd, rn, rm, ra);
3735  }
3736
3737  void Smlsld(
3738      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3739    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3740    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3741    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3742    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3743    VIXL_ASSERT(allow_macro_instructions_);
3744    VIXL_ASSERT(OutsideITBlock());
3745    MacroEmissionCheckScope guard(this);
3746    ITScope it_scope(this, &cond);
3747    smlsld(cond, rdlo, rdhi, rn, rm);
3748  }
3749  void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
3750    Smlsld(al, rdlo, rdhi, rn, rm);
3751  }
3752
3753  void Smlsldx(
3754      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3755    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3756    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3757    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3758    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3759    VIXL_ASSERT(allow_macro_instructions_);
3760    VIXL_ASSERT(OutsideITBlock());
3761    MacroEmissionCheckScope guard(this);
3762    ITScope it_scope(this, &cond);
3763    smlsldx(cond, rdlo, rdhi, rn, rm);
3764  }
3765  void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3766    Smlsldx(al, rdlo, rdhi, rn, rm);
3767  }
3768
3769  void Smmla(
3770      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3771    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3772    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3773    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3774    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3775    VIXL_ASSERT(allow_macro_instructions_);
3776    VIXL_ASSERT(OutsideITBlock());
3777    MacroEmissionCheckScope guard(this);
3778    ITScope it_scope(this, &cond);
3779    smmla(cond, rd, rn, rm, ra);
3780  }
3781  void Smmla(Register rd, Register rn, Register rm, Register ra) {
3782    Smmla(al, rd, rn, rm, ra);
3783  }
3784
3785  void Smmlar(
3786      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3787    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3788    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3789    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3790    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3791    VIXL_ASSERT(allow_macro_instructions_);
3792    VIXL_ASSERT(OutsideITBlock());
3793    MacroEmissionCheckScope guard(this);
3794    ITScope it_scope(this, &cond);
3795    smmlar(cond, rd, rn, rm, ra);
3796  }
3797  void Smmlar(Register rd, Register rn, Register rm, Register ra) {
3798    Smmlar(al, rd, rn, rm, ra);
3799  }
3800
3801  void Smmls(
3802      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3803    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3805    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3806    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3807    VIXL_ASSERT(allow_macro_instructions_);
3808    VIXL_ASSERT(OutsideITBlock());
3809    MacroEmissionCheckScope guard(this);
3810    ITScope it_scope(this, &cond);
3811    smmls(cond, rd, rn, rm, ra);
3812  }
3813  void Smmls(Register rd, Register rn, Register rm, Register ra) {
3814    Smmls(al, rd, rn, rm, ra);
3815  }
3816
3817  void Smmlsr(
3818      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3820    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3821    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3822    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3823    VIXL_ASSERT(allow_macro_instructions_);
3824    VIXL_ASSERT(OutsideITBlock());
3825    MacroEmissionCheckScope guard(this);
3826    ITScope it_scope(this, &cond);
3827    smmlsr(cond, rd, rn, rm, ra);
3828  }
3829  void Smmlsr(Register rd, Register rn, Register rm, Register ra) {
3830    Smmlsr(al, rd, rn, rm, ra);
3831  }
3832
3833  void Smmul(Condition cond, Register rd, Register rn, Register rm) {
3834    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3835    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3836    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3837    VIXL_ASSERT(allow_macro_instructions_);
3838    VIXL_ASSERT(OutsideITBlock());
3839    MacroEmissionCheckScope guard(this);
3840    ITScope it_scope(this, &cond);
3841    smmul(cond, rd, rn, rm);
3842  }
3843  void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); }
3844
3845  void Smmulr(Condition cond, Register rd, Register rn, Register rm) {
3846    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3847    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3848    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3849    VIXL_ASSERT(allow_macro_instructions_);
3850    VIXL_ASSERT(OutsideITBlock());
3851    MacroEmissionCheckScope guard(this);
3852    ITScope it_scope(this, &cond);
3853    smmulr(cond, rd, rn, rm);
3854  }
3855  void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); }
3856
3857  void Smuad(Condition cond, Register rd, Register rn, Register rm) {
3858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3861    VIXL_ASSERT(allow_macro_instructions_);
3862    VIXL_ASSERT(OutsideITBlock());
3863    MacroEmissionCheckScope guard(this);
3864    ITScope it_scope(this, &cond);
3865    smuad(cond, rd, rn, rm);
3866  }
3867  void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); }
3868
3869  void Smuadx(Condition cond, Register rd, Register rn, Register rm) {
3870    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3871    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3872    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3873    VIXL_ASSERT(allow_macro_instructions_);
3874    VIXL_ASSERT(OutsideITBlock());
3875    MacroEmissionCheckScope guard(this);
3876    ITScope it_scope(this, &cond);
3877    smuadx(cond, rd, rn, rm);
3878  }
3879  void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); }
3880
3881  void Smulbb(Condition cond, Register rd, Register rn, Register rm) {
3882    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3883    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3884    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3885    VIXL_ASSERT(allow_macro_instructions_);
3886    VIXL_ASSERT(OutsideITBlock());
3887    MacroEmissionCheckScope guard(this);
3888    ITScope it_scope(this, &cond);
3889    smulbb(cond, rd, rn, rm);
3890  }
3891  void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); }
3892
3893  void Smulbt(Condition cond, Register rd, Register rn, Register rm) {
3894    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3895    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3896    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3897    VIXL_ASSERT(allow_macro_instructions_);
3898    VIXL_ASSERT(OutsideITBlock());
3899    MacroEmissionCheckScope guard(this);
3900    ITScope it_scope(this, &cond);
3901    smulbt(cond, rd, rn, rm);
3902  }
3903  void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); }
3904
3905  void Smull(
3906      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3907    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3909    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3910    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3911    VIXL_ASSERT(allow_macro_instructions_);
3912    VIXL_ASSERT(OutsideITBlock());
3913    MacroEmissionCheckScope guard(this);
3914    ITScope it_scope(this, &cond);
3915    smull(cond, rdlo, rdhi, rn, rm);
3916  }
3917  void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
3918    Smull(al, rdlo, rdhi, rn, rm);
3919  }
3920  void Smull(FlagsUpdate flags,
3921             Condition cond,
3922             Register rdlo,
3923             Register rdhi,
3924             Register rn,
3925             Register rm) {
3926    switch (flags) {
3927      case LeaveFlags:
3928        Smull(cond, rdlo, rdhi, rn, rm);
3929        break;
3930      case SetFlags:
3931        Smulls(cond, rdlo, rdhi, rn, rm);
3932        break;
3933      case DontCare:
3934        Smull(cond, rdlo, rdhi, rn, rm);
3935        break;
3936    }
3937  }
3938  void Smull(FlagsUpdate flags,
3939             Register rdlo,
3940             Register rdhi,
3941             Register rn,
3942             Register rm) {
3943    Smull(flags, al, rdlo, rdhi, rn, rm);
3944  }
3945
3946  void Smulls(
3947      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3948    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3952    VIXL_ASSERT(allow_macro_instructions_);
3953    VIXL_ASSERT(OutsideITBlock());
3954    MacroEmissionCheckScope guard(this);
3955    ITScope it_scope(this, &cond);
3956    smulls(cond, rdlo, rdhi, rn, rm);
3957  }
3958  void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
3959    Smulls(al, rdlo, rdhi, rn, rm);
3960  }
3961
3962  void Smultb(Condition cond, Register rd, Register rn, Register rm) {
3963    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3965    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3966    VIXL_ASSERT(allow_macro_instructions_);
3967    VIXL_ASSERT(OutsideITBlock());
3968    MacroEmissionCheckScope guard(this);
3969    ITScope it_scope(this, &cond);
3970    smultb(cond, rd, rn, rm);
3971  }
3972  void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); }
3973
3974  void Smultt(Condition cond, Register rd, Register rn, Register rm) {
3975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3976    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3977    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3978    VIXL_ASSERT(allow_macro_instructions_);
3979    VIXL_ASSERT(OutsideITBlock());
3980    MacroEmissionCheckScope guard(this);
3981    ITScope it_scope(this, &cond);
3982    smultt(cond, rd, rn, rm);
3983  }
3984  void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); }
3985
3986  void Smulwb(Condition cond, Register rd, Register rn, Register rm) {
3987    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3988    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3989    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3990    VIXL_ASSERT(allow_macro_instructions_);
3991    VIXL_ASSERT(OutsideITBlock());
3992    MacroEmissionCheckScope guard(this);
3993    ITScope it_scope(this, &cond);
3994    smulwb(cond, rd, rn, rm);
3995  }
3996  void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); }
3997
3998  void Smulwt(Condition cond, Register rd, Register rn, Register rm) {
3999    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4000    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4001    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4002    VIXL_ASSERT(allow_macro_instructions_);
4003    VIXL_ASSERT(OutsideITBlock());
4004    MacroEmissionCheckScope guard(this);
4005    ITScope it_scope(this, &cond);
4006    smulwt(cond, rd, rn, rm);
4007  }
4008  void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); }
4009
4010  void Smusd(Condition cond, Register rd, Register rn, Register rm) {
4011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4012    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4013    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4014    VIXL_ASSERT(allow_macro_instructions_);
4015    VIXL_ASSERT(OutsideITBlock());
4016    MacroEmissionCheckScope guard(this);
4017    ITScope it_scope(this, &cond);
4018    smusd(cond, rd, rn, rm);
4019  }
4020  void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); }
4021
4022  void Smusdx(Condition cond, Register rd, Register rn, Register rm) {
4023    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4024    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4025    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4026    VIXL_ASSERT(allow_macro_instructions_);
4027    VIXL_ASSERT(OutsideITBlock());
4028    MacroEmissionCheckScope guard(this);
4029    ITScope it_scope(this, &cond);
4030    smusdx(cond, rd, rn, rm);
4031  }
4032  void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); }
4033
4034  void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
4035    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4036    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4037    VIXL_ASSERT(allow_macro_instructions_);
4038    VIXL_ASSERT(OutsideITBlock());
4039    MacroEmissionCheckScope guard(this);
4040    ITScope it_scope(this, &cond);
4041    ssat(cond, rd, imm, operand);
4042  }
4043  void Ssat(Register rd, uint32_t imm, const Operand& operand) {
4044    Ssat(al, rd, imm, operand);
4045  }
4046
4047  void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) {
4048    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4049    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4050    VIXL_ASSERT(allow_macro_instructions_);
4051    VIXL_ASSERT(OutsideITBlock());
4052    MacroEmissionCheckScope guard(this);
4053    ITScope it_scope(this, &cond);
4054    ssat16(cond, rd, imm, rn);
4055  }
4056  void Ssat16(Register rd, uint32_t imm, Register rn) {
4057    Ssat16(al, rd, imm, rn);
4058  }
4059
4060  void Ssax(Condition cond, Register rd, Register rn, Register rm) {
4061    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4062    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4064    VIXL_ASSERT(allow_macro_instructions_);
4065    VIXL_ASSERT(OutsideITBlock());
4066    MacroEmissionCheckScope guard(this);
4067    ITScope it_scope(this, &cond);
4068    ssax(cond, rd, rn, rm);
4069  }
4070  void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); }
4071
4072  void Ssub16(Condition cond, Register rd, Register rn, Register rm) {
4073    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4074    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4076    VIXL_ASSERT(allow_macro_instructions_);
4077    VIXL_ASSERT(OutsideITBlock());
4078    MacroEmissionCheckScope guard(this);
4079    ITScope it_scope(this, &cond);
4080    ssub16(cond, rd, rn, rm);
4081  }
4082  void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); }
4083
4084  void Ssub8(Condition cond, Register rd, Register rn, Register rm) {
4085    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4086    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4087    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4088    VIXL_ASSERT(allow_macro_instructions_);
4089    VIXL_ASSERT(OutsideITBlock());
4090    MacroEmissionCheckScope guard(this);
4091    ITScope it_scope(this, &cond);
4092    ssub8(cond, rd, rn, rm);
4093  }
4094  void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); }
4095
4096  void Stl(Condition cond, Register rt, const MemOperand& operand) {
4097    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4098    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4099    VIXL_ASSERT(allow_macro_instructions_);
4100    VIXL_ASSERT(OutsideITBlock());
4101    MacroEmissionCheckScope guard(this);
4102    ITScope it_scope(this, &cond);
4103    stl(cond, rt, operand);
4104  }
4105  void Stl(Register rt, const MemOperand& operand) { Stl(al, rt, operand); }
4106
4107  void Stlb(Condition cond, Register rt, const MemOperand& operand) {
4108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4109    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4110    VIXL_ASSERT(allow_macro_instructions_);
4111    VIXL_ASSERT(OutsideITBlock());
4112    MacroEmissionCheckScope guard(this);
4113    ITScope it_scope(this, &cond);
4114    stlb(cond, rt, operand);
4115  }
4116  void Stlb(Register rt, const MemOperand& operand) { Stlb(al, rt, operand); }
4117
4118  void Stlex(Condition cond,
4119             Register rd,
4120             Register rt,
4121             const MemOperand& operand) {
4122    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4123    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4124    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4125    VIXL_ASSERT(allow_macro_instructions_);
4126    VIXL_ASSERT(OutsideITBlock());
4127    MacroEmissionCheckScope guard(this);
4128    ITScope it_scope(this, &cond);
4129    stlex(cond, rd, rt, operand);
4130  }
4131  void Stlex(Register rd, Register rt, const MemOperand& operand) {
4132    Stlex(al, rd, rt, operand);
4133  }
4134
4135  void Stlexb(Condition cond,
4136              Register rd,
4137              Register rt,
4138              const MemOperand& operand) {
4139    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4140    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4141    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4142    VIXL_ASSERT(allow_macro_instructions_);
4143    VIXL_ASSERT(OutsideITBlock());
4144    MacroEmissionCheckScope guard(this);
4145    ITScope it_scope(this, &cond);
4146    stlexb(cond, rd, rt, operand);
4147  }
4148  void Stlexb(Register rd, Register rt, const MemOperand& operand) {
4149    Stlexb(al, rd, rt, operand);
4150  }
4151
4152  void Stlexd(Condition cond,
4153              Register rd,
4154              Register rt,
4155              Register rt2,
4156              const MemOperand& operand) {
4157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4158    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4159    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4160    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4161    VIXL_ASSERT(allow_macro_instructions_);
4162    VIXL_ASSERT(OutsideITBlock());
4163    MacroEmissionCheckScope guard(this);
4164    ITScope it_scope(this, &cond);
4165    stlexd(cond, rd, rt, rt2, operand);
4166  }
4167  void Stlexd(Register rd,
4168              Register rt,
4169              Register rt2,
4170              const MemOperand& operand) {
4171    Stlexd(al, rd, rt, rt2, operand);
4172  }
4173
4174  void Stlexh(Condition cond,
4175              Register rd,
4176              Register rt,
4177              const MemOperand& operand) {
4178    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4179    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4180    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4181    VIXL_ASSERT(allow_macro_instructions_);
4182    VIXL_ASSERT(OutsideITBlock());
4183    MacroEmissionCheckScope guard(this);
4184    ITScope it_scope(this, &cond);
4185    stlexh(cond, rd, rt, operand);
4186  }
4187  void Stlexh(Register rd, Register rt, const MemOperand& operand) {
4188    Stlexh(al, rd, rt, operand);
4189  }
4190
4191  void Stlh(Condition cond, Register rt, const MemOperand& operand) {
4192    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4193    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4194    VIXL_ASSERT(allow_macro_instructions_);
4195    VIXL_ASSERT(OutsideITBlock());
4196    MacroEmissionCheckScope guard(this);
4197    ITScope it_scope(this, &cond);
4198    stlh(cond, rt, operand);
4199  }
4200  void Stlh(Register rt, const MemOperand& operand) { Stlh(al, rt, operand); }
4201
4202  void Stm(Condition cond,
4203           Register rn,
4204           WriteBack write_back,
4205           RegisterList registers) {
4206    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4207    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4208    VIXL_ASSERT(allow_macro_instructions_);
4209    VIXL_ASSERT(OutsideITBlock());
4210    MacroEmissionCheckScope guard(this);
4211    ITScope it_scope(this, &cond);
4212    stm(cond, rn, write_back, registers);
4213  }
4214  void Stm(Register rn, WriteBack write_back, RegisterList registers) {
4215    Stm(al, rn, write_back, registers);
4216  }
4217
4218  void Stmda(Condition cond,
4219             Register rn,
4220             WriteBack write_back,
4221             RegisterList registers) {
4222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4223    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4224    VIXL_ASSERT(allow_macro_instructions_);
4225    VIXL_ASSERT(OutsideITBlock());
4226    MacroEmissionCheckScope guard(this);
4227    ITScope it_scope(this, &cond);
4228    stmda(cond, rn, write_back, registers);
4229  }
4230  void Stmda(Register rn, WriteBack write_back, RegisterList registers) {
4231    Stmda(al, rn, write_back, registers);
4232  }
4233
4234  void Stmdb(Condition cond,
4235             Register rn,
4236             WriteBack write_back,
4237             RegisterList registers) {
4238    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4239    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4240    VIXL_ASSERT(allow_macro_instructions_);
4241    VIXL_ASSERT(OutsideITBlock());
4242    MacroEmissionCheckScope guard(this);
4243    ITScope it_scope(this, &cond);
4244    stmdb(cond, rn, write_back, registers);
4245  }
4246  void Stmdb(Register rn, WriteBack write_back, RegisterList registers) {
4247    Stmdb(al, rn, write_back, registers);
4248  }
4249
4250  void Stmea(Condition cond,
4251             Register rn,
4252             WriteBack write_back,
4253             RegisterList registers) {
4254    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4255    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4256    VIXL_ASSERT(allow_macro_instructions_);
4257    VIXL_ASSERT(OutsideITBlock());
4258    MacroEmissionCheckScope guard(this);
4259    ITScope it_scope(this, &cond);
4260    stmea(cond, rn, write_back, registers);
4261  }
4262  void Stmea(Register rn, WriteBack write_back, RegisterList registers) {
4263    Stmea(al, rn, write_back, registers);
4264  }
4265
4266  void Stmed(Condition cond,
4267             Register rn,
4268             WriteBack write_back,
4269             RegisterList registers) {
4270    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4271    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4272    VIXL_ASSERT(allow_macro_instructions_);
4273    VIXL_ASSERT(OutsideITBlock());
4274    MacroEmissionCheckScope guard(this);
4275    ITScope it_scope(this, &cond);
4276    stmed(cond, rn, write_back, registers);
4277  }
4278  void Stmed(Register rn, WriteBack write_back, RegisterList registers) {
4279    Stmed(al, rn, write_back, registers);
4280  }
4281
4282  void Stmfa(Condition cond,
4283             Register rn,
4284             WriteBack write_back,
4285             RegisterList registers) {
4286    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4287    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4288    VIXL_ASSERT(allow_macro_instructions_);
4289    VIXL_ASSERT(OutsideITBlock());
4290    MacroEmissionCheckScope guard(this);
4291    ITScope it_scope(this, &cond);
4292    stmfa(cond, rn, write_back, registers);
4293  }
4294  void Stmfa(Register rn, WriteBack write_back, RegisterList registers) {
4295    Stmfa(al, rn, write_back, registers);
4296  }
4297
4298  void Stmfd(Condition cond,
4299             Register rn,
4300             WriteBack write_back,
4301             RegisterList registers) {
4302    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4303    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4304    VIXL_ASSERT(allow_macro_instructions_);
4305    VIXL_ASSERT(OutsideITBlock());
4306    MacroEmissionCheckScope guard(this);
4307    ITScope it_scope(this, &cond);
4308    stmfd(cond, rn, write_back, registers);
4309  }
4310  void Stmfd(Register rn, WriteBack write_back, RegisterList registers) {
4311    Stmfd(al, rn, write_back, registers);
4312  }
4313
4314  void Stmib(Condition cond,
4315             Register rn,
4316             WriteBack write_back,
4317             RegisterList registers) {
4318    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4319    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4320    VIXL_ASSERT(allow_macro_instructions_);
4321    VIXL_ASSERT(OutsideITBlock());
4322    MacroEmissionCheckScope guard(this);
4323    ITScope it_scope(this, &cond);
4324    stmib(cond, rn, write_back, registers);
4325  }
4326  void Stmib(Register rn, WriteBack write_back, RegisterList registers) {
4327    Stmib(al, rn, write_back, registers);
4328  }
4329
4330  void Str(Condition cond, Register rt, const MemOperand& operand) {
4331    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4332    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4333    VIXL_ASSERT(allow_macro_instructions_);
4334    VIXL_ASSERT(OutsideITBlock());
4335    MacroEmissionCheckScope guard(this);
4336    bool can_use_it =
4337        // STR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4338        (operand.IsImmediate() && rt.IsLow() &&
4339         operand.GetBaseRegister().IsLow() &&
4340         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
4341         (operand.GetAddrMode() == Offset)) ||
4342        // STR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
4343        (operand.IsImmediate() && rt.IsLow() &&
4344         operand.GetBaseRegister().IsSP() &&
4345         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
4346         (operand.GetAddrMode() == Offset)) ||
4347        // STR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4348        (operand.IsPlainRegister() && rt.IsLow() &&
4349         operand.GetBaseRegister().IsLow() &&
4350         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4351         (operand.GetAddrMode() == Offset));
4352    ITScope it_scope(this, &cond, can_use_it);
4353    str(cond, rt, operand);
4354  }
4355  void Str(Register rt, const MemOperand& operand) { Str(al, rt, operand); }
4356
4357  void Strb(Condition cond, Register rt, const MemOperand& operand) {
4358    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4359    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4360    VIXL_ASSERT(allow_macro_instructions_);
4361    VIXL_ASSERT(OutsideITBlock());
4362    MacroEmissionCheckScope guard(this);
4363    bool can_use_it =
4364        // STRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4365        (operand.IsImmediate() && rt.IsLow() &&
4366         operand.GetBaseRegister().IsLow() &&
4367         operand.IsOffsetImmediateWithinRange(0, 31) &&
4368         (operand.GetAddrMode() == Offset)) ||
4369        // STRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4370        (operand.IsPlainRegister() && rt.IsLow() &&
4371         operand.GetBaseRegister().IsLow() &&
4372         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4373         (operand.GetAddrMode() == Offset));
4374    ITScope it_scope(this, &cond, can_use_it);
4375    strb(cond, rt, operand);
4376  }
4377  void Strb(Register rt, const MemOperand& operand) { Strb(al, rt, operand); }
4378
4379  void Strd(Condition cond,
4380            Register rt,
4381            Register rt2,
4382            const MemOperand& operand) {
4383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4384    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4385    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4386    VIXL_ASSERT(allow_macro_instructions_);
4387    VIXL_ASSERT(OutsideITBlock());
4388    MacroEmissionCheckScope guard(this);
4389    ITScope it_scope(this, &cond);
4390    strd(cond, rt, rt2, operand);
4391  }
4392  void Strd(Register rt, Register rt2, const MemOperand& operand) {
4393    Strd(al, rt, rt2, operand);
4394  }
4395
4396  void Strex(Condition cond,
4397             Register rd,
4398             Register rt,
4399             const MemOperand& operand) {
4400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4401    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4402    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4403    VIXL_ASSERT(allow_macro_instructions_);
4404    VIXL_ASSERT(OutsideITBlock());
4405    MacroEmissionCheckScope guard(this);
4406    ITScope it_scope(this, &cond);
4407    strex(cond, rd, rt, operand);
4408  }
4409  void Strex(Register rd, Register rt, const MemOperand& operand) {
4410    Strex(al, rd, rt, operand);
4411  }
4412
4413  void Strexb(Condition cond,
4414              Register rd,
4415              Register rt,
4416              const MemOperand& operand) {
4417    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4418    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4419    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4420    VIXL_ASSERT(allow_macro_instructions_);
4421    VIXL_ASSERT(OutsideITBlock());
4422    MacroEmissionCheckScope guard(this);
4423    ITScope it_scope(this, &cond);
4424    strexb(cond, rd, rt, operand);
4425  }
4426  void Strexb(Register rd, Register rt, const MemOperand& operand) {
4427    Strexb(al, rd, rt, operand);
4428  }
4429
4430  void Strexd(Condition cond,
4431              Register rd,
4432              Register rt,
4433              Register rt2,
4434              const MemOperand& operand) {
4435    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4436    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4437    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4438    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4439    VIXL_ASSERT(allow_macro_instructions_);
4440    VIXL_ASSERT(OutsideITBlock());
4441    MacroEmissionCheckScope guard(this);
4442    ITScope it_scope(this, &cond);
4443    strexd(cond, rd, rt, rt2, operand);
4444  }
4445  void Strexd(Register rd,
4446              Register rt,
4447              Register rt2,
4448              const MemOperand& operand) {
4449    Strexd(al, rd, rt, rt2, operand);
4450  }
4451
4452  void Strexh(Condition cond,
4453              Register rd,
4454              Register rt,
4455              const MemOperand& operand) {
4456    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4457    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4458    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4459    VIXL_ASSERT(allow_macro_instructions_);
4460    VIXL_ASSERT(OutsideITBlock());
4461    MacroEmissionCheckScope guard(this);
4462    ITScope it_scope(this, &cond);
4463    strexh(cond, rd, rt, operand);
4464  }
4465  void Strexh(Register rd, Register rt, const MemOperand& operand) {
4466    Strexh(al, rd, rt, operand);
4467  }
4468
4469  void Strh(Condition cond, Register rt, const MemOperand& operand) {
4470    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4471    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4472    VIXL_ASSERT(allow_macro_instructions_);
4473    VIXL_ASSERT(OutsideITBlock());
4474    MacroEmissionCheckScope guard(this);
4475    bool can_use_it =
4476        // STRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4477        (operand.IsImmediate() && rt.IsLow() &&
4478         operand.GetBaseRegister().IsLow() &&
4479         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
4480         (operand.GetAddrMode() == Offset)) ||
4481        // STRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4482        (operand.IsPlainRegister() && rt.IsLow() &&
4483         operand.GetBaseRegister().IsLow() &&
4484         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4485         (operand.GetAddrMode() == Offset));
4486    ITScope it_scope(this, &cond, can_use_it);
4487    strh(cond, rt, operand);
4488  }
4489  void Strh(Register rt, const MemOperand& operand) { Strh(al, rt, operand); }
4490
4491  void Sub(Condition cond, Register rd, Register rn, const Operand& operand) {
4492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4493    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4494    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4495    VIXL_ASSERT(allow_macro_instructions_);
4496    VIXL_ASSERT(OutsideITBlock());
4497    MacroEmissionCheckScope guard(this);
4498    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
4499      uint32_t immediate = operand.GetImmediate();
4500      if (immediate == 0) {
4501        return;
4502      }
4503    }
4504    bool can_use_it =
4505        // SUB<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
4506        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
4507         rd.IsLow()) ||
4508        // SUB<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
4509        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
4510         rd.IsLow() && rn.Is(rd)) ||
4511        // SUB<c>{<q>} <Rd>, <Rn>, <Rm>
4512        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4513         operand.GetBaseRegister().IsLow());
4514    ITScope it_scope(this, &cond, can_use_it);
4515    sub(cond, rd, rn, operand);
4516  }
4517  void Sub(Register rd, Register rn, const Operand& operand) {
4518    Sub(al, rd, rn, operand);
4519  }
4520  void Sub(FlagsUpdate flags,
4521           Condition cond,
4522           Register rd,
4523           Register rn,
4524           const Operand& operand) {
4525    switch (flags) {
4526      case LeaveFlags:
4527        Sub(cond, rd, rn, operand);
4528        break;
4529      case SetFlags:
4530        Subs(cond, rd, rn, operand);
4531        break;
4532      case DontCare:
4533        bool can_be_16bit_encoded =
4534            IsUsingT32() && cond.Is(al) &&
4535            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4536              operand.GetBaseRegister().IsLow()) ||
4537             (operand.IsImmediate() &&
4538              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
4539               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
4540        if (can_be_16bit_encoded) {
4541          Subs(cond, rd, rn, operand);
4542        } else {
4543          Sub(cond, rd, rn, operand);
4544        }
4545        break;
4546    }
4547  }
4548  void Sub(FlagsUpdate flags,
4549           Register rd,
4550           Register rn,
4551           const Operand& operand) {
4552    Sub(flags, al, rd, rn, operand);
4553  }
4554
4555  void Subs(Condition cond, Register rd, Register rn, const Operand& operand) {
4556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4557    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4558    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4559    VIXL_ASSERT(allow_macro_instructions_);
4560    VIXL_ASSERT(OutsideITBlock());
4561    MacroEmissionCheckScope guard(this);
4562    ITScope it_scope(this, &cond);
4563    subs(cond, rd, rn, operand);
4564  }
4565  void Subs(Register rd, Register rn, const Operand& operand) {
4566    Subs(al, rd, rn, operand);
4567  }
4568
4569  void Svc(Condition cond, uint32_t imm) {
4570    VIXL_ASSERT(allow_macro_instructions_);
4571    VIXL_ASSERT(OutsideITBlock());
4572    MacroEmissionCheckScope guard(this);
4573    ITScope it_scope(this, &cond);
4574    svc(cond, imm);
4575  }
4576  void Svc(uint32_t imm) { Svc(al, imm); }
4577
4578  void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
4579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4581    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4582    VIXL_ASSERT(allow_macro_instructions_);
4583    VIXL_ASSERT(OutsideITBlock());
4584    MacroEmissionCheckScope guard(this);
4585    ITScope it_scope(this, &cond);
4586    sxtab(cond, rd, rn, operand);
4587  }
4588  void Sxtab(Register rd, Register rn, const Operand& operand) {
4589    Sxtab(al, rd, rn, operand);
4590  }
4591
4592  void Sxtab16(Condition cond,
4593               Register rd,
4594               Register rn,
4595               const Operand& operand) {
4596    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4598    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4599    VIXL_ASSERT(allow_macro_instructions_);
4600    VIXL_ASSERT(OutsideITBlock());
4601    MacroEmissionCheckScope guard(this);
4602    ITScope it_scope(this, &cond);
4603    sxtab16(cond, rd, rn, operand);
4604  }
4605  void Sxtab16(Register rd, Register rn, const Operand& operand) {
4606    Sxtab16(al, rd, rn, operand);
4607  }
4608
4609  void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
4610    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4611    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4612    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4613    VIXL_ASSERT(allow_macro_instructions_);
4614    VIXL_ASSERT(OutsideITBlock());
4615    MacroEmissionCheckScope guard(this);
4616    ITScope it_scope(this, &cond);
4617    sxtah(cond, rd, rn, operand);
4618  }
4619  void Sxtah(Register rd, Register rn, const Operand& operand) {
4620    Sxtah(al, rd, rn, operand);
4621  }
4622
4623  void Sxtb(Condition cond, Register rd, const Operand& operand) {
4624    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4625    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4626    VIXL_ASSERT(allow_macro_instructions_);
4627    VIXL_ASSERT(OutsideITBlock());
4628    MacroEmissionCheckScope guard(this);
4629    ITScope it_scope(this, &cond);
4630    sxtb(cond, rd, operand);
4631  }
4632  void Sxtb(Register rd, const Operand& operand) { Sxtb(al, rd, operand); }
4633
4634  void Sxtb16(Condition cond, Register rd, const Operand& operand) {
4635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4636    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4637    VIXL_ASSERT(allow_macro_instructions_);
4638    VIXL_ASSERT(OutsideITBlock());
4639    MacroEmissionCheckScope guard(this);
4640    ITScope it_scope(this, &cond);
4641    sxtb16(cond, rd, operand);
4642  }
4643  void Sxtb16(Register rd, const Operand& operand) { Sxtb16(al, rd, operand); }
4644
4645  void Sxth(Condition cond, Register rd, const Operand& operand) {
4646    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4647    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4648    VIXL_ASSERT(allow_macro_instructions_);
4649    VIXL_ASSERT(OutsideITBlock());
4650    MacroEmissionCheckScope guard(this);
4651    ITScope it_scope(this, &cond);
4652    sxth(cond, rd, operand);
4653  }
4654  void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); }
4655
4656  void Teq(Condition cond, Register rn, const Operand& operand) {
4657    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4658    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4659    VIXL_ASSERT(allow_macro_instructions_);
4660    VIXL_ASSERT(OutsideITBlock());
4661    MacroEmissionCheckScope guard(this);
4662    ITScope it_scope(this, &cond);
4663    teq(cond, rn, operand);
4664  }
4665  void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); }
4666
4667  void Tst(Condition cond, Register rn, const Operand& operand) {
4668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4669    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4670    VIXL_ASSERT(allow_macro_instructions_);
4671    VIXL_ASSERT(OutsideITBlock());
4672    MacroEmissionCheckScope guard(this);
4673    bool can_use_it =
4674        // TST{<c>}{<q>} <Rn>, <Rm> ; T1
4675        operand.IsPlainRegister() && rn.IsLow() &&
4676        operand.GetBaseRegister().IsLow();
4677    ITScope it_scope(this, &cond, can_use_it);
4678    tst(cond, rn, operand);
4679  }
4680  void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); }
4681
4682  void Uadd16(Condition cond, Register rd, Register rn, Register rm) {
4683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4686    VIXL_ASSERT(allow_macro_instructions_);
4687    VIXL_ASSERT(OutsideITBlock());
4688    MacroEmissionCheckScope guard(this);
4689    ITScope it_scope(this, &cond);
4690    uadd16(cond, rd, rn, rm);
4691  }
4692  void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); }
4693
4694  void Uadd8(Condition cond, Register rd, Register rn, Register rm) {
4695    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4696    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4698    VIXL_ASSERT(allow_macro_instructions_);
4699    VIXL_ASSERT(OutsideITBlock());
4700    MacroEmissionCheckScope guard(this);
4701    ITScope it_scope(this, &cond);
4702    uadd8(cond, rd, rn, rm);
4703  }
4704  void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); }
4705
4706  void Uasx(Condition cond, Register rd, Register rn, Register rm) {
4707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4708    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4709    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4710    VIXL_ASSERT(allow_macro_instructions_);
4711    VIXL_ASSERT(OutsideITBlock());
4712    MacroEmissionCheckScope guard(this);
4713    ITScope it_scope(this, &cond);
4714    uasx(cond, rd, rn, rm);
4715  }
4716  void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); }
4717
4718  void Ubfx(Condition cond,
4719            Register rd,
4720            Register rn,
4721            uint32_t lsb,
4722            const Operand& operand) {
4723    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4725    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4726    VIXL_ASSERT(allow_macro_instructions_);
4727    VIXL_ASSERT(OutsideITBlock());
4728    MacroEmissionCheckScope guard(this);
4729    ITScope it_scope(this, &cond);
4730    ubfx(cond, rd, rn, lsb, operand);
4731  }
4732  void Ubfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
4733    Ubfx(al, rd, rn, lsb, operand);
4734  }
4735
4736  void Udf(Condition cond, uint32_t imm) {
4737    VIXL_ASSERT(allow_macro_instructions_);
4738    VIXL_ASSERT(OutsideITBlock());
4739    MacroEmissionCheckScope guard(this);
4740    ITScope it_scope(this, &cond);
4741    udf(cond, imm);
4742  }
4743  void Udf(uint32_t imm) { Udf(al, imm); }
4744
4745  void Udiv(Condition cond, Register rd, Register rn, Register rm) {
4746    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4748    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4749    VIXL_ASSERT(allow_macro_instructions_);
4750    VIXL_ASSERT(OutsideITBlock());
4751    MacroEmissionCheckScope guard(this);
4752    ITScope it_scope(this, &cond);
4753    udiv(cond, rd, rn, rm);
4754  }
4755  void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); }
4756
4757  void Uhadd16(Condition cond, Register rd, Register rn, Register rm) {
4758    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4759    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4760    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4761    VIXL_ASSERT(allow_macro_instructions_);
4762    VIXL_ASSERT(OutsideITBlock());
4763    MacroEmissionCheckScope guard(this);
4764    ITScope it_scope(this, &cond);
4765    uhadd16(cond, rd, rn, rm);
4766  }
4767  void Uhadd16(Register rd, Register rn, Register rm) {
4768    Uhadd16(al, rd, rn, rm);
4769  }
4770
4771  void Uhadd8(Condition cond, Register rd, Register rn, Register rm) {
4772    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4773    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4774    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4775    VIXL_ASSERT(allow_macro_instructions_);
4776    VIXL_ASSERT(OutsideITBlock());
4777    MacroEmissionCheckScope guard(this);
4778    ITScope it_scope(this, &cond);
4779    uhadd8(cond, rd, rn, rm);
4780  }
4781  void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); }
4782
4783  void Uhasx(Condition cond, Register rd, Register rn, Register rm) {
4784    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4785    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4787    VIXL_ASSERT(allow_macro_instructions_);
4788    VIXL_ASSERT(OutsideITBlock());
4789    MacroEmissionCheckScope guard(this);
4790    ITScope it_scope(this, &cond);
4791    uhasx(cond, rd, rn, rm);
4792  }
4793  void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); }
4794
4795  void Uhsax(Condition cond, Register rd, Register rn, Register rm) {
4796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4799    VIXL_ASSERT(allow_macro_instructions_);
4800    VIXL_ASSERT(OutsideITBlock());
4801    MacroEmissionCheckScope guard(this);
4802    ITScope it_scope(this, &cond);
4803    uhsax(cond, rd, rn, rm);
4804  }
4805  void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); }
4806
4807  void Uhsub16(Condition cond, Register rd, Register rn, Register rm) {
4808    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4809    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4810    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4811    VIXL_ASSERT(allow_macro_instructions_);
4812    VIXL_ASSERT(OutsideITBlock());
4813    MacroEmissionCheckScope guard(this);
4814    ITScope it_scope(this, &cond);
4815    uhsub16(cond, rd, rn, rm);
4816  }
4817  void Uhsub16(Register rd, Register rn, Register rm) {
4818    Uhsub16(al, rd, rn, rm);
4819  }
4820
4821  void Uhsub8(Condition cond, Register rd, Register rn, Register rm) {
4822    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4823    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4824    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4825    VIXL_ASSERT(allow_macro_instructions_);
4826    VIXL_ASSERT(OutsideITBlock());
4827    MacroEmissionCheckScope guard(this);
4828    ITScope it_scope(this, &cond);
4829    uhsub8(cond, rd, rn, rm);
4830  }
4831  void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); }
4832
4833  void Umaal(
4834      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4835    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4836    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4837    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4838    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4839    VIXL_ASSERT(allow_macro_instructions_);
4840    VIXL_ASSERT(OutsideITBlock());
4841    MacroEmissionCheckScope guard(this);
4842    ITScope it_scope(this, &cond);
4843    umaal(cond, rdlo, rdhi, rn, rm);
4844  }
4845  void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
4846    Umaal(al, rdlo, rdhi, rn, rm);
4847  }
4848
4849  void Umlal(
4850      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4851    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4852    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4853    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4855    VIXL_ASSERT(allow_macro_instructions_);
4856    VIXL_ASSERT(OutsideITBlock());
4857    MacroEmissionCheckScope guard(this);
4858    ITScope it_scope(this, &cond);
4859    umlal(cond, rdlo, rdhi, rn, rm);
4860  }
4861  void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
4862    Umlal(al, rdlo, rdhi, rn, rm);
4863  }
4864  void Umlal(FlagsUpdate flags,
4865             Condition cond,
4866             Register rdlo,
4867             Register rdhi,
4868             Register rn,
4869             Register rm) {
4870    switch (flags) {
4871      case LeaveFlags:
4872        Umlal(cond, rdlo, rdhi, rn, rm);
4873        break;
4874      case SetFlags:
4875        Umlals(cond, rdlo, rdhi, rn, rm);
4876        break;
4877      case DontCare:
4878        Umlal(cond, rdlo, rdhi, rn, rm);
4879        break;
4880    }
4881  }
4882  void Umlal(FlagsUpdate flags,
4883             Register rdlo,
4884             Register rdhi,
4885             Register rn,
4886             Register rm) {
4887    Umlal(flags, al, rdlo, rdhi, rn, rm);
4888  }
4889
4890  void Umlals(
4891      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4892    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4893    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4894    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4895    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4896    VIXL_ASSERT(allow_macro_instructions_);
4897    VIXL_ASSERT(OutsideITBlock());
4898    MacroEmissionCheckScope guard(this);
4899    ITScope it_scope(this, &cond);
4900    umlals(cond, rdlo, rdhi, rn, rm);
4901  }
4902  void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
4903    Umlals(al, rdlo, rdhi, rn, rm);
4904  }
4905
4906  void Umull(
4907      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4909    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4910    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4911    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4912    VIXL_ASSERT(allow_macro_instructions_);
4913    VIXL_ASSERT(OutsideITBlock());
4914    MacroEmissionCheckScope guard(this);
4915    ITScope it_scope(this, &cond);
4916    umull(cond, rdlo, rdhi, rn, rm);
4917  }
4918  void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
4919    Umull(al, rdlo, rdhi, rn, rm);
4920  }
4921  void Umull(FlagsUpdate flags,
4922             Condition cond,
4923             Register rdlo,
4924             Register rdhi,
4925             Register rn,
4926             Register rm) {
4927    switch (flags) {
4928      case LeaveFlags:
4929        Umull(cond, rdlo, rdhi, rn, rm);
4930        break;
4931      case SetFlags:
4932        Umulls(cond, rdlo, rdhi, rn, rm);
4933        break;
4934      case DontCare:
4935        Umull(cond, rdlo, rdhi, rn, rm);
4936        break;
4937    }
4938  }
4939  void Umull(FlagsUpdate flags,
4940             Register rdlo,
4941             Register rdhi,
4942             Register rn,
4943             Register rm) {
4944    Umull(flags, al, rdlo, rdhi, rn, rm);
4945  }
4946
4947  void Umulls(
4948      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4952    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4953    VIXL_ASSERT(allow_macro_instructions_);
4954    VIXL_ASSERT(OutsideITBlock());
4955    MacroEmissionCheckScope guard(this);
4956    ITScope it_scope(this, &cond);
4957    umulls(cond, rdlo, rdhi, rn, rm);
4958  }
4959  void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4960    Umulls(al, rdlo, rdhi, rn, rm);
4961  }
4962
4963  void Uqadd16(Condition cond, Register rd, Register rn, Register rm) {
4964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4965    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4966    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4967    VIXL_ASSERT(allow_macro_instructions_);
4968    VIXL_ASSERT(OutsideITBlock());
4969    MacroEmissionCheckScope guard(this);
4970    ITScope it_scope(this, &cond);
4971    uqadd16(cond, rd, rn, rm);
4972  }
4973  void Uqadd16(Register rd, Register rn, Register rm) {
4974    Uqadd16(al, rd, rn, rm);
4975  }
4976
4977  void Uqadd8(Condition cond, Register rd, Register rn, Register rm) {
4978    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4979    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4980    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4981    VIXL_ASSERT(allow_macro_instructions_);
4982    VIXL_ASSERT(OutsideITBlock());
4983    MacroEmissionCheckScope guard(this);
4984    ITScope it_scope(this, &cond);
4985    uqadd8(cond, rd, rn, rm);
4986  }
4987  void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); }
4988
4989  void Uqasx(Condition cond, Register rd, Register rn, Register rm) {
4990    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4991    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4992    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4993    VIXL_ASSERT(allow_macro_instructions_);
4994    VIXL_ASSERT(OutsideITBlock());
4995    MacroEmissionCheckScope guard(this);
4996    ITScope it_scope(this, &cond);
4997    uqasx(cond, rd, rn, rm);
4998  }
4999  void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); }
5000
5001  void Uqsax(Condition cond, Register rd, Register rn, Register rm) {
5002    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5003    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5004    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5005    VIXL_ASSERT(allow_macro_instructions_);
5006    VIXL_ASSERT(OutsideITBlock());
5007    MacroEmissionCheckScope guard(this);
5008    ITScope it_scope(this, &cond);
5009    uqsax(cond, rd, rn, rm);
5010  }
5011  void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); }
5012
5013  void Uqsub16(Condition cond, Register rd, Register rn, Register rm) {
5014    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5015    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5016    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5017    VIXL_ASSERT(allow_macro_instructions_);
5018    VIXL_ASSERT(OutsideITBlock());
5019    MacroEmissionCheckScope guard(this);
5020    ITScope it_scope(this, &cond);
5021    uqsub16(cond, rd, rn, rm);
5022  }
5023  void Uqsub16(Register rd, Register rn, Register rm) {
5024    Uqsub16(al, rd, rn, rm);
5025  }
5026
5027  void Uqsub8(Condition cond, Register rd, Register rn, Register rm) {
5028    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5029    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5030    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5031    VIXL_ASSERT(allow_macro_instructions_);
5032    VIXL_ASSERT(OutsideITBlock());
5033    MacroEmissionCheckScope guard(this);
5034    ITScope it_scope(this, &cond);
5035    uqsub8(cond, rd, rn, rm);
5036  }
5037  void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); }
5038
5039  void Usad8(Condition cond, Register rd, Register rn, Register rm) {
5040    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5041    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5042    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5043    VIXL_ASSERT(allow_macro_instructions_);
5044    VIXL_ASSERT(OutsideITBlock());
5045    MacroEmissionCheckScope guard(this);
5046    ITScope it_scope(this, &cond);
5047    usad8(cond, rd, rn, rm);
5048  }
5049  void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); }
5050
5051  void Usada8(
5052      Condition cond, Register rd, Register rn, Register rm, Register ra) {
5053    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5054    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5055    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5056    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
5057    VIXL_ASSERT(allow_macro_instructions_);
5058    VIXL_ASSERT(OutsideITBlock());
5059    MacroEmissionCheckScope guard(this);
5060    ITScope it_scope(this, &cond);
5061    usada8(cond, rd, rn, rm, ra);
5062  }
5063  void Usada8(Register rd, Register rn, Register rm, Register ra) {
5064    Usada8(al, rd, rn, rm, ra);
5065  }
5066
5067  void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
5068    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5069    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5070    VIXL_ASSERT(allow_macro_instructions_);
5071    VIXL_ASSERT(OutsideITBlock());
5072    MacroEmissionCheckScope guard(this);
5073    ITScope it_scope(this, &cond);
5074    usat(cond, rd, imm, operand);
5075  }
5076  void Usat(Register rd, uint32_t imm, const Operand& operand) {
5077    Usat(al, rd, imm, operand);
5078  }
5079
5080  void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) {
5081    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5082    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5083    VIXL_ASSERT(allow_macro_instructions_);
5084    VIXL_ASSERT(OutsideITBlock());
5085    MacroEmissionCheckScope guard(this);
5086    ITScope it_scope(this, &cond);
5087    usat16(cond, rd, imm, rn);
5088  }
5089  void Usat16(Register rd, uint32_t imm, Register rn) {
5090    Usat16(al, rd, imm, rn);
5091  }
5092
5093  void Usax(Condition cond, Register rd, Register rn, Register rm) {
5094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5095    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5096    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5097    VIXL_ASSERT(allow_macro_instructions_);
5098    VIXL_ASSERT(OutsideITBlock());
5099    MacroEmissionCheckScope guard(this);
5100    ITScope it_scope(this, &cond);
5101    usax(cond, rd, rn, rm);
5102  }
5103  void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); }
5104
5105  void Usub16(Condition cond, Register rd, Register rn, Register rm) {
5106    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5107    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5109    VIXL_ASSERT(allow_macro_instructions_);
5110    VIXL_ASSERT(OutsideITBlock());
5111    MacroEmissionCheckScope guard(this);
5112    ITScope it_scope(this, &cond);
5113    usub16(cond, rd, rn, rm);
5114  }
5115  void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); }
5116
5117  void Usub8(Condition cond, Register rd, Register rn, Register rm) {
5118    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5119    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5120    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5121    VIXL_ASSERT(allow_macro_instructions_);
5122    VIXL_ASSERT(OutsideITBlock());
5123    MacroEmissionCheckScope guard(this);
5124    ITScope it_scope(this, &cond);
5125    usub8(cond, rd, rn, rm);
5126  }
5127  void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); }
5128
5129  void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
5130    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5131    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5132    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5133    VIXL_ASSERT(allow_macro_instructions_);
5134    VIXL_ASSERT(OutsideITBlock());
5135    MacroEmissionCheckScope guard(this);
5136    ITScope it_scope(this, &cond);
5137    uxtab(cond, rd, rn, operand);
5138  }
5139  void Uxtab(Register rd, Register rn, const Operand& operand) {
5140    Uxtab(al, rd, rn, operand);
5141  }
5142
5143  void Uxtab16(Condition cond,
5144               Register rd,
5145               Register rn,
5146               const Operand& operand) {
5147    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5148    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5149    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5150    VIXL_ASSERT(allow_macro_instructions_);
5151    VIXL_ASSERT(OutsideITBlock());
5152    MacroEmissionCheckScope guard(this);
5153    ITScope it_scope(this, &cond);
5154    uxtab16(cond, rd, rn, operand);
5155  }
5156  void Uxtab16(Register rd, Register rn, const Operand& operand) {
5157    Uxtab16(al, rd, rn, operand);
5158  }
5159
5160  void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
5161    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5162    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5163    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5164    VIXL_ASSERT(allow_macro_instructions_);
5165    VIXL_ASSERT(OutsideITBlock());
5166    MacroEmissionCheckScope guard(this);
5167    ITScope it_scope(this, &cond);
5168    uxtah(cond, rd, rn, operand);
5169  }
5170  void Uxtah(Register rd, Register rn, const Operand& operand) {
5171    Uxtah(al, rd, rn, operand);
5172  }
5173
5174  void Uxtb(Condition cond, Register rd, const Operand& operand) {
5175    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5176    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5177    VIXL_ASSERT(allow_macro_instructions_);
5178    VIXL_ASSERT(OutsideITBlock());
5179    MacroEmissionCheckScope guard(this);
5180    ITScope it_scope(this, &cond);
5181    uxtb(cond, rd, operand);
5182  }
5183  void Uxtb(Register rd, const Operand& operand) { Uxtb(al, rd, operand); }
5184
5185  void Uxtb16(Condition cond, Register rd, const Operand& operand) {
5186    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5187    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5188    VIXL_ASSERT(allow_macro_instructions_);
5189    VIXL_ASSERT(OutsideITBlock());
5190    MacroEmissionCheckScope guard(this);
5191    ITScope it_scope(this, &cond);
5192    uxtb16(cond, rd, operand);
5193  }
5194  void Uxtb16(Register rd, const Operand& operand) { Uxtb16(al, rd, operand); }
5195
5196  void Uxth(Condition cond, Register rd, const Operand& operand) {
5197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5198    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5199    VIXL_ASSERT(allow_macro_instructions_);
5200    VIXL_ASSERT(OutsideITBlock());
5201    MacroEmissionCheckScope guard(this);
5202    ITScope it_scope(this, &cond);
5203    uxth(cond, rd, operand);
5204  }
5205  void Uxth(Register rd, const Operand& operand) { Uxth(al, rd, operand); }
5206
5207  void Vaba(
5208      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5210    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5212    VIXL_ASSERT(allow_macro_instructions_);
5213    VIXL_ASSERT(OutsideITBlock());
5214    MacroEmissionCheckScope guard(this);
5215    ITScope it_scope(this, &cond);
5216    vaba(cond, dt, rd, rn, rm);
5217  }
5218  void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5219    Vaba(al, dt, rd, rn, rm);
5220  }
5221
5222  void Vaba(
5223      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5224    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5225    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5226    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5227    VIXL_ASSERT(allow_macro_instructions_);
5228    VIXL_ASSERT(OutsideITBlock());
5229    MacroEmissionCheckScope guard(this);
5230    ITScope it_scope(this, &cond);
5231    vaba(cond, dt, rd, rn, rm);
5232  }
5233  void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5234    Vaba(al, dt, rd, rn, rm);
5235  }
5236
5237  void Vabal(
5238      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5239    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5240    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5241    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5242    VIXL_ASSERT(allow_macro_instructions_);
5243    VIXL_ASSERT(OutsideITBlock());
5244    MacroEmissionCheckScope guard(this);
5245    ITScope it_scope(this, &cond);
5246    vabal(cond, dt, rd, rn, rm);
5247  }
5248  void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5249    Vabal(al, dt, rd, rn, rm);
5250  }
5251
5252  void Vabd(
5253      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5254    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5255    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5256    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5257    VIXL_ASSERT(allow_macro_instructions_);
5258    VIXL_ASSERT(OutsideITBlock());
5259    MacroEmissionCheckScope guard(this);
5260    ITScope it_scope(this, &cond);
5261    vabd(cond, dt, rd, rn, rm);
5262  }
5263  void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5264    Vabd(al, dt, rd, rn, rm);
5265  }
5266
5267  void Vabd(
5268      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5269    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5270    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5272    VIXL_ASSERT(allow_macro_instructions_);
5273    VIXL_ASSERT(OutsideITBlock());
5274    MacroEmissionCheckScope guard(this);
5275    ITScope it_scope(this, &cond);
5276    vabd(cond, dt, rd, rn, rm);
5277  }
5278  void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5279    Vabd(al, dt, rd, rn, rm);
5280  }
5281
5282  void Vabdl(
5283      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5284    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5285    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5286    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5287    VIXL_ASSERT(allow_macro_instructions_);
5288    VIXL_ASSERT(OutsideITBlock());
5289    MacroEmissionCheckScope guard(this);
5290    ITScope it_scope(this, &cond);
5291    vabdl(cond, dt, rd, rn, rm);
5292  }
5293  void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5294    Vabdl(al, dt, rd, rn, rm);
5295  }
5296
5297  void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
5298    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5299    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5300    VIXL_ASSERT(allow_macro_instructions_);
5301    VIXL_ASSERT(OutsideITBlock());
5302    MacroEmissionCheckScope guard(this);
5303    ITScope it_scope(this, &cond);
5304    vabs(cond, dt, rd, rm);
5305  }
5306  void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); }
5307
5308  void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
5309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5311    VIXL_ASSERT(allow_macro_instructions_);
5312    VIXL_ASSERT(OutsideITBlock());
5313    MacroEmissionCheckScope guard(this);
5314    ITScope it_scope(this, &cond);
5315    vabs(cond, dt, rd, rm);
5316  }
5317  void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); }
5318
5319  void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) {
5320    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5321    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5322    VIXL_ASSERT(allow_macro_instructions_);
5323    VIXL_ASSERT(OutsideITBlock());
5324    MacroEmissionCheckScope guard(this);
5325    ITScope it_scope(this, &cond);
5326    vabs(cond, dt, rd, rm);
5327  }
5328  void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); }
5329
5330  void Vacge(
5331      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5332    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5333    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5334    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5335    VIXL_ASSERT(allow_macro_instructions_);
5336    VIXL_ASSERT(OutsideITBlock());
5337    MacroEmissionCheckScope guard(this);
5338    ITScope it_scope(this, &cond);
5339    vacge(cond, dt, rd, rn, rm);
5340  }
5341  void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5342    Vacge(al, dt, rd, rn, rm);
5343  }
5344
5345  void Vacge(
5346      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5347    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5348    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5349    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5350    VIXL_ASSERT(allow_macro_instructions_);
5351    VIXL_ASSERT(OutsideITBlock());
5352    MacroEmissionCheckScope guard(this);
5353    ITScope it_scope(this, &cond);
5354    vacge(cond, dt, rd, rn, rm);
5355  }
5356  void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5357    Vacge(al, dt, rd, rn, rm);
5358  }
5359
5360  void Vacgt(
5361      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5362    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5363    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5364    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5365    VIXL_ASSERT(allow_macro_instructions_);
5366    VIXL_ASSERT(OutsideITBlock());
5367    MacroEmissionCheckScope guard(this);
5368    ITScope it_scope(this, &cond);
5369    vacgt(cond, dt, rd, rn, rm);
5370  }
5371  void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5372    Vacgt(al, dt, rd, rn, rm);
5373  }
5374
5375  void Vacgt(
5376      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5377    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5378    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5379    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5380    VIXL_ASSERT(allow_macro_instructions_);
5381    VIXL_ASSERT(OutsideITBlock());
5382    MacroEmissionCheckScope guard(this);
5383    ITScope it_scope(this, &cond);
5384    vacgt(cond, dt, rd, rn, rm);
5385  }
5386  void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5387    Vacgt(al, dt, rd, rn, rm);
5388  }
5389
5390  void Vacle(
5391      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5392    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5393    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5394    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5395    VIXL_ASSERT(allow_macro_instructions_);
5396    VIXL_ASSERT(OutsideITBlock());
5397    MacroEmissionCheckScope guard(this);
5398    ITScope it_scope(this, &cond);
5399    vacle(cond, dt, rd, rn, rm);
5400  }
5401  void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5402    Vacle(al, dt, rd, rn, rm);
5403  }
5404
5405  void Vacle(
5406      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5407    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5408    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5409    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5410    VIXL_ASSERT(allow_macro_instructions_);
5411    VIXL_ASSERT(OutsideITBlock());
5412    MacroEmissionCheckScope guard(this);
5413    ITScope it_scope(this, &cond);
5414    vacle(cond, dt, rd, rn, rm);
5415  }
5416  void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5417    Vacle(al, dt, rd, rn, rm);
5418  }
5419
5420  void Vaclt(
5421      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5422    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5423    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5425    VIXL_ASSERT(allow_macro_instructions_);
5426    VIXL_ASSERT(OutsideITBlock());
5427    MacroEmissionCheckScope guard(this);
5428    ITScope it_scope(this, &cond);
5429    vaclt(cond, dt, rd, rn, rm);
5430  }
5431  void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5432    Vaclt(al, dt, rd, rn, rm);
5433  }
5434
5435  void Vaclt(
5436      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5437    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5438    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5440    VIXL_ASSERT(allow_macro_instructions_);
5441    VIXL_ASSERT(OutsideITBlock());
5442    MacroEmissionCheckScope guard(this);
5443    ITScope it_scope(this, &cond);
5444    vaclt(cond, dt, rd, rn, rm);
5445  }
5446  void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5447    Vaclt(al, dt, rd, rn, rm);
5448  }
5449
5450  void Vadd(
5451      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5452    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5453    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5454    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5455    VIXL_ASSERT(allow_macro_instructions_);
5456    VIXL_ASSERT(OutsideITBlock());
5457    MacroEmissionCheckScope guard(this);
5458    ITScope it_scope(this, &cond);
5459    vadd(cond, dt, rd, rn, rm);
5460  }
5461  void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5462    Vadd(al, dt, rd, rn, rm);
5463  }
5464
5465  void Vadd(
5466      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5467    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5468    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5469    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5470    VIXL_ASSERT(allow_macro_instructions_);
5471    VIXL_ASSERT(OutsideITBlock());
5472    MacroEmissionCheckScope guard(this);
5473    ITScope it_scope(this, &cond);
5474    vadd(cond, dt, rd, rn, rm);
5475  }
5476  void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5477    Vadd(al, dt, rd, rn, rm);
5478  }
5479
5480  void Vadd(
5481      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5482    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5483    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5484    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5485    VIXL_ASSERT(allow_macro_instructions_);
5486    VIXL_ASSERT(OutsideITBlock());
5487    MacroEmissionCheckScope guard(this);
5488    ITScope it_scope(this, &cond);
5489    vadd(cond, dt, rd, rn, rm);
5490  }
5491  void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5492    Vadd(al, dt, rd, rn, rm);
5493  }
5494
5495  void Vaddhn(
5496      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5497    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5498    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5500    VIXL_ASSERT(allow_macro_instructions_);
5501    VIXL_ASSERT(OutsideITBlock());
5502    MacroEmissionCheckScope guard(this);
5503    ITScope it_scope(this, &cond);
5504    vaddhn(cond, dt, rd, rn, rm);
5505  }
5506  void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5507    Vaddhn(al, dt, rd, rn, rm);
5508  }
5509
5510  void Vaddl(
5511      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5512    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5513    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5514    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5515    VIXL_ASSERT(allow_macro_instructions_);
5516    VIXL_ASSERT(OutsideITBlock());
5517    MacroEmissionCheckScope guard(this);
5518    ITScope it_scope(this, &cond);
5519    vaddl(cond, dt, rd, rn, rm);
5520  }
5521  void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5522    Vaddl(al, dt, rd, rn, rm);
5523  }
5524
5525  void Vaddw(
5526      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5528    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5529    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5530    VIXL_ASSERT(allow_macro_instructions_);
5531    VIXL_ASSERT(OutsideITBlock());
5532    MacroEmissionCheckScope guard(this);
5533    ITScope it_scope(this, &cond);
5534    vaddw(cond, dt, rd, rn, rm);
5535  }
5536  void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5537    Vaddw(al, dt, rd, rn, rm);
5538  }
5539
5540  void Vand(Condition cond,
5541            DataType dt,
5542            DRegister rd,
5543            DRegister rn,
5544            const DOperand& operand) {
5545    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5546    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5547    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5548    VIXL_ASSERT(allow_macro_instructions_);
5549    VIXL_ASSERT(OutsideITBlock());
5550    MacroEmissionCheckScope guard(this);
5551    ITScope it_scope(this, &cond);
5552    vand(cond, dt, rd, rn, operand);
5553  }
5554  void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5555    Vand(al, dt, rd, rn, operand);
5556  }
5557
5558  void Vand(Condition cond,
5559            DataType dt,
5560            QRegister rd,
5561            QRegister rn,
5562            const QOperand& operand) {
5563    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5564    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5565    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5566    VIXL_ASSERT(allow_macro_instructions_);
5567    VIXL_ASSERT(OutsideITBlock());
5568    MacroEmissionCheckScope guard(this);
5569    ITScope it_scope(this, &cond);
5570    vand(cond, dt, rd, rn, operand);
5571  }
5572  void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5573    Vand(al, dt, rd, rn, operand);
5574  }
5575
5576  void Vbic(Condition cond,
5577            DataType dt,
5578            DRegister rd,
5579            DRegister rn,
5580            const DOperand& operand) {
5581    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5583    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5584    VIXL_ASSERT(allow_macro_instructions_);
5585    VIXL_ASSERT(OutsideITBlock());
5586    MacroEmissionCheckScope guard(this);
5587    ITScope it_scope(this, &cond);
5588    vbic(cond, dt, rd, rn, operand);
5589  }
5590  void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5591    Vbic(al, dt, rd, rn, operand);
5592  }
5593
5594  void Vbic(Condition cond,
5595            DataType dt,
5596            QRegister rd,
5597            QRegister rn,
5598            const QOperand& operand) {
5599    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5600    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5601    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5602    VIXL_ASSERT(allow_macro_instructions_);
5603    VIXL_ASSERT(OutsideITBlock());
5604    MacroEmissionCheckScope guard(this);
5605    ITScope it_scope(this, &cond);
5606    vbic(cond, dt, rd, rn, operand);
5607  }
5608  void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5609    Vbic(al, dt, rd, rn, operand);
5610  }
5611
5612  void Vbif(
5613      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5614    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5615    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5617    VIXL_ASSERT(allow_macro_instructions_);
5618    VIXL_ASSERT(OutsideITBlock());
5619    MacroEmissionCheckScope guard(this);
5620    ITScope it_scope(this, &cond);
5621    vbif(cond, dt, rd, rn, rm);
5622  }
5623  void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5624    Vbif(al, dt, rd, rn, rm);
5625  }
5626  void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5627    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5628  }
5629  void Vbif(DRegister rd, DRegister rn, DRegister rm) {
5630    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5631  }
5632
5633  void Vbif(
5634      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5636    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5637    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5638    VIXL_ASSERT(allow_macro_instructions_);
5639    VIXL_ASSERT(OutsideITBlock());
5640    MacroEmissionCheckScope guard(this);
5641    ITScope it_scope(this, &cond);
5642    vbif(cond, dt, rd, rn, rm);
5643  }
5644  void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5645    Vbif(al, dt, rd, rn, rm);
5646  }
5647  void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5648    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5649  }
5650  void Vbif(QRegister rd, QRegister rn, QRegister rm) {
5651    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5652  }
5653
5654  void Vbit(
5655      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5656    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5657    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5658    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5659    VIXL_ASSERT(allow_macro_instructions_);
5660    VIXL_ASSERT(OutsideITBlock());
5661    MacroEmissionCheckScope guard(this);
5662    ITScope it_scope(this, &cond);
5663    vbit(cond, dt, rd, rn, rm);
5664  }
5665  void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5666    Vbit(al, dt, rd, rn, rm);
5667  }
5668  void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5669    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5670  }
5671  void Vbit(DRegister rd, DRegister rn, DRegister rm) {
5672    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5673  }
5674
5675  void Vbit(
5676      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5678    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5679    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5680    VIXL_ASSERT(allow_macro_instructions_);
5681    VIXL_ASSERT(OutsideITBlock());
5682    MacroEmissionCheckScope guard(this);
5683    ITScope it_scope(this, &cond);
5684    vbit(cond, dt, rd, rn, rm);
5685  }
5686  void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5687    Vbit(al, dt, rd, rn, rm);
5688  }
5689  void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5690    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5691  }
5692  void Vbit(QRegister rd, QRegister rn, QRegister rm) {
5693    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5694  }
5695
5696  void Vbsl(
5697      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5700    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5701    VIXL_ASSERT(allow_macro_instructions_);
5702    VIXL_ASSERT(OutsideITBlock());
5703    MacroEmissionCheckScope guard(this);
5704    ITScope it_scope(this, &cond);
5705    vbsl(cond, dt, rd, rn, rm);
5706  }
5707  void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5708    Vbsl(al, dt, rd, rn, rm);
5709  }
5710  void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5711    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5712  }
5713  void Vbsl(DRegister rd, DRegister rn, DRegister rm) {
5714    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5715  }
5716
5717  void Vbsl(
5718      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5720    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5721    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5722    VIXL_ASSERT(allow_macro_instructions_);
5723    VIXL_ASSERT(OutsideITBlock());
5724    MacroEmissionCheckScope guard(this);
5725    ITScope it_scope(this, &cond);
5726    vbsl(cond, dt, rd, rn, rm);
5727  }
5728  void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5729    Vbsl(al, dt, rd, rn, rm);
5730  }
5731  void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5732    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5733  }
5734  void Vbsl(QRegister rd, QRegister rn, QRegister rm) {
5735    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5736  }
5737
5738  void Vceq(Condition cond,
5739            DataType dt,
5740            DRegister rd,
5741            DRegister rm,
5742            const DOperand& operand) {
5743    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5744    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5745    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5746    VIXL_ASSERT(allow_macro_instructions_);
5747    VIXL_ASSERT(OutsideITBlock());
5748    MacroEmissionCheckScope guard(this);
5749    ITScope it_scope(this, &cond);
5750    vceq(cond, dt, rd, rm, operand);
5751  }
5752  void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5753    Vceq(al, dt, rd, rm, operand);
5754  }
5755
5756  void Vceq(Condition cond,
5757            DataType dt,
5758            QRegister rd,
5759            QRegister rm,
5760            const QOperand& operand) {
5761    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5762    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5763    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5764    VIXL_ASSERT(allow_macro_instructions_);
5765    VIXL_ASSERT(OutsideITBlock());
5766    MacroEmissionCheckScope guard(this);
5767    ITScope it_scope(this, &cond);
5768    vceq(cond, dt, rd, rm, operand);
5769  }
5770  void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5771    Vceq(al, dt, rd, rm, operand);
5772  }
5773
5774  void Vceq(
5775      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5776    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5777    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5779    VIXL_ASSERT(allow_macro_instructions_);
5780    VIXL_ASSERT(OutsideITBlock());
5781    MacroEmissionCheckScope guard(this);
5782    ITScope it_scope(this, &cond);
5783    vceq(cond, dt, rd, rn, rm);
5784  }
5785  void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5786    Vceq(al, dt, rd, rn, rm);
5787  }
5788
5789  void Vceq(
5790      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5791    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5792    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5793    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5794    VIXL_ASSERT(allow_macro_instructions_);
5795    VIXL_ASSERT(OutsideITBlock());
5796    MacroEmissionCheckScope guard(this);
5797    ITScope it_scope(this, &cond);
5798    vceq(cond, dt, rd, rn, rm);
5799  }
5800  void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5801    Vceq(al, dt, rd, rn, rm);
5802  }
5803
5804  void Vcge(Condition cond,
5805            DataType dt,
5806            DRegister rd,
5807            DRegister rm,
5808            const DOperand& operand) {
5809    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5810    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5811    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5812    VIXL_ASSERT(allow_macro_instructions_);
5813    VIXL_ASSERT(OutsideITBlock());
5814    MacroEmissionCheckScope guard(this);
5815    ITScope it_scope(this, &cond);
5816    vcge(cond, dt, rd, rm, operand);
5817  }
5818  void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5819    Vcge(al, dt, rd, rm, operand);
5820  }
5821
5822  void Vcge(Condition cond,
5823            DataType dt,
5824            QRegister rd,
5825            QRegister rm,
5826            const QOperand& operand) {
5827    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5829    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5830    VIXL_ASSERT(allow_macro_instructions_);
5831    VIXL_ASSERT(OutsideITBlock());
5832    MacroEmissionCheckScope guard(this);
5833    ITScope it_scope(this, &cond);
5834    vcge(cond, dt, rd, rm, operand);
5835  }
5836  void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5837    Vcge(al, dt, rd, rm, operand);
5838  }
5839
5840  void Vcge(
5841      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5844    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5845    VIXL_ASSERT(allow_macro_instructions_);
5846    VIXL_ASSERT(OutsideITBlock());
5847    MacroEmissionCheckScope guard(this);
5848    ITScope it_scope(this, &cond);
5849    vcge(cond, dt, rd, rn, rm);
5850  }
5851  void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5852    Vcge(al, dt, rd, rn, rm);
5853  }
5854
5855  void Vcge(
5856      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5857    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5860    VIXL_ASSERT(allow_macro_instructions_);
5861    VIXL_ASSERT(OutsideITBlock());
5862    MacroEmissionCheckScope guard(this);
5863    ITScope it_scope(this, &cond);
5864    vcge(cond, dt, rd, rn, rm);
5865  }
5866  void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5867    Vcge(al, dt, rd, rn, rm);
5868  }
5869
5870  void Vcgt(Condition cond,
5871            DataType dt,
5872            DRegister rd,
5873            DRegister rm,
5874            const DOperand& operand) {
5875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5877    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5878    VIXL_ASSERT(allow_macro_instructions_);
5879    VIXL_ASSERT(OutsideITBlock());
5880    MacroEmissionCheckScope guard(this);
5881    ITScope it_scope(this, &cond);
5882    vcgt(cond, dt, rd, rm, operand);
5883  }
5884  void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5885    Vcgt(al, dt, rd, rm, operand);
5886  }
5887
5888  void Vcgt(Condition cond,
5889            DataType dt,
5890            QRegister rd,
5891            QRegister rm,
5892            const QOperand& operand) {
5893    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5894    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5895    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5896    VIXL_ASSERT(allow_macro_instructions_);
5897    VIXL_ASSERT(OutsideITBlock());
5898    MacroEmissionCheckScope guard(this);
5899    ITScope it_scope(this, &cond);
5900    vcgt(cond, dt, rd, rm, operand);
5901  }
5902  void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5903    Vcgt(al, dt, rd, rm, operand);
5904  }
5905
5906  void Vcgt(
5907      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5909    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5910    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5911    VIXL_ASSERT(allow_macro_instructions_);
5912    VIXL_ASSERT(OutsideITBlock());
5913    MacroEmissionCheckScope guard(this);
5914    ITScope it_scope(this, &cond);
5915    vcgt(cond, dt, rd, rn, rm);
5916  }
5917  void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5918    Vcgt(al, dt, rd, rn, rm);
5919  }
5920
5921  void Vcgt(
5922      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5923    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5924    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5925    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5926    VIXL_ASSERT(allow_macro_instructions_);
5927    VIXL_ASSERT(OutsideITBlock());
5928    MacroEmissionCheckScope guard(this);
5929    ITScope it_scope(this, &cond);
5930    vcgt(cond, dt, rd, rn, rm);
5931  }
5932  void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5933    Vcgt(al, dt, rd, rn, rm);
5934  }
5935
5936  void Vcle(Condition cond,
5937            DataType dt,
5938            DRegister rd,
5939            DRegister rm,
5940            const DOperand& operand) {
5941    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5942    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5943    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5944    VIXL_ASSERT(allow_macro_instructions_);
5945    VIXL_ASSERT(OutsideITBlock());
5946    MacroEmissionCheckScope guard(this);
5947    ITScope it_scope(this, &cond);
5948    vcle(cond, dt, rd, rm, operand);
5949  }
5950  void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5951    Vcle(al, dt, rd, rm, operand);
5952  }
5953
5954  void Vcle(Condition cond,
5955            DataType dt,
5956            QRegister rd,
5957            QRegister rm,
5958            const QOperand& operand) {
5959    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5960    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5961    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5962    VIXL_ASSERT(allow_macro_instructions_);
5963    VIXL_ASSERT(OutsideITBlock());
5964    MacroEmissionCheckScope guard(this);
5965    ITScope it_scope(this, &cond);
5966    vcle(cond, dt, rd, rm, operand);
5967  }
5968  void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5969    Vcle(al, dt, rd, rm, operand);
5970  }
5971
5972  void Vcle(
5973      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5976    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5977    VIXL_ASSERT(allow_macro_instructions_);
5978    VIXL_ASSERT(OutsideITBlock());
5979    MacroEmissionCheckScope guard(this);
5980    ITScope it_scope(this, &cond);
5981    vcle(cond, dt, rd, rn, rm);
5982  }
5983  void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5984    Vcle(al, dt, rd, rn, rm);
5985  }
5986
5987  void Vcle(
5988      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5989    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5990    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5991    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5992    VIXL_ASSERT(allow_macro_instructions_);
5993    VIXL_ASSERT(OutsideITBlock());
5994    MacroEmissionCheckScope guard(this);
5995    ITScope it_scope(this, &cond);
5996    vcle(cond, dt, rd, rn, rm);
5997  }
5998  void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5999    Vcle(al, dt, rd, rn, rm);
6000  }
6001
6002  void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6003    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6004    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6005    VIXL_ASSERT(allow_macro_instructions_);
6006    VIXL_ASSERT(OutsideITBlock());
6007    MacroEmissionCheckScope guard(this);
6008    ITScope it_scope(this, &cond);
6009    vcls(cond, dt, rd, rm);
6010  }
6011  void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); }
6012
6013  void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6014    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6015    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6016    VIXL_ASSERT(allow_macro_instructions_);
6017    VIXL_ASSERT(OutsideITBlock());
6018    MacroEmissionCheckScope guard(this);
6019    ITScope it_scope(this, &cond);
6020    vcls(cond, dt, rd, rm);
6021  }
6022  void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); }
6023
6024  void Vclt(Condition cond,
6025            DataType dt,
6026            DRegister rd,
6027            DRegister rm,
6028            const DOperand& operand) {
6029    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6030    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6031    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6032    VIXL_ASSERT(allow_macro_instructions_);
6033    VIXL_ASSERT(OutsideITBlock());
6034    MacroEmissionCheckScope guard(this);
6035    ITScope it_scope(this, &cond);
6036    vclt(cond, dt, rd, rm, operand);
6037  }
6038  void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6039    Vclt(al, dt, rd, rm, operand);
6040  }
6041
6042  void Vclt(Condition cond,
6043            DataType dt,
6044            QRegister rd,
6045            QRegister rm,
6046            const QOperand& operand) {
6047    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6048    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6049    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6050    VIXL_ASSERT(allow_macro_instructions_);
6051    VIXL_ASSERT(OutsideITBlock());
6052    MacroEmissionCheckScope guard(this);
6053    ITScope it_scope(this, &cond);
6054    vclt(cond, dt, rd, rm, operand);
6055  }
6056  void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6057    Vclt(al, dt, rd, rm, operand);
6058  }
6059
6060  void Vclt(
6061      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6062    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6065    VIXL_ASSERT(allow_macro_instructions_);
6066    VIXL_ASSERT(OutsideITBlock());
6067    MacroEmissionCheckScope guard(this);
6068    ITScope it_scope(this, &cond);
6069    vclt(cond, dt, rd, rn, rm);
6070  }
6071  void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6072    Vclt(al, dt, rd, rn, rm);
6073  }
6074
6075  void Vclt(
6076      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6077    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6080    VIXL_ASSERT(allow_macro_instructions_);
6081    VIXL_ASSERT(OutsideITBlock());
6082    MacroEmissionCheckScope guard(this);
6083    ITScope it_scope(this, &cond);
6084    vclt(cond, dt, rd, rn, rm);
6085  }
6086  void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6087    Vclt(al, dt, rd, rn, rm);
6088  }
6089
6090  void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6092    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6093    VIXL_ASSERT(allow_macro_instructions_);
6094    VIXL_ASSERT(OutsideITBlock());
6095    MacroEmissionCheckScope guard(this);
6096    ITScope it_scope(this, &cond);
6097    vclz(cond, dt, rd, rm);
6098  }
6099  void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); }
6100
6101  void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6103    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6104    VIXL_ASSERT(allow_macro_instructions_);
6105    VIXL_ASSERT(OutsideITBlock());
6106    MacroEmissionCheckScope guard(this);
6107    ITScope it_scope(this, &cond);
6108    vclz(cond, dt, rd, rm);
6109  }
6110  void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); }
6111
6112  void Vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6113    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6115    VIXL_ASSERT(allow_macro_instructions_);
6116    VIXL_ASSERT(OutsideITBlock());
6117    MacroEmissionCheckScope guard(this);
6118    ITScope it_scope(this, &cond);
6119    vcmp(cond, dt, rd, rm);
6120  }
6121  void Vcmp(DataType dt, SRegister rd, SRegister rm) { Vcmp(al, dt, rd, rm); }
6122
6123  void Vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6124    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6125    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6126    VIXL_ASSERT(allow_macro_instructions_);
6127    VIXL_ASSERT(OutsideITBlock());
6128    MacroEmissionCheckScope guard(this);
6129    ITScope it_scope(this, &cond);
6130    vcmp(cond, dt, rd, rm);
6131  }
6132  void Vcmp(DataType dt, DRegister rd, DRegister rm) { Vcmp(al, dt, rd, rm); }
6133
6134  void Vcmp(Condition cond, DataType dt, SRegister rd, double imm) {
6135    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6136    VIXL_ASSERT(allow_macro_instructions_);
6137    VIXL_ASSERT(OutsideITBlock());
6138    MacroEmissionCheckScope guard(this);
6139    ITScope it_scope(this, &cond);
6140    vcmp(cond, dt, rd, imm);
6141  }
6142  void Vcmp(DataType dt, SRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6143
6144  void Vcmp(Condition cond, DataType dt, DRegister rd, double imm) {
6145    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6146    VIXL_ASSERT(allow_macro_instructions_);
6147    VIXL_ASSERT(OutsideITBlock());
6148    MacroEmissionCheckScope guard(this);
6149    ITScope it_scope(this, &cond);
6150    vcmp(cond, dt, rd, imm);
6151  }
6152  void Vcmp(DataType dt, DRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6153
6154  void Vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6155    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6156    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6157    VIXL_ASSERT(allow_macro_instructions_);
6158    VIXL_ASSERT(OutsideITBlock());
6159    MacroEmissionCheckScope guard(this);
6160    ITScope it_scope(this, &cond);
6161    vcmpe(cond, dt, rd, rm);
6162  }
6163  void Vcmpe(DataType dt, SRegister rd, SRegister rm) { Vcmpe(al, dt, rd, rm); }
6164
6165  void Vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6166    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6167    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6168    VIXL_ASSERT(allow_macro_instructions_);
6169    VIXL_ASSERT(OutsideITBlock());
6170    MacroEmissionCheckScope guard(this);
6171    ITScope it_scope(this, &cond);
6172    vcmpe(cond, dt, rd, rm);
6173  }
6174  void Vcmpe(DataType dt, DRegister rd, DRegister rm) { Vcmpe(al, dt, rd, rm); }
6175
6176  void Vcmpe(Condition cond, DataType dt, SRegister rd, double imm) {
6177    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6178    VIXL_ASSERT(allow_macro_instructions_);
6179    VIXL_ASSERT(OutsideITBlock());
6180    MacroEmissionCheckScope guard(this);
6181    ITScope it_scope(this, &cond);
6182    vcmpe(cond, dt, rd, imm);
6183  }
6184  void Vcmpe(DataType dt, SRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6185
6186  void Vcmpe(Condition cond, DataType dt, DRegister rd, double imm) {
6187    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6188    VIXL_ASSERT(allow_macro_instructions_);
6189    VIXL_ASSERT(OutsideITBlock());
6190    MacroEmissionCheckScope guard(this);
6191    ITScope it_scope(this, &cond);
6192    vcmpe(cond, dt, rd, imm);
6193  }
6194  void Vcmpe(DataType dt, DRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6195
6196  void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6198    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6199    VIXL_ASSERT(allow_macro_instructions_);
6200    VIXL_ASSERT(OutsideITBlock());
6201    MacroEmissionCheckScope guard(this);
6202    ITScope it_scope(this, &cond);
6203    vcnt(cond, dt, rd, rm);
6204  }
6205  void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); }
6206
6207  void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6210    VIXL_ASSERT(allow_macro_instructions_);
6211    VIXL_ASSERT(OutsideITBlock());
6212    MacroEmissionCheckScope guard(this);
6213    ITScope it_scope(this, &cond);
6214    vcnt(cond, dt, rd, rm);
6215  }
6216  void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); }
6217
6218  void Vcvt(
6219      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6220    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6222    VIXL_ASSERT(allow_macro_instructions_);
6223    VIXL_ASSERT(OutsideITBlock());
6224    MacroEmissionCheckScope guard(this);
6225    ITScope it_scope(this, &cond);
6226    vcvt(cond, dt1, dt2, rd, rm);
6227  }
6228  void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6229    Vcvt(al, dt1, dt2, rd, rm);
6230  }
6231
6232  void Vcvt(
6233      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6234    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6235    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6236    VIXL_ASSERT(allow_macro_instructions_);
6237    VIXL_ASSERT(OutsideITBlock());
6238    MacroEmissionCheckScope guard(this);
6239    ITScope it_scope(this, &cond);
6240    vcvt(cond, dt1, dt2, rd, rm);
6241  }
6242  void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6243    Vcvt(al, dt1, dt2, rd, rm);
6244  }
6245
6246  void Vcvt(Condition cond,
6247            DataType dt1,
6248            DataType dt2,
6249            DRegister rd,
6250            DRegister rm,
6251            int32_t fbits) {
6252    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6253    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6254    VIXL_ASSERT(allow_macro_instructions_);
6255    VIXL_ASSERT(OutsideITBlock());
6256    MacroEmissionCheckScope guard(this);
6257    ITScope it_scope(this, &cond);
6258    vcvt(cond, dt1, dt2, rd, rm, fbits);
6259  }
6260  void Vcvt(
6261      DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) {
6262    Vcvt(al, dt1, dt2, rd, rm, fbits);
6263  }
6264
6265  void Vcvt(Condition cond,
6266            DataType dt1,
6267            DataType dt2,
6268            QRegister rd,
6269            QRegister rm,
6270            int32_t fbits) {
6271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6272    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6273    VIXL_ASSERT(allow_macro_instructions_);
6274    VIXL_ASSERT(OutsideITBlock());
6275    MacroEmissionCheckScope guard(this);
6276    ITScope it_scope(this, &cond);
6277    vcvt(cond, dt1, dt2, rd, rm, fbits);
6278  }
6279  void Vcvt(
6280      DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) {
6281    Vcvt(al, dt1, dt2, rd, rm, fbits);
6282  }
6283
6284  void Vcvt(Condition cond,
6285            DataType dt1,
6286            DataType dt2,
6287            SRegister rd,
6288            SRegister rm,
6289            int32_t fbits) {
6290    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6291    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6292    VIXL_ASSERT(allow_macro_instructions_);
6293    VIXL_ASSERT(OutsideITBlock());
6294    MacroEmissionCheckScope guard(this);
6295    ITScope it_scope(this, &cond);
6296    vcvt(cond, dt1, dt2, rd, rm, fbits);
6297  }
6298  void Vcvt(
6299      DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) {
6300    Vcvt(al, dt1, dt2, rd, rm, fbits);
6301  }
6302
6303  void Vcvt(
6304      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6305    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6306    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6307    VIXL_ASSERT(allow_macro_instructions_);
6308    VIXL_ASSERT(OutsideITBlock());
6309    MacroEmissionCheckScope guard(this);
6310    ITScope it_scope(this, &cond);
6311    vcvt(cond, dt1, dt2, rd, rm);
6312  }
6313  void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6314    Vcvt(al, dt1, dt2, rd, rm);
6315  }
6316
6317  void Vcvt(
6318      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6319    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6320    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6321    VIXL_ASSERT(allow_macro_instructions_);
6322    VIXL_ASSERT(OutsideITBlock());
6323    MacroEmissionCheckScope guard(this);
6324    ITScope it_scope(this, &cond);
6325    vcvt(cond, dt1, dt2, rd, rm);
6326  }
6327  void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6328    Vcvt(al, dt1, dt2, rd, rm);
6329  }
6330
6331  void Vcvt(
6332      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6333    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6334    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6335    VIXL_ASSERT(allow_macro_instructions_);
6336    VIXL_ASSERT(OutsideITBlock());
6337    MacroEmissionCheckScope guard(this);
6338    ITScope it_scope(this, &cond);
6339    vcvt(cond, dt1, dt2, rd, rm);
6340  }
6341  void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6342    Vcvt(al, dt1, dt2, rd, rm);
6343  }
6344
6345  void Vcvt(
6346      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6347    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6348    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6349    VIXL_ASSERT(allow_macro_instructions_);
6350    VIXL_ASSERT(OutsideITBlock());
6351    MacroEmissionCheckScope guard(this);
6352    ITScope it_scope(this, &cond);
6353    vcvt(cond, dt1, dt2, rd, rm);
6354  }
6355  void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6356    Vcvt(al, dt1, dt2, rd, rm);
6357  }
6358
6359  void Vcvt(
6360      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6361    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6362    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6363    VIXL_ASSERT(allow_macro_instructions_);
6364    VIXL_ASSERT(OutsideITBlock());
6365    MacroEmissionCheckScope guard(this);
6366    ITScope it_scope(this, &cond);
6367    vcvt(cond, dt1, dt2, rd, rm);
6368  }
6369  void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6370    Vcvt(al, dt1, dt2, rd, rm);
6371  }
6372
6373  void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6374    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6375    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6376    VIXL_ASSERT(allow_macro_instructions_);
6377    VIXL_ASSERT(OutsideITBlock());
6378    MacroEmissionCheckScope guard(this);
6379    vcvta(dt1, dt2, rd, rm);
6380  }
6381
6382  void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6384    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6385    VIXL_ASSERT(allow_macro_instructions_);
6386    VIXL_ASSERT(OutsideITBlock());
6387    MacroEmissionCheckScope guard(this);
6388    vcvta(dt1, dt2, rd, rm);
6389  }
6390
6391  void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6392    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6393    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6394    VIXL_ASSERT(allow_macro_instructions_);
6395    VIXL_ASSERT(OutsideITBlock());
6396    MacroEmissionCheckScope guard(this);
6397    vcvta(dt1, dt2, rd, rm);
6398  }
6399
6400  void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6401    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6402    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6403    VIXL_ASSERT(allow_macro_instructions_);
6404    VIXL_ASSERT(OutsideITBlock());
6405    MacroEmissionCheckScope guard(this);
6406    vcvta(dt1, dt2, rd, rm);
6407  }
6408
6409  void Vcvtb(
6410      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6411    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6412    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6413    VIXL_ASSERT(allow_macro_instructions_);
6414    VIXL_ASSERT(OutsideITBlock());
6415    MacroEmissionCheckScope guard(this);
6416    ITScope it_scope(this, &cond);
6417    vcvtb(cond, dt1, dt2, rd, rm);
6418  }
6419  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6420    Vcvtb(al, dt1, dt2, rd, rm);
6421  }
6422
6423  void Vcvtb(
6424      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6427    VIXL_ASSERT(allow_macro_instructions_);
6428    VIXL_ASSERT(OutsideITBlock());
6429    MacroEmissionCheckScope guard(this);
6430    ITScope it_scope(this, &cond);
6431    vcvtb(cond, dt1, dt2, rd, rm);
6432  }
6433  void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6434    Vcvtb(al, dt1, dt2, rd, rm);
6435  }
6436
6437  void Vcvtb(
6438      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6441    VIXL_ASSERT(allow_macro_instructions_);
6442    VIXL_ASSERT(OutsideITBlock());
6443    MacroEmissionCheckScope guard(this);
6444    ITScope it_scope(this, &cond);
6445    vcvtb(cond, dt1, dt2, rd, rm);
6446  }
6447  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6448    Vcvtb(al, dt1, dt2, rd, rm);
6449  }
6450
6451  void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6452    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6453    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6454    VIXL_ASSERT(allow_macro_instructions_);
6455    VIXL_ASSERT(OutsideITBlock());
6456    MacroEmissionCheckScope guard(this);
6457    vcvtm(dt1, dt2, rd, rm);
6458  }
6459
6460  void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6461    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6462    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6463    VIXL_ASSERT(allow_macro_instructions_);
6464    VIXL_ASSERT(OutsideITBlock());
6465    MacroEmissionCheckScope guard(this);
6466    vcvtm(dt1, dt2, rd, rm);
6467  }
6468
6469  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6470    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6471    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6472    VIXL_ASSERT(allow_macro_instructions_);
6473    VIXL_ASSERT(OutsideITBlock());
6474    MacroEmissionCheckScope guard(this);
6475    vcvtm(dt1, dt2, rd, rm);
6476  }
6477
6478  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6480    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6481    VIXL_ASSERT(allow_macro_instructions_);
6482    VIXL_ASSERT(OutsideITBlock());
6483    MacroEmissionCheckScope guard(this);
6484    vcvtm(dt1, dt2, rd, rm);
6485  }
6486
6487  void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6488    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6490    VIXL_ASSERT(allow_macro_instructions_);
6491    VIXL_ASSERT(OutsideITBlock());
6492    MacroEmissionCheckScope guard(this);
6493    vcvtn(dt1, dt2, rd, rm);
6494  }
6495
6496  void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6497    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6498    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6499    VIXL_ASSERT(allow_macro_instructions_);
6500    VIXL_ASSERT(OutsideITBlock());
6501    MacroEmissionCheckScope guard(this);
6502    vcvtn(dt1, dt2, rd, rm);
6503  }
6504
6505  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6506    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6508    VIXL_ASSERT(allow_macro_instructions_);
6509    VIXL_ASSERT(OutsideITBlock());
6510    MacroEmissionCheckScope guard(this);
6511    vcvtn(dt1, dt2, rd, rm);
6512  }
6513
6514  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6515    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6517    VIXL_ASSERT(allow_macro_instructions_);
6518    VIXL_ASSERT(OutsideITBlock());
6519    MacroEmissionCheckScope guard(this);
6520    vcvtn(dt1, dt2, rd, rm);
6521  }
6522
6523  void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6524    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6525    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6526    VIXL_ASSERT(allow_macro_instructions_);
6527    VIXL_ASSERT(OutsideITBlock());
6528    MacroEmissionCheckScope guard(this);
6529    vcvtp(dt1, dt2, rd, rm);
6530  }
6531
6532  void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6533    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6534    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6535    VIXL_ASSERT(allow_macro_instructions_);
6536    VIXL_ASSERT(OutsideITBlock());
6537    MacroEmissionCheckScope guard(this);
6538    vcvtp(dt1, dt2, rd, rm);
6539  }
6540
6541  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6542    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6543    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6544    VIXL_ASSERT(allow_macro_instructions_);
6545    VIXL_ASSERT(OutsideITBlock());
6546    MacroEmissionCheckScope guard(this);
6547    vcvtp(dt1, dt2, rd, rm);
6548  }
6549
6550  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6551    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6552    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6553    VIXL_ASSERT(allow_macro_instructions_);
6554    VIXL_ASSERT(OutsideITBlock());
6555    MacroEmissionCheckScope guard(this);
6556    vcvtp(dt1, dt2, rd, rm);
6557  }
6558
6559  void Vcvtr(
6560      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6561    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6562    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6563    VIXL_ASSERT(allow_macro_instructions_);
6564    VIXL_ASSERT(OutsideITBlock());
6565    MacroEmissionCheckScope guard(this);
6566    ITScope it_scope(this, &cond);
6567    vcvtr(cond, dt1, dt2, rd, rm);
6568  }
6569  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6570    Vcvtr(al, dt1, dt2, rd, rm);
6571  }
6572
6573  void Vcvtr(
6574      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6575    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6576    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6577    VIXL_ASSERT(allow_macro_instructions_);
6578    VIXL_ASSERT(OutsideITBlock());
6579    MacroEmissionCheckScope guard(this);
6580    ITScope it_scope(this, &cond);
6581    vcvtr(cond, dt1, dt2, rd, rm);
6582  }
6583  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6584    Vcvtr(al, dt1, dt2, rd, rm);
6585  }
6586
6587  void Vcvtt(
6588      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6589    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6590    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6591    VIXL_ASSERT(allow_macro_instructions_);
6592    VIXL_ASSERT(OutsideITBlock());
6593    MacroEmissionCheckScope guard(this);
6594    ITScope it_scope(this, &cond);
6595    vcvtt(cond, dt1, dt2, rd, rm);
6596  }
6597  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6598    Vcvtt(al, dt1, dt2, rd, rm);
6599  }
6600
6601  void Vcvtt(
6602      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6605    VIXL_ASSERT(allow_macro_instructions_);
6606    VIXL_ASSERT(OutsideITBlock());
6607    MacroEmissionCheckScope guard(this);
6608    ITScope it_scope(this, &cond);
6609    vcvtt(cond, dt1, dt2, rd, rm);
6610  }
6611  void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6612    Vcvtt(al, dt1, dt2, rd, rm);
6613  }
6614
6615  void Vcvtt(
6616      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6617    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6619    VIXL_ASSERT(allow_macro_instructions_);
6620    VIXL_ASSERT(OutsideITBlock());
6621    MacroEmissionCheckScope guard(this);
6622    ITScope it_scope(this, &cond);
6623    vcvtt(cond, dt1, dt2, rd, rm);
6624  }
6625  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6626    Vcvtt(al, dt1, dt2, rd, rm);
6627  }
6628
6629  void Vdiv(
6630      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6631    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6632    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6633    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6634    VIXL_ASSERT(allow_macro_instructions_);
6635    VIXL_ASSERT(OutsideITBlock());
6636    MacroEmissionCheckScope guard(this);
6637    ITScope it_scope(this, &cond);
6638    vdiv(cond, dt, rd, rn, rm);
6639  }
6640  void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6641    Vdiv(al, dt, rd, rn, rm);
6642  }
6643
6644  void Vdiv(
6645      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6646    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6647    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6648    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6649    VIXL_ASSERT(allow_macro_instructions_);
6650    VIXL_ASSERT(OutsideITBlock());
6651    MacroEmissionCheckScope guard(this);
6652    ITScope it_scope(this, &cond);
6653    vdiv(cond, dt, rd, rn, rm);
6654  }
6655  void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6656    Vdiv(al, dt, rd, rn, rm);
6657  }
6658
6659  void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) {
6660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6662    VIXL_ASSERT(allow_macro_instructions_);
6663    VIXL_ASSERT(OutsideITBlock());
6664    MacroEmissionCheckScope guard(this);
6665    ITScope it_scope(this, &cond);
6666    vdup(cond, dt, rd, rt);
6667  }
6668  void Vdup(DataType dt, QRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6669
6670  void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) {
6671    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6672    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6673    VIXL_ASSERT(allow_macro_instructions_);
6674    VIXL_ASSERT(OutsideITBlock());
6675    MacroEmissionCheckScope guard(this);
6676    ITScope it_scope(this, &cond);
6677    vdup(cond, dt, rd, rt);
6678  }
6679  void Vdup(DataType dt, DRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6680
6681  void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) {
6682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6684    VIXL_ASSERT(allow_macro_instructions_);
6685    VIXL_ASSERT(OutsideITBlock());
6686    MacroEmissionCheckScope guard(this);
6687    ITScope it_scope(this, &cond);
6688    vdup(cond, dt, rd, rm);
6689  }
6690  void Vdup(DataType dt, DRegister rd, DRegisterLane rm) {
6691    Vdup(al, dt, rd, rm);
6692  }
6693
6694  void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) {
6695    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6696    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6697    VIXL_ASSERT(allow_macro_instructions_);
6698    VIXL_ASSERT(OutsideITBlock());
6699    MacroEmissionCheckScope guard(this);
6700    ITScope it_scope(this, &cond);
6701    vdup(cond, dt, rd, rm);
6702  }
6703  void Vdup(DataType dt, QRegister rd, DRegisterLane rm) {
6704    Vdup(al, dt, rd, rm);
6705  }
6706
6707  void Veor(
6708      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6709    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6710    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6711    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6712    VIXL_ASSERT(allow_macro_instructions_);
6713    VIXL_ASSERT(OutsideITBlock());
6714    MacroEmissionCheckScope guard(this);
6715    ITScope it_scope(this, &cond);
6716    veor(cond, dt, rd, rn, rm);
6717  }
6718  void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6719    Veor(al, dt, rd, rn, rm);
6720  }
6721  void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6722    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6723  }
6724  void Veor(DRegister rd, DRegister rn, DRegister rm) {
6725    Veor(al, kDataTypeValueNone, rd, rn, rm);
6726  }
6727
6728  void Veor(
6729      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6733    VIXL_ASSERT(allow_macro_instructions_);
6734    VIXL_ASSERT(OutsideITBlock());
6735    MacroEmissionCheckScope guard(this);
6736    ITScope it_scope(this, &cond);
6737    veor(cond, dt, rd, rn, rm);
6738  }
6739  void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6740    Veor(al, dt, rd, rn, rm);
6741  }
6742  void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
6743    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6744  }
6745  void Veor(QRegister rd, QRegister rn, QRegister rm) {
6746    Veor(al, kDataTypeValueNone, rd, rn, rm);
6747  }
6748
6749  void Vext(Condition cond,
6750            DataType dt,
6751            DRegister rd,
6752            DRegister rn,
6753            DRegister rm,
6754            const DOperand& operand) {
6755    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6756    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6757    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6758    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6759    VIXL_ASSERT(allow_macro_instructions_);
6760    VIXL_ASSERT(OutsideITBlock());
6761    MacroEmissionCheckScope guard(this);
6762    ITScope it_scope(this, &cond);
6763    vext(cond, dt, rd, rn, rm, operand);
6764  }
6765  void Vext(DataType dt,
6766            DRegister rd,
6767            DRegister rn,
6768            DRegister rm,
6769            const DOperand& operand) {
6770    Vext(al, dt, rd, rn, rm, operand);
6771  }
6772
6773  void Vext(Condition cond,
6774            DataType dt,
6775            QRegister rd,
6776            QRegister rn,
6777            QRegister rm,
6778            const QOperand& operand) {
6779    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6780    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6781    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6782    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6783    VIXL_ASSERT(allow_macro_instructions_);
6784    VIXL_ASSERT(OutsideITBlock());
6785    MacroEmissionCheckScope guard(this);
6786    ITScope it_scope(this, &cond);
6787    vext(cond, dt, rd, rn, rm, operand);
6788  }
6789  void Vext(DataType dt,
6790            QRegister rd,
6791            QRegister rn,
6792            QRegister rm,
6793            const QOperand& operand) {
6794    Vext(al, dt, rd, rn, rm, operand);
6795  }
6796
6797  void Vfma(
6798      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6799    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6800    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6801    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6802    VIXL_ASSERT(allow_macro_instructions_);
6803    VIXL_ASSERT(OutsideITBlock());
6804    MacroEmissionCheckScope guard(this);
6805    ITScope it_scope(this, &cond);
6806    vfma(cond, dt, rd, rn, rm);
6807  }
6808  void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6809    Vfma(al, dt, rd, rn, rm);
6810  }
6811
6812  void Vfma(
6813      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6814    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6815    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6816    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6817    VIXL_ASSERT(allow_macro_instructions_);
6818    VIXL_ASSERT(OutsideITBlock());
6819    MacroEmissionCheckScope guard(this);
6820    ITScope it_scope(this, &cond);
6821    vfma(cond, dt, rd, rn, rm);
6822  }
6823  void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6824    Vfma(al, dt, rd, rn, rm);
6825  }
6826
6827  void Vfma(
6828      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6829    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6830    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6831    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6832    VIXL_ASSERT(allow_macro_instructions_);
6833    VIXL_ASSERT(OutsideITBlock());
6834    MacroEmissionCheckScope guard(this);
6835    ITScope it_scope(this, &cond);
6836    vfma(cond, dt, rd, rn, rm);
6837  }
6838  void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6839    Vfma(al, dt, rd, rn, rm);
6840  }
6841
6842  void Vfms(
6843      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6844    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6846    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6847    VIXL_ASSERT(allow_macro_instructions_);
6848    VIXL_ASSERT(OutsideITBlock());
6849    MacroEmissionCheckScope guard(this);
6850    ITScope it_scope(this, &cond);
6851    vfms(cond, dt, rd, rn, rm);
6852  }
6853  void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6854    Vfms(al, dt, rd, rn, rm);
6855  }
6856
6857  void Vfms(
6858      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6861    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6862    VIXL_ASSERT(allow_macro_instructions_);
6863    VIXL_ASSERT(OutsideITBlock());
6864    MacroEmissionCheckScope guard(this);
6865    ITScope it_scope(this, &cond);
6866    vfms(cond, dt, rd, rn, rm);
6867  }
6868  void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6869    Vfms(al, dt, rd, rn, rm);
6870  }
6871
6872  void Vfms(
6873      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6874    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6877    VIXL_ASSERT(allow_macro_instructions_);
6878    VIXL_ASSERT(OutsideITBlock());
6879    MacroEmissionCheckScope guard(this);
6880    ITScope it_scope(this, &cond);
6881    vfms(cond, dt, rd, rn, rm);
6882  }
6883  void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6884    Vfms(al, dt, rd, rn, rm);
6885  }
6886
6887  void Vfnma(
6888      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6889    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6892    VIXL_ASSERT(allow_macro_instructions_);
6893    VIXL_ASSERT(OutsideITBlock());
6894    MacroEmissionCheckScope guard(this);
6895    ITScope it_scope(this, &cond);
6896    vfnma(cond, dt, rd, rn, rm);
6897  }
6898  void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6899    Vfnma(al, dt, rd, rn, rm);
6900  }
6901
6902  void Vfnma(
6903      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6904    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6905    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6906    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6907    VIXL_ASSERT(allow_macro_instructions_);
6908    VIXL_ASSERT(OutsideITBlock());
6909    MacroEmissionCheckScope guard(this);
6910    ITScope it_scope(this, &cond);
6911    vfnma(cond, dt, rd, rn, rm);
6912  }
6913  void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6914    Vfnma(al, dt, rd, rn, rm);
6915  }
6916
6917  void Vfnms(
6918      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6919    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6920    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6921    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6922    VIXL_ASSERT(allow_macro_instructions_);
6923    VIXL_ASSERT(OutsideITBlock());
6924    MacroEmissionCheckScope guard(this);
6925    ITScope it_scope(this, &cond);
6926    vfnms(cond, dt, rd, rn, rm);
6927  }
6928  void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6929    Vfnms(al, dt, rd, rn, rm);
6930  }
6931
6932  void Vfnms(
6933      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6934    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6935    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6936    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6937    VIXL_ASSERT(allow_macro_instructions_);
6938    VIXL_ASSERT(OutsideITBlock());
6939    MacroEmissionCheckScope guard(this);
6940    ITScope it_scope(this, &cond);
6941    vfnms(cond, dt, rd, rn, rm);
6942  }
6943  void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6944    Vfnms(al, dt, rd, rn, rm);
6945  }
6946
6947  void Vhadd(
6948      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6952    VIXL_ASSERT(allow_macro_instructions_);
6953    VIXL_ASSERT(OutsideITBlock());
6954    MacroEmissionCheckScope guard(this);
6955    ITScope it_scope(this, &cond);
6956    vhadd(cond, dt, rd, rn, rm);
6957  }
6958  void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6959    Vhadd(al, dt, rd, rn, rm);
6960  }
6961
6962  void Vhadd(
6963      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6965    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6966    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6967    VIXL_ASSERT(allow_macro_instructions_);
6968    VIXL_ASSERT(OutsideITBlock());
6969    MacroEmissionCheckScope guard(this);
6970    ITScope it_scope(this, &cond);
6971    vhadd(cond, dt, rd, rn, rm);
6972  }
6973  void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6974    Vhadd(al, dt, rd, rn, rm);
6975  }
6976
6977  void Vhsub(
6978      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6979    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6980    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6981    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6982    VIXL_ASSERT(allow_macro_instructions_);
6983    VIXL_ASSERT(OutsideITBlock());
6984    MacroEmissionCheckScope guard(this);
6985    ITScope it_scope(this, &cond);
6986    vhsub(cond, dt, rd, rn, rm);
6987  }
6988  void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6989    Vhsub(al, dt, rd, rn, rm);
6990  }
6991
6992  void Vhsub(
6993      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6997    VIXL_ASSERT(allow_macro_instructions_);
6998    VIXL_ASSERT(OutsideITBlock());
6999    MacroEmissionCheckScope guard(this);
7000    ITScope it_scope(this, &cond);
7001    vhsub(cond, dt, rd, rn, rm);
7002  }
7003  void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7004    Vhsub(al, dt, rd, rn, rm);
7005  }
7006
7007  void Vld1(Condition cond,
7008            DataType dt,
7009            const NeonRegisterList& nreglist,
7010            const AlignedMemOperand& operand) {
7011    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7012    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7013    VIXL_ASSERT(allow_macro_instructions_);
7014    VIXL_ASSERT(OutsideITBlock());
7015    MacroEmissionCheckScope guard(this);
7016    ITScope it_scope(this, &cond);
7017    vld1(cond, dt, nreglist, operand);
7018  }
7019  void Vld1(DataType dt,
7020            const NeonRegisterList& nreglist,
7021            const AlignedMemOperand& operand) {
7022    Vld1(al, dt, nreglist, operand);
7023  }
7024
7025  void Vld2(Condition cond,
7026            DataType dt,
7027            const NeonRegisterList& nreglist,
7028            const AlignedMemOperand& operand) {
7029    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7030    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7031    VIXL_ASSERT(allow_macro_instructions_);
7032    VIXL_ASSERT(OutsideITBlock());
7033    MacroEmissionCheckScope guard(this);
7034    ITScope it_scope(this, &cond);
7035    vld2(cond, dt, nreglist, operand);
7036  }
7037  void Vld2(DataType dt,
7038            const NeonRegisterList& nreglist,
7039            const AlignedMemOperand& operand) {
7040    Vld2(al, dt, nreglist, operand);
7041  }
7042
7043  void Vld3(Condition cond,
7044            DataType dt,
7045            const NeonRegisterList& nreglist,
7046            const AlignedMemOperand& operand) {
7047    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7048    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7049    VIXL_ASSERT(allow_macro_instructions_);
7050    VIXL_ASSERT(OutsideITBlock());
7051    MacroEmissionCheckScope guard(this);
7052    ITScope it_scope(this, &cond);
7053    vld3(cond, dt, nreglist, operand);
7054  }
7055  void Vld3(DataType dt,
7056            const NeonRegisterList& nreglist,
7057            const AlignedMemOperand& operand) {
7058    Vld3(al, dt, nreglist, operand);
7059  }
7060
7061  void Vld3(Condition cond,
7062            DataType dt,
7063            const NeonRegisterList& nreglist,
7064            const MemOperand& operand) {
7065    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7066    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7067    VIXL_ASSERT(allow_macro_instructions_);
7068    VIXL_ASSERT(OutsideITBlock());
7069    MacroEmissionCheckScope guard(this);
7070    ITScope it_scope(this, &cond);
7071    vld3(cond, dt, nreglist, operand);
7072  }
7073  void Vld3(DataType dt,
7074            const NeonRegisterList& nreglist,
7075            const MemOperand& operand) {
7076    Vld3(al, dt, nreglist, operand);
7077  }
7078
7079  void Vld4(Condition cond,
7080            DataType dt,
7081            const NeonRegisterList& nreglist,
7082            const AlignedMemOperand& operand) {
7083    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7084    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7085    VIXL_ASSERT(allow_macro_instructions_);
7086    VIXL_ASSERT(OutsideITBlock());
7087    MacroEmissionCheckScope guard(this);
7088    ITScope it_scope(this, &cond);
7089    vld4(cond, dt, nreglist, operand);
7090  }
7091  void Vld4(DataType dt,
7092            const NeonRegisterList& nreglist,
7093            const AlignedMemOperand& operand) {
7094    Vld4(al, dt, nreglist, operand);
7095  }
7096
7097  void Vldm(Condition cond,
7098            DataType dt,
7099            Register rn,
7100            WriteBack write_back,
7101            DRegisterList dreglist) {
7102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7103    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7104    VIXL_ASSERT(allow_macro_instructions_);
7105    VIXL_ASSERT(OutsideITBlock());
7106    MacroEmissionCheckScope guard(this);
7107    ITScope it_scope(this, &cond);
7108    vldm(cond, dt, rn, write_back, dreglist);
7109  }
7110  void Vldm(DataType dt,
7111            Register rn,
7112            WriteBack write_back,
7113            DRegisterList dreglist) {
7114    Vldm(al, dt, rn, write_back, dreglist);
7115  }
7116  void Vldm(Condition cond,
7117            Register rn,
7118            WriteBack write_back,
7119            DRegisterList dreglist) {
7120    Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist);
7121  }
7122  void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) {
7123    Vldm(al, kDataTypeValueNone, rn, write_back, dreglist);
7124  }
7125
7126  void Vldm(Condition cond,
7127            DataType dt,
7128            Register rn,
7129            WriteBack write_back,
7130            SRegisterList sreglist) {
7131    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7132    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7133    VIXL_ASSERT(allow_macro_instructions_);
7134    VIXL_ASSERT(OutsideITBlock());
7135    MacroEmissionCheckScope guard(this);
7136    ITScope it_scope(this, &cond);
7137    vldm(cond, dt, rn, write_back, sreglist);
7138  }
7139  void Vldm(DataType dt,
7140            Register rn,
7141            WriteBack write_back,
7142            SRegisterList sreglist) {
7143    Vldm(al, dt, rn, write_back, sreglist);
7144  }
7145  void Vldm(Condition cond,
7146            Register rn,
7147            WriteBack write_back,
7148            SRegisterList sreglist) {
7149    Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist);
7150  }
7151  void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) {
7152    Vldm(al, kDataTypeValueNone, rn, write_back, sreglist);
7153  }
7154
7155  void Vldmdb(Condition cond,
7156              DataType dt,
7157              Register rn,
7158              WriteBack write_back,
7159              DRegisterList dreglist) {
7160    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7161    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7162    VIXL_ASSERT(allow_macro_instructions_);
7163    VIXL_ASSERT(OutsideITBlock());
7164    MacroEmissionCheckScope guard(this);
7165    ITScope it_scope(this, &cond);
7166    vldmdb(cond, dt, rn, write_back, dreglist);
7167  }
7168  void Vldmdb(DataType dt,
7169              Register rn,
7170              WriteBack write_back,
7171              DRegisterList dreglist) {
7172    Vldmdb(al, dt, rn, write_back, dreglist);
7173  }
7174  void Vldmdb(Condition cond,
7175              Register rn,
7176              WriteBack write_back,
7177              DRegisterList dreglist) {
7178    Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
7179  }
7180  void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
7181    Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
7182  }
7183
7184  void Vldmdb(Condition cond,
7185              DataType dt,
7186              Register rn,
7187              WriteBack write_back,
7188              SRegisterList sreglist) {
7189    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7190    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7191    VIXL_ASSERT(allow_macro_instructions_);
7192    VIXL_ASSERT(OutsideITBlock());
7193    MacroEmissionCheckScope guard(this);
7194    ITScope it_scope(this, &cond);
7195    vldmdb(cond, dt, rn, write_back, sreglist);
7196  }
7197  void Vldmdb(DataType dt,
7198              Register rn,
7199              WriteBack write_back,
7200              SRegisterList sreglist) {
7201    Vldmdb(al, dt, rn, write_back, sreglist);
7202  }
7203  void Vldmdb(Condition cond,
7204              Register rn,
7205              WriteBack write_back,
7206              SRegisterList sreglist) {
7207    Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
7208  }
7209  void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
7210    Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
7211  }
7212
7213  void Vldmia(Condition cond,
7214              DataType dt,
7215              Register rn,
7216              WriteBack write_back,
7217              DRegisterList dreglist) {
7218    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7219    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7220    VIXL_ASSERT(allow_macro_instructions_);
7221    VIXL_ASSERT(OutsideITBlock());
7222    MacroEmissionCheckScope guard(this);
7223    ITScope it_scope(this, &cond);
7224    vldmia(cond, dt, rn, write_back, dreglist);
7225  }
7226  void Vldmia(DataType dt,
7227              Register rn,
7228              WriteBack write_back,
7229              DRegisterList dreglist) {
7230    Vldmia(al, dt, rn, write_back, dreglist);
7231  }
7232  void Vldmia(Condition cond,
7233              Register rn,
7234              WriteBack write_back,
7235              DRegisterList dreglist) {
7236    Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
7237  }
7238  void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
7239    Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist);
7240  }
7241
7242  void Vldmia(Condition cond,
7243              DataType dt,
7244              Register rn,
7245              WriteBack write_back,
7246              SRegisterList sreglist) {
7247    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7248    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7249    VIXL_ASSERT(allow_macro_instructions_);
7250    VIXL_ASSERT(OutsideITBlock());
7251    MacroEmissionCheckScope guard(this);
7252    ITScope it_scope(this, &cond);
7253    vldmia(cond, dt, rn, write_back, sreglist);
7254  }
7255  void Vldmia(DataType dt,
7256              Register rn,
7257              WriteBack write_back,
7258              SRegisterList sreglist) {
7259    Vldmia(al, dt, rn, write_back, sreglist);
7260  }
7261  void Vldmia(Condition cond,
7262              Register rn,
7263              WriteBack write_back,
7264              SRegisterList sreglist) {
7265    Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
7266  }
7267  void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
7268    Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist);
7269  }
7270
7271  void Vldr(Condition cond, DataType dt, DRegister rd, Label* label) {
7272    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7273    VIXL_ASSERT(allow_macro_instructions_);
7274    VIXL_ASSERT(OutsideITBlock());
7275    MacroEmissionCheckScope guard(this);
7276    ITScope it_scope(this, &cond);
7277    vldr(cond, dt, rd, label);
7278  }
7279  void Vldr(DataType dt, DRegister rd, Label* label) {
7280    Vldr(al, dt, rd, label);
7281  }
7282  void Vldr(Condition cond, DRegister rd, Label* label) {
7283    Vldr(cond, Untyped64, rd, label);
7284  }
7285  void Vldr(DRegister rd, Label* label) { Vldr(al, Untyped64, rd, label); }
7286
7287  void Vldr(Condition cond,
7288            DataType dt,
7289            DRegister rd,
7290            const MemOperand& operand) {
7291    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7292    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7293    VIXL_ASSERT(allow_macro_instructions_);
7294    VIXL_ASSERT(OutsideITBlock());
7295    MacroEmissionCheckScope guard(this);
7296    ITScope it_scope(this, &cond);
7297    vldr(cond, dt, rd, operand);
7298  }
7299  void Vldr(DataType dt, DRegister rd, const MemOperand& operand) {
7300    Vldr(al, dt, rd, operand);
7301  }
7302  void Vldr(Condition cond, DRegister rd, const MemOperand& operand) {
7303    Vldr(cond, Untyped64, rd, operand);
7304  }
7305  void Vldr(DRegister rd, const MemOperand& operand) {
7306    Vldr(al, Untyped64, rd, operand);
7307  }
7308
7309  void Vldr(Condition cond, DataType dt, SRegister rd, Label* label) {
7310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7311    VIXL_ASSERT(allow_macro_instructions_);
7312    VIXL_ASSERT(OutsideITBlock());
7313    MacroEmissionCheckScope guard(this);
7314    ITScope it_scope(this, &cond);
7315    vldr(cond, dt, rd, label);
7316  }
7317  void Vldr(DataType dt, SRegister rd, Label* label) {
7318    Vldr(al, dt, rd, label);
7319  }
7320  void Vldr(Condition cond, SRegister rd, Label* label) {
7321    Vldr(cond, Untyped32, rd, label);
7322  }
7323  void Vldr(SRegister rd, Label* label) { Vldr(al, Untyped32, rd, label); }
7324
7325  void Vldr(Condition cond,
7326            DataType dt,
7327            SRegister rd,
7328            const MemOperand& operand) {
7329    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7330    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7331    VIXL_ASSERT(allow_macro_instructions_);
7332    VIXL_ASSERT(OutsideITBlock());
7333    MacroEmissionCheckScope guard(this);
7334    ITScope it_scope(this, &cond);
7335    vldr(cond, dt, rd, operand);
7336  }
7337  void Vldr(DataType dt, SRegister rd, const MemOperand& operand) {
7338    Vldr(al, dt, rd, operand);
7339  }
7340  void Vldr(Condition cond, SRegister rd, const MemOperand& operand) {
7341    Vldr(cond, Untyped32, rd, operand);
7342  }
7343  void Vldr(SRegister rd, const MemOperand& operand) {
7344    Vldr(al, Untyped32, rd, operand);
7345  }
7346
7347  void Vmax(
7348      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7349    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7350    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7351    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7352    VIXL_ASSERT(allow_macro_instructions_);
7353    VIXL_ASSERT(OutsideITBlock());
7354    MacroEmissionCheckScope guard(this);
7355    ITScope it_scope(this, &cond);
7356    vmax(cond, dt, rd, rn, rm);
7357  }
7358  void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7359    Vmax(al, dt, rd, rn, rm);
7360  }
7361
7362  void Vmax(
7363      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7364    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7365    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7366    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7367    VIXL_ASSERT(allow_macro_instructions_);
7368    VIXL_ASSERT(OutsideITBlock());
7369    MacroEmissionCheckScope guard(this);
7370    ITScope it_scope(this, &cond);
7371    vmax(cond, dt, rd, rn, rm);
7372  }
7373  void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7374    Vmax(al, dt, rd, rn, rm);
7375  }
7376
7377  void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7378    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7379    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7380    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7381    VIXL_ASSERT(allow_macro_instructions_);
7382    VIXL_ASSERT(OutsideITBlock());
7383    MacroEmissionCheckScope guard(this);
7384    vmaxnm(dt, rd, rn, rm);
7385  }
7386
7387  void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7388    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7389    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7390    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7391    VIXL_ASSERT(allow_macro_instructions_);
7392    VIXL_ASSERT(OutsideITBlock());
7393    MacroEmissionCheckScope guard(this);
7394    vmaxnm(dt, rd, rn, rm);
7395  }
7396
7397  void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7398    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7399    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7401    VIXL_ASSERT(allow_macro_instructions_);
7402    VIXL_ASSERT(OutsideITBlock());
7403    MacroEmissionCheckScope guard(this);
7404    vmaxnm(dt, rd, rn, rm);
7405  }
7406
7407  void Vmin(
7408      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7409    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7410    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7411    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7412    VIXL_ASSERT(allow_macro_instructions_);
7413    VIXL_ASSERT(OutsideITBlock());
7414    MacroEmissionCheckScope guard(this);
7415    ITScope it_scope(this, &cond);
7416    vmin(cond, dt, rd, rn, rm);
7417  }
7418  void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7419    Vmin(al, dt, rd, rn, rm);
7420  }
7421
7422  void Vmin(
7423      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7427    VIXL_ASSERT(allow_macro_instructions_);
7428    VIXL_ASSERT(OutsideITBlock());
7429    MacroEmissionCheckScope guard(this);
7430    ITScope it_scope(this, &cond);
7431    vmin(cond, dt, rd, rn, rm);
7432  }
7433  void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7434    Vmin(al, dt, rd, rn, rm);
7435  }
7436
7437  void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7438    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7441    VIXL_ASSERT(allow_macro_instructions_);
7442    VIXL_ASSERT(OutsideITBlock());
7443    MacroEmissionCheckScope guard(this);
7444    vminnm(dt, rd, rn, rm);
7445  }
7446
7447  void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7448    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7450    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7451    VIXL_ASSERT(allow_macro_instructions_);
7452    VIXL_ASSERT(OutsideITBlock());
7453    MacroEmissionCheckScope guard(this);
7454    vminnm(dt, rd, rn, rm);
7455  }
7456
7457  void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7458    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7459    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7460    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7461    VIXL_ASSERT(allow_macro_instructions_);
7462    VIXL_ASSERT(OutsideITBlock());
7463    MacroEmissionCheckScope guard(this);
7464    vminnm(dt, rd, rn, rm);
7465  }
7466
7467  void Vmla(Condition cond,
7468            DataType dt,
7469            DRegister rd,
7470            DRegister rn,
7471            DRegisterLane rm) {
7472    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7473    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7474    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7475    VIXL_ASSERT(allow_macro_instructions_);
7476    VIXL_ASSERT(OutsideITBlock());
7477    MacroEmissionCheckScope guard(this);
7478    ITScope it_scope(this, &cond);
7479    vmla(cond, dt, rd, rn, rm);
7480  }
7481  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7482    Vmla(al, dt, rd, rn, rm);
7483  }
7484
7485  void Vmla(Condition cond,
7486            DataType dt,
7487            QRegister rd,
7488            QRegister rn,
7489            DRegisterLane rm) {
7490    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7491    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7493    VIXL_ASSERT(allow_macro_instructions_);
7494    VIXL_ASSERT(OutsideITBlock());
7495    MacroEmissionCheckScope guard(this);
7496    ITScope it_scope(this, &cond);
7497    vmla(cond, dt, rd, rn, rm);
7498  }
7499  void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7500    Vmla(al, dt, rd, rn, rm);
7501  }
7502
7503  void Vmla(
7504      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7505    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7506    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7508    VIXL_ASSERT(allow_macro_instructions_);
7509    VIXL_ASSERT(OutsideITBlock());
7510    MacroEmissionCheckScope guard(this);
7511    ITScope it_scope(this, &cond);
7512    vmla(cond, dt, rd, rn, rm);
7513  }
7514  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7515    Vmla(al, dt, rd, rn, rm);
7516  }
7517
7518  void Vmla(
7519      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7520    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7521    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7522    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7523    VIXL_ASSERT(allow_macro_instructions_);
7524    VIXL_ASSERT(OutsideITBlock());
7525    MacroEmissionCheckScope guard(this);
7526    ITScope it_scope(this, &cond);
7527    vmla(cond, dt, rd, rn, rm);
7528  }
7529  void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7530    Vmla(al, dt, rd, rn, rm);
7531  }
7532
7533  void Vmla(
7534      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7535    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7536    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7537    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7538    VIXL_ASSERT(allow_macro_instructions_);
7539    VIXL_ASSERT(OutsideITBlock());
7540    MacroEmissionCheckScope guard(this);
7541    ITScope it_scope(this, &cond);
7542    vmla(cond, dt, rd, rn, rm);
7543  }
7544  void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7545    Vmla(al, dt, rd, rn, rm);
7546  }
7547
7548  void Vmlal(Condition cond,
7549             DataType dt,
7550             QRegister rd,
7551             DRegister rn,
7552             DRegisterLane rm) {
7553    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7556    VIXL_ASSERT(allow_macro_instructions_);
7557    VIXL_ASSERT(OutsideITBlock());
7558    MacroEmissionCheckScope guard(this);
7559    ITScope it_scope(this, &cond);
7560    vmlal(cond, dt, rd, rn, rm);
7561  }
7562  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7563    Vmlal(al, dt, rd, rn, rm);
7564  }
7565
7566  void Vmlal(
7567      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7571    VIXL_ASSERT(allow_macro_instructions_);
7572    VIXL_ASSERT(OutsideITBlock());
7573    MacroEmissionCheckScope guard(this);
7574    ITScope it_scope(this, &cond);
7575    vmlal(cond, dt, rd, rn, rm);
7576  }
7577  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7578    Vmlal(al, dt, rd, rn, rm);
7579  }
7580
7581  void Vmls(Condition cond,
7582            DataType dt,
7583            DRegister rd,
7584            DRegister rn,
7585            DRegisterLane rm) {
7586    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7587    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7589    VIXL_ASSERT(allow_macro_instructions_);
7590    VIXL_ASSERT(OutsideITBlock());
7591    MacroEmissionCheckScope guard(this);
7592    ITScope it_scope(this, &cond);
7593    vmls(cond, dt, rd, rn, rm);
7594  }
7595  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7596    Vmls(al, dt, rd, rn, rm);
7597  }
7598
7599  void Vmls(Condition cond,
7600            DataType dt,
7601            QRegister rd,
7602            QRegister rn,
7603            DRegisterLane rm) {
7604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7607    VIXL_ASSERT(allow_macro_instructions_);
7608    VIXL_ASSERT(OutsideITBlock());
7609    MacroEmissionCheckScope guard(this);
7610    ITScope it_scope(this, &cond);
7611    vmls(cond, dt, rd, rn, rm);
7612  }
7613  void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7614    Vmls(al, dt, rd, rn, rm);
7615  }
7616
7617  void Vmls(
7618      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7621    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7622    VIXL_ASSERT(allow_macro_instructions_);
7623    VIXL_ASSERT(OutsideITBlock());
7624    MacroEmissionCheckScope guard(this);
7625    ITScope it_scope(this, &cond);
7626    vmls(cond, dt, rd, rn, rm);
7627  }
7628  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7629    Vmls(al, dt, rd, rn, rm);
7630  }
7631
7632  void Vmls(
7633      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7636    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7637    VIXL_ASSERT(allow_macro_instructions_);
7638    VIXL_ASSERT(OutsideITBlock());
7639    MacroEmissionCheckScope guard(this);
7640    ITScope it_scope(this, &cond);
7641    vmls(cond, dt, rd, rn, rm);
7642  }
7643  void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7644    Vmls(al, dt, rd, rn, rm);
7645  }
7646
7647  void Vmls(
7648      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7649    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7651    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7652    VIXL_ASSERT(allow_macro_instructions_);
7653    VIXL_ASSERT(OutsideITBlock());
7654    MacroEmissionCheckScope guard(this);
7655    ITScope it_scope(this, &cond);
7656    vmls(cond, dt, rd, rn, rm);
7657  }
7658  void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7659    Vmls(al, dt, rd, rn, rm);
7660  }
7661
7662  void Vmlsl(Condition cond,
7663             DataType dt,
7664             QRegister rd,
7665             DRegister rn,
7666             DRegisterLane rm) {
7667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7670    VIXL_ASSERT(allow_macro_instructions_);
7671    VIXL_ASSERT(OutsideITBlock());
7672    MacroEmissionCheckScope guard(this);
7673    ITScope it_scope(this, &cond);
7674    vmlsl(cond, dt, rd, rn, rm);
7675  }
7676  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7677    Vmlsl(al, dt, rd, rn, rm);
7678  }
7679
7680  void Vmlsl(
7681      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7685    VIXL_ASSERT(allow_macro_instructions_);
7686    VIXL_ASSERT(OutsideITBlock());
7687    MacroEmissionCheckScope guard(this);
7688    ITScope it_scope(this, &cond);
7689    vmlsl(cond, dt, rd, rn, rm);
7690  }
7691  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7692    Vmlsl(al, dt, rd, rn, rm);
7693  }
7694
7695  void Vmov(Condition cond, Register rt, SRegister rn) {
7696    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7698    VIXL_ASSERT(allow_macro_instructions_);
7699    VIXL_ASSERT(OutsideITBlock());
7700    MacroEmissionCheckScope guard(this);
7701    ITScope it_scope(this, &cond);
7702    vmov(cond, rt, rn);
7703  }
7704  void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); }
7705
7706  void Vmov(Condition cond, SRegister rn, Register rt) {
7707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7708    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7709    VIXL_ASSERT(allow_macro_instructions_);
7710    VIXL_ASSERT(OutsideITBlock());
7711    MacroEmissionCheckScope guard(this);
7712    ITScope it_scope(this, &cond);
7713    vmov(cond, rn, rt);
7714  }
7715  void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); }
7716
7717  void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) {
7718    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7720    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7721    VIXL_ASSERT(allow_macro_instructions_);
7722    VIXL_ASSERT(OutsideITBlock());
7723    MacroEmissionCheckScope guard(this);
7724    ITScope it_scope(this, &cond);
7725    vmov(cond, rt, rt2, rm);
7726  }
7727  void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); }
7728
7729  void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) {
7730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7733    VIXL_ASSERT(allow_macro_instructions_);
7734    VIXL_ASSERT(OutsideITBlock());
7735    MacroEmissionCheckScope guard(this);
7736    ITScope it_scope(this, &cond);
7737    vmov(cond, rm, rt, rt2);
7738  }
7739  void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); }
7740
7741  void Vmov(
7742      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) {
7743    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7744    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7745    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7746    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7747    VIXL_ASSERT(allow_macro_instructions_);
7748    VIXL_ASSERT(OutsideITBlock());
7749    MacroEmissionCheckScope guard(this);
7750    ITScope it_scope(this, &cond);
7751    vmov(cond, rt, rt2, rm, rm1);
7752  }
7753  void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) {
7754    Vmov(al, rt, rt2, rm, rm1);
7755  }
7756
7757  void Vmov(
7758      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) {
7759    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7760    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7761    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7762    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7763    VIXL_ASSERT(allow_macro_instructions_);
7764    VIXL_ASSERT(OutsideITBlock());
7765    MacroEmissionCheckScope guard(this);
7766    ITScope it_scope(this, &cond);
7767    vmov(cond, rm, rm1, rt, rt2);
7768  }
7769  void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) {
7770    Vmov(al, rm, rm1, rt, rt2);
7771  }
7772
7773  void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) {
7774    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7775    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7776    VIXL_ASSERT(allow_macro_instructions_);
7777    VIXL_ASSERT(OutsideITBlock());
7778    MacroEmissionCheckScope guard(this);
7779    ITScope it_scope(this, &cond);
7780    vmov(cond, dt, rd, rt);
7781  }
7782  void Vmov(DataType dt, DRegisterLane rd, Register rt) {
7783    Vmov(al, dt, rd, rt);
7784  }
7785  void Vmov(Condition cond, DRegisterLane rd, Register rt) {
7786    Vmov(cond, kDataTypeValueNone, rd, rt);
7787  }
7788  void Vmov(DRegisterLane rd, Register rt) {
7789    Vmov(al, kDataTypeValueNone, rd, rt);
7790  }
7791
7792  void Vmov(Condition cond,
7793            DataType dt,
7794            DRegister rd,
7795            const DOperand& operand) {
7796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7797    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7798    VIXL_ASSERT(allow_macro_instructions_);
7799    VIXL_ASSERT(OutsideITBlock());
7800    MacroEmissionCheckScope guard(this);
7801    ITScope it_scope(this, &cond);
7802    vmov(cond, dt, rd, operand);
7803  }
7804  void Vmov(DataType dt, DRegister rd, const DOperand& operand) {
7805    Vmov(al, dt, rd, operand);
7806  }
7807
7808  void Vmov(Condition cond,
7809            DataType dt,
7810            QRegister rd,
7811            const QOperand& operand) {
7812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7813    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7814    VIXL_ASSERT(allow_macro_instructions_);
7815    VIXL_ASSERT(OutsideITBlock());
7816    MacroEmissionCheckScope guard(this);
7817    ITScope it_scope(this, &cond);
7818    vmov(cond, dt, rd, operand);
7819  }
7820  void Vmov(DataType dt, QRegister rd, const QOperand& operand) {
7821    Vmov(al, dt, rd, operand);
7822  }
7823
7824  void Vmov(Condition cond,
7825            DataType dt,
7826            SRegister rd,
7827            const SOperand& operand) {
7828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7829    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7830    VIXL_ASSERT(allow_macro_instructions_);
7831    VIXL_ASSERT(OutsideITBlock());
7832    MacroEmissionCheckScope guard(this);
7833    ITScope it_scope(this, &cond);
7834    vmov(cond, dt, rd, operand);
7835  }
7836  void Vmov(DataType dt, SRegister rd, const SOperand& operand) {
7837    Vmov(al, dt, rd, operand);
7838  }
7839
7840  void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) {
7841    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7843    VIXL_ASSERT(allow_macro_instructions_);
7844    VIXL_ASSERT(OutsideITBlock());
7845    MacroEmissionCheckScope guard(this);
7846    ITScope it_scope(this, &cond);
7847    vmov(cond, dt, rt, rn);
7848  }
7849  void Vmov(DataType dt, Register rt, DRegisterLane rn) {
7850    Vmov(al, dt, rt, rn);
7851  }
7852  void Vmov(Condition cond, Register rt, DRegisterLane rn) {
7853    Vmov(cond, kDataTypeValueNone, rt, rn);
7854  }
7855  void Vmov(Register rt, DRegisterLane rn) {
7856    Vmov(al, kDataTypeValueNone, rt, rn);
7857  }
7858
7859  void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) {
7860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7861    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7862    VIXL_ASSERT(allow_macro_instructions_);
7863    VIXL_ASSERT(OutsideITBlock());
7864    MacroEmissionCheckScope guard(this);
7865    ITScope it_scope(this, &cond);
7866    vmovl(cond, dt, rd, rm);
7867  }
7868  void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); }
7869
7870  void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
7871    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7872    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7873    VIXL_ASSERT(allow_macro_instructions_);
7874    VIXL_ASSERT(OutsideITBlock());
7875    MacroEmissionCheckScope guard(this);
7876    ITScope it_scope(this, &cond);
7877    vmovn(cond, dt, rd, rm);
7878  }
7879  void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); }
7880
7881  void Vmrs(Condition cond,
7882            RegisterOrAPSR_nzcv rt,
7883            SpecialFPRegister spec_reg) {
7884    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7885    VIXL_ASSERT(allow_macro_instructions_);
7886    VIXL_ASSERT(OutsideITBlock());
7887    MacroEmissionCheckScope guard(this);
7888    ITScope it_scope(this, &cond);
7889    vmrs(cond, rt, spec_reg);
7890  }
7891  void Vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) {
7892    Vmrs(al, rt, spec_reg);
7893  }
7894
7895  void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) {
7896    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7897    VIXL_ASSERT(allow_macro_instructions_);
7898    VIXL_ASSERT(OutsideITBlock());
7899    MacroEmissionCheckScope guard(this);
7900    ITScope it_scope(this, &cond);
7901    vmsr(cond, spec_reg, rt);
7902  }
7903  void Vmsr(SpecialFPRegister spec_reg, Register rt) { Vmsr(al, spec_reg, rt); }
7904
7905  void Vmul(Condition cond,
7906            DataType dt,
7907            DRegister rd,
7908            DRegister rn,
7909            DRegister dm,
7910            unsigned index) {
7911    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7912    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7913    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
7914    VIXL_ASSERT(allow_macro_instructions_);
7915    VIXL_ASSERT(OutsideITBlock());
7916    MacroEmissionCheckScope guard(this);
7917    ITScope it_scope(this, &cond);
7918    vmul(cond, dt, rd, rn, dm, index);
7919  }
7920  void Vmul(
7921      DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) {
7922    Vmul(al, dt, rd, rn, dm, index);
7923  }
7924
7925  void Vmul(Condition cond,
7926            DataType dt,
7927            QRegister rd,
7928            QRegister rn,
7929            DRegister dm,
7930            unsigned index) {
7931    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7932    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7933    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
7934    VIXL_ASSERT(allow_macro_instructions_);
7935    VIXL_ASSERT(OutsideITBlock());
7936    MacroEmissionCheckScope guard(this);
7937    ITScope it_scope(this, &cond);
7938    vmul(cond, dt, rd, rn, dm, index);
7939  }
7940  void Vmul(
7941      DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) {
7942    Vmul(al, dt, rd, rn, dm, index);
7943  }
7944
7945  void Vmul(
7946      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7947    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7948    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7949    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7950    VIXL_ASSERT(allow_macro_instructions_);
7951    VIXL_ASSERT(OutsideITBlock());
7952    MacroEmissionCheckScope guard(this);
7953    ITScope it_scope(this, &cond);
7954    vmul(cond, dt, rd, rn, rm);
7955  }
7956  void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7957    Vmul(al, dt, rd, rn, rm);
7958  }
7959
7960  void Vmul(
7961      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7962    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7963    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7965    VIXL_ASSERT(allow_macro_instructions_);
7966    VIXL_ASSERT(OutsideITBlock());
7967    MacroEmissionCheckScope guard(this);
7968    ITScope it_scope(this, &cond);
7969    vmul(cond, dt, rd, rn, rm);
7970  }
7971  void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7972    Vmul(al, dt, rd, rn, rm);
7973  }
7974
7975  void Vmul(
7976      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7977    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7978    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7979    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7980    VIXL_ASSERT(allow_macro_instructions_);
7981    VIXL_ASSERT(OutsideITBlock());
7982    MacroEmissionCheckScope guard(this);
7983    ITScope it_scope(this, &cond);
7984    vmul(cond, dt, rd, rn, rm);
7985  }
7986  void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7987    Vmul(al, dt, rd, rn, rm);
7988  }
7989
7990  void Vmull(Condition cond,
7991             DataType dt,
7992             QRegister rd,
7993             DRegister rn,
7994             DRegister dm,
7995             unsigned index) {
7996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7997    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7998    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
7999    VIXL_ASSERT(allow_macro_instructions_);
8000    VIXL_ASSERT(OutsideITBlock());
8001    MacroEmissionCheckScope guard(this);
8002    ITScope it_scope(this, &cond);
8003    vmull(cond, dt, rd, rn, dm, index);
8004  }
8005  void Vmull(
8006      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8007    Vmull(al, dt, rd, rn, dm, index);
8008  }
8009
8010  void Vmull(
8011      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8012    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8013    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8014    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8015    VIXL_ASSERT(allow_macro_instructions_);
8016    VIXL_ASSERT(OutsideITBlock());
8017    MacroEmissionCheckScope guard(this);
8018    ITScope it_scope(this, &cond);
8019    vmull(cond, dt, rd, rn, rm);
8020  }
8021  void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8022    Vmull(al, dt, rd, rn, rm);
8023  }
8024
8025  void Vmvn(Condition cond,
8026            DataType dt,
8027            DRegister rd,
8028            const DOperand& operand) {
8029    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8030    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8031    VIXL_ASSERT(allow_macro_instructions_);
8032    VIXL_ASSERT(OutsideITBlock());
8033    MacroEmissionCheckScope guard(this);
8034    ITScope it_scope(this, &cond);
8035    vmvn(cond, dt, rd, operand);
8036  }
8037  void Vmvn(DataType dt, DRegister rd, const DOperand& operand) {
8038    Vmvn(al, dt, rd, operand);
8039  }
8040
8041  void Vmvn(Condition cond,
8042            DataType dt,
8043            QRegister rd,
8044            const QOperand& operand) {
8045    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8046    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8047    VIXL_ASSERT(allow_macro_instructions_);
8048    VIXL_ASSERT(OutsideITBlock());
8049    MacroEmissionCheckScope guard(this);
8050    ITScope it_scope(this, &cond);
8051    vmvn(cond, dt, rd, operand);
8052  }
8053  void Vmvn(DataType dt, QRegister rd, const QOperand& operand) {
8054    Vmvn(al, dt, rd, operand);
8055  }
8056
8057  void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8058    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8059    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8060    VIXL_ASSERT(allow_macro_instructions_);
8061    VIXL_ASSERT(OutsideITBlock());
8062    MacroEmissionCheckScope guard(this);
8063    ITScope it_scope(this, &cond);
8064    vneg(cond, dt, rd, rm);
8065  }
8066  void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); }
8067
8068  void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8070    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8071    VIXL_ASSERT(allow_macro_instructions_);
8072    VIXL_ASSERT(OutsideITBlock());
8073    MacroEmissionCheckScope guard(this);
8074    ITScope it_scope(this, &cond);
8075    vneg(cond, dt, rd, rm);
8076  }
8077  void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); }
8078
8079  void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) {
8080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8081    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8082    VIXL_ASSERT(allow_macro_instructions_);
8083    VIXL_ASSERT(OutsideITBlock());
8084    MacroEmissionCheckScope guard(this);
8085    ITScope it_scope(this, &cond);
8086    vneg(cond, dt, rd, rm);
8087  }
8088  void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); }
8089
8090  void Vnmla(
8091      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8092    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8093    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8095    VIXL_ASSERT(allow_macro_instructions_);
8096    VIXL_ASSERT(OutsideITBlock());
8097    MacroEmissionCheckScope guard(this);
8098    ITScope it_scope(this, &cond);
8099    vnmla(cond, dt, rd, rn, rm);
8100  }
8101  void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8102    Vnmla(al, dt, rd, rn, rm);
8103  }
8104
8105  void Vnmla(
8106      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8107    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8109    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8110    VIXL_ASSERT(allow_macro_instructions_);
8111    VIXL_ASSERT(OutsideITBlock());
8112    MacroEmissionCheckScope guard(this);
8113    ITScope it_scope(this, &cond);
8114    vnmla(cond, dt, rd, rn, rm);
8115  }
8116  void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8117    Vnmla(al, dt, rd, rn, rm);
8118  }
8119
8120  void Vnmls(
8121      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8122    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8123    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8124    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8125    VIXL_ASSERT(allow_macro_instructions_);
8126    VIXL_ASSERT(OutsideITBlock());
8127    MacroEmissionCheckScope guard(this);
8128    ITScope it_scope(this, &cond);
8129    vnmls(cond, dt, rd, rn, rm);
8130  }
8131  void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8132    Vnmls(al, dt, rd, rn, rm);
8133  }
8134
8135  void Vnmls(
8136      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8137    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8138    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8139    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8140    VIXL_ASSERT(allow_macro_instructions_);
8141    VIXL_ASSERT(OutsideITBlock());
8142    MacroEmissionCheckScope guard(this);
8143    ITScope it_scope(this, &cond);
8144    vnmls(cond, dt, rd, rn, rm);
8145  }
8146  void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8147    Vnmls(al, dt, rd, rn, rm);
8148  }
8149
8150  void Vnmul(
8151      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8152    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8153    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8154    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8155    VIXL_ASSERT(allow_macro_instructions_);
8156    VIXL_ASSERT(OutsideITBlock());
8157    MacroEmissionCheckScope guard(this);
8158    ITScope it_scope(this, &cond);
8159    vnmul(cond, dt, rd, rn, rm);
8160  }
8161  void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8162    Vnmul(al, dt, rd, rn, rm);
8163  }
8164
8165  void Vnmul(
8166      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8167    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8168    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8169    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8170    VIXL_ASSERT(allow_macro_instructions_);
8171    VIXL_ASSERT(OutsideITBlock());
8172    MacroEmissionCheckScope guard(this);
8173    ITScope it_scope(this, &cond);
8174    vnmul(cond, dt, rd, rn, rm);
8175  }
8176  void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8177    Vnmul(al, dt, rd, rn, rm);
8178  }
8179
8180  void Vorn(Condition cond,
8181            DataType dt,
8182            DRegister rd,
8183            DRegister rn,
8184            const DOperand& operand) {
8185    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8186    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8187    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8188    VIXL_ASSERT(allow_macro_instructions_);
8189    VIXL_ASSERT(OutsideITBlock());
8190    MacroEmissionCheckScope guard(this);
8191    ITScope it_scope(this, &cond);
8192    vorn(cond, dt, rd, rn, operand);
8193  }
8194  void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8195    Vorn(al, dt, rd, rn, operand);
8196  }
8197
8198  void Vorn(Condition cond,
8199            DataType dt,
8200            QRegister rd,
8201            QRegister rn,
8202            const QOperand& operand) {
8203    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8204    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8205    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8206    VIXL_ASSERT(allow_macro_instructions_);
8207    VIXL_ASSERT(OutsideITBlock());
8208    MacroEmissionCheckScope guard(this);
8209    ITScope it_scope(this, &cond);
8210    vorn(cond, dt, rd, rn, operand);
8211  }
8212  void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8213    Vorn(al, dt, rd, rn, operand);
8214  }
8215
8216  void Vorr(Condition cond,
8217            DataType dt,
8218            DRegister rd,
8219            DRegister rn,
8220            const DOperand& operand) {
8221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8223    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8224    VIXL_ASSERT(allow_macro_instructions_);
8225    VIXL_ASSERT(OutsideITBlock());
8226    MacroEmissionCheckScope guard(this);
8227    ITScope it_scope(this, &cond);
8228    vorr(cond, dt, rd, rn, operand);
8229  }
8230  void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8231    Vorr(al, dt, rd, rn, operand);
8232  }
8233  void Vorr(Condition cond,
8234            DRegister rd,
8235            DRegister rn,
8236            const DOperand& operand) {
8237    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8238  }
8239  void Vorr(DRegister rd, DRegister rn, const DOperand& operand) {
8240    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8241  }
8242
8243  void Vorr(Condition cond,
8244            DataType dt,
8245            QRegister rd,
8246            QRegister rn,
8247            const QOperand& operand) {
8248    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8249    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8250    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8251    VIXL_ASSERT(allow_macro_instructions_);
8252    VIXL_ASSERT(OutsideITBlock());
8253    MacroEmissionCheckScope guard(this);
8254    ITScope it_scope(this, &cond);
8255    vorr(cond, dt, rd, rn, operand);
8256  }
8257  void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8258    Vorr(al, dt, rd, rn, operand);
8259  }
8260  void Vorr(Condition cond,
8261            QRegister rd,
8262            QRegister rn,
8263            const QOperand& operand) {
8264    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8265  }
8266  void Vorr(QRegister rd, QRegister rn, const QOperand& operand) {
8267    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8268  }
8269
8270  void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8272    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8273    VIXL_ASSERT(allow_macro_instructions_);
8274    VIXL_ASSERT(OutsideITBlock());
8275    MacroEmissionCheckScope guard(this);
8276    ITScope it_scope(this, &cond);
8277    vpadal(cond, dt, rd, rm);
8278  }
8279  void Vpadal(DataType dt, DRegister rd, DRegister rm) {
8280    Vpadal(al, dt, rd, rm);
8281  }
8282
8283  void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8284    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8285    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8286    VIXL_ASSERT(allow_macro_instructions_);
8287    VIXL_ASSERT(OutsideITBlock());
8288    MacroEmissionCheckScope guard(this);
8289    ITScope it_scope(this, &cond);
8290    vpadal(cond, dt, rd, rm);
8291  }
8292  void Vpadal(DataType dt, QRegister rd, QRegister rm) {
8293    Vpadal(al, dt, rd, rm);
8294  }
8295
8296  void Vpadd(
8297      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8298    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8299    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8300    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8301    VIXL_ASSERT(allow_macro_instructions_);
8302    VIXL_ASSERT(OutsideITBlock());
8303    MacroEmissionCheckScope guard(this);
8304    ITScope it_scope(this, &cond);
8305    vpadd(cond, dt, rd, rn, rm);
8306  }
8307  void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8308    Vpadd(al, dt, rd, rn, rm);
8309  }
8310
8311  void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8312    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8313    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8314    VIXL_ASSERT(allow_macro_instructions_);
8315    VIXL_ASSERT(OutsideITBlock());
8316    MacroEmissionCheckScope guard(this);
8317    ITScope it_scope(this, &cond);
8318    vpaddl(cond, dt, rd, rm);
8319  }
8320  void Vpaddl(DataType dt, DRegister rd, DRegister rm) {
8321    Vpaddl(al, dt, rd, rm);
8322  }
8323
8324  void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8327    VIXL_ASSERT(allow_macro_instructions_);
8328    VIXL_ASSERT(OutsideITBlock());
8329    MacroEmissionCheckScope guard(this);
8330    ITScope it_scope(this, &cond);
8331    vpaddl(cond, dt, rd, rm);
8332  }
8333  void Vpaddl(DataType dt, QRegister rd, QRegister rm) {
8334    Vpaddl(al, dt, rd, rm);
8335  }
8336
8337  void Vpmax(
8338      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8340    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8341    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8342    VIXL_ASSERT(allow_macro_instructions_);
8343    VIXL_ASSERT(OutsideITBlock());
8344    MacroEmissionCheckScope guard(this);
8345    ITScope it_scope(this, &cond);
8346    vpmax(cond, dt, rd, rn, rm);
8347  }
8348  void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8349    Vpmax(al, dt, rd, rn, rm);
8350  }
8351
8352  void Vpmin(
8353      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8354    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8355    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8356    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8357    VIXL_ASSERT(allow_macro_instructions_);
8358    VIXL_ASSERT(OutsideITBlock());
8359    MacroEmissionCheckScope guard(this);
8360    ITScope it_scope(this, &cond);
8361    vpmin(cond, dt, rd, rn, rm);
8362  }
8363  void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8364    Vpmin(al, dt, rd, rn, rm);
8365  }
8366
8367  void Vpop(Condition cond, DataType dt, DRegisterList dreglist) {
8368    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8369    VIXL_ASSERT(allow_macro_instructions_);
8370    VIXL_ASSERT(OutsideITBlock());
8371    MacroEmissionCheckScope guard(this);
8372    ITScope it_scope(this, &cond);
8373    vpop(cond, dt, dreglist);
8374  }
8375  void Vpop(DataType dt, DRegisterList dreglist) { Vpop(al, dt, dreglist); }
8376  void Vpop(Condition cond, DRegisterList dreglist) {
8377    Vpop(cond, kDataTypeValueNone, dreglist);
8378  }
8379  void Vpop(DRegisterList dreglist) { Vpop(al, kDataTypeValueNone, dreglist); }
8380
8381  void Vpop(Condition cond, DataType dt, SRegisterList sreglist) {
8382    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8383    VIXL_ASSERT(allow_macro_instructions_);
8384    VIXL_ASSERT(OutsideITBlock());
8385    MacroEmissionCheckScope guard(this);
8386    ITScope it_scope(this, &cond);
8387    vpop(cond, dt, sreglist);
8388  }
8389  void Vpop(DataType dt, SRegisterList sreglist) { Vpop(al, dt, sreglist); }
8390  void Vpop(Condition cond, SRegisterList sreglist) {
8391    Vpop(cond, kDataTypeValueNone, sreglist);
8392  }
8393  void Vpop(SRegisterList sreglist) { Vpop(al, kDataTypeValueNone, sreglist); }
8394
8395  void Vpush(Condition cond, DataType dt, DRegisterList dreglist) {
8396    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8397    VIXL_ASSERT(allow_macro_instructions_);
8398    VIXL_ASSERT(OutsideITBlock());
8399    MacroEmissionCheckScope guard(this);
8400    ITScope it_scope(this, &cond);
8401    vpush(cond, dt, dreglist);
8402  }
8403  void Vpush(DataType dt, DRegisterList dreglist) { Vpush(al, dt, dreglist); }
8404  void Vpush(Condition cond, DRegisterList dreglist) {
8405    Vpush(cond, kDataTypeValueNone, dreglist);
8406  }
8407  void Vpush(DRegisterList dreglist) {
8408    Vpush(al, kDataTypeValueNone, dreglist);
8409  }
8410
8411  void Vpush(Condition cond, DataType dt, SRegisterList sreglist) {
8412    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8413    VIXL_ASSERT(allow_macro_instructions_);
8414    VIXL_ASSERT(OutsideITBlock());
8415    MacroEmissionCheckScope guard(this);
8416    ITScope it_scope(this, &cond);
8417    vpush(cond, dt, sreglist);
8418  }
8419  void Vpush(DataType dt, SRegisterList sreglist) { Vpush(al, dt, sreglist); }
8420  void Vpush(Condition cond, SRegisterList sreglist) {
8421    Vpush(cond, kDataTypeValueNone, sreglist);
8422  }
8423  void Vpush(SRegisterList sreglist) {
8424    Vpush(al, kDataTypeValueNone, sreglist);
8425  }
8426
8427  void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8428    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8429    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8430    VIXL_ASSERT(allow_macro_instructions_);
8431    VIXL_ASSERT(OutsideITBlock());
8432    MacroEmissionCheckScope guard(this);
8433    ITScope it_scope(this, &cond);
8434    vqabs(cond, dt, rd, rm);
8435  }
8436  void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); }
8437
8438  void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8441    VIXL_ASSERT(allow_macro_instructions_);
8442    VIXL_ASSERT(OutsideITBlock());
8443    MacroEmissionCheckScope guard(this);
8444    ITScope it_scope(this, &cond);
8445    vqabs(cond, dt, rd, rm);
8446  }
8447  void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); }
8448
8449  void Vqadd(
8450      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8451    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8452    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8453    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8454    VIXL_ASSERT(allow_macro_instructions_);
8455    VIXL_ASSERT(OutsideITBlock());
8456    MacroEmissionCheckScope guard(this);
8457    ITScope it_scope(this, &cond);
8458    vqadd(cond, dt, rd, rn, rm);
8459  }
8460  void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8461    Vqadd(al, dt, rd, rn, rm);
8462  }
8463
8464  void Vqadd(
8465      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8466    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8467    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8468    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8469    VIXL_ASSERT(allow_macro_instructions_);
8470    VIXL_ASSERT(OutsideITBlock());
8471    MacroEmissionCheckScope guard(this);
8472    ITScope it_scope(this, &cond);
8473    vqadd(cond, dt, rd, rn, rm);
8474  }
8475  void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8476    Vqadd(al, dt, rd, rn, rm);
8477  }
8478
8479  void Vqdmlal(
8480      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8481    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8482    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8483    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8484    VIXL_ASSERT(allow_macro_instructions_);
8485    VIXL_ASSERT(OutsideITBlock());
8486    MacroEmissionCheckScope guard(this);
8487    ITScope it_scope(this, &cond);
8488    vqdmlal(cond, dt, rd, rn, rm);
8489  }
8490  void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8491    Vqdmlal(al, dt, rd, rn, rm);
8492  }
8493
8494  void Vqdmlal(Condition cond,
8495               DataType dt,
8496               QRegister rd,
8497               DRegister rn,
8498               DRegister dm,
8499               unsigned index) {
8500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8501    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8502    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8503    VIXL_ASSERT(allow_macro_instructions_);
8504    VIXL_ASSERT(OutsideITBlock());
8505    MacroEmissionCheckScope guard(this);
8506    ITScope it_scope(this, &cond);
8507    vqdmlal(cond, dt, rd, rn, dm, index);
8508  }
8509  void Vqdmlal(
8510      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8511    Vqdmlal(al, dt, rd, rn, dm, index);
8512  }
8513
8514  void Vqdmlsl(
8515      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8517    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8518    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8519    VIXL_ASSERT(allow_macro_instructions_);
8520    VIXL_ASSERT(OutsideITBlock());
8521    MacroEmissionCheckScope guard(this);
8522    ITScope it_scope(this, &cond);
8523    vqdmlsl(cond, dt, rd, rn, rm);
8524  }
8525  void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8526    Vqdmlsl(al, dt, rd, rn, rm);
8527  }
8528
8529  void Vqdmlsl(Condition cond,
8530               DataType dt,
8531               QRegister rd,
8532               DRegister rn,
8533               DRegister dm,
8534               unsigned index) {
8535    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8536    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8537    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8538    VIXL_ASSERT(allow_macro_instructions_);
8539    VIXL_ASSERT(OutsideITBlock());
8540    MacroEmissionCheckScope guard(this);
8541    ITScope it_scope(this, &cond);
8542    vqdmlsl(cond, dt, rd, rn, dm, index);
8543  }
8544  void Vqdmlsl(
8545      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8546    Vqdmlsl(al, dt, rd, rn, dm, index);
8547  }
8548
8549  void Vqdmulh(
8550      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8551    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8552    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8553    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8554    VIXL_ASSERT(allow_macro_instructions_);
8555    VIXL_ASSERT(OutsideITBlock());
8556    MacroEmissionCheckScope guard(this);
8557    ITScope it_scope(this, &cond);
8558    vqdmulh(cond, dt, rd, rn, rm);
8559  }
8560  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8561    Vqdmulh(al, dt, rd, rn, rm);
8562  }
8563
8564  void Vqdmulh(
8565      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8567    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8569    VIXL_ASSERT(allow_macro_instructions_);
8570    VIXL_ASSERT(OutsideITBlock());
8571    MacroEmissionCheckScope guard(this);
8572    ITScope it_scope(this, &cond);
8573    vqdmulh(cond, dt, rd, rn, rm);
8574  }
8575  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8576    Vqdmulh(al, dt, rd, rn, rm);
8577  }
8578
8579  void Vqdmulh(Condition cond,
8580               DataType dt,
8581               DRegister rd,
8582               DRegister rn,
8583               DRegisterLane rm) {
8584    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8585    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8586    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8587    VIXL_ASSERT(allow_macro_instructions_);
8588    VIXL_ASSERT(OutsideITBlock());
8589    MacroEmissionCheckScope guard(this);
8590    ITScope it_scope(this, &cond);
8591    vqdmulh(cond, dt, rd, rn, rm);
8592  }
8593  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8594    Vqdmulh(al, dt, rd, rn, rm);
8595  }
8596
8597  void Vqdmulh(Condition cond,
8598               DataType dt,
8599               QRegister rd,
8600               QRegister rn,
8601               DRegisterLane rm) {
8602    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8605    VIXL_ASSERT(allow_macro_instructions_);
8606    VIXL_ASSERT(OutsideITBlock());
8607    MacroEmissionCheckScope guard(this);
8608    ITScope it_scope(this, &cond);
8609    vqdmulh(cond, dt, rd, rn, rm);
8610  }
8611  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8612    Vqdmulh(al, dt, rd, rn, rm);
8613  }
8614
8615  void Vqdmull(
8616      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8617    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8620    VIXL_ASSERT(allow_macro_instructions_);
8621    VIXL_ASSERT(OutsideITBlock());
8622    MacroEmissionCheckScope guard(this);
8623    ITScope it_scope(this, &cond);
8624    vqdmull(cond, dt, rd, rn, rm);
8625  }
8626  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8627    Vqdmull(al, dt, rd, rn, rm);
8628  }
8629
8630  void Vqdmull(Condition cond,
8631               DataType dt,
8632               QRegister rd,
8633               DRegister rn,
8634               DRegisterLane rm) {
8635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8636    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8637    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8638    VIXL_ASSERT(allow_macro_instructions_);
8639    VIXL_ASSERT(OutsideITBlock());
8640    MacroEmissionCheckScope guard(this);
8641    ITScope it_scope(this, &cond);
8642    vqdmull(cond, dt, rd, rn, rm);
8643  }
8644  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
8645    Vqdmull(al, dt, rd, rn, rm);
8646  }
8647
8648  void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8649    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8651    VIXL_ASSERT(allow_macro_instructions_);
8652    VIXL_ASSERT(OutsideITBlock());
8653    MacroEmissionCheckScope guard(this);
8654    ITScope it_scope(this, &cond);
8655    vqmovn(cond, dt, rd, rm);
8656  }
8657  void Vqmovn(DataType dt, DRegister rd, QRegister rm) {
8658    Vqmovn(al, dt, rd, rm);
8659  }
8660
8661  void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8662    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8663    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8664    VIXL_ASSERT(allow_macro_instructions_);
8665    VIXL_ASSERT(OutsideITBlock());
8666    MacroEmissionCheckScope guard(this);
8667    ITScope it_scope(this, &cond);
8668    vqmovun(cond, dt, rd, rm);
8669  }
8670  void Vqmovun(DataType dt, DRegister rd, QRegister rm) {
8671    Vqmovun(al, dt, rd, rm);
8672  }
8673
8674  void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8675    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8677    VIXL_ASSERT(allow_macro_instructions_);
8678    VIXL_ASSERT(OutsideITBlock());
8679    MacroEmissionCheckScope guard(this);
8680    ITScope it_scope(this, &cond);
8681    vqneg(cond, dt, rd, rm);
8682  }
8683  void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); }
8684
8685  void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8686    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8687    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8688    VIXL_ASSERT(allow_macro_instructions_);
8689    VIXL_ASSERT(OutsideITBlock());
8690    MacroEmissionCheckScope guard(this);
8691    ITScope it_scope(this, &cond);
8692    vqneg(cond, dt, rd, rm);
8693  }
8694  void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); }
8695
8696  void Vqrdmulh(
8697      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8700    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8701    VIXL_ASSERT(allow_macro_instructions_);
8702    VIXL_ASSERT(OutsideITBlock());
8703    MacroEmissionCheckScope guard(this);
8704    ITScope it_scope(this, &cond);
8705    vqrdmulh(cond, dt, rd, rn, rm);
8706  }
8707  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8708    Vqrdmulh(al, dt, rd, rn, rm);
8709  }
8710
8711  void Vqrdmulh(
8712      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8713    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8716    VIXL_ASSERT(allow_macro_instructions_);
8717    VIXL_ASSERT(OutsideITBlock());
8718    MacroEmissionCheckScope guard(this);
8719    ITScope it_scope(this, &cond);
8720    vqrdmulh(cond, dt, rd, rn, rm);
8721  }
8722  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8723    Vqrdmulh(al, dt, rd, rn, rm);
8724  }
8725
8726  void Vqrdmulh(Condition cond,
8727                DataType dt,
8728                DRegister rd,
8729                DRegister rn,
8730                DRegisterLane rm) {
8731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8734    VIXL_ASSERT(allow_macro_instructions_);
8735    VIXL_ASSERT(OutsideITBlock());
8736    MacroEmissionCheckScope guard(this);
8737    ITScope it_scope(this, &cond);
8738    vqrdmulh(cond, dt, rd, rn, rm);
8739  }
8740  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8741    Vqrdmulh(al, dt, rd, rn, rm);
8742  }
8743
8744  void Vqrdmulh(Condition cond,
8745                DataType dt,
8746                QRegister rd,
8747                QRegister rn,
8748                DRegisterLane rm) {
8749    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8750    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8752    VIXL_ASSERT(allow_macro_instructions_);
8753    VIXL_ASSERT(OutsideITBlock());
8754    MacroEmissionCheckScope guard(this);
8755    ITScope it_scope(this, &cond);
8756    vqrdmulh(cond, dt, rd, rn, rm);
8757  }
8758  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8759    Vqrdmulh(al, dt, rd, rn, rm);
8760  }
8761
8762  void Vqrshl(
8763      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8764    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8765    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8766    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8767    VIXL_ASSERT(allow_macro_instructions_);
8768    VIXL_ASSERT(OutsideITBlock());
8769    MacroEmissionCheckScope guard(this);
8770    ITScope it_scope(this, &cond);
8771    vqrshl(cond, dt, rd, rm, rn);
8772  }
8773  void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8774    Vqrshl(al, dt, rd, rm, rn);
8775  }
8776
8777  void Vqrshl(
8778      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8779    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8780    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8781    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8782    VIXL_ASSERT(allow_macro_instructions_);
8783    VIXL_ASSERT(OutsideITBlock());
8784    MacroEmissionCheckScope guard(this);
8785    ITScope it_scope(this, &cond);
8786    vqrshl(cond, dt, rd, rm, rn);
8787  }
8788  void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8789    Vqrshl(al, dt, rd, rm, rn);
8790  }
8791
8792  void Vqrshrn(Condition cond,
8793               DataType dt,
8794               DRegister rd,
8795               QRegister rm,
8796               const QOperand& operand) {
8797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8799    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8800    VIXL_ASSERT(allow_macro_instructions_);
8801    VIXL_ASSERT(OutsideITBlock());
8802    MacroEmissionCheckScope guard(this);
8803    ITScope it_scope(this, &cond);
8804    vqrshrn(cond, dt, rd, rm, operand);
8805  }
8806  void Vqrshrn(DataType dt,
8807               DRegister rd,
8808               QRegister rm,
8809               const QOperand& operand) {
8810    Vqrshrn(al, dt, rd, rm, operand);
8811  }
8812
8813  void Vqrshrun(Condition cond,
8814                DataType dt,
8815                DRegister rd,
8816                QRegister rm,
8817                const QOperand& operand) {
8818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8820    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8821    VIXL_ASSERT(allow_macro_instructions_);
8822    VIXL_ASSERT(OutsideITBlock());
8823    MacroEmissionCheckScope guard(this);
8824    ITScope it_scope(this, &cond);
8825    vqrshrun(cond, dt, rd, rm, operand);
8826  }
8827  void Vqrshrun(DataType dt,
8828                DRegister rd,
8829                QRegister rm,
8830                const QOperand& operand) {
8831    Vqrshrun(al, dt, rd, rm, operand);
8832  }
8833
8834  void Vqshl(Condition cond,
8835             DataType dt,
8836             DRegister rd,
8837             DRegister rm,
8838             const DOperand& operand) {
8839    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8840    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8841    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8842    VIXL_ASSERT(allow_macro_instructions_);
8843    VIXL_ASSERT(OutsideITBlock());
8844    MacroEmissionCheckScope guard(this);
8845    ITScope it_scope(this, &cond);
8846    vqshl(cond, dt, rd, rm, operand);
8847  }
8848  void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
8849    Vqshl(al, dt, rd, rm, operand);
8850  }
8851
8852  void Vqshl(Condition cond,
8853             DataType dt,
8854             QRegister rd,
8855             QRegister rm,
8856             const QOperand& operand) {
8857    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8859    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8860    VIXL_ASSERT(allow_macro_instructions_);
8861    VIXL_ASSERT(OutsideITBlock());
8862    MacroEmissionCheckScope guard(this);
8863    ITScope it_scope(this, &cond);
8864    vqshl(cond, dt, rd, rm, operand);
8865  }
8866  void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
8867    Vqshl(al, dt, rd, rm, operand);
8868  }
8869
8870  void Vqshlu(Condition cond,
8871              DataType dt,
8872              DRegister rd,
8873              DRegister rm,
8874              const DOperand& operand) {
8875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8877    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8878    VIXL_ASSERT(allow_macro_instructions_);
8879    VIXL_ASSERT(OutsideITBlock());
8880    MacroEmissionCheckScope guard(this);
8881    ITScope it_scope(this, &cond);
8882    vqshlu(cond, dt, rd, rm, operand);
8883  }
8884  void Vqshlu(DataType dt,
8885              DRegister rd,
8886              DRegister rm,
8887              const DOperand& operand) {
8888    Vqshlu(al, dt, rd, rm, operand);
8889  }
8890
8891  void Vqshlu(Condition cond,
8892              DataType dt,
8893              QRegister rd,
8894              QRegister rm,
8895              const QOperand& operand) {
8896    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8897    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8898    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8899    VIXL_ASSERT(allow_macro_instructions_);
8900    VIXL_ASSERT(OutsideITBlock());
8901    MacroEmissionCheckScope guard(this);
8902    ITScope it_scope(this, &cond);
8903    vqshlu(cond, dt, rd, rm, operand);
8904  }
8905  void Vqshlu(DataType dt,
8906              QRegister rd,
8907              QRegister rm,
8908              const QOperand& operand) {
8909    Vqshlu(al, dt, rd, rm, operand);
8910  }
8911
8912  void Vqshrn(Condition cond,
8913              DataType dt,
8914              DRegister rd,
8915              QRegister rm,
8916              const QOperand& operand) {
8917    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8918    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8919    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8920    VIXL_ASSERT(allow_macro_instructions_);
8921    VIXL_ASSERT(OutsideITBlock());
8922    MacroEmissionCheckScope guard(this);
8923    ITScope it_scope(this, &cond);
8924    vqshrn(cond, dt, rd, rm, operand);
8925  }
8926  void Vqshrn(DataType dt,
8927              DRegister rd,
8928              QRegister rm,
8929              const QOperand& operand) {
8930    Vqshrn(al, dt, rd, rm, operand);
8931  }
8932
8933  void Vqshrun(Condition cond,
8934               DataType dt,
8935               DRegister rd,
8936               QRegister rm,
8937               const QOperand& operand) {
8938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8940    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8941    VIXL_ASSERT(allow_macro_instructions_);
8942    VIXL_ASSERT(OutsideITBlock());
8943    MacroEmissionCheckScope guard(this);
8944    ITScope it_scope(this, &cond);
8945    vqshrun(cond, dt, rd, rm, operand);
8946  }
8947  void Vqshrun(DataType dt,
8948               DRegister rd,
8949               QRegister rm,
8950               const QOperand& operand) {
8951    Vqshrun(al, dt, rd, rm, operand);
8952  }
8953
8954  void Vqsub(
8955      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8956    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8957    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8958    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8959    VIXL_ASSERT(allow_macro_instructions_);
8960    VIXL_ASSERT(OutsideITBlock());
8961    MacroEmissionCheckScope guard(this);
8962    ITScope it_scope(this, &cond);
8963    vqsub(cond, dt, rd, rn, rm);
8964  }
8965  void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8966    Vqsub(al, dt, rd, rn, rm);
8967  }
8968
8969  void Vqsub(
8970      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8971    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8972    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8973    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8974    VIXL_ASSERT(allow_macro_instructions_);
8975    VIXL_ASSERT(OutsideITBlock());
8976    MacroEmissionCheckScope guard(this);
8977    ITScope it_scope(this, &cond);
8978    vqsub(cond, dt, rd, rn, rm);
8979  }
8980  void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8981    Vqsub(al, dt, rd, rn, rm);
8982  }
8983
8984  void Vraddhn(
8985      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
8986    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8987    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8988    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8989    VIXL_ASSERT(allow_macro_instructions_);
8990    VIXL_ASSERT(OutsideITBlock());
8991    MacroEmissionCheckScope guard(this);
8992    ITScope it_scope(this, &cond);
8993    vraddhn(cond, dt, rd, rn, rm);
8994  }
8995  void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
8996    Vraddhn(al, dt, rd, rn, rm);
8997  }
8998
8999  void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9000    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9001    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9002    VIXL_ASSERT(allow_macro_instructions_);
9003    VIXL_ASSERT(OutsideITBlock());
9004    MacroEmissionCheckScope guard(this);
9005    ITScope it_scope(this, &cond);
9006    vrecpe(cond, dt, rd, rm);
9007  }
9008  void Vrecpe(DataType dt, DRegister rd, DRegister rm) {
9009    Vrecpe(al, dt, rd, rm);
9010  }
9011
9012  void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9013    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9014    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9015    VIXL_ASSERT(allow_macro_instructions_);
9016    VIXL_ASSERT(OutsideITBlock());
9017    MacroEmissionCheckScope guard(this);
9018    ITScope it_scope(this, &cond);
9019    vrecpe(cond, dt, rd, rm);
9020  }
9021  void Vrecpe(DataType dt, QRegister rd, QRegister rm) {
9022    Vrecpe(al, dt, rd, rm);
9023  }
9024
9025  void Vrecps(
9026      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9027    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9028    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9029    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9030    VIXL_ASSERT(allow_macro_instructions_);
9031    VIXL_ASSERT(OutsideITBlock());
9032    MacroEmissionCheckScope guard(this);
9033    ITScope it_scope(this, &cond);
9034    vrecps(cond, dt, rd, rn, rm);
9035  }
9036  void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9037    Vrecps(al, dt, rd, rn, rm);
9038  }
9039
9040  void Vrecps(
9041      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9042    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9043    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9044    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9045    VIXL_ASSERT(allow_macro_instructions_);
9046    VIXL_ASSERT(OutsideITBlock());
9047    MacroEmissionCheckScope guard(this);
9048    ITScope it_scope(this, &cond);
9049    vrecps(cond, dt, rd, rn, rm);
9050  }
9051  void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9052    Vrecps(al, dt, rd, rn, rm);
9053  }
9054
9055  void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9056    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9057    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9058    VIXL_ASSERT(allow_macro_instructions_);
9059    VIXL_ASSERT(OutsideITBlock());
9060    MacroEmissionCheckScope guard(this);
9061    ITScope it_scope(this, &cond);
9062    vrev16(cond, dt, rd, rm);
9063  }
9064  void Vrev16(DataType dt, DRegister rd, DRegister rm) {
9065    Vrev16(al, dt, rd, rm);
9066  }
9067
9068  void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9070    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9071    VIXL_ASSERT(allow_macro_instructions_);
9072    VIXL_ASSERT(OutsideITBlock());
9073    MacroEmissionCheckScope guard(this);
9074    ITScope it_scope(this, &cond);
9075    vrev16(cond, dt, rd, rm);
9076  }
9077  void Vrev16(DataType dt, QRegister rd, QRegister rm) {
9078    Vrev16(al, dt, rd, rm);
9079  }
9080
9081  void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9082    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9083    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9084    VIXL_ASSERT(allow_macro_instructions_);
9085    VIXL_ASSERT(OutsideITBlock());
9086    MacroEmissionCheckScope guard(this);
9087    ITScope it_scope(this, &cond);
9088    vrev32(cond, dt, rd, rm);
9089  }
9090  void Vrev32(DataType dt, DRegister rd, DRegister rm) {
9091    Vrev32(al, dt, rd, rm);
9092  }
9093
9094  void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9095    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9096    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9097    VIXL_ASSERT(allow_macro_instructions_);
9098    VIXL_ASSERT(OutsideITBlock());
9099    MacroEmissionCheckScope guard(this);
9100    ITScope it_scope(this, &cond);
9101    vrev32(cond, dt, rd, rm);
9102  }
9103  void Vrev32(DataType dt, QRegister rd, QRegister rm) {
9104    Vrev32(al, dt, rd, rm);
9105  }
9106
9107  void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9109    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9110    VIXL_ASSERT(allow_macro_instructions_);
9111    VIXL_ASSERT(OutsideITBlock());
9112    MacroEmissionCheckScope guard(this);
9113    ITScope it_scope(this, &cond);
9114    vrev64(cond, dt, rd, rm);
9115  }
9116  void Vrev64(DataType dt, DRegister rd, DRegister rm) {
9117    Vrev64(al, dt, rd, rm);
9118  }
9119
9120  void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9121    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9122    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9123    VIXL_ASSERT(allow_macro_instructions_);
9124    VIXL_ASSERT(OutsideITBlock());
9125    MacroEmissionCheckScope guard(this);
9126    ITScope it_scope(this, &cond);
9127    vrev64(cond, dt, rd, rm);
9128  }
9129  void Vrev64(DataType dt, QRegister rd, QRegister rm) {
9130    Vrev64(al, dt, rd, rm);
9131  }
9132
9133  void Vrhadd(
9134      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9135    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9136    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9137    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9138    VIXL_ASSERT(allow_macro_instructions_);
9139    VIXL_ASSERT(OutsideITBlock());
9140    MacroEmissionCheckScope guard(this);
9141    ITScope it_scope(this, &cond);
9142    vrhadd(cond, dt, rd, rn, rm);
9143  }
9144  void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9145    Vrhadd(al, dt, rd, rn, rm);
9146  }
9147
9148  void Vrhadd(
9149      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9150    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9151    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9152    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9153    VIXL_ASSERT(allow_macro_instructions_);
9154    VIXL_ASSERT(OutsideITBlock());
9155    MacroEmissionCheckScope guard(this);
9156    ITScope it_scope(this, &cond);
9157    vrhadd(cond, dt, rd, rn, rm);
9158  }
9159  void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9160    Vrhadd(al, dt, rd, rn, rm);
9161  }
9162
9163  void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9164    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9165    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9166    VIXL_ASSERT(allow_macro_instructions_);
9167    VIXL_ASSERT(OutsideITBlock());
9168    MacroEmissionCheckScope guard(this);
9169    vrinta(dt1, dt2, rd, rm);
9170  }
9171
9172  void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9173    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9174    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9175    VIXL_ASSERT(allow_macro_instructions_);
9176    VIXL_ASSERT(OutsideITBlock());
9177    MacroEmissionCheckScope guard(this);
9178    vrinta(dt1, dt2, rd, rm);
9179  }
9180
9181  void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9182    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9183    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9184    VIXL_ASSERT(allow_macro_instructions_);
9185    VIXL_ASSERT(OutsideITBlock());
9186    MacroEmissionCheckScope guard(this);
9187    vrinta(dt1, dt2, rd, rm);
9188  }
9189
9190  void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9191    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9192    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9193    VIXL_ASSERT(allow_macro_instructions_);
9194    VIXL_ASSERT(OutsideITBlock());
9195    MacroEmissionCheckScope guard(this);
9196    vrintm(dt1, dt2, rd, rm);
9197  }
9198
9199  void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9200    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9201    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9202    VIXL_ASSERT(allow_macro_instructions_);
9203    VIXL_ASSERT(OutsideITBlock());
9204    MacroEmissionCheckScope guard(this);
9205    vrintm(dt1, dt2, rd, rm);
9206  }
9207
9208  void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9210    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9211    VIXL_ASSERT(allow_macro_instructions_);
9212    VIXL_ASSERT(OutsideITBlock());
9213    MacroEmissionCheckScope guard(this);
9214    vrintm(dt1, dt2, rd, rm);
9215  }
9216
9217  void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9218    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9219    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9220    VIXL_ASSERT(allow_macro_instructions_);
9221    VIXL_ASSERT(OutsideITBlock());
9222    MacroEmissionCheckScope guard(this);
9223    vrintn(dt1, dt2, rd, rm);
9224  }
9225
9226  void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9227    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9228    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9229    VIXL_ASSERT(allow_macro_instructions_);
9230    VIXL_ASSERT(OutsideITBlock());
9231    MacroEmissionCheckScope guard(this);
9232    vrintn(dt1, dt2, rd, rm);
9233  }
9234
9235  void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9236    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9237    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9238    VIXL_ASSERT(allow_macro_instructions_);
9239    VIXL_ASSERT(OutsideITBlock());
9240    MacroEmissionCheckScope guard(this);
9241    vrintn(dt1, dt2, rd, rm);
9242  }
9243
9244  void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9245    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9247    VIXL_ASSERT(allow_macro_instructions_);
9248    VIXL_ASSERT(OutsideITBlock());
9249    MacroEmissionCheckScope guard(this);
9250    vrintp(dt1, dt2, rd, rm);
9251  }
9252
9253  void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9254    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9255    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9256    VIXL_ASSERT(allow_macro_instructions_);
9257    VIXL_ASSERT(OutsideITBlock());
9258    MacroEmissionCheckScope guard(this);
9259    vrintp(dt1, dt2, rd, rm);
9260  }
9261
9262  void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9263    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9264    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9265    VIXL_ASSERT(allow_macro_instructions_);
9266    VIXL_ASSERT(OutsideITBlock());
9267    MacroEmissionCheckScope guard(this);
9268    vrintp(dt1, dt2, rd, rm);
9269  }
9270
9271  void Vrintr(
9272      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9273    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9274    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9275    VIXL_ASSERT(allow_macro_instructions_);
9276    VIXL_ASSERT(OutsideITBlock());
9277    MacroEmissionCheckScope guard(this);
9278    ITScope it_scope(this, &cond);
9279    vrintr(cond, dt1, dt2, rd, rm);
9280  }
9281  void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9282    Vrintr(al, dt1, dt2, rd, rm);
9283  }
9284
9285  void Vrintr(
9286      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9287    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9288    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9289    VIXL_ASSERT(allow_macro_instructions_);
9290    VIXL_ASSERT(OutsideITBlock());
9291    MacroEmissionCheckScope guard(this);
9292    ITScope it_scope(this, &cond);
9293    vrintr(cond, dt1, dt2, rd, rm);
9294  }
9295  void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9296    Vrintr(al, dt1, dt2, rd, rm);
9297  }
9298
9299  void Vrintx(
9300      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9301    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9302    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9303    VIXL_ASSERT(allow_macro_instructions_);
9304    VIXL_ASSERT(OutsideITBlock());
9305    MacroEmissionCheckScope guard(this);
9306    ITScope it_scope(this, &cond);
9307    vrintx(cond, dt1, dt2, rd, rm);
9308  }
9309  void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9310    Vrintx(al, dt1, dt2, rd, rm);
9311  }
9312
9313  void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9314    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9315    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9316    VIXL_ASSERT(allow_macro_instructions_);
9317    VIXL_ASSERT(OutsideITBlock());
9318    MacroEmissionCheckScope guard(this);
9319    vrintx(dt1, dt2, rd, rm);
9320  }
9321
9322  void Vrintx(
9323      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9326    VIXL_ASSERT(allow_macro_instructions_);
9327    VIXL_ASSERT(OutsideITBlock());
9328    MacroEmissionCheckScope guard(this);
9329    ITScope it_scope(this, &cond);
9330    vrintx(cond, dt1, dt2, rd, rm);
9331  }
9332  void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9333    Vrintx(al, dt1, dt2, rd, rm);
9334  }
9335
9336  void Vrintz(
9337      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9338    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9340    VIXL_ASSERT(allow_macro_instructions_);
9341    VIXL_ASSERT(OutsideITBlock());
9342    MacroEmissionCheckScope guard(this);
9343    ITScope it_scope(this, &cond);
9344    vrintz(cond, dt1, dt2, rd, rm);
9345  }
9346  void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9347    Vrintz(al, dt1, dt2, rd, rm);
9348  }
9349
9350  void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9351    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9352    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9353    VIXL_ASSERT(allow_macro_instructions_);
9354    VIXL_ASSERT(OutsideITBlock());
9355    MacroEmissionCheckScope guard(this);
9356    vrintz(dt1, dt2, rd, rm);
9357  }
9358
9359  void Vrintz(
9360      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9361    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9362    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9363    VIXL_ASSERT(allow_macro_instructions_);
9364    VIXL_ASSERT(OutsideITBlock());
9365    MacroEmissionCheckScope guard(this);
9366    ITScope it_scope(this, &cond);
9367    vrintz(cond, dt1, dt2, rd, rm);
9368  }
9369  void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9370    Vrintz(al, dt1, dt2, rd, rm);
9371  }
9372
9373  void Vrshl(
9374      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9375    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9376    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9377    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9378    VIXL_ASSERT(allow_macro_instructions_);
9379    VIXL_ASSERT(OutsideITBlock());
9380    MacroEmissionCheckScope guard(this);
9381    ITScope it_scope(this, &cond);
9382    vrshl(cond, dt, rd, rm, rn);
9383  }
9384  void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9385    Vrshl(al, dt, rd, rm, rn);
9386  }
9387
9388  void Vrshl(
9389      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9390    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9391    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9392    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9393    VIXL_ASSERT(allow_macro_instructions_);
9394    VIXL_ASSERT(OutsideITBlock());
9395    MacroEmissionCheckScope guard(this);
9396    ITScope it_scope(this, &cond);
9397    vrshl(cond, dt, rd, rm, rn);
9398  }
9399  void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9400    Vrshl(al, dt, rd, rm, rn);
9401  }
9402
9403  void Vrshr(Condition cond,
9404             DataType dt,
9405             DRegister rd,
9406             DRegister rm,
9407             const DOperand& operand) {
9408    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9409    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9410    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9411    VIXL_ASSERT(allow_macro_instructions_);
9412    VIXL_ASSERT(OutsideITBlock());
9413    MacroEmissionCheckScope guard(this);
9414    ITScope it_scope(this, &cond);
9415    vrshr(cond, dt, rd, rm, operand);
9416  }
9417  void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9418    Vrshr(al, dt, rd, rm, operand);
9419  }
9420
9421  void Vrshr(Condition cond,
9422             DataType dt,
9423             QRegister rd,
9424             QRegister rm,
9425             const QOperand& operand) {
9426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9427    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9428    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9429    VIXL_ASSERT(allow_macro_instructions_);
9430    VIXL_ASSERT(OutsideITBlock());
9431    MacroEmissionCheckScope guard(this);
9432    ITScope it_scope(this, &cond);
9433    vrshr(cond, dt, rd, rm, operand);
9434  }
9435  void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9436    Vrshr(al, dt, rd, rm, operand);
9437  }
9438
9439  void Vrshrn(Condition cond,
9440              DataType dt,
9441              DRegister rd,
9442              QRegister rm,
9443              const QOperand& operand) {
9444    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9445    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9446    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9447    VIXL_ASSERT(allow_macro_instructions_);
9448    VIXL_ASSERT(OutsideITBlock());
9449    MacroEmissionCheckScope guard(this);
9450    ITScope it_scope(this, &cond);
9451    vrshrn(cond, dt, rd, rm, operand);
9452  }
9453  void Vrshrn(DataType dt,
9454              DRegister rd,
9455              QRegister rm,
9456              const QOperand& operand) {
9457    Vrshrn(al, dt, rd, rm, operand);
9458  }
9459
9460  void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9461    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9462    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9463    VIXL_ASSERT(allow_macro_instructions_);
9464    VIXL_ASSERT(OutsideITBlock());
9465    MacroEmissionCheckScope guard(this);
9466    ITScope it_scope(this, &cond);
9467    vrsqrte(cond, dt, rd, rm);
9468  }
9469  void Vrsqrte(DataType dt, DRegister rd, DRegister rm) {
9470    Vrsqrte(al, dt, rd, rm);
9471  }
9472
9473  void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9474    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9475    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9476    VIXL_ASSERT(allow_macro_instructions_);
9477    VIXL_ASSERT(OutsideITBlock());
9478    MacroEmissionCheckScope guard(this);
9479    ITScope it_scope(this, &cond);
9480    vrsqrte(cond, dt, rd, rm);
9481  }
9482  void Vrsqrte(DataType dt, QRegister rd, QRegister rm) {
9483    Vrsqrte(al, dt, rd, rm);
9484  }
9485
9486  void Vrsqrts(
9487      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9488    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9490    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9491    VIXL_ASSERT(allow_macro_instructions_);
9492    VIXL_ASSERT(OutsideITBlock());
9493    MacroEmissionCheckScope guard(this);
9494    ITScope it_scope(this, &cond);
9495    vrsqrts(cond, dt, rd, rn, rm);
9496  }
9497  void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9498    Vrsqrts(al, dt, rd, rn, rm);
9499  }
9500
9501  void Vrsqrts(
9502      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9504    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9505    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9506    VIXL_ASSERT(allow_macro_instructions_);
9507    VIXL_ASSERT(OutsideITBlock());
9508    MacroEmissionCheckScope guard(this);
9509    ITScope it_scope(this, &cond);
9510    vrsqrts(cond, dt, rd, rn, rm);
9511  }
9512  void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9513    Vrsqrts(al, dt, rd, rn, rm);
9514  }
9515
9516  void Vrsra(Condition cond,
9517             DataType dt,
9518             DRegister rd,
9519             DRegister rm,
9520             const DOperand& operand) {
9521    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9522    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9523    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9524    VIXL_ASSERT(allow_macro_instructions_);
9525    VIXL_ASSERT(OutsideITBlock());
9526    MacroEmissionCheckScope guard(this);
9527    ITScope it_scope(this, &cond);
9528    vrsra(cond, dt, rd, rm, operand);
9529  }
9530  void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9531    Vrsra(al, dt, rd, rm, operand);
9532  }
9533
9534  void Vrsra(Condition cond,
9535             DataType dt,
9536             QRegister rd,
9537             QRegister rm,
9538             const QOperand& operand) {
9539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9541    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9542    VIXL_ASSERT(allow_macro_instructions_);
9543    VIXL_ASSERT(OutsideITBlock());
9544    MacroEmissionCheckScope guard(this);
9545    ITScope it_scope(this, &cond);
9546    vrsra(cond, dt, rd, rm, operand);
9547  }
9548  void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9549    Vrsra(al, dt, rd, rm, operand);
9550  }
9551
9552  void Vrsubhn(
9553      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9557    VIXL_ASSERT(allow_macro_instructions_);
9558    VIXL_ASSERT(OutsideITBlock());
9559    MacroEmissionCheckScope guard(this);
9560    ITScope it_scope(this, &cond);
9561    vrsubhn(cond, dt, rd, rn, rm);
9562  }
9563  void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9564    Vrsubhn(al, dt, rd, rn, rm);
9565  }
9566
9567  void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9571    VIXL_ASSERT(allow_macro_instructions_);
9572    VIXL_ASSERT(OutsideITBlock());
9573    MacroEmissionCheckScope guard(this);
9574    vseleq(dt, rd, rn, rm);
9575  }
9576
9577  void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9578    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9581    VIXL_ASSERT(allow_macro_instructions_);
9582    VIXL_ASSERT(OutsideITBlock());
9583    MacroEmissionCheckScope guard(this);
9584    vseleq(dt, rd, rn, rm);
9585  }
9586
9587  void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9589    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9590    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9591    VIXL_ASSERT(allow_macro_instructions_);
9592    VIXL_ASSERT(OutsideITBlock());
9593    MacroEmissionCheckScope guard(this);
9594    vselge(dt, rd, rn, rm);
9595  }
9596
9597  void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9599    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9600    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9601    VIXL_ASSERT(allow_macro_instructions_);
9602    VIXL_ASSERT(OutsideITBlock());
9603    MacroEmissionCheckScope guard(this);
9604    vselge(dt, rd, rn, rm);
9605  }
9606
9607  void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9608    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9609    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9610    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9611    VIXL_ASSERT(allow_macro_instructions_);
9612    VIXL_ASSERT(OutsideITBlock());
9613    MacroEmissionCheckScope guard(this);
9614    vselgt(dt, rd, rn, rm);
9615  }
9616
9617  void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9621    VIXL_ASSERT(allow_macro_instructions_);
9622    VIXL_ASSERT(OutsideITBlock());
9623    MacroEmissionCheckScope guard(this);
9624    vselgt(dt, rd, rn, rm);
9625  }
9626
9627  void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9628    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9629    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9630    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9631    VIXL_ASSERT(allow_macro_instructions_);
9632    VIXL_ASSERT(OutsideITBlock());
9633    MacroEmissionCheckScope guard(this);
9634    vselvs(dt, rd, rn, rm);
9635  }
9636
9637  void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9638    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9639    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9640    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9641    VIXL_ASSERT(allow_macro_instructions_);
9642    VIXL_ASSERT(OutsideITBlock());
9643    MacroEmissionCheckScope guard(this);
9644    vselvs(dt, rd, rn, rm);
9645  }
9646
9647  void Vshl(Condition cond,
9648            DataType dt,
9649            DRegister rd,
9650            DRegister rm,
9651            const DOperand& operand) {
9652    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9654    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9655    VIXL_ASSERT(allow_macro_instructions_);
9656    VIXL_ASSERT(OutsideITBlock());
9657    MacroEmissionCheckScope guard(this);
9658    ITScope it_scope(this, &cond);
9659    vshl(cond, dt, rd, rm, operand);
9660  }
9661  void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9662    Vshl(al, dt, rd, rm, operand);
9663  }
9664
9665  void Vshl(Condition cond,
9666            DataType dt,
9667            QRegister rd,
9668            QRegister rm,
9669            const QOperand& operand) {
9670    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9671    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9672    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9673    VIXL_ASSERT(allow_macro_instructions_);
9674    VIXL_ASSERT(OutsideITBlock());
9675    MacroEmissionCheckScope guard(this);
9676    ITScope it_scope(this, &cond);
9677    vshl(cond, dt, rd, rm, operand);
9678  }
9679  void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9680    Vshl(al, dt, rd, rm, operand);
9681  }
9682
9683  void Vshll(Condition cond,
9684             DataType dt,
9685             QRegister rd,
9686             DRegister rm,
9687             const DOperand& operand) {
9688    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9689    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9690    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9691    VIXL_ASSERT(allow_macro_instructions_);
9692    VIXL_ASSERT(OutsideITBlock());
9693    MacroEmissionCheckScope guard(this);
9694    ITScope it_scope(this, &cond);
9695    vshll(cond, dt, rd, rm, operand);
9696  }
9697  void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) {
9698    Vshll(al, dt, rd, rm, operand);
9699  }
9700
9701  void Vshr(Condition cond,
9702            DataType dt,
9703            DRegister rd,
9704            DRegister rm,
9705            const DOperand& operand) {
9706    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9708    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9709    VIXL_ASSERT(allow_macro_instructions_);
9710    VIXL_ASSERT(OutsideITBlock());
9711    MacroEmissionCheckScope guard(this);
9712    ITScope it_scope(this, &cond);
9713    vshr(cond, dt, rd, rm, operand);
9714  }
9715  void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9716    Vshr(al, dt, rd, rm, operand);
9717  }
9718
9719  void Vshr(Condition cond,
9720            DataType dt,
9721            QRegister rd,
9722            QRegister rm,
9723            const QOperand& operand) {
9724    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9725    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9726    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9727    VIXL_ASSERT(allow_macro_instructions_);
9728    VIXL_ASSERT(OutsideITBlock());
9729    MacroEmissionCheckScope guard(this);
9730    ITScope it_scope(this, &cond);
9731    vshr(cond, dt, rd, rm, operand);
9732  }
9733  void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9734    Vshr(al, dt, rd, rm, operand);
9735  }
9736
9737  void Vshrn(Condition cond,
9738             DataType dt,
9739             DRegister rd,
9740             QRegister rm,
9741             const QOperand& operand) {
9742    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9743    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9744    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9745    VIXL_ASSERT(allow_macro_instructions_);
9746    VIXL_ASSERT(OutsideITBlock());
9747    MacroEmissionCheckScope guard(this);
9748    ITScope it_scope(this, &cond);
9749    vshrn(cond, dt, rd, rm, operand);
9750  }
9751  void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) {
9752    Vshrn(al, dt, rd, rm, operand);
9753  }
9754
9755  void Vsli(Condition cond,
9756            DataType dt,
9757            DRegister rd,
9758            DRegister rm,
9759            const DOperand& operand) {
9760    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9761    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9762    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9763    VIXL_ASSERT(allow_macro_instructions_);
9764    VIXL_ASSERT(OutsideITBlock());
9765    MacroEmissionCheckScope guard(this);
9766    ITScope it_scope(this, &cond);
9767    vsli(cond, dt, rd, rm, operand);
9768  }
9769  void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9770    Vsli(al, dt, rd, rm, operand);
9771  }
9772
9773  void Vsli(Condition cond,
9774            DataType dt,
9775            QRegister rd,
9776            QRegister rm,
9777            const QOperand& operand) {
9778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9779    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9780    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9781    VIXL_ASSERT(allow_macro_instructions_);
9782    VIXL_ASSERT(OutsideITBlock());
9783    MacroEmissionCheckScope guard(this);
9784    ITScope it_scope(this, &cond);
9785    vsli(cond, dt, rd, rm, operand);
9786  }
9787  void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9788    Vsli(al, dt, rd, rm, operand);
9789  }
9790
9791  void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) {
9792    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9793    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9794    VIXL_ASSERT(allow_macro_instructions_);
9795    VIXL_ASSERT(OutsideITBlock());
9796    MacroEmissionCheckScope guard(this);
9797    ITScope it_scope(this, &cond);
9798    vsqrt(cond, dt, rd, rm);
9799  }
9800  void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); }
9801
9802  void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9803    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9805    VIXL_ASSERT(allow_macro_instructions_);
9806    VIXL_ASSERT(OutsideITBlock());
9807    MacroEmissionCheckScope guard(this);
9808    ITScope it_scope(this, &cond);
9809    vsqrt(cond, dt, rd, rm);
9810  }
9811  void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); }
9812
9813  void Vsra(Condition cond,
9814            DataType dt,
9815            DRegister rd,
9816            DRegister rm,
9817            const DOperand& operand) {
9818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9820    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9821    VIXL_ASSERT(allow_macro_instructions_);
9822    VIXL_ASSERT(OutsideITBlock());
9823    MacroEmissionCheckScope guard(this);
9824    ITScope it_scope(this, &cond);
9825    vsra(cond, dt, rd, rm, operand);
9826  }
9827  void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9828    Vsra(al, dt, rd, rm, operand);
9829  }
9830
9831  void Vsra(Condition cond,
9832            DataType dt,
9833            QRegister rd,
9834            QRegister rm,
9835            const QOperand& operand) {
9836    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9837    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9838    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9839    VIXL_ASSERT(allow_macro_instructions_);
9840    VIXL_ASSERT(OutsideITBlock());
9841    MacroEmissionCheckScope guard(this);
9842    ITScope it_scope(this, &cond);
9843    vsra(cond, dt, rd, rm, operand);
9844  }
9845  void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9846    Vsra(al, dt, rd, rm, operand);
9847  }
9848
9849  void Vsri(Condition cond,
9850            DataType dt,
9851            DRegister rd,
9852            DRegister rm,
9853            const DOperand& operand) {
9854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9855    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9856    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9857    VIXL_ASSERT(allow_macro_instructions_);
9858    VIXL_ASSERT(OutsideITBlock());
9859    MacroEmissionCheckScope guard(this);
9860    ITScope it_scope(this, &cond);
9861    vsri(cond, dt, rd, rm, operand);
9862  }
9863  void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9864    Vsri(al, dt, rd, rm, operand);
9865  }
9866
9867  void Vsri(Condition cond,
9868            DataType dt,
9869            QRegister rd,
9870            QRegister rm,
9871            const QOperand& operand) {
9872    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9873    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9874    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9875    VIXL_ASSERT(allow_macro_instructions_);
9876    VIXL_ASSERT(OutsideITBlock());
9877    MacroEmissionCheckScope guard(this);
9878    ITScope it_scope(this, &cond);
9879    vsri(cond, dt, rd, rm, operand);
9880  }
9881  void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9882    Vsri(al, dt, rd, rm, operand);
9883  }
9884
9885  void Vst1(Condition cond,
9886            DataType dt,
9887            const NeonRegisterList& nreglist,
9888            const AlignedMemOperand& operand) {
9889    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
9890    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9891    VIXL_ASSERT(allow_macro_instructions_);
9892    VIXL_ASSERT(OutsideITBlock());
9893    MacroEmissionCheckScope guard(this);
9894    ITScope it_scope(this, &cond);
9895    vst1(cond, dt, nreglist, operand);
9896  }
9897  void Vst1(DataType dt,
9898            const NeonRegisterList& nreglist,
9899            const AlignedMemOperand& operand) {
9900    Vst1(al, dt, nreglist, operand);
9901  }
9902
9903  void Vst2(Condition cond,
9904            DataType dt,
9905            const NeonRegisterList& nreglist,
9906            const AlignedMemOperand& operand) {
9907    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
9908    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9909    VIXL_ASSERT(allow_macro_instructions_);
9910    VIXL_ASSERT(OutsideITBlock());
9911    MacroEmissionCheckScope guard(this);
9912    ITScope it_scope(this, &cond);
9913    vst2(cond, dt, nreglist, operand);
9914  }
9915  void Vst2(DataType dt,
9916            const NeonRegisterList& nreglist,
9917            const AlignedMemOperand& operand) {
9918    Vst2(al, dt, nreglist, operand);
9919  }
9920
9921  void Vst3(Condition cond,
9922            DataType dt,
9923            const NeonRegisterList& nreglist,
9924            const AlignedMemOperand& operand) {
9925    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
9926    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9927    VIXL_ASSERT(allow_macro_instructions_);
9928    VIXL_ASSERT(OutsideITBlock());
9929    MacroEmissionCheckScope guard(this);
9930    ITScope it_scope(this, &cond);
9931    vst3(cond, dt, nreglist, operand);
9932  }
9933  void Vst3(DataType dt,
9934            const NeonRegisterList& nreglist,
9935            const AlignedMemOperand& operand) {
9936    Vst3(al, dt, nreglist, operand);
9937  }
9938
9939  void Vst3(Condition cond,
9940            DataType dt,
9941            const NeonRegisterList& nreglist,
9942            const MemOperand& operand) {
9943    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
9944    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9945    VIXL_ASSERT(allow_macro_instructions_);
9946    VIXL_ASSERT(OutsideITBlock());
9947    MacroEmissionCheckScope guard(this);
9948    ITScope it_scope(this, &cond);
9949    vst3(cond, dt, nreglist, operand);
9950  }
9951  void Vst3(DataType dt,
9952            const NeonRegisterList& nreglist,
9953            const MemOperand& operand) {
9954    Vst3(al, dt, nreglist, operand);
9955  }
9956
9957  void Vst4(Condition cond,
9958            DataType dt,
9959            const NeonRegisterList& nreglist,
9960            const AlignedMemOperand& operand) {
9961    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
9962    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9963    VIXL_ASSERT(allow_macro_instructions_);
9964    VIXL_ASSERT(OutsideITBlock());
9965    MacroEmissionCheckScope guard(this);
9966    ITScope it_scope(this, &cond);
9967    vst4(cond, dt, nreglist, operand);
9968  }
9969  void Vst4(DataType dt,
9970            const NeonRegisterList& nreglist,
9971            const AlignedMemOperand& operand) {
9972    Vst4(al, dt, nreglist, operand);
9973  }
9974
9975  void Vstm(Condition cond,
9976            DataType dt,
9977            Register rn,
9978            WriteBack write_back,
9979            DRegisterList dreglist) {
9980    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9981    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
9982    VIXL_ASSERT(allow_macro_instructions_);
9983    VIXL_ASSERT(OutsideITBlock());
9984    MacroEmissionCheckScope guard(this);
9985    ITScope it_scope(this, &cond);
9986    vstm(cond, dt, rn, write_back, dreglist);
9987  }
9988  void Vstm(DataType dt,
9989            Register rn,
9990            WriteBack write_back,
9991            DRegisterList dreglist) {
9992    Vstm(al, dt, rn, write_back, dreglist);
9993  }
9994  void Vstm(Condition cond,
9995            Register rn,
9996            WriteBack write_back,
9997            DRegisterList dreglist) {
9998    Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist);
9999  }
10000  void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) {
10001    Vstm(al, kDataTypeValueNone, rn, write_back, dreglist);
10002  }
10003
10004  void Vstm(Condition cond,
10005            DataType dt,
10006            Register rn,
10007            WriteBack write_back,
10008            SRegisterList sreglist) {
10009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10010    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10011    VIXL_ASSERT(allow_macro_instructions_);
10012    VIXL_ASSERT(OutsideITBlock());
10013    MacroEmissionCheckScope guard(this);
10014    ITScope it_scope(this, &cond);
10015    vstm(cond, dt, rn, write_back, sreglist);
10016  }
10017  void Vstm(DataType dt,
10018            Register rn,
10019            WriteBack write_back,
10020            SRegisterList sreglist) {
10021    Vstm(al, dt, rn, write_back, sreglist);
10022  }
10023  void Vstm(Condition cond,
10024            Register rn,
10025            WriteBack write_back,
10026            SRegisterList sreglist) {
10027    Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist);
10028  }
10029  void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) {
10030    Vstm(al, kDataTypeValueNone, rn, write_back, sreglist);
10031  }
10032
10033  void Vstmdb(Condition cond,
10034              DataType dt,
10035              Register rn,
10036              WriteBack write_back,
10037              DRegisterList dreglist) {
10038    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10039    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10040    VIXL_ASSERT(allow_macro_instructions_);
10041    VIXL_ASSERT(OutsideITBlock());
10042    MacroEmissionCheckScope guard(this);
10043    ITScope it_scope(this, &cond);
10044    vstmdb(cond, dt, rn, write_back, dreglist);
10045  }
10046  void Vstmdb(DataType dt,
10047              Register rn,
10048              WriteBack write_back,
10049              DRegisterList dreglist) {
10050    Vstmdb(al, dt, rn, write_back, dreglist);
10051  }
10052  void Vstmdb(Condition cond,
10053              Register rn,
10054              WriteBack write_back,
10055              DRegisterList dreglist) {
10056    Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
10057  }
10058  void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
10059    Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
10060  }
10061
10062  void Vstmdb(Condition cond,
10063              DataType dt,
10064              Register rn,
10065              WriteBack write_back,
10066              SRegisterList sreglist) {
10067    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10068    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10069    VIXL_ASSERT(allow_macro_instructions_);
10070    VIXL_ASSERT(OutsideITBlock());
10071    MacroEmissionCheckScope guard(this);
10072    ITScope it_scope(this, &cond);
10073    vstmdb(cond, dt, rn, write_back, sreglist);
10074  }
10075  void Vstmdb(DataType dt,
10076              Register rn,
10077              WriteBack write_back,
10078              SRegisterList sreglist) {
10079    Vstmdb(al, dt, rn, write_back, sreglist);
10080  }
10081  void Vstmdb(Condition cond,
10082              Register rn,
10083              WriteBack write_back,
10084              SRegisterList sreglist) {
10085    Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
10086  }
10087  void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
10088    Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
10089  }
10090
10091  void Vstmia(Condition cond,
10092              DataType dt,
10093              Register rn,
10094              WriteBack write_back,
10095              DRegisterList dreglist) {
10096    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10097    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10098    VIXL_ASSERT(allow_macro_instructions_);
10099    VIXL_ASSERT(OutsideITBlock());
10100    MacroEmissionCheckScope guard(this);
10101    ITScope it_scope(this, &cond);
10102    vstmia(cond, dt, rn, write_back, dreglist);
10103  }
10104  void Vstmia(DataType dt,
10105              Register rn,
10106              WriteBack write_back,
10107              DRegisterList dreglist) {
10108    Vstmia(al, dt, rn, write_back, dreglist);
10109  }
10110  void Vstmia(Condition cond,
10111              Register rn,
10112              WriteBack write_back,
10113              DRegisterList dreglist) {
10114    Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
10115  }
10116  void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
10117    Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist);
10118  }
10119
10120  void Vstmia(Condition cond,
10121              DataType dt,
10122              Register rn,
10123              WriteBack write_back,
10124              SRegisterList sreglist) {
10125    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10126    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10127    VIXL_ASSERT(allow_macro_instructions_);
10128    VIXL_ASSERT(OutsideITBlock());
10129    MacroEmissionCheckScope guard(this);
10130    ITScope it_scope(this, &cond);
10131    vstmia(cond, dt, rn, write_back, sreglist);
10132  }
10133  void Vstmia(DataType dt,
10134              Register rn,
10135              WriteBack write_back,
10136              SRegisterList sreglist) {
10137    Vstmia(al, dt, rn, write_back, sreglist);
10138  }
10139  void Vstmia(Condition cond,
10140              Register rn,
10141              WriteBack write_back,
10142              SRegisterList sreglist) {
10143    Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
10144  }
10145  void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
10146    Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist);
10147  }
10148
10149  void Vstr(Condition cond,
10150            DataType dt,
10151            DRegister rd,
10152            const MemOperand& operand) {
10153    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10154    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10155    VIXL_ASSERT(allow_macro_instructions_);
10156    VIXL_ASSERT(OutsideITBlock());
10157    MacroEmissionCheckScope guard(this);
10158    ITScope it_scope(this, &cond);
10159    vstr(cond, dt, rd, operand);
10160  }
10161  void Vstr(DataType dt, DRegister rd, const MemOperand& operand) {
10162    Vstr(al, dt, rd, operand);
10163  }
10164  void Vstr(Condition cond, DRegister rd, const MemOperand& operand) {
10165    Vstr(cond, Untyped64, rd, operand);
10166  }
10167  void Vstr(DRegister rd, const MemOperand& operand) {
10168    Vstr(al, Untyped64, rd, operand);
10169  }
10170
10171  void Vstr(Condition cond,
10172            DataType dt,
10173            SRegister rd,
10174            const MemOperand& operand) {
10175    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10176    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10177    VIXL_ASSERT(allow_macro_instructions_);
10178    VIXL_ASSERT(OutsideITBlock());
10179    MacroEmissionCheckScope guard(this);
10180    ITScope it_scope(this, &cond);
10181    vstr(cond, dt, rd, operand);
10182  }
10183  void Vstr(DataType dt, SRegister rd, const MemOperand& operand) {
10184    Vstr(al, dt, rd, operand);
10185  }
10186  void Vstr(Condition cond, SRegister rd, const MemOperand& operand) {
10187    Vstr(cond, Untyped32, rd, operand);
10188  }
10189  void Vstr(SRegister rd, const MemOperand& operand) {
10190    Vstr(al, Untyped32, rd, operand);
10191  }
10192
10193  void Vsub(
10194      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10196    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10198    VIXL_ASSERT(allow_macro_instructions_);
10199    VIXL_ASSERT(OutsideITBlock());
10200    MacroEmissionCheckScope guard(this);
10201    ITScope it_scope(this, &cond);
10202    vsub(cond, dt, rd, rn, rm);
10203  }
10204  void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10205    Vsub(al, dt, rd, rn, rm);
10206  }
10207
10208  void Vsub(
10209      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10210    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10212    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10213    VIXL_ASSERT(allow_macro_instructions_);
10214    VIXL_ASSERT(OutsideITBlock());
10215    MacroEmissionCheckScope guard(this);
10216    ITScope it_scope(this, &cond);
10217    vsub(cond, dt, rd, rn, rm);
10218  }
10219  void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10220    Vsub(al, dt, rd, rn, rm);
10221  }
10222
10223  void Vsub(
10224      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10225    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10226    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10227    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10228    VIXL_ASSERT(allow_macro_instructions_);
10229    VIXL_ASSERT(OutsideITBlock());
10230    MacroEmissionCheckScope guard(this);
10231    ITScope it_scope(this, &cond);
10232    vsub(cond, dt, rd, rn, rm);
10233  }
10234  void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10235    Vsub(al, dt, rd, rn, rm);
10236  }
10237
10238  void Vsubhn(
10239      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10240    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10241    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10242    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10243    VIXL_ASSERT(allow_macro_instructions_);
10244    VIXL_ASSERT(OutsideITBlock());
10245    MacroEmissionCheckScope guard(this);
10246    ITScope it_scope(this, &cond);
10247    vsubhn(cond, dt, rd, rn, rm);
10248  }
10249  void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10250    Vsubhn(al, dt, rd, rn, rm);
10251  }
10252
10253  void Vsubl(
10254      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10255    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10256    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10257    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10258    VIXL_ASSERT(allow_macro_instructions_);
10259    VIXL_ASSERT(OutsideITBlock());
10260    MacroEmissionCheckScope guard(this);
10261    ITScope it_scope(this, &cond);
10262    vsubl(cond, dt, rd, rn, rm);
10263  }
10264  void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10265    Vsubl(al, dt, rd, rn, rm);
10266  }
10267
10268  void Vsubw(
10269      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10270    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10272    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10273    VIXL_ASSERT(allow_macro_instructions_);
10274    VIXL_ASSERT(OutsideITBlock());
10275    MacroEmissionCheckScope guard(this);
10276    ITScope it_scope(this, &cond);
10277    vsubw(cond, dt, rd, rn, rm);
10278  }
10279  void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10280    Vsubw(al, dt, rd, rn, rm);
10281  }
10282
10283  void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10284    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10285    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10286    VIXL_ASSERT(allow_macro_instructions_);
10287    VIXL_ASSERT(OutsideITBlock());
10288    MacroEmissionCheckScope guard(this);
10289    ITScope it_scope(this, &cond);
10290    vswp(cond, dt, rd, rm);
10291  }
10292  void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); }
10293  void Vswp(Condition cond, DRegister rd, DRegister rm) {
10294    Vswp(cond, kDataTypeValueNone, rd, rm);
10295  }
10296  void Vswp(DRegister rd, DRegister rm) {
10297    Vswp(al, kDataTypeValueNone, rd, rm);
10298  }
10299
10300  void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10301    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10302    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10303    VIXL_ASSERT(allow_macro_instructions_);
10304    VIXL_ASSERT(OutsideITBlock());
10305    MacroEmissionCheckScope guard(this);
10306    ITScope it_scope(this, &cond);
10307    vswp(cond, dt, rd, rm);
10308  }
10309  void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); }
10310  void Vswp(Condition cond, QRegister rd, QRegister rm) {
10311    Vswp(cond, kDataTypeValueNone, rd, rm);
10312  }
10313  void Vswp(QRegister rd, QRegister rm) {
10314    Vswp(al, kDataTypeValueNone, rd, rm);
10315  }
10316
10317  void Vtbl(Condition cond,
10318            DataType dt,
10319            DRegister rd,
10320            const NeonRegisterList& nreglist,
10321            DRegister rm) {
10322    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10323    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10325    VIXL_ASSERT(allow_macro_instructions_);
10326    VIXL_ASSERT(OutsideITBlock());
10327    MacroEmissionCheckScope guard(this);
10328    ITScope it_scope(this, &cond);
10329    vtbl(cond, dt, rd, nreglist, rm);
10330  }
10331  void Vtbl(DataType dt,
10332            DRegister rd,
10333            const NeonRegisterList& nreglist,
10334            DRegister rm) {
10335    Vtbl(al, dt, rd, nreglist, rm);
10336  }
10337
10338  void Vtbx(Condition cond,
10339            DataType dt,
10340            DRegister rd,
10341            const NeonRegisterList& nreglist,
10342            DRegister rm) {
10343    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10344    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10345    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10346    VIXL_ASSERT(allow_macro_instructions_);
10347    VIXL_ASSERT(OutsideITBlock());
10348    MacroEmissionCheckScope guard(this);
10349    ITScope it_scope(this, &cond);
10350    vtbx(cond, dt, rd, nreglist, rm);
10351  }
10352  void Vtbx(DataType dt,
10353            DRegister rd,
10354            const NeonRegisterList& nreglist,
10355            DRegister rm) {
10356    Vtbx(al, dt, rd, nreglist, rm);
10357  }
10358
10359  void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10360    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10361    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10362    VIXL_ASSERT(allow_macro_instructions_);
10363    VIXL_ASSERT(OutsideITBlock());
10364    MacroEmissionCheckScope guard(this);
10365    ITScope it_scope(this, &cond);
10366    vtrn(cond, dt, rd, rm);
10367  }
10368  void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); }
10369
10370  void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10372    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10373    VIXL_ASSERT(allow_macro_instructions_);
10374    VIXL_ASSERT(OutsideITBlock());
10375    MacroEmissionCheckScope guard(this);
10376    ITScope it_scope(this, &cond);
10377    vtrn(cond, dt, rd, rm);
10378  }
10379  void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); }
10380
10381  void Vtst(
10382      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10384    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10385    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10386    VIXL_ASSERT(allow_macro_instructions_);
10387    VIXL_ASSERT(OutsideITBlock());
10388    MacroEmissionCheckScope guard(this);
10389    ITScope it_scope(this, &cond);
10390    vtst(cond, dt, rd, rn, rm);
10391  }
10392  void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10393    Vtst(al, dt, rd, rn, rm);
10394  }
10395
10396  void Vtst(
10397      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10398    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10399    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10401    VIXL_ASSERT(allow_macro_instructions_);
10402    VIXL_ASSERT(OutsideITBlock());
10403    MacroEmissionCheckScope guard(this);
10404    ITScope it_scope(this, &cond);
10405    vtst(cond, dt, rd, rn, rm);
10406  }
10407  void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10408    Vtst(al, dt, rd, rn, rm);
10409  }
10410
10411  void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10412    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10413    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10414    VIXL_ASSERT(allow_macro_instructions_);
10415    VIXL_ASSERT(OutsideITBlock());
10416    MacroEmissionCheckScope guard(this);
10417    ITScope it_scope(this, &cond);
10418    vuzp(cond, dt, rd, rm);
10419  }
10420  void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); }
10421
10422  void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10423    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10425    VIXL_ASSERT(allow_macro_instructions_);
10426    VIXL_ASSERT(OutsideITBlock());
10427    MacroEmissionCheckScope guard(this);
10428    ITScope it_scope(this, &cond);
10429    vuzp(cond, dt, rd, rm);
10430  }
10431  void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); }
10432
10433  void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10434    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10435    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10436    VIXL_ASSERT(allow_macro_instructions_);
10437    VIXL_ASSERT(OutsideITBlock());
10438    MacroEmissionCheckScope guard(this);
10439    ITScope it_scope(this, &cond);
10440    vzip(cond, dt, rd, rm);
10441  }
10442  void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); }
10443
10444  void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10445    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10446    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10447    VIXL_ASSERT(allow_macro_instructions_);
10448    VIXL_ASSERT(OutsideITBlock());
10449    MacroEmissionCheckScope guard(this);
10450    ITScope it_scope(this, &cond);
10451    vzip(cond, dt, rd, rm);
10452  }
10453  void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); }
10454
10455  void Yield(Condition cond) {
10456    VIXL_ASSERT(allow_macro_instructions_);
10457    VIXL_ASSERT(OutsideITBlock());
10458    MacroEmissionCheckScope guard(this);
10459    ITScope it_scope(this, &cond);
10460    yield(cond);
10461  }
10462  void Yield() { Yield(al); }
10463  void Vabs(Condition cond, VRegister rd, VRegister rm) {
10464    VIXL_ASSERT(rd.IsS() || rd.IsD());
10465    VIXL_ASSERT(rd.GetType() == rm.GetType());
10466    if (rd.IsS()) {
10467      Vabs(cond, F32, rd.S(), rm.S());
10468    } else {
10469      Vabs(cond, F64, rd.D(), rm.D());
10470    }
10471  }
10472  void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); }
10473  void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10474    VIXL_ASSERT(rd.IsS() || rd.IsD());
10475    VIXL_ASSERT(rd.GetType() == rn.GetType());
10476    VIXL_ASSERT(rd.GetType() == rm.GetType());
10477    if (rd.IsS()) {
10478      Vadd(cond, F32, rd.S(), rn.S(), rm.S());
10479    } else {
10480      Vadd(cond, F64, rd.D(), rn.D(), rm.D());
10481    }
10482  }
10483  void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); }
10484  void Vcmp(Condition cond, VRegister rd, VRegister rm) {
10485    VIXL_ASSERT(rd.IsS() || rd.IsD());
10486    VIXL_ASSERT(rd.GetType() == rm.GetType());
10487    if (rd.IsS()) {
10488      Vcmp(cond, F32, rd.S(), rm.S());
10489    } else {
10490      Vcmp(cond, F64, rd.D(), rm.D());
10491    }
10492  }
10493  void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); }
10494  void Vcmpe(Condition cond, VRegister rd, VRegister rm) {
10495    VIXL_ASSERT(rd.IsS() || rd.IsD());
10496    VIXL_ASSERT(rd.GetType() == rm.GetType());
10497    if (rd.IsS()) {
10498      Vcmpe(cond, F32, rd.S(), rm.S());
10499    } else {
10500      Vcmpe(cond, F64, rd.D(), rm.D());
10501    }
10502  }
10503  void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); }
10504  void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10505    VIXL_ASSERT(rd.IsS() || rd.IsD());
10506    VIXL_ASSERT(rd.GetType() == rn.GetType());
10507    VIXL_ASSERT(rd.GetType() == rm.GetType());
10508    if (rd.IsS()) {
10509      Vdiv(cond, F32, rd.S(), rn.S(), rm.S());
10510    } else {
10511      Vdiv(cond, F64, rd.D(), rn.D(), rm.D());
10512    }
10513  }
10514  void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); }
10515  void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10516    VIXL_ASSERT(rd.IsS() || rd.IsD());
10517    VIXL_ASSERT(rd.GetType() == rn.GetType());
10518    VIXL_ASSERT(rd.GetType() == rm.GetType());
10519    if (rd.IsS()) {
10520      Vfma(cond, F32, rd.S(), rn.S(), rm.S());
10521    } else {
10522      Vfma(cond, F64, rd.D(), rn.D(), rm.D());
10523    }
10524  }
10525  void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); }
10526  void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10527    VIXL_ASSERT(rd.IsS() || rd.IsD());
10528    VIXL_ASSERT(rd.GetType() == rn.GetType());
10529    VIXL_ASSERT(rd.GetType() == rm.GetType());
10530    if (rd.IsS()) {
10531      Vfms(cond, F32, rd.S(), rn.S(), rm.S());
10532    } else {
10533      Vfms(cond, F64, rd.D(), rn.D(), rm.D());
10534    }
10535  }
10536  void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); }
10537  void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10538    VIXL_ASSERT(rd.IsS() || rd.IsD());
10539    VIXL_ASSERT(rd.GetType() == rn.GetType());
10540    VIXL_ASSERT(rd.GetType() == rm.GetType());
10541    if (rd.IsS()) {
10542      Vfnma(cond, F32, rd.S(), rn.S(), rm.S());
10543    } else {
10544      Vfnma(cond, F64, rd.D(), rn.D(), rm.D());
10545    }
10546  }
10547  void Vfnma(VRegister rd, VRegister rn, VRegister rm) {
10548    Vfnma(al, rd, rn, rm);
10549  }
10550  void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10551    VIXL_ASSERT(rd.IsS() || rd.IsD());
10552    VIXL_ASSERT(rd.GetType() == rn.GetType());
10553    VIXL_ASSERT(rd.GetType() == rm.GetType());
10554    if (rd.IsS()) {
10555      Vfnms(cond, F32, rd.S(), rn.S(), rm.S());
10556    } else {
10557      Vfnms(cond, F64, rd.D(), rn.D(), rm.D());
10558    }
10559  }
10560  void Vfnms(VRegister rd, VRegister rn, VRegister rm) {
10561    Vfnms(al, rd, rn, rm);
10562  }
10563  void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) {
10564    VIXL_ASSERT(rd.IsS() || rd.IsD());
10565    VIXL_ASSERT(rd.GetType() == rn.GetType());
10566    VIXL_ASSERT(rd.GetType() == rm.GetType());
10567    if (rd.IsS()) {
10568      Vmaxnm(F32, rd.S(), rn.S(), rm.S());
10569    } else {
10570      Vmaxnm(F64, rd.D(), rn.D(), rm.D());
10571    }
10572  }
10573  void Vminnm(VRegister rd, VRegister rn, VRegister rm) {
10574    VIXL_ASSERT(rd.IsS() || rd.IsD());
10575    VIXL_ASSERT(rd.GetType() == rn.GetType());
10576    VIXL_ASSERT(rd.GetType() == rm.GetType());
10577    if (rd.IsS()) {
10578      Vminnm(F32, rd.S(), rn.S(), rm.S());
10579    } else {
10580      Vminnm(F64, rd.D(), rn.D(), rm.D());
10581    }
10582  }
10583  void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10584    VIXL_ASSERT(rd.IsS() || rd.IsD());
10585    VIXL_ASSERT(rd.GetType() == rn.GetType());
10586    VIXL_ASSERT(rd.GetType() == rm.GetType());
10587    if (rd.IsS()) {
10588      Vmla(cond, F32, rd.S(), rn.S(), rm.S());
10589    } else {
10590      Vmla(cond, F64, rd.D(), rn.D(), rm.D());
10591    }
10592  }
10593  void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); }
10594  void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10595    VIXL_ASSERT(rd.IsS() || rd.IsD());
10596    VIXL_ASSERT(rd.GetType() == rn.GetType());
10597    VIXL_ASSERT(rd.GetType() == rm.GetType());
10598    if (rd.IsS()) {
10599      Vmls(cond, F32, rd.S(), rn.S(), rm.S());
10600    } else {
10601      Vmls(cond, F64, rd.D(), rn.D(), rm.D());
10602    }
10603  }
10604  void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); }
10605  void Vmov(Condition cond, VRegister rd, VRegister rm) {
10606    VIXL_ASSERT(rd.IsS() || rd.IsD());
10607    VIXL_ASSERT(rd.GetType() == rm.GetType());
10608    if (rd.IsS()) {
10609      Vmov(cond, F32, rd.S(), rm.S());
10610    } else {
10611      Vmov(cond, F64, rd.D(), rm.D());
10612    }
10613  }
10614  void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); }
10615  void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10616    VIXL_ASSERT(rd.IsS() || rd.IsD());
10617    VIXL_ASSERT(rd.GetType() == rn.GetType());
10618    VIXL_ASSERT(rd.GetType() == rm.GetType());
10619    if (rd.IsS()) {
10620      Vmul(cond, F32, rd.S(), rn.S(), rm.S());
10621    } else {
10622      Vmul(cond, F64, rd.D(), rn.D(), rm.D());
10623    }
10624  }
10625  void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); }
10626  void Vneg(Condition cond, VRegister rd, VRegister rm) {
10627    VIXL_ASSERT(rd.IsS() || rd.IsD());
10628    VIXL_ASSERT(rd.GetType() == rm.GetType());
10629    if (rd.IsS()) {
10630      Vneg(cond, F32, rd.S(), rm.S());
10631    } else {
10632      Vneg(cond, F64, rd.D(), rm.D());
10633    }
10634  }
10635  void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); }
10636  void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10637    VIXL_ASSERT(rd.IsS() || rd.IsD());
10638    VIXL_ASSERT(rd.GetType() == rn.GetType());
10639    VIXL_ASSERT(rd.GetType() == rm.GetType());
10640    if (rd.IsS()) {
10641      Vnmla(cond, F32, rd.S(), rn.S(), rm.S());
10642    } else {
10643      Vnmla(cond, F64, rd.D(), rn.D(), rm.D());
10644    }
10645  }
10646  void Vnmla(VRegister rd, VRegister rn, VRegister rm) {
10647    Vnmla(al, rd, rn, rm);
10648  }
10649  void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10650    VIXL_ASSERT(rd.IsS() || rd.IsD());
10651    VIXL_ASSERT(rd.GetType() == rn.GetType());
10652    VIXL_ASSERT(rd.GetType() == rm.GetType());
10653    if (rd.IsS()) {
10654      Vnmls(cond, F32, rd.S(), rn.S(), rm.S());
10655    } else {
10656      Vnmls(cond, F64, rd.D(), rn.D(), rm.D());
10657    }
10658  }
10659  void Vnmls(VRegister rd, VRegister rn, VRegister rm) {
10660    Vnmls(al, rd, rn, rm);
10661  }
10662  void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10663    VIXL_ASSERT(rd.IsS() || rd.IsD());
10664    VIXL_ASSERT(rd.GetType() == rn.GetType());
10665    VIXL_ASSERT(rd.GetType() == rm.GetType());
10666    if (rd.IsS()) {
10667      Vnmul(cond, F32, rd.S(), rn.S(), rm.S());
10668    } else {
10669      Vnmul(cond, F64, rd.D(), rn.D(), rm.D());
10670    }
10671  }
10672  void Vnmul(VRegister rd, VRegister rn, VRegister rm) {
10673    Vnmul(al, rd, rn, rm);
10674  }
10675  void Vseleq(VRegister rd, VRegister rn, VRegister rm) {
10676    VIXL_ASSERT(rd.IsS() || rd.IsD());
10677    VIXL_ASSERT(rd.GetType() == rn.GetType());
10678    VIXL_ASSERT(rd.GetType() == rm.GetType());
10679    if (rd.IsS()) {
10680      Vseleq(F32, rd.S(), rn.S(), rm.S());
10681    } else {
10682      Vseleq(F64, rd.D(), rn.D(), rm.D());
10683    }
10684  }
10685  void Vselge(VRegister rd, VRegister rn, VRegister rm) {
10686    VIXL_ASSERT(rd.IsS() || rd.IsD());
10687    VIXL_ASSERT(rd.GetType() == rn.GetType());
10688    VIXL_ASSERT(rd.GetType() == rm.GetType());
10689    if (rd.IsS()) {
10690      Vselge(F32, rd.S(), rn.S(), rm.S());
10691    } else {
10692      Vselge(F64, rd.D(), rn.D(), rm.D());
10693    }
10694  }
10695  void Vselgt(VRegister rd, VRegister rn, VRegister rm) {
10696    VIXL_ASSERT(rd.IsS() || rd.IsD());
10697    VIXL_ASSERT(rd.GetType() == rn.GetType());
10698    VIXL_ASSERT(rd.GetType() == rm.GetType());
10699    if (rd.IsS()) {
10700      Vselgt(F32, rd.S(), rn.S(), rm.S());
10701    } else {
10702      Vselgt(F64, rd.D(), rn.D(), rm.D());
10703    }
10704  }
10705  void Vselvs(VRegister rd, VRegister rn, VRegister rm) {
10706    VIXL_ASSERT(rd.IsS() || rd.IsD());
10707    VIXL_ASSERT(rd.GetType() == rn.GetType());
10708    VIXL_ASSERT(rd.GetType() == rm.GetType());
10709    if (rd.IsS()) {
10710      Vselvs(F32, rd.S(), rn.S(), rm.S());
10711    } else {
10712      Vselvs(F64, rd.D(), rn.D(), rm.D());
10713    }
10714  }
10715  void Vsqrt(Condition cond, VRegister rd, VRegister rm) {
10716    VIXL_ASSERT(rd.IsS() || rd.IsD());
10717    VIXL_ASSERT(rd.GetType() == rm.GetType());
10718    if (rd.IsS()) {
10719      Vsqrt(cond, F32, rd.S(), rm.S());
10720    } else {
10721      Vsqrt(cond, F64, rd.D(), rm.D());
10722    }
10723  }
10724  void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); }
10725  void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10726    VIXL_ASSERT(rd.IsS() || rd.IsD());
10727    VIXL_ASSERT(rd.GetType() == rn.GetType());
10728    VIXL_ASSERT(rd.GetType() == rm.GetType());
10729    if (rd.IsS()) {
10730      Vsub(cond, F32, rd.S(), rn.S(), rm.S());
10731    } else {
10732      Vsub(cond, F64, rd.D(), rn.D(), rm.D());
10733    }
10734  }
10735  void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); }
10736  // End of generated code.
10737
10738  virtual bool AllowUnpredictable() VIXL_OVERRIDE {
10739    VIXL_ABORT_WITH_MSG("Unpredictable instruction.\n");
10740    return false;
10741  }
10742  virtual bool AllowStronglyDiscouraged() VIXL_OVERRIDE {
10743    VIXL_ABORT_WITH_MSG(
10744        "ARM strongly recommends to not use this instruction.\n");
10745    return false;
10746  }
10747
10748 private:
10749  RegisterList available_;
10750  VRegisterList available_vfp_;
10751  MacroAssemblerContext context_;
10752  Label::Offset checkpoint_;
10753  LiteralPoolManager literal_pool_manager_;
10754  VeneerPoolManager veneer_pool_manager_;
10755  bool generate_simulator_code_;
10756  bool allow_macro_instructions_;
10757};
10758
10759// This scope utility allows scratch registers to be managed safely. The
10760// MacroAssembler's GetScratchRegisterList() is used as a pool of scratch
10761// registers. These registers can be allocated on demand, and will be returned
10762// at the end of the scope.
10763//
10764// When the scope ends, the MacroAssembler's lists will be restored to their
10765// original state, even if the lists were modified by some other means.
10766class UseScratchRegisterScope {
10767 public:
10768  // This constructor implicitly calls the `Open` function to initialise the
10769  // scope, so it is ready to use immediately after it has been constructed.
10770  explicit UseScratchRegisterScope(MacroAssembler* masm)
10771      : available_(NULL),
10772        available_vfp_(NULL),
10773        old_available_(0),
10774        old_available_vfp_(0) {
10775    Open(masm);
10776  }
10777  // This constructor allows deferred and optional initialisation of the scope.
10778  // The user is required to explicitly call the `Open` function before using
10779  // the scope.
10780  UseScratchRegisterScope()
10781      : available_(NULL),
10782        available_vfp_(NULL),
10783        old_available_(0),
10784        old_available_vfp_(0) {}
10785
10786  // This function performs the actual initialisation work.
10787  void Open(MacroAssembler* masm);
10788
10789  // The destructor always implicitly calls the `Close` function.
10790  ~UseScratchRegisterScope() { Close(); }
10791
10792  // This function performs the cleaning-up work. It must succeed even if the
10793  // scope has not been opened. It is safe to call multiple times.
10794  void Close();
10795
10796  bool IsAvailable(const Register& reg) const;
10797  bool IsAvailable(const VRegister& reg) const;
10798
10799  // Take a register from the temp list. It will be returned automatically when
10800  // the scope ends.
10801  Register Acquire();
10802  VRegister AcquireV(unsigned size_in_bits);
10803  QRegister AcquireQ();
10804  DRegister AcquireD();
10805  SRegister AcquireS();
10806
10807  // Explicitly release an acquired (or excluded) register, putting it back in
10808  // the temp list.
10809  void Release(const Register& reg);
10810  void Release(const VRegister& reg);
10811
10812  // Make the specified registers available as scratch registers for the
10813  // duration of this scope.
10814  void Include(const RegisterList& list);
10815  void Include(const Register& reg1,
10816               const Register& reg2 = NoReg,
10817               const Register& reg3 = NoReg,
10818               const Register& reg4 = NoReg) {
10819    Include(RegisterList(reg1, reg2, reg3, reg4));
10820  }
10821  void Include(const VRegisterList& list);
10822  void Include(const VRegister& reg1,
10823               const VRegister& reg2 = NoVReg,
10824               const VRegister& reg3 = NoVReg,
10825               const VRegister& reg4 = NoVReg) {
10826    Include(VRegisterList(reg1, reg2, reg3, reg4));
10827  }
10828
10829  // Make sure that the specified registers are not available in this scope.
10830  // This can be used to prevent helper functions from using sensitive
10831  // registers, for example.
10832  void Exclude(const RegisterList& list);
10833  void Exclude(const Register& reg1,
10834               const Register& reg2 = NoReg,
10835               const Register& reg3 = NoReg,
10836               const Register& reg4 = NoReg) {
10837    Exclude(RegisterList(reg1, reg2, reg3, reg4));
10838  }
10839  void Exclude(const VRegisterList& list);
10840  void Exclude(const VRegister& reg1,
10841               const VRegister& reg2 = NoVReg,
10842               const VRegister& reg3 = NoVReg,
10843               const VRegister& reg4 = NoVReg) {
10844    Exclude(VRegisterList(reg1, reg2, reg3, reg4));
10845  }
10846
10847  // A convenience helper to exclude any registers used by the operand.
10848  void Exclude(const Operand& operand);
10849
10850  // Prevent any scratch registers from being used in this scope.
10851  void ExcludeAll();
10852
10853 private:
10854  // Available scratch registers.
10855  RegisterList* available_;       // kRRegister
10856  VRegisterList* available_vfp_;  // kVRegister
10857
10858  // The state of the available lists at the start of this scope.
10859  uint32_t old_available_;      // kRRegister
10860  uint64_t old_available_vfp_;  // kVRegister
10861
10862  VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) {
10863    VIXL_UNREACHABLE();
10864  }
10865  VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) {
10866    VIXL_UNREACHABLE();
10867  }
10868};
10869
10870class JumpTableBase {
10871 protected:
10872  JumpTableBase(int len, int offset_size)
10873      : table_location_(Label::kMaxOffset),
10874        branch_location_(Label::kMaxOffset),
10875        length_(len),
10876        offset_shift_(WhichPowerOf2(offset_size)),
10877        presence_(length_) {
10878    VIXL_ASSERT((length_ >= 0) && (offset_size <= 4));
10879  }
10880  virtual ~JumpTableBase() {}
10881
10882 public:
10883  int GetTableSizeInBytes() const { return length_ * (1 << offset_shift_); }
10884  int GetOffsetShift() const { return offset_shift_; }
10885  int GetLength() const { return length_; }
10886  Label* GetDefaultLabel() { return &default_; }
10887  Label* GetEndLabel() { return &end_; }
10888  void SetBranchLocation(uint32_t branch_location) {
10889    branch_location_ = branch_location;
10890  }
10891  uint32_t GetBranchLocation() const { return branch_location_; }
10892  void BindTable(uint32_t location) { table_location_ = location; }
10893  virtual void Link(MacroAssembler* masm,
10894                    int case_index,
10895                    uint32_t location) = 0;
10896
10897  uint32_t GetLocationForCase(int i) {
10898    VIXL_ASSERT((i >= 0) && (i < length_));
10899    return table_location_ + (i * (1 << offset_shift_));
10900  }
10901  void SetPresenceBitForCase(int i) {
10902    VIXL_ASSERT((i >= 0) && (i < length_));
10903    presence_.Set(i);
10904  }
10905
10906  void Finalize(MacroAssembler* masm) {
10907    if (!default_.IsBound()) {
10908      masm->Bind(&default_);
10909    }
10910    masm->Bind(&end_);
10911
10912    presence_.ForEachBitNotSet(LinkIt(this, masm, default_.GetLocation()));
10913  }
10914
10915 private:
10916  uint32_t table_location_;
10917  uint32_t branch_location_;
10918  const int length_;
10919  const int offset_shift_;
10920  BitField presence_;
10921  Label default_;
10922  Label end_;
10923  struct LinkIt {
10924    JumpTableBase* table_;
10925    MacroAssembler* const masm_;
10926    const uint32_t location_;
10927    LinkIt(JumpTableBase* table, MacroAssembler* const masm, uint32_t location)
10928        : table_(table), masm_(masm), location_(location) {}
10929    bool execute(int id) const {
10930      VIXL_ASSERT(id < table_->GetLength());
10931      table_->Link(masm_, static_cast<int>(id), location_);
10932      return true;
10933    }
10934  };
10935};
10936
10937// JumpTable<T>(len): Helper to describe a jump table
10938// len here describes the number of possible case. Values in [0, n[ can have a
10939// jump offset. Any other value will assert.
10940template <typename T>
10941class JumpTable : public JumpTableBase {
10942 protected:
10943  explicit JumpTable(int length) : JumpTableBase(length, sizeof(T)) {}
10944
10945 public:
10946  virtual void Link(MacroAssembler* masm,
10947                    int case_index,
10948                    uint32_t location) VIXL_OVERRIDE {
10949    uint32_t position_in_table = GetLocationForCase(case_index);
10950    uint32_t from = GetBranchLocation();
10951    int offset = location - from;
10952    T* case_offset = masm->GetBuffer()->GetOffsetAddress<T*>(position_in_table);
10953    if (masm->IsUsingT32()) {
10954      *case_offset = offset >> 1;
10955    } else {
10956      *case_offset = offset >> 2;
10957    }
10958  }
10959};
10960
10961class JumpTable8bitOffset : public JumpTable<uint8_t> {
10962 public:
10963  explicit JumpTable8bitOffset(int length) : JumpTable<uint8_t>(length) {}
10964};
10965
10966class JumpTable16bitOffset : public JumpTable<uint16_t> {
10967 public:
10968  explicit JumpTable16bitOffset(int length) : JumpTable<uint16_t>(length) {}
10969};
10970
10971class JumpTable32bitOffset : public JumpTable<uint32_t> {
10972 public:
10973  explicit JumpTable32bitOffset(int length) : JumpTable<uint32_t>(length) {}
10974};
10975
10976}  // namespace aarch32
10977}  // namespace vixl
10978
10979#endif  // VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
10980