macro-assembler-aarch32.h revision a4cbc576a003da934ab58b293d9023d9b6f3077b 
1// Copyright 2015, VIXL authors
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3//
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27
28#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
29#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
30
31#include "code-generation-scopes-vixl.h"
32#include "macro-assembler-interface.h"
33#include "utils-vixl.h"
34
35#include "aarch32/instructions-aarch32.h"
36#include "aarch32/assembler-aarch32.h"
37#include "aarch32/operands-aarch32.h"
38
39namespace vixl {
40namespace aarch32 {
41
42class JumpTableBase;
43class UseScratchRegisterScope;
44
45enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 };
46
47// LiteralPool class, defined as a container for literals
48class LiteralPool {
49 public:
50  typedef std::list<RawLiteral*>::iterator RawLiteralListIterator;
51
52 public:
53  LiteralPool() : size_(0) {}
54  ~LiteralPool() {
55    VIXL_ASSERT(literals_.empty() && (size_ == 0));
56    for (RawLiteralListIterator literal_it = keep_until_delete_.begin();
57         literal_it != keep_until_delete_.end();
58         literal_it++) {
59      delete *literal_it;
60    }
61    keep_until_delete_.clear();
62  }
63
64  unsigned GetSize() const { return size_; }
65
66  // Add a literal to the literal container.
67  void AddLiteral(RawLiteral* literal) {
68    // Manually placed literals can't be added to a literal pool.
69    VIXL_ASSERT(!literal->IsManuallyPlaced());
70    VIXL_ASSERT(!literal->IsBound());
71    if (literal->GetPositionInPool() == Label::kMaxOffset) {
72      uint32_t position = GetSize();
73      literal->SetPositionInPool(position);
74      literals_.push_back(literal);
75      size_ += literal->GetAlignedSize();
76    }
77  }
78
79  // First literal to be emitted.
80  RawLiteralListIterator GetFirst() { return literals_.begin(); }
81
82  // Mark the end of the literal container.
83  RawLiteralListIterator GetEnd() { return literals_.end(); }
84
85  // Remove all the literals from the container.
86  // If the literal's memory management has been delegated to the container
87  // it will be delete'd.
88  void Clear() {
89    for (RawLiteralListIterator literal_it = GetFirst(); literal_it != GetEnd();
90         literal_it++) {
91      RawLiteral* literal = *literal_it;
92      switch (literal->GetDeletionPolicy()) {
93        case RawLiteral::kDeletedOnPlacementByPool:
94          delete literal;
95          break;
96        case RawLiteral::kDeletedOnPoolDestruction:
97          keep_until_delete_.push_back(literal);
98          break;
99        case RawLiteral::kManuallyDeleted:
100          break;
101      }
102    }
103    literals_.clear();
104    size_ = 0;
105  }
106
107 private:
108  // Size (in bytes and including alignments) of the literal pool.
109  unsigned size_;
110
111  // Literal container.
112  std::list<RawLiteral*> literals_;
113  // Already bound Literal container the app requested this pool to keep.
114  std::list<RawLiteral*> keep_until_delete_;
115};
116
117
118// Macro assembler for aarch32 instruction set.
119class MacroAssembler : public Assembler, public MacroAssemblerInterface {
120 public:
121  enum EmitOption { kBranchRequired, kNoBranchRequired };
122
123  virtual internal::AssemblerBase* AsAssemblerBase() VIXL_OVERRIDE {
124    return this;
125  }
126
127  virtual void BlockPools() VIXL_OVERRIDE {
128    literal_pool_manager_.Block();
129    veneer_pool_manager_.Block();
130  }
131  virtual void ReleasePools() VIXL_OVERRIDE {
132    literal_pool_manager_.Release();
133    veneer_pool_manager_.Release();
134  }
135  virtual void EnsureEmitPoolsFor(size_t size) VIXL_OVERRIDE {
136    // TODO: Optimise this. It also checks that there is space in the buffer,
137    // which we do not need to do here.
138    VIXL_ASSERT(IsUint32(size));
139    EnsureEmitFor(static_cast<uint32_t>(size));
140  }
141
142 private:
143  class MacroEmissionCheckScope : public EmissionCheckScope {
144   public:
145    explicit MacroEmissionCheckScope(MacroAssemblerInterface* masm)
146        : EmissionCheckScope(masm, kTypicalMacroInstructionMaxSize) {}
147
148   private:
149    static const size_t kTypicalMacroInstructionMaxSize =
150        8 * kMaxInstructionSizeInBytes;
151  };
152
153  class MacroAssemblerContext {
154   public:
155    MacroAssemblerContext() : count_(0) {}
156    ~MacroAssemblerContext() {}
157    unsigned GetRecursiveCount() const { return count_; }
158    void Up(const char* loc) {
159      location_stack_[count_] = loc;
160      count_++;
161      if (count_ >= kMaxRecursion) {
162        printf(
163            "Recursion limit reached; unable to resolve macro assembler "
164            "call.\n");
165        printf("Macro assembler context stack:\n");
166        for (unsigned i = 0; i < kMaxRecursion; i++) {
167          printf("%10s %s\n", (i == 0) ? "oldest -> " : "", location_stack_[i]);
168        }
169        VIXL_ABORT();
170      }
171    }
172    void Down() {
173      VIXL_ASSERT((count_ > 0) && (count_ < kMaxRecursion));
174      count_--;
175    }
176
177   private:
178    unsigned count_;
179    static const uint32_t kMaxRecursion = 6;
180    const char* location_stack_[kMaxRecursion];
181  };
182
183  // This scope is used at each Delegate entry to avoid infinite recursion of
184  // Delegate calls. The limit is defined by
185  // MacroAssemblerContext::kMaxRecursion.
186  class ContextScope {
187   public:
188    explicit ContextScope(MacroAssembler* const masm, const char* loc)
189        : masm_(masm) {
190      VIXL_ASSERT(masm_->AllowMacroInstructions());
191      masm_->GetContext()->Up(loc);
192    }
193    ~ContextScope() { masm_->GetContext()->Down(); }
194
195   private:
196    MacroAssembler* const masm_;
197  };
198
199  MacroAssemblerContext* GetContext() { return &context_; }
200
201  class ITScope {
202   public:
203    ITScope(MacroAssembler* masm, Condition* cond, bool can_use_it = false)
204        : masm_(masm), cond_(*cond), can_use_it_(can_use_it) {
205      if (!cond_.Is(al) && masm->IsUsingT32()) {
206        if (can_use_it_) {
207          // IT is not deprecated (that implies a 16 bit T32 instruction).
208          // We generate an IT instruction and a conditional instruction.
209          masm->it(cond_);
210        } else {
211          // The usage of IT is deprecated for the instruction.
212          // We generate a conditional branch and an unconditional instruction.
213          // TODO: Use a scope utility with a size check. To do that, we'd need
214          // one with Open() and Close() implemented.
215          masm_->EnsureEmitFor(kMaxT32MacroInstructionSizeInBytes);
216          // Generate the branch.
217          masm_->b(cond_.Negate(), Narrow, &label_);
218          // Tell the macro-assembler to generate unconditional instructions.
219          *cond = al;
220        }
221      }
222#ifdef VIXL_DEBUG
223      initial_cursor_offset_ = masm->GetCursorOffset();
224#else
225      USE(initial_cursor_offset_);
226#endif
227    }
228    ~ITScope() {
229      if (label_.IsReferenced()) {
230        // We only use the label for conditional T32 instructions for which we
231        // cannot use IT.
232        VIXL_ASSERT(!cond_.Is(al));
233        VIXL_ASSERT(masm_->IsUsingT32());
234        VIXL_ASSERT(!can_use_it_);
235        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
236                    kMaxT32MacroInstructionSizeInBytes);
237        masm_->BindHelper(&label_);
238      } else if (masm_->IsUsingT32() && !cond_.Is(al)) {
239        // If we've generated a conditional T32 instruction but haven't used the
240        // label, we must have used IT. Check that we did not generate a
241        // deprecated sequence.
242        VIXL_ASSERT(can_use_it_);
243        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
244                    k16BitT32InstructionSizeInBytes);
245      }
246    }
247
248   private:
249    MacroAssembler* masm_;
250    Condition cond_;
251    Label label_;
252    bool can_use_it_;
253    uint32_t initial_cursor_offset_;
254  };
255
256  template <Assembler::InstructionCondDtDL asmfn>
257  class EmitLiteralCondDtDL {
258   public:
259    EmitLiteralCondDtDL(DataType dt, DRegister rt) : dt_(dt), rt_(rt) {}
260    void emit(MacroAssembler* const masm,
261              Condition cond,
262              RawLiteral* const literal) {
263      (masm->*asmfn)(cond, dt_, rt_, literal);
264    }
265
266   private:
267    DataType dt_;
268    DRegister rt_;
269  };
270
271  template <Assembler::InstructionCondDtSL asmfn>
272  class EmitLiteralCondDtSL {
273   public:
274    EmitLiteralCondDtSL(DataType dt, SRegister rt) : dt_(dt), rt_(rt) {}
275    void emit(MacroAssembler* const masm,
276              Condition cond,
277              RawLiteral* const literal) {
278      (masm->*asmfn)(cond, dt_, rt_, literal);
279    }
280
281   private:
282    DataType dt_;
283    SRegister rt_;
284  };
285
286  template <Assembler::InstructionCondRL asmfn>
287  class EmitLiteralCondRL {
288   public:
289    explicit EmitLiteralCondRL(Register rt) : rt_(rt) {}
290    void emit(MacroAssembler* const masm,
291              Condition cond,
292              RawLiteral* const literal) {
293      (masm->*asmfn)(cond, rt_, literal);
294    }
295
296   private:
297    Register rt_;
298  };
299
300  template <Assembler::InstructionCondRRL asmfn>
301  class EmitLiteralCondRRL {
302   public:
303    EmitLiteralCondRRL(Register rt, Register rt2) : rt_(rt), rt2_(rt2) {}
304    void emit(MacroAssembler* const masm,
305              Condition cond,
306              RawLiteral* const literal) {
307      (masm->*asmfn)(cond, rt_, rt2_, literal);
308    }
309
310   private:
311    Register rt_, rt2_;
312  };
313
314  class LiteralPoolManager {
315   public:
316    explicit LiteralPoolManager(MacroAssembler* const masm)
317        : masm_(masm), monitor_(0) {
318      ResetCheckpoint();
319    }
320
321    void ResetCheckpoint() { checkpoint_ = Label::kMaxOffset; }
322
323    LiteralPool* GetLiteralPool() { return &literal_pool_; }
324    Label::Offset GetCheckpoint() const {
325      // Make room for a branch over the pools.
326      return checkpoint_ - kMaxInstructionSizeInBytes;
327    }
328    size_t GetLiteralPoolSize() const { return literal_pool_.GetSize(); }
329
330    // Checks if the insertion of the literal will put the forward reference
331    // too far in the literal pool.
332    // This function is called after generating an instruction with a literal.
333    // We want to know if the literal can be reached by the instruction.
334    // If not, we will unwind the instruction, generate the pool (without the
335    // last literal) and generate the instruction again.
336    // "literal" is the literal we want to insert into the pool.
337    // "from" is the location where the instruction which uses the literal has
338    // been generated.
339    bool WasInsertedTooFar(RawLiteral* literal) const {
340      // Last accessible location for the instruction we just generated, which
341      // uses the literal.
342      Label::ForwardReference& reference = literal->GetBackForwardRef();
343      Label::Offset new_checkpoint = AlignDown(reference.GetCheckpoint(), 4);
344
345      // TODO: We should not need to get the min of new_checkpoint and the
346      // existing checkpoint. The existing checkpoint should already have
347      // been checked when reserving space for this load literal instruction.
348      // The assertion below asserts that we don't need the min operation here.
349      Label::Offset checkpoint =
350          std::min(new_checkpoint, literal->GetAlignedCheckpoint(4));
351      bool literal_in_pool =
352          (literal->GetPositionInPool() != Label::kMaxOffset);
353      Label::Offset position_in_pool = literal_in_pool
354                                           ? literal->GetPositionInPool()
355                                           : literal_pool_.GetSize();
356      // Compare the checkpoint to the location where the literal should be
357      // added.
358      // We add space for two instructions: one branch and one potential veneer
359      // which may be added after the check. In this particular use case, no
360      // veneer can be added but, this way, we are consistent with all the
361      // literal pool checks.
362      int32_t from =
363          reference.GetLocation() + masm_->GetArchitectureStatePCOffset();
364      bool too_far =
365          checkpoint < from + position_in_pool +
366                           2 * static_cast<int32_t>(kMaxInstructionSizeInBytes);
367      // Assert if the literal is already in the pool and the existing
368      // checkpoint triggers a rewind here, as this means the pool should
369      // already have been emitted (perhaps we have not reserved enough space
370      // for the instruction we are about to rewind).
371      VIXL_ASSERT(!(too_far && (literal->GetCheckpoint() < new_checkpoint)));
372      return too_far;
373    }
374
375    // Set the different checkpoints where the literal pool has to be emited.
376    void UpdateCheckpoint(RawLiteral* literal) {
377      // The literal should have been placed somewhere in the literal pool
378      VIXL_ASSERT(literal->GetPositionInPool() != Label::kMaxOffset);
379      // TODO(all): Consider AddForwardRef as a  virtual so the checkpoint is
380      //   updated when inserted. Or move checkpoint_ into Label,
381      literal->UpdateCheckpoint();
382      Label::Offset tmp =
383          literal->GetAlignedCheckpoint(4) - literal->GetPositionInPool();
384      if (checkpoint_ > tmp) {
385        checkpoint_ = tmp;
386        masm_->ComputeCheckpoint();
387      }
388    }
389
390    bool IsEmpty() const { return GetLiteralPoolSize() == 0; }
391
392    void Block() { monitor_++; }
393    void Release() {
394      VIXL_ASSERT(IsBlocked());
395      if (--monitor_ == 0) {
396        // Ensure the pool has not been blocked for too long.
397        VIXL_ASSERT(masm_->GetCursorOffset() <= checkpoint_);
398      }
399    }
400    bool IsBlocked() const { return monitor_ != 0; }
401
402   private:
403    MacroAssembler* const masm_;
404    LiteralPool literal_pool_;
405
406    // Max offset in the code buffer where the literal needs to be
407    // emitted. A default value of Label::kMaxOffset means that the checkpoint
408    // is invalid.
409    Label::Offset checkpoint_;
410    // Indicates whether the emission of this pool is blocked.
411    int monitor_;
412  };
413
414  void PerformEnsureEmit(Label::Offset target, uint32_t extra_size);
415
416 protected:
417  void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm);
418  void PadToMinimumBranchRange(Label* label);
419
420  // Generate the instruction and if it's not possible revert the whole thing.
421  // emit the literal pool and regenerate the instruction.
422  // Note: The instruction is generated via
423  // void T::emit(MacroAssembler* const, RawLiteral* const)
424  template <typename T>
425  void GenerateInstruction(Condition cond,
426                           T instr_callback,
427                           RawLiteral* const literal) {
428    int32_t cursor = GetCursorOffset();
429    // Emit the instruction, via the assembler
430    {
431      MacroEmissionCheckScope guard(this);
432      // The ITScope can change the condition and we want to be able to revert
433      // this.
434      Condition c(cond);
435      ITScope it_scope(this, &c);
436      instr_callback.emit(this, c, literal);
437    }
438    if (!literal->IsManuallyPlaced() && !literal->IsBound()) {
439      if (WasInsertedTooFar(literal)) {
440        // The instruction's data is too far: revert the emission
441        GetBuffer()->Rewind(cursor);
442        literal->InvalidateLastForwardReference(RawLiteral::kNoUpdateNecessary);
443        EmitLiteralPool(kBranchRequired);
444        MacroEmissionCheckScope guard(this);
445        ITScope it_scope(this, &cond);
446        instr_callback.emit(this, cond, literal);
447      }
448      // The literal pool above might have included the literal - in which
449      // case it will now be bound.
450      if (!literal->IsBound()) {
451        literal_pool_manager_.GetLiteralPool()->AddLiteral(literal);
452        literal_pool_manager_.UpdateCheckpoint(literal);
453      }
454    }
455  }
456
457 public:
458  explicit MacroAssembler(InstructionSet isa = A32)
459      : Assembler(isa),
460        available_(r12),
461        current_scratch_scope_(NULL),
462        checkpoint_(Label::kMaxOffset),
463        literal_pool_manager_(this),
464        veneer_pool_manager_(this),
465        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) {
466#ifdef VIXL_DEBUG
467    SetAllowMacroInstructions(true);
468#else
469    USE(literal_pool_manager_);
470    USE(allow_macro_instructions_);
471#endif
472    ComputeCheckpoint();
473  }
474  explicit MacroAssembler(size_t size, InstructionSet isa = A32)
475      : Assembler(size, isa),
476        available_(r12),
477        current_scratch_scope_(NULL),
478        checkpoint_(Label::kMaxOffset),
479        literal_pool_manager_(this),
480        veneer_pool_manager_(this),
481        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) {
482#ifdef VIXL_DEBUG
483    SetAllowMacroInstructions(true);
484#endif
485    ComputeCheckpoint();
486  }
487  MacroAssembler(byte* buffer, size_t size, InstructionSet isa = A32)
488      : Assembler(buffer, size, isa),
489        available_(r12),
490        current_scratch_scope_(NULL),
491        checkpoint_(Label::kMaxOffset),
492        literal_pool_manager_(this),
493        veneer_pool_manager_(this),
494        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) {
495#ifdef VIXL_DEBUG
496    SetAllowMacroInstructions(true);
497#endif
498    ComputeCheckpoint();
499  }
500
501  bool GenerateSimulatorCode() const { return generate_simulator_code_; }
502
503  // Tell whether any of the macro instruction can be used. When false the
504  // MacroAssembler will assert if a method which can emit a variable number
505  // of instructions is called.
506  virtual void SetAllowMacroInstructions(bool value) VIXL_OVERRIDE {
507    allow_macro_instructions_ = value;
508  }
509  virtual bool AllowMacroInstructions() const VIXL_OVERRIDE {
510    return allow_macro_instructions_;
511  }
512
513  void FinalizeCode() {
514    EmitLiteralPool(kNoBranchRequired);
515    Assembler::FinalizeCode();
516  }
517
518  RegisterList* GetScratchRegisterList() { return &available_; }
519  VRegisterList* GetScratchVRegisterList() { return &available_vfp_; }
520
521  // Get or set the current (most-deeply-nested) UseScratchRegisterScope.
522  void SetCurrentScratchRegisterScope(UseScratchRegisterScope* scope) {
523    current_scratch_scope_ = scope;
524  }
525  UseScratchRegisterScope* GetCurrentScratchRegisterScope() {
526    return current_scratch_scope_;
527  }
528
529  // Given an address calculation (Register + immediate), generate code to
530  // partially compute the address. The returned MemOperand will perform any
531  // remaining computation in a subsequent load or store instruction.
532  //
533  // The offset provided should be the offset that would be used in a load or
534  // store instruction (if it had sufficient range). This only matters where
535  // base.Is(pc), since load and store instructions align the pc before
536  // dereferencing it.
537  //
538  // TODO: Improve the handling of negative offsets. They are not implemented
539  // precisely for now because they only have a marginal benefit for the
540  // existing uses (in delegates).
541  MemOperand MemOperandComputationHelper(Condition cond,
542                                         Register scratch,
543                                         Register base,
544                                         uint32_t offset,
545                                         uint32_t extra_offset_mask = 0);
546
547  MemOperand MemOperandComputationHelper(Register scratch,
548                                         Register base,
549                                         uint32_t offset,
550                                         uint32_t extra_offset_mask = 0) {
551    return MemOperandComputationHelper(al,
552                                       scratch,
553                                       base,
554                                       offset,
555                                       extra_offset_mask);
556  }
557  MemOperand MemOperandComputationHelper(Condition cond,
558                                         Register scratch,
559                                         Label* label,
560                                         uint32_t extra_offset_mask = 0) {
561    // Check for buffer space _before_ calculating the offset, in case we
562    // generate a pool that affects the offset calculation.
563    CodeBufferCheckScope scope(this, 4 * kMaxInstructionSizeInBytes);
564    Label::Offset offset =
565        label->GetLocation() -
566        AlignDown(GetCursorOffset() + GetArchitectureStatePCOffset(), 4);
567    return MemOperandComputationHelper(cond,
568                                       scratch,
569                                       pc,
570                                       offset,
571                                       extra_offset_mask);
572  }
573  MemOperand MemOperandComputationHelper(Register scratch,
574                                         Label* label,
575                                         uint32_t extra_offset_mask = 0) {
576    return MemOperandComputationHelper(al, scratch, label, extra_offset_mask);
577  }
578
579  // Determine the appropriate mask to pass into MemOperandComputationHelper.
580  uint32_t GetOffsetMask(InstructionType type, AddrMode addrmode);
581
582  // State and type helpers.
583  bool IsModifiedImmediate(uint32_t imm) {
584    return IsUsingT32() ? ImmediateT32::IsImmediateT32(imm)
585                        : ImmediateA32::IsImmediateA32(imm);
586  }
587
588  void Bind(Label* label) {
589    VIXL_ASSERT(allow_macro_instructions_);
590    PadToMinimumBranchRange(label);
591    BindHelper(label);
592  }
593
594  void AddBranchLabel(Label* label) {
595    if (label->IsBound()) return;
596    veneer_pool_manager_.AddLabel(label);
597  }
598
599  void Place(RawLiteral* literal) {
600    VIXL_ASSERT(allow_macro_instructions_);
601    VIXL_ASSERT(literal->IsManuallyPlaced());
602    // We have two calls to `GetBuffer()->Align()` below, that aligns on word
603    // (4 bytes) boundaries. Only one is taken into account in
604    // `GetAlignedSize()`.
605    static const size_t kMaxAlignSize = 3;
606    size_t size = literal->GetAlignedSize() + kMaxAlignSize;
607    VIXL_ASSERT(IsUint32(size));
608    // TODO: We should use a scope here to check the size of data emitted.  We
609    // currently cannot because `aarch32::CodeBufferCheckScope` currently checks
610    // for pools, so that could lead to an infinite loop.
611    EnsureEmitFor(static_cast<uint32_t>(size));
612    // Literals must be emitted aligned on word (4 bytes) boundaries.
613    GetBuffer()->Align();
614    PlaceHelper(literal);
615    GetBuffer()->Align();
616  }
617
618  void ComputeCheckpoint();
619
620  int32_t GetMarginBeforeVeneerEmission() const {
621    return veneer_pool_manager_.GetCheckpoint() - GetCursorOffset();
622  }
623
624  Label::Offset GetTargetForLiteralEmission() const {
625    if (literal_pool_manager_.IsEmpty()) return Label::kMaxOffset;
626    // We add an instruction to the size as the instruction which calls this
627    // function may add a veneer and, without this extra instruction, could put
628    // the literals out of range. For example, it's the case for a "B"
629    // instruction. At the beginning of the instruction we call EnsureEmitFor
630    // which calls this function. However, the target of the branch hasn't been
631    // inserted yet in the veneer pool.
632    size_t veneer_max_size =
633        veneer_pool_manager_.GetMaxSize() + kMaxInstructionSizeInBytes;
634    VIXL_ASSERT(IsInt32(veneer_max_size));
635    // We must be able to generate the veneer pool first.
636    Label::Offset tmp = literal_pool_manager_.GetCheckpoint() -
637                        static_cast<Label::Offset>(veneer_max_size);
638    VIXL_ASSERT(tmp >= 0);
639    return tmp;
640  }
641
642  int32_t GetMarginBeforeLiteralEmission() const {
643    Label::Offset tmp = GetTargetForLiteralEmission();
644    VIXL_ASSERT(tmp >= GetCursorOffset());
645    return tmp - GetCursorOffset();
646  }
647
648  bool VeneerPoolIsEmpty() const { return veneer_pool_manager_.IsEmpty(); }
649  bool LiteralPoolIsEmpty() const { return literal_pool_manager_.IsEmpty(); }
650
651  void EnsureEmitFor(uint32_t size) {
652    Label::Offset target = GetCursorOffset() + size;
653    if (target <= checkpoint_) return;
654    PerformEnsureEmit(target, size);
655  }
656
657  bool WasInsertedTooFar(RawLiteral* literal) {
658    return literal_pool_manager_.WasInsertedTooFar(literal);
659  }
660
661  bool AliasesAvailableScratchRegister(Register reg) {
662    return GetScratchRegisterList()->Includes(reg);
663  }
664
665  bool AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg) {
666    if (reg.IsAPSR_nzcv()) return false;
667    return GetScratchRegisterList()->Includes(reg.AsRegister());
668  }
669
670  bool AliasesAvailableScratchRegister(VRegister reg) {
671    return GetScratchVRegisterList()->IncludesAliasOf(reg);
672  }
673
674  bool AliasesAvailableScratchRegister(const Operand& operand) {
675    if (operand.IsImmediate()) return false;
676    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
677           (operand.IsRegisterShiftedRegister() &&
678            AliasesAvailableScratchRegister(operand.GetShiftRegister()));
679  }
680
681  bool AliasesAvailableScratchRegister(const NeonOperand& operand) {
682    if (operand.IsImmediate()) return false;
683    return AliasesAvailableScratchRegister(operand.GetRegister());
684  }
685
686  bool AliasesAvailableScratchRegister(SRegisterList list) {
687    for (int n = 0; n < list.GetLength(); n++) {
688      if (AliasesAvailableScratchRegister(list.GetSRegister(n))) return true;
689    }
690    return false;
691  }
692
693  bool AliasesAvailableScratchRegister(DRegisterList list) {
694    for (int n = 0; n < list.GetLength(); n++) {
695      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
696    }
697    return false;
698  }
699
700  bool AliasesAvailableScratchRegister(NeonRegisterList list) {
701    for (int n = 0; n < list.GetLength(); n++) {
702      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
703    }
704    return false;
705  }
706
707  bool AliasesAvailableScratchRegister(RegisterList list) {
708    return GetScratchRegisterList()->Overlaps(list);
709  }
710
711  bool AliasesAvailableScratchRegister(const MemOperand& operand) {
712    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
713           (operand.IsShiftedRegister() &&
714            AliasesAvailableScratchRegister(operand.GetOffsetRegister()));
715  }
716
717  // Emit the literal pool in the code buffer.
718  // Every literal is placed on a 32bit boundary
719  // All the literals in the pool will be removed from the pool and potentially
720  // delete'd.
721  void EmitLiteralPool(LiteralPool* const literal_pool, EmitOption option);
722  void EmitLiteralPool(EmitOption option = kBranchRequired) {
723    VIXL_ASSERT(!literal_pool_manager_.IsBlocked());
724    EmitLiteralPool(literal_pool_manager_.GetLiteralPool(), option);
725    literal_pool_manager_.ResetCheckpoint();
726    ComputeCheckpoint();
727  }
728
729  size_t GetLiteralPoolSize() const {
730    return literal_pool_manager_.GetLiteralPoolSize();
731  }
732
733  // Adr with a literal already constructed. Add the literal to the pool if it
734  // is not already done.
735  void Adr(Condition cond, Register rd, RawLiteral* literal) {
736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
737    VIXL_ASSERT(allow_macro_instructions_);
738    VIXL_ASSERT(OutsideITBlock());
739    EmitLiteralCondRL<&Assembler::adr> emit_helper(rd);
740    GenerateInstruction(cond, emit_helper, literal);
741  }
742  void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); }
743
744  // Loads with literals already constructed. Add the literal to the pool
745  // if it is not already done.
746  void Ldr(Condition cond, Register rt, RawLiteral* literal) {
747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
748    VIXL_ASSERT(allow_macro_instructions_);
749    VIXL_ASSERT(OutsideITBlock());
750    EmitLiteralCondRL<&Assembler::ldr> emit_helper(rt);
751    GenerateInstruction(cond, emit_helper, literal);
752  }
753  void Ldr(Register rt, RawLiteral* literal) { Ldr(al, rt, literal); }
754
755  void Ldrb(Condition cond, Register rt, RawLiteral* literal) {
756    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
757    VIXL_ASSERT(allow_macro_instructions_);
758    VIXL_ASSERT(OutsideITBlock());
759    EmitLiteralCondRL<&Assembler::ldrb> emit_helper(rt);
760    GenerateInstruction(cond, emit_helper, literal);
761  }
762  void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); }
763
764  void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) {
765    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
766    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
767    VIXL_ASSERT(allow_macro_instructions_);
768    VIXL_ASSERT(OutsideITBlock());
769    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(rt, rt2);
770    GenerateInstruction(cond, emit_helper, literal);
771  }
772  void Ldrd(Register rt, Register rt2, RawLiteral* literal) {
773    Ldrd(al, rt, rt2, literal);
774  }
775
776  void Ldrh(Condition cond, Register rt, RawLiteral* literal) {
777    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
778    VIXL_ASSERT(allow_macro_instructions_);
779    VIXL_ASSERT(OutsideITBlock());
780    EmitLiteralCondRL<&Assembler::ldrh> emit_helper(rt);
781    GenerateInstruction(cond, emit_helper, literal);
782  }
783  void Ldrh(Register rt, RawLiteral* literal) { Ldrh(al, rt, literal); }
784
785  void Ldrsb(Condition cond, Register rt, RawLiteral* literal) {
786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
787    VIXL_ASSERT(allow_macro_instructions_);
788    VIXL_ASSERT(OutsideITBlock());
789    EmitLiteralCondRL<&Assembler::ldrsb> emit_helper(rt);
790    GenerateInstruction(cond, emit_helper, literal);
791  }
792  void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); }
793
794  void Ldrsh(Condition cond, Register rt, RawLiteral* literal) {
795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
796    VIXL_ASSERT(allow_macro_instructions_);
797    VIXL_ASSERT(OutsideITBlock());
798    EmitLiteralCondRL<&Assembler::ldrsh> emit_helper(rt);
799    GenerateInstruction(cond, emit_helper, literal);
800  }
801  void Ldrsh(Register rt, RawLiteral* literal) { Ldrsh(al, rt, literal); }
802
803  void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) {
804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
805    VIXL_ASSERT(allow_macro_instructions_);
806    VIXL_ASSERT(OutsideITBlock());
807    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(dt, rd);
808    GenerateInstruction(cond, emit_helper, literal);
809  }
810  void Vldr(DataType dt, DRegister rd, RawLiteral* literal) {
811    Vldr(al, dt, rd, literal);
812  }
813  void Vldr(Condition cond, DRegister rd, RawLiteral* literal) {
814    Vldr(cond, Untyped64, rd, literal);
815  }
816  void Vldr(DRegister rd, RawLiteral* literal) {
817    Vldr(al, Untyped64, rd, literal);
818  }
819
820  void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) {
821    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
822    VIXL_ASSERT(allow_macro_instructions_);
823    VIXL_ASSERT(OutsideITBlock());
824    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(dt, rd);
825    GenerateInstruction(cond, emit_helper, literal);
826  }
827  void Vldr(DataType dt, SRegister rd, RawLiteral* literal) {
828    Vldr(al, dt, rd, literal);
829  }
830  void Vldr(Condition cond, SRegister rd, RawLiteral* literal) {
831    Vldr(cond, Untyped32, rd, literal);
832  }
833  void Vldr(SRegister rd, RawLiteral* literal) {
834    Vldr(al, Untyped32, rd, literal);
835  }
836
837  // Generic Ldr(register, data)
838  void Ldr(Condition cond, Register rt, uint32_t v) {
839    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
840    VIXL_ASSERT(allow_macro_instructions_);
841    VIXL_ASSERT(OutsideITBlock());
842    RawLiteral* literal =
843        new Literal<uint32_t>(v, RawLiteral::kDeletedOnPlacementByPool);
844    EmitLiteralCondRL<&Assembler::ldr> emit_helper(rt);
845    GenerateInstruction(cond, emit_helper, literal);
846  }
847  template <typename T>
848  void Ldr(Register rt, T v) {
849    Ldr(al, rt, v);
850  }
851
852  // Generic Ldrd(rt, rt2, data)
853  void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) {
854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
855    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
856    VIXL_ASSERT(allow_macro_instructions_);
857    VIXL_ASSERT(OutsideITBlock());
858    RawLiteral* literal =
859        new Literal<uint64_t>(v, RawLiteral::kDeletedOnPlacementByPool);
860    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(rt, rt2);
861    GenerateInstruction(cond, emit_helper, literal);
862  }
863  template <typename T>
864  void Ldrd(Register rt, Register rt2, T v) {
865    Ldrd(al, rt, rt2, v);
866  }
867
868  void Vldr(Condition cond, SRegister rd, float v) {
869    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
870    VIXL_ASSERT(allow_macro_instructions_);
871    VIXL_ASSERT(OutsideITBlock());
872    RawLiteral* literal =
873        new Literal<float>(v, RawLiteral::kDeletedOnPlacementByPool);
874    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(Untyped32, rd);
875    GenerateInstruction(cond, emit_helper, literal);
876  }
877  void Vldr(SRegister rd, float v) { Vldr(al, rd, v); }
878
879  void Vldr(Condition cond, DRegister rd, double v) {
880    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
881    VIXL_ASSERT(allow_macro_instructions_);
882    VIXL_ASSERT(OutsideITBlock());
883    RawLiteral* literal =
884        new Literal<double>(v, RawLiteral::kDeletedOnPlacementByPool);
885    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(Untyped64, rd);
886    GenerateInstruction(cond, emit_helper, literal);
887  }
888  void Vldr(DRegister rd, double v) { Vldr(al, rd, v); }
889
890  void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); }
891  void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); }
892  void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); }
893  void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); }
894
895  void Switch(Register reg, JumpTableBase* table);
896  void GenerateSwitchTable(JumpTableBase* table, int table_size);
897  void Case(JumpTableBase* table, int case_index);
898  void Break(JumpTableBase* table);
899  void Default(JumpTableBase* table);
900  void EndSwitch(JumpTableBase* table);
901
902  // Claim memory on the stack.
903  // Note that the Claim, Drop, and Peek helpers below ensure that offsets used
904  // are multiples of 32 bits to help maintain 32-bit SP alignment.
905  // We could `Align{Up,Down}(size, 4)`, but that's potentially problematic:
906  //     Claim(3)
907  //     Claim(1)
908  //     Drop(4)
909  // would seem correct, when in fact:
910  //    Claim(3) -> sp = sp - 4
911  //    Claim(1) -> sp = sp - 4
912  //    Drop(4)  -> sp = sp + 4
913  //
914  void Claim(int32_t size) {
915    if (size == 0) return;
916    // The stack must be kept 32bit aligned.
917    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
918    Sub(sp, sp, size);
919  }
920  // Release memory on the stack
921  void Drop(int32_t size) {
922    if (size == 0) return;
923    // The stack must be kept 32bit aligned.
924    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
925    Add(sp, sp, size);
926  }
927  void Peek(Register dst, int32_t offset) {
928    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
929    Ldr(dst, MemOperand(sp, offset));
930  }
931  void Poke(Register src, int32_t offset) {
932    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
933    Str(src, MemOperand(sp, offset));
934  }
935  void Printf(const char* format,
936              CPURegister reg1 = NoReg,
937              CPURegister reg2 = NoReg,
938              CPURegister reg3 = NoReg,
939              CPURegister reg4 = NoReg);
940  // Functions used by Printf for generation.
941  void PushRegister(CPURegister reg);
942  void PreparePrintfArgument(CPURegister reg,
943                             int* core_count,
944                             int* vfp_count,
945                             uint32_t* printf_type);
946  // Handlers for cases not handled by the assembler.
947  // ADD, MOVT, MOVW, SUB, SXTB16, TEQ, UXTB16
948  virtual void Delegate(InstructionType type,
949                        InstructionCondROp instruction,
950                        Condition cond,
951                        Register rn,
952                        const Operand& operand) VIXL_OVERRIDE;
953  // CMN, CMP, MOV, MOVS, MVN, MVNS, SXTB, SXTH, TST, UXTB, UXTH
954  virtual void Delegate(InstructionType type,
955                        InstructionCondSizeROp instruction,
956                        Condition cond,
957                        EncodingSize size,
958                        Register rn,
959                        const Operand& operand) VIXL_OVERRIDE;
960  // ADDW, ORN, ORNS, PKHBT, PKHTB, RSC, RSCS, SUBW, SXTAB, SXTAB16, SXTAH,
961  // UXTAB, UXTAB16, UXTAH
962  virtual void Delegate(InstructionType type,
963                        InstructionCondRROp instruction,
964                        Condition cond,
965                        Register rd,
966                        Register rn,
967                        const Operand& operand) VIXL_OVERRIDE;
968  // ADC, ADCS, ADD, ADDS, AND, ANDS, ASR, ASRS, BIC, BICS, EOR, EORS, LSL,
969  // LSLS, LSR, LSRS, ORR, ORRS, ROR, RORS, RSB, RSBS, SBC, SBCS, SUB, SUBS
970  virtual void Delegate(InstructionType type,
971                        InstructionCondSizeRL instruction,
972                        Condition cond,
973                        EncodingSize size,
974                        Register rd,
975                        Label* label) VIXL_OVERRIDE;
976  bool GenerateSplitInstruction(InstructionCondSizeRROp instruction,
977                                Condition cond,
978                                Register rd,
979                                Register rn,
980                                uint32_t imm,
981                                uint32_t mask);
982  virtual void Delegate(InstructionType type,
983                        InstructionCondSizeRROp instruction,
984                        Condition cond,
985                        EncodingSize size,
986                        Register rd,
987                        Register rn,
988                        const Operand& operand) VIXL_OVERRIDE;
989  // CBNZ, CBZ
990  virtual void Delegate(InstructionType type,
991                        InstructionRL instruction,
992                        Register rn,
993                        Label* label) VIXL_OVERRIDE;
994  // VMOV
995  virtual void Delegate(InstructionType type,
996                        InstructionCondDtSSop instruction,
997                        Condition cond,
998                        DataType dt,
999                        SRegister rd,
1000                        const SOperand& operand) VIXL_OVERRIDE;
1001  // VMOV, VMVN
1002  virtual void Delegate(InstructionType type,
1003                        InstructionCondDtDDop instruction,
1004                        Condition cond,
1005                        DataType dt,
1006                        DRegister rd,
1007                        const DOperand& operand) VIXL_OVERRIDE;
1008  // VMOV, VMVN
1009  virtual void Delegate(InstructionType type,
1010                        InstructionCondDtQQop instruction,
1011                        Condition cond,
1012                        DataType dt,
1013                        QRegister rd,
1014                        const QOperand& operand) VIXL_OVERRIDE;
1015  // LDR, LDRB, LDRH, LDRSB, LDRSH, STR, STRB, STRH
1016  virtual void Delegate(InstructionType type,
1017                        InstructionCondSizeRMop instruction,
1018                        Condition cond,
1019                        EncodingSize size,
1020                        Register rd,
1021                        const MemOperand& operand) VIXL_OVERRIDE;
1022  // LDAEXD, LDRD, LDREXD, STLEX, STLEXB, STLEXH, STRD, STREX, STREXB, STREXH
1023  virtual void Delegate(InstructionType type,
1024                        InstructionCondRL instruction,
1025                        Condition cond,
1026                        Register rt,
1027                        Label* label) VIXL_OVERRIDE;
1028  virtual void Delegate(InstructionType type,
1029                        InstructionCondRRL instruction,
1030                        Condition cond,
1031                        Register rt,
1032                        Register rt2,
1033                        Label* label) VIXL_OVERRIDE;
1034  virtual void Delegate(InstructionType type,
1035                        InstructionCondRRMop instruction,
1036                        Condition cond,
1037                        Register rt,
1038                        Register rt2,
1039                        const MemOperand& operand) VIXL_OVERRIDE;
1040  // VLDR, VSTR
1041  virtual void Delegate(InstructionType type,
1042                        InstructionCondDtSMop instruction,
1043                        Condition cond,
1044                        DataType dt,
1045                        SRegister rd,
1046                        const MemOperand& operand) VIXL_OVERRIDE;
1047  // VLDR, VSTR
1048  virtual void Delegate(InstructionType type,
1049                        InstructionCondDtDMop instruction,
1050                        Condition cond,
1051                        DataType dt,
1052                        DRegister rd,
1053                        const MemOperand& operand) VIXL_OVERRIDE;
1054  // MSR
1055  virtual void Delegate(InstructionType type,
1056                        InstructionCondMsrOp instruction,
1057                        Condition cond,
1058                        MaskedSpecialRegister spec_reg,
1059                        const Operand& operand) VIXL_OVERRIDE;
1060  virtual void Delegate(InstructionType type,
1061                        InstructionCondDtDL instruction,
1062                        Condition cond,
1063                        DataType dt,
1064                        DRegister rd,
1065                        Label* label) VIXL_OVERRIDE;
1066  virtual void Delegate(InstructionType type,
1067                        InstructionCondDtSL instruction,
1068                        Condition cond,
1069                        DataType dt,
1070                        SRegister rd,
1071                        Label* label) VIXL_OVERRIDE;
1072
1073  // Start of generated code.
1074
1075  void Adc(Condition cond, Register rd, Register rn, const Operand& operand) {
1076    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1077    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1078    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1079    VIXL_ASSERT(allow_macro_instructions_);
1080    VIXL_ASSERT(OutsideITBlock());
1081    MacroEmissionCheckScope guard(this);
1082    bool can_use_it =
1083        // ADC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1084        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
1085        operand.GetBaseRegister().IsLow();
1086    ITScope it_scope(this, &cond, can_use_it);
1087    adc(cond, rd, rn, operand);
1088  }
1089  void Adc(Register rd, Register rn, const Operand& operand) {
1090    Adc(al, rd, rn, operand);
1091  }
1092  void Adc(FlagsUpdate flags,
1093           Condition cond,
1094           Register rd,
1095           Register rn,
1096           const Operand& operand) {
1097    switch (flags) {
1098      case LeaveFlags:
1099        Adc(cond, rd, rn, operand);
1100        break;
1101      case SetFlags:
1102        Adcs(cond, rd, rn, operand);
1103        break;
1104      case DontCare:
1105        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1106                                   rn.Is(rd) && operand.IsPlainRegister() &&
1107                                   operand.GetBaseRegister().IsLow();
1108        if (setflags_is_smaller) {
1109          Adcs(cond, rd, rn, operand);
1110        } else {
1111          Adc(cond, rd, rn, operand);
1112        }
1113        break;
1114    }
1115  }
1116  void Adc(FlagsUpdate flags,
1117           Register rd,
1118           Register rn,
1119           const Operand& operand) {
1120    Adc(flags, al, rd, rn, operand);
1121  }
1122
1123  void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) {
1124    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1125    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1126    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1127    VIXL_ASSERT(allow_macro_instructions_);
1128    VIXL_ASSERT(OutsideITBlock());
1129    MacroEmissionCheckScope guard(this);
1130    ITScope it_scope(this, &cond);
1131    adcs(cond, rd, rn, operand);
1132  }
1133  void Adcs(Register rd, Register rn, const Operand& operand) {
1134    Adcs(al, rd, rn, operand);
1135  }
1136
1137  void Add(Condition cond, Register rd, Register rn, const Operand& operand) {
1138    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1139    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1140    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1141    VIXL_ASSERT(allow_macro_instructions_);
1142    VIXL_ASSERT(OutsideITBlock());
1143    MacroEmissionCheckScope guard(this);
1144    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1145      uint32_t immediate = operand.GetImmediate();
1146      if (immediate == 0) {
1147        return;
1148      }
1149    }
1150    bool can_use_it =
1151        // ADD<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
1152        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
1153         rd.IsLow()) ||
1154        // ADD<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
1155        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1156         rd.IsLow() && rn.Is(rd)) ||
1157        // ADD{<c>}{<q>} <Rd>, SP, #<imm8> ; T1
1158        (operand.IsImmediate() && (operand.GetImmediate() <= 1020) &&
1159         ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) ||
1160        // ADD<c>{<q>} <Rd>, <Rn>, <Rm>
1161        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1162         operand.GetBaseRegister().IsLow()) ||
1163        // ADD<c>{<q>} <Rdn>, <Rm> ; T2
1164        (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) &&
1165         !operand.GetBaseRegister().IsSP() &&
1166         !operand.GetBaseRegister().IsPC()) ||
1167        // ADD{<c>}{<q>} {<Rdm>,} SP, <Rdm> ; T1
1168        (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() &&
1169         operand.GetBaseRegister().Is(rd));
1170    ITScope it_scope(this, &cond, can_use_it);
1171    add(cond, rd, rn, operand);
1172  }
1173  void Add(Register rd, Register rn, const Operand& operand) {
1174    Add(al, rd, rn, operand);
1175  }
1176  void Add(FlagsUpdate flags,
1177           Condition cond,
1178           Register rd,
1179           Register rn,
1180           const Operand& operand) {
1181    switch (flags) {
1182      case LeaveFlags:
1183        Add(cond, rd, rn, operand);
1184        break;
1185      case SetFlags:
1186        Adds(cond, rd, rn, operand);
1187        break;
1188      case DontCare:
1189        bool setflags_is_smaller =
1190            IsUsingT32() && cond.Is(al) &&
1191            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1192              !rd.Is(rn) && operand.GetBaseRegister().IsLow()) ||
1193             (operand.IsImmediate() &&
1194              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
1195               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
1196        if (setflags_is_smaller) {
1197          Adds(cond, rd, rn, operand);
1198        } else {
1199          bool changed_op_is_smaller =
1200              operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
1201              ((rd.IsLow() && rn.IsLow() &&
1202                (operand.GetSignedImmediate() >= -7)) ||
1203               (rd.IsLow() && rn.Is(rd) &&
1204                (operand.GetSignedImmediate() >= -255)));
1205          if (changed_op_is_smaller) {
1206            Subs(cond, rd, rn, -operand.GetSignedImmediate());
1207          } else {
1208            Add(cond, rd, rn, operand);
1209          }
1210        }
1211        break;
1212    }
1213  }
1214  void Add(FlagsUpdate flags,
1215           Register rd,
1216           Register rn,
1217           const Operand& operand) {
1218    Add(flags, al, rd, rn, operand);
1219  }
1220
1221  void Adds(Condition cond, Register rd, Register rn, const Operand& operand) {
1222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1224    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1225    VIXL_ASSERT(allow_macro_instructions_);
1226    VIXL_ASSERT(OutsideITBlock());
1227    MacroEmissionCheckScope guard(this);
1228    ITScope it_scope(this, &cond);
1229    adds(cond, rd, rn, operand);
1230  }
1231  void Adds(Register rd, Register rn, const Operand& operand) {
1232    Adds(al, rd, rn, operand);
1233  }
1234
1235  void Adr(Condition cond, Register rd, Label* label) {
1236    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1237    VIXL_ASSERT(allow_macro_instructions_);
1238    VIXL_ASSERT(OutsideITBlock());
1239    MacroEmissionCheckScope guard(this);
1240    ITScope it_scope(this, &cond);
1241    adr(cond, rd, label);
1242  }
1243  void Adr(Register rd, Label* label) { Adr(al, rd, label); }
1244
1245  void And(Condition cond, Register rd, Register rn, const Operand& operand) {
1246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1247    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1248    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1249    VIXL_ASSERT(allow_macro_instructions_);
1250    VIXL_ASSERT(OutsideITBlock());
1251    MacroEmissionCheckScope guard(this);
1252    if (rd.Is(rn) && operand.IsPlainRegister() &&
1253        rd.Is(operand.GetBaseRegister())) {
1254      return;
1255    }
1256    if (cond.Is(al) && operand.IsImmediate()) {
1257      uint32_t immediate = operand.GetImmediate();
1258      if (immediate == 0) {
1259        mov(rd, 0);
1260        return;
1261      }
1262      if ((immediate == 0xffffffff) && rd.Is(rn)) {
1263        return;
1264      }
1265    }
1266    bool can_use_it =
1267        // AND<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1268        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1269        operand.GetBaseRegister().IsLow();
1270    ITScope it_scope(this, &cond, can_use_it);
1271    and_(cond, rd, rn, operand);
1272  }
1273  void And(Register rd, Register rn, const Operand& operand) {
1274    And(al, rd, rn, operand);
1275  }
1276  void And(FlagsUpdate flags,
1277           Condition cond,
1278           Register rd,
1279           Register rn,
1280           const Operand& operand) {
1281    switch (flags) {
1282      case LeaveFlags:
1283        And(cond, rd, rn, operand);
1284        break;
1285      case SetFlags:
1286        Ands(cond, rd, rn, operand);
1287        break;
1288      case DontCare:
1289        if (operand.IsPlainRegister() && rd.Is(rn) &&
1290            rd.Is(operand.GetBaseRegister())) {
1291          return;
1292        }
1293        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1294                                   rn.Is(rd) && operand.IsPlainRegister() &&
1295                                   operand.GetBaseRegister().IsLow();
1296        if (setflags_is_smaller) {
1297          Ands(cond, rd, rn, operand);
1298        } else {
1299          And(cond, rd, rn, operand);
1300        }
1301        break;
1302    }
1303  }
1304  void And(FlagsUpdate flags,
1305           Register rd,
1306           Register rn,
1307           const Operand& operand) {
1308    And(flags, al, rd, rn, operand);
1309  }
1310
1311  void Ands(Condition cond, Register rd, Register rn, const Operand& operand) {
1312    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1313    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1314    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1315    VIXL_ASSERT(allow_macro_instructions_);
1316    VIXL_ASSERT(OutsideITBlock());
1317    MacroEmissionCheckScope guard(this);
1318    ITScope it_scope(this, &cond);
1319    ands(cond, rd, rn, operand);
1320  }
1321  void Ands(Register rd, Register rn, const Operand& operand) {
1322    Ands(al, rd, rn, operand);
1323  }
1324
1325  void Asr(Condition cond, Register rd, Register rm, const Operand& operand) {
1326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1327    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1328    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1329    VIXL_ASSERT(allow_macro_instructions_);
1330    VIXL_ASSERT(OutsideITBlock());
1331    MacroEmissionCheckScope guard(this);
1332    bool can_use_it =
1333        // ASR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
1334        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1335         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
1336        // ASR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
1337        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
1338         operand.GetBaseRegister().IsLow());
1339    ITScope it_scope(this, &cond, can_use_it);
1340    asr(cond, rd, rm, operand);
1341  }
1342  void Asr(Register rd, Register rm, const Operand& operand) {
1343    Asr(al, rd, rm, operand);
1344  }
1345  void Asr(FlagsUpdate flags,
1346           Condition cond,
1347           Register rd,
1348           Register rm,
1349           const Operand& operand) {
1350    switch (flags) {
1351      case LeaveFlags:
1352        Asr(cond, rd, rm, operand);
1353        break;
1354      case SetFlags:
1355        Asrs(cond, rd, rm, operand);
1356        break;
1357      case DontCare:
1358        bool setflags_is_smaller =
1359            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
1360            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1361              (operand.GetImmediate() <= 32)) ||
1362             (operand.IsPlainRegister() && rd.Is(rm)));
1363        if (setflags_is_smaller) {
1364          Asrs(cond, rd, rm, operand);
1365        } else {
1366          Asr(cond, rd, rm, operand);
1367        }
1368        break;
1369    }
1370  }
1371  void Asr(FlagsUpdate flags,
1372           Register rd,
1373           Register rm,
1374           const Operand& operand) {
1375    Asr(flags, al, rd, rm, operand);
1376  }
1377
1378  void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) {
1379    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1380    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1381    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1382    VIXL_ASSERT(allow_macro_instructions_);
1383    VIXL_ASSERT(OutsideITBlock());
1384    MacroEmissionCheckScope guard(this);
1385    ITScope it_scope(this, &cond);
1386    asrs(cond, rd, rm, operand);
1387  }
1388  void Asrs(Register rd, Register rm, const Operand& operand) {
1389    Asrs(al, rd, rm, operand);
1390  }
1391
1392  void B(Condition cond, Label* label, BranchHint hint = kBranchWithoutHint) {
1393    VIXL_ASSERT(allow_macro_instructions_);
1394    VIXL_ASSERT(OutsideITBlock());
1395    MacroEmissionCheckScope guard(this);
1396    if (hint == kNear) {
1397      if (label->IsBound()) {
1398        b(cond, label);
1399      } else {
1400        b(cond, Narrow, label);
1401      }
1402    } else {
1403      b(cond, label);
1404    }
1405    AddBranchLabel(label);
1406  }
1407  void B(Label* label, BranchHint hint = kBranchWithoutHint) {
1408    B(al, label, hint);
1409  }
1410  void BPreferNear(Condition cond, Label* label) { B(cond, label, kNear); }
1411  void BPreferNear(Label* label) { B(al, label, kNear); }
1412
1413  void Bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand) {
1414    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1415    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1416    VIXL_ASSERT(allow_macro_instructions_);
1417    VIXL_ASSERT(OutsideITBlock());
1418    MacroEmissionCheckScope guard(this);
1419    ITScope it_scope(this, &cond);
1420    bfc(cond, rd, lsb, operand);
1421  }
1422  void Bfc(Register rd, uint32_t lsb, const Operand& operand) {
1423    Bfc(al, rd, lsb, operand);
1424  }
1425
1426  void Bfi(Condition cond,
1427           Register rd,
1428           Register rn,
1429           uint32_t lsb,
1430           const Operand& operand) {
1431    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1432    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1433    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1434    VIXL_ASSERT(allow_macro_instructions_);
1435    VIXL_ASSERT(OutsideITBlock());
1436    MacroEmissionCheckScope guard(this);
1437    ITScope it_scope(this, &cond);
1438    bfi(cond, rd, rn, lsb, operand);
1439  }
1440  void Bfi(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
1441    Bfi(al, rd, rn, lsb, operand);
1442  }
1443
1444  void Bic(Condition cond, Register rd, Register rn, const Operand& operand) {
1445    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1446    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1447    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1448    VIXL_ASSERT(allow_macro_instructions_);
1449    VIXL_ASSERT(OutsideITBlock());
1450    MacroEmissionCheckScope guard(this);
1451    if (cond.Is(al) && operand.IsImmediate()) {
1452      uint32_t immediate = operand.GetImmediate();
1453      if ((immediate == 0) && rd.Is(rn)) {
1454        return;
1455      }
1456      if (immediate == 0xffffffff) {
1457        mov(rd, 0);
1458        return;
1459      }
1460    }
1461    bool can_use_it =
1462        // BIC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1463        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1464        operand.GetBaseRegister().IsLow();
1465    ITScope it_scope(this, &cond, can_use_it);
1466    bic(cond, rd, rn, operand);
1467  }
1468  void Bic(Register rd, Register rn, const Operand& operand) {
1469    Bic(al, rd, rn, operand);
1470  }
1471  void Bic(FlagsUpdate flags,
1472           Condition cond,
1473           Register rd,
1474           Register rn,
1475           const Operand& operand) {
1476    switch (flags) {
1477      case LeaveFlags:
1478        Bic(cond, rd, rn, operand);
1479        break;
1480      case SetFlags:
1481        Bics(cond, rd, rn, operand);
1482        break;
1483      case DontCare:
1484        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1485                                   rn.Is(rd) && operand.IsPlainRegister() &&
1486                                   operand.GetBaseRegister().IsLow();
1487        if (setflags_is_smaller) {
1488          Bics(cond, rd, rn, operand);
1489        } else {
1490          Bic(cond, rd, rn, operand);
1491        }
1492        break;
1493    }
1494  }
1495  void Bic(FlagsUpdate flags,
1496           Register rd,
1497           Register rn,
1498           const Operand& operand) {
1499    Bic(flags, al, rd, rn, operand);
1500  }
1501
1502  void Bics(Condition cond, Register rd, Register rn, const Operand& operand) {
1503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1504    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1505    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1506    VIXL_ASSERT(allow_macro_instructions_);
1507    VIXL_ASSERT(OutsideITBlock());
1508    MacroEmissionCheckScope guard(this);
1509    ITScope it_scope(this, &cond);
1510    bics(cond, rd, rn, operand);
1511  }
1512  void Bics(Register rd, Register rn, const Operand& operand) {
1513    Bics(al, rd, rn, operand);
1514  }
1515
1516  void Bkpt(Condition cond, uint32_t imm) {
1517    VIXL_ASSERT(allow_macro_instructions_);
1518    VIXL_ASSERT(OutsideITBlock());
1519    MacroEmissionCheckScope guard(this);
1520    ITScope it_scope(this, &cond);
1521    bkpt(cond, imm);
1522  }
1523  void Bkpt(uint32_t imm) { Bkpt(al, imm); }
1524
1525  void Bl(Condition cond, Label* label) {
1526    VIXL_ASSERT(allow_macro_instructions_);
1527    VIXL_ASSERT(OutsideITBlock());
1528    MacroEmissionCheckScope guard(this);
1529    ITScope it_scope(this, &cond);
1530    bl(cond, label);
1531    AddBranchLabel(label);
1532  }
1533  void Bl(Label* label) { Bl(al, label); }
1534
1535  void Blx(Condition cond, Label* label) {
1536    VIXL_ASSERT(allow_macro_instructions_);
1537    VIXL_ASSERT(OutsideITBlock());
1538    MacroEmissionCheckScope guard(this);
1539    ITScope it_scope(this, &cond);
1540    blx(cond, label);
1541    AddBranchLabel(label);
1542  }
1543  void Blx(Label* label) { Blx(al, label); }
1544
1545  void Blx(Condition cond, Register rm) {
1546    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1547    VIXL_ASSERT(allow_macro_instructions_);
1548    VIXL_ASSERT(OutsideITBlock());
1549    MacroEmissionCheckScope guard(this);
1550    bool can_use_it =
1551        // BLX{<c>}{<q>} <Rm> ; T1
1552        !rm.IsPC();
1553    ITScope it_scope(this, &cond, can_use_it);
1554    blx(cond, rm);
1555  }
1556  void Blx(Register rm) { Blx(al, rm); }
1557
1558  void Bx(Condition cond, Register rm) {
1559    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1560    VIXL_ASSERT(allow_macro_instructions_);
1561    VIXL_ASSERT(OutsideITBlock());
1562    MacroEmissionCheckScope guard(this);
1563    bool can_use_it =
1564        // BX{<c>}{<q>} <Rm> ; T1
1565        !rm.IsPC();
1566    ITScope it_scope(this, &cond, can_use_it);
1567    bx(cond, rm);
1568  }
1569  void Bx(Register rm) { Bx(al, rm); }
1570
1571  void Bxj(Condition cond, Register rm) {
1572    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1573    VIXL_ASSERT(allow_macro_instructions_);
1574    VIXL_ASSERT(OutsideITBlock());
1575    MacroEmissionCheckScope guard(this);
1576    ITScope it_scope(this, &cond);
1577    bxj(cond, rm);
1578  }
1579  void Bxj(Register rm) { Bxj(al, rm); }
1580
1581  void Cbnz(Register rn, Label* label) {
1582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1583    VIXL_ASSERT(allow_macro_instructions_);
1584    VIXL_ASSERT(OutsideITBlock());
1585    MacroEmissionCheckScope guard(this);
1586    cbnz(rn, label);
1587    AddBranchLabel(label);
1588  }
1589
1590  void Cbz(Register rn, Label* label) {
1591    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1592    VIXL_ASSERT(allow_macro_instructions_);
1593    VIXL_ASSERT(OutsideITBlock());
1594    MacroEmissionCheckScope guard(this);
1595    cbz(rn, label);
1596    AddBranchLabel(label);
1597  }
1598
1599  void Clrex(Condition cond) {
1600    VIXL_ASSERT(allow_macro_instructions_);
1601    VIXL_ASSERT(OutsideITBlock());
1602    MacroEmissionCheckScope guard(this);
1603    ITScope it_scope(this, &cond);
1604    clrex(cond);
1605  }
1606  void Clrex() { Clrex(al); }
1607
1608  void Clz(Condition cond, Register rd, Register rm) {
1609    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1610    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1611    VIXL_ASSERT(allow_macro_instructions_);
1612    VIXL_ASSERT(OutsideITBlock());
1613    MacroEmissionCheckScope guard(this);
1614    ITScope it_scope(this, &cond);
1615    clz(cond, rd, rm);
1616  }
1617  void Clz(Register rd, Register rm) { Clz(al, rd, rm); }
1618
1619  void Cmn(Condition cond, Register rn, const Operand& operand) {
1620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1621    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1622    VIXL_ASSERT(allow_macro_instructions_);
1623    VIXL_ASSERT(OutsideITBlock());
1624    MacroEmissionCheckScope guard(this);
1625    bool can_use_it =
1626        // CMN{<c>}{<q>} <Rn>, <Rm> ; T1
1627        operand.IsPlainRegister() && rn.IsLow() &&
1628        operand.GetBaseRegister().IsLow();
1629    ITScope it_scope(this, &cond, can_use_it);
1630    cmn(cond, rn, operand);
1631  }
1632  void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); }
1633
1634  void Cmp(Condition cond, Register rn, const Operand& operand) {
1635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1636    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1637    VIXL_ASSERT(allow_macro_instructions_);
1638    VIXL_ASSERT(OutsideITBlock());
1639    MacroEmissionCheckScope guard(this);
1640    bool can_use_it =
1641        // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1
1642        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1643         rn.IsLow()) ||
1644        // CMP{<c>}{<q>} <Rn>, <Rm> ; T1 T2
1645        (operand.IsPlainRegister() && !rn.IsPC() &&
1646         !operand.GetBaseRegister().IsPC());
1647    ITScope it_scope(this, &cond, can_use_it);
1648    cmp(cond, rn, operand);
1649  }
1650  void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); }
1651
1652  void Crc32b(Condition cond, Register rd, Register rn, Register rm) {
1653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1655    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1656    VIXL_ASSERT(allow_macro_instructions_);
1657    VIXL_ASSERT(OutsideITBlock());
1658    MacroEmissionCheckScope guard(this);
1659    ITScope it_scope(this, &cond);
1660    crc32b(cond, rd, rn, rm);
1661  }
1662  void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); }
1663
1664  void Crc32cb(Condition cond, Register rd, Register rn, Register rm) {
1665    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1666    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1668    VIXL_ASSERT(allow_macro_instructions_);
1669    VIXL_ASSERT(OutsideITBlock());
1670    MacroEmissionCheckScope guard(this);
1671    ITScope it_scope(this, &cond);
1672    crc32cb(cond, rd, rn, rm);
1673  }
1674  void Crc32cb(Register rd, Register rn, Register rm) {
1675    Crc32cb(al, rd, rn, rm);
1676  }
1677
1678  void Crc32ch(Condition cond, Register rd, Register rn, Register rm) {
1679    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1680    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1681    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1682    VIXL_ASSERT(allow_macro_instructions_);
1683    VIXL_ASSERT(OutsideITBlock());
1684    MacroEmissionCheckScope guard(this);
1685    ITScope it_scope(this, &cond);
1686    crc32ch(cond, rd, rn, rm);
1687  }
1688  void Crc32ch(Register rd, Register rn, Register rm) {
1689    Crc32ch(al, rd, rn, rm);
1690  }
1691
1692  void Crc32cw(Condition cond, Register rd, Register rn, Register rm) {
1693    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1694    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1695    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1696    VIXL_ASSERT(allow_macro_instructions_);
1697    VIXL_ASSERT(OutsideITBlock());
1698    MacroEmissionCheckScope guard(this);
1699    ITScope it_scope(this, &cond);
1700    crc32cw(cond, rd, rn, rm);
1701  }
1702  void Crc32cw(Register rd, Register rn, Register rm) {
1703    Crc32cw(al, rd, rn, rm);
1704  }
1705
1706  void Crc32h(Condition cond, Register rd, Register rn, Register rm) {
1707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1708    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1709    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1710    VIXL_ASSERT(allow_macro_instructions_);
1711    VIXL_ASSERT(OutsideITBlock());
1712    MacroEmissionCheckScope guard(this);
1713    ITScope it_scope(this, &cond);
1714    crc32h(cond, rd, rn, rm);
1715  }
1716  void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); }
1717
1718  void Crc32w(Condition cond, Register rd, Register rn, Register rm) {
1719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1720    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1721    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1722    VIXL_ASSERT(allow_macro_instructions_);
1723    VIXL_ASSERT(OutsideITBlock());
1724    MacroEmissionCheckScope guard(this);
1725    ITScope it_scope(this, &cond);
1726    crc32w(cond, rd, rn, rm);
1727  }
1728  void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); }
1729
1730  void Dmb(Condition cond, MemoryBarrier option) {
1731    VIXL_ASSERT(allow_macro_instructions_);
1732    VIXL_ASSERT(OutsideITBlock());
1733    MacroEmissionCheckScope guard(this);
1734    ITScope it_scope(this, &cond);
1735    dmb(cond, option);
1736  }
1737  void Dmb(MemoryBarrier option) { Dmb(al, option); }
1738
1739  void Dsb(Condition cond, MemoryBarrier option) {
1740    VIXL_ASSERT(allow_macro_instructions_);
1741    VIXL_ASSERT(OutsideITBlock());
1742    MacroEmissionCheckScope guard(this);
1743    ITScope it_scope(this, &cond);
1744    dsb(cond, option);
1745  }
1746  void Dsb(MemoryBarrier option) { Dsb(al, option); }
1747
1748  void Eor(Condition cond, Register rd, Register rn, const Operand& operand) {
1749    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1750    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1751    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1752    VIXL_ASSERT(allow_macro_instructions_);
1753    VIXL_ASSERT(OutsideITBlock());
1754    MacroEmissionCheckScope guard(this);
1755    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1756      uint32_t immediate = operand.GetImmediate();
1757      if (immediate == 0) {
1758        return;
1759      }
1760      if (immediate == 0xffffffff) {
1761        mvn(rd, rn);
1762        return;
1763      }
1764    }
1765    bool can_use_it =
1766        // EOR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1767        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1768        operand.GetBaseRegister().IsLow();
1769    ITScope it_scope(this, &cond, can_use_it);
1770    eor(cond, rd, rn, operand);
1771  }
1772  void Eor(Register rd, Register rn, const Operand& operand) {
1773    Eor(al, rd, rn, operand);
1774  }
1775  void Eor(FlagsUpdate flags,
1776           Condition cond,
1777           Register rd,
1778           Register rn,
1779           const Operand& operand) {
1780    switch (flags) {
1781      case LeaveFlags:
1782        Eor(cond, rd, rn, operand);
1783        break;
1784      case SetFlags:
1785        Eors(cond, rd, rn, operand);
1786        break;
1787      case DontCare:
1788        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1789                                   rn.Is(rd) && operand.IsPlainRegister() &&
1790                                   operand.GetBaseRegister().IsLow();
1791        if (setflags_is_smaller) {
1792          Eors(cond, rd, rn, operand);
1793        } else {
1794          Eor(cond, rd, rn, operand);
1795        }
1796        break;
1797    }
1798  }
1799  void Eor(FlagsUpdate flags,
1800           Register rd,
1801           Register rn,
1802           const Operand& operand) {
1803    Eor(flags, al, rd, rn, operand);
1804  }
1805
1806  void Eors(Condition cond, Register rd, Register rn, const Operand& operand) {
1807    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1808    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1809    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1810    VIXL_ASSERT(allow_macro_instructions_);
1811    VIXL_ASSERT(OutsideITBlock());
1812    MacroEmissionCheckScope guard(this);
1813    ITScope it_scope(this, &cond);
1814    eors(cond, rd, rn, operand);
1815  }
1816  void Eors(Register rd, Register rn, const Operand& operand) {
1817    Eors(al, rd, rn, operand);
1818  }
1819
1820  void Fldmdbx(Condition cond,
1821               Register rn,
1822               WriteBack write_back,
1823               DRegisterList dreglist) {
1824    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1825    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1826    VIXL_ASSERT(allow_macro_instructions_);
1827    VIXL_ASSERT(OutsideITBlock());
1828    MacroEmissionCheckScope guard(this);
1829    ITScope it_scope(this, &cond);
1830    fldmdbx(cond, rn, write_back, dreglist);
1831  }
1832  void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1833    Fldmdbx(al, rn, write_back, dreglist);
1834  }
1835
1836  void Fldmiax(Condition cond,
1837               Register rn,
1838               WriteBack write_back,
1839               DRegisterList dreglist) {
1840    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1841    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1842    VIXL_ASSERT(allow_macro_instructions_);
1843    VIXL_ASSERT(OutsideITBlock());
1844    MacroEmissionCheckScope guard(this);
1845    ITScope it_scope(this, &cond);
1846    fldmiax(cond, rn, write_back, dreglist);
1847  }
1848  void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1849    Fldmiax(al, rn, write_back, dreglist);
1850  }
1851
1852  void Fstmdbx(Condition cond,
1853               Register rn,
1854               WriteBack write_back,
1855               DRegisterList dreglist) {
1856    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1857    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1858    VIXL_ASSERT(allow_macro_instructions_);
1859    VIXL_ASSERT(OutsideITBlock());
1860    MacroEmissionCheckScope guard(this);
1861    ITScope it_scope(this, &cond);
1862    fstmdbx(cond, rn, write_back, dreglist);
1863  }
1864  void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1865    Fstmdbx(al, rn, write_back, dreglist);
1866  }
1867
1868  void Fstmiax(Condition cond,
1869               Register rn,
1870               WriteBack write_back,
1871               DRegisterList dreglist) {
1872    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1873    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1874    VIXL_ASSERT(allow_macro_instructions_);
1875    VIXL_ASSERT(OutsideITBlock());
1876    MacroEmissionCheckScope guard(this);
1877    ITScope it_scope(this, &cond);
1878    fstmiax(cond, rn, write_back, dreglist);
1879  }
1880  void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1881    Fstmiax(al, rn, write_back, dreglist);
1882  }
1883
1884  void Hlt(Condition cond, uint32_t imm) {
1885    VIXL_ASSERT(allow_macro_instructions_);
1886    VIXL_ASSERT(OutsideITBlock());
1887    MacroEmissionCheckScope guard(this);
1888    ITScope it_scope(this, &cond);
1889    hlt(cond, imm);
1890  }
1891  void Hlt(uint32_t imm) { Hlt(al, imm); }
1892
1893  void Hvc(Condition cond, uint32_t imm) {
1894    VIXL_ASSERT(allow_macro_instructions_);
1895    VIXL_ASSERT(OutsideITBlock());
1896    MacroEmissionCheckScope guard(this);
1897    ITScope it_scope(this, &cond);
1898    hvc(cond, imm);
1899  }
1900  void Hvc(uint32_t imm) { Hvc(al, imm); }
1901
1902  void Isb(Condition cond, MemoryBarrier option) {
1903    VIXL_ASSERT(allow_macro_instructions_);
1904    VIXL_ASSERT(OutsideITBlock());
1905    MacroEmissionCheckScope guard(this);
1906    ITScope it_scope(this, &cond);
1907    isb(cond, option);
1908  }
1909  void Isb(MemoryBarrier option) { Isb(al, option); }
1910
1911  void Lda(Condition cond, Register rt, const MemOperand& operand) {
1912    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1913    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1914    VIXL_ASSERT(allow_macro_instructions_);
1915    VIXL_ASSERT(OutsideITBlock());
1916    MacroEmissionCheckScope guard(this);
1917    ITScope it_scope(this, &cond);
1918    lda(cond, rt, operand);
1919  }
1920  void Lda(Register rt, const MemOperand& operand) { Lda(al, rt, operand); }
1921
1922  void Ldab(Condition cond, Register rt, const MemOperand& operand) {
1923    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1924    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1925    VIXL_ASSERT(allow_macro_instructions_);
1926    VIXL_ASSERT(OutsideITBlock());
1927    MacroEmissionCheckScope guard(this);
1928    ITScope it_scope(this, &cond);
1929    ldab(cond, rt, operand);
1930  }
1931  void Ldab(Register rt, const MemOperand& operand) { Ldab(al, rt, operand); }
1932
1933  void Ldaex(Condition cond, Register rt, const MemOperand& operand) {
1934    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1935    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1936    VIXL_ASSERT(allow_macro_instructions_);
1937    VIXL_ASSERT(OutsideITBlock());
1938    MacroEmissionCheckScope guard(this);
1939    ITScope it_scope(this, &cond);
1940    ldaex(cond, rt, operand);
1941  }
1942  void Ldaex(Register rt, const MemOperand& operand) { Ldaex(al, rt, operand); }
1943
1944  void Ldaexb(Condition cond, Register rt, const MemOperand& operand) {
1945    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1946    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1947    VIXL_ASSERT(allow_macro_instructions_);
1948    VIXL_ASSERT(OutsideITBlock());
1949    MacroEmissionCheckScope guard(this);
1950    ITScope it_scope(this, &cond);
1951    ldaexb(cond, rt, operand);
1952  }
1953  void Ldaexb(Register rt, const MemOperand& operand) {
1954    Ldaexb(al, rt, operand);
1955  }
1956
1957  void Ldaexd(Condition cond,
1958              Register rt,
1959              Register rt2,
1960              const MemOperand& operand) {
1961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1962    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
1963    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1964    VIXL_ASSERT(allow_macro_instructions_);
1965    VIXL_ASSERT(OutsideITBlock());
1966    MacroEmissionCheckScope guard(this);
1967    ITScope it_scope(this, &cond);
1968    ldaexd(cond, rt, rt2, operand);
1969  }
1970  void Ldaexd(Register rt, Register rt2, const MemOperand& operand) {
1971    Ldaexd(al, rt, rt2, operand);
1972  }
1973
1974  void Ldaexh(Condition cond, Register rt, const MemOperand& operand) {
1975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1976    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1977    VIXL_ASSERT(allow_macro_instructions_);
1978    VIXL_ASSERT(OutsideITBlock());
1979    MacroEmissionCheckScope guard(this);
1980    ITScope it_scope(this, &cond);
1981    ldaexh(cond, rt, operand);
1982  }
1983  void Ldaexh(Register rt, const MemOperand& operand) {
1984    Ldaexh(al, rt, operand);
1985  }
1986
1987  void Ldah(Condition cond, Register rt, const MemOperand& operand) {
1988    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1989    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1990    VIXL_ASSERT(allow_macro_instructions_);
1991    VIXL_ASSERT(OutsideITBlock());
1992    MacroEmissionCheckScope guard(this);
1993    ITScope it_scope(this, &cond);
1994    ldah(cond, rt, operand);
1995  }
1996  void Ldah(Register rt, const MemOperand& operand) { Ldah(al, rt, operand); }
1997
1998  void Ldm(Condition cond,
1999           Register rn,
2000           WriteBack write_back,
2001           RegisterList registers) {
2002    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2003    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2004    VIXL_ASSERT(allow_macro_instructions_);
2005    VIXL_ASSERT(OutsideITBlock());
2006    MacroEmissionCheckScope guard(this);
2007    ITScope it_scope(this, &cond);
2008    ldm(cond, rn, write_back, registers);
2009  }
2010  void Ldm(Register rn, WriteBack write_back, RegisterList registers) {
2011    Ldm(al, rn, write_back, registers);
2012  }
2013
2014  void Ldmda(Condition cond,
2015             Register rn,
2016             WriteBack write_back,
2017             RegisterList registers) {
2018    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2019    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2020    VIXL_ASSERT(allow_macro_instructions_);
2021    VIXL_ASSERT(OutsideITBlock());
2022    MacroEmissionCheckScope guard(this);
2023    ITScope it_scope(this, &cond);
2024    ldmda(cond, rn, write_back, registers);
2025  }
2026  void Ldmda(Register rn, WriteBack write_back, RegisterList registers) {
2027    Ldmda(al, rn, write_back, registers);
2028  }
2029
2030  void Ldmdb(Condition cond,
2031             Register rn,
2032             WriteBack write_back,
2033             RegisterList registers) {
2034    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2035    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2036    VIXL_ASSERT(allow_macro_instructions_);
2037    VIXL_ASSERT(OutsideITBlock());
2038    MacroEmissionCheckScope guard(this);
2039    ITScope it_scope(this, &cond);
2040    ldmdb(cond, rn, write_back, registers);
2041  }
2042  void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) {
2043    Ldmdb(al, rn, write_back, registers);
2044  }
2045
2046  void Ldmea(Condition cond,
2047             Register rn,
2048             WriteBack write_back,
2049             RegisterList registers) {
2050    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2051    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2052    VIXL_ASSERT(allow_macro_instructions_);
2053    VIXL_ASSERT(OutsideITBlock());
2054    MacroEmissionCheckScope guard(this);
2055    ITScope it_scope(this, &cond);
2056    ldmea(cond, rn, write_back, registers);
2057  }
2058  void Ldmea(Register rn, WriteBack write_back, RegisterList registers) {
2059    Ldmea(al, rn, write_back, registers);
2060  }
2061
2062  void Ldmed(Condition cond,
2063             Register rn,
2064             WriteBack write_back,
2065             RegisterList registers) {
2066    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2067    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2068    VIXL_ASSERT(allow_macro_instructions_);
2069    VIXL_ASSERT(OutsideITBlock());
2070    MacroEmissionCheckScope guard(this);
2071    ITScope it_scope(this, &cond);
2072    ldmed(cond, rn, write_back, registers);
2073  }
2074  void Ldmed(Register rn, WriteBack write_back, RegisterList registers) {
2075    Ldmed(al, rn, write_back, registers);
2076  }
2077
2078  void Ldmfa(Condition cond,
2079             Register rn,
2080             WriteBack write_back,
2081             RegisterList registers) {
2082    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2083    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2084    VIXL_ASSERT(allow_macro_instructions_);
2085    VIXL_ASSERT(OutsideITBlock());
2086    MacroEmissionCheckScope guard(this);
2087    ITScope it_scope(this, &cond);
2088    ldmfa(cond, rn, write_back, registers);
2089  }
2090  void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) {
2091    Ldmfa(al, rn, write_back, registers);
2092  }
2093
2094  void Ldmfd(Condition cond,
2095             Register rn,
2096             WriteBack write_back,
2097             RegisterList registers) {
2098    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2099    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2100    VIXL_ASSERT(allow_macro_instructions_);
2101    VIXL_ASSERT(OutsideITBlock());
2102    MacroEmissionCheckScope guard(this);
2103    ITScope it_scope(this, &cond);
2104    ldmfd(cond, rn, write_back, registers);
2105  }
2106  void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) {
2107    Ldmfd(al, rn, write_back, registers);
2108  }
2109
2110  void Ldmib(Condition cond,
2111             Register rn,
2112             WriteBack write_back,
2113             RegisterList registers) {
2114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2115    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2116    VIXL_ASSERT(allow_macro_instructions_);
2117    VIXL_ASSERT(OutsideITBlock());
2118    MacroEmissionCheckScope guard(this);
2119    ITScope it_scope(this, &cond);
2120    ldmib(cond, rn, write_back, registers);
2121  }
2122  void Ldmib(Register rn, WriteBack write_back, RegisterList registers) {
2123    Ldmib(al, rn, write_back, registers);
2124  }
2125
2126  void Ldr(Condition cond, Register rt, const MemOperand& operand) {
2127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2128    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2129    VIXL_ASSERT(allow_macro_instructions_);
2130    VIXL_ASSERT(OutsideITBlock());
2131    MacroEmissionCheckScope guard(this);
2132    bool can_use_it =
2133        // LDR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2134        (operand.IsImmediate() && rt.IsLow() &&
2135         operand.GetBaseRegister().IsLow() &&
2136         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
2137         (operand.GetAddrMode() == Offset)) ||
2138        // LDR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
2139        (operand.IsImmediate() && rt.IsLow() &&
2140         operand.GetBaseRegister().IsSP() &&
2141         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
2142         (operand.GetAddrMode() == Offset)) ||
2143        // LDR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2144        (operand.IsPlainRegister() && rt.IsLow() &&
2145         operand.GetBaseRegister().IsLow() &&
2146         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2147         (operand.GetAddrMode() == Offset));
2148    ITScope it_scope(this, &cond, can_use_it);
2149    ldr(cond, rt, operand);
2150  }
2151  void Ldr(Register rt, const MemOperand& operand) { Ldr(al, rt, operand); }
2152
2153  void Ldr(Condition cond, Register rt, Label* label) {
2154    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2155    VIXL_ASSERT(allow_macro_instructions_);
2156    VIXL_ASSERT(OutsideITBlock());
2157    MacroEmissionCheckScope guard(this);
2158    ITScope it_scope(this, &cond);
2159    ldr(cond, rt, label);
2160  }
2161  void Ldr(Register rt, Label* label) { Ldr(al, rt, label); }
2162
2163  void Ldrb(Condition cond, Register rt, const MemOperand& operand) {
2164    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2165    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2166    VIXL_ASSERT(allow_macro_instructions_);
2167    VIXL_ASSERT(OutsideITBlock());
2168    MacroEmissionCheckScope guard(this);
2169    bool can_use_it =
2170        // LDRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2171        (operand.IsImmediate() && rt.IsLow() &&
2172         operand.GetBaseRegister().IsLow() &&
2173         operand.IsOffsetImmediateWithinRange(0, 31) &&
2174         (operand.GetAddrMode() == Offset)) ||
2175        // LDRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2176        (operand.IsPlainRegister() && rt.IsLow() &&
2177         operand.GetBaseRegister().IsLow() &&
2178         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2179         (operand.GetAddrMode() == Offset));
2180    ITScope it_scope(this, &cond, can_use_it);
2181    ldrb(cond, rt, operand);
2182  }
2183  void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); }
2184
2185  void Ldrb(Condition cond, Register rt, Label* label) {
2186    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2187    VIXL_ASSERT(allow_macro_instructions_);
2188    VIXL_ASSERT(OutsideITBlock());
2189    MacroEmissionCheckScope guard(this);
2190    ITScope it_scope(this, &cond);
2191    ldrb(cond, rt, label);
2192  }
2193  void Ldrb(Register rt, Label* label) { Ldrb(al, rt, label); }
2194
2195  void Ldrd(Condition cond,
2196            Register rt,
2197            Register rt2,
2198            const MemOperand& operand) {
2199    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2200    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2201    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2202    VIXL_ASSERT(allow_macro_instructions_);
2203    VIXL_ASSERT(OutsideITBlock());
2204    MacroEmissionCheckScope guard(this);
2205    ITScope it_scope(this, &cond);
2206    ldrd(cond, rt, rt2, operand);
2207  }
2208  void Ldrd(Register rt, Register rt2, const MemOperand& operand) {
2209    Ldrd(al, rt, rt2, operand);
2210  }
2211
2212  void Ldrd(Condition cond, Register rt, Register rt2, Label* label) {
2213    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2214    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2215    VIXL_ASSERT(allow_macro_instructions_);
2216    VIXL_ASSERT(OutsideITBlock());
2217    MacroEmissionCheckScope guard(this);
2218    ITScope it_scope(this, &cond);
2219    ldrd(cond, rt, rt2, label);
2220  }
2221  void Ldrd(Register rt, Register rt2, Label* label) {
2222    Ldrd(al, rt, rt2, label);
2223  }
2224
2225  void Ldrex(Condition cond, Register rt, const MemOperand& operand) {
2226    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2227    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2228    VIXL_ASSERT(allow_macro_instructions_);
2229    VIXL_ASSERT(OutsideITBlock());
2230    MacroEmissionCheckScope guard(this);
2231    ITScope it_scope(this, &cond);
2232    ldrex(cond, rt, operand);
2233  }
2234  void Ldrex(Register rt, const MemOperand& operand) { Ldrex(al, rt, operand); }
2235
2236  void Ldrexb(Condition cond, Register rt, const MemOperand& operand) {
2237    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2238    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2239    VIXL_ASSERT(allow_macro_instructions_);
2240    VIXL_ASSERT(OutsideITBlock());
2241    MacroEmissionCheckScope guard(this);
2242    ITScope it_scope(this, &cond);
2243    ldrexb(cond, rt, operand);
2244  }
2245  void Ldrexb(Register rt, const MemOperand& operand) {
2246    Ldrexb(al, rt, operand);
2247  }
2248
2249  void Ldrexd(Condition cond,
2250              Register rt,
2251              Register rt2,
2252              const MemOperand& operand) {
2253    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2254    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2255    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2256    VIXL_ASSERT(allow_macro_instructions_);
2257    VIXL_ASSERT(OutsideITBlock());
2258    MacroEmissionCheckScope guard(this);
2259    ITScope it_scope(this, &cond);
2260    ldrexd(cond, rt, rt2, operand);
2261  }
2262  void Ldrexd(Register rt, Register rt2, const MemOperand& operand) {
2263    Ldrexd(al, rt, rt2, operand);
2264  }
2265
2266  void Ldrexh(Condition cond, Register rt, const MemOperand& operand) {
2267    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2268    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2269    VIXL_ASSERT(allow_macro_instructions_);
2270    VIXL_ASSERT(OutsideITBlock());
2271    MacroEmissionCheckScope guard(this);
2272    ITScope it_scope(this, &cond);
2273    ldrexh(cond, rt, operand);
2274  }
2275  void Ldrexh(Register rt, const MemOperand& operand) {
2276    Ldrexh(al, rt, operand);
2277  }
2278
2279  void Ldrh(Condition cond, Register rt, const MemOperand& operand) {
2280    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2281    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2282    VIXL_ASSERT(allow_macro_instructions_);
2283    VIXL_ASSERT(OutsideITBlock());
2284    MacroEmissionCheckScope guard(this);
2285    bool can_use_it =
2286        // LDRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2287        (operand.IsImmediate() && rt.IsLow() &&
2288         operand.GetBaseRegister().IsLow() &&
2289         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
2290         (operand.GetAddrMode() == Offset)) ||
2291        // LDRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2292        (operand.IsPlainRegister() && rt.IsLow() &&
2293         operand.GetBaseRegister().IsLow() &&
2294         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2295         (operand.GetAddrMode() == Offset));
2296    ITScope it_scope(this, &cond, can_use_it);
2297    ldrh(cond, rt, operand);
2298  }
2299  void Ldrh(Register rt, const MemOperand& operand) { Ldrh(al, rt, operand); }
2300
2301  void Ldrh(Condition cond, Register rt, Label* label) {
2302    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2303    VIXL_ASSERT(allow_macro_instructions_);
2304    VIXL_ASSERT(OutsideITBlock());
2305    MacroEmissionCheckScope guard(this);
2306    ITScope it_scope(this, &cond);
2307    ldrh(cond, rt, label);
2308  }
2309  void Ldrh(Register rt, Label* label) { Ldrh(al, rt, label); }
2310
2311  void Ldrsb(Condition cond, Register rt, const MemOperand& operand) {
2312    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2313    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2314    VIXL_ASSERT(allow_macro_instructions_);
2315    VIXL_ASSERT(OutsideITBlock());
2316    MacroEmissionCheckScope guard(this);
2317    bool can_use_it =
2318        // LDRSB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2319        operand.IsPlainRegister() && rt.IsLow() &&
2320        operand.GetBaseRegister().IsLow() &&
2321        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2322        (operand.GetAddrMode() == Offset);
2323    ITScope it_scope(this, &cond, can_use_it);
2324    ldrsb(cond, rt, operand);
2325  }
2326  void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); }
2327
2328  void Ldrsb(Condition cond, Register rt, Label* label) {
2329    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2330    VIXL_ASSERT(allow_macro_instructions_);
2331    VIXL_ASSERT(OutsideITBlock());
2332    MacroEmissionCheckScope guard(this);
2333    ITScope it_scope(this, &cond);
2334    ldrsb(cond, rt, label);
2335  }
2336  void Ldrsb(Register rt, Label* label) { Ldrsb(al, rt, label); }
2337
2338  void Ldrsh(Condition cond, Register rt, const MemOperand& operand) {
2339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2340    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2341    VIXL_ASSERT(allow_macro_instructions_);
2342    VIXL_ASSERT(OutsideITBlock());
2343    MacroEmissionCheckScope guard(this);
2344    bool can_use_it =
2345        // LDRSH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2346        operand.IsPlainRegister() && rt.IsLow() &&
2347        operand.GetBaseRegister().IsLow() &&
2348        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2349        (operand.GetAddrMode() == Offset);
2350    ITScope it_scope(this, &cond, can_use_it);
2351    ldrsh(cond, rt, operand);
2352  }
2353  void Ldrsh(Register rt, const MemOperand& operand) { Ldrsh(al, rt, operand); }
2354
2355  void Ldrsh(Condition cond, Register rt, Label* label) {
2356    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2357    VIXL_ASSERT(allow_macro_instructions_);
2358    VIXL_ASSERT(OutsideITBlock());
2359    MacroEmissionCheckScope guard(this);
2360    ITScope it_scope(this, &cond);
2361    ldrsh(cond, rt, label);
2362  }
2363  void Ldrsh(Register rt, Label* label) { Ldrsh(al, rt, label); }
2364
2365  void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) {
2366    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2367    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2368    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2369    VIXL_ASSERT(allow_macro_instructions_);
2370    VIXL_ASSERT(OutsideITBlock());
2371    MacroEmissionCheckScope guard(this);
2372    bool can_use_it =
2373        // LSL<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2374        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2375         (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) ||
2376        // LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2377        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2378         operand.GetBaseRegister().IsLow());
2379    ITScope it_scope(this, &cond, can_use_it);
2380    lsl(cond, rd, rm, operand);
2381  }
2382  void Lsl(Register rd, Register rm, const Operand& operand) {
2383    Lsl(al, rd, rm, operand);
2384  }
2385  void Lsl(FlagsUpdate flags,
2386           Condition cond,
2387           Register rd,
2388           Register rm,
2389           const Operand& operand) {
2390    switch (flags) {
2391      case LeaveFlags:
2392        Lsl(cond, rd, rm, operand);
2393        break;
2394      case SetFlags:
2395        Lsls(cond, rd, rm, operand);
2396        break;
2397      case DontCare:
2398        bool setflags_is_smaller =
2399            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2400            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2401              (operand.GetImmediate() < 32)) ||
2402             (operand.IsPlainRegister() && rd.Is(rm)));
2403        if (setflags_is_smaller) {
2404          Lsls(cond, rd, rm, operand);
2405        } else {
2406          Lsl(cond, rd, rm, operand);
2407        }
2408        break;
2409    }
2410  }
2411  void Lsl(FlagsUpdate flags,
2412           Register rd,
2413           Register rm,
2414           const Operand& operand) {
2415    Lsl(flags, al, rd, rm, operand);
2416  }
2417
2418  void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) {
2419    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2420    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2421    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2422    VIXL_ASSERT(allow_macro_instructions_);
2423    VIXL_ASSERT(OutsideITBlock());
2424    MacroEmissionCheckScope guard(this);
2425    ITScope it_scope(this, &cond);
2426    lsls(cond, rd, rm, operand);
2427  }
2428  void Lsls(Register rd, Register rm, const Operand& operand) {
2429    Lsls(al, rd, rm, operand);
2430  }
2431
2432  void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) {
2433    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2434    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2435    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2436    VIXL_ASSERT(allow_macro_instructions_);
2437    VIXL_ASSERT(OutsideITBlock());
2438    MacroEmissionCheckScope guard(this);
2439    bool can_use_it =
2440        // LSR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2441        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2442         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
2443        // LSR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2444        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2445         operand.GetBaseRegister().IsLow());
2446    ITScope it_scope(this, &cond, can_use_it);
2447    lsr(cond, rd, rm, operand);
2448  }
2449  void Lsr(Register rd, Register rm, const Operand& operand) {
2450    Lsr(al, rd, rm, operand);
2451  }
2452  void Lsr(FlagsUpdate flags,
2453           Condition cond,
2454           Register rd,
2455           Register rm,
2456           const Operand& operand) {
2457    switch (flags) {
2458      case LeaveFlags:
2459        Lsr(cond, rd, rm, operand);
2460        break;
2461      case SetFlags:
2462        Lsrs(cond, rd, rm, operand);
2463        break;
2464      case DontCare:
2465        bool setflags_is_smaller =
2466            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2467            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2468              (operand.GetImmediate() <= 32)) ||
2469             (operand.IsPlainRegister() && rd.Is(rm)));
2470        if (setflags_is_smaller) {
2471          Lsrs(cond, rd, rm, operand);
2472        } else {
2473          Lsr(cond, rd, rm, operand);
2474        }
2475        break;
2476    }
2477  }
2478  void Lsr(FlagsUpdate flags,
2479           Register rd,
2480           Register rm,
2481           const Operand& operand) {
2482    Lsr(flags, al, rd, rm, operand);
2483  }
2484
2485  void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) {
2486    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2488    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2489    VIXL_ASSERT(allow_macro_instructions_);
2490    VIXL_ASSERT(OutsideITBlock());
2491    MacroEmissionCheckScope guard(this);
2492    ITScope it_scope(this, &cond);
2493    lsrs(cond, rd, rm, operand);
2494  }
2495  void Lsrs(Register rd, Register rm, const Operand& operand) {
2496    Lsrs(al, rd, rm, operand);
2497  }
2498
2499  void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2501    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2502    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2503    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2504    VIXL_ASSERT(allow_macro_instructions_);
2505    VIXL_ASSERT(OutsideITBlock());
2506    MacroEmissionCheckScope guard(this);
2507    ITScope it_scope(this, &cond);
2508    mla(cond, rd, rn, rm, ra);
2509  }
2510  void Mla(Register rd, Register rn, Register rm, Register ra) {
2511    Mla(al, rd, rn, rm, ra);
2512  }
2513  void Mla(FlagsUpdate flags,
2514           Condition cond,
2515           Register rd,
2516           Register rn,
2517           Register rm,
2518           Register ra) {
2519    switch (flags) {
2520      case LeaveFlags:
2521        Mla(cond, rd, rn, rm, ra);
2522        break;
2523      case SetFlags:
2524        Mlas(cond, rd, rn, rm, ra);
2525        break;
2526      case DontCare:
2527        Mla(cond, rd, rn, rm, ra);
2528        break;
2529    }
2530  }
2531  void Mla(
2532      FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) {
2533    Mla(flags, al, rd, rn, rm, ra);
2534  }
2535
2536  void Mlas(
2537      Condition cond, Register rd, Register rn, Register rm, Register ra) {
2538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2541    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2542    VIXL_ASSERT(allow_macro_instructions_);
2543    VIXL_ASSERT(OutsideITBlock());
2544    MacroEmissionCheckScope guard(this);
2545    ITScope it_scope(this, &cond);
2546    mlas(cond, rd, rn, rm, ra);
2547  }
2548  void Mlas(Register rd, Register rn, Register rm, Register ra) {
2549    Mlas(al, rd, rn, rm, ra);
2550  }
2551
2552  void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2553    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2556    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2557    VIXL_ASSERT(allow_macro_instructions_);
2558    VIXL_ASSERT(OutsideITBlock());
2559    MacroEmissionCheckScope guard(this);
2560    ITScope it_scope(this, &cond);
2561    mls(cond, rd, rn, rm, ra);
2562  }
2563  void Mls(Register rd, Register rn, Register rm, Register ra) {
2564    Mls(al, rd, rn, rm, ra);
2565  }
2566
2567  void Mov(Condition cond, Register rd, const Operand& operand) {
2568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2569    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2570    VIXL_ASSERT(allow_macro_instructions_);
2571    VIXL_ASSERT(OutsideITBlock());
2572    MacroEmissionCheckScope guard(this);
2573    if (operand.IsPlainRegister() && rd.Is(operand.GetBaseRegister())) {
2574      return;
2575    }
2576    bool can_use_it =
2577        // MOV<c>{<q>} <Rd>, #<imm8> ; T1
2578        (operand.IsImmediate() && rd.IsLow() &&
2579         (operand.GetImmediate() <= 255)) ||
2580        // MOV{<c>}{<q>} <Rd>, <Rm> ; T1
2581        (operand.IsPlainRegister() && !rd.IsPC() &&
2582         !operand.GetBaseRegister().IsPC()) ||
2583        // MOV<c>{<q>} <Rd>, <Rm> {, <shift> #<amount>} ; T2
2584        (operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2585         operand.GetBaseRegister().IsLow() &&
2586         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2587          operand.GetShift().Is(ASR))) ||
2588        // MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs> ; T1
2589        // MOV<c>{<q>} <Rdm>, <Rdm>, LSR <Rs> ; T1
2590        // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1
2591        // MOV<c>{<q>} <Rdm>, <Rdm>, ROR <Rs> ; T1
2592        (operand.IsRegisterShiftedRegister() &&
2593         rd.Is(operand.GetBaseRegister()) && rd.IsLow() &&
2594         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2595          operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) &&
2596         operand.GetShiftRegister().IsLow());
2597    ITScope it_scope(this, &cond, can_use_it);
2598    mov(cond, rd, operand);
2599  }
2600  void Mov(Register rd, const Operand& operand) { Mov(al, rd, operand); }
2601  void Mov(FlagsUpdate flags,
2602           Condition cond,
2603           Register rd,
2604           const Operand& operand) {
2605    switch (flags) {
2606      case LeaveFlags:
2607        Mov(cond, rd, operand);
2608        break;
2609      case SetFlags:
2610        Movs(cond, rd, operand);
2611        break;
2612      case DontCare:
2613        if (operand.IsPlainRegister() && rd.Is(operand.GetBaseRegister())) {
2614          return;
2615        }
2616        bool setflags_is_smaller =
2617            IsUsingT32() && cond.Is(al) &&
2618            ((operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2619              operand.GetBaseRegister().IsLow() &&
2620              (operand.GetShiftAmount() >= 1) &&
2621              (((operand.GetShiftAmount() <= 32) &&
2622                ((operand.GetShift().IsLSR() || operand.GetShift().IsASR()))) ||
2623               ((operand.GetShiftAmount() < 32) &&
2624                operand.GetShift().IsLSL()))) ||
2625             (operand.IsRegisterShiftedRegister() && rd.IsLow() &&
2626              operand.GetBaseRegister().Is(rd) &&
2627              operand.GetShiftRegister().IsLow() &&
2628              (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() ||
2629               operand.GetShift().IsASR() || operand.GetShift().IsROR())) ||
2630             (operand.IsImmediate() && rd.IsLow() &&
2631              (operand.GetImmediate() < 256)));
2632        if (setflags_is_smaller) {
2633          Movs(cond, rd, operand);
2634        } else {
2635          Mov(cond, rd, operand);
2636        }
2637        break;
2638    }
2639  }
2640  void Mov(FlagsUpdate flags, Register rd, const Operand& operand) {
2641    Mov(flags, al, rd, operand);
2642  }
2643
2644  void Movs(Condition cond, Register rd, const Operand& operand) {
2645    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2646    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2647    VIXL_ASSERT(allow_macro_instructions_);
2648    VIXL_ASSERT(OutsideITBlock());
2649    MacroEmissionCheckScope guard(this);
2650    ITScope it_scope(this, &cond);
2651    movs(cond, rd, operand);
2652  }
2653  void Movs(Register rd, const Operand& operand) { Movs(al, rd, operand); }
2654
2655  void Movt(Condition cond, Register rd, const Operand& operand) {
2656    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2657    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2658    VIXL_ASSERT(allow_macro_instructions_);
2659    VIXL_ASSERT(OutsideITBlock());
2660    MacroEmissionCheckScope guard(this);
2661    ITScope it_scope(this, &cond);
2662    movt(cond, rd, operand);
2663  }
2664  void Movt(Register rd, const Operand& operand) { Movt(al, rd, operand); }
2665
2666  void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
2667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2668    VIXL_ASSERT(allow_macro_instructions_);
2669    VIXL_ASSERT(OutsideITBlock());
2670    MacroEmissionCheckScope guard(this);
2671    ITScope it_scope(this, &cond);
2672    mrs(cond, rd, spec_reg);
2673  }
2674  void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); }
2675
2676  void Msr(Condition cond,
2677           MaskedSpecialRegister spec_reg,
2678           const Operand& operand) {
2679    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2680    VIXL_ASSERT(allow_macro_instructions_);
2681    VIXL_ASSERT(OutsideITBlock());
2682    MacroEmissionCheckScope guard(this);
2683    ITScope it_scope(this, &cond);
2684    msr(cond, spec_reg, operand);
2685  }
2686  void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) {
2687    Msr(al, spec_reg, operand);
2688  }
2689
2690  void Mul(Condition cond, Register rd, Register rn, Register rm) {
2691    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2692    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2693    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2694    VIXL_ASSERT(allow_macro_instructions_);
2695    VIXL_ASSERT(OutsideITBlock());
2696    MacroEmissionCheckScope guard(this);
2697    bool can_use_it =
2698        // MUL<c>{<q>} <Rdm>, <Rn>{, <Rdm>} ; T1
2699        rd.Is(rm) && rn.IsLow() && rm.IsLow();
2700    ITScope it_scope(this, &cond, can_use_it);
2701    mul(cond, rd, rn, rm);
2702  }
2703  void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); }
2704  void Mul(FlagsUpdate flags,
2705           Condition cond,
2706           Register rd,
2707           Register rn,
2708           Register rm) {
2709    switch (flags) {
2710      case LeaveFlags:
2711        Mul(cond, rd, rn, rm);
2712        break;
2713      case SetFlags:
2714        Muls(cond, rd, rn, rm);
2715        break;
2716      case DontCare:
2717        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2718                                   rn.IsLow() && rm.Is(rd);
2719        if (setflags_is_smaller) {
2720          Muls(cond, rd, rn, rm);
2721        } else {
2722          Mul(cond, rd, rn, rm);
2723        }
2724        break;
2725    }
2726  }
2727  void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) {
2728    Mul(flags, al, rd, rn, rm);
2729  }
2730
2731  void Muls(Condition cond, Register rd, Register rn, Register rm) {
2732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2734    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2735    VIXL_ASSERT(allow_macro_instructions_);
2736    VIXL_ASSERT(OutsideITBlock());
2737    MacroEmissionCheckScope guard(this);
2738    ITScope it_scope(this, &cond);
2739    muls(cond, rd, rn, rm);
2740  }
2741  void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); }
2742
2743  void Mvn(Condition cond, Register rd, const Operand& operand) {
2744    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2745    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2746    VIXL_ASSERT(allow_macro_instructions_);
2747    VIXL_ASSERT(OutsideITBlock());
2748    MacroEmissionCheckScope guard(this);
2749    bool can_use_it =
2750        // MVN<c>{<q>} <Rd>, <Rm> ; T1
2751        operand.IsPlainRegister() && rd.IsLow() &&
2752        operand.GetBaseRegister().IsLow();
2753    ITScope it_scope(this, &cond, can_use_it);
2754    mvn(cond, rd, operand);
2755  }
2756  void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); }
2757  void Mvn(FlagsUpdate flags,
2758           Condition cond,
2759           Register rd,
2760           const Operand& operand) {
2761    switch (flags) {
2762      case LeaveFlags:
2763        Mvn(cond, rd, operand);
2764        break;
2765      case SetFlags:
2766        Mvns(cond, rd, operand);
2767        break;
2768      case DontCare:
2769        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2770                                   operand.IsPlainRegister() &&
2771                                   operand.GetBaseRegister().IsLow();
2772        if (setflags_is_smaller) {
2773          Mvns(cond, rd, operand);
2774        } else {
2775          Mvn(cond, rd, operand);
2776        }
2777        break;
2778    }
2779  }
2780  void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) {
2781    Mvn(flags, al, rd, operand);
2782  }
2783
2784  void Mvns(Condition cond, Register rd, const Operand& operand) {
2785    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2786    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2787    VIXL_ASSERT(allow_macro_instructions_);
2788    VIXL_ASSERT(OutsideITBlock());
2789    MacroEmissionCheckScope guard(this);
2790    ITScope it_scope(this, &cond);
2791    mvns(cond, rd, operand);
2792  }
2793  void Mvns(Register rd, const Operand& operand) { Mvns(al, rd, operand); }
2794
2795  void Nop(Condition cond) {
2796    VIXL_ASSERT(allow_macro_instructions_);
2797    VIXL_ASSERT(OutsideITBlock());
2798    MacroEmissionCheckScope guard(this);
2799    ITScope it_scope(this, &cond);
2800    nop(cond);
2801  }
2802  void Nop() { Nop(al); }
2803
2804  void Orn(Condition cond, Register rd, Register rn, const Operand& operand) {
2805    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2806    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2807    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2808    VIXL_ASSERT(allow_macro_instructions_);
2809    VIXL_ASSERT(OutsideITBlock());
2810    MacroEmissionCheckScope guard(this);
2811    if (cond.Is(al) && operand.IsImmediate()) {
2812      uint32_t immediate = operand.GetImmediate();
2813      if (immediate == 0) {
2814        mvn(rd, 0);
2815        return;
2816      }
2817      if ((immediate == 0xffffffff) && rd.Is(rn)) {
2818        return;
2819      }
2820    }
2821    ITScope it_scope(this, &cond);
2822    orn(cond, rd, rn, operand);
2823  }
2824  void Orn(Register rd, Register rn, const Operand& operand) {
2825    Orn(al, rd, rn, operand);
2826  }
2827  void Orn(FlagsUpdate flags,
2828           Condition cond,
2829           Register rd,
2830           Register rn,
2831           const Operand& operand) {
2832    switch (flags) {
2833      case LeaveFlags:
2834        Orn(cond, rd, rn, operand);
2835        break;
2836      case SetFlags:
2837        Orns(cond, rd, rn, operand);
2838        break;
2839      case DontCare:
2840        Orn(cond, rd, rn, operand);
2841        break;
2842    }
2843  }
2844  void Orn(FlagsUpdate flags,
2845           Register rd,
2846           Register rn,
2847           const Operand& operand) {
2848    Orn(flags, al, rd, rn, operand);
2849  }
2850
2851  void Orns(Condition cond, Register rd, Register rn, const Operand& operand) {
2852    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2853    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2854    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2855    VIXL_ASSERT(allow_macro_instructions_);
2856    VIXL_ASSERT(OutsideITBlock());
2857    MacroEmissionCheckScope guard(this);
2858    ITScope it_scope(this, &cond);
2859    orns(cond, rd, rn, operand);
2860  }
2861  void Orns(Register rd, Register rn, const Operand& operand) {
2862    Orns(al, rd, rn, operand);
2863  }
2864
2865  void Orr(Condition cond, Register rd, Register rn, const Operand& operand) {
2866    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2867    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2868    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2869    VIXL_ASSERT(allow_macro_instructions_);
2870    VIXL_ASSERT(OutsideITBlock());
2871    MacroEmissionCheckScope guard(this);
2872    if (rd.Is(rn) && operand.IsPlainRegister() &&
2873        rd.Is(operand.GetBaseRegister())) {
2874      return;
2875    }
2876    if (cond.Is(al) && operand.IsImmediate()) {
2877      uint32_t immediate = operand.GetImmediate();
2878      if ((immediate == 0) && rd.Is(rn)) {
2879        return;
2880      }
2881      if (immediate == 0xffffffff) {
2882        mvn(rd, 0);
2883        return;
2884      }
2885    }
2886    bool can_use_it =
2887        // ORR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
2888        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
2889        operand.GetBaseRegister().IsLow();
2890    ITScope it_scope(this, &cond, can_use_it);
2891    orr(cond, rd, rn, operand);
2892  }
2893  void Orr(Register rd, Register rn, const Operand& operand) {
2894    Orr(al, rd, rn, operand);
2895  }
2896  void Orr(FlagsUpdate flags,
2897           Condition cond,
2898           Register rd,
2899           Register rn,
2900           const Operand& operand) {
2901    switch (flags) {
2902      case LeaveFlags:
2903        Orr(cond, rd, rn, operand);
2904        break;
2905      case SetFlags:
2906        Orrs(cond, rd, rn, operand);
2907        break;
2908      case DontCare:
2909        if (operand.IsPlainRegister() && rd.Is(rn) &&
2910            rd.Is(operand.GetBaseRegister())) {
2911          return;
2912        }
2913        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2914                                   rn.Is(rd) && operand.IsPlainRegister() &&
2915                                   operand.GetBaseRegister().IsLow();
2916        if (setflags_is_smaller) {
2917          Orrs(cond, rd, rn, operand);
2918        } else {
2919          Orr(cond, rd, rn, operand);
2920        }
2921        break;
2922    }
2923  }
2924  void Orr(FlagsUpdate flags,
2925           Register rd,
2926           Register rn,
2927           const Operand& operand) {
2928    Orr(flags, al, rd, rn, operand);
2929  }
2930
2931  void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) {
2932    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2933    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2934    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2935    VIXL_ASSERT(allow_macro_instructions_);
2936    VIXL_ASSERT(OutsideITBlock());
2937    MacroEmissionCheckScope guard(this);
2938    ITScope it_scope(this, &cond);
2939    orrs(cond, rd, rn, operand);
2940  }
2941  void Orrs(Register rd, Register rn, const Operand& operand) {
2942    Orrs(al, rd, rn, operand);
2943  }
2944
2945  void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) {
2946    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2947    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2948    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2949    VIXL_ASSERT(allow_macro_instructions_);
2950    VIXL_ASSERT(OutsideITBlock());
2951    MacroEmissionCheckScope guard(this);
2952    ITScope it_scope(this, &cond);
2953    pkhbt(cond, rd, rn, operand);
2954  }
2955  void Pkhbt(Register rd, Register rn, const Operand& operand) {
2956    Pkhbt(al, rd, rn, operand);
2957  }
2958
2959  void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) {
2960    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2962    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2963    VIXL_ASSERT(allow_macro_instructions_);
2964    VIXL_ASSERT(OutsideITBlock());
2965    MacroEmissionCheckScope guard(this);
2966    ITScope it_scope(this, &cond);
2967    pkhtb(cond, rd, rn, operand);
2968  }
2969  void Pkhtb(Register rd, Register rn, const Operand& operand) {
2970    Pkhtb(al, rd, rn, operand);
2971  }
2972
2973  void Pld(Condition cond, Label* label) {
2974    VIXL_ASSERT(allow_macro_instructions_);
2975    VIXL_ASSERT(OutsideITBlock());
2976    MacroEmissionCheckScope guard(this);
2977    ITScope it_scope(this, &cond);
2978    pld(cond, label);
2979  }
2980  void Pld(Label* label) { Pld(al, label); }
2981
2982  void Pld(Condition cond, const MemOperand& operand) {
2983    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2984    VIXL_ASSERT(allow_macro_instructions_);
2985    VIXL_ASSERT(OutsideITBlock());
2986    MacroEmissionCheckScope guard(this);
2987    ITScope it_scope(this, &cond);
2988    pld(cond, operand);
2989  }
2990  void Pld(const MemOperand& operand) { Pld(al, operand); }
2991
2992  void Pldw(Condition cond, const MemOperand& operand) {
2993    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2994    VIXL_ASSERT(allow_macro_instructions_);
2995    VIXL_ASSERT(OutsideITBlock());
2996    MacroEmissionCheckScope guard(this);
2997    ITScope it_scope(this, &cond);
2998    pldw(cond, operand);
2999  }
3000  void Pldw(const MemOperand& operand) { Pldw(al, operand); }
3001
3002  void Pli(Condition cond, const MemOperand& operand) {
3003    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3004    VIXL_ASSERT(allow_macro_instructions_);
3005    VIXL_ASSERT(OutsideITBlock());
3006    MacroEmissionCheckScope guard(this);
3007    ITScope it_scope(this, &cond);
3008    pli(cond, operand);
3009  }
3010  void Pli(const MemOperand& operand) { Pli(al, operand); }
3011
3012  void Pli(Condition cond, Label* label) {
3013    VIXL_ASSERT(allow_macro_instructions_);
3014    VIXL_ASSERT(OutsideITBlock());
3015    MacroEmissionCheckScope guard(this);
3016    ITScope it_scope(this, &cond);
3017    pli(cond, label);
3018  }
3019  void Pli(Label* label) { Pli(al, label); }
3020
3021  void Pop(Condition cond, RegisterList registers) {
3022    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
3023    VIXL_ASSERT(allow_macro_instructions_);
3024    VIXL_ASSERT(OutsideITBlock());
3025    MacroEmissionCheckScope guard(this);
3026    ITScope it_scope(this, &cond);
3027    pop(cond, registers);
3028  }
3029  void Pop(RegisterList registers) { Pop(al, registers); }
3030
3031  void Pop(Condition cond, Register rt) {
3032    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
3033    VIXL_ASSERT(allow_macro_instructions_);
3034    VIXL_ASSERT(OutsideITBlock());
3035    MacroEmissionCheckScope guard(this);
3036    ITScope it_scope(this, &cond);
3037    pop(cond, rt);
3038  }
3039  void Pop(Register rt) { Pop(al, rt); }
3040
3041  void Push(Condition cond, RegisterList registers) {
3042    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
3043    VIXL_ASSERT(allow_macro_instructions_);
3044    VIXL_ASSERT(OutsideITBlock());
3045    MacroEmissionCheckScope guard(this);
3046    ITScope it_scope(this, &cond);
3047    push(cond, registers);
3048  }
3049  void Push(RegisterList registers) { Push(al, registers); }
3050
3051  void Push(Condition cond, Register rt) {
3052    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
3053    VIXL_ASSERT(allow_macro_instructions_);
3054    VIXL_ASSERT(OutsideITBlock());
3055    MacroEmissionCheckScope guard(this);
3056    ITScope it_scope(this, &cond);
3057    push(cond, rt);
3058  }
3059  void Push(Register rt) { Push(al, rt); }
3060
3061  void Qadd(Condition cond, Register rd, Register rm, Register rn) {
3062    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3065    VIXL_ASSERT(allow_macro_instructions_);
3066    VIXL_ASSERT(OutsideITBlock());
3067    MacroEmissionCheckScope guard(this);
3068    ITScope it_scope(this, &cond);
3069    qadd(cond, rd, rm, rn);
3070  }
3071  void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); }
3072
3073  void Qadd16(Condition cond, Register rd, Register rn, Register rm) {
3074    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3076    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3077    VIXL_ASSERT(allow_macro_instructions_);
3078    VIXL_ASSERT(OutsideITBlock());
3079    MacroEmissionCheckScope guard(this);
3080    ITScope it_scope(this, &cond);
3081    qadd16(cond, rd, rn, rm);
3082  }
3083  void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); }
3084
3085  void Qadd8(Condition cond, Register rd, Register rn, Register rm) {
3086    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3087    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3088    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3089    VIXL_ASSERT(allow_macro_instructions_);
3090    VIXL_ASSERT(OutsideITBlock());
3091    MacroEmissionCheckScope guard(this);
3092    ITScope it_scope(this, &cond);
3093    qadd8(cond, rd, rn, rm);
3094  }
3095  void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); }
3096
3097  void Qasx(Condition cond, Register rd, Register rn, Register rm) {
3098    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3099    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3100    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3101    VIXL_ASSERT(allow_macro_instructions_);
3102    VIXL_ASSERT(OutsideITBlock());
3103    MacroEmissionCheckScope guard(this);
3104    ITScope it_scope(this, &cond);
3105    qasx(cond, rd, rn, rm);
3106  }
3107  void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); }
3108
3109  void Qdadd(Condition cond, Register rd, Register rm, Register rn) {
3110    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3112    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3113    VIXL_ASSERT(allow_macro_instructions_);
3114    VIXL_ASSERT(OutsideITBlock());
3115    MacroEmissionCheckScope guard(this);
3116    ITScope it_scope(this, &cond);
3117    qdadd(cond, rd, rm, rn);
3118  }
3119  void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); }
3120
3121  void Qdsub(Condition cond, Register rd, Register rm, Register rn) {
3122    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3123    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3124    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3125    VIXL_ASSERT(allow_macro_instructions_);
3126    VIXL_ASSERT(OutsideITBlock());
3127    MacroEmissionCheckScope guard(this);
3128    ITScope it_scope(this, &cond);
3129    qdsub(cond, rd, rm, rn);
3130  }
3131  void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); }
3132
3133  void Qsax(Condition cond, Register rd, Register rn, Register rm) {
3134    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3135    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3136    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3137    VIXL_ASSERT(allow_macro_instructions_);
3138    VIXL_ASSERT(OutsideITBlock());
3139    MacroEmissionCheckScope guard(this);
3140    ITScope it_scope(this, &cond);
3141    qsax(cond, rd, rn, rm);
3142  }
3143  void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); }
3144
3145  void Qsub(Condition cond, Register rd, Register rm, Register rn) {
3146    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3147    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3148    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3149    VIXL_ASSERT(allow_macro_instructions_);
3150    VIXL_ASSERT(OutsideITBlock());
3151    MacroEmissionCheckScope guard(this);
3152    ITScope it_scope(this, &cond);
3153    qsub(cond, rd, rm, rn);
3154  }
3155  void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); }
3156
3157  void Qsub16(Condition cond, Register rd, Register rn, Register rm) {
3158    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3159    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3160    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3161    VIXL_ASSERT(allow_macro_instructions_);
3162    VIXL_ASSERT(OutsideITBlock());
3163    MacroEmissionCheckScope guard(this);
3164    ITScope it_scope(this, &cond);
3165    qsub16(cond, rd, rn, rm);
3166  }
3167  void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); }
3168
3169  void Qsub8(Condition cond, Register rd, Register rn, Register rm) {
3170    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3171    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3172    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3173    VIXL_ASSERT(allow_macro_instructions_);
3174    VIXL_ASSERT(OutsideITBlock());
3175    MacroEmissionCheckScope guard(this);
3176    ITScope it_scope(this, &cond);
3177    qsub8(cond, rd, rn, rm);
3178  }
3179  void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); }
3180
3181  void Rbit(Condition cond, Register rd, Register rm) {
3182    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3183    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3184    VIXL_ASSERT(allow_macro_instructions_);
3185    VIXL_ASSERT(OutsideITBlock());
3186    MacroEmissionCheckScope guard(this);
3187    ITScope it_scope(this, &cond);
3188    rbit(cond, rd, rm);
3189  }
3190  void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); }
3191
3192  void Rev(Condition cond, Register rd, Register rm) {
3193    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3194    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3195    VIXL_ASSERT(allow_macro_instructions_);
3196    VIXL_ASSERT(OutsideITBlock());
3197    MacroEmissionCheckScope guard(this);
3198    ITScope it_scope(this, &cond);
3199    rev(cond, rd, rm);
3200  }
3201  void Rev(Register rd, Register rm) { Rev(al, rd, rm); }
3202
3203  void Rev16(Condition cond, Register rd, Register rm) {
3204    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3205    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3206    VIXL_ASSERT(allow_macro_instructions_);
3207    VIXL_ASSERT(OutsideITBlock());
3208    MacroEmissionCheckScope guard(this);
3209    ITScope it_scope(this, &cond);
3210    rev16(cond, rd, rm);
3211  }
3212  void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); }
3213
3214  void Revsh(Condition cond, Register rd, Register rm) {
3215    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3216    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3217    VIXL_ASSERT(allow_macro_instructions_);
3218    VIXL_ASSERT(OutsideITBlock());
3219    MacroEmissionCheckScope guard(this);
3220    ITScope it_scope(this, &cond);
3221    revsh(cond, rd, rm);
3222  }
3223  void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); }
3224
3225  void Ror(Condition cond, Register rd, Register rm, const Operand& operand) {
3226    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3227    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3228    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3229    VIXL_ASSERT(allow_macro_instructions_);
3230    VIXL_ASSERT(OutsideITBlock());
3231    MacroEmissionCheckScope guard(this);
3232    bool can_use_it =
3233        // ROR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
3234        operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
3235        operand.GetBaseRegister().IsLow();
3236    ITScope it_scope(this, &cond, can_use_it);
3237    ror(cond, rd, rm, operand);
3238  }
3239  void Ror(Register rd, Register rm, const Operand& operand) {
3240    Ror(al, rd, rm, operand);
3241  }
3242  void Ror(FlagsUpdate flags,
3243           Condition cond,
3244           Register rd,
3245           Register rm,
3246           const Operand& operand) {
3247    switch (flags) {
3248      case LeaveFlags:
3249        Ror(cond, rd, rm, operand);
3250        break;
3251      case SetFlags:
3252        Rors(cond, rd, rm, operand);
3253        break;
3254      case DontCare:
3255        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3256                                   rm.IsLow() && operand.IsPlainRegister() &&
3257                                   rd.Is(rm);
3258        if (setflags_is_smaller) {
3259          Rors(cond, rd, rm, operand);
3260        } else {
3261          Ror(cond, rd, rm, operand);
3262        }
3263        break;
3264    }
3265  }
3266  void Ror(FlagsUpdate flags,
3267           Register rd,
3268           Register rm,
3269           const Operand& operand) {
3270    Ror(flags, al, rd, rm, operand);
3271  }
3272
3273  void Rors(Condition cond, Register rd, Register rm, const Operand& operand) {
3274    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3275    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3276    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3277    VIXL_ASSERT(allow_macro_instructions_);
3278    VIXL_ASSERT(OutsideITBlock());
3279    MacroEmissionCheckScope guard(this);
3280    ITScope it_scope(this, &cond);
3281    rors(cond, rd, rm, operand);
3282  }
3283  void Rors(Register rd, Register rm, const Operand& operand) {
3284    Rors(al, rd, rm, operand);
3285  }
3286
3287  void Rrx(Condition cond, Register rd, Register rm) {
3288    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3289    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3290    VIXL_ASSERT(allow_macro_instructions_);
3291    VIXL_ASSERT(OutsideITBlock());
3292    MacroEmissionCheckScope guard(this);
3293    ITScope it_scope(this, &cond);
3294    rrx(cond, rd, rm);
3295  }
3296  void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); }
3297  void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) {
3298    switch (flags) {
3299      case LeaveFlags:
3300        Rrx(cond, rd, rm);
3301        break;
3302      case SetFlags:
3303        Rrxs(cond, rd, rm);
3304        break;
3305      case DontCare:
3306        Rrx(cond, rd, rm);
3307        break;
3308    }
3309  }
3310  void Rrx(FlagsUpdate flags, Register rd, Register rm) {
3311    Rrx(flags, al, rd, rm);
3312  }
3313
3314  void Rrxs(Condition cond, Register rd, Register rm) {
3315    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3316    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3317    VIXL_ASSERT(allow_macro_instructions_);
3318    VIXL_ASSERT(OutsideITBlock());
3319    MacroEmissionCheckScope guard(this);
3320    ITScope it_scope(this, &cond);
3321    rrxs(cond, rd, rm);
3322  }
3323  void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); }
3324
3325  void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) {
3326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3327    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3328    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3329    VIXL_ASSERT(allow_macro_instructions_);
3330    VIXL_ASSERT(OutsideITBlock());
3331    MacroEmissionCheckScope guard(this);
3332    bool can_use_it =
3333        // RSB<c>{<q>} {<Rd>, }<Rn>, #0 ; T1
3334        operand.IsImmediate() && rd.IsLow() && rn.IsLow() &&
3335        (operand.GetImmediate() == 0);
3336    ITScope it_scope(this, &cond, can_use_it);
3337    rsb(cond, rd, rn, operand);
3338  }
3339  void Rsb(Register rd, Register rn, const Operand& operand) {
3340    Rsb(al, rd, rn, operand);
3341  }
3342  void Rsb(FlagsUpdate flags,
3343           Condition cond,
3344           Register rd,
3345           Register rn,
3346           const Operand& operand) {
3347    switch (flags) {
3348      case LeaveFlags:
3349        Rsb(cond, rd, rn, operand);
3350        break;
3351      case SetFlags:
3352        Rsbs(cond, rd, rn, operand);
3353        break;
3354      case DontCare:
3355        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3356                                   rn.IsLow() && operand.IsImmediate() &&
3357                                   (operand.GetImmediate() == 0);
3358        if (setflags_is_smaller) {
3359          Rsbs(cond, rd, rn, operand);
3360        } else {
3361          Rsb(cond, rd, rn, operand);
3362        }
3363        break;
3364    }
3365  }
3366  void Rsb(FlagsUpdate flags,
3367           Register rd,
3368           Register rn,
3369           const Operand& operand) {
3370    Rsb(flags, al, rd, rn, operand);
3371  }
3372
3373  void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) {
3374    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3375    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3376    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3377    VIXL_ASSERT(allow_macro_instructions_);
3378    VIXL_ASSERT(OutsideITBlock());
3379    MacroEmissionCheckScope guard(this);
3380    ITScope it_scope(this, &cond);
3381    rsbs(cond, rd, rn, operand);
3382  }
3383  void Rsbs(Register rd, Register rn, const Operand& operand) {
3384    Rsbs(al, rd, rn, operand);
3385  }
3386
3387  void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) {
3388    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3389    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3390    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3391    VIXL_ASSERT(allow_macro_instructions_);
3392    VIXL_ASSERT(OutsideITBlock());
3393    MacroEmissionCheckScope guard(this);
3394    ITScope it_scope(this, &cond);
3395    rsc(cond, rd, rn, operand);
3396  }
3397  void Rsc(Register rd, Register rn, const Operand& operand) {
3398    Rsc(al, rd, rn, operand);
3399  }
3400  void Rsc(FlagsUpdate flags,
3401           Condition cond,
3402           Register rd,
3403           Register rn,
3404           const Operand& operand) {
3405    switch (flags) {
3406      case LeaveFlags:
3407        Rsc(cond, rd, rn, operand);
3408        break;
3409      case SetFlags:
3410        Rscs(cond, rd, rn, operand);
3411        break;
3412      case DontCare:
3413        Rsc(cond, rd, rn, operand);
3414        break;
3415    }
3416  }
3417  void Rsc(FlagsUpdate flags,
3418           Register rd,
3419           Register rn,
3420           const Operand& operand) {
3421    Rsc(flags, al, rd, rn, operand);
3422  }
3423
3424  void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) {
3425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3427    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3428    VIXL_ASSERT(allow_macro_instructions_);
3429    VIXL_ASSERT(OutsideITBlock());
3430    MacroEmissionCheckScope guard(this);
3431    ITScope it_scope(this, &cond);
3432    rscs(cond, rd, rn, operand);
3433  }
3434  void Rscs(Register rd, Register rn, const Operand& operand) {
3435    Rscs(al, rd, rn, operand);
3436  }
3437
3438  void Sadd16(Condition cond, Register rd, Register rn, Register rm) {
3439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3441    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3442    VIXL_ASSERT(allow_macro_instructions_);
3443    VIXL_ASSERT(OutsideITBlock());
3444    MacroEmissionCheckScope guard(this);
3445    ITScope it_scope(this, &cond);
3446    sadd16(cond, rd, rn, rm);
3447  }
3448  void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); }
3449
3450  void Sadd8(Condition cond, Register rd, Register rn, Register rm) {
3451    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3452    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3453    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3454    VIXL_ASSERT(allow_macro_instructions_);
3455    VIXL_ASSERT(OutsideITBlock());
3456    MacroEmissionCheckScope guard(this);
3457    ITScope it_scope(this, &cond);
3458    sadd8(cond, rd, rn, rm);
3459  }
3460  void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); }
3461
3462  void Sasx(Condition cond, Register rd, Register rn, Register rm) {
3463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3464    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3465    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3466    VIXL_ASSERT(allow_macro_instructions_);
3467    VIXL_ASSERT(OutsideITBlock());
3468    MacroEmissionCheckScope guard(this);
3469    ITScope it_scope(this, &cond);
3470    sasx(cond, rd, rn, rm);
3471  }
3472  void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); }
3473
3474  void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) {
3475    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3476    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3477    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3478    VIXL_ASSERT(allow_macro_instructions_);
3479    VIXL_ASSERT(OutsideITBlock());
3480    MacroEmissionCheckScope guard(this);
3481    bool can_use_it =
3482        // SBC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
3483        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
3484        operand.GetBaseRegister().IsLow();
3485    ITScope it_scope(this, &cond, can_use_it);
3486    sbc(cond, rd, rn, operand);
3487  }
3488  void Sbc(Register rd, Register rn, const Operand& operand) {
3489    Sbc(al, rd, rn, operand);
3490  }
3491  void Sbc(FlagsUpdate flags,
3492           Condition cond,
3493           Register rd,
3494           Register rn,
3495           const Operand& operand) {
3496    switch (flags) {
3497      case LeaveFlags:
3498        Sbc(cond, rd, rn, operand);
3499        break;
3500      case SetFlags:
3501        Sbcs(cond, rd, rn, operand);
3502        break;
3503      case DontCare:
3504        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3505                                   rn.Is(rd) && operand.IsPlainRegister() &&
3506                                   operand.GetBaseRegister().IsLow();
3507        if (setflags_is_smaller) {
3508          Sbcs(cond, rd, rn, operand);
3509        } else {
3510          Sbc(cond, rd, rn, operand);
3511        }
3512        break;
3513    }
3514  }
3515  void Sbc(FlagsUpdate flags,
3516           Register rd,
3517           Register rn,
3518           const Operand& operand) {
3519    Sbc(flags, al, rd, rn, operand);
3520  }
3521
3522  void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) {
3523    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3524    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3525    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3526    VIXL_ASSERT(allow_macro_instructions_);
3527    VIXL_ASSERT(OutsideITBlock());
3528    MacroEmissionCheckScope guard(this);
3529    ITScope it_scope(this, &cond);
3530    sbcs(cond, rd, rn, operand);
3531  }
3532  void Sbcs(Register rd, Register rn, const Operand& operand) {
3533    Sbcs(al, rd, rn, operand);
3534  }
3535
3536  void Sbfx(Condition cond,
3537            Register rd,
3538            Register rn,
3539            uint32_t lsb,
3540            const Operand& operand) {
3541    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3542    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3543    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3544    VIXL_ASSERT(allow_macro_instructions_);
3545    VIXL_ASSERT(OutsideITBlock());
3546    MacroEmissionCheckScope guard(this);
3547    ITScope it_scope(this, &cond);
3548    sbfx(cond, rd, rn, lsb, operand);
3549  }
3550  void Sbfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
3551    Sbfx(al, rd, rn, lsb, operand);
3552  }
3553
3554  void Sdiv(Condition cond, Register rd, Register rn, Register rm) {
3555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3557    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3558    VIXL_ASSERT(allow_macro_instructions_);
3559    VIXL_ASSERT(OutsideITBlock());
3560    MacroEmissionCheckScope guard(this);
3561    ITScope it_scope(this, &cond);
3562    sdiv(cond, rd, rn, rm);
3563  }
3564  void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); }
3565
3566  void Sel(Condition cond, Register rd, Register rn, Register rm) {
3567    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3570    VIXL_ASSERT(allow_macro_instructions_);
3571    VIXL_ASSERT(OutsideITBlock());
3572    MacroEmissionCheckScope guard(this);
3573    ITScope it_scope(this, &cond);
3574    sel(cond, rd, rn, rm);
3575  }
3576  void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); }
3577
3578  void Shadd16(Condition cond, Register rd, Register rn, Register rm) {
3579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3581    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3582    VIXL_ASSERT(allow_macro_instructions_);
3583    VIXL_ASSERT(OutsideITBlock());
3584    MacroEmissionCheckScope guard(this);
3585    ITScope it_scope(this, &cond);
3586    shadd16(cond, rd, rn, rm);
3587  }
3588  void Shadd16(Register rd, Register rn, Register rm) {
3589    Shadd16(al, rd, rn, rm);
3590  }
3591
3592  void Shadd8(Condition cond, Register rd, Register rn, Register rm) {
3593    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3594    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3595    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3596    VIXL_ASSERT(allow_macro_instructions_);
3597    VIXL_ASSERT(OutsideITBlock());
3598    MacroEmissionCheckScope guard(this);
3599    ITScope it_scope(this, &cond);
3600    shadd8(cond, rd, rn, rm);
3601  }
3602  void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); }
3603
3604  void Shasx(Condition cond, Register rd, Register rn, Register rm) {
3605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3607    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3608    VIXL_ASSERT(allow_macro_instructions_);
3609    VIXL_ASSERT(OutsideITBlock());
3610    MacroEmissionCheckScope guard(this);
3611    ITScope it_scope(this, &cond);
3612    shasx(cond, rd, rn, rm);
3613  }
3614  void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); }
3615
3616  void Shsax(Condition cond, Register rd, Register rn, Register rm) {
3617    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3620    VIXL_ASSERT(allow_macro_instructions_);
3621    VIXL_ASSERT(OutsideITBlock());
3622    MacroEmissionCheckScope guard(this);
3623    ITScope it_scope(this, &cond);
3624    shsax(cond, rd, rn, rm);
3625  }
3626  void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); }
3627
3628  void Shsub16(Condition cond, Register rd, Register rn, Register rm) {
3629    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3630    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3631    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3632    VIXL_ASSERT(allow_macro_instructions_);
3633    VIXL_ASSERT(OutsideITBlock());
3634    MacroEmissionCheckScope guard(this);
3635    ITScope it_scope(this, &cond);
3636    shsub16(cond, rd, rn, rm);
3637  }
3638  void Shsub16(Register rd, Register rn, Register rm) {
3639    Shsub16(al, rd, rn, rm);
3640  }
3641
3642  void Shsub8(Condition cond, Register rd, Register rn, Register rm) {
3643    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3645    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3646    VIXL_ASSERT(allow_macro_instructions_);
3647    VIXL_ASSERT(OutsideITBlock());
3648    MacroEmissionCheckScope guard(this);
3649    ITScope it_scope(this, &cond);
3650    shsub8(cond, rd, rn, rm);
3651  }
3652  void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); }
3653
3654  void Smlabb(
3655      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3656    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3657    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3658    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3659    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3660    VIXL_ASSERT(allow_macro_instructions_);
3661    VIXL_ASSERT(OutsideITBlock());
3662    MacroEmissionCheckScope guard(this);
3663    ITScope it_scope(this, &cond);
3664    smlabb(cond, rd, rn, rm, ra);
3665  }
3666  void Smlabb(Register rd, Register rn, Register rm, Register ra) {
3667    Smlabb(al, rd, rn, rm, ra);
3668  }
3669
3670  void Smlabt(
3671      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3672    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3673    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3674    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3675    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3676    VIXL_ASSERT(allow_macro_instructions_);
3677    VIXL_ASSERT(OutsideITBlock());
3678    MacroEmissionCheckScope guard(this);
3679    ITScope it_scope(this, &cond);
3680    smlabt(cond, rd, rn, rm, ra);
3681  }
3682  void Smlabt(Register rd, Register rn, Register rm, Register ra) {
3683    Smlabt(al, rd, rn, rm, ra);
3684  }
3685
3686  void Smlad(
3687      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3688    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3689    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3690    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3691    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3692    VIXL_ASSERT(allow_macro_instructions_);
3693    VIXL_ASSERT(OutsideITBlock());
3694    MacroEmissionCheckScope guard(this);
3695    ITScope it_scope(this, &cond);
3696    smlad(cond, rd, rn, rm, ra);
3697  }
3698  void Smlad(Register rd, Register rn, Register rm, Register ra) {
3699    Smlad(al, rd, rn, rm, ra);
3700  }
3701
3702  void Smladx(
3703      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3704    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3705    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3706    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3707    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3708    VIXL_ASSERT(allow_macro_instructions_);
3709    VIXL_ASSERT(OutsideITBlock());
3710    MacroEmissionCheckScope guard(this);
3711    ITScope it_scope(this, &cond);
3712    smladx(cond, rd, rn, rm, ra);
3713  }
3714  void Smladx(Register rd, Register rn, Register rm, Register ra) {
3715    Smladx(al, rd, rn, rm, ra);
3716  }
3717
3718  void Smlal(
3719      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3720    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3721    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3722    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3723    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3724    VIXL_ASSERT(allow_macro_instructions_);
3725    VIXL_ASSERT(OutsideITBlock());
3726    MacroEmissionCheckScope guard(this);
3727    ITScope it_scope(this, &cond);
3728    smlal(cond, rdlo, rdhi, rn, rm);
3729  }
3730  void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
3731    Smlal(al, rdlo, rdhi, rn, rm);
3732  }
3733
3734  void Smlalbb(
3735      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3737    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3738    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3739    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3740    VIXL_ASSERT(allow_macro_instructions_);
3741    VIXL_ASSERT(OutsideITBlock());
3742    MacroEmissionCheckScope guard(this);
3743    ITScope it_scope(this, &cond);
3744    smlalbb(cond, rdlo, rdhi, rn, rm);
3745  }
3746  void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
3747    Smlalbb(al, rdlo, rdhi, rn, rm);
3748  }
3749
3750  void Smlalbt(
3751      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3752    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3753    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3754    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3755    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3756    VIXL_ASSERT(allow_macro_instructions_);
3757    VIXL_ASSERT(OutsideITBlock());
3758    MacroEmissionCheckScope guard(this);
3759    ITScope it_scope(this, &cond);
3760    smlalbt(cond, rdlo, rdhi, rn, rm);
3761  }
3762  void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
3763    Smlalbt(al, rdlo, rdhi, rn, rm);
3764  }
3765
3766  void Smlald(
3767      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3768    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3769    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3770    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3771    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3772    VIXL_ASSERT(allow_macro_instructions_);
3773    VIXL_ASSERT(OutsideITBlock());
3774    MacroEmissionCheckScope guard(this);
3775    ITScope it_scope(this, &cond);
3776    smlald(cond, rdlo, rdhi, rn, rm);
3777  }
3778  void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
3779    Smlald(al, rdlo, rdhi, rn, rm);
3780  }
3781
3782  void Smlaldx(
3783      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3784    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3785    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3787    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3788    VIXL_ASSERT(allow_macro_instructions_);
3789    VIXL_ASSERT(OutsideITBlock());
3790    MacroEmissionCheckScope guard(this);
3791    ITScope it_scope(this, &cond);
3792    smlaldx(cond, rdlo, rdhi, rn, rm);
3793  }
3794  void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3795    Smlaldx(al, rdlo, rdhi, rn, rm);
3796  }
3797
3798  void Smlals(
3799      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3800    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3801    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3802    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3803    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3804    VIXL_ASSERT(allow_macro_instructions_);
3805    VIXL_ASSERT(OutsideITBlock());
3806    MacroEmissionCheckScope guard(this);
3807    ITScope it_scope(this, &cond);
3808    smlals(cond, rdlo, rdhi, rn, rm);
3809  }
3810  void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
3811    Smlals(al, rdlo, rdhi, rn, rm);
3812  }
3813
3814  void Smlaltb(
3815      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3816    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3817    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3820    VIXL_ASSERT(allow_macro_instructions_);
3821    VIXL_ASSERT(OutsideITBlock());
3822    MacroEmissionCheckScope guard(this);
3823    ITScope it_scope(this, &cond);
3824    smlaltb(cond, rdlo, rdhi, rn, rm);
3825  }
3826  void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
3827    Smlaltb(al, rdlo, rdhi, rn, rm);
3828  }
3829
3830  void Smlaltt(
3831      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3832    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3833    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3834    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3835    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3836    VIXL_ASSERT(allow_macro_instructions_);
3837    VIXL_ASSERT(OutsideITBlock());
3838    MacroEmissionCheckScope guard(this);
3839    ITScope it_scope(this, &cond);
3840    smlaltt(cond, rdlo, rdhi, rn, rm);
3841  }
3842  void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
3843    Smlaltt(al, rdlo, rdhi, rn, rm);
3844  }
3845
3846  void Smlatb(
3847      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3848    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3849    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3850    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3851    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3852    VIXL_ASSERT(allow_macro_instructions_);
3853    VIXL_ASSERT(OutsideITBlock());
3854    MacroEmissionCheckScope guard(this);
3855    ITScope it_scope(this, &cond);
3856    smlatb(cond, rd, rn, rm, ra);
3857  }
3858  void Smlatb(Register rd, Register rn, Register rm, Register ra) {
3859    Smlatb(al, rd, rn, rm, ra);
3860  }
3861
3862  void Smlatt(
3863      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3864    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3865    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3866    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3867    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3868    VIXL_ASSERT(allow_macro_instructions_);
3869    VIXL_ASSERT(OutsideITBlock());
3870    MacroEmissionCheckScope guard(this);
3871    ITScope it_scope(this, &cond);
3872    smlatt(cond, rd, rn, rm, ra);
3873  }
3874  void Smlatt(Register rd, Register rn, Register rm, Register ra) {
3875    Smlatt(al, rd, rn, rm, ra);
3876  }
3877
3878  void Smlawb(
3879      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3880    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3881    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3882    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3883    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3884    VIXL_ASSERT(allow_macro_instructions_);
3885    VIXL_ASSERT(OutsideITBlock());
3886    MacroEmissionCheckScope guard(this);
3887    ITScope it_scope(this, &cond);
3888    smlawb(cond, rd, rn, rm, ra);
3889  }
3890  void Smlawb(Register rd, Register rn, Register rm, Register ra) {
3891    Smlawb(al, rd, rn, rm, ra);
3892  }
3893
3894  void Smlawt(
3895      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3896    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3897    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3898    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3899    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3900    VIXL_ASSERT(allow_macro_instructions_);
3901    VIXL_ASSERT(OutsideITBlock());
3902    MacroEmissionCheckScope guard(this);
3903    ITScope it_scope(this, &cond);
3904    smlawt(cond, rd, rn, rm, ra);
3905  }
3906  void Smlawt(Register rd, Register rn, Register rm, Register ra) {
3907    Smlawt(al, rd, rn, rm, ra);
3908  }
3909
3910  void Smlsd(
3911      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3912    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3915    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3916    VIXL_ASSERT(allow_macro_instructions_);
3917    VIXL_ASSERT(OutsideITBlock());
3918    MacroEmissionCheckScope guard(this);
3919    ITScope it_scope(this, &cond);
3920    smlsd(cond, rd, rn, rm, ra);
3921  }
3922  void Smlsd(Register rd, Register rn, Register rm, Register ra) {
3923    Smlsd(al, rd, rn, rm, ra);
3924  }
3925
3926  void Smlsdx(
3927      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3928    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3929    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3930    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3931    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3932    VIXL_ASSERT(allow_macro_instructions_);
3933    VIXL_ASSERT(OutsideITBlock());
3934    MacroEmissionCheckScope guard(this);
3935    ITScope it_scope(this, &cond);
3936    smlsdx(cond, rd, rn, rm, ra);
3937  }
3938  void Smlsdx(Register rd, Register rn, Register rm, Register ra) {
3939    Smlsdx(al, rd, rn, rm, ra);
3940  }
3941
3942  void Smlsld(
3943      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3944    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3945    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3946    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3947    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3948    VIXL_ASSERT(allow_macro_instructions_);
3949    VIXL_ASSERT(OutsideITBlock());
3950    MacroEmissionCheckScope guard(this);
3951    ITScope it_scope(this, &cond);
3952    smlsld(cond, rdlo, rdhi, rn, rm);
3953  }
3954  void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
3955    Smlsld(al, rdlo, rdhi, rn, rm);
3956  }
3957
3958  void Smlsldx(
3959      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3960    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3962    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3963    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3964    VIXL_ASSERT(allow_macro_instructions_);
3965    VIXL_ASSERT(OutsideITBlock());
3966    MacroEmissionCheckScope guard(this);
3967    ITScope it_scope(this, &cond);
3968    smlsldx(cond, rdlo, rdhi, rn, rm);
3969  }
3970  void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3971    Smlsldx(al, rdlo, rdhi, rn, rm);
3972  }
3973
3974  void Smmla(
3975      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3976    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3977    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3978    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3979    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3980    VIXL_ASSERT(allow_macro_instructions_);
3981    VIXL_ASSERT(OutsideITBlock());
3982    MacroEmissionCheckScope guard(this);
3983    ITScope it_scope(this, &cond);
3984    smmla(cond, rd, rn, rm, ra);
3985  }
3986  void Smmla(Register rd, Register rn, Register rm, Register ra) {
3987    Smmla(al, rd, rn, rm, ra);
3988  }
3989
3990  void Smmlar(
3991      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3992    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3993    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3995    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3996    VIXL_ASSERT(allow_macro_instructions_);
3997    VIXL_ASSERT(OutsideITBlock());
3998    MacroEmissionCheckScope guard(this);
3999    ITScope it_scope(this, &cond);
4000    smmlar(cond, rd, rn, rm, ra);
4001  }
4002  void Smmlar(Register rd, Register rn, Register rm, Register ra) {
4003    Smmlar(al, rd, rn, rm, ra);
4004  }
4005
4006  void Smmls(
4007      Condition cond, Register rd, Register rn, Register rm, Register ra) {
4008    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4010    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4011    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
4012    VIXL_ASSERT(allow_macro_instructions_);
4013    VIXL_ASSERT(OutsideITBlock());
4014    MacroEmissionCheckScope guard(this);
4015    ITScope it_scope(this, &cond);
4016    smmls(cond, rd, rn, rm, ra);
4017  }
4018  void Smmls(Register rd, Register rn, Register rm, Register ra) {
4019    Smmls(al, rd, rn, rm, ra);
4020  }
4021
4022  void Smmlsr(
4023      Condition cond, Register rd, Register rn, Register rm, Register ra) {
4024    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4025    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4026    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4027    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
4028    VIXL_ASSERT(allow_macro_instructions_);
4029    VIXL_ASSERT(OutsideITBlock());
4030    MacroEmissionCheckScope guard(this);
4031    ITScope it_scope(this, &cond);
4032    smmlsr(cond, rd, rn, rm, ra);
4033  }
4034  void Smmlsr(Register rd, Register rn, Register rm, Register ra) {
4035    Smmlsr(al, rd, rn, rm, ra);
4036  }
4037
4038  void Smmul(Condition cond, Register rd, Register rn, Register rm) {
4039    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4040    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4041    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4042    VIXL_ASSERT(allow_macro_instructions_);
4043    VIXL_ASSERT(OutsideITBlock());
4044    MacroEmissionCheckScope guard(this);
4045    ITScope it_scope(this, &cond);
4046    smmul(cond, rd, rn, rm);
4047  }
4048  void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); }
4049
4050  void Smmulr(Condition cond, Register rd, Register rn, Register rm) {
4051    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4052    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4053    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4054    VIXL_ASSERT(allow_macro_instructions_);
4055    VIXL_ASSERT(OutsideITBlock());
4056    MacroEmissionCheckScope guard(this);
4057    ITScope it_scope(this, &cond);
4058    smmulr(cond, rd, rn, rm);
4059  }
4060  void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); }
4061
4062  void Smuad(Condition cond, Register rd, Register rn, Register rm) {
4063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4066    VIXL_ASSERT(allow_macro_instructions_);
4067    VIXL_ASSERT(OutsideITBlock());
4068    MacroEmissionCheckScope guard(this);
4069    ITScope it_scope(this, &cond);
4070    smuad(cond, rd, rn, rm);
4071  }
4072  void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); }
4073
4074  void Smuadx(Condition cond, Register rd, Register rn, Register rm) {
4075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4076    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4077    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4078    VIXL_ASSERT(allow_macro_instructions_);
4079    VIXL_ASSERT(OutsideITBlock());
4080    MacroEmissionCheckScope guard(this);
4081    ITScope it_scope(this, &cond);
4082    smuadx(cond, rd, rn, rm);
4083  }
4084  void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); }
4085
4086  void Smulbb(Condition cond, Register rd, Register rn, Register rm) {
4087    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4088    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4089    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4090    VIXL_ASSERT(allow_macro_instructions_);
4091    VIXL_ASSERT(OutsideITBlock());
4092    MacroEmissionCheckScope guard(this);
4093    ITScope it_scope(this, &cond);
4094    smulbb(cond, rd, rn, rm);
4095  }
4096  void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); }
4097
4098  void Smulbt(Condition cond, Register rd, Register rn, Register rm) {
4099    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4100    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4101    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4102    VIXL_ASSERT(allow_macro_instructions_);
4103    VIXL_ASSERT(OutsideITBlock());
4104    MacroEmissionCheckScope guard(this);
4105    ITScope it_scope(this, &cond);
4106    smulbt(cond, rd, rn, rm);
4107  }
4108  void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); }
4109
4110  void Smull(
4111      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4112    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4113    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4115    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4116    VIXL_ASSERT(allow_macro_instructions_);
4117    VIXL_ASSERT(OutsideITBlock());
4118    MacroEmissionCheckScope guard(this);
4119    ITScope it_scope(this, &cond);
4120    smull(cond, rdlo, rdhi, rn, rm);
4121  }
4122  void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
4123    Smull(al, rdlo, rdhi, rn, rm);
4124  }
4125  void Smull(FlagsUpdate flags,
4126             Condition cond,
4127             Register rdlo,
4128             Register rdhi,
4129             Register rn,
4130             Register rm) {
4131    switch (flags) {
4132      case LeaveFlags:
4133        Smull(cond, rdlo, rdhi, rn, rm);
4134        break;
4135      case SetFlags:
4136        Smulls(cond, rdlo, rdhi, rn, rm);
4137        break;
4138      case DontCare:
4139        Smull(cond, rdlo, rdhi, rn, rm);
4140        break;
4141    }
4142  }
4143  void Smull(FlagsUpdate flags,
4144             Register rdlo,
4145             Register rdhi,
4146             Register rn,
4147             Register rm) {
4148    Smull(flags, al, rdlo, rdhi, rn, rm);
4149  }
4150
4151  void Smulls(
4152      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4153    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4154    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4155    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4156    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4157    VIXL_ASSERT(allow_macro_instructions_);
4158    VIXL_ASSERT(OutsideITBlock());
4159    MacroEmissionCheckScope guard(this);
4160    ITScope it_scope(this, &cond);
4161    smulls(cond, rdlo, rdhi, rn, rm);
4162  }
4163  void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4164    Smulls(al, rdlo, rdhi, rn, rm);
4165  }
4166
4167  void Smultb(Condition cond, Register rd, Register rn, Register rm) {
4168    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4169    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4170    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4171    VIXL_ASSERT(allow_macro_instructions_);
4172    VIXL_ASSERT(OutsideITBlock());
4173    MacroEmissionCheckScope guard(this);
4174    ITScope it_scope(this, &cond);
4175    smultb(cond, rd, rn, rm);
4176  }
4177  void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); }
4178
4179  void Smultt(Condition cond, Register rd, Register rn, Register rm) {
4180    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4181    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4182    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4183    VIXL_ASSERT(allow_macro_instructions_);
4184    VIXL_ASSERT(OutsideITBlock());
4185    MacroEmissionCheckScope guard(this);
4186    ITScope it_scope(this, &cond);
4187    smultt(cond, rd, rn, rm);
4188  }
4189  void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); }
4190
4191  void Smulwb(Condition cond, Register rd, Register rn, Register rm) {
4192    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4193    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4194    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4195    VIXL_ASSERT(allow_macro_instructions_);
4196    VIXL_ASSERT(OutsideITBlock());
4197    MacroEmissionCheckScope guard(this);
4198    ITScope it_scope(this, &cond);
4199    smulwb(cond, rd, rn, rm);
4200  }
4201  void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); }
4202
4203  void Smulwt(Condition cond, Register rd, Register rn, Register rm) {
4204    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4205    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4206    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4207    VIXL_ASSERT(allow_macro_instructions_);
4208    VIXL_ASSERT(OutsideITBlock());
4209    MacroEmissionCheckScope guard(this);
4210    ITScope it_scope(this, &cond);
4211    smulwt(cond, rd, rn, rm);
4212  }
4213  void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); }
4214
4215  void Smusd(Condition cond, Register rd, Register rn, Register rm) {
4216    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4217    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4218    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4219    VIXL_ASSERT(allow_macro_instructions_);
4220    VIXL_ASSERT(OutsideITBlock());
4221    MacroEmissionCheckScope guard(this);
4222    ITScope it_scope(this, &cond);
4223    smusd(cond, rd, rn, rm);
4224  }
4225  void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); }
4226
4227  void Smusdx(Condition cond, Register rd, Register rn, Register rm) {
4228    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4229    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4230    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4231    VIXL_ASSERT(allow_macro_instructions_);
4232    VIXL_ASSERT(OutsideITBlock());
4233    MacroEmissionCheckScope guard(this);
4234    ITScope it_scope(this, &cond);
4235    smusdx(cond, rd, rn, rm);
4236  }
4237  void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); }
4238
4239  void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
4240    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4241    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4242    VIXL_ASSERT(allow_macro_instructions_);
4243    VIXL_ASSERT(OutsideITBlock());
4244    MacroEmissionCheckScope guard(this);
4245    ITScope it_scope(this, &cond);
4246    ssat(cond, rd, imm, operand);
4247  }
4248  void Ssat(Register rd, uint32_t imm, const Operand& operand) {
4249    Ssat(al, rd, imm, operand);
4250  }
4251
4252  void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) {
4253    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4254    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4255    VIXL_ASSERT(allow_macro_instructions_);
4256    VIXL_ASSERT(OutsideITBlock());
4257    MacroEmissionCheckScope guard(this);
4258    ITScope it_scope(this, &cond);
4259    ssat16(cond, rd, imm, rn);
4260  }
4261  void Ssat16(Register rd, uint32_t imm, Register rn) {
4262    Ssat16(al, rd, imm, rn);
4263  }
4264
4265  void Ssax(Condition cond, Register rd, Register rn, Register rm) {
4266    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4267    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4268    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4269    VIXL_ASSERT(allow_macro_instructions_);
4270    VIXL_ASSERT(OutsideITBlock());
4271    MacroEmissionCheckScope guard(this);
4272    ITScope it_scope(this, &cond);
4273    ssax(cond, rd, rn, rm);
4274  }
4275  void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); }
4276
4277  void Ssub16(Condition cond, Register rd, Register rn, Register rm) {
4278    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4279    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4280    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4281    VIXL_ASSERT(allow_macro_instructions_);
4282    VIXL_ASSERT(OutsideITBlock());
4283    MacroEmissionCheckScope guard(this);
4284    ITScope it_scope(this, &cond);
4285    ssub16(cond, rd, rn, rm);
4286  }
4287  void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); }
4288
4289  void Ssub8(Condition cond, Register rd, Register rn, Register rm) {
4290    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4291    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4292    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4293    VIXL_ASSERT(allow_macro_instructions_);
4294    VIXL_ASSERT(OutsideITBlock());
4295    MacroEmissionCheckScope guard(this);
4296    ITScope it_scope(this, &cond);
4297    ssub8(cond, rd, rn, rm);
4298  }
4299  void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); }
4300
4301  void Stl(Condition cond, Register rt, const MemOperand& operand) {
4302    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4303    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4304    VIXL_ASSERT(allow_macro_instructions_);
4305    VIXL_ASSERT(OutsideITBlock());
4306    MacroEmissionCheckScope guard(this);
4307    ITScope it_scope(this, &cond);
4308    stl(cond, rt, operand);
4309  }
4310  void Stl(Register rt, const MemOperand& operand) { Stl(al, rt, operand); }
4311
4312  void Stlb(Condition cond, Register rt, const MemOperand& operand) {
4313    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4314    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4315    VIXL_ASSERT(allow_macro_instructions_);
4316    VIXL_ASSERT(OutsideITBlock());
4317    MacroEmissionCheckScope guard(this);
4318    ITScope it_scope(this, &cond);
4319    stlb(cond, rt, operand);
4320  }
4321  void Stlb(Register rt, const MemOperand& operand) { Stlb(al, rt, operand); }
4322
4323  void Stlex(Condition cond,
4324             Register rd,
4325             Register rt,
4326             const MemOperand& operand) {
4327    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4328    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4329    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4330    VIXL_ASSERT(allow_macro_instructions_);
4331    VIXL_ASSERT(OutsideITBlock());
4332    MacroEmissionCheckScope guard(this);
4333    ITScope it_scope(this, &cond);
4334    stlex(cond, rd, rt, operand);
4335  }
4336  void Stlex(Register rd, Register rt, const MemOperand& operand) {
4337    Stlex(al, rd, rt, operand);
4338  }
4339
4340  void Stlexb(Condition cond,
4341              Register rd,
4342              Register rt,
4343              const MemOperand& operand) {
4344    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4345    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4346    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4347    VIXL_ASSERT(allow_macro_instructions_);
4348    VIXL_ASSERT(OutsideITBlock());
4349    MacroEmissionCheckScope guard(this);
4350    ITScope it_scope(this, &cond);
4351    stlexb(cond, rd, rt, operand);
4352  }
4353  void Stlexb(Register rd, Register rt, const MemOperand& operand) {
4354    Stlexb(al, rd, rt, operand);
4355  }
4356
4357  void Stlexd(Condition cond,
4358              Register rd,
4359              Register rt,
4360              Register rt2,
4361              const MemOperand& operand) {
4362    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4363    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4364    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4365    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4366    VIXL_ASSERT(allow_macro_instructions_);
4367    VIXL_ASSERT(OutsideITBlock());
4368    MacroEmissionCheckScope guard(this);
4369    ITScope it_scope(this, &cond);
4370    stlexd(cond, rd, rt, rt2, operand);
4371  }
4372  void Stlexd(Register rd,
4373              Register rt,
4374              Register rt2,
4375              const MemOperand& operand) {
4376    Stlexd(al, rd, rt, rt2, operand);
4377  }
4378
4379  void Stlexh(Condition cond,
4380              Register rd,
4381              Register rt,
4382              const MemOperand& operand) {
4383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4384    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4385    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4386    VIXL_ASSERT(allow_macro_instructions_);
4387    VIXL_ASSERT(OutsideITBlock());
4388    MacroEmissionCheckScope guard(this);
4389    ITScope it_scope(this, &cond);
4390    stlexh(cond, rd, rt, operand);
4391  }
4392  void Stlexh(Register rd, Register rt, const MemOperand& operand) {
4393    Stlexh(al, rd, rt, operand);
4394  }
4395
4396  void Stlh(Condition cond, Register rt, const MemOperand& operand) {
4397    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4398    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4399    VIXL_ASSERT(allow_macro_instructions_);
4400    VIXL_ASSERT(OutsideITBlock());
4401    MacroEmissionCheckScope guard(this);
4402    ITScope it_scope(this, &cond);
4403    stlh(cond, rt, operand);
4404  }
4405  void Stlh(Register rt, const MemOperand& operand) { Stlh(al, rt, operand); }
4406
4407  void Stm(Condition cond,
4408           Register rn,
4409           WriteBack write_back,
4410           RegisterList registers) {
4411    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4412    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4413    VIXL_ASSERT(allow_macro_instructions_);
4414    VIXL_ASSERT(OutsideITBlock());
4415    MacroEmissionCheckScope guard(this);
4416    ITScope it_scope(this, &cond);
4417    stm(cond, rn, write_back, registers);
4418  }
4419  void Stm(Register rn, WriteBack write_back, RegisterList registers) {
4420    Stm(al, rn, write_back, registers);
4421  }
4422
4423  void Stmda(Condition cond,
4424             Register rn,
4425             WriteBack write_back,
4426             RegisterList registers) {
4427    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4428    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4429    VIXL_ASSERT(allow_macro_instructions_);
4430    VIXL_ASSERT(OutsideITBlock());
4431    MacroEmissionCheckScope guard(this);
4432    ITScope it_scope(this, &cond);
4433    stmda(cond, rn, write_back, registers);
4434  }
4435  void Stmda(Register rn, WriteBack write_back, RegisterList registers) {
4436    Stmda(al, rn, write_back, registers);
4437  }
4438
4439  void Stmdb(Condition cond,
4440             Register rn,
4441             WriteBack write_back,
4442             RegisterList registers) {
4443    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4444    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4445    VIXL_ASSERT(allow_macro_instructions_);
4446    VIXL_ASSERT(OutsideITBlock());
4447    MacroEmissionCheckScope guard(this);
4448    ITScope it_scope(this, &cond);
4449    stmdb(cond, rn, write_back, registers);
4450  }
4451  void Stmdb(Register rn, WriteBack write_back, RegisterList registers) {
4452    Stmdb(al, rn, write_back, registers);
4453  }
4454
4455  void Stmea(Condition cond,
4456             Register rn,
4457             WriteBack write_back,
4458             RegisterList registers) {
4459    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4460    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4461    VIXL_ASSERT(allow_macro_instructions_);
4462    VIXL_ASSERT(OutsideITBlock());
4463    MacroEmissionCheckScope guard(this);
4464    ITScope it_scope(this, &cond);
4465    stmea(cond, rn, write_back, registers);
4466  }
4467  void Stmea(Register rn, WriteBack write_back, RegisterList registers) {
4468    Stmea(al, rn, write_back, registers);
4469  }
4470
4471  void Stmed(Condition cond,
4472             Register rn,
4473             WriteBack write_back,
4474             RegisterList registers) {
4475    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4476    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4477    VIXL_ASSERT(allow_macro_instructions_);
4478    VIXL_ASSERT(OutsideITBlock());
4479    MacroEmissionCheckScope guard(this);
4480    ITScope it_scope(this, &cond);
4481    stmed(cond, rn, write_back, registers);
4482  }
4483  void Stmed(Register rn, WriteBack write_back, RegisterList registers) {
4484    Stmed(al, rn, write_back, registers);
4485  }
4486
4487  void Stmfa(Condition cond,
4488             Register rn,
4489             WriteBack write_back,
4490             RegisterList registers) {
4491    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4492    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4493    VIXL_ASSERT(allow_macro_instructions_);
4494    VIXL_ASSERT(OutsideITBlock());
4495    MacroEmissionCheckScope guard(this);
4496    ITScope it_scope(this, &cond);
4497    stmfa(cond, rn, write_back, registers);
4498  }
4499  void Stmfa(Register rn, WriteBack write_back, RegisterList registers) {
4500    Stmfa(al, rn, write_back, registers);
4501  }
4502
4503  void Stmfd(Condition cond,
4504             Register rn,
4505             WriteBack write_back,
4506             RegisterList registers) {
4507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4508    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4509    VIXL_ASSERT(allow_macro_instructions_);
4510    VIXL_ASSERT(OutsideITBlock());
4511    MacroEmissionCheckScope guard(this);
4512    ITScope it_scope(this, &cond);
4513    stmfd(cond, rn, write_back, registers);
4514  }
4515  void Stmfd(Register rn, WriteBack write_back, RegisterList registers) {
4516    Stmfd(al, rn, write_back, registers);
4517  }
4518
4519  void Stmib(Condition cond,
4520             Register rn,
4521             WriteBack write_back,
4522             RegisterList registers) {
4523    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4524    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4525    VIXL_ASSERT(allow_macro_instructions_);
4526    VIXL_ASSERT(OutsideITBlock());
4527    MacroEmissionCheckScope guard(this);
4528    ITScope it_scope(this, &cond);
4529    stmib(cond, rn, write_back, registers);
4530  }
4531  void Stmib(Register rn, WriteBack write_back, RegisterList registers) {
4532    Stmib(al, rn, write_back, registers);
4533  }
4534
4535  void Str(Condition cond, Register rt, const MemOperand& operand) {
4536    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4537    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4538    VIXL_ASSERT(allow_macro_instructions_);
4539    VIXL_ASSERT(OutsideITBlock());
4540    MacroEmissionCheckScope guard(this);
4541    bool can_use_it =
4542        // STR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4543        (operand.IsImmediate() && rt.IsLow() &&
4544         operand.GetBaseRegister().IsLow() &&
4545         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
4546         (operand.GetAddrMode() == Offset)) ||
4547        // STR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
4548        (operand.IsImmediate() && rt.IsLow() &&
4549         operand.GetBaseRegister().IsSP() &&
4550         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
4551         (operand.GetAddrMode() == Offset)) ||
4552        // STR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4553        (operand.IsPlainRegister() && rt.IsLow() &&
4554         operand.GetBaseRegister().IsLow() &&
4555         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4556         (operand.GetAddrMode() == Offset));
4557    ITScope it_scope(this, &cond, can_use_it);
4558    str(cond, rt, operand);
4559  }
4560  void Str(Register rt, const MemOperand& operand) { Str(al, rt, operand); }
4561
4562  void Strb(Condition cond, Register rt, const MemOperand& operand) {
4563    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4564    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4565    VIXL_ASSERT(allow_macro_instructions_);
4566    VIXL_ASSERT(OutsideITBlock());
4567    MacroEmissionCheckScope guard(this);
4568    bool can_use_it =
4569        // STRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4570        (operand.IsImmediate() && rt.IsLow() &&
4571         operand.GetBaseRegister().IsLow() &&
4572         operand.IsOffsetImmediateWithinRange(0, 31) &&
4573         (operand.GetAddrMode() == Offset)) ||
4574        // STRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4575        (operand.IsPlainRegister() && rt.IsLow() &&
4576         operand.GetBaseRegister().IsLow() &&
4577         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4578         (operand.GetAddrMode() == Offset));
4579    ITScope it_scope(this, &cond, can_use_it);
4580    strb(cond, rt, operand);
4581  }
4582  void Strb(Register rt, const MemOperand& operand) { Strb(al, rt, operand); }
4583
4584  void Strd(Condition cond,
4585            Register rt,
4586            Register rt2,
4587            const MemOperand& operand) {
4588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4589    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4590    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4591    VIXL_ASSERT(allow_macro_instructions_);
4592    VIXL_ASSERT(OutsideITBlock());
4593    MacroEmissionCheckScope guard(this);
4594    ITScope it_scope(this, &cond);
4595    strd(cond, rt, rt2, operand);
4596  }
4597  void Strd(Register rt, Register rt2, const MemOperand& operand) {
4598    Strd(al, rt, rt2, operand);
4599  }
4600
4601  void Strex(Condition cond,
4602             Register rd,
4603             Register rt,
4604             const MemOperand& operand) {
4605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4607    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4608    VIXL_ASSERT(allow_macro_instructions_);
4609    VIXL_ASSERT(OutsideITBlock());
4610    MacroEmissionCheckScope guard(this);
4611    ITScope it_scope(this, &cond);
4612    strex(cond, rd, rt, operand);
4613  }
4614  void Strex(Register rd, Register rt, const MemOperand& operand) {
4615    Strex(al, rd, rt, operand);
4616  }
4617
4618  void Strexb(Condition cond,
4619              Register rd,
4620              Register rt,
4621              const MemOperand& operand) {
4622    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4623    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4624    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4625    VIXL_ASSERT(allow_macro_instructions_);
4626    VIXL_ASSERT(OutsideITBlock());
4627    MacroEmissionCheckScope guard(this);
4628    ITScope it_scope(this, &cond);
4629    strexb(cond, rd, rt, operand);
4630  }
4631  void Strexb(Register rd, Register rt, const MemOperand& operand) {
4632    Strexb(al, rd, rt, operand);
4633  }
4634
4635  void Strexd(Condition cond,
4636              Register rd,
4637              Register rt,
4638              Register rt2,
4639              const MemOperand& operand) {
4640    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4641    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4642    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4643    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4644    VIXL_ASSERT(allow_macro_instructions_);
4645    VIXL_ASSERT(OutsideITBlock());
4646    MacroEmissionCheckScope guard(this);
4647    ITScope it_scope(this, &cond);
4648    strexd(cond, rd, rt, rt2, operand);
4649  }
4650  void Strexd(Register rd,
4651              Register rt,
4652              Register rt2,
4653              const MemOperand& operand) {
4654    Strexd(al, rd, rt, rt2, operand);
4655  }
4656
4657  void Strexh(Condition cond,
4658              Register rd,
4659              Register rt,
4660              const MemOperand& operand) {
4661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4662    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4663    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4664    VIXL_ASSERT(allow_macro_instructions_);
4665    VIXL_ASSERT(OutsideITBlock());
4666    MacroEmissionCheckScope guard(this);
4667    ITScope it_scope(this, &cond);
4668    strexh(cond, rd, rt, operand);
4669  }
4670  void Strexh(Register rd, Register rt, const MemOperand& operand) {
4671    Strexh(al, rd, rt, operand);
4672  }
4673
4674  void Strh(Condition cond, Register rt, const MemOperand& operand) {
4675    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4676    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4677    VIXL_ASSERT(allow_macro_instructions_);
4678    VIXL_ASSERT(OutsideITBlock());
4679    MacroEmissionCheckScope guard(this);
4680    bool can_use_it =
4681        // STRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4682        (operand.IsImmediate() && rt.IsLow() &&
4683         operand.GetBaseRegister().IsLow() &&
4684         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
4685         (operand.GetAddrMode() == Offset)) ||
4686        // STRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4687        (operand.IsPlainRegister() && rt.IsLow() &&
4688         operand.GetBaseRegister().IsLow() &&
4689         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4690         (operand.GetAddrMode() == Offset));
4691    ITScope it_scope(this, &cond, can_use_it);
4692    strh(cond, rt, operand);
4693  }
4694  void Strh(Register rt, const MemOperand& operand) { Strh(al, rt, operand); }
4695
4696  void Sub(Condition cond, Register rd, Register rn, const Operand& operand) {
4697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4699    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4700    VIXL_ASSERT(allow_macro_instructions_);
4701    VIXL_ASSERT(OutsideITBlock());
4702    MacroEmissionCheckScope guard(this);
4703    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
4704      uint32_t immediate = operand.GetImmediate();
4705      if (immediate == 0) {
4706        return;
4707      }
4708    }
4709    bool can_use_it =
4710        // SUB<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
4711        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
4712         rd.IsLow()) ||
4713        // SUB<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
4714        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
4715         rd.IsLow() && rn.Is(rd)) ||
4716        // SUB<c>{<q>} <Rd>, <Rn>, <Rm>
4717        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4718         operand.GetBaseRegister().IsLow());
4719    ITScope it_scope(this, &cond, can_use_it);
4720    sub(cond, rd, rn, operand);
4721  }
4722  void Sub(Register rd, Register rn, const Operand& operand) {
4723    Sub(al, rd, rn, operand);
4724  }
4725  void Sub(FlagsUpdate flags,
4726           Condition cond,
4727           Register rd,
4728           Register rn,
4729           const Operand& operand) {
4730    switch (flags) {
4731      case LeaveFlags:
4732        Sub(cond, rd, rn, operand);
4733        break;
4734      case SetFlags:
4735        Subs(cond, rd, rn, operand);
4736        break;
4737      case DontCare:
4738        bool setflags_is_smaller =
4739            IsUsingT32() && cond.Is(al) &&
4740            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4741              operand.GetBaseRegister().IsLow()) ||
4742             (operand.IsImmediate() &&
4743              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
4744               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
4745        if (setflags_is_smaller) {
4746          Subs(cond, rd, rn, operand);
4747        } else {
4748          bool changed_op_is_smaller =
4749              operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
4750              ((rd.IsLow() && rn.IsLow() &&
4751                (operand.GetSignedImmediate() >= -7)) ||
4752               (rd.IsLow() && rn.Is(rd) &&
4753                (operand.GetSignedImmediate() >= -255)));
4754          if (changed_op_is_smaller) {
4755            Adds(cond, rd, rn, -operand.GetSignedImmediate());
4756          } else {
4757            Sub(cond, rd, rn, operand);
4758          }
4759        }
4760        break;
4761    }
4762  }
4763  void Sub(FlagsUpdate flags,
4764           Register rd,
4765           Register rn,
4766           const Operand& operand) {
4767    Sub(flags, al, rd, rn, operand);
4768  }
4769
4770  void Subs(Condition cond, Register rd, Register rn, const Operand& operand) {
4771    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4772    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4773    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4774    VIXL_ASSERT(allow_macro_instructions_);
4775    VIXL_ASSERT(OutsideITBlock());
4776    MacroEmissionCheckScope guard(this);
4777    ITScope it_scope(this, &cond);
4778    subs(cond, rd, rn, operand);
4779  }
4780  void Subs(Register rd, Register rn, const Operand& operand) {
4781    Subs(al, rd, rn, operand);
4782  }
4783
4784  void Svc(Condition cond, uint32_t imm) {
4785    VIXL_ASSERT(allow_macro_instructions_);
4786    VIXL_ASSERT(OutsideITBlock());
4787    MacroEmissionCheckScope guard(this);
4788    ITScope it_scope(this, &cond);
4789    svc(cond, imm);
4790  }
4791  void Svc(uint32_t imm) { Svc(al, imm); }
4792
4793  void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
4794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4796    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4797    VIXL_ASSERT(allow_macro_instructions_);
4798    VIXL_ASSERT(OutsideITBlock());
4799    MacroEmissionCheckScope guard(this);
4800    ITScope it_scope(this, &cond);
4801    sxtab(cond, rd, rn, operand);
4802  }
4803  void Sxtab(Register rd, Register rn, const Operand& operand) {
4804    Sxtab(al, rd, rn, operand);
4805  }
4806
4807  void Sxtab16(Condition cond,
4808               Register rd,
4809               Register rn,
4810               const Operand& operand) {
4811    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4813    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4814    VIXL_ASSERT(allow_macro_instructions_);
4815    VIXL_ASSERT(OutsideITBlock());
4816    MacroEmissionCheckScope guard(this);
4817    ITScope it_scope(this, &cond);
4818    sxtab16(cond, rd, rn, operand);
4819  }
4820  void Sxtab16(Register rd, Register rn, const Operand& operand) {
4821    Sxtab16(al, rd, rn, operand);
4822  }
4823
4824  void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
4825    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4826    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4827    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4828    VIXL_ASSERT(allow_macro_instructions_);
4829    VIXL_ASSERT(OutsideITBlock());
4830    MacroEmissionCheckScope guard(this);
4831    ITScope it_scope(this, &cond);
4832    sxtah(cond, rd, rn, operand);
4833  }
4834  void Sxtah(Register rd, Register rn, const Operand& operand) {
4835    Sxtah(al, rd, rn, operand);
4836  }
4837
4838  void Sxtb(Condition cond, Register rd, const Operand& operand) {
4839    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4840    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4841    VIXL_ASSERT(allow_macro_instructions_);
4842    VIXL_ASSERT(OutsideITBlock());
4843    MacroEmissionCheckScope guard(this);
4844    ITScope it_scope(this, &cond);
4845    sxtb(cond, rd, operand);
4846  }
4847  void Sxtb(Register rd, const Operand& operand) { Sxtb(al, rd, operand); }
4848
4849  void Sxtb16(Condition cond, Register rd, const Operand& operand) {
4850    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4851    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4852    VIXL_ASSERT(allow_macro_instructions_);
4853    VIXL_ASSERT(OutsideITBlock());
4854    MacroEmissionCheckScope guard(this);
4855    ITScope it_scope(this, &cond);
4856    sxtb16(cond, rd, operand);
4857  }
4858  void Sxtb16(Register rd, const Operand& operand) { Sxtb16(al, rd, operand); }
4859
4860  void Sxth(Condition cond, Register rd, const Operand& operand) {
4861    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4862    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4863    VIXL_ASSERT(allow_macro_instructions_);
4864    VIXL_ASSERT(OutsideITBlock());
4865    MacroEmissionCheckScope guard(this);
4866    ITScope it_scope(this, &cond);
4867    sxth(cond, rd, operand);
4868  }
4869  void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); }
4870
4871  void Teq(Condition cond, Register rn, const Operand& operand) {
4872    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4873    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4874    VIXL_ASSERT(allow_macro_instructions_);
4875    VIXL_ASSERT(OutsideITBlock());
4876    MacroEmissionCheckScope guard(this);
4877    ITScope it_scope(this, &cond);
4878    teq(cond, rn, operand);
4879  }
4880  void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); }
4881
4882  void Tst(Condition cond, Register rn, const Operand& operand) {
4883    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4884    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4885    VIXL_ASSERT(allow_macro_instructions_);
4886    VIXL_ASSERT(OutsideITBlock());
4887    MacroEmissionCheckScope guard(this);
4888    bool can_use_it =
4889        // TST{<c>}{<q>} <Rn>, <Rm> ; T1
4890        operand.IsPlainRegister() && rn.IsLow() &&
4891        operand.GetBaseRegister().IsLow();
4892    ITScope it_scope(this, &cond, can_use_it);
4893    tst(cond, rn, operand);
4894  }
4895  void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); }
4896
4897  void Uadd16(Condition cond, Register rd, Register rn, Register rm) {
4898    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4899    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4900    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4901    VIXL_ASSERT(allow_macro_instructions_);
4902    VIXL_ASSERT(OutsideITBlock());
4903    MacroEmissionCheckScope guard(this);
4904    ITScope it_scope(this, &cond);
4905    uadd16(cond, rd, rn, rm);
4906  }
4907  void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); }
4908
4909  void Uadd8(Condition cond, Register rd, Register rn, Register rm) {
4910    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4911    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4912    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4913    VIXL_ASSERT(allow_macro_instructions_);
4914    VIXL_ASSERT(OutsideITBlock());
4915    MacroEmissionCheckScope guard(this);
4916    ITScope it_scope(this, &cond);
4917    uadd8(cond, rd, rn, rm);
4918  }
4919  void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); }
4920
4921  void Uasx(Condition cond, Register rd, Register rn, Register rm) {
4922    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4923    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4924    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4925    VIXL_ASSERT(allow_macro_instructions_);
4926    VIXL_ASSERT(OutsideITBlock());
4927    MacroEmissionCheckScope guard(this);
4928    ITScope it_scope(this, &cond);
4929    uasx(cond, rd, rn, rm);
4930  }
4931  void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); }
4932
4933  void Ubfx(Condition cond,
4934            Register rd,
4935            Register rn,
4936            uint32_t lsb,
4937            const Operand& operand) {
4938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4940    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4941    VIXL_ASSERT(allow_macro_instructions_);
4942    VIXL_ASSERT(OutsideITBlock());
4943    MacroEmissionCheckScope guard(this);
4944    ITScope it_scope(this, &cond);
4945    ubfx(cond, rd, rn, lsb, operand);
4946  }
4947  void Ubfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
4948    Ubfx(al, rd, rn, lsb, operand);
4949  }
4950
4951  void Udf(Condition cond, uint32_t imm) {
4952    VIXL_ASSERT(allow_macro_instructions_);
4953    VIXL_ASSERT(OutsideITBlock());
4954    MacroEmissionCheckScope guard(this);
4955    ITScope it_scope(this, &cond);
4956    udf(cond, imm);
4957  }
4958  void Udf(uint32_t imm) { Udf(al, imm); }
4959
4960  void Udiv(Condition cond, Register rd, Register rn, Register rm) {
4961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4962    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4963    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4964    VIXL_ASSERT(allow_macro_instructions_);
4965    VIXL_ASSERT(OutsideITBlock());
4966    MacroEmissionCheckScope guard(this);
4967    ITScope it_scope(this, &cond);
4968    udiv(cond, rd, rn, rm);
4969  }
4970  void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); }
4971
4972  void Uhadd16(Condition cond, Register rd, Register rn, Register rm) {
4973    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4976    VIXL_ASSERT(allow_macro_instructions_);
4977    VIXL_ASSERT(OutsideITBlock());
4978    MacroEmissionCheckScope guard(this);
4979    ITScope it_scope(this, &cond);
4980    uhadd16(cond, rd, rn, rm);
4981  }
4982  void Uhadd16(Register rd, Register rn, Register rm) {
4983    Uhadd16(al, rd, rn, rm);
4984  }
4985
4986  void Uhadd8(Condition cond, Register rd, Register rn, Register rm) {
4987    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4988    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4989    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4990    VIXL_ASSERT(allow_macro_instructions_);
4991    VIXL_ASSERT(OutsideITBlock());
4992    MacroEmissionCheckScope guard(this);
4993    ITScope it_scope(this, &cond);
4994    uhadd8(cond, rd, rn, rm);
4995  }
4996  void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); }
4997
4998  void Uhasx(Condition cond, Register rd, Register rn, Register rm) {
4999    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5000    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5001    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5002    VIXL_ASSERT(allow_macro_instructions_);
5003    VIXL_ASSERT(OutsideITBlock());
5004    MacroEmissionCheckScope guard(this);
5005    ITScope it_scope(this, &cond);
5006    uhasx(cond, rd, rn, rm);
5007  }
5008  void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); }
5009
5010  void Uhsax(Condition cond, Register rd, Register rn, Register rm) {
5011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5012    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5013    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5014    VIXL_ASSERT(allow_macro_instructions_);
5015    VIXL_ASSERT(OutsideITBlock());
5016    MacroEmissionCheckScope guard(this);
5017    ITScope it_scope(this, &cond);
5018    uhsax(cond, rd, rn, rm);
5019  }
5020  void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); }
5021
5022  void Uhsub16(Condition cond, Register rd, Register rn, Register rm) {
5023    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5024    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5025    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5026    VIXL_ASSERT(allow_macro_instructions_);
5027    VIXL_ASSERT(OutsideITBlock());
5028    MacroEmissionCheckScope guard(this);
5029    ITScope it_scope(this, &cond);
5030    uhsub16(cond, rd, rn, rm);
5031  }
5032  void Uhsub16(Register rd, Register rn, Register rm) {
5033    Uhsub16(al, rd, rn, rm);
5034  }
5035
5036  void Uhsub8(Condition cond, Register rd, Register rn, Register rm) {
5037    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5038    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5039    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5040    VIXL_ASSERT(allow_macro_instructions_);
5041    VIXL_ASSERT(OutsideITBlock());
5042    MacroEmissionCheckScope guard(this);
5043    ITScope it_scope(this, &cond);
5044    uhsub8(cond, rd, rn, rm);
5045  }
5046  void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); }
5047
5048  void Umaal(
5049      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5050    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5051    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5052    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5053    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5054    VIXL_ASSERT(allow_macro_instructions_);
5055    VIXL_ASSERT(OutsideITBlock());
5056    MacroEmissionCheckScope guard(this);
5057    ITScope it_scope(this, &cond);
5058    umaal(cond, rdlo, rdhi, rn, rm);
5059  }
5060  void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
5061    Umaal(al, rdlo, rdhi, rn, rm);
5062  }
5063
5064  void Umlal(
5065      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5066    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5067    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5068    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5070    VIXL_ASSERT(allow_macro_instructions_);
5071    VIXL_ASSERT(OutsideITBlock());
5072    MacroEmissionCheckScope guard(this);
5073    ITScope it_scope(this, &cond);
5074    umlal(cond, rdlo, rdhi, rn, rm);
5075  }
5076  void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
5077    Umlal(al, rdlo, rdhi, rn, rm);
5078  }
5079  void Umlal(FlagsUpdate flags,
5080             Condition cond,
5081             Register rdlo,
5082             Register rdhi,
5083             Register rn,
5084             Register rm) {
5085    switch (flags) {
5086      case LeaveFlags:
5087        Umlal(cond, rdlo, rdhi, rn, rm);
5088        break;
5089      case SetFlags:
5090        Umlals(cond, rdlo, rdhi, rn, rm);
5091        break;
5092      case DontCare:
5093        Umlal(cond, rdlo, rdhi, rn, rm);
5094        break;
5095    }
5096  }
5097  void Umlal(FlagsUpdate flags,
5098             Register rdlo,
5099             Register rdhi,
5100             Register rn,
5101             Register rm) {
5102    Umlal(flags, al, rdlo, rdhi, rn, rm);
5103  }
5104
5105  void Umlals(
5106      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5107    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5109    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5110    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5111    VIXL_ASSERT(allow_macro_instructions_);
5112    VIXL_ASSERT(OutsideITBlock());
5113    MacroEmissionCheckScope guard(this);
5114    ITScope it_scope(this, &cond);
5115    umlals(cond, rdlo, rdhi, rn, rm);
5116  }
5117  void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
5118    Umlals(al, rdlo, rdhi, rn, rm);
5119  }
5120
5121  void Umull(
5122      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5123    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5124    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5125    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5126    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5127    VIXL_ASSERT(allow_macro_instructions_);
5128    VIXL_ASSERT(OutsideITBlock());
5129    MacroEmissionCheckScope guard(this);
5130    ITScope it_scope(this, &cond);
5131    umull(cond, rdlo, rdhi, rn, rm);
5132  }
5133  void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
5134    Umull(al, rdlo, rdhi, rn, rm);
5135  }
5136  void Umull(FlagsUpdate flags,
5137             Condition cond,
5138             Register rdlo,
5139             Register rdhi,
5140             Register rn,
5141             Register rm) {
5142    switch (flags) {
5143      case LeaveFlags:
5144        Umull(cond, rdlo, rdhi, rn, rm);
5145        break;
5146      case SetFlags:
5147        Umulls(cond, rdlo, rdhi, rn, rm);
5148        break;
5149      case DontCare:
5150        Umull(cond, rdlo, rdhi, rn, rm);
5151        break;
5152    }
5153  }
5154  void Umull(FlagsUpdate flags,
5155             Register rdlo,
5156             Register rdhi,
5157             Register rn,
5158             Register rm) {
5159    Umull(flags, al, rdlo, rdhi, rn, rm);
5160  }
5161
5162  void Umulls(
5163      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5164    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5165    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5166    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5167    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5168    VIXL_ASSERT(allow_macro_instructions_);
5169    VIXL_ASSERT(OutsideITBlock());
5170    MacroEmissionCheckScope guard(this);
5171    ITScope it_scope(this, &cond);
5172    umulls(cond, rdlo, rdhi, rn, rm);
5173  }
5174  void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
5175    Umulls(al, rdlo, rdhi, rn, rm);
5176  }
5177
5178  void Uqadd16(Condition cond, Register rd, Register rn, Register rm) {
5179    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5180    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5181    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5182    VIXL_ASSERT(allow_macro_instructions_);
5183    VIXL_ASSERT(OutsideITBlock());
5184    MacroEmissionCheckScope guard(this);
5185    ITScope it_scope(this, &cond);
5186    uqadd16(cond, rd, rn, rm);
5187  }
5188  void Uqadd16(Register rd, Register rn, Register rm) {
5189    Uqadd16(al, rd, rn, rm);
5190  }
5191
5192  void Uqadd8(Condition cond, Register rd, Register rn, Register rm) {
5193    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5194    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5196    VIXL_ASSERT(allow_macro_instructions_);
5197    VIXL_ASSERT(OutsideITBlock());
5198    MacroEmissionCheckScope guard(this);
5199    ITScope it_scope(this, &cond);
5200    uqadd8(cond, rd, rn, rm);
5201  }
5202  void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); }
5203
5204  void Uqasx(Condition cond, Register rd, Register rn, Register rm) {
5205    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5206    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5208    VIXL_ASSERT(allow_macro_instructions_);
5209    VIXL_ASSERT(OutsideITBlock());
5210    MacroEmissionCheckScope guard(this);
5211    ITScope it_scope(this, &cond);
5212    uqasx(cond, rd, rn, rm);
5213  }
5214  void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); }
5215
5216  void Uqsax(Condition cond, Register rd, Register rn, Register rm) {
5217    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5218    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5219    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5220    VIXL_ASSERT(allow_macro_instructions_);
5221    VIXL_ASSERT(OutsideITBlock());
5222    MacroEmissionCheckScope guard(this);
5223    ITScope it_scope(this, &cond);
5224    uqsax(cond, rd, rn, rm);
5225  }
5226  void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); }
5227
5228  void Uqsub16(Condition cond, Register rd, Register rn, Register rm) {
5229    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5230    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5231    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5232    VIXL_ASSERT(allow_macro_instructions_);
5233    VIXL_ASSERT(OutsideITBlock());
5234    MacroEmissionCheckScope guard(this);
5235    ITScope it_scope(this, &cond);
5236    uqsub16(cond, rd, rn, rm);
5237  }
5238  void Uqsub16(Register rd, Register rn, Register rm) {
5239    Uqsub16(al, rd, rn, rm);
5240  }
5241
5242  void Uqsub8(Condition cond, Register rd, Register rn, Register rm) {
5243    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5244    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5245    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5246    VIXL_ASSERT(allow_macro_instructions_);
5247    VIXL_ASSERT(OutsideITBlock());
5248    MacroEmissionCheckScope guard(this);
5249    ITScope it_scope(this, &cond);
5250    uqsub8(cond, rd, rn, rm);
5251  }
5252  void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); }
5253
5254  void Usad8(Condition cond, Register rd, Register rn, Register rm) {
5255    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5256    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5257    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5258    VIXL_ASSERT(allow_macro_instructions_);
5259    VIXL_ASSERT(OutsideITBlock());
5260    MacroEmissionCheckScope guard(this);
5261    ITScope it_scope(this, &cond);
5262    usad8(cond, rd, rn, rm);
5263  }
5264  void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); }
5265
5266  void Usada8(
5267      Condition cond, Register rd, Register rn, Register rm, Register ra) {
5268    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5269    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5270    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5271    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
5272    VIXL_ASSERT(allow_macro_instructions_);
5273    VIXL_ASSERT(OutsideITBlock());
5274    MacroEmissionCheckScope guard(this);
5275    ITScope it_scope(this, &cond);
5276    usada8(cond, rd, rn, rm, ra);
5277  }
5278  void Usada8(Register rd, Register rn, Register rm, Register ra) {
5279    Usada8(al, rd, rn, rm, ra);
5280  }
5281
5282  void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
5283    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5284    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5285    VIXL_ASSERT(allow_macro_instructions_);
5286    VIXL_ASSERT(OutsideITBlock());
5287    MacroEmissionCheckScope guard(this);
5288    ITScope it_scope(this, &cond);
5289    usat(cond, rd, imm, operand);
5290  }
5291  void Usat(Register rd, uint32_t imm, const Operand& operand) {
5292    Usat(al, rd, imm, operand);
5293  }
5294
5295  void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) {
5296    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5297    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5298    VIXL_ASSERT(allow_macro_instructions_);
5299    VIXL_ASSERT(OutsideITBlock());
5300    MacroEmissionCheckScope guard(this);
5301    ITScope it_scope(this, &cond);
5302    usat16(cond, rd, imm, rn);
5303  }
5304  void Usat16(Register rd, uint32_t imm, Register rn) {
5305    Usat16(al, rd, imm, rn);
5306  }
5307
5308  void Usax(Condition cond, Register rd, Register rn, Register rm) {
5309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5311    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5312    VIXL_ASSERT(allow_macro_instructions_);
5313    VIXL_ASSERT(OutsideITBlock());
5314    MacroEmissionCheckScope guard(this);
5315    ITScope it_scope(this, &cond);
5316    usax(cond, rd, rn, rm);
5317  }
5318  void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); }
5319
5320  void Usub16(Condition cond, Register rd, Register rn, Register rm) {
5321    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5322    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5323    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5324    VIXL_ASSERT(allow_macro_instructions_);
5325    VIXL_ASSERT(OutsideITBlock());
5326    MacroEmissionCheckScope guard(this);
5327    ITScope it_scope(this, &cond);
5328    usub16(cond, rd, rn, rm);
5329  }
5330  void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); }
5331
5332  void Usub8(Condition cond, Register rd, Register rn, Register rm) {
5333    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5334    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5335    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5336    VIXL_ASSERT(allow_macro_instructions_);
5337    VIXL_ASSERT(OutsideITBlock());
5338    MacroEmissionCheckScope guard(this);
5339    ITScope it_scope(this, &cond);
5340    usub8(cond, rd, rn, rm);
5341  }
5342  void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); }
5343
5344  void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
5345    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5346    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5347    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5348    VIXL_ASSERT(allow_macro_instructions_);
5349    VIXL_ASSERT(OutsideITBlock());
5350    MacroEmissionCheckScope guard(this);
5351    ITScope it_scope(this, &cond);
5352    uxtab(cond, rd, rn, operand);
5353  }
5354  void Uxtab(Register rd, Register rn, const Operand& operand) {
5355    Uxtab(al, rd, rn, operand);
5356  }
5357
5358  void Uxtab16(Condition cond,
5359               Register rd,
5360               Register rn,
5361               const Operand& operand) {
5362    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5363    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5364    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5365    VIXL_ASSERT(allow_macro_instructions_);
5366    VIXL_ASSERT(OutsideITBlock());
5367    MacroEmissionCheckScope guard(this);
5368    ITScope it_scope(this, &cond);
5369    uxtab16(cond, rd, rn, operand);
5370  }
5371  void Uxtab16(Register rd, Register rn, const Operand& operand) {
5372    Uxtab16(al, rd, rn, operand);
5373  }
5374
5375  void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
5376    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5377    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5378    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5379    VIXL_ASSERT(allow_macro_instructions_);
5380    VIXL_ASSERT(OutsideITBlock());
5381    MacroEmissionCheckScope guard(this);
5382    ITScope it_scope(this, &cond);
5383    uxtah(cond, rd, rn, operand);
5384  }
5385  void Uxtah(Register rd, Register rn, const Operand& operand) {
5386    Uxtah(al, rd, rn, operand);
5387  }
5388
5389  void Uxtb(Condition cond, Register rd, const Operand& operand) {
5390    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5391    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5392    VIXL_ASSERT(allow_macro_instructions_);
5393    VIXL_ASSERT(OutsideITBlock());
5394    MacroEmissionCheckScope guard(this);
5395    ITScope it_scope(this, &cond);
5396    uxtb(cond, rd, operand);
5397  }
5398  void Uxtb(Register rd, const Operand& operand) { Uxtb(al, rd, operand); }
5399
5400  void Uxtb16(Condition cond, Register rd, const Operand& operand) {
5401    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5402    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5403    VIXL_ASSERT(allow_macro_instructions_);
5404    VIXL_ASSERT(OutsideITBlock());
5405    MacroEmissionCheckScope guard(this);
5406    ITScope it_scope(this, &cond);
5407    uxtb16(cond, rd, operand);
5408  }
5409  void Uxtb16(Register rd, const Operand& operand) { Uxtb16(al, rd, operand); }
5410
5411  void Uxth(Condition cond, Register rd, const Operand& operand) {
5412    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5413    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5414    VIXL_ASSERT(allow_macro_instructions_);
5415    VIXL_ASSERT(OutsideITBlock());
5416    MacroEmissionCheckScope guard(this);
5417    ITScope it_scope(this, &cond);
5418    uxth(cond, rd, operand);
5419  }
5420  void Uxth(Register rd, const Operand& operand) { Uxth(al, rd, operand); }
5421
5422  void Vaba(
5423      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5427    VIXL_ASSERT(allow_macro_instructions_);
5428    VIXL_ASSERT(OutsideITBlock());
5429    MacroEmissionCheckScope guard(this);
5430    ITScope it_scope(this, &cond);
5431    vaba(cond, dt, rd, rn, rm);
5432  }
5433  void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5434    Vaba(al, dt, rd, rn, rm);
5435  }
5436
5437  void Vaba(
5438      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5441    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5442    VIXL_ASSERT(allow_macro_instructions_);
5443    VIXL_ASSERT(OutsideITBlock());
5444    MacroEmissionCheckScope guard(this);
5445    ITScope it_scope(this, &cond);
5446    vaba(cond, dt, rd, rn, rm);
5447  }
5448  void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5449    Vaba(al, dt, rd, rn, rm);
5450  }
5451
5452  void Vabal(
5453      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5454    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5455    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5456    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5457    VIXL_ASSERT(allow_macro_instructions_);
5458    VIXL_ASSERT(OutsideITBlock());
5459    MacroEmissionCheckScope guard(this);
5460    ITScope it_scope(this, &cond);
5461    vabal(cond, dt, rd, rn, rm);
5462  }
5463  void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5464    Vabal(al, dt, rd, rn, rm);
5465  }
5466
5467  void Vabd(
5468      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5469    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5470    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5471    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5472    VIXL_ASSERT(allow_macro_instructions_);
5473    VIXL_ASSERT(OutsideITBlock());
5474    MacroEmissionCheckScope guard(this);
5475    ITScope it_scope(this, &cond);
5476    vabd(cond, dt, rd, rn, rm);
5477  }
5478  void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5479    Vabd(al, dt, rd, rn, rm);
5480  }
5481
5482  void Vabd(
5483      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5484    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5485    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5486    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5487    VIXL_ASSERT(allow_macro_instructions_);
5488    VIXL_ASSERT(OutsideITBlock());
5489    MacroEmissionCheckScope guard(this);
5490    ITScope it_scope(this, &cond);
5491    vabd(cond, dt, rd, rn, rm);
5492  }
5493  void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5494    Vabd(al, dt, rd, rn, rm);
5495  }
5496
5497  void Vabdl(
5498      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5501    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5502    VIXL_ASSERT(allow_macro_instructions_);
5503    VIXL_ASSERT(OutsideITBlock());
5504    MacroEmissionCheckScope guard(this);
5505    ITScope it_scope(this, &cond);
5506    vabdl(cond, dt, rd, rn, rm);
5507  }
5508  void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5509    Vabdl(al, dt, rd, rn, rm);
5510  }
5511
5512  void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
5513    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5514    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5515    VIXL_ASSERT(allow_macro_instructions_);
5516    VIXL_ASSERT(OutsideITBlock());
5517    MacroEmissionCheckScope guard(this);
5518    ITScope it_scope(this, &cond);
5519    vabs(cond, dt, rd, rm);
5520  }
5521  void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); }
5522
5523  void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
5524    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5525    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5526    VIXL_ASSERT(allow_macro_instructions_);
5527    VIXL_ASSERT(OutsideITBlock());
5528    MacroEmissionCheckScope guard(this);
5529    ITScope it_scope(this, &cond);
5530    vabs(cond, dt, rd, rm);
5531  }
5532  void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); }
5533
5534  void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) {
5535    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5536    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5537    VIXL_ASSERT(allow_macro_instructions_);
5538    VIXL_ASSERT(OutsideITBlock());
5539    MacroEmissionCheckScope guard(this);
5540    ITScope it_scope(this, &cond);
5541    vabs(cond, dt, rd, rm);
5542  }
5543  void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); }
5544
5545  void Vacge(
5546      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5547    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5548    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5549    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5550    VIXL_ASSERT(allow_macro_instructions_);
5551    VIXL_ASSERT(OutsideITBlock());
5552    MacroEmissionCheckScope guard(this);
5553    ITScope it_scope(this, &cond);
5554    vacge(cond, dt, rd, rn, rm);
5555  }
5556  void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5557    Vacge(al, dt, rd, rn, rm);
5558  }
5559
5560  void Vacge(
5561      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5562    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5563    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5564    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5565    VIXL_ASSERT(allow_macro_instructions_);
5566    VIXL_ASSERT(OutsideITBlock());
5567    MacroEmissionCheckScope guard(this);
5568    ITScope it_scope(this, &cond);
5569    vacge(cond, dt, rd, rn, rm);
5570  }
5571  void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5572    Vacge(al, dt, rd, rn, rm);
5573  }
5574
5575  void Vacgt(
5576      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5577    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5578    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5580    VIXL_ASSERT(allow_macro_instructions_);
5581    VIXL_ASSERT(OutsideITBlock());
5582    MacroEmissionCheckScope guard(this);
5583    ITScope it_scope(this, &cond);
5584    vacgt(cond, dt, rd, rn, rm);
5585  }
5586  void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5587    Vacgt(al, dt, rd, rn, rm);
5588  }
5589
5590  void Vacgt(
5591      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5592    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5593    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5594    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5595    VIXL_ASSERT(allow_macro_instructions_);
5596    VIXL_ASSERT(OutsideITBlock());
5597    MacroEmissionCheckScope guard(this);
5598    ITScope it_scope(this, &cond);
5599    vacgt(cond, dt, rd, rn, rm);
5600  }
5601  void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5602    Vacgt(al, dt, rd, rn, rm);
5603  }
5604
5605  void Vacle(
5606      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5607    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5608    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5609    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5610    VIXL_ASSERT(allow_macro_instructions_);
5611    VIXL_ASSERT(OutsideITBlock());
5612    MacroEmissionCheckScope guard(this);
5613    ITScope it_scope(this, &cond);
5614    vacle(cond, dt, rd, rn, rm);
5615  }
5616  void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5617    Vacle(al, dt, rd, rn, rm);
5618  }
5619
5620  void Vacle(
5621      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5622    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5623    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5624    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5625    VIXL_ASSERT(allow_macro_instructions_);
5626    VIXL_ASSERT(OutsideITBlock());
5627    MacroEmissionCheckScope guard(this);
5628    ITScope it_scope(this, &cond);
5629    vacle(cond, dt, rd, rn, rm);
5630  }
5631  void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5632    Vacle(al, dt, rd, rn, rm);
5633  }
5634
5635  void Vaclt(
5636      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5637    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5638    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5639    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5640    VIXL_ASSERT(allow_macro_instructions_);
5641    VIXL_ASSERT(OutsideITBlock());
5642    MacroEmissionCheckScope guard(this);
5643    ITScope it_scope(this, &cond);
5644    vaclt(cond, dt, rd, rn, rm);
5645  }
5646  void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5647    Vaclt(al, dt, rd, rn, rm);
5648  }
5649
5650  void Vaclt(
5651      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5652    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5655    VIXL_ASSERT(allow_macro_instructions_);
5656    VIXL_ASSERT(OutsideITBlock());
5657    MacroEmissionCheckScope guard(this);
5658    ITScope it_scope(this, &cond);
5659    vaclt(cond, dt, rd, rn, rm);
5660  }
5661  void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5662    Vaclt(al, dt, rd, rn, rm);
5663  }
5664
5665  void Vadd(
5666      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5670    VIXL_ASSERT(allow_macro_instructions_);
5671    VIXL_ASSERT(OutsideITBlock());
5672    MacroEmissionCheckScope guard(this);
5673    ITScope it_scope(this, &cond);
5674    vadd(cond, dt, rd, rn, rm);
5675  }
5676  void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5677    Vadd(al, dt, rd, rn, rm);
5678  }
5679
5680  void Vadd(
5681      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5685    VIXL_ASSERT(allow_macro_instructions_);
5686    VIXL_ASSERT(OutsideITBlock());
5687    MacroEmissionCheckScope guard(this);
5688    ITScope it_scope(this, &cond);
5689    vadd(cond, dt, rd, rn, rm);
5690  }
5691  void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5692    Vadd(al, dt, rd, rn, rm);
5693  }
5694
5695  void Vadd(
5696      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5700    VIXL_ASSERT(allow_macro_instructions_);
5701    VIXL_ASSERT(OutsideITBlock());
5702    MacroEmissionCheckScope guard(this);
5703    ITScope it_scope(this, &cond);
5704    vadd(cond, dt, rd, rn, rm);
5705  }
5706  void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5707    Vadd(al, dt, rd, rn, rm);
5708  }
5709
5710  void Vaddhn(
5711      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5712    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5713    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5715    VIXL_ASSERT(allow_macro_instructions_);
5716    VIXL_ASSERT(OutsideITBlock());
5717    MacroEmissionCheckScope guard(this);
5718    ITScope it_scope(this, &cond);
5719    vaddhn(cond, dt, rd, rn, rm);
5720  }
5721  void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5722    Vaddhn(al, dt, rd, rn, rm);
5723  }
5724
5725  void Vaddl(
5726      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5727    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5728    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5729    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5730    VIXL_ASSERT(allow_macro_instructions_);
5731    VIXL_ASSERT(OutsideITBlock());
5732    MacroEmissionCheckScope guard(this);
5733    ITScope it_scope(this, &cond);
5734    vaddl(cond, dt, rd, rn, rm);
5735  }
5736  void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5737    Vaddl(al, dt, rd, rn, rm);
5738  }
5739
5740  void Vaddw(
5741      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5742    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5743    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5744    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5745    VIXL_ASSERT(allow_macro_instructions_);
5746    VIXL_ASSERT(OutsideITBlock());
5747    MacroEmissionCheckScope guard(this);
5748    ITScope it_scope(this, &cond);
5749    vaddw(cond, dt, rd, rn, rm);
5750  }
5751  void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5752    Vaddw(al, dt, rd, rn, rm);
5753  }
5754
5755  void Vand(Condition cond,
5756            DataType dt,
5757            DRegister rd,
5758            DRegister rn,
5759            const DOperand& operand) {
5760    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5761    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5762    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5763    VIXL_ASSERT(allow_macro_instructions_);
5764    VIXL_ASSERT(OutsideITBlock());
5765    MacroEmissionCheckScope guard(this);
5766    ITScope it_scope(this, &cond);
5767    vand(cond, dt, rd, rn, operand);
5768  }
5769  void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5770    Vand(al, dt, rd, rn, operand);
5771  }
5772
5773  void Vand(Condition cond,
5774            DataType dt,
5775            QRegister rd,
5776            QRegister rn,
5777            const QOperand& operand) {
5778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5779    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5780    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5781    VIXL_ASSERT(allow_macro_instructions_);
5782    VIXL_ASSERT(OutsideITBlock());
5783    MacroEmissionCheckScope guard(this);
5784    ITScope it_scope(this, &cond);
5785    vand(cond, dt, rd, rn, operand);
5786  }
5787  void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5788    Vand(al, dt, rd, rn, operand);
5789  }
5790
5791  void Vbic(Condition cond,
5792            DataType dt,
5793            DRegister rd,
5794            DRegister rn,
5795            const DOperand& operand) {
5796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5798    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5799    VIXL_ASSERT(allow_macro_instructions_);
5800    VIXL_ASSERT(OutsideITBlock());
5801    MacroEmissionCheckScope guard(this);
5802    ITScope it_scope(this, &cond);
5803    vbic(cond, dt, rd, rn, operand);
5804  }
5805  void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5806    Vbic(al, dt, rd, rn, operand);
5807  }
5808
5809  void Vbic(Condition cond,
5810            DataType dt,
5811            QRegister rd,
5812            QRegister rn,
5813            const QOperand& operand) {
5814    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5815    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5816    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5817    VIXL_ASSERT(allow_macro_instructions_);
5818    VIXL_ASSERT(OutsideITBlock());
5819    MacroEmissionCheckScope guard(this);
5820    ITScope it_scope(this, &cond);
5821    vbic(cond, dt, rd, rn, operand);
5822  }
5823  void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5824    Vbic(al, dt, rd, rn, operand);
5825  }
5826
5827  void Vbif(
5828      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5829    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5830    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5831    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5832    VIXL_ASSERT(allow_macro_instructions_);
5833    VIXL_ASSERT(OutsideITBlock());
5834    MacroEmissionCheckScope guard(this);
5835    ITScope it_scope(this, &cond);
5836    vbif(cond, dt, rd, rn, rm);
5837  }
5838  void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5839    Vbif(al, dt, rd, rn, rm);
5840  }
5841  void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5842    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5843  }
5844  void Vbif(DRegister rd, DRegister rn, DRegister rm) {
5845    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5846  }
5847
5848  void Vbif(
5849      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5850    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5851    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5852    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5853    VIXL_ASSERT(allow_macro_instructions_);
5854    VIXL_ASSERT(OutsideITBlock());
5855    MacroEmissionCheckScope guard(this);
5856    ITScope it_scope(this, &cond);
5857    vbif(cond, dt, rd, rn, rm);
5858  }
5859  void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5860    Vbif(al, dt, rd, rn, rm);
5861  }
5862  void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5863    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5864  }
5865  void Vbif(QRegister rd, QRegister rn, QRegister rm) {
5866    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5867  }
5868
5869  void Vbit(
5870      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5871    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5872    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5873    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5874    VIXL_ASSERT(allow_macro_instructions_);
5875    VIXL_ASSERT(OutsideITBlock());
5876    MacroEmissionCheckScope guard(this);
5877    ITScope it_scope(this, &cond);
5878    vbit(cond, dt, rd, rn, rm);
5879  }
5880  void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5881    Vbit(al, dt, rd, rn, rm);
5882  }
5883  void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5884    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5885  }
5886  void Vbit(DRegister rd, DRegister rn, DRegister rm) {
5887    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5888  }
5889
5890  void Vbit(
5891      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5892    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5893    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5894    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5895    VIXL_ASSERT(allow_macro_instructions_);
5896    VIXL_ASSERT(OutsideITBlock());
5897    MacroEmissionCheckScope guard(this);
5898    ITScope it_scope(this, &cond);
5899    vbit(cond, dt, rd, rn, rm);
5900  }
5901  void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5902    Vbit(al, dt, rd, rn, rm);
5903  }
5904  void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5905    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5906  }
5907  void Vbit(QRegister rd, QRegister rn, QRegister rm) {
5908    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5909  }
5910
5911  void Vbsl(
5912      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5916    VIXL_ASSERT(allow_macro_instructions_);
5917    VIXL_ASSERT(OutsideITBlock());
5918    MacroEmissionCheckScope guard(this);
5919    ITScope it_scope(this, &cond);
5920    vbsl(cond, dt, rd, rn, rm);
5921  }
5922  void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5923    Vbsl(al, dt, rd, rn, rm);
5924  }
5925  void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5926    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5927  }
5928  void Vbsl(DRegister rd, DRegister rn, DRegister rm) {
5929    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5930  }
5931
5932  void Vbsl(
5933      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5934    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5935    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5936    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5937    VIXL_ASSERT(allow_macro_instructions_);
5938    VIXL_ASSERT(OutsideITBlock());
5939    MacroEmissionCheckScope guard(this);
5940    ITScope it_scope(this, &cond);
5941    vbsl(cond, dt, rd, rn, rm);
5942  }
5943  void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5944    Vbsl(al, dt, rd, rn, rm);
5945  }
5946  void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5947    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5948  }
5949  void Vbsl(QRegister rd, QRegister rn, QRegister rm) {
5950    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5951  }
5952
5953  void Vceq(Condition cond,
5954            DataType dt,
5955            DRegister rd,
5956            DRegister rm,
5957            const DOperand& operand) {
5958    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5959    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5960    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5961    VIXL_ASSERT(allow_macro_instructions_);
5962    VIXL_ASSERT(OutsideITBlock());
5963    MacroEmissionCheckScope guard(this);
5964    ITScope it_scope(this, &cond);
5965    vceq(cond, dt, rd, rm, operand);
5966  }
5967  void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5968    Vceq(al, dt, rd, rm, operand);
5969  }
5970
5971  void Vceq(Condition cond,
5972            DataType dt,
5973            QRegister rd,
5974            QRegister rm,
5975            const QOperand& operand) {
5976    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5977    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5978    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5979    VIXL_ASSERT(allow_macro_instructions_);
5980    VIXL_ASSERT(OutsideITBlock());
5981    MacroEmissionCheckScope guard(this);
5982    ITScope it_scope(this, &cond);
5983    vceq(cond, dt, rd, rm, operand);
5984  }
5985  void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5986    Vceq(al, dt, rd, rm, operand);
5987  }
5988
5989  void Vceq(
5990      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5991    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5992    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5993    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5994    VIXL_ASSERT(allow_macro_instructions_);
5995    VIXL_ASSERT(OutsideITBlock());
5996    MacroEmissionCheckScope guard(this);
5997    ITScope it_scope(this, &cond);
5998    vceq(cond, dt, rd, rn, rm);
5999  }
6000  void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6001    Vceq(al, dt, rd, rn, rm);
6002  }
6003
6004  void Vceq(
6005      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6006    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6007    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6008    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6009    VIXL_ASSERT(allow_macro_instructions_);
6010    VIXL_ASSERT(OutsideITBlock());
6011    MacroEmissionCheckScope guard(this);
6012    ITScope it_scope(this, &cond);
6013    vceq(cond, dt, rd, rn, rm);
6014  }
6015  void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6016    Vceq(al, dt, rd, rn, rm);
6017  }
6018
6019  void Vcge(Condition cond,
6020            DataType dt,
6021            DRegister rd,
6022            DRegister rm,
6023            const DOperand& operand) {
6024    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6025    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6026    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6027    VIXL_ASSERT(allow_macro_instructions_);
6028    VIXL_ASSERT(OutsideITBlock());
6029    MacroEmissionCheckScope guard(this);
6030    ITScope it_scope(this, &cond);
6031    vcge(cond, dt, rd, rm, operand);
6032  }
6033  void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6034    Vcge(al, dt, rd, rm, operand);
6035  }
6036
6037  void Vcge(Condition cond,
6038            DataType dt,
6039            QRegister rd,
6040            QRegister rm,
6041            const QOperand& operand) {
6042    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6043    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6044    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6045    VIXL_ASSERT(allow_macro_instructions_);
6046    VIXL_ASSERT(OutsideITBlock());
6047    MacroEmissionCheckScope guard(this);
6048    ITScope it_scope(this, &cond);
6049    vcge(cond, dt, rd, rm, operand);
6050  }
6051  void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6052    Vcge(al, dt, rd, rm, operand);
6053  }
6054
6055  void Vcge(
6056      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6057    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6058    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6059    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6060    VIXL_ASSERT(allow_macro_instructions_);
6061    VIXL_ASSERT(OutsideITBlock());
6062    MacroEmissionCheckScope guard(this);
6063    ITScope it_scope(this, &cond);
6064    vcge(cond, dt, rd, rn, rm);
6065  }
6066  void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6067    Vcge(al, dt, rd, rn, rm);
6068  }
6069
6070  void Vcge(
6071      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6072    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6073    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6074    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6075    VIXL_ASSERT(allow_macro_instructions_);
6076    VIXL_ASSERT(OutsideITBlock());
6077    MacroEmissionCheckScope guard(this);
6078    ITScope it_scope(this, &cond);
6079    vcge(cond, dt, rd, rn, rm);
6080  }
6081  void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6082    Vcge(al, dt, rd, rn, rm);
6083  }
6084
6085  void Vcgt(Condition cond,
6086            DataType dt,
6087            DRegister rd,
6088            DRegister rm,
6089            const DOperand& operand) {
6090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6092    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6093    VIXL_ASSERT(allow_macro_instructions_);
6094    VIXL_ASSERT(OutsideITBlock());
6095    MacroEmissionCheckScope guard(this);
6096    ITScope it_scope(this, &cond);
6097    vcgt(cond, dt, rd, rm, operand);
6098  }
6099  void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6100    Vcgt(al, dt, rd, rm, operand);
6101  }
6102
6103  void Vcgt(Condition cond,
6104            DataType dt,
6105            QRegister rd,
6106            QRegister rm,
6107            const QOperand& operand) {
6108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6109    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6110    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6111    VIXL_ASSERT(allow_macro_instructions_);
6112    VIXL_ASSERT(OutsideITBlock());
6113    MacroEmissionCheckScope guard(this);
6114    ITScope it_scope(this, &cond);
6115    vcgt(cond, dt, rd, rm, operand);
6116  }
6117  void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6118    Vcgt(al, dt, rd, rm, operand);
6119  }
6120
6121  void Vcgt(
6122      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6123    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6124    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6125    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6126    VIXL_ASSERT(allow_macro_instructions_);
6127    VIXL_ASSERT(OutsideITBlock());
6128    MacroEmissionCheckScope guard(this);
6129    ITScope it_scope(this, &cond);
6130    vcgt(cond, dt, rd, rn, rm);
6131  }
6132  void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6133    Vcgt(al, dt, rd, rn, rm);
6134  }
6135
6136  void Vcgt(
6137      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6138    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6139    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6140    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6141    VIXL_ASSERT(allow_macro_instructions_);
6142    VIXL_ASSERT(OutsideITBlock());
6143    MacroEmissionCheckScope guard(this);
6144    ITScope it_scope(this, &cond);
6145    vcgt(cond, dt, rd, rn, rm);
6146  }
6147  void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6148    Vcgt(al, dt, rd, rn, rm);
6149  }
6150
6151  void Vcle(Condition cond,
6152            DataType dt,
6153            DRegister rd,
6154            DRegister rm,
6155            const DOperand& operand) {
6156    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6158    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6159    VIXL_ASSERT(allow_macro_instructions_);
6160    VIXL_ASSERT(OutsideITBlock());
6161    MacroEmissionCheckScope guard(this);
6162    ITScope it_scope(this, &cond);
6163    vcle(cond, dt, rd, rm, operand);
6164  }
6165  void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6166    Vcle(al, dt, rd, rm, operand);
6167  }
6168
6169  void Vcle(Condition cond,
6170            DataType dt,
6171            QRegister rd,
6172            QRegister rm,
6173            const QOperand& operand) {
6174    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6175    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6176    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6177    VIXL_ASSERT(allow_macro_instructions_);
6178    VIXL_ASSERT(OutsideITBlock());
6179    MacroEmissionCheckScope guard(this);
6180    ITScope it_scope(this, &cond);
6181    vcle(cond, dt, rd, rm, operand);
6182  }
6183  void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6184    Vcle(al, dt, rd, rm, operand);
6185  }
6186
6187  void Vcle(
6188      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6189    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6190    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6191    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6192    VIXL_ASSERT(allow_macro_instructions_);
6193    VIXL_ASSERT(OutsideITBlock());
6194    MacroEmissionCheckScope guard(this);
6195    ITScope it_scope(this, &cond);
6196    vcle(cond, dt, rd, rn, rm);
6197  }
6198  void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6199    Vcle(al, dt, rd, rn, rm);
6200  }
6201
6202  void Vcle(
6203      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6204    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6205    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6206    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6207    VIXL_ASSERT(allow_macro_instructions_);
6208    VIXL_ASSERT(OutsideITBlock());
6209    MacroEmissionCheckScope guard(this);
6210    ITScope it_scope(this, &cond);
6211    vcle(cond, dt, rd, rn, rm);
6212  }
6213  void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6214    Vcle(al, dt, rd, rn, rm);
6215  }
6216
6217  void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6218    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6219    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6220    VIXL_ASSERT(allow_macro_instructions_);
6221    VIXL_ASSERT(OutsideITBlock());
6222    MacroEmissionCheckScope guard(this);
6223    ITScope it_scope(this, &cond);
6224    vcls(cond, dt, rd, rm);
6225  }
6226  void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); }
6227
6228  void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6229    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6230    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6231    VIXL_ASSERT(allow_macro_instructions_);
6232    VIXL_ASSERT(OutsideITBlock());
6233    MacroEmissionCheckScope guard(this);
6234    ITScope it_scope(this, &cond);
6235    vcls(cond, dt, rd, rm);
6236  }
6237  void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); }
6238
6239  void Vclt(Condition cond,
6240            DataType dt,
6241            DRegister rd,
6242            DRegister rm,
6243            const DOperand& operand) {
6244    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6245    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6246    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6247    VIXL_ASSERT(allow_macro_instructions_);
6248    VIXL_ASSERT(OutsideITBlock());
6249    MacroEmissionCheckScope guard(this);
6250    ITScope it_scope(this, &cond);
6251    vclt(cond, dt, rd, rm, operand);
6252  }
6253  void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6254    Vclt(al, dt, rd, rm, operand);
6255  }
6256
6257  void Vclt(Condition cond,
6258            DataType dt,
6259            QRegister rd,
6260            QRegister rm,
6261            const QOperand& operand) {
6262    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6263    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6264    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6265    VIXL_ASSERT(allow_macro_instructions_);
6266    VIXL_ASSERT(OutsideITBlock());
6267    MacroEmissionCheckScope guard(this);
6268    ITScope it_scope(this, &cond);
6269    vclt(cond, dt, rd, rm, operand);
6270  }
6271  void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6272    Vclt(al, dt, rd, rm, operand);
6273  }
6274
6275  void Vclt(
6276      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6277    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6278    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6279    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6280    VIXL_ASSERT(allow_macro_instructions_);
6281    VIXL_ASSERT(OutsideITBlock());
6282    MacroEmissionCheckScope guard(this);
6283    ITScope it_scope(this, &cond);
6284    vclt(cond, dt, rd, rn, rm);
6285  }
6286  void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6287    Vclt(al, dt, rd, rn, rm);
6288  }
6289
6290  void Vclt(
6291      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6292    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6293    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6294    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6295    VIXL_ASSERT(allow_macro_instructions_);
6296    VIXL_ASSERT(OutsideITBlock());
6297    MacroEmissionCheckScope guard(this);
6298    ITScope it_scope(this, &cond);
6299    vclt(cond, dt, rd, rn, rm);
6300  }
6301  void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6302    Vclt(al, dt, rd, rn, rm);
6303  }
6304
6305  void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6306    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6307    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6308    VIXL_ASSERT(allow_macro_instructions_);
6309    VIXL_ASSERT(OutsideITBlock());
6310    MacroEmissionCheckScope guard(this);
6311    ITScope it_scope(this, &cond);
6312    vclz(cond, dt, rd, rm);
6313  }
6314  void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); }
6315
6316  void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6317    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6318    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6319    VIXL_ASSERT(allow_macro_instructions_);
6320    VIXL_ASSERT(OutsideITBlock());
6321    MacroEmissionCheckScope guard(this);
6322    ITScope it_scope(this, &cond);
6323    vclz(cond, dt, rd, rm);
6324  }
6325  void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); }
6326
6327  void Vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6328    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6329    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6330    VIXL_ASSERT(allow_macro_instructions_);
6331    VIXL_ASSERT(OutsideITBlock());
6332    MacroEmissionCheckScope guard(this);
6333    ITScope it_scope(this, &cond);
6334    vcmp(cond, dt, rd, rm);
6335  }
6336  void Vcmp(DataType dt, SRegister rd, SRegister rm) { Vcmp(al, dt, rd, rm); }
6337
6338  void Vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6340    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6341    VIXL_ASSERT(allow_macro_instructions_);
6342    VIXL_ASSERT(OutsideITBlock());
6343    MacroEmissionCheckScope guard(this);
6344    ITScope it_scope(this, &cond);
6345    vcmp(cond, dt, rd, rm);
6346  }
6347  void Vcmp(DataType dt, DRegister rd, DRegister rm) { Vcmp(al, dt, rd, rm); }
6348
6349  void Vcmp(Condition cond, DataType dt, SRegister rd, double imm) {
6350    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6351    VIXL_ASSERT(allow_macro_instructions_);
6352    VIXL_ASSERT(OutsideITBlock());
6353    MacroEmissionCheckScope guard(this);
6354    ITScope it_scope(this, &cond);
6355    vcmp(cond, dt, rd, imm);
6356  }
6357  void Vcmp(DataType dt, SRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6358
6359  void Vcmp(Condition cond, DataType dt, DRegister rd, double imm) {
6360    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6361    VIXL_ASSERT(allow_macro_instructions_);
6362    VIXL_ASSERT(OutsideITBlock());
6363    MacroEmissionCheckScope guard(this);
6364    ITScope it_scope(this, &cond);
6365    vcmp(cond, dt, rd, imm);
6366  }
6367  void Vcmp(DataType dt, DRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6368
6369  void Vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6372    VIXL_ASSERT(allow_macro_instructions_);
6373    VIXL_ASSERT(OutsideITBlock());
6374    MacroEmissionCheckScope guard(this);
6375    ITScope it_scope(this, &cond);
6376    vcmpe(cond, dt, rd, rm);
6377  }
6378  void Vcmpe(DataType dt, SRegister rd, SRegister rm) { Vcmpe(al, dt, rd, rm); }
6379
6380  void Vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6381    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6382    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6383    VIXL_ASSERT(allow_macro_instructions_);
6384    VIXL_ASSERT(OutsideITBlock());
6385    MacroEmissionCheckScope guard(this);
6386    ITScope it_scope(this, &cond);
6387    vcmpe(cond, dt, rd, rm);
6388  }
6389  void Vcmpe(DataType dt, DRegister rd, DRegister rm) { Vcmpe(al, dt, rd, rm); }
6390
6391  void Vcmpe(Condition cond, DataType dt, SRegister rd, double imm) {
6392    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6393    VIXL_ASSERT(allow_macro_instructions_);
6394    VIXL_ASSERT(OutsideITBlock());
6395    MacroEmissionCheckScope guard(this);
6396    ITScope it_scope(this, &cond);
6397    vcmpe(cond, dt, rd, imm);
6398  }
6399  void Vcmpe(DataType dt, SRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6400
6401  void Vcmpe(Condition cond, DataType dt, DRegister rd, double imm) {
6402    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6403    VIXL_ASSERT(allow_macro_instructions_);
6404    VIXL_ASSERT(OutsideITBlock());
6405    MacroEmissionCheckScope guard(this);
6406    ITScope it_scope(this, &cond);
6407    vcmpe(cond, dt, rd, imm);
6408  }
6409  void Vcmpe(DataType dt, DRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6410
6411  void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6412    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6413    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6414    VIXL_ASSERT(allow_macro_instructions_);
6415    VIXL_ASSERT(OutsideITBlock());
6416    MacroEmissionCheckScope guard(this);
6417    ITScope it_scope(this, &cond);
6418    vcnt(cond, dt, rd, rm);
6419  }
6420  void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); }
6421
6422  void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6423    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6425    VIXL_ASSERT(allow_macro_instructions_);
6426    VIXL_ASSERT(OutsideITBlock());
6427    MacroEmissionCheckScope guard(this);
6428    ITScope it_scope(this, &cond);
6429    vcnt(cond, dt, rd, rm);
6430  }
6431  void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); }
6432
6433  void Vcvt(
6434      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6435    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6436    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6437    VIXL_ASSERT(allow_macro_instructions_);
6438    VIXL_ASSERT(OutsideITBlock());
6439    MacroEmissionCheckScope guard(this);
6440    ITScope it_scope(this, &cond);
6441    vcvt(cond, dt1, dt2, rd, rm);
6442  }
6443  void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6444    Vcvt(al, dt1, dt2, rd, rm);
6445  }
6446
6447  void Vcvt(
6448      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6450    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6451    VIXL_ASSERT(allow_macro_instructions_);
6452    VIXL_ASSERT(OutsideITBlock());
6453    MacroEmissionCheckScope guard(this);
6454    ITScope it_scope(this, &cond);
6455    vcvt(cond, dt1, dt2, rd, rm);
6456  }
6457  void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6458    Vcvt(al, dt1, dt2, rd, rm);
6459  }
6460
6461  void Vcvt(Condition cond,
6462            DataType dt1,
6463            DataType dt2,
6464            DRegister rd,
6465            DRegister rm,
6466            int32_t fbits) {
6467    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6468    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6469    VIXL_ASSERT(allow_macro_instructions_);
6470    VIXL_ASSERT(OutsideITBlock());
6471    MacroEmissionCheckScope guard(this);
6472    ITScope it_scope(this, &cond);
6473    vcvt(cond, dt1, dt2, rd, rm, fbits);
6474  }
6475  void Vcvt(
6476      DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) {
6477    Vcvt(al, dt1, dt2, rd, rm, fbits);
6478  }
6479
6480  void Vcvt(Condition cond,
6481            DataType dt1,
6482            DataType dt2,
6483            QRegister rd,
6484            QRegister rm,
6485            int32_t fbits) {
6486    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6488    VIXL_ASSERT(allow_macro_instructions_);
6489    VIXL_ASSERT(OutsideITBlock());
6490    MacroEmissionCheckScope guard(this);
6491    ITScope it_scope(this, &cond);
6492    vcvt(cond, dt1, dt2, rd, rm, fbits);
6493  }
6494  void Vcvt(
6495      DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) {
6496    Vcvt(al, dt1, dt2, rd, rm, fbits);
6497  }
6498
6499  void Vcvt(Condition cond,
6500            DataType dt1,
6501            DataType dt2,
6502            SRegister rd,
6503            SRegister rm,
6504            int32_t fbits) {
6505    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6506    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6507    VIXL_ASSERT(allow_macro_instructions_);
6508    VIXL_ASSERT(OutsideITBlock());
6509    MacroEmissionCheckScope guard(this);
6510    ITScope it_scope(this, &cond);
6511    vcvt(cond, dt1, dt2, rd, rm, fbits);
6512  }
6513  void Vcvt(
6514      DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) {
6515    Vcvt(al, dt1, dt2, rd, rm, fbits);
6516  }
6517
6518  void Vcvt(
6519      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6520    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6521    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6522    VIXL_ASSERT(allow_macro_instructions_);
6523    VIXL_ASSERT(OutsideITBlock());
6524    MacroEmissionCheckScope guard(this);
6525    ITScope it_scope(this, &cond);
6526    vcvt(cond, dt1, dt2, rd, rm);
6527  }
6528  void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6529    Vcvt(al, dt1, dt2, rd, rm);
6530  }
6531
6532  void Vcvt(
6533      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6534    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6535    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6536    VIXL_ASSERT(allow_macro_instructions_);
6537    VIXL_ASSERT(OutsideITBlock());
6538    MacroEmissionCheckScope guard(this);
6539    ITScope it_scope(this, &cond);
6540    vcvt(cond, dt1, dt2, rd, rm);
6541  }
6542  void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6543    Vcvt(al, dt1, dt2, rd, rm);
6544  }
6545
6546  void Vcvt(
6547      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6548    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6549    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6550    VIXL_ASSERT(allow_macro_instructions_);
6551    VIXL_ASSERT(OutsideITBlock());
6552    MacroEmissionCheckScope guard(this);
6553    ITScope it_scope(this, &cond);
6554    vcvt(cond, dt1, dt2, rd, rm);
6555  }
6556  void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6557    Vcvt(al, dt1, dt2, rd, rm);
6558  }
6559
6560  void Vcvt(
6561      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6562    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6563    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6564    VIXL_ASSERT(allow_macro_instructions_);
6565    VIXL_ASSERT(OutsideITBlock());
6566    MacroEmissionCheckScope guard(this);
6567    ITScope it_scope(this, &cond);
6568    vcvt(cond, dt1, dt2, rd, rm);
6569  }
6570  void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6571    Vcvt(al, dt1, dt2, rd, rm);
6572  }
6573
6574  void Vcvt(
6575      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6576    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6577    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6578    VIXL_ASSERT(allow_macro_instructions_);
6579    VIXL_ASSERT(OutsideITBlock());
6580    MacroEmissionCheckScope guard(this);
6581    ITScope it_scope(this, &cond);
6582    vcvt(cond, dt1, dt2, rd, rm);
6583  }
6584  void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6585    Vcvt(al, dt1, dt2, rd, rm);
6586  }
6587
6588  void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6589    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6590    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6591    VIXL_ASSERT(allow_macro_instructions_);
6592    VIXL_ASSERT(OutsideITBlock());
6593    MacroEmissionCheckScope guard(this);
6594    vcvta(dt1, dt2, rd, rm);
6595  }
6596
6597  void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6599    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6600    VIXL_ASSERT(allow_macro_instructions_);
6601    VIXL_ASSERT(OutsideITBlock());
6602    MacroEmissionCheckScope guard(this);
6603    vcvta(dt1, dt2, rd, rm);
6604  }
6605
6606  void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6607    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6608    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6609    VIXL_ASSERT(allow_macro_instructions_);
6610    VIXL_ASSERT(OutsideITBlock());
6611    MacroEmissionCheckScope guard(this);
6612    vcvta(dt1, dt2, rd, rm);
6613  }
6614
6615  void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6617    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6618    VIXL_ASSERT(allow_macro_instructions_);
6619    VIXL_ASSERT(OutsideITBlock());
6620    MacroEmissionCheckScope guard(this);
6621    vcvta(dt1, dt2, rd, rm);
6622  }
6623
6624  void Vcvtb(
6625      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6626    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6627    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6628    VIXL_ASSERT(allow_macro_instructions_);
6629    VIXL_ASSERT(OutsideITBlock());
6630    MacroEmissionCheckScope guard(this);
6631    ITScope it_scope(this, &cond);
6632    vcvtb(cond, dt1, dt2, rd, rm);
6633  }
6634  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6635    Vcvtb(al, dt1, dt2, rd, rm);
6636  }
6637
6638  void Vcvtb(
6639      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6640    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6641    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6642    VIXL_ASSERT(allow_macro_instructions_);
6643    VIXL_ASSERT(OutsideITBlock());
6644    MacroEmissionCheckScope guard(this);
6645    ITScope it_scope(this, &cond);
6646    vcvtb(cond, dt1, dt2, rd, rm);
6647  }
6648  void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6649    Vcvtb(al, dt1, dt2, rd, rm);
6650  }
6651
6652  void Vcvtb(
6653      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6655    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6656    VIXL_ASSERT(allow_macro_instructions_);
6657    VIXL_ASSERT(OutsideITBlock());
6658    MacroEmissionCheckScope guard(this);
6659    ITScope it_scope(this, &cond);
6660    vcvtb(cond, dt1, dt2, rd, rm);
6661  }
6662  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6663    Vcvtb(al, dt1, dt2, rd, rm);
6664  }
6665
6666  void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6669    VIXL_ASSERT(allow_macro_instructions_);
6670    VIXL_ASSERT(OutsideITBlock());
6671    MacroEmissionCheckScope guard(this);
6672    vcvtm(dt1, dt2, rd, rm);
6673  }
6674
6675  void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6678    VIXL_ASSERT(allow_macro_instructions_);
6679    VIXL_ASSERT(OutsideITBlock());
6680    MacroEmissionCheckScope guard(this);
6681    vcvtm(dt1, dt2, rd, rm);
6682  }
6683
6684  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6686    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6687    VIXL_ASSERT(allow_macro_instructions_);
6688    VIXL_ASSERT(OutsideITBlock());
6689    MacroEmissionCheckScope guard(this);
6690    vcvtm(dt1, dt2, rd, rm);
6691  }
6692
6693  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6694    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6695    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6696    VIXL_ASSERT(allow_macro_instructions_);
6697    VIXL_ASSERT(OutsideITBlock());
6698    MacroEmissionCheckScope guard(this);
6699    vcvtm(dt1, dt2, rd, rm);
6700  }
6701
6702  void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6703    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6704    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6705    VIXL_ASSERT(allow_macro_instructions_);
6706    VIXL_ASSERT(OutsideITBlock());
6707    MacroEmissionCheckScope guard(this);
6708    vcvtn(dt1, dt2, rd, rm);
6709  }
6710
6711  void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6712    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6713    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6714    VIXL_ASSERT(allow_macro_instructions_);
6715    VIXL_ASSERT(OutsideITBlock());
6716    MacroEmissionCheckScope guard(this);
6717    vcvtn(dt1, dt2, rd, rm);
6718  }
6719
6720  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6721    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6722    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6723    VIXL_ASSERT(allow_macro_instructions_);
6724    VIXL_ASSERT(OutsideITBlock());
6725    MacroEmissionCheckScope guard(this);
6726    vcvtn(dt1, dt2, rd, rm);
6727  }
6728
6729  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6732    VIXL_ASSERT(allow_macro_instructions_);
6733    VIXL_ASSERT(OutsideITBlock());
6734    MacroEmissionCheckScope guard(this);
6735    vcvtn(dt1, dt2, rd, rm);
6736  }
6737
6738  void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6739    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6740    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6741    VIXL_ASSERT(allow_macro_instructions_);
6742    VIXL_ASSERT(OutsideITBlock());
6743    MacroEmissionCheckScope guard(this);
6744    vcvtp(dt1, dt2, rd, rm);
6745  }
6746
6747  void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6748    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6749    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6750    VIXL_ASSERT(allow_macro_instructions_);
6751    VIXL_ASSERT(OutsideITBlock());
6752    MacroEmissionCheckScope guard(this);
6753    vcvtp(dt1, dt2, rd, rm);
6754  }
6755
6756  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6757    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6758    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6759    VIXL_ASSERT(allow_macro_instructions_);
6760    VIXL_ASSERT(OutsideITBlock());
6761    MacroEmissionCheckScope guard(this);
6762    vcvtp(dt1, dt2, rd, rm);
6763  }
6764
6765  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6766    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6767    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6768    VIXL_ASSERT(allow_macro_instructions_);
6769    VIXL_ASSERT(OutsideITBlock());
6770    MacroEmissionCheckScope guard(this);
6771    vcvtp(dt1, dt2, rd, rm);
6772  }
6773
6774  void Vcvtr(
6775      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6776    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6777    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6778    VIXL_ASSERT(allow_macro_instructions_);
6779    VIXL_ASSERT(OutsideITBlock());
6780    MacroEmissionCheckScope guard(this);
6781    ITScope it_scope(this, &cond);
6782    vcvtr(cond, dt1, dt2, rd, rm);
6783  }
6784  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6785    Vcvtr(al, dt1, dt2, rd, rm);
6786  }
6787
6788  void Vcvtr(
6789      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6790    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6791    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6792    VIXL_ASSERT(allow_macro_instructions_);
6793    VIXL_ASSERT(OutsideITBlock());
6794    MacroEmissionCheckScope guard(this);
6795    ITScope it_scope(this, &cond);
6796    vcvtr(cond, dt1, dt2, rd, rm);
6797  }
6798  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6799    Vcvtr(al, dt1, dt2, rd, rm);
6800  }
6801
6802  void Vcvtt(
6803      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6805    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6806    VIXL_ASSERT(allow_macro_instructions_);
6807    VIXL_ASSERT(OutsideITBlock());
6808    MacroEmissionCheckScope guard(this);
6809    ITScope it_scope(this, &cond);
6810    vcvtt(cond, dt1, dt2, rd, rm);
6811  }
6812  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6813    Vcvtt(al, dt1, dt2, rd, rm);
6814  }
6815
6816  void Vcvtt(
6817      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6820    VIXL_ASSERT(allow_macro_instructions_);
6821    VIXL_ASSERT(OutsideITBlock());
6822    MacroEmissionCheckScope guard(this);
6823    ITScope it_scope(this, &cond);
6824    vcvtt(cond, dt1, dt2, rd, rm);
6825  }
6826  void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6827    Vcvtt(al, dt1, dt2, rd, rm);
6828  }
6829
6830  void Vcvtt(
6831      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6832    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6833    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6834    VIXL_ASSERT(allow_macro_instructions_);
6835    VIXL_ASSERT(OutsideITBlock());
6836    MacroEmissionCheckScope guard(this);
6837    ITScope it_scope(this, &cond);
6838    vcvtt(cond, dt1, dt2, rd, rm);
6839  }
6840  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6841    Vcvtt(al, dt1, dt2, rd, rm);
6842  }
6843
6844  void Vdiv(
6845      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6846    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6847    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6848    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6849    VIXL_ASSERT(allow_macro_instructions_);
6850    VIXL_ASSERT(OutsideITBlock());
6851    MacroEmissionCheckScope guard(this);
6852    ITScope it_scope(this, &cond);
6853    vdiv(cond, dt, rd, rn, rm);
6854  }
6855  void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6856    Vdiv(al, dt, rd, rn, rm);
6857  }
6858
6859  void Vdiv(
6860      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6861    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6862    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6863    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6864    VIXL_ASSERT(allow_macro_instructions_);
6865    VIXL_ASSERT(OutsideITBlock());
6866    MacroEmissionCheckScope guard(this);
6867    ITScope it_scope(this, &cond);
6868    vdiv(cond, dt, rd, rn, rm);
6869  }
6870  void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6871    Vdiv(al, dt, rd, rn, rm);
6872  }
6873
6874  void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) {
6875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6877    VIXL_ASSERT(allow_macro_instructions_);
6878    VIXL_ASSERT(OutsideITBlock());
6879    MacroEmissionCheckScope guard(this);
6880    ITScope it_scope(this, &cond);
6881    vdup(cond, dt, rd, rt);
6882  }
6883  void Vdup(DataType dt, QRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6884
6885  void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) {
6886    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6887    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6888    VIXL_ASSERT(allow_macro_instructions_);
6889    VIXL_ASSERT(OutsideITBlock());
6890    MacroEmissionCheckScope guard(this);
6891    ITScope it_scope(this, &cond);
6892    vdup(cond, dt, rd, rt);
6893  }
6894  void Vdup(DataType dt, DRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6895
6896  void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) {
6897    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6898    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6899    VIXL_ASSERT(allow_macro_instructions_);
6900    VIXL_ASSERT(OutsideITBlock());
6901    MacroEmissionCheckScope guard(this);
6902    ITScope it_scope(this, &cond);
6903    vdup(cond, dt, rd, rm);
6904  }
6905  void Vdup(DataType dt, DRegister rd, DRegisterLane rm) {
6906    Vdup(al, dt, rd, rm);
6907  }
6908
6909  void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) {
6910    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6911    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6912    VIXL_ASSERT(allow_macro_instructions_);
6913    VIXL_ASSERT(OutsideITBlock());
6914    MacroEmissionCheckScope guard(this);
6915    ITScope it_scope(this, &cond);
6916    vdup(cond, dt, rd, rm);
6917  }
6918  void Vdup(DataType dt, QRegister rd, DRegisterLane rm) {
6919    Vdup(al, dt, rd, rm);
6920  }
6921
6922  void Veor(
6923      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6924    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6925    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6926    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6927    VIXL_ASSERT(allow_macro_instructions_);
6928    VIXL_ASSERT(OutsideITBlock());
6929    MacroEmissionCheckScope guard(this);
6930    ITScope it_scope(this, &cond);
6931    veor(cond, dt, rd, rn, rm);
6932  }
6933  void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6934    Veor(al, dt, rd, rn, rm);
6935  }
6936  void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6937    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6938  }
6939  void Veor(DRegister rd, DRegister rn, DRegister rm) {
6940    Veor(al, kDataTypeValueNone, rd, rn, rm);
6941  }
6942
6943  void Veor(
6944      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6945    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6946    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6947    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6948    VIXL_ASSERT(allow_macro_instructions_);
6949    VIXL_ASSERT(OutsideITBlock());
6950    MacroEmissionCheckScope guard(this);
6951    ITScope it_scope(this, &cond);
6952    veor(cond, dt, rd, rn, rm);
6953  }
6954  void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6955    Veor(al, dt, rd, rn, rm);
6956  }
6957  void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
6958    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6959  }
6960  void Veor(QRegister rd, QRegister rn, QRegister rm) {
6961    Veor(al, kDataTypeValueNone, rd, rn, rm);
6962  }
6963
6964  void Vext(Condition cond,
6965            DataType dt,
6966            DRegister rd,
6967            DRegister rn,
6968            DRegister rm,
6969            const DOperand& operand) {
6970    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6971    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6972    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6973    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6974    VIXL_ASSERT(allow_macro_instructions_);
6975    VIXL_ASSERT(OutsideITBlock());
6976    MacroEmissionCheckScope guard(this);
6977    ITScope it_scope(this, &cond);
6978    vext(cond, dt, rd, rn, rm, operand);
6979  }
6980  void Vext(DataType dt,
6981            DRegister rd,
6982            DRegister rn,
6983            DRegister rm,
6984            const DOperand& operand) {
6985    Vext(al, dt, rd, rn, rm, operand);
6986  }
6987
6988  void Vext(Condition cond,
6989            DataType dt,
6990            QRegister rd,
6991            QRegister rn,
6992            QRegister rm,
6993            const QOperand& operand) {
6994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6997    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6998    VIXL_ASSERT(allow_macro_instructions_);
6999    VIXL_ASSERT(OutsideITBlock());
7000    MacroEmissionCheckScope guard(this);
7001    ITScope it_scope(this, &cond);
7002    vext(cond, dt, rd, rn, rm, operand);
7003  }
7004  void Vext(DataType dt,
7005            QRegister rd,
7006            QRegister rn,
7007            QRegister rm,
7008            const QOperand& operand) {
7009    Vext(al, dt, rd, rn, rm, operand);
7010  }
7011
7012  void Vfma(
7013      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7014    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7015    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7016    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7017    VIXL_ASSERT(allow_macro_instructions_);
7018    VIXL_ASSERT(OutsideITBlock());
7019    MacroEmissionCheckScope guard(this);
7020    ITScope it_scope(this, &cond);
7021    vfma(cond, dt, rd, rn, rm);
7022  }
7023  void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7024    Vfma(al, dt, rd, rn, rm);
7025  }
7026
7027  void Vfma(
7028      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7029    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7030    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7031    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7032    VIXL_ASSERT(allow_macro_instructions_);
7033    VIXL_ASSERT(OutsideITBlock());
7034    MacroEmissionCheckScope guard(this);
7035    ITScope it_scope(this, &cond);
7036    vfma(cond, dt, rd, rn, rm);
7037  }
7038  void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7039    Vfma(al, dt, rd, rn, rm);
7040  }
7041
7042  void Vfma(
7043      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7044    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7045    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7046    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7047    VIXL_ASSERT(allow_macro_instructions_);
7048    VIXL_ASSERT(OutsideITBlock());
7049    MacroEmissionCheckScope guard(this);
7050    ITScope it_scope(this, &cond);
7051    vfma(cond, dt, rd, rn, rm);
7052  }
7053  void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7054    Vfma(al, dt, rd, rn, rm);
7055  }
7056
7057  void Vfms(
7058      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7059    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7060    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7061    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7062    VIXL_ASSERT(allow_macro_instructions_);
7063    VIXL_ASSERT(OutsideITBlock());
7064    MacroEmissionCheckScope guard(this);
7065    ITScope it_scope(this, &cond);
7066    vfms(cond, dt, rd, rn, rm);
7067  }
7068  void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7069    Vfms(al, dt, rd, rn, rm);
7070  }
7071
7072  void Vfms(
7073      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7074    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7076    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7077    VIXL_ASSERT(allow_macro_instructions_);
7078    VIXL_ASSERT(OutsideITBlock());
7079    MacroEmissionCheckScope guard(this);
7080    ITScope it_scope(this, &cond);
7081    vfms(cond, dt, rd, rn, rm);
7082  }
7083  void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7084    Vfms(al, dt, rd, rn, rm);
7085  }
7086
7087  void Vfms(
7088      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7089    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7092    VIXL_ASSERT(allow_macro_instructions_);
7093    VIXL_ASSERT(OutsideITBlock());
7094    MacroEmissionCheckScope guard(this);
7095    ITScope it_scope(this, &cond);
7096    vfms(cond, dt, rd, rn, rm);
7097  }
7098  void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7099    Vfms(al, dt, rd, rn, rm);
7100  }
7101
7102  void Vfnma(
7103      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7104    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7105    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7106    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7107    VIXL_ASSERT(allow_macro_instructions_);
7108    VIXL_ASSERT(OutsideITBlock());
7109    MacroEmissionCheckScope guard(this);
7110    ITScope it_scope(this, &cond);
7111    vfnma(cond, dt, rd, rn, rm);
7112  }
7113  void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7114    Vfnma(al, dt, rd, rn, rm);
7115  }
7116
7117  void Vfnma(
7118      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7119    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7120    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7121    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7122    VIXL_ASSERT(allow_macro_instructions_);
7123    VIXL_ASSERT(OutsideITBlock());
7124    MacroEmissionCheckScope guard(this);
7125    ITScope it_scope(this, &cond);
7126    vfnma(cond, dt, rd, rn, rm);
7127  }
7128  void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7129    Vfnma(al, dt, rd, rn, rm);
7130  }
7131
7132  void Vfnms(
7133      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7134    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7135    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7136    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7137    VIXL_ASSERT(allow_macro_instructions_);
7138    VIXL_ASSERT(OutsideITBlock());
7139    MacroEmissionCheckScope guard(this);
7140    ITScope it_scope(this, &cond);
7141    vfnms(cond, dt, rd, rn, rm);
7142  }
7143  void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7144    Vfnms(al, dt, rd, rn, rm);
7145  }
7146
7147  void Vfnms(
7148      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7149    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7150    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7151    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7152    VIXL_ASSERT(allow_macro_instructions_);
7153    VIXL_ASSERT(OutsideITBlock());
7154    MacroEmissionCheckScope guard(this);
7155    ITScope it_scope(this, &cond);
7156    vfnms(cond, dt, rd, rn, rm);
7157  }
7158  void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7159    Vfnms(al, dt, rd, rn, rm);
7160  }
7161
7162  void Vhadd(
7163      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7164    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7165    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7166    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7167    VIXL_ASSERT(allow_macro_instructions_);
7168    VIXL_ASSERT(OutsideITBlock());
7169    MacroEmissionCheckScope guard(this);
7170    ITScope it_scope(this, &cond);
7171    vhadd(cond, dt, rd, rn, rm);
7172  }
7173  void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7174    Vhadd(al, dt, rd, rn, rm);
7175  }
7176
7177  void Vhadd(
7178      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7179    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7180    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7181    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7182    VIXL_ASSERT(allow_macro_instructions_);
7183    VIXL_ASSERT(OutsideITBlock());
7184    MacroEmissionCheckScope guard(this);
7185    ITScope it_scope(this, &cond);
7186    vhadd(cond, dt, rd, rn, rm);
7187  }
7188  void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7189    Vhadd(al, dt, rd, rn, rm);
7190  }
7191
7192  void Vhsub(
7193      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7194    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7196    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7197    VIXL_ASSERT(allow_macro_instructions_);
7198    VIXL_ASSERT(OutsideITBlock());
7199    MacroEmissionCheckScope guard(this);
7200    ITScope it_scope(this, &cond);
7201    vhsub(cond, dt, rd, rn, rm);
7202  }
7203  void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7204    Vhsub(al, dt, rd, rn, rm);
7205  }
7206
7207  void Vhsub(
7208      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7210    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7212    VIXL_ASSERT(allow_macro_instructions_);
7213    VIXL_ASSERT(OutsideITBlock());
7214    MacroEmissionCheckScope guard(this);
7215    ITScope it_scope(this, &cond);
7216    vhsub(cond, dt, rd, rn, rm);
7217  }
7218  void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7219    Vhsub(al, dt, rd, rn, rm);
7220  }
7221
7222  void Vld1(Condition cond,
7223            DataType dt,
7224            const NeonRegisterList& nreglist,
7225            const AlignedMemOperand& operand) {
7226    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7227    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7228    VIXL_ASSERT(allow_macro_instructions_);
7229    VIXL_ASSERT(OutsideITBlock());
7230    MacroEmissionCheckScope guard(this);
7231    ITScope it_scope(this, &cond);
7232    vld1(cond, dt, nreglist, operand);
7233  }
7234  void Vld1(DataType dt,
7235            const NeonRegisterList& nreglist,
7236            const AlignedMemOperand& operand) {
7237    Vld1(al, dt, nreglist, operand);
7238  }
7239
7240  void Vld2(Condition cond,
7241            DataType dt,
7242            const NeonRegisterList& nreglist,
7243            const AlignedMemOperand& operand) {
7244    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7245    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7246    VIXL_ASSERT(allow_macro_instructions_);
7247    VIXL_ASSERT(OutsideITBlock());
7248    MacroEmissionCheckScope guard(this);
7249    ITScope it_scope(this, &cond);
7250    vld2(cond, dt, nreglist, operand);
7251  }
7252  void Vld2(DataType dt,
7253            const NeonRegisterList& nreglist,
7254            const AlignedMemOperand& operand) {
7255    Vld2(al, dt, nreglist, operand);
7256  }
7257
7258  void Vld3(Condition cond,
7259            DataType dt,
7260            const NeonRegisterList& nreglist,
7261            const AlignedMemOperand& operand) {
7262    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7263    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7264    VIXL_ASSERT(allow_macro_instructions_);
7265    VIXL_ASSERT(OutsideITBlock());
7266    MacroEmissionCheckScope guard(this);
7267    ITScope it_scope(this, &cond);
7268    vld3(cond, dt, nreglist, operand);
7269  }
7270  void Vld3(DataType dt,
7271            const NeonRegisterList& nreglist,
7272            const AlignedMemOperand& operand) {
7273    Vld3(al, dt, nreglist, operand);
7274  }
7275
7276  void Vld3(Condition cond,
7277            DataType dt,
7278            const NeonRegisterList& nreglist,
7279            const MemOperand& operand) {
7280    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7281    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7282    VIXL_ASSERT(allow_macro_instructions_);
7283    VIXL_ASSERT(OutsideITBlock());
7284    MacroEmissionCheckScope guard(this);
7285    ITScope it_scope(this, &cond);
7286    vld3(cond, dt, nreglist, operand);
7287  }
7288  void Vld3(DataType dt,
7289            const NeonRegisterList& nreglist,
7290            const MemOperand& operand) {
7291    Vld3(al, dt, nreglist, operand);
7292  }
7293
7294  void Vld4(Condition cond,
7295            DataType dt,
7296            const NeonRegisterList& nreglist,
7297            const AlignedMemOperand& operand) {
7298    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7299    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7300    VIXL_ASSERT(allow_macro_instructions_);
7301    VIXL_ASSERT(OutsideITBlock());
7302    MacroEmissionCheckScope guard(this);
7303    ITScope it_scope(this, &cond);
7304    vld4(cond, dt, nreglist, operand);
7305  }
7306  void Vld4(DataType dt,
7307            const NeonRegisterList& nreglist,
7308            const AlignedMemOperand& operand) {
7309    Vld4(al, dt, nreglist, operand);
7310  }
7311
7312  void Vldm(Condition cond,
7313            DataType dt,
7314            Register rn,
7315            WriteBack write_back,
7316            DRegisterList dreglist) {
7317    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7318    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7319    VIXL_ASSERT(allow_macro_instructions_);
7320    VIXL_ASSERT(OutsideITBlock());
7321    MacroEmissionCheckScope guard(this);
7322    ITScope it_scope(this, &cond);
7323    vldm(cond, dt, rn, write_back, dreglist);
7324  }
7325  void Vldm(DataType dt,
7326            Register rn,
7327            WriteBack write_back,
7328            DRegisterList dreglist) {
7329    Vldm(al, dt, rn, write_back, dreglist);
7330  }
7331  void Vldm(Condition cond,
7332            Register rn,
7333            WriteBack write_back,
7334            DRegisterList dreglist) {
7335    Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist);
7336  }
7337  void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) {
7338    Vldm(al, kDataTypeValueNone, rn, write_back, dreglist);
7339  }
7340
7341  void Vldm(Condition cond,
7342            DataType dt,
7343            Register rn,
7344            WriteBack write_back,
7345            SRegisterList sreglist) {
7346    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7347    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7348    VIXL_ASSERT(allow_macro_instructions_);
7349    VIXL_ASSERT(OutsideITBlock());
7350    MacroEmissionCheckScope guard(this);
7351    ITScope it_scope(this, &cond);
7352    vldm(cond, dt, rn, write_back, sreglist);
7353  }
7354  void Vldm(DataType dt,
7355            Register rn,
7356            WriteBack write_back,
7357            SRegisterList sreglist) {
7358    Vldm(al, dt, rn, write_back, sreglist);
7359  }
7360  void Vldm(Condition cond,
7361            Register rn,
7362            WriteBack write_back,
7363            SRegisterList sreglist) {
7364    Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist);
7365  }
7366  void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) {
7367    Vldm(al, kDataTypeValueNone, rn, write_back, sreglist);
7368  }
7369
7370  void Vldmdb(Condition cond,
7371              DataType dt,
7372              Register rn,
7373              WriteBack write_back,
7374              DRegisterList dreglist) {
7375    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7376    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7377    VIXL_ASSERT(allow_macro_instructions_);
7378    VIXL_ASSERT(OutsideITBlock());
7379    MacroEmissionCheckScope guard(this);
7380    ITScope it_scope(this, &cond);
7381    vldmdb(cond, dt, rn, write_back, dreglist);
7382  }
7383  void Vldmdb(DataType dt,
7384              Register rn,
7385              WriteBack write_back,
7386              DRegisterList dreglist) {
7387    Vldmdb(al, dt, rn, write_back, dreglist);
7388  }
7389  void Vldmdb(Condition cond,
7390              Register rn,
7391              WriteBack write_back,
7392              DRegisterList dreglist) {
7393    Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
7394  }
7395  void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
7396    Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
7397  }
7398
7399  void Vldmdb(Condition cond,
7400              DataType dt,
7401              Register rn,
7402              WriteBack write_back,
7403              SRegisterList sreglist) {
7404    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7405    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7406    VIXL_ASSERT(allow_macro_instructions_);
7407    VIXL_ASSERT(OutsideITBlock());
7408    MacroEmissionCheckScope guard(this);
7409    ITScope it_scope(this, &cond);
7410    vldmdb(cond, dt, rn, write_back, sreglist);
7411  }
7412  void Vldmdb(DataType dt,
7413              Register rn,
7414              WriteBack write_back,
7415              SRegisterList sreglist) {
7416    Vldmdb(al, dt, rn, write_back, sreglist);
7417  }
7418  void Vldmdb(Condition cond,
7419              Register rn,
7420              WriteBack write_back,
7421              SRegisterList sreglist) {
7422    Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
7423  }
7424  void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
7425    Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
7426  }
7427
7428  void Vldmia(Condition cond,
7429              DataType dt,
7430              Register rn,
7431              WriteBack write_back,
7432              DRegisterList dreglist) {
7433    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7434    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7435    VIXL_ASSERT(allow_macro_instructions_);
7436    VIXL_ASSERT(OutsideITBlock());
7437    MacroEmissionCheckScope guard(this);
7438    ITScope it_scope(this, &cond);
7439    vldmia(cond, dt, rn, write_back, dreglist);
7440  }
7441  void Vldmia(DataType dt,
7442              Register rn,
7443              WriteBack write_back,
7444              DRegisterList dreglist) {
7445    Vldmia(al, dt, rn, write_back, dreglist);
7446  }
7447  void Vldmia(Condition cond,
7448              Register rn,
7449              WriteBack write_back,
7450              DRegisterList dreglist) {
7451    Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
7452  }
7453  void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
7454    Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist);
7455  }
7456
7457  void Vldmia(Condition cond,
7458              DataType dt,
7459              Register rn,
7460              WriteBack write_back,
7461              SRegisterList sreglist) {
7462    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7463    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7464    VIXL_ASSERT(allow_macro_instructions_);
7465    VIXL_ASSERT(OutsideITBlock());
7466    MacroEmissionCheckScope guard(this);
7467    ITScope it_scope(this, &cond);
7468    vldmia(cond, dt, rn, write_back, sreglist);
7469  }
7470  void Vldmia(DataType dt,
7471              Register rn,
7472              WriteBack write_back,
7473              SRegisterList sreglist) {
7474    Vldmia(al, dt, rn, write_back, sreglist);
7475  }
7476  void Vldmia(Condition cond,
7477              Register rn,
7478              WriteBack write_back,
7479              SRegisterList sreglist) {
7480    Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
7481  }
7482  void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
7483    Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist);
7484  }
7485
7486  void Vldr(Condition cond, DataType dt, DRegister rd, Label* label) {
7487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7488    VIXL_ASSERT(allow_macro_instructions_);
7489    VIXL_ASSERT(OutsideITBlock());
7490    MacroEmissionCheckScope guard(this);
7491    ITScope it_scope(this, &cond);
7492    vldr(cond, dt, rd, label);
7493  }
7494  void Vldr(DataType dt, DRegister rd, Label* label) {
7495    Vldr(al, dt, rd, label);
7496  }
7497  void Vldr(Condition cond, DRegister rd, Label* label) {
7498    Vldr(cond, Untyped64, rd, label);
7499  }
7500  void Vldr(DRegister rd, Label* label) { Vldr(al, Untyped64, rd, label); }
7501
7502  void Vldr(Condition cond,
7503            DataType dt,
7504            DRegister rd,
7505            const MemOperand& operand) {
7506    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7507    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7508    VIXL_ASSERT(allow_macro_instructions_);
7509    VIXL_ASSERT(OutsideITBlock());
7510    MacroEmissionCheckScope guard(this);
7511    ITScope it_scope(this, &cond);
7512    vldr(cond, dt, rd, operand);
7513  }
7514  void Vldr(DataType dt, DRegister rd, const MemOperand& operand) {
7515    Vldr(al, dt, rd, operand);
7516  }
7517  void Vldr(Condition cond, DRegister rd, const MemOperand& operand) {
7518    Vldr(cond, Untyped64, rd, operand);
7519  }
7520  void Vldr(DRegister rd, const MemOperand& operand) {
7521    Vldr(al, Untyped64, rd, operand);
7522  }
7523
7524  void Vldr(Condition cond, DataType dt, SRegister rd, Label* label) {
7525    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7526    VIXL_ASSERT(allow_macro_instructions_);
7527    VIXL_ASSERT(OutsideITBlock());
7528    MacroEmissionCheckScope guard(this);
7529    ITScope it_scope(this, &cond);
7530    vldr(cond, dt, rd, label);
7531  }
7532  void Vldr(DataType dt, SRegister rd, Label* label) {
7533    Vldr(al, dt, rd, label);
7534  }
7535  void Vldr(Condition cond, SRegister rd, Label* label) {
7536    Vldr(cond, Untyped32, rd, label);
7537  }
7538  void Vldr(SRegister rd, Label* label) { Vldr(al, Untyped32, rd, label); }
7539
7540  void Vldr(Condition cond,
7541            DataType dt,
7542            SRegister rd,
7543            const MemOperand& operand) {
7544    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7545    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7546    VIXL_ASSERT(allow_macro_instructions_);
7547    VIXL_ASSERT(OutsideITBlock());
7548    MacroEmissionCheckScope guard(this);
7549    ITScope it_scope(this, &cond);
7550    vldr(cond, dt, rd, operand);
7551  }
7552  void Vldr(DataType dt, SRegister rd, const MemOperand& operand) {
7553    Vldr(al, dt, rd, operand);
7554  }
7555  void Vldr(Condition cond, SRegister rd, const MemOperand& operand) {
7556    Vldr(cond, Untyped32, rd, operand);
7557  }
7558  void Vldr(SRegister rd, const MemOperand& operand) {
7559    Vldr(al, Untyped32, rd, operand);
7560  }
7561
7562  void Vmax(
7563      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7564    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7565    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7567    VIXL_ASSERT(allow_macro_instructions_);
7568    VIXL_ASSERT(OutsideITBlock());
7569    MacroEmissionCheckScope guard(this);
7570    ITScope it_scope(this, &cond);
7571    vmax(cond, dt, rd, rn, rm);
7572  }
7573  void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7574    Vmax(al, dt, rd, rn, rm);
7575  }
7576
7577  void Vmax(
7578      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7581    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7582    VIXL_ASSERT(allow_macro_instructions_);
7583    VIXL_ASSERT(OutsideITBlock());
7584    MacroEmissionCheckScope guard(this);
7585    ITScope it_scope(this, &cond);
7586    vmax(cond, dt, rd, rn, rm);
7587  }
7588  void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7589    Vmax(al, dt, rd, rn, rm);
7590  }
7591
7592  void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7593    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7594    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7595    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7596    VIXL_ASSERT(allow_macro_instructions_);
7597    VIXL_ASSERT(OutsideITBlock());
7598    MacroEmissionCheckScope guard(this);
7599    vmaxnm(dt, rd, rn, rm);
7600  }
7601
7602  void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7606    VIXL_ASSERT(allow_macro_instructions_);
7607    VIXL_ASSERT(OutsideITBlock());
7608    MacroEmissionCheckScope guard(this);
7609    vmaxnm(dt, rd, rn, rm);
7610  }
7611
7612  void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7613    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7614    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7615    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7616    VIXL_ASSERT(allow_macro_instructions_);
7617    VIXL_ASSERT(OutsideITBlock());
7618    MacroEmissionCheckScope guard(this);
7619    vmaxnm(dt, rd, rn, rm);
7620  }
7621
7622  void Vmin(
7623      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7624    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7625    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7626    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7627    VIXL_ASSERT(allow_macro_instructions_);
7628    VIXL_ASSERT(OutsideITBlock());
7629    MacroEmissionCheckScope guard(this);
7630    ITScope it_scope(this, &cond);
7631    vmin(cond, dt, rd, rn, rm);
7632  }
7633  void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7634    Vmin(al, dt, rd, rn, rm);
7635  }
7636
7637  void Vmin(
7638      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7639    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7640    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7641    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7642    VIXL_ASSERT(allow_macro_instructions_);
7643    VIXL_ASSERT(OutsideITBlock());
7644    MacroEmissionCheckScope guard(this);
7645    ITScope it_scope(this, &cond);
7646    vmin(cond, dt, rd, rn, rm);
7647  }
7648  void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7649    Vmin(al, dt, rd, rn, rm);
7650  }
7651
7652  void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7655    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7656    VIXL_ASSERT(allow_macro_instructions_);
7657    VIXL_ASSERT(OutsideITBlock());
7658    MacroEmissionCheckScope guard(this);
7659    vminnm(dt, rd, rn, rm);
7660  }
7661
7662  void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7663    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7664    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7665    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7666    VIXL_ASSERT(allow_macro_instructions_);
7667    VIXL_ASSERT(OutsideITBlock());
7668    MacroEmissionCheckScope guard(this);
7669    vminnm(dt, rd, rn, rm);
7670  }
7671
7672  void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7673    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7674    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7675    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7676    VIXL_ASSERT(allow_macro_instructions_);
7677    VIXL_ASSERT(OutsideITBlock());
7678    MacroEmissionCheckScope guard(this);
7679    vminnm(dt, rd, rn, rm);
7680  }
7681
7682  void Vmla(Condition cond,
7683            DataType dt,
7684            DRegister rd,
7685            DRegister rn,
7686            DRegisterLane rm) {
7687    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7688    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7689    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7690    VIXL_ASSERT(allow_macro_instructions_);
7691    VIXL_ASSERT(OutsideITBlock());
7692    MacroEmissionCheckScope guard(this);
7693    ITScope it_scope(this, &cond);
7694    vmla(cond, dt, rd, rn, rm);
7695  }
7696  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7697    Vmla(al, dt, rd, rn, rm);
7698  }
7699
7700  void Vmla(Condition cond,
7701            DataType dt,
7702            QRegister rd,
7703            QRegister rn,
7704            DRegisterLane rm) {
7705    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7706    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7708    VIXL_ASSERT(allow_macro_instructions_);
7709    VIXL_ASSERT(OutsideITBlock());
7710    MacroEmissionCheckScope guard(this);
7711    ITScope it_scope(this, &cond);
7712    vmla(cond, dt, rd, rn, rm);
7713  }
7714  void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7715    Vmla(al, dt, rd, rn, rm);
7716  }
7717
7718  void Vmla(
7719      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7720    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7721    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7722    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7723    VIXL_ASSERT(allow_macro_instructions_);
7724    VIXL_ASSERT(OutsideITBlock());
7725    MacroEmissionCheckScope guard(this);
7726    ITScope it_scope(this, &cond);
7727    vmla(cond, dt, rd, rn, rm);
7728  }
7729  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7730    Vmla(al, dt, rd, rn, rm);
7731  }
7732
7733  void Vmla(
7734      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7737    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7738    VIXL_ASSERT(allow_macro_instructions_);
7739    VIXL_ASSERT(OutsideITBlock());
7740    MacroEmissionCheckScope guard(this);
7741    ITScope it_scope(this, &cond);
7742    vmla(cond, dt, rd, rn, rm);
7743  }
7744  void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7745    Vmla(al, dt, rd, rn, rm);
7746  }
7747
7748  void Vmla(
7749      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7750    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7752    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7753    VIXL_ASSERT(allow_macro_instructions_);
7754    VIXL_ASSERT(OutsideITBlock());
7755    MacroEmissionCheckScope guard(this);
7756    ITScope it_scope(this, &cond);
7757    vmla(cond, dt, rd, rn, rm);
7758  }
7759  void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7760    Vmla(al, dt, rd, rn, rm);
7761  }
7762
7763  void Vmlal(Condition cond,
7764             DataType dt,
7765             QRegister rd,
7766             DRegister rn,
7767             DRegisterLane rm) {
7768    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7769    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7770    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7771    VIXL_ASSERT(allow_macro_instructions_);
7772    VIXL_ASSERT(OutsideITBlock());
7773    MacroEmissionCheckScope guard(this);
7774    ITScope it_scope(this, &cond);
7775    vmlal(cond, dt, rd, rn, rm);
7776  }
7777  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7778    Vmlal(al, dt, rd, rn, rm);
7779  }
7780
7781  void Vmlal(
7782      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7783    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7784    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7785    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7786    VIXL_ASSERT(allow_macro_instructions_);
7787    VIXL_ASSERT(OutsideITBlock());
7788    MacroEmissionCheckScope guard(this);
7789    ITScope it_scope(this, &cond);
7790    vmlal(cond, dt, rd, rn, rm);
7791  }
7792  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7793    Vmlal(al, dt, rd, rn, rm);
7794  }
7795
7796  void Vmls(Condition cond,
7797            DataType dt,
7798            DRegister rd,
7799            DRegister rn,
7800            DRegisterLane rm) {
7801    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7802    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7803    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7804    VIXL_ASSERT(allow_macro_instructions_);
7805    VIXL_ASSERT(OutsideITBlock());
7806    MacroEmissionCheckScope guard(this);
7807    ITScope it_scope(this, &cond);
7808    vmls(cond, dt, rd, rn, rm);
7809  }
7810  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7811    Vmls(al, dt, rd, rn, rm);
7812  }
7813
7814  void Vmls(Condition cond,
7815            DataType dt,
7816            QRegister rd,
7817            QRegister rn,
7818            DRegisterLane rm) {
7819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7820    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7821    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7822    VIXL_ASSERT(allow_macro_instructions_);
7823    VIXL_ASSERT(OutsideITBlock());
7824    MacroEmissionCheckScope guard(this);
7825    ITScope it_scope(this, &cond);
7826    vmls(cond, dt, rd, rn, rm);
7827  }
7828  void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7829    Vmls(al, dt, rd, rn, rm);
7830  }
7831
7832  void Vmls(
7833      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7834    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7835    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7836    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7837    VIXL_ASSERT(allow_macro_instructions_);
7838    VIXL_ASSERT(OutsideITBlock());
7839    MacroEmissionCheckScope guard(this);
7840    ITScope it_scope(this, &cond);
7841    vmls(cond, dt, rd, rn, rm);
7842  }
7843  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7844    Vmls(al, dt, rd, rn, rm);
7845  }
7846
7847  void Vmls(
7848      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7849    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7850    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7851    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7852    VIXL_ASSERT(allow_macro_instructions_);
7853    VIXL_ASSERT(OutsideITBlock());
7854    MacroEmissionCheckScope guard(this);
7855    ITScope it_scope(this, &cond);
7856    vmls(cond, dt, rd, rn, rm);
7857  }
7858  void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7859    Vmls(al, dt, rd, rn, rm);
7860  }
7861
7862  void Vmls(
7863      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7864    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7865    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7866    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7867    VIXL_ASSERT(allow_macro_instructions_);
7868    VIXL_ASSERT(OutsideITBlock());
7869    MacroEmissionCheckScope guard(this);
7870    ITScope it_scope(this, &cond);
7871    vmls(cond, dt, rd, rn, rm);
7872  }
7873  void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7874    Vmls(al, dt, rd, rn, rm);
7875  }
7876
7877  void Vmlsl(Condition cond,
7878             DataType dt,
7879             QRegister rd,
7880             DRegister rn,
7881             DRegisterLane rm) {
7882    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7883    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7884    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7885    VIXL_ASSERT(allow_macro_instructions_);
7886    VIXL_ASSERT(OutsideITBlock());
7887    MacroEmissionCheckScope guard(this);
7888    ITScope it_scope(this, &cond);
7889    vmlsl(cond, dt, rd, rn, rm);
7890  }
7891  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7892    Vmlsl(al, dt, rd, rn, rm);
7893  }
7894
7895  void Vmlsl(
7896      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7897    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7898    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7899    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7900    VIXL_ASSERT(allow_macro_instructions_);
7901    VIXL_ASSERT(OutsideITBlock());
7902    MacroEmissionCheckScope guard(this);
7903    ITScope it_scope(this, &cond);
7904    vmlsl(cond, dt, rd, rn, rm);
7905  }
7906  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7907    Vmlsl(al, dt, rd, rn, rm);
7908  }
7909
7910  void Vmov(Condition cond, Register rt, SRegister rn) {
7911    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7912    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7913    VIXL_ASSERT(allow_macro_instructions_);
7914    VIXL_ASSERT(OutsideITBlock());
7915    MacroEmissionCheckScope guard(this);
7916    ITScope it_scope(this, &cond);
7917    vmov(cond, rt, rn);
7918  }
7919  void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); }
7920
7921  void Vmov(Condition cond, SRegister rn, Register rt) {
7922    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7923    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7924    VIXL_ASSERT(allow_macro_instructions_);
7925    VIXL_ASSERT(OutsideITBlock());
7926    MacroEmissionCheckScope guard(this);
7927    ITScope it_scope(this, &cond);
7928    vmov(cond, rn, rt);
7929  }
7930  void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); }
7931
7932  void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) {
7933    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7934    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7935    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7936    VIXL_ASSERT(allow_macro_instructions_);
7937    VIXL_ASSERT(OutsideITBlock());
7938    MacroEmissionCheckScope guard(this);
7939    ITScope it_scope(this, &cond);
7940    vmov(cond, rt, rt2, rm);
7941  }
7942  void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); }
7943
7944  void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) {
7945    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7946    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7947    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7948    VIXL_ASSERT(allow_macro_instructions_);
7949    VIXL_ASSERT(OutsideITBlock());
7950    MacroEmissionCheckScope guard(this);
7951    ITScope it_scope(this, &cond);
7952    vmov(cond, rm, rt, rt2);
7953  }
7954  void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); }
7955
7956  void Vmov(
7957      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) {
7958    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7959    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7960    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7962    VIXL_ASSERT(allow_macro_instructions_);
7963    VIXL_ASSERT(OutsideITBlock());
7964    MacroEmissionCheckScope guard(this);
7965    ITScope it_scope(this, &cond);
7966    vmov(cond, rt, rt2, rm, rm1);
7967  }
7968  void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) {
7969    Vmov(al, rt, rt2, rm, rm1);
7970  }
7971
7972  void Vmov(
7973      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) {
7974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7976    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7977    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7978    VIXL_ASSERT(allow_macro_instructions_);
7979    VIXL_ASSERT(OutsideITBlock());
7980    MacroEmissionCheckScope guard(this);
7981    ITScope it_scope(this, &cond);
7982    vmov(cond, rm, rm1, rt, rt2);
7983  }
7984  void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) {
7985    Vmov(al, rm, rm1, rt, rt2);
7986  }
7987
7988  void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) {
7989    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7990    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7991    VIXL_ASSERT(allow_macro_instructions_);
7992    VIXL_ASSERT(OutsideITBlock());
7993    MacroEmissionCheckScope guard(this);
7994    ITScope it_scope(this, &cond);
7995    vmov(cond, dt, rd, rt);
7996  }
7997  void Vmov(DataType dt, DRegisterLane rd, Register rt) {
7998    Vmov(al, dt, rd, rt);
7999  }
8000  void Vmov(Condition cond, DRegisterLane rd, Register rt) {
8001    Vmov(cond, kDataTypeValueNone, rd, rt);
8002  }
8003  void Vmov(DRegisterLane rd, Register rt) {
8004    Vmov(al, kDataTypeValueNone, rd, rt);
8005  }
8006
8007  void Vmov(Condition cond,
8008            DataType dt,
8009            DRegister rd,
8010            const DOperand& operand) {
8011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8012    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8013    VIXL_ASSERT(allow_macro_instructions_);
8014    VIXL_ASSERT(OutsideITBlock());
8015    MacroEmissionCheckScope guard(this);
8016    ITScope it_scope(this, &cond);
8017    vmov(cond, dt, rd, operand);
8018  }
8019  void Vmov(DataType dt, DRegister rd, const DOperand& operand) {
8020    Vmov(al, dt, rd, operand);
8021  }
8022
8023  void Vmov(Condition cond,
8024            DataType dt,
8025            QRegister rd,
8026            const QOperand& operand) {
8027    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8028    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8029    VIXL_ASSERT(allow_macro_instructions_);
8030    VIXL_ASSERT(OutsideITBlock());
8031    MacroEmissionCheckScope guard(this);
8032    ITScope it_scope(this, &cond);
8033    vmov(cond, dt, rd, operand);
8034  }
8035  void Vmov(DataType dt, QRegister rd, const QOperand& operand) {
8036    Vmov(al, dt, rd, operand);
8037  }
8038
8039  void Vmov(Condition cond,
8040            DataType dt,
8041            SRegister rd,
8042            const SOperand& operand) {
8043    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8044    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8045    VIXL_ASSERT(allow_macro_instructions_);
8046    VIXL_ASSERT(OutsideITBlock());
8047    MacroEmissionCheckScope guard(this);
8048    ITScope it_scope(this, &cond);
8049    vmov(cond, dt, rd, operand);
8050  }
8051  void Vmov(DataType dt, SRegister rd, const SOperand& operand) {
8052    Vmov(al, dt, rd, operand);
8053  }
8054
8055  void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) {
8056    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8057    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8058    VIXL_ASSERT(allow_macro_instructions_);
8059    VIXL_ASSERT(OutsideITBlock());
8060    MacroEmissionCheckScope guard(this);
8061    ITScope it_scope(this, &cond);
8062    vmov(cond, dt, rt, rn);
8063  }
8064  void Vmov(DataType dt, Register rt, DRegisterLane rn) {
8065    Vmov(al, dt, rt, rn);
8066  }
8067  void Vmov(Condition cond, Register rt, DRegisterLane rn) {
8068    Vmov(cond, kDataTypeValueNone, rt, rn);
8069  }
8070  void Vmov(Register rt, DRegisterLane rn) {
8071    Vmov(al, kDataTypeValueNone, rt, rn);
8072  }
8073
8074  void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) {
8075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8076    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8077    VIXL_ASSERT(allow_macro_instructions_);
8078    VIXL_ASSERT(OutsideITBlock());
8079    MacroEmissionCheckScope guard(this);
8080    ITScope it_scope(this, &cond);
8081    vmovl(cond, dt, rd, rm);
8082  }
8083  void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); }
8084
8085  void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8086    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8087    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8088    VIXL_ASSERT(allow_macro_instructions_);
8089    VIXL_ASSERT(OutsideITBlock());
8090    MacroEmissionCheckScope guard(this);
8091    ITScope it_scope(this, &cond);
8092    vmovn(cond, dt, rd, rm);
8093  }
8094  void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); }
8095
8096  void Vmrs(Condition cond,
8097            RegisterOrAPSR_nzcv rt,
8098            SpecialFPRegister spec_reg) {
8099    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8100    VIXL_ASSERT(allow_macro_instructions_);
8101    VIXL_ASSERT(OutsideITBlock());
8102    MacroEmissionCheckScope guard(this);
8103    ITScope it_scope(this, &cond);
8104    vmrs(cond, rt, spec_reg);
8105  }
8106  void Vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) {
8107    Vmrs(al, rt, spec_reg);
8108  }
8109
8110  void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) {
8111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
8112    VIXL_ASSERT(allow_macro_instructions_);
8113    VIXL_ASSERT(OutsideITBlock());
8114    MacroEmissionCheckScope guard(this);
8115    ITScope it_scope(this, &cond);
8116    vmsr(cond, spec_reg, rt);
8117  }
8118  void Vmsr(SpecialFPRegister spec_reg, Register rt) { Vmsr(al, spec_reg, rt); }
8119
8120  void Vmul(Condition cond,
8121            DataType dt,
8122            DRegister rd,
8123            DRegister rn,
8124            DRegister dm,
8125            unsigned index) {
8126    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8128    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8129    VIXL_ASSERT(allow_macro_instructions_);
8130    VIXL_ASSERT(OutsideITBlock());
8131    MacroEmissionCheckScope guard(this);
8132    ITScope it_scope(this, &cond);
8133    vmul(cond, dt, rd, rn, dm, index);
8134  }
8135  void Vmul(
8136      DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) {
8137    Vmul(al, dt, rd, rn, dm, index);
8138  }
8139
8140  void Vmul(Condition cond,
8141            DataType dt,
8142            QRegister rd,
8143            QRegister rn,
8144            DRegister dm,
8145            unsigned index) {
8146    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8147    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8148    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8149    VIXL_ASSERT(allow_macro_instructions_);
8150    VIXL_ASSERT(OutsideITBlock());
8151    MacroEmissionCheckScope guard(this);
8152    ITScope it_scope(this, &cond);
8153    vmul(cond, dt, rd, rn, dm, index);
8154  }
8155  void Vmul(
8156      DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) {
8157    Vmul(al, dt, rd, rn, dm, index);
8158  }
8159
8160  void Vmul(
8161      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8162    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8163    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8164    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8165    VIXL_ASSERT(allow_macro_instructions_);
8166    VIXL_ASSERT(OutsideITBlock());
8167    MacroEmissionCheckScope guard(this);
8168    ITScope it_scope(this, &cond);
8169    vmul(cond, dt, rd, rn, rm);
8170  }
8171  void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8172    Vmul(al, dt, rd, rn, rm);
8173  }
8174
8175  void Vmul(
8176      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8177    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8178    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8179    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8180    VIXL_ASSERT(allow_macro_instructions_);
8181    VIXL_ASSERT(OutsideITBlock());
8182    MacroEmissionCheckScope guard(this);
8183    ITScope it_scope(this, &cond);
8184    vmul(cond, dt, rd, rn, rm);
8185  }
8186  void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8187    Vmul(al, dt, rd, rn, rm);
8188  }
8189
8190  void Vmul(
8191      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8192    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8193    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8194    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8195    VIXL_ASSERT(allow_macro_instructions_);
8196    VIXL_ASSERT(OutsideITBlock());
8197    MacroEmissionCheckScope guard(this);
8198    ITScope it_scope(this, &cond);
8199    vmul(cond, dt, rd, rn, rm);
8200  }
8201  void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8202    Vmul(al, dt, rd, rn, rm);
8203  }
8204
8205  void Vmull(Condition cond,
8206             DataType dt,
8207             QRegister rd,
8208             DRegister rn,
8209             DRegister dm,
8210             unsigned index) {
8211    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8212    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8213    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8214    VIXL_ASSERT(allow_macro_instructions_);
8215    VIXL_ASSERT(OutsideITBlock());
8216    MacroEmissionCheckScope guard(this);
8217    ITScope it_scope(this, &cond);
8218    vmull(cond, dt, rd, rn, dm, index);
8219  }
8220  void Vmull(
8221      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8222    Vmull(al, dt, rd, rn, dm, index);
8223  }
8224
8225  void Vmull(
8226      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8227    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8228    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8229    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8230    VIXL_ASSERT(allow_macro_instructions_);
8231    VIXL_ASSERT(OutsideITBlock());
8232    MacroEmissionCheckScope guard(this);
8233    ITScope it_scope(this, &cond);
8234    vmull(cond, dt, rd, rn, rm);
8235  }
8236  void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8237    Vmull(al, dt, rd, rn, rm);
8238  }
8239
8240  void Vmvn(Condition cond,
8241            DataType dt,
8242            DRegister rd,
8243            const DOperand& operand) {
8244    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8245    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8246    VIXL_ASSERT(allow_macro_instructions_);
8247    VIXL_ASSERT(OutsideITBlock());
8248    MacroEmissionCheckScope guard(this);
8249    ITScope it_scope(this, &cond);
8250    vmvn(cond, dt, rd, operand);
8251  }
8252  void Vmvn(DataType dt, DRegister rd, const DOperand& operand) {
8253    Vmvn(al, dt, rd, operand);
8254  }
8255
8256  void Vmvn(Condition cond,
8257            DataType dt,
8258            QRegister rd,
8259            const QOperand& operand) {
8260    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8261    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8262    VIXL_ASSERT(allow_macro_instructions_);
8263    VIXL_ASSERT(OutsideITBlock());
8264    MacroEmissionCheckScope guard(this);
8265    ITScope it_scope(this, &cond);
8266    vmvn(cond, dt, rd, operand);
8267  }
8268  void Vmvn(DataType dt, QRegister rd, const QOperand& operand) {
8269    Vmvn(al, dt, rd, operand);
8270  }
8271
8272  void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8273    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8274    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8275    VIXL_ASSERT(allow_macro_instructions_);
8276    VIXL_ASSERT(OutsideITBlock());
8277    MacroEmissionCheckScope guard(this);
8278    ITScope it_scope(this, &cond);
8279    vneg(cond, dt, rd, rm);
8280  }
8281  void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); }
8282
8283  void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8284    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8285    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8286    VIXL_ASSERT(allow_macro_instructions_);
8287    VIXL_ASSERT(OutsideITBlock());
8288    MacroEmissionCheckScope guard(this);
8289    ITScope it_scope(this, &cond);
8290    vneg(cond, dt, rd, rm);
8291  }
8292  void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); }
8293
8294  void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) {
8295    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8296    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8297    VIXL_ASSERT(allow_macro_instructions_);
8298    VIXL_ASSERT(OutsideITBlock());
8299    MacroEmissionCheckScope guard(this);
8300    ITScope it_scope(this, &cond);
8301    vneg(cond, dt, rd, rm);
8302  }
8303  void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); }
8304
8305  void Vnmla(
8306      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8307    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8308    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8310    VIXL_ASSERT(allow_macro_instructions_);
8311    VIXL_ASSERT(OutsideITBlock());
8312    MacroEmissionCheckScope guard(this);
8313    ITScope it_scope(this, &cond);
8314    vnmla(cond, dt, rd, rn, rm);
8315  }
8316  void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8317    Vnmla(al, dt, rd, rn, rm);
8318  }
8319
8320  void Vnmla(
8321      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8322    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8323    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8325    VIXL_ASSERT(allow_macro_instructions_);
8326    VIXL_ASSERT(OutsideITBlock());
8327    MacroEmissionCheckScope guard(this);
8328    ITScope it_scope(this, &cond);
8329    vnmla(cond, dt, rd, rn, rm);
8330  }
8331  void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8332    Vnmla(al, dt, rd, rn, rm);
8333  }
8334
8335  void Vnmls(
8336      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8337    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8338    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8340    VIXL_ASSERT(allow_macro_instructions_);
8341    VIXL_ASSERT(OutsideITBlock());
8342    MacroEmissionCheckScope guard(this);
8343    ITScope it_scope(this, &cond);
8344    vnmls(cond, dt, rd, rn, rm);
8345  }
8346  void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8347    Vnmls(al, dt, rd, rn, rm);
8348  }
8349
8350  void Vnmls(
8351      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8352    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8353    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8354    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8355    VIXL_ASSERT(allow_macro_instructions_);
8356    VIXL_ASSERT(OutsideITBlock());
8357    MacroEmissionCheckScope guard(this);
8358    ITScope it_scope(this, &cond);
8359    vnmls(cond, dt, rd, rn, rm);
8360  }
8361  void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8362    Vnmls(al, dt, rd, rn, rm);
8363  }
8364
8365  void Vnmul(
8366      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8367    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8368    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8369    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8370    VIXL_ASSERT(allow_macro_instructions_);
8371    VIXL_ASSERT(OutsideITBlock());
8372    MacroEmissionCheckScope guard(this);
8373    ITScope it_scope(this, &cond);
8374    vnmul(cond, dt, rd, rn, rm);
8375  }
8376  void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8377    Vnmul(al, dt, rd, rn, rm);
8378  }
8379
8380  void Vnmul(
8381      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8382    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8384    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8385    VIXL_ASSERT(allow_macro_instructions_);
8386    VIXL_ASSERT(OutsideITBlock());
8387    MacroEmissionCheckScope guard(this);
8388    ITScope it_scope(this, &cond);
8389    vnmul(cond, dt, rd, rn, rm);
8390  }
8391  void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8392    Vnmul(al, dt, rd, rn, rm);
8393  }
8394
8395  void Vorn(Condition cond,
8396            DataType dt,
8397            DRegister rd,
8398            DRegister rn,
8399            const DOperand& operand) {
8400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8401    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8402    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8403    VIXL_ASSERT(allow_macro_instructions_);
8404    VIXL_ASSERT(OutsideITBlock());
8405    MacroEmissionCheckScope guard(this);
8406    ITScope it_scope(this, &cond);
8407    vorn(cond, dt, rd, rn, operand);
8408  }
8409  void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8410    Vorn(al, dt, rd, rn, operand);
8411  }
8412
8413  void Vorn(Condition cond,
8414            DataType dt,
8415            QRegister rd,
8416            QRegister rn,
8417            const QOperand& operand) {
8418    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8419    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8420    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8421    VIXL_ASSERT(allow_macro_instructions_);
8422    VIXL_ASSERT(OutsideITBlock());
8423    MacroEmissionCheckScope guard(this);
8424    ITScope it_scope(this, &cond);
8425    vorn(cond, dt, rd, rn, operand);
8426  }
8427  void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8428    Vorn(al, dt, rd, rn, operand);
8429  }
8430
8431  void Vorr(Condition cond,
8432            DataType dt,
8433            DRegister rd,
8434            DRegister rn,
8435            const DOperand& operand) {
8436    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8437    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8438    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8439    VIXL_ASSERT(allow_macro_instructions_);
8440    VIXL_ASSERT(OutsideITBlock());
8441    MacroEmissionCheckScope guard(this);
8442    ITScope it_scope(this, &cond);
8443    vorr(cond, dt, rd, rn, operand);
8444  }
8445  void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8446    Vorr(al, dt, rd, rn, operand);
8447  }
8448  void Vorr(Condition cond,
8449            DRegister rd,
8450            DRegister rn,
8451            const DOperand& operand) {
8452    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8453  }
8454  void Vorr(DRegister rd, DRegister rn, const DOperand& operand) {
8455    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8456  }
8457
8458  void Vorr(Condition cond,
8459            DataType dt,
8460            QRegister rd,
8461            QRegister rn,
8462            const QOperand& operand) {
8463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8464    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8465    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8466    VIXL_ASSERT(allow_macro_instructions_);
8467    VIXL_ASSERT(OutsideITBlock());
8468    MacroEmissionCheckScope guard(this);
8469    ITScope it_scope(this, &cond);
8470    vorr(cond, dt, rd, rn, operand);
8471  }
8472  void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8473    Vorr(al, dt, rd, rn, operand);
8474  }
8475  void Vorr(Condition cond,
8476            QRegister rd,
8477            QRegister rn,
8478            const QOperand& operand) {
8479    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8480  }
8481  void Vorr(QRegister rd, QRegister rn, const QOperand& operand) {
8482    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8483  }
8484
8485  void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8486    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8488    VIXL_ASSERT(allow_macro_instructions_);
8489    VIXL_ASSERT(OutsideITBlock());
8490    MacroEmissionCheckScope guard(this);
8491    ITScope it_scope(this, &cond);
8492    vpadal(cond, dt, rd, rm);
8493  }
8494  void Vpadal(DataType dt, DRegister rd, DRegister rm) {
8495    Vpadal(al, dt, rd, rm);
8496  }
8497
8498  void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8501    VIXL_ASSERT(allow_macro_instructions_);
8502    VIXL_ASSERT(OutsideITBlock());
8503    MacroEmissionCheckScope guard(this);
8504    ITScope it_scope(this, &cond);
8505    vpadal(cond, dt, rd, rm);
8506  }
8507  void Vpadal(DataType dt, QRegister rd, QRegister rm) {
8508    Vpadal(al, dt, rd, rm);
8509  }
8510
8511  void Vpadd(
8512      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8513    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8514    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8515    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8516    VIXL_ASSERT(allow_macro_instructions_);
8517    VIXL_ASSERT(OutsideITBlock());
8518    MacroEmissionCheckScope guard(this);
8519    ITScope it_scope(this, &cond);
8520    vpadd(cond, dt, rd, rn, rm);
8521  }
8522  void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8523    Vpadd(al, dt, rd, rn, rm);
8524  }
8525
8526  void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8528    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8529    VIXL_ASSERT(allow_macro_instructions_);
8530    VIXL_ASSERT(OutsideITBlock());
8531    MacroEmissionCheckScope guard(this);
8532    ITScope it_scope(this, &cond);
8533    vpaddl(cond, dt, rd, rm);
8534  }
8535  void Vpaddl(DataType dt, DRegister rd, DRegister rm) {
8536    Vpaddl(al, dt, rd, rm);
8537  }
8538
8539  void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8541    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8542    VIXL_ASSERT(allow_macro_instructions_);
8543    VIXL_ASSERT(OutsideITBlock());
8544    MacroEmissionCheckScope guard(this);
8545    ITScope it_scope(this, &cond);
8546    vpaddl(cond, dt, rd, rm);
8547  }
8548  void Vpaddl(DataType dt, QRegister rd, QRegister rm) {
8549    Vpaddl(al, dt, rd, rm);
8550  }
8551
8552  void Vpmax(
8553      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8557    VIXL_ASSERT(allow_macro_instructions_);
8558    VIXL_ASSERT(OutsideITBlock());
8559    MacroEmissionCheckScope guard(this);
8560    ITScope it_scope(this, &cond);
8561    vpmax(cond, dt, rd, rn, rm);
8562  }
8563  void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8564    Vpmax(al, dt, rd, rn, rm);
8565  }
8566
8567  void Vpmin(
8568      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8571    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8572    VIXL_ASSERT(allow_macro_instructions_);
8573    VIXL_ASSERT(OutsideITBlock());
8574    MacroEmissionCheckScope guard(this);
8575    ITScope it_scope(this, &cond);
8576    vpmin(cond, dt, rd, rn, rm);
8577  }
8578  void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8579    Vpmin(al, dt, rd, rn, rm);
8580  }
8581
8582  void Vpop(Condition cond, DataType dt, DRegisterList dreglist) {
8583    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8584    VIXL_ASSERT(allow_macro_instructions_);
8585    VIXL_ASSERT(OutsideITBlock());
8586    MacroEmissionCheckScope guard(this);
8587    ITScope it_scope(this, &cond);
8588    vpop(cond, dt, dreglist);
8589  }
8590  void Vpop(DataType dt, DRegisterList dreglist) { Vpop(al, dt, dreglist); }
8591  void Vpop(Condition cond, DRegisterList dreglist) {
8592    Vpop(cond, kDataTypeValueNone, dreglist);
8593  }
8594  void Vpop(DRegisterList dreglist) { Vpop(al, kDataTypeValueNone, dreglist); }
8595
8596  void Vpop(Condition cond, DataType dt, SRegisterList sreglist) {
8597    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8598    VIXL_ASSERT(allow_macro_instructions_);
8599    VIXL_ASSERT(OutsideITBlock());
8600    MacroEmissionCheckScope guard(this);
8601    ITScope it_scope(this, &cond);
8602    vpop(cond, dt, sreglist);
8603  }
8604  void Vpop(DataType dt, SRegisterList sreglist) { Vpop(al, dt, sreglist); }
8605  void Vpop(Condition cond, SRegisterList sreglist) {
8606    Vpop(cond, kDataTypeValueNone, sreglist);
8607  }
8608  void Vpop(SRegisterList sreglist) { Vpop(al, kDataTypeValueNone, sreglist); }
8609
8610  void Vpush(Condition cond, DataType dt, DRegisterList dreglist) {
8611    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8612    VIXL_ASSERT(allow_macro_instructions_);
8613    VIXL_ASSERT(OutsideITBlock());
8614    MacroEmissionCheckScope guard(this);
8615    ITScope it_scope(this, &cond);
8616    vpush(cond, dt, dreglist);
8617  }
8618  void Vpush(DataType dt, DRegisterList dreglist) { Vpush(al, dt, dreglist); }
8619  void Vpush(Condition cond, DRegisterList dreglist) {
8620    Vpush(cond, kDataTypeValueNone, dreglist);
8621  }
8622  void Vpush(DRegisterList dreglist) {
8623    Vpush(al, kDataTypeValueNone, dreglist);
8624  }
8625
8626  void Vpush(Condition cond, DataType dt, SRegisterList sreglist) {
8627    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8628    VIXL_ASSERT(allow_macro_instructions_);
8629    VIXL_ASSERT(OutsideITBlock());
8630    MacroEmissionCheckScope guard(this);
8631    ITScope it_scope(this, &cond);
8632    vpush(cond, dt, sreglist);
8633  }
8634  void Vpush(DataType dt, SRegisterList sreglist) { Vpush(al, dt, sreglist); }
8635  void Vpush(Condition cond, SRegisterList sreglist) {
8636    Vpush(cond, kDataTypeValueNone, sreglist);
8637  }
8638  void Vpush(SRegisterList sreglist) {
8639    Vpush(al, kDataTypeValueNone, sreglist);
8640  }
8641
8642  void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8643    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8645    VIXL_ASSERT(allow_macro_instructions_);
8646    VIXL_ASSERT(OutsideITBlock());
8647    MacroEmissionCheckScope guard(this);
8648    ITScope it_scope(this, &cond);
8649    vqabs(cond, dt, rd, rm);
8650  }
8651  void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); }
8652
8653  void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8655    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8656    VIXL_ASSERT(allow_macro_instructions_);
8657    VIXL_ASSERT(OutsideITBlock());
8658    MacroEmissionCheckScope guard(this);
8659    ITScope it_scope(this, &cond);
8660    vqabs(cond, dt, rd, rm);
8661  }
8662  void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); }
8663
8664  void Vqadd(
8665      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8666    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8669    VIXL_ASSERT(allow_macro_instructions_);
8670    VIXL_ASSERT(OutsideITBlock());
8671    MacroEmissionCheckScope guard(this);
8672    ITScope it_scope(this, &cond);
8673    vqadd(cond, dt, rd, rn, rm);
8674  }
8675  void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8676    Vqadd(al, dt, rd, rn, rm);
8677  }
8678
8679  void Vqadd(
8680      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8681    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8684    VIXL_ASSERT(allow_macro_instructions_);
8685    VIXL_ASSERT(OutsideITBlock());
8686    MacroEmissionCheckScope guard(this);
8687    ITScope it_scope(this, &cond);
8688    vqadd(cond, dt, rd, rn, rm);
8689  }
8690  void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8691    Vqadd(al, dt, rd, rn, rm);
8692  }
8693
8694  void Vqdmlal(
8695      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8696    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8699    VIXL_ASSERT(allow_macro_instructions_);
8700    VIXL_ASSERT(OutsideITBlock());
8701    MacroEmissionCheckScope guard(this);
8702    ITScope it_scope(this, &cond);
8703    vqdmlal(cond, dt, rd, rn, rm);
8704  }
8705  void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8706    Vqdmlal(al, dt, rd, rn, rm);
8707  }
8708
8709  void Vqdmlal(Condition cond,
8710               DataType dt,
8711               QRegister rd,
8712               DRegister rn,
8713               DRegister dm,
8714               unsigned index) {
8715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8716    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8717    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8718    VIXL_ASSERT(allow_macro_instructions_);
8719    VIXL_ASSERT(OutsideITBlock());
8720    MacroEmissionCheckScope guard(this);
8721    ITScope it_scope(this, &cond);
8722    vqdmlal(cond, dt, rd, rn, dm, index);
8723  }
8724  void Vqdmlal(
8725      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8726    Vqdmlal(al, dt, rd, rn, dm, index);
8727  }
8728
8729  void Vqdmlsl(
8730      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8734    VIXL_ASSERT(allow_macro_instructions_);
8735    VIXL_ASSERT(OutsideITBlock());
8736    MacroEmissionCheckScope guard(this);
8737    ITScope it_scope(this, &cond);
8738    vqdmlsl(cond, dt, rd, rn, rm);
8739  }
8740  void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8741    Vqdmlsl(al, dt, rd, rn, rm);
8742  }
8743
8744  void Vqdmlsl(Condition cond,
8745               DataType dt,
8746               QRegister rd,
8747               DRegister rn,
8748               DRegister dm,
8749               unsigned index) {
8750    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8752    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8753    VIXL_ASSERT(allow_macro_instructions_);
8754    VIXL_ASSERT(OutsideITBlock());
8755    MacroEmissionCheckScope guard(this);
8756    ITScope it_scope(this, &cond);
8757    vqdmlsl(cond, dt, rd, rn, dm, index);
8758  }
8759  void Vqdmlsl(
8760      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8761    Vqdmlsl(al, dt, rd, rn, dm, index);
8762  }
8763
8764  void Vqdmulh(
8765      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8766    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8767    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8768    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8769    VIXL_ASSERT(allow_macro_instructions_);
8770    VIXL_ASSERT(OutsideITBlock());
8771    MacroEmissionCheckScope guard(this);
8772    ITScope it_scope(this, &cond);
8773    vqdmulh(cond, dt, rd, rn, rm);
8774  }
8775  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8776    Vqdmulh(al, dt, rd, rn, rm);
8777  }
8778
8779  void Vqdmulh(
8780      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8781    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8782    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8783    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8784    VIXL_ASSERT(allow_macro_instructions_);
8785    VIXL_ASSERT(OutsideITBlock());
8786    MacroEmissionCheckScope guard(this);
8787    ITScope it_scope(this, &cond);
8788    vqdmulh(cond, dt, rd, rn, rm);
8789  }
8790  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8791    Vqdmulh(al, dt, rd, rn, rm);
8792  }
8793
8794  void Vqdmulh(Condition cond,
8795               DataType dt,
8796               DRegister rd,
8797               DRegister rn,
8798               DRegisterLane rm) {
8799    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8800    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8801    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8802    VIXL_ASSERT(allow_macro_instructions_);
8803    VIXL_ASSERT(OutsideITBlock());
8804    MacroEmissionCheckScope guard(this);
8805    ITScope it_scope(this, &cond);
8806    vqdmulh(cond, dt, rd, rn, rm);
8807  }
8808  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8809    Vqdmulh(al, dt, rd, rn, rm);
8810  }
8811
8812  void Vqdmulh(Condition cond,
8813               DataType dt,
8814               QRegister rd,
8815               QRegister rn,
8816               DRegisterLane rm) {
8817    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8820    VIXL_ASSERT(allow_macro_instructions_);
8821    VIXL_ASSERT(OutsideITBlock());
8822    MacroEmissionCheckScope guard(this);
8823    ITScope it_scope(this, &cond);
8824    vqdmulh(cond, dt, rd, rn, rm);
8825  }
8826  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8827    Vqdmulh(al, dt, rd, rn, rm);
8828  }
8829
8830  void Vqdmull(
8831      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8832    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8833    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8834    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8835    VIXL_ASSERT(allow_macro_instructions_);
8836    VIXL_ASSERT(OutsideITBlock());
8837    MacroEmissionCheckScope guard(this);
8838    ITScope it_scope(this, &cond);
8839    vqdmull(cond, dt, rd, rn, rm);
8840  }
8841  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8842    Vqdmull(al, dt, rd, rn, rm);
8843  }
8844
8845  void Vqdmull(Condition cond,
8846               DataType dt,
8847               QRegister rd,
8848               DRegister rn,
8849               DRegisterLane rm) {
8850    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8851    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8852    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8853    VIXL_ASSERT(allow_macro_instructions_);
8854    VIXL_ASSERT(OutsideITBlock());
8855    MacroEmissionCheckScope guard(this);
8856    ITScope it_scope(this, &cond);
8857    vqdmull(cond, dt, rd, rn, rm);
8858  }
8859  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
8860    Vqdmull(al, dt, rd, rn, rm);
8861  }
8862
8863  void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8864    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8865    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8866    VIXL_ASSERT(allow_macro_instructions_);
8867    VIXL_ASSERT(OutsideITBlock());
8868    MacroEmissionCheckScope guard(this);
8869    ITScope it_scope(this, &cond);
8870    vqmovn(cond, dt, rd, rm);
8871  }
8872  void Vqmovn(DataType dt, DRegister rd, QRegister rm) {
8873    Vqmovn(al, dt, rd, rm);
8874  }
8875
8876  void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8877    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8878    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8879    VIXL_ASSERT(allow_macro_instructions_);
8880    VIXL_ASSERT(OutsideITBlock());
8881    MacroEmissionCheckScope guard(this);
8882    ITScope it_scope(this, &cond);
8883    vqmovun(cond, dt, rd, rm);
8884  }
8885  void Vqmovun(DataType dt, DRegister rd, QRegister rm) {
8886    Vqmovun(al, dt, rd, rm);
8887  }
8888
8889  void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8892    VIXL_ASSERT(allow_macro_instructions_);
8893    VIXL_ASSERT(OutsideITBlock());
8894    MacroEmissionCheckScope guard(this);
8895    ITScope it_scope(this, &cond);
8896    vqneg(cond, dt, rd, rm);
8897  }
8898  void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); }
8899
8900  void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8901    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8902    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8903    VIXL_ASSERT(allow_macro_instructions_);
8904    VIXL_ASSERT(OutsideITBlock());
8905    MacroEmissionCheckScope guard(this);
8906    ITScope it_scope(this, &cond);
8907    vqneg(cond, dt, rd, rm);
8908  }
8909  void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); }
8910
8911  void Vqrdmulh(
8912      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8916    VIXL_ASSERT(allow_macro_instructions_);
8917    VIXL_ASSERT(OutsideITBlock());
8918    MacroEmissionCheckScope guard(this);
8919    ITScope it_scope(this, &cond);
8920    vqrdmulh(cond, dt, rd, rn, rm);
8921  }
8922  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8923    Vqrdmulh(al, dt, rd, rn, rm);
8924  }
8925
8926  void Vqrdmulh(
8927      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8928    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8929    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8930    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8931    VIXL_ASSERT(allow_macro_instructions_);
8932    VIXL_ASSERT(OutsideITBlock());
8933    MacroEmissionCheckScope guard(this);
8934    ITScope it_scope(this, &cond);
8935    vqrdmulh(cond, dt, rd, rn, rm);
8936  }
8937  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8938    Vqrdmulh(al, dt, rd, rn, rm);
8939  }
8940
8941  void Vqrdmulh(Condition cond,
8942                DataType dt,
8943                DRegister rd,
8944                DRegister rn,
8945                DRegisterLane rm) {
8946    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8947    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8948    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8949    VIXL_ASSERT(allow_macro_instructions_);
8950    VIXL_ASSERT(OutsideITBlock());
8951    MacroEmissionCheckScope guard(this);
8952    ITScope it_scope(this, &cond);
8953    vqrdmulh(cond, dt, rd, rn, rm);
8954  }
8955  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8956    Vqrdmulh(al, dt, rd, rn, rm);
8957  }
8958
8959  void Vqrdmulh(Condition cond,
8960                DataType dt,
8961                QRegister rd,
8962                QRegister rn,
8963                DRegisterLane rm) {
8964    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8965    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8966    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8967    VIXL_ASSERT(allow_macro_instructions_);
8968    VIXL_ASSERT(OutsideITBlock());
8969    MacroEmissionCheckScope guard(this);
8970    ITScope it_scope(this, &cond);
8971    vqrdmulh(cond, dt, rd, rn, rm);
8972  }
8973  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8974    Vqrdmulh(al, dt, rd, rn, rm);
8975  }
8976
8977  void Vqrshl(
8978      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8979    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8980    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8981    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8982    VIXL_ASSERT(allow_macro_instructions_);
8983    VIXL_ASSERT(OutsideITBlock());
8984    MacroEmissionCheckScope guard(this);
8985    ITScope it_scope(this, &cond);
8986    vqrshl(cond, dt, rd, rm, rn);
8987  }
8988  void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8989    Vqrshl(al, dt, rd, rm, rn);
8990  }
8991
8992  void Vqrshl(
8993      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8997    VIXL_ASSERT(allow_macro_instructions_);
8998    VIXL_ASSERT(OutsideITBlock());
8999    MacroEmissionCheckScope guard(this);
9000    ITScope it_scope(this, &cond);
9001    vqrshl(cond, dt, rd, rm, rn);
9002  }
9003  void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9004    Vqrshl(al, dt, rd, rm, rn);
9005  }
9006
9007  void Vqrshrn(Condition cond,
9008               DataType dt,
9009               DRegister rd,
9010               QRegister rm,
9011               const QOperand& operand) {
9012    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9013    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9014    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9015    VIXL_ASSERT(allow_macro_instructions_);
9016    VIXL_ASSERT(OutsideITBlock());
9017    MacroEmissionCheckScope guard(this);
9018    ITScope it_scope(this, &cond);
9019    vqrshrn(cond, dt, rd, rm, operand);
9020  }
9021  void Vqrshrn(DataType dt,
9022               DRegister rd,
9023               QRegister rm,
9024               const QOperand& operand) {
9025    Vqrshrn(al, dt, rd, rm, operand);
9026  }
9027
9028  void Vqrshrun(Condition cond,
9029                DataType dt,
9030                DRegister rd,
9031                QRegister rm,
9032                const QOperand& operand) {
9033    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9034    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9035    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9036    VIXL_ASSERT(allow_macro_instructions_);
9037    VIXL_ASSERT(OutsideITBlock());
9038    MacroEmissionCheckScope guard(this);
9039    ITScope it_scope(this, &cond);
9040    vqrshrun(cond, dt, rd, rm, operand);
9041  }
9042  void Vqrshrun(DataType dt,
9043                DRegister rd,
9044                QRegister rm,
9045                const QOperand& operand) {
9046    Vqrshrun(al, dt, rd, rm, operand);
9047  }
9048
9049  void Vqshl(Condition cond,
9050             DataType dt,
9051             DRegister rd,
9052             DRegister rm,
9053             const DOperand& operand) {
9054    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9055    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9056    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9057    VIXL_ASSERT(allow_macro_instructions_);
9058    VIXL_ASSERT(OutsideITBlock());
9059    MacroEmissionCheckScope guard(this);
9060    ITScope it_scope(this, &cond);
9061    vqshl(cond, dt, rd, rm, operand);
9062  }
9063  void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9064    Vqshl(al, dt, rd, rm, operand);
9065  }
9066
9067  void Vqshl(Condition cond,
9068             DataType dt,
9069             QRegister rd,
9070             QRegister rm,
9071             const QOperand& operand) {
9072    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9073    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9074    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9075    VIXL_ASSERT(allow_macro_instructions_);
9076    VIXL_ASSERT(OutsideITBlock());
9077    MacroEmissionCheckScope guard(this);
9078    ITScope it_scope(this, &cond);
9079    vqshl(cond, dt, rd, rm, operand);
9080  }
9081  void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9082    Vqshl(al, dt, rd, rm, operand);
9083  }
9084
9085  void Vqshlu(Condition cond,
9086              DataType dt,
9087              DRegister rd,
9088              DRegister rm,
9089              const DOperand& operand) {
9090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9092    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9093    VIXL_ASSERT(allow_macro_instructions_);
9094    VIXL_ASSERT(OutsideITBlock());
9095    MacroEmissionCheckScope guard(this);
9096    ITScope it_scope(this, &cond);
9097    vqshlu(cond, dt, rd, rm, operand);
9098  }
9099  void Vqshlu(DataType dt,
9100              DRegister rd,
9101              DRegister rm,
9102              const DOperand& operand) {
9103    Vqshlu(al, dt, rd, rm, operand);
9104  }
9105
9106  void Vqshlu(Condition cond,
9107              DataType dt,
9108              QRegister rd,
9109              QRegister rm,
9110              const QOperand& operand) {
9111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9112    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9113    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9114    VIXL_ASSERT(allow_macro_instructions_);
9115    VIXL_ASSERT(OutsideITBlock());
9116    MacroEmissionCheckScope guard(this);
9117    ITScope it_scope(this, &cond);
9118    vqshlu(cond, dt, rd, rm, operand);
9119  }
9120  void Vqshlu(DataType dt,
9121              QRegister rd,
9122              QRegister rm,
9123              const QOperand& operand) {
9124    Vqshlu(al, dt, rd, rm, operand);
9125  }
9126
9127  void Vqshrn(Condition cond,
9128              DataType dt,
9129              DRegister rd,
9130              QRegister rm,
9131              const QOperand& operand) {
9132    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9133    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9134    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9135    VIXL_ASSERT(allow_macro_instructions_);
9136    VIXL_ASSERT(OutsideITBlock());
9137    MacroEmissionCheckScope guard(this);
9138    ITScope it_scope(this, &cond);
9139    vqshrn(cond, dt, rd, rm, operand);
9140  }
9141  void Vqshrn(DataType dt,
9142              DRegister rd,
9143              QRegister rm,
9144              const QOperand& operand) {
9145    Vqshrn(al, dt, rd, rm, operand);
9146  }
9147
9148  void Vqshrun(Condition cond,
9149               DataType dt,
9150               DRegister rd,
9151               QRegister rm,
9152               const QOperand& operand) {
9153    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9154    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9155    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9156    VIXL_ASSERT(allow_macro_instructions_);
9157    VIXL_ASSERT(OutsideITBlock());
9158    MacroEmissionCheckScope guard(this);
9159    ITScope it_scope(this, &cond);
9160    vqshrun(cond, dt, rd, rm, operand);
9161  }
9162  void Vqshrun(DataType dt,
9163               DRegister rd,
9164               QRegister rm,
9165               const QOperand& operand) {
9166    Vqshrun(al, dt, rd, rm, operand);
9167  }
9168
9169  void Vqsub(
9170      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9171    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9172    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9173    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9174    VIXL_ASSERT(allow_macro_instructions_);
9175    VIXL_ASSERT(OutsideITBlock());
9176    MacroEmissionCheckScope guard(this);
9177    ITScope it_scope(this, &cond);
9178    vqsub(cond, dt, rd, rn, rm);
9179  }
9180  void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9181    Vqsub(al, dt, rd, rn, rm);
9182  }
9183
9184  void Vqsub(
9185      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9186    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9187    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9188    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9189    VIXL_ASSERT(allow_macro_instructions_);
9190    VIXL_ASSERT(OutsideITBlock());
9191    MacroEmissionCheckScope guard(this);
9192    ITScope it_scope(this, &cond);
9193    vqsub(cond, dt, rd, rn, rm);
9194  }
9195  void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9196    Vqsub(al, dt, rd, rn, rm);
9197  }
9198
9199  void Vraddhn(
9200      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9201    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9202    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9203    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9204    VIXL_ASSERT(allow_macro_instructions_);
9205    VIXL_ASSERT(OutsideITBlock());
9206    MacroEmissionCheckScope guard(this);
9207    ITScope it_scope(this, &cond);
9208    vraddhn(cond, dt, rd, rn, rm);
9209  }
9210  void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9211    Vraddhn(al, dt, rd, rn, rm);
9212  }
9213
9214  void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9215    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9216    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9217    VIXL_ASSERT(allow_macro_instructions_);
9218    VIXL_ASSERT(OutsideITBlock());
9219    MacroEmissionCheckScope guard(this);
9220    ITScope it_scope(this, &cond);
9221    vrecpe(cond, dt, rd, rm);
9222  }
9223  void Vrecpe(DataType dt, DRegister rd, DRegister rm) {
9224    Vrecpe(al, dt, rd, rm);
9225  }
9226
9227  void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9228    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9229    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9230    VIXL_ASSERT(allow_macro_instructions_);
9231    VIXL_ASSERT(OutsideITBlock());
9232    MacroEmissionCheckScope guard(this);
9233    ITScope it_scope(this, &cond);
9234    vrecpe(cond, dt, rd, rm);
9235  }
9236  void Vrecpe(DataType dt, QRegister rd, QRegister rm) {
9237    Vrecpe(al, dt, rd, rm);
9238  }
9239
9240  void Vrecps(
9241      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9242    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9243    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9244    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9245    VIXL_ASSERT(allow_macro_instructions_);
9246    VIXL_ASSERT(OutsideITBlock());
9247    MacroEmissionCheckScope guard(this);
9248    ITScope it_scope(this, &cond);
9249    vrecps(cond, dt, rd, rn, rm);
9250  }
9251  void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9252    Vrecps(al, dt, rd, rn, rm);
9253  }
9254
9255  void Vrecps(
9256      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9257    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9258    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9259    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9260    VIXL_ASSERT(allow_macro_instructions_);
9261    VIXL_ASSERT(OutsideITBlock());
9262    MacroEmissionCheckScope guard(this);
9263    ITScope it_scope(this, &cond);
9264    vrecps(cond, dt, rd, rn, rm);
9265  }
9266  void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9267    Vrecps(al, dt, rd, rn, rm);
9268  }
9269
9270  void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9272    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9273    VIXL_ASSERT(allow_macro_instructions_);
9274    VIXL_ASSERT(OutsideITBlock());
9275    MacroEmissionCheckScope guard(this);
9276    ITScope it_scope(this, &cond);
9277    vrev16(cond, dt, rd, rm);
9278  }
9279  void Vrev16(DataType dt, DRegister rd, DRegister rm) {
9280    Vrev16(al, dt, rd, rm);
9281  }
9282
9283  void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9284    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9285    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9286    VIXL_ASSERT(allow_macro_instructions_);
9287    VIXL_ASSERT(OutsideITBlock());
9288    MacroEmissionCheckScope guard(this);
9289    ITScope it_scope(this, &cond);
9290    vrev16(cond, dt, rd, rm);
9291  }
9292  void Vrev16(DataType dt, QRegister rd, QRegister rm) {
9293    Vrev16(al, dt, rd, rm);
9294  }
9295
9296  void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9297    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9298    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9299    VIXL_ASSERT(allow_macro_instructions_);
9300    VIXL_ASSERT(OutsideITBlock());
9301    MacroEmissionCheckScope guard(this);
9302    ITScope it_scope(this, &cond);
9303    vrev32(cond, dt, rd, rm);
9304  }
9305  void Vrev32(DataType dt, DRegister rd, DRegister rm) {
9306    Vrev32(al, dt, rd, rm);
9307  }
9308
9309  void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9311    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9312    VIXL_ASSERT(allow_macro_instructions_);
9313    VIXL_ASSERT(OutsideITBlock());
9314    MacroEmissionCheckScope guard(this);
9315    ITScope it_scope(this, &cond);
9316    vrev32(cond, dt, rd, rm);
9317  }
9318  void Vrev32(DataType dt, QRegister rd, QRegister rm) {
9319    Vrev32(al, dt, rd, rm);
9320  }
9321
9322  void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9323    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9325    VIXL_ASSERT(allow_macro_instructions_);
9326    VIXL_ASSERT(OutsideITBlock());
9327    MacroEmissionCheckScope guard(this);
9328    ITScope it_scope(this, &cond);
9329    vrev64(cond, dt, rd, rm);
9330  }
9331  void Vrev64(DataType dt, DRegister rd, DRegister rm) {
9332    Vrev64(al, dt, rd, rm);
9333  }
9334
9335  void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9336    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9337    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9338    VIXL_ASSERT(allow_macro_instructions_);
9339    VIXL_ASSERT(OutsideITBlock());
9340    MacroEmissionCheckScope guard(this);
9341    ITScope it_scope(this, &cond);
9342    vrev64(cond, dt, rd, rm);
9343  }
9344  void Vrev64(DataType dt, QRegister rd, QRegister rm) {
9345    Vrev64(al, dt, rd, rm);
9346  }
9347
9348  void Vrhadd(
9349      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9350    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9351    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9352    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9353    VIXL_ASSERT(allow_macro_instructions_);
9354    VIXL_ASSERT(OutsideITBlock());
9355    MacroEmissionCheckScope guard(this);
9356    ITScope it_scope(this, &cond);
9357    vrhadd(cond, dt, rd, rn, rm);
9358  }
9359  void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9360    Vrhadd(al, dt, rd, rn, rm);
9361  }
9362
9363  void Vrhadd(
9364      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9365    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9366    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9367    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9368    VIXL_ASSERT(allow_macro_instructions_);
9369    VIXL_ASSERT(OutsideITBlock());
9370    MacroEmissionCheckScope guard(this);
9371    ITScope it_scope(this, &cond);
9372    vrhadd(cond, dt, rd, rn, rm);
9373  }
9374  void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9375    Vrhadd(al, dt, rd, rn, rm);
9376  }
9377
9378  void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9379    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9380    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9381    VIXL_ASSERT(allow_macro_instructions_);
9382    VIXL_ASSERT(OutsideITBlock());
9383    MacroEmissionCheckScope guard(this);
9384    vrinta(dt1, dt2, rd, rm);
9385  }
9386
9387  void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9388    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9389    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9390    VIXL_ASSERT(allow_macro_instructions_);
9391    VIXL_ASSERT(OutsideITBlock());
9392    MacroEmissionCheckScope guard(this);
9393    vrinta(dt1, dt2, rd, rm);
9394  }
9395
9396  void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9397    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9398    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9399    VIXL_ASSERT(allow_macro_instructions_);
9400    VIXL_ASSERT(OutsideITBlock());
9401    MacroEmissionCheckScope guard(this);
9402    vrinta(dt1, dt2, rd, rm);
9403  }
9404
9405  void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9406    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9407    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9408    VIXL_ASSERT(allow_macro_instructions_);
9409    VIXL_ASSERT(OutsideITBlock());
9410    MacroEmissionCheckScope guard(this);
9411    vrintm(dt1, dt2, rd, rm);
9412  }
9413
9414  void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9415    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9416    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9417    VIXL_ASSERT(allow_macro_instructions_);
9418    VIXL_ASSERT(OutsideITBlock());
9419    MacroEmissionCheckScope guard(this);
9420    vrintm(dt1, dt2, rd, rm);
9421  }
9422
9423  void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9426    VIXL_ASSERT(allow_macro_instructions_);
9427    VIXL_ASSERT(OutsideITBlock());
9428    MacroEmissionCheckScope guard(this);
9429    vrintm(dt1, dt2, rd, rm);
9430  }
9431
9432  void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9433    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9434    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9435    VIXL_ASSERT(allow_macro_instructions_);
9436    VIXL_ASSERT(OutsideITBlock());
9437    MacroEmissionCheckScope guard(this);
9438    vrintn(dt1, dt2, rd, rm);
9439  }
9440
9441  void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9442    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9443    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9444    VIXL_ASSERT(allow_macro_instructions_);
9445    VIXL_ASSERT(OutsideITBlock());
9446    MacroEmissionCheckScope guard(this);
9447    vrintn(dt1, dt2, rd, rm);
9448  }
9449
9450  void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9451    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9452    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9453    VIXL_ASSERT(allow_macro_instructions_);
9454    VIXL_ASSERT(OutsideITBlock());
9455    MacroEmissionCheckScope guard(this);
9456    vrintn(dt1, dt2, rd, rm);
9457  }
9458
9459  void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9460    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9461    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9462    VIXL_ASSERT(allow_macro_instructions_);
9463    VIXL_ASSERT(OutsideITBlock());
9464    MacroEmissionCheckScope guard(this);
9465    vrintp(dt1, dt2, rd, rm);
9466  }
9467
9468  void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9469    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9470    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9471    VIXL_ASSERT(allow_macro_instructions_);
9472    VIXL_ASSERT(OutsideITBlock());
9473    MacroEmissionCheckScope guard(this);
9474    vrintp(dt1, dt2, rd, rm);
9475  }
9476
9477  void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9478    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9480    VIXL_ASSERT(allow_macro_instructions_);
9481    VIXL_ASSERT(OutsideITBlock());
9482    MacroEmissionCheckScope guard(this);
9483    vrintp(dt1, dt2, rd, rm);
9484  }
9485
9486  void Vrintr(
9487      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9488    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9490    VIXL_ASSERT(allow_macro_instructions_);
9491    VIXL_ASSERT(OutsideITBlock());
9492    MacroEmissionCheckScope guard(this);
9493    ITScope it_scope(this, &cond);
9494    vrintr(cond, dt1, dt2, rd, rm);
9495  }
9496  void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9497    Vrintr(al, dt1, dt2, rd, rm);
9498  }
9499
9500  void Vrintr(
9501      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9502    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9503    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9504    VIXL_ASSERT(allow_macro_instructions_);
9505    VIXL_ASSERT(OutsideITBlock());
9506    MacroEmissionCheckScope guard(this);
9507    ITScope it_scope(this, &cond);
9508    vrintr(cond, dt1, dt2, rd, rm);
9509  }
9510  void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9511    Vrintr(al, dt1, dt2, rd, rm);
9512  }
9513
9514  void Vrintx(
9515      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9517    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9518    VIXL_ASSERT(allow_macro_instructions_);
9519    VIXL_ASSERT(OutsideITBlock());
9520    MacroEmissionCheckScope guard(this);
9521    ITScope it_scope(this, &cond);
9522    vrintx(cond, dt1, dt2, rd, rm);
9523  }
9524  void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9525    Vrintx(al, dt1, dt2, rd, rm);
9526  }
9527
9528  void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9529    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9530    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9531    VIXL_ASSERT(allow_macro_instructions_);
9532    VIXL_ASSERT(OutsideITBlock());
9533    MacroEmissionCheckScope guard(this);
9534    vrintx(dt1, dt2, rd, rm);
9535  }
9536
9537  void Vrintx(
9538      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9541    VIXL_ASSERT(allow_macro_instructions_);
9542    VIXL_ASSERT(OutsideITBlock());
9543    MacroEmissionCheckScope guard(this);
9544    ITScope it_scope(this, &cond);
9545    vrintx(cond, dt1, dt2, rd, rm);
9546  }
9547  void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9548    Vrintx(al, dt1, dt2, rd, rm);
9549  }
9550
9551  void Vrintz(
9552      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9553    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9555    VIXL_ASSERT(allow_macro_instructions_);
9556    VIXL_ASSERT(OutsideITBlock());
9557    MacroEmissionCheckScope guard(this);
9558    ITScope it_scope(this, &cond);
9559    vrintz(cond, dt1, dt2, rd, rm);
9560  }
9561  void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9562    Vrintz(al, dt1, dt2, rd, rm);
9563  }
9564
9565  void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9567    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9568    VIXL_ASSERT(allow_macro_instructions_);
9569    VIXL_ASSERT(OutsideITBlock());
9570    MacroEmissionCheckScope guard(this);
9571    vrintz(dt1, dt2, rd, rm);
9572  }
9573
9574  void Vrintz(
9575      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9576    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9577    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9578    VIXL_ASSERT(allow_macro_instructions_);
9579    VIXL_ASSERT(OutsideITBlock());
9580    MacroEmissionCheckScope guard(this);
9581    ITScope it_scope(this, &cond);
9582    vrintz(cond, dt1, dt2, rd, rm);
9583  }
9584  void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9585    Vrintz(al, dt1, dt2, rd, rm);
9586  }
9587
9588  void Vrshl(
9589      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9590    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9591    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9592    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9593    VIXL_ASSERT(allow_macro_instructions_);
9594    VIXL_ASSERT(OutsideITBlock());
9595    MacroEmissionCheckScope guard(this);
9596    ITScope it_scope(this, &cond);
9597    vrshl(cond, dt, rd, rm, rn);
9598  }
9599  void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9600    Vrshl(al, dt, rd, rm, rn);
9601  }
9602
9603  void Vrshl(
9604      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9607    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9608    VIXL_ASSERT(allow_macro_instructions_);
9609    VIXL_ASSERT(OutsideITBlock());
9610    MacroEmissionCheckScope guard(this);
9611    ITScope it_scope(this, &cond);
9612    vrshl(cond, dt, rd, rm, rn);
9613  }
9614  void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9615    Vrshl(al, dt, rd, rm, rn);
9616  }
9617
9618  void Vrshr(Condition cond,
9619             DataType dt,
9620             DRegister rd,
9621             DRegister rm,
9622             const DOperand& operand) {
9623    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9624    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9625    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9626    VIXL_ASSERT(allow_macro_instructions_);
9627    VIXL_ASSERT(OutsideITBlock());
9628    MacroEmissionCheckScope guard(this);
9629    ITScope it_scope(this, &cond);
9630    vrshr(cond, dt, rd, rm, operand);
9631  }
9632  void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9633    Vrshr(al, dt, rd, rm, operand);
9634  }
9635
9636  void Vrshr(Condition cond,
9637             DataType dt,
9638             QRegister rd,
9639             QRegister rm,
9640             const QOperand& operand) {
9641    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9642    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9643    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9644    VIXL_ASSERT(allow_macro_instructions_);
9645    VIXL_ASSERT(OutsideITBlock());
9646    MacroEmissionCheckScope guard(this);
9647    ITScope it_scope(this, &cond);
9648    vrshr(cond, dt, rd, rm, operand);
9649  }
9650  void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9651    Vrshr(al, dt, rd, rm, operand);
9652  }
9653
9654  void Vrshrn(Condition cond,
9655              DataType dt,
9656              DRegister rd,
9657              QRegister rm,
9658              const QOperand& operand) {
9659    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9661    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9662    VIXL_ASSERT(allow_macro_instructions_);
9663    VIXL_ASSERT(OutsideITBlock());
9664    MacroEmissionCheckScope guard(this);
9665    ITScope it_scope(this, &cond);
9666    vrshrn(cond, dt, rd, rm, operand);
9667  }
9668  void Vrshrn(DataType dt,
9669              DRegister rd,
9670              QRegister rm,
9671              const QOperand& operand) {
9672    Vrshrn(al, dt, rd, rm, operand);
9673  }
9674
9675  void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9676    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9678    VIXL_ASSERT(allow_macro_instructions_);
9679    VIXL_ASSERT(OutsideITBlock());
9680    MacroEmissionCheckScope guard(this);
9681    ITScope it_scope(this, &cond);
9682    vrsqrte(cond, dt, rd, rm);
9683  }
9684  void Vrsqrte(DataType dt, DRegister rd, DRegister rm) {
9685    Vrsqrte(al, dt, rd, rm);
9686  }
9687
9688  void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9689    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9690    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9691    VIXL_ASSERT(allow_macro_instructions_);
9692    VIXL_ASSERT(OutsideITBlock());
9693    MacroEmissionCheckScope guard(this);
9694    ITScope it_scope(this, &cond);
9695    vrsqrte(cond, dt, rd, rm);
9696  }
9697  void Vrsqrte(DataType dt, QRegister rd, QRegister rm) {
9698    Vrsqrte(al, dt, rd, rm);
9699  }
9700
9701  void Vrsqrts(
9702      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9703    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9704    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9705    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9706    VIXL_ASSERT(allow_macro_instructions_);
9707    VIXL_ASSERT(OutsideITBlock());
9708    MacroEmissionCheckScope guard(this);
9709    ITScope it_scope(this, &cond);
9710    vrsqrts(cond, dt, rd, rn, rm);
9711  }
9712  void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9713    Vrsqrts(al, dt, rd, rn, rm);
9714  }
9715
9716  void Vrsqrts(
9717      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9718    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9720    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9721    VIXL_ASSERT(allow_macro_instructions_);
9722    VIXL_ASSERT(OutsideITBlock());
9723    MacroEmissionCheckScope guard(this);
9724    ITScope it_scope(this, &cond);
9725    vrsqrts(cond, dt, rd, rn, rm);
9726  }
9727  void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9728    Vrsqrts(al, dt, rd, rn, rm);
9729  }
9730
9731  void Vrsra(Condition cond,
9732             DataType dt,
9733             DRegister rd,
9734             DRegister rm,
9735             const DOperand& operand) {
9736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9737    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9738    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9739    VIXL_ASSERT(allow_macro_instructions_);
9740    VIXL_ASSERT(OutsideITBlock());
9741    MacroEmissionCheckScope guard(this);
9742    ITScope it_scope(this, &cond);
9743    vrsra(cond, dt, rd, rm, operand);
9744  }
9745  void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9746    Vrsra(al, dt, rd, rm, operand);
9747  }
9748
9749  void Vrsra(Condition cond,
9750             DataType dt,
9751             QRegister rd,
9752             QRegister rm,
9753             const QOperand& operand) {
9754    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9755    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9756    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9757    VIXL_ASSERT(allow_macro_instructions_);
9758    VIXL_ASSERT(OutsideITBlock());
9759    MacroEmissionCheckScope guard(this);
9760    ITScope it_scope(this, &cond);
9761    vrsra(cond, dt, rd, rm, operand);
9762  }
9763  void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9764    Vrsra(al, dt, rd, rm, operand);
9765  }
9766
9767  void Vrsubhn(
9768      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9769    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9770    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9771    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9772    VIXL_ASSERT(allow_macro_instructions_);
9773    VIXL_ASSERT(OutsideITBlock());
9774    MacroEmissionCheckScope guard(this);
9775    ITScope it_scope(this, &cond);
9776    vrsubhn(cond, dt, rd, rn, rm);
9777  }
9778  void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9779    Vrsubhn(al, dt, rd, rn, rm);
9780  }
9781
9782  void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9783    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9784    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9785    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9786    VIXL_ASSERT(allow_macro_instructions_);
9787    VIXL_ASSERT(OutsideITBlock());
9788    MacroEmissionCheckScope guard(this);
9789    vseleq(dt, rd, rn, rm);
9790  }
9791
9792  void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9793    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9796    VIXL_ASSERT(allow_macro_instructions_);
9797    VIXL_ASSERT(OutsideITBlock());
9798    MacroEmissionCheckScope guard(this);
9799    vseleq(dt, rd, rn, rm);
9800  }
9801
9802  void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9803    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9804    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9805    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9806    VIXL_ASSERT(allow_macro_instructions_);
9807    VIXL_ASSERT(OutsideITBlock());
9808    MacroEmissionCheckScope guard(this);
9809    vselge(dt, rd, rn, rm);
9810  }
9811
9812  void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9813    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9814    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9815    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9816    VIXL_ASSERT(allow_macro_instructions_);
9817    VIXL_ASSERT(OutsideITBlock());
9818    MacroEmissionCheckScope guard(this);
9819    vselge(dt, rd, rn, rm);
9820  }
9821
9822  void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9823    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9824    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9825    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9826    VIXL_ASSERT(allow_macro_instructions_);
9827    VIXL_ASSERT(OutsideITBlock());
9828    MacroEmissionCheckScope guard(this);
9829    vselgt(dt, rd, rn, rm);
9830  }
9831
9832  void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9833    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9834    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9835    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9836    VIXL_ASSERT(allow_macro_instructions_);
9837    VIXL_ASSERT(OutsideITBlock());
9838    MacroEmissionCheckScope guard(this);
9839    vselgt(dt, rd, rn, rm);
9840  }
9841
9842  void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9844    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9846    VIXL_ASSERT(allow_macro_instructions_);
9847    VIXL_ASSERT(OutsideITBlock());
9848    MacroEmissionCheckScope guard(this);
9849    vselvs(dt, rd, rn, rm);
9850  }
9851
9852  void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9853    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9855    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9856    VIXL_ASSERT(allow_macro_instructions_);
9857    VIXL_ASSERT(OutsideITBlock());
9858    MacroEmissionCheckScope guard(this);
9859    vselvs(dt, rd, rn, rm);
9860  }
9861
9862  void Vshl(Condition cond,
9863            DataType dt,
9864            DRegister rd,
9865            DRegister rm,
9866            const DOperand& operand) {
9867    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9868    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9869    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9870    VIXL_ASSERT(allow_macro_instructions_);
9871    VIXL_ASSERT(OutsideITBlock());
9872    MacroEmissionCheckScope guard(this);
9873    ITScope it_scope(this, &cond);
9874    vshl(cond, dt, rd, rm, operand);
9875  }
9876  void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9877    Vshl(al, dt, rd, rm, operand);
9878  }
9879
9880  void Vshl(Condition cond,
9881            DataType dt,
9882            QRegister rd,
9883            QRegister rm,
9884            const QOperand& operand) {
9885    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9886    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9887    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9888    VIXL_ASSERT(allow_macro_instructions_);
9889    VIXL_ASSERT(OutsideITBlock());
9890    MacroEmissionCheckScope guard(this);
9891    ITScope it_scope(this, &cond);
9892    vshl(cond, dt, rd, rm, operand);
9893  }
9894  void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9895    Vshl(al, dt, rd, rm, operand);
9896  }
9897
9898  void Vshll(Condition cond,
9899             DataType dt,
9900             QRegister rd,
9901             DRegister rm,
9902             const DOperand& operand) {
9903    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9904    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9905    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9906    VIXL_ASSERT(allow_macro_instructions_);
9907    VIXL_ASSERT(OutsideITBlock());
9908    MacroEmissionCheckScope guard(this);
9909    ITScope it_scope(this, &cond);
9910    vshll(cond, dt, rd, rm, operand);
9911  }
9912  void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) {
9913    Vshll(al, dt, rd, rm, operand);
9914  }
9915
9916  void Vshr(Condition cond,
9917            DataType dt,
9918            DRegister rd,
9919            DRegister rm,
9920            const DOperand& operand) {
9921    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9922    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9923    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9924    VIXL_ASSERT(allow_macro_instructions_);
9925    VIXL_ASSERT(OutsideITBlock());
9926    MacroEmissionCheckScope guard(this);
9927    ITScope it_scope(this, &cond);
9928    vshr(cond, dt, rd, rm, operand);
9929  }
9930  void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9931    Vshr(al, dt, rd, rm, operand);
9932  }
9933
9934  void Vshr(Condition cond,
9935            DataType dt,
9936            QRegister rd,
9937            QRegister rm,
9938            const QOperand& operand) {
9939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9940    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9941    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9942    VIXL_ASSERT(allow_macro_instructions_);
9943    VIXL_ASSERT(OutsideITBlock());
9944    MacroEmissionCheckScope guard(this);
9945    ITScope it_scope(this, &cond);
9946    vshr(cond, dt, rd, rm, operand);
9947  }
9948  void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9949    Vshr(al, dt, rd, rm, operand);
9950  }
9951
9952  void Vshrn(Condition cond,
9953             DataType dt,
9954             DRegister rd,
9955             QRegister rm,
9956             const QOperand& operand) {
9957    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9958    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9959    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9960    VIXL_ASSERT(allow_macro_instructions_);
9961    VIXL_ASSERT(OutsideITBlock());
9962    MacroEmissionCheckScope guard(this);
9963    ITScope it_scope(this, &cond);
9964    vshrn(cond, dt, rd, rm, operand);
9965  }
9966  void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) {
9967    Vshrn(al, dt, rd, rm, operand);
9968  }
9969
9970  void Vsli(Condition cond,
9971            DataType dt,
9972            DRegister rd,
9973            DRegister rm,
9974            const DOperand& operand) {
9975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9976    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9977    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9978    VIXL_ASSERT(allow_macro_instructions_);
9979    VIXL_ASSERT(OutsideITBlock());
9980    MacroEmissionCheckScope guard(this);
9981    ITScope it_scope(this, &cond);
9982    vsli(cond, dt, rd, rm, operand);
9983  }
9984  void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9985    Vsli(al, dt, rd, rm, operand);
9986  }
9987
9988  void Vsli(Condition cond,
9989            DataType dt,
9990            QRegister rd,
9991            QRegister rm,
9992            const QOperand& operand) {
9993    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9995    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9996    VIXL_ASSERT(allow_macro_instructions_);
9997    VIXL_ASSERT(OutsideITBlock());
9998    MacroEmissionCheckScope guard(this);
9999    ITScope it_scope(this, &cond);
10000    vsli(cond, dt, rd, rm, operand);
10001  }
10002  void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
10003    Vsli(al, dt, rd, rm, operand);
10004  }
10005
10006  void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) {
10007    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10008    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10009    VIXL_ASSERT(allow_macro_instructions_);
10010    VIXL_ASSERT(OutsideITBlock());
10011    MacroEmissionCheckScope guard(this);
10012    ITScope it_scope(this, &cond);
10013    vsqrt(cond, dt, rd, rm);
10014  }
10015  void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); }
10016
10017  void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10018    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10019    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10020    VIXL_ASSERT(allow_macro_instructions_);
10021    VIXL_ASSERT(OutsideITBlock());
10022    MacroEmissionCheckScope guard(this);
10023    ITScope it_scope(this, &cond);
10024    vsqrt(cond, dt, rd, rm);
10025  }
10026  void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); }
10027
10028  void Vsra(Condition cond,
10029            DataType dt,
10030            DRegister rd,
10031            DRegister rm,
10032            const DOperand& operand) {
10033    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10034    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10035    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10036    VIXL_ASSERT(allow_macro_instructions_);
10037    VIXL_ASSERT(OutsideITBlock());
10038    MacroEmissionCheckScope guard(this);
10039    ITScope it_scope(this, &cond);
10040    vsra(cond, dt, rd, rm, operand);
10041  }
10042  void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
10043    Vsra(al, dt, rd, rm, operand);
10044  }
10045
10046  void Vsra(Condition cond,
10047            DataType dt,
10048            QRegister rd,
10049            QRegister rm,
10050            const QOperand& operand) {
10051    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10052    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10053    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10054    VIXL_ASSERT(allow_macro_instructions_);
10055    VIXL_ASSERT(OutsideITBlock());
10056    MacroEmissionCheckScope guard(this);
10057    ITScope it_scope(this, &cond);
10058    vsra(cond, dt, rd, rm, operand);
10059  }
10060  void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
10061    Vsra(al, dt, rd, rm, operand);
10062  }
10063
10064  void Vsri(Condition cond,
10065            DataType dt,
10066            DRegister rd,
10067            DRegister rm,
10068            const DOperand& operand) {
10069    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10070    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10071    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10072    VIXL_ASSERT(allow_macro_instructions_);
10073    VIXL_ASSERT(OutsideITBlock());
10074    MacroEmissionCheckScope guard(this);
10075    ITScope it_scope(this, &cond);
10076    vsri(cond, dt, rd, rm, operand);
10077  }
10078  void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
10079    Vsri(al, dt, rd, rm, operand);
10080  }
10081
10082  void Vsri(Condition cond,
10083            DataType dt,
10084            QRegister rd,
10085            QRegister rm,
10086            const QOperand& operand) {
10087    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10088    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10089    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10090    VIXL_ASSERT(allow_macro_instructions_);
10091    VIXL_ASSERT(OutsideITBlock());
10092    MacroEmissionCheckScope guard(this);
10093    ITScope it_scope(this, &cond);
10094    vsri(cond, dt, rd, rm, operand);
10095  }
10096  void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
10097    Vsri(al, dt, rd, rm, operand);
10098  }
10099
10100  void Vst1(Condition cond,
10101            DataType dt,
10102            const NeonRegisterList& nreglist,
10103            const AlignedMemOperand& operand) {
10104    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10105    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10106    VIXL_ASSERT(allow_macro_instructions_);
10107    VIXL_ASSERT(OutsideITBlock());
10108    MacroEmissionCheckScope guard(this);
10109    ITScope it_scope(this, &cond);
10110    vst1(cond, dt, nreglist, operand);
10111  }
10112  void Vst1(DataType dt,
10113            const NeonRegisterList& nreglist,
10114            const AlignedMemOperand& operand) {
10115    Vst1(al, dt, nreglist, operand);
10116  }
10117
10118  void Vst2(Condition cond,
10119            DataType dt,
10120            const NeonRegisterList& nreglist,
10121            const AlignedMemOperand& operand) {
10122    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10123    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10124    VIXL_ASSERT(allow_macro_instructions_);
10125    VIXL_ASSERT(OutsideITBlock());
10126    MacroEmissionCheckScope guard(this);
10127    ITScope it_scope(this, &cond);
10128    vst2(cond, dt, nreglist, operand);
10129  }
10130  void Vst2(DataType dt,
10131            const NeonRegisterList& nreglist,
10132            const AlignedMemOperand& operand) {
10133    Vst2(al, dt, nreglist, operand);
10134  }
10135
10136  void Vst3(Condition cond,
10137            DataType dt,
10138            const NeonRegisterList& nreglist,
10139            const AlignedMemOperand& operand) {
10140    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10141    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10142    VIXL_ASSERT(allow_macro_instructions_);
10143    VIXL_ASSERT(OutsideITBlock());
10144    MacroEmissionCheckScope guard(this);
10145    ITScope it_scope(this, &cond);
10146    vst3(cond, dt, nreglist, operand);
10147  }
10148  void Vst3(DataType dt,
10149            const NeonRegisterList& nreglist,
10150            const AlignedMemOperand& operand) {
10151    Vst3(al, dt, nreglist, operand);
10152  }
10153
10154  void Vst3(Condition cond,
10155            DataType dt,
10156            const NeonRegisterList& nreglist,
10157            const MemOperand& operand) {
10158    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10159    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10160    VIXL_ASSERT(allow_macro_instructions_);
10161    VIXL_ASSERT(OutsideITBlock());
10162    MacroEmissionCheckScope guard(this);
10163    ITScope it_scope(this, &cond);
10164    vst3(cond, dt, nreglist, operand);
10165  }
10166  void Vst3(DataType dt,
10167            const NeonRegisterList& nreglist,
10168            const MemOperand& operand) {
10169    Vst3(al, dt, nreglist, operand);
10170  }
10171
10172  void Vst4(Condition cond,
10173            DataType dt,
10174            const NeonRegisterList& nreglist,
10175            const AlignedMemOperand& operand) {
10176    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10177    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10178    VIXL_ASSERT(allow_macro_instructions_);
10179    VIXL_ASSERT(OutsideITBlock());
10180    MacroEmissionCheckScope guard(this);
10181    ITScope it_scope(this, &cond);
10182    vst4(cond, dt, nreglist, operand);
10183  }
10184  void Vst4(DataType dt,
10185            const NeonRegisterList& nreglist,
10186            const AlignedMemOperand& operand) {
10187    Vst4(al, dt, nreglist, operand);
10188  }
10189
10190  void Vstm(Condition cond,
10191            DataType dt,
10192            Register rn,
10193            WriteBack write_back,
10194            DRegisterList dreglist) {
10195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10196    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10197    VIXL_ASSERT(allow_macro_instructions_);
10198    VIXL_ASSERT(OutsideITBlock());
10199    MacroEmissionCheckScope guard(this);
10200    ITScope it_scope(this, &cond);
10201    vstm(cond, dt, rn, write_back, dreglist);
10202  }
10203  void Vstm(DataType dt,
10204            Register rn,
10205            WriteBack write_back,
10206            DRegisterList dreglist) {
10207    Vstm(al, dt, rn, write_back, dreglist);
10208  }
10209  void Vstm(Condition cond,
10210            Register rn,
10211            WriteBack write_back,
10212            DRegisterList dreglist) {
10213    Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist);
10214  }
10215  void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) {
10216    Vstm(al, kDataTypeValueNone, rn, write_back, dreglist);
10217  }
10218
10219  void Vstm(Condition cond,
10220            DataType dt,
10221            Register rn,
10222            WriteBack write_back,
10223            SRegisterList sreglist) {
10224    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10225    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10226    VIXL_ASSERT(allow_macro_instructions_);
10227    VIXL_ASSERT(OutsideITBlock());
10228    MacroEmissionCheckScope guard(this);
10229    ITScope it_scope(this, &cond);
10230    vstm(cond, dt, rn, write_back, sreglist);
10231  }
10232  void Vstm(DataType dt,
10233            Register rn,
10234            WriteBack write_back,
10235            SRegisterList sreglist) {
10236    Vstm(al, dt, rn, write_back, sreglist);
10237  }
10238  void Vstm(Condition cond,
10239            Register rn,
10240            WriteBack write_back,
10241            SRegisterList sreglist) {
10242    Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist);
10243  }
10244  void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) {
10245    Vstm(al, kDataTypeValueNone, rn, write_back, sreglist);
10246  }
10247
10248  void Vstmdb(Condition cond,
10249              DataType dt,
10250              Register rn,
10251              WriteBack write_back,
10252              DRegisterList dreglist) {
10253    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10254    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10255    VIXL_ASSERT(allow_macro_instructions_);
10256    VIXL_ASSERT(OutsideITBlock());
10257    MacroEmissionCheckScope guard(this);
10258    ITScope it_scope(this, &cond);
10259    vstmdb(cond, dt, rn, write_back, dreglist);
10260  }
10261  void Vstmdb(DataType dt,
10262              Register rn,
10263              WriteBack write_back,
10264              DRegisterList dreglist) {
10265    Vstmdb(al, dt, rn, write_back, dreglist);
10266  }
10267  void Vstmdb(Condition cond,
10268              Register rn,
10269              WriteBack write_back,
10270              DRegisterList dreglist) {
10271    Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
10272  }
10273  void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
10274    Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
10275  }
10276
10277  void Vstmdb(Condition cond,
10278              DataType dt,
10279              Register rn,
10280              WriteBack write_back,
10281              SRegisterList sreglist) {
10282    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10283    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10284    VIXL_ASSERT(allow_macro_instructions_);
10285    VIXL_ASSERT(OutsideITBlock());
10286    MacroEmissionCheckScope guard(this);
10287    ITScope it_scope(this, &cond);
10288    vstmdb(cond, dt, rn, write_back, sreglist);
10289  }
10290  void Vstmdb(DataType dt,
10291              Register rn,
10292              WriteBack write_back,
10293              SRegisterList sreglist) {
10294    Vstmdb(al, dt, rn, write_back, sreglist);
10295  }
10296  void Vstmdb(Condition cond,
10297              Register rn,
10298              WriteBack write_back,
10299              SRegisterList sreglist) {
10300    Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
10301  }
10302  void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
10303    Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
10304  }
10305
10306  void Vstmia(Condition cond,
10307              DataType dt,
10308              Register rn,
10309              WriteBack write_back,
10310              DRegisterList dreglist) {
10311    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10312    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10313    VIXL_ASSERT(allow_macro_instructions_);
10314    VIXL_ASSERT(OutsideITBlock());
10315    MacroEmissionCheckScope guard(this);
10316    ITScope it_scope(this, &cond);
10317    vstmia(cond, dt, rn, write_back, dreglist);
10318  }
10319  void Vstmia(DataType dt,
10320              Register rn,
10321              WriteBack write_back,
10322              DRegisterList dreglist) {
10323    Vstmia(al, dt, rn, write_back, dreglist);
10324  }
10325  void Vstmia(Condition cond,
10326              Register rn,
10327              WriteBack write_back,
10328              DRegisterList dreglist) {
10329    Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
10330  }
10331  void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
10332    Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist);
10333  }
10334
10335  void Vstmia(Condition cond,
10336              DataType dt,
10337              Register rn,
10338              WriteBack write_back,
10339              SRegisterList sreglist) {
10340    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10341    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10342    VIXL_ASSERT(allow_macro_instructions_);
10343    VIXL_ASSERT(OutsideITBlock());
10344    MacroEmissionCheckScope guard(this);
10345    ITScope it_scope(this, &cond);
10346    vstmia(cond, dt, rn, write_back, sreglist);
10347  }
10348  void Vstmia(DataType dt,
10349              Register rn,
10350              WriteBack write_back,
10351              SRegisterList sreglist) {
10352    Vstmia(al, dt, rn, write_back, sreglist);
10353  }
10354  void Vstmia(Condition cond,
10355              Register rn,
10356              WriteBack write_back,
10357              SRegisterList sreglist) {
10358    Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
10359  }
10360  void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
10361    Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist);
10362  }
10363
10364  void Vstr(Condition cond,
10365            DataType dt,
10366            DRegister rd,
10367            const MemOperand& operand) {
10368    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10369    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10370    VIXL_ASSERT(allow_macro_instructions_);
10371    VIXL_ASSERT(OutsideITBlock());
10372    MacroEmissionCheckScope guard(this);
10373    ITScope it_scope(this, &cond);
10374    vstr(cond, dt, rd, operand);
10375  }
10376  void Vstr(DataType dt, DRegister rd, const MemOperand& operand) {
10377    Vstr(al, dt, rd, operand);
10378  }
10379  void Vstr(Condition cond, DRegister rd, const MemOperand& operand) {
10380    Vstr(cond, Untyped64, rd, operand);
10381  }
10382  void Vstr(DRegister rd, const MemOperand& operand) {
10383    Vstr(al, Untyped64, rd, operand);
10384  }
10385
10386  void Vstr(Condition cond,
10387            DataType dt,
10388            SRegister rd,
10389            const MemOperand& operand) {
10390    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10391    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10392    VIXL_ASSERT(allow_macro_instructions_);
10393    VIXL_ASSERT(OutsideITBlock());
10394    MacroEmissionCheckScope guard(this);
10395    ITScope it_scope(this, &cond);
10396    vstr(cond, dt, rd, operand);
10397  }
10398  void Vstr(DataType dt, SRegister rd, const MemOperand& operand) {
10399    Vstr(al, dt, rd, operand);
10400  }
10401  void Vstr(Condition cond, SRegister rd, const MemOperand& operand) {
10402    Vstr(cond, Untyped32, rd, operand);
10403  }
10404  void Vstr(SRegister rd, const MemOperand& operand) {
10405    Vstr(al, Untyped32, rd, operand);
10406  }
10407
10408  void Vsub(
10409      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10410    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10411    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10412    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10413    VIXL_ASSERT(allow_macro_instructions_);
10414    VIXL_ASSERT(OutsideITBlock());
10415    MacroEmissionCheckScope guard(this);
10416    ITScope it_scope(this, &cond);
10417    vsub(cond, dt, rd, rn, rm);
10418  }
10419  void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10420    Vsub(al, dt, rd, rn, rm);
10421  }
10422
10423  void Vsub(
10424      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10426    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10427    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10428    VIXL_ASSERT(allow_macro_instructions_);
10429    VIXL_ASSERT(OutsideITBlock());
10430    MacroEmissionCheckScope guard(this);
10431    ITScope it_scope(this, &cond);
10432    vsub(cond, dt, rd, rn, rm);
10433  }
10434  void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10435    Vsub(al, dt, rd, rn, rm);
10436  }
10437
10438  void Vsub(
10439      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10441    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10442    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10443    VIXL_ASSERT(allow_macro_instructions_);
10444    VIXL_ASSERT(OutsideITBlock());
10445    MacroEmissionCheckScope guard(this);
10446    ITScope it_scope(this, &cond);
10447    vsub(cond, dt, rd, rn, rm);
10448  }
10449  void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10450    Vsub(al, dt, rd, rn, rm);
10451  }
10452
10453  void Vsubhn(
10454      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10455    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10456    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10457    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10458    VIXL_ASSERT(allow_macro_instructions_);
10459    VIXL_ASSERT(OutsideITBlock());
10460    MacroEmissionCheckScope guard(this);
10461    ITScope it_scope(this, &cond);
10462    vsubhn(cond, dt, rd, rn, rm);
10463  }
10464  void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10465    Vsubhn(al, dt, rd, rn, rm);
10466  }
10467
10468  void Vsubl(
10469      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10470    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10471    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10472    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10473    VIXL_ASSERT(allow_macro_instructions_);
10474    VIXL_ASSERT(OutsideITBlock());
10475    MacroEmissionCheckScope guard(this);
10476    ITScope it_scope(this, &cond);
10477    vsubl(cond, dt, rd, rn, rm);
10478  }
10479  void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10480    Vsubl(al, dt, rd, rn, rm);
10481  }
10482
10483  void Vsubw(
10484      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10485    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10486    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10488    VIXL_ASSERT(allow_macro_instructions_);
10489    VIXL_ASSERT(OutsideITBlock());
10490    MacroEmissionCheckScope guard(this);
10491    ITScope it_scope(this, &cond);
10492    vsubw(cond, dt, rd, rn, rm);
10493  }
10494  void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10495    Vsubw(al, dt, rd, rn, rm);
10496  }
10497
10498  void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10501    VIXL_ASSERT(allow_macro_instructions_);
10502    VIXL_ASSERT(OutsideITBlock());
10503    MacroEmissionCheckScope guard(this);
10504    ITScope it_scope(this, &cond);
10505    vswp(cond, dt, rd, rm);
10506  }
10507  void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); }
10508  void Vswp(Condition cond, DRegister rd, DRegister rm) {
10509    Vswp(cond, kDataTypeValueNone, rd, rm);
10510  }
10511  void Vswp(DRegister rd, DRegister rm) {
10512    Vswp(al, kDataTypeValueNone, rd, rm);
10513  }
10514
10515  void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10516    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10517    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10518    VIXL_ASSERT(allow_macro_instructions_);
10519    VIXL_ASSERT(OutsideITBlock());
10520    MacroEmissionCheckScope guard(this);
10521    ITScope it_scope(this, &cond);
10522    vswp(cond, dt, rd, rm);
10523  }
10524  void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); }
10525  void Vswp(Condition cond, QRegister rd, QRegister rm) {
10526    Vswp(cond, kDataTypeValueNone, rd, rm);
10527  }
10528  void Vswp(QRegister rd, QRegister rm) {
10529    Vswp(al, kDataTypeValueNone, rd, rm);
10530  }
10531
10532  void Vtbl(Condition cond,
10533            DataType dt,
10534            DRegister rd,
10535            const NeonRegisterList& nreglist,
10536            DRegister rm) {
10537    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10538    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10540    VIXL_ASSERT(allow_macro_instructions_);
10541    VIXL_ASSERT(OutsideITBlock());
10542    MacroEmissionCheckScope guard(this);
10543    ITScope it_scope(this, &cond);
10544    vtbl(cond, dt, rd, nreglist, rm);
10545  }
10546  void Vtbl(DataType dt,
10547            DRegister rd,
10548            const NeonRegisterList& nreglist,
10549            DRegister rm) {
10550    Vtbl(al, dt, rd, nreglist, rm);
10551  }
10552
10553  void Vtbx(Condition cond,
10554            DataType dt,
10555            DRegister rd,
10556            const NeonRegisterList& nreglist,
10557            DRegister rm) {
10558    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10559    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10560    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10561    VIXL_ASSERT(allow_macro_instructions_);
10562    VIXL_ASSERT(OutsideITBlock());
10563    MacroEmissionCheckScope guard(this);
10564    ITScope it_scope(this, &cond);
10565    vtbx(cond, dt, rd, nreglist, rm);
10566  }
10567  void Vtbx(DataType dt,
10568            DRegister rd,
10569            const NeonRegisterList& nreglist,
10570            DRegister rm) {
10571    Vtbx(al, dt, rd, nreglist, rm);
10572  }
10573
10574  void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10575    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10576    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10577    VIXL_ASSERT(allow_macro_instructions_);
10578    VIXL_ASSERT(OutsideITBlock());
10579    MacroEmissionCheckScope guard(this);
10580    ITScope it_scope(this, &cond);
10581    vtrn(cond, dt, rd, rm);
10582  }
10583  void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); }
10584
10585  void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10586    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10587    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10588    VIXL_ASSERT(allow_macro_instructions_);
10589    VIXL_ASSERT(OutsideITBlock());
10590    MacroEmissionCheckScope guard(this);
10591    ITScope it_scope(this, &cond);
10592    vtrn(cond, dt, rd, rm);
10593  }
10594  void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); }
10595
10596  void Vtst(
10597      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10599    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10600    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10601    VIXL_ASSERT(allow_macro_instructions_);
10602    VIXL_ASSERT(OutsideITBlock());
10603    MacroEmissionCheckScope guard(this);
10604    ITScope it_scope(this, &cond);
10605    vtst(cond, dt, rd, rn, rm);
10606  }
10607  void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10608    Vtst(al, dt, rd, rn, rm);
10609  }
10610
10611  void Vtst(
10612      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10613    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10614    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10615    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10616    VIXL_ASSERT(allow_macro_instructions_);
10617    VIXL_ASSERT(OutsideITBlock());
10618    MacroEmissionCheckScope guard(this);
10619    ITScope it_scope(this, &cond);
10620    vtst(cond, dt, rd, rn, rm);
10621  }
10622  void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10623    Vtst(al, dt, rd, rn, rm);
10624  }
10625
10626  void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10627    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10628    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10629    VIXL_ASSERT(allow_macro_instructions_);
10630    VIXL_ASSERT(OutsideITBlock());
10631    MacroEmissionCheckScope guard(this);
10632    ITScope it_scope(this, &cond);
10633    vuzp(cond, dt, rd, rm);
10634  }
10635  void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); }
10636
10637  void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10638    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10639    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10640    VIXL_ASSERT(allow_macro_instructions_);
10641    VIXL_ASSERT(OutsideITBlock());
10642    MacroEmissionCheckScope guard(this);
10643    ITScope it_scope(this, &cond);
10644    vuzp(cond, dt, rd, rm);
10645  }
10646  void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); }
10647
10648  void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10649    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10651    VIXL_ASSERT(allow_macro_instructions_);
10652    VIXL_ASSERT(OutsideITBlock());
10653    MacroEmissionCheckScope guard(this);
10654    ITScope it_scope(this, &cond);
10655    vzip(cond, dt, rd, rm);
10656  }
10657  void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); }
10658
10659  void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10662    VIXL_ASSERT(allow_macro_instructions_);
10663    VIXL_ASSERT(OutsideITBlock());
10664    MacroEmissionCheckScope guard(this);
10665    ITScope it_scope(this, &cond);
10666    vzip(cond, dt, rd, rm);
10667  }
10668  void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); }
10669
10670  void Yield(Condition cond) {
10671    VIXL_ASSERT(allow_macro_instructions_);
10672    VIXL_ASSERT(OutsideITBlock());
10673    MacroEmissionCheckScope guard(this);
10674    ITScope it_scope(this, &cond);
10675    yield(cond);
10676  }
10677  void Yield() { Yield(al); }
10678  void Vabs(Condition cond, VRegister rd, VRegister rm) {
10679    VIXL_ASSERT(rd.IsS() || rd.IsD());
10680    VIXL_ASSERT(rd.GetType() == rm.GetType());
10681    if (rd.IsS()) {
10682      Vabs(cond, F32, rd.S(), rm.S());
10683    } else {
10684      Vabs(cond, F64, rd.D(), rm.D());
10685    }
10686  }
10687  void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); }
10688  void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10689    VIXL_ASSERT(rd.IsS() || rd.IsD());
10690    VIXL_ASSERT(rd.GetType() == rn.GetType());
10691    VIXL_ASSERT(rd.GetType() == rm.GetType());
10692    if (rd.IsS()) {
10693      Vadd(cond, F32, rd.S(), rn.S(), rm.S());
10694    } else {
10695      Vadd(cond, F64, rd.D(), rn.D(), rm.D());
10696    }
10697  }
10698  void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); }
10699  void Vcmp(Condition cond, VRegister rd, VRegister rm) {
10700    VIXL_ASSERT(rd.IsS() || rd.IsD());
10701    VIXL_ASSERT(rd.GetType() == rm.GetType());
10702    if (rd.IsS()) {
10703      Vcmp(cond, F32, rd.S(), rm.S());
10704    } else {
10705      Vcmp(cond, F64, rd.D(), rm.D());
10706    }
10707  }
10708  void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); }
10709  void Vcmpe(Condition cond, VRegister rd, VRegister rm) {
10710    VIXL_ASSERT(rd.IsS() || rd.IsD());
10711    VIXL_ASSERT(rd.GetType() == rm.GetType());
10712    if (rd.IsS()) {
10713      Vcmpe(cond, F32, rd.S(), rm.S());
10714    } else {
10715      Vcmpe(cond, F64, rd.D(), rm.D());
10716    }
10717  }
10718  void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); }
10719  void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10720    VIXL_ASSERT(rd.IsS() || rd.IsD());
10721    VIXL_ASSERT(rd.GetType() == rn.GetType());
10722    VIXL_ASSERT(rd.GetType() == rm.GetType());
10723    if (rd.IsS()) {
10724      Vdiv(cond, F32, rd.S(), rn.S(), rm.S());
10725    } else {
10726      Vdiv(cond, F64, rd.D(), rn.D(), rm.D());
10727    }
10728  }
10729  void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); }
10730  void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10731    VIXL_ASSERT(rd.IsS() || rd.IsD());
10732    VIXL_ASSERT(rd.GetType() == rn.GetType());
10733    VIXL_ASSERT(rd.GetType() == rm.GetType());
10734    if (rd.IsS()) {
10735      Vfma(cond, F32, rd.S(), rn.S(), rm.S());
10736    } else {
10737      Vfma(cond, F64, rd.D(), rn.D(), rm.D());
10738    }
10739  }
10740  void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); }
10741  void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10742    VIXL_ASSERT(rd.IsS() || rd.IsD());
10743    VIXL_ASSERT(rd.GetType() == rn.GetType());
10744    VIXL_ASSERT(rd.GetType() == rm.GetType());
10745    if (rd.IsS()) {
10746      Vfms(cond, F32, rd.S(), rn.S(), rm.S());
10747    } else {
10748      Vfms(cond, F64, rd.D(), rn.D(), rm.D());
10749    }
10750  }
10751  void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); }
10752  void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10753    VIXL_ASSERT(rd.IsS() || rd.IsD());
10754    VIXL_ASSERT(rd.GetType() == rn.GetType());
10755    VIXL_ASSERT(rd.GetType() == rm.GetType());
10756    if (rd.IsS()) {
10757      Vfnma(cond, F32, rd.S(), rn.S(), rm.S());
10758    } else {
10759      Vfnma(cond, F64, rd.D(), rn.D(), rm.D());
10760    }
10761  }
10762  void Vfnma(VRegister rd, VRegister rn, VRegister rm) {
10763    Vfnma(al, rd, rn, rm);
10764  }
10765  void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10766    VIXL_ASSERT(rd.IsS() || rd.IsD());
10767    VIXL_ASSERT(rd.GetType() == rn.GetType());
10768    VIXL_ASSERT(rd.GetType() == rm.GetType());
10769    if (rd.IsS()) {
10770      Vfnms(cond, F32, rd.S(), rn.S(), rm.S());
10771    } else {
10772      Vfnms(cond, F64, rd.D(), rn.D(), rm.D());
10773    }
10774  }
10775  void Vfnms(VRegister rd, VRegister rn, VRegister rm) {
10776    Vfnms(al, rd, rn, rm);
10777  }
10778  void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) {
10779    VIXL_ASSERT(rd.IsS() || rd.IsD());
10780    VIXL_ASSERT(rd.GetType() == rn.GetType());
10781    VIXL_ASSERT(rd.GetType() == rm.GetType());
10782    if (rd.IsS()) {
10783      Vmaxnm(F32, rd.S(), rn.S(), rm.S());
10784    } else {
10785      Vmaxnm(F64, rd.D(), rn.D(), rm.D());
10786    }
10787  }
10788  void Vminnm(VRegister rd, VRegister rn, VRegister rm) {
10789    VIXL_ASSERT(rd.IsS() || rd.IsD());
10790    VIXL_ASSERT(rd.GetType() == rn.GetType());
10791    VIXL_ASSERT(rd.GetType() == rm.GetType());
10792    if (rd.IsS()) {
10793      Vminnm(F32, rd.S(), rn.S(), rm.S());
10794    } else {
10795      Vminnm(F64, rd.D(), rn.D(), rm.D());
10796    }
10797  }
10798  void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10799    VIXL_ASSERT(rd.IsS() || rd.IsD());
10800    VIXL_ASSERT(rd.GetType() == rn.GetType());
10801    VIXL_ASSERT(rd.GetType() == rm.GetType());
10802    if (rd.IsS()) {
10803      Vmla(cond, F32, rd.S(), rn.S(), rm.S());
10804    } else {
10805      Vmla(cond, F64, rd.D(), rn.D(), rm.D());
10806    }
10807  }
10808  void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); }
10809  void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10810    VIXL_ASSERT(rd.IsS() || rd.IsD());
10811    VIXL_ASSERT(rd.GetType() == rn.GetType());
10812    VIXL_ASSERT(rd.GetType() == rm.GetType());
10813    if (rd.IsS()) {
10814      Vmls(cond, F32, rd.S(), rn.S(), rm.S());
10815    } else {
10816      Vmls(cond, F64, rd.D(), rn.D(), rm.D());
10817    }
10818  }
10819  void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); }
10820  void Vmov(Condition cond, VRegister rd, VRegister rm) {
10821    VIXL_ASSERT(rd.IsS() || rd.IsD());
10822    VIXL_ASSERT(rd.GetType() == rm.GetType());
10823    if (rd.IsS()) {
10824      Vmov(cond, F32, rd.S(), rm.S());
10825    } else {
10826      Vmov(cond, F64, rd.D(), rm.D());
10827    }
10828  }
10829  void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); }
10830  void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10831    VIXL_ASSERT(rd.IsS() || rd.IsD());
10832    VIXL_ASSERT(rd.GetType() == rn.GetType());
10833    VIXL_ASSERT(rd.GetType() == rm.GetType());
10834    if (rd.IsS()) {
10835      Vmul(cond, F32, rd.S(), rn.S(), rm.S());
10836    } else {
10837      Vmul(cond, F64, rd.D(), rn.D(), rm.D());
10838    }
10839  }
10840  void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); }
10841  void Vneg(Condition cond, VRegister rd, VRegister rm) {
10842    VIXL_ASSERT(rd.IsS() || rd.IsD());
10843    VIXL_ASSERT(rd.GetType() == rm.GetType());
10844    if (rd.IsS()) {
10845      Vneg(cond, F32, rd.S(), rm.S());
10846    } else {
10847      Vneg(cond, F64, rd.D(), rm.D());
10848    }
10849  }
10850  void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); }
10851  void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10852    VIXL_ASSERT(rd.IsS() || rd.IsD());
10853    VIXL_ASSERT(rd.GetType() == rn.GetType());
10854    VIXL_ASSERT(rd.GetType() == rm.GetType());
10855    if (rd.IsS()) {
10856      Vnmla(cond, F32, rd.S(), rn.S(), rm.S());
10857    } else {
10858      Vnmla(cond, F64, rd.D(), rn.D(), rm.D());
10859    }
10860  }
10861  void Vnmla(VRegister rd, VRegister rn, VRegister rm) {
10862    Vnmla(al, rd, rn, rm);
10863  }
10864  void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10865    VIXL_ASSERT(rd.IsS() || rd.IsD());
10866    VIXL_ASSERT(rd.GetType() == rn.GetType());
10867    VIXL_ASSERT(rd.GetType() == rm.GetType());
10868    if (rd.IsS()) {
10869      Vnmls(cond, F32, rd.S(), rn.S(), rm.S());
10870    } else {
10871      Vnmls(cond, F64, rd.D(), rn.D(), rm.D());
10872    }
10873  }
10874  void Vnmls(VRegister rd, VRegister rn, VRegister rm) {
10875    Vnmls(al, rd, rn, rm);
10876  }
10877  void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10878    VIXL_ASSERT(rd.IsS() || rd.IsD());
10879    VIXL_ASSERT(rd.GetType() == rn.GetType());
10880    VIXL_ASSERT(rd.GetType() == rm.GetType());
10881    if (rd.IsS()) {
10882      Vnmul(cond, F32, rd.S(), rn.S(), rm.S());
10883    } else {
10884      Vnmul(cond, F64, rd.D(), rn.D(), rm.D());
10885    }
10886  }
10887  void Vnmul(VRegister rd, VRegister rn, VRegister rm) {
10888    Vnmul(al, rd, rn, rm);
10889  }
10890  void Vseleq(VRegister rd, VRegister rn, VRegister rm) {
10891    VIXL_ASSERT(rd.IsS() || rd.IsD());
10892    VIXL_ASSERT(rd.GetType() == rn.GetType());
10893    VIXL_ASSERT(rd.GetType() == rm.GetType());
10894    if (rd.IsS()) {
10895      Vseleq(F32, rd.S(), rn.S(), rm.S());
10896    } else {
10897      Vseleq(F64, rd.D(), rn.D(), rm.D());
10898    }
10899  }
10900  void Vselge(VRegister rd, VRegister rn, VRegister rm) {
10901    VIXL_ASSERT(rd.IsS() || rd.IsD());
10902    VIXL_ASSERT(rd.GetType() == rn.GetType());
10903    VIXL_ASSERT(rd.GetType() == rm.GetType());
10904    if (rd.IsS()) {
10905      Vselge(F32, rd.S(), rn.S(), rm.S());
10906    } else {
10907      Vselge(F64, rd.D(), rn.D(), rm.D());
10908    }
10909  }
10910  void Vselgt(VRegister rd, VRegister rn, VRegister rm) {
10911    VIXL_ASSERT(rd.IsS() || rd.IsD());
10912    VIXL_ASSERT(rd.GetType() == rn.GetType());
10913    VIXL_ASSERT(rd.GetType() == rm.GetType());
10914    if (rd.IsS()) {
10915      Vselgt(F32, rd.S(), rn.S(), rm.S());
10916    } else {
10917      Vselgt(F64, rd.D(), rn.D(), rm.D());
10918    }
10919  }
10920  void Vselvs(VRegister rd, VRegister rn, VRegister rm) {
10921    VIXL_ASSERT(rd.IsS() || rd.IsD());
10922    VIXL_ASSERT(rd.GetType() == rn.GetType());
10923    VIXL_ASSERT(rd.GetType() == rm.GetType());
10924    if (rd.IsS()) {
10925      Vselvs(F32, rd.S(), rn.S(), rm.S());
10926    } else {
10927      Vselvs(F64, rd.D(), rn.D(), rm.D());
10928    }
10929  }
10930  void Vsqrt(Condition cond, VRegister rd, VRegister rm) {
10931    VIXL_ASSERT(rd.IsS() || rd.IsD());
10932    VIXL_ASSERT(rd.GetType() == rm.GetType());
10933    if (rd.IsS()) {
10934      Vsqrt(cond, F32, rd.S(), rm.S());
10935    } else {
10936      Vsqrt(cond, F64, rd.D(), rm.D());
10937    }
10938  }
10939  void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); }
10940  void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10941    VIXL_ASSERT(rd.IsS() || rd.IsD());
10942    VIXL_ASSERT(rd.GetType() == rn.GetType());
10943    VIXL_ASSERT(rd.GetType() == rm.GetType());
10944    if (rd.IsS()) {
10945      Vsub(cond, F32, rd.S(), rn.S(), rm.S());
10946    } else {
10947      Vsub(cond, F64, rd.D(), rn.D(), rm.D());
10948    }
10949  }
10950  void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); }
10951  // End of generated code.
10952
10953  virtual bool AllowUnpredictable() VIXL_OVERRIDE {
10954    VIXL_ABORT_WITH_MSG("Unpredictable instruction.\n");
10955    return false;
10956  }
10957  virtual bool AllowStronglyDiscouraged() VIXL_OVERRIDE {
10958    VIXL_ABORT_WITH_MSG(
10959        "ARM strongly recommends to not use this instruction.\n");
10960    return false;
10961  }
10962
10963 private:
10964  RegisterList available_;
10965  VRegisterList available_vfp_;
10966  UseScratchRegisterScope* current_scratch_scope_;
10967  MacroAssemblerContext context_;
10968  Label::Offset checkpoint_;
10969  LiteralPoolManager literal_pool_manager_;
10970  VeneerPoolManager veneer_pool_manager_;
10971  bool generate_simulator_code_;
10972  bool allow_macro_instructions_;
10973};
10974
10975// This scope utility allows scratch registers to be managed safely. The
10976// MacroAssembler's GetScratchRegisterList() is used as a pool of scratch
10977// registers. These registers can be allocated on demand, and will be returned
10978// at the end of the scope.
10979//
10980// When the scope ends, the MacroAssembler's lists will be restored to their
10981// original state, even if the lists were modified by some other means.
10982//
10983// Scopes must nest perfectly. That is, they must be destructed in reverse
10984// construction order. Otherwise, it is not clear how to handle cases where one
10985// scope acquires a register that was included in a now-closing scope. With
10986// perfect nesting, this cannot occur.
10987class UseScratchRegisterScope {
10988 public:
10989  // This constructor implicitly calls the `Open` function to initialise the
10990  // scope, so it is ready to use immediately after it has been constructed.
10991  explicit UseScratchRegisterScope(MacroAssembler* masm)
10992      : masm_(NULL), parent_(NULL), old_available_(0), old_available_vfp_(0) {
10993    Open(masm);
10994  }
10995  // This constructor allows deferred and optional initialisation of the scope.
10996  // The user is required to explicitly call the `Open` function before using
10997  // the scope.
10998  UseScratchRegisterScope()
10999      : masm_(NULL), parent_(NULL), old_available_(0), old_available_vfp_(0) {}
11000
11001  // This function performs the actual initialisation work.
11002  void Open(MacroAssembler* masm);
11003
11004  // The destructor always implicitly calls the `Close` function.
11005  ~UseScratchRegisterScope() { Close(); }
11006
11007  // This function performs the cleaning-up work. It must succeed even if the
11008  // scope has not been opened. It is safe to call multiple times.
11009  void Close();
11010
11011  bool IsAvailable(const Register& reg) const;
11012  bool IsAvailable(const VRegister& reg) const;
11013
11014  // Take a register from the temp list. It will be returned automatically when
11015  // the scope ends.
11016  Register Acquire();
11017  VRegister AcquireV(unsigned size_in_bits);
11018  QRegister AcquireQ();
11019  DRegister AcquireD();
11020  SRegister AcquireS();
11021
11022  // Explicitly release an acquired (or excluded) register, putting it back in
11023  // the temp list.
11024  void Release(const Register& reg);
11025  void Release(const VRegister& reg);
11026
11027  // Make the specified registers available as scratch registers for the
11028  // duration of this scope.
11029  void Include(const RegisterList& list);
11030  void Include(const Register& reg1,
11031               const Register& reg2 = NoReg,
11032               const Register& reg3 = NoReg,
11033               const Register& reg4 = NoReg) {
11034    Include(RegisterList(reg1, reg2, reg3, reg4));
11035  }
11036  void Include(const VRegisterList& list);
11037  void Include(const VRegister& reg1,
11038               const VRegister& reg2 = NoVReg,
11039               const VRegister& reg3 = NoVReg,
11040               const VRegister& reg4 = NoVReg) {
11041    Include(VRegisterList(reg1, reg2, reg3, reg4));
11042  }
11043
11044  // Make sure that the specified registers are not available in this scope.
11045  // This can be used to prevent helper functions from using sensitive
11046  // registers, for example.
11047  void Exclude(const RegisterList& list);
11048  void Exclude(const Register& reg1,
11049               const Register& reg2 = NoReg,
11050               const Register& reg3 = NoReg,
11051               const Register& reg4 = NoReg) {
11052    Exclude(RegisterList(reg1, reg2, reg3, reg4));
11053  }
11054  void Exclude(const VRegisterList& list);
11055  void Exclude(const VRegister& reg1,
11056               const VRegister& reg2 = NoVReg,
11057               const VRegister& reg3 = NoVReg,
11058               const VRegister& reg4 = NoVReg) {
11059    Exclude(VRegisterList(reg1, reg2, reg3, reg4));
11060  }
11061
11062  // A convenience helper to exclude any registers used by the operand.
11063  void Exclude(const Operand& operand);
11064
11065  // Prevent any scratch registers from being used in this scope.
11066  void ExcludeAll();
11067
11068 private:
11069  // The MacroAssembler maintains a list of available scratch registers, and
11070  // also keeps track of the most recently-opened scope so that on destruction
11071  // we can check that scopes do not outlive their parents.
11072  MacroAssembler* masm_;
11073  UseScratchRegisterScope* parent_;
11074
11075  // The state of the available lists at the start of this scope.
11076  uint32_t old_available_;      // kRRegister
11077  uint64_t old_available_vfp_;  // kVRegister
11078
11079  VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) {
11080    VIXL_UNREACHABLE();
11081  }
11082  VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) {
11083    VIXL_UNREACHABLE();
11084  }
11085};
11086
11087class JumpTableBase {
11088 protected:
11089  JumpTableBase(int len, int offset_size)
11090      : table_location_(Label::kMaxOffset),
11091        branch_location_(Label::kMaxOffset),
11092        length_(len),
11093        offset_shift_(WhichPowerOf2(offset_size)),
11094        presence_(length_) {
11095    VIXL_ASSERT((length_ >= 0) && (offset_size <= 4));
11096  }
11097  virtual ~JumpTableBase() {}
11098
11099 public:
11100  int GetTableSizeInBytes() const { return length_ * (1 << offset_shift_); }
11101  int GetOffsetShift() const { return offset_shift_; }
11102  int GetLength() const { return length_; }
11103  Label* GetDefaultLabel() { return &default_; }
11104  Label* GetEndLabel() { return &end_; }
11105  void SetBranchLocation(uint32_t branch_location) {
11106    branch_location_ = branch_location;
11107  }
11108  uint32_t GetBranchLocation() const { return branch_location_; }
11109  void BindTable(uint32_t location) { table_location_ = location; }
11110  virtual void Link(MacroAssembler* masm,
11111                    int case_index,
11112                    uint32_t location) = 0;
11113
11114  uint32_t GetLocationForCase(int i) {
11115    VIXL_ASSERT((i >= 0) && (i < length_));
11116    return table_location_ + (i * (1 << offset_shift_));
11117  }
11118  void SetPresenceBitForCase(int i) {
11119    VIXL_ASSERT((i >= 0) && (i < length_));
11120    presence_.Set(i);
11121  }
11122
11123  void Finalize(MacroAssembler* masm) {
11124    if (!default_.IsBound()) {
11125      masm->Bind(&default_);
11126    }
11127    masm->Bind(&end_);
11128
11129    presence_.ForEachBitNotSet(LinkIt(this, masm, default_.GetLocation()));
11130  }
11131
11132 private:
11133  uint32_t table_location_;
11134  uint32_t branch_location_;
11135  const int length_;
11136  const int offset_shift_;
11137  BitField presence_;
11138  Label default_;
11139  Label end_;
11140  struct LinkIt {
11141    JumpTableBase* table_;
11142    MacroAssembler* const masm_;
11143    const uint32_t location_;
11144    LinkIt(JumpTableBase* table, MacroAssembler* const masm, uint32_t location)
11145        : table_(table), masm_(masm), location_(location) {}
11146    bool execute(int id) const {
11147      VIXL_ASSERT(id < table_->GetLength());
11148      table_->Link(masm_, static_cast<int>(id), location_);
11149      return true;
11150    }
11151  };
11152};
11153
11154// JumpTable<T>(len): Helper to describe a jump table
11155// len here describes the number of possible case. Values in [0, n[ can have a
11156// jump offset. Any other value will assert.
11157template <typename T>
11158class JumpTable : public JumpTableBase {
11159 protected:
11160  explicit JumpTable(int length) : JumpTableBase(length, sizeof(T)) {}
11161
11162 public:
11163  virtual void Link(MacroAssembler* masm,
11164                    int case_index,
11165                    uint32_t location) VIXL_OVERRIDE {
11166    uint32_t position_in_table = GetLocationForCase(case_index);
11167    uint32_t from = GetBranchLocation();
11168    int offset = location - from;
11169    T* case_offset = masm->GetBuffer()->GetOffsetAddress<T*>(position_in_table);
11170    if (masm->IsUsingT32()) {
11171      *case_offset = offset >> 1;
11172    } else {
11173      *case_offset = offset >> 2;
11174    }
11175  }
11176};
11177
11178class JumpTable8bitOffset : public JumpTable<uint8_t> {
11179 public:
11180  explicit JumpTable8bitOffset(int length) : JumpTable<uint8_t>(length) {}
11181};
11182
11183class JumpTable16bitOffset : public JumpTable<uint16_t> {
11184 public:
11185  explicit JumpTable16bitOffset(int length) : JumpTable<uint16_t>(length) {}
11186};
11187
11188class JumpTable32bitOffset : public JumpTable<uint32_t> {
11189 public:
11190  explicit JumpTable32bitOffset(int length) : JumpTable<uint32_t>(length) {}
11191};
11192
11193}  // namespace aarch32
11194}  // namespace vixl
11195
11196#endif  // VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
11197