macro-assembler-aarch32.h revision d17e348e16bf0d6eca4f9ea0e935c7544098d045
1// Copyright 2015, VIXL authors 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// * Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// * Redistributions in binary form must reproduce the above copyright 10// notice, this list of conditions and the following disclaimer in the 11// documentation and/or other materials provided with the distribution. 12// * Neither the name of ARM Limited nor the names of its contributors may 13// be used to endorse or promote products derived from this software 14// without specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26// POSSIBILITY OF SUCH DAMAGE. 27 28#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_ 29#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_ 30 31#include "utils-vixl.h" 32#include "aarch32/instructions-aarch32.h" 33#include "aarch32/assembler-aarch32.h" 34#include "aarch32/operands-aarch32.h" 35 36namespace vixl { 37namespace aarch32 { 38 39class JumpTableBase; 40 41enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 }; 42 43// LiteralPool class, defined as a container for literals 44class LiteralPool { 45 public: 46 typedef std::list<RawLiteral*>::iterator RawLiteralListIterator; 47 48 public: 49 LiteralPool() : size_(0) {} 50 ~LiteralPool() { 51 VIXL_ASSERT(literals_.empty() && (size_ == 0)); 52 for (RawLiteralListIterator literal_it = keep_until_delete_.begin(); 53 literal_it != keep_until_delete_.end(); 54 literal_it++) { 55 delete *literal_it; 56 } 57 keep_until_delete_.clear(); 58 } 59 60 unsigned GetSize() const { return size_; } 61 62 // Add a literal to the literal container. 63 void AddLiteral(RawLiteral* literal) { 64 if (literal->GetPositionInPool() == Label::kMaxOffset) { 65 uint32_t position = GetSize(); 66 literal->SetPositionInPool(position); 67 literals_.push_back(literal); 68 size_ += literal->GetAlignedSize(); 69 } 70 } 71 72 // First literal to be emitted. 73 RawLiteralListIterator GetFirst() { return literals_.begin(); } 74 75 // Mark the end of the literal container. 76 RawLiteralListIterator GetEnd() { return literals_.end(); } 77 78 // Remove all the literals from the container. 79 // If the literal's memory management has been delegated to the container 80 // it will be delete'd. 81 void Clear() { 82 for (RawLiteralListIterator literal_it = GetFirst(); literal_it != GetEnd(); 83 literal_it++) { 84 RawLiteral* literal = *literal_it; 85 switch (literal->GetDeletionPolicy()) { 86 case RawLiteral::kDeletedOnPlacementByPool: 87 delete literal; 88 break; 89 case RawLiteral::kDeletedOnPoolDestruction: 90 keep_until_delete_.push_back(literal); 91 break; 92 case RawLiteral::kManuallyDeleted: 93 break; 94 } 95 } 96 literals_.clear(); 97 size_ = 0; 98 } 99 100 private: 101 // Size (in bytes and including alignments) of the literal pool. 102 unsigned size_; 103 104 // Literal container. 105 std::list<RawLiteral*> literals_; 106 // Already bound Literal container the app requested this pool to keep. 107 std::list<RawLiteral*> keep_until_delete_; 108}; 109 110// Macro assembler for aarch32 instruction set. 111class MacroAssembler : public Assembler { 112 public: 113 enum EmitOption { kBranchRequired, kNoBranchRequired }; 114 115 private: 116 class AllowAssemblerEmissionScope { 117 MacroAssembler* masm_; 118 119 public: 120 AllowAssemblerEmissionScope(MacroAssembler* masm, uint32_t size) 121 : masm_(masm) { 122 VIXL_ASSERT(!masm->AllowAssembler()); 123 masm->EnsureEmitFor(size); 124#ifdef VIXL_DEBUG 125 masm->SetAllowAssembler(true); 126#else 127 USE(masm_); 128#endif 129 } 130 ~AllowAssemblerEmissionScope() { 131#ifdef VIXL_DEBUG 132 VIXL_ASSERT(masm_->AllowAssembler()); 133 masm_->SetAllowAssembler(false); 134#endif 135 } 136 }; 137 138 class MacroAssemblerContext { 139 public: 140 MacroAssemblerContext() : count_(0) {} 141 ~MacroAssemblerContext() {} 142 unsigned GetRecursiveCount() const { return count_; } 143 void Up(const char* loc) { 144 location_stack_[count_] = loc; 145 count_++; 146 if (count_ >= kMaxRecursion) { 147 printf( 148 "Recursion limit reached; unable to resolve macro assembler " 149 "call.\n"); 150 printf("Macro assembler context stack:\n"); 151 for (unsigned i = 0; i < kMaxRecursion; i++) { 152 printf("%10s %s\n", (i == 0) ? "oldest -> " : "", location_stack_[i]); 153 } 154 VIXL_ABORT(); 155 } 156 } 157 void Down() { 158 VIXL_ASSERT((count_ > 0) && (count_ < kMaxRecursion)); 159 count_--; 160 } 161 162 private: 163 unsigned count_; 164 static const uint32_t kMaxRecursion = 5; 165 const char* location_stack_[kMaxRecursion]; 166 }; 167 168 // This scope is used at each Delegate entry to avoid infinite recursion of 169 // Delegate calls. The limit is defined by 170 // MacroAssemblerContext::kMaxRecursion. 171 class ContextScope { 172 public: 173 explicit ContextScope(MacroAssembler* const masm, const char* loc) 174 : masm_(masm) { 175 VIXL_ASSERT(masm_->AllowMacroInstructions()); 176 masm_->GetContext()->Up(loc); 177 } 178 ~ContextScope() { masm_->GetContext()->Down(); } 179 180 private: 181 MacroAssembler* const masm_; 182 }; 183 184 MacroAssemblerContext* GetContext() { return &context_; } 185 186 class ITScope { 187 public: 188 ITScope(MacroAssembler* masm, Condition* cond, bool can_use_it = false) 189 : masm_(masm), cond_(*cond), can_use_it_(can_use_it) { 190 if (!cond_.Is(al) && masm->IsUsingT32()) { 191 if (can_use_it_) { 192 // IT is not deprecated (that implies a 16 bit T32 instruction). 193 // We generate an IT instruction and a conditional instruction. 194 masm->it(cond_); 195 } else { 196 // The usage of IT is deprecated for the instruction. 197 // We generate a conditional branch and an unconditional instruction. 198 // TODO: Use a scope utility with a size check. To do that, we'd need 199 // one with Open() and Close() implemented. 200 masm_->EnsureEmitFor(k16BitT32InstructionSizeInBytes + 201 kMaxT32MacroInstructionSizeInBytes); 202 // Generate the branch. 203 masm_->b(cond_.Negate(), Narrow, &label_); 204 // Tell the macro-assembler to generate unconditional instructions. 205 *cond = al; 206 } 207 } 208#ifdef VIXL_DEBUG 209 initial_cursor_offset_ = masm->GetCursorOffset(); 210#else 211 USE(initial_cursor_offset_); 212#endif 213 } 214 ~ITScope() { 215 if (!cond_.Is(al) && masm_->IsUsingT32() && !can_use_it_) { 216 VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <= 217 kMaxT32MacroInstructionSizeInBytes); 218 masm_->BindHelper(&label_); 219 } 220 } 221 222 private: 223 MacroAssembler* masm_; 224 Condition cond_; 225 Label label_; 226 bool can_use_it_; 227 uint32_t initial_cursor_offset_; 228 }; 229 230 template <Assembler::InstructionCondDtDL asmfn> 231 class EmitLiteralCondDtDL { 232 public: 233 EmitLiteralCondDtDL(Condition cond, DataType dt, DRegister rt) 234 : cond_(cond), dt_(dt), rt_(rt) {} 235 void emit(MacroAssembler* const masm, RawLiteral* const literal) { 236 (masm->*asmfn)(cond_, dt_, rt_, literal); 237 } 238 239 private: 240 Condition cond_; 241 DataType dt_; 242 DRegister rt_; 243 }; 244 245 template <Assembler::InstructionCondDtSL asmfn> 246 class EmitLiteralCondDtSL { 247 public: 248 EmitLiteralCondDtSL(Condition cond, DataType dt, SRegister rt) 249 : cond_(cond), dt_(dt), rt_(rt) {} 250 void emit(MacroAssembler* const masm, RawLiteral* const literal) { 251 (masm->*asmfn)(cond_, dt_, rt_, literal); 252 } 253 254 private: 255 Condition cond_; 256 DataType dt_; 257 SRegister rt_; 258 }; 259 260 template <Assembler::InstructionCondRL asmfn> 261 class EmitLiteralCondRL { 262 public: 263 EmitLiteralCondRL(Condition cond, Register rt) : cond_(cond), rt_(rt) {} 264 void emit(MacroAssembler* const masm, RawLiteral* const literal) { 265 (masm->*asmfn)(cond_, rt_, literal); 266 } 267 268 private: 269 Condition cond_; 270 Register rt_; 271 }; 272 273 template <Assembler::InstructionCondRRL asmfn> 274 class EmitLiteralCondRRL { 275 public: 276 EmitLiteralCondRRL(Condition cond, Register rt, Register rt2) 277 : cond_(cond), rt_(rt), rt2_(rt2) {} 278 void emit(MacroAssembler* const masm, RawLiteral* const literal) { 279 (masm->*asmfn)(cond_, rt_, rt2_, literal); 280 } 281 282 private: 283 Condition cond_; 284 Register rt_, rt2_; 285 }; 286 287 class LiteralPoolManager { 288 public: 289 explicit LiteralPoolManager(MacroAssembler* const masm) : masm_(masm) { 290 ResetCheckpoint(); 291 } 292 293 void ResetCheckpoint() { checkpoint_ = Label::kMaxOffset; } 294 295 LiteralPool* GetLiteralPool() { return &literal_pool_; } 296 Label::Offset GetCheckpoint() const { 297 // Make room for a branch over the pools. 298 return checkpoint_ - kMaxInstructionSizeInBytes; 299 } 300 size_t GetLiteralPoolSize() const { return literal_pool_.GetSize(); } 301 302 // Checks if the insertion of the literal will put the forward reference 303 // too far in the literal pool. 304 bool IsInsertTooFar(RawLiteral* literal, uint32_t from) const { 305 uint32_t checkpoint = from + literal->GetLastInsertForwardDistance(); 306 checkpoint = 307 std::min(checkpoint, static_cast<uint32_t>(literal->GetCheckpoint())); 308 bool too_far = AlignDown(checkpoint, 4) < from + literal_pool_.GetSize() + 309 kMaxInstructionSizeInBytes; 310 return too_far; 311 } 312 313 // Set the different checkpoints where the literal pool has to be emited. 314 void UpdateCheckpoint(RawLiteral* literal) { 315 // The literal should have been placed somewhere in the literal pool 316 VIXL_ASSERT(literal->GetPositionInPool() != Label::kMaxOffset); 317 // TODO(all): Consider AddForwardRef as a virtual so the checkpoint is 318 // updated when inserted. Or move checkpoint_ into Label, 319 literal->UpdateCheckpoint(); 320 Label::Offset tmp = 321 literal->GetAlignedCheckpoint(4) - literal->GetPositionInPool(); 322 if (checkpoint_ > tmp) { 323 checkpoint_ = tmp; 324 masm_->ComputeCheckpoint(); 325 } 326 } 327 328 bool IsEmpty() const { return GetLiteralPoolSize() == 0; } 329 330 private: 331 MacroAssembler* const masm_; 332 LiteralPool literal_pool_; 333 334 // Max offset in the code buffer where the literal needs to be 335 // emitted. A default value of Label::kMaxOffset means that the checkpoint 336 // is invalid. 337 Label::Offset checkpoint_; 338 }; 339 340 void PerformEnsureEmit(Label::Offset target, uint32_t extra_size); 341 342 protected: 343 void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm); 344 void PadToMinimumBranchRange(Label* label); 345 346 // Generate the instruction and if it's not possible revert the whole thing. 347 // emit the literal pool and regenerate the instruction. 348 // Note: The instruction is generated via 349 // void T::emit(MacroAssembler* const, RawLiteral* const) 350 template <typename T> 351 void GenerateInstruction(T instr_callback, RawLiteral* const literal) { 352 int32_t cursor = GetCursorOffset(); 353 uint32_t where = cursor + GetArchitectureStatePCOffset(); 354 // Emit the instruction, via the assembler 355 { 356 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 357 instr_callback.emit(this, literal); 358 } 359 if (!literal->IsManuallyPlaced()) { 360 if (IsInsertTooFar(literal, where)) { 361 // The instruction's data is too far: revert the emission 362 GetBuffer()->Rewind(cursor); 363 literal->InvalidateLastForwardReference(RawLiteral::kNoUpdateNecessary); 364 EmitLiteralPool(kBranchRequired); 365 AllowAssemblerEmissionScope allow_scope(this, 366 kMaxInstructionSizeInBytes); 367 instr_callback.emit(this, literal); 368 } 369 literal_pool_manager_.GetLiteralPool()->AddLiteral(literal); 370 literal_pool_manager_.UpdateCheckpoint(literal); 371 } 372 } 373 374 public: 375 explicit MacroAssembler(InstructionSet isa = A32) 376 : Assembler(isa), 377 available_(r12), 378 checkpoint_(Label::kMaxOffset), 379 literal_pool_manager_(this), 380 veneer_pool_manager_(this), 381 generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) { 382 SetAllowAssembler(false); 383#ifdef VIXL_DEBUG 384 SetAllowMacroInstructions(true); 385#else 386 USE(literal_pool_manager_); 387 USE(allow_macro_instructions_); 388#endif 389 ComputeCheckpoint(); 390 } 391 explicit MacroAssembler(size_t size, InstructionSet isa = A32) 392 : Assembler(size, isa), 393 available_(r12), 394 checkpoint_(Label::kMaxOffset), 395 literal_pool_manager_(this), 396 veneer_pool_manager_(this), 397 generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) { 398 SetAllowAssembler(false); 399#ifdef VIXL_DEBUG 400 SetAllowMacroInstructions(true); 401#endif 402 ComputeCheckpoint(); 403 } 404 MacroAssembler(byte* buffer, size_t size, InstructionSet isa = A32) 405 : Assembler(buffer, size, isa), 406 available_(r12), 407 checkpoint_(Label::kMaxOffset), 408 literal_pool_manager_(this), 409 veneer_pool_manager_(this), 410 generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE) { 411 SetAllowAssembler(false); 412#ifdef VIXL_DEBUG 413 SetAllowMacroInstructions(true); 414#endif 415 ComputeCheckpoint(); 416 } 417 418 bool GenerateSimulatorCode() const { return generate_simulator_code_; } 419 420#ifdef VIXL_DEBUG 421 // Tell whether any of the macro instruction can be used. When false the 422 // MacroAssembler will assert if a method which can emit a variable number 423 // of instructions is called. 424 void SetAllowMacroInstructions(bool value) { 425 allow_macro_instructions_ = value; 426 } 427 bool AllowMacroInstructions() const { return allow_macro_instructions_; } 428#endif 429 430 void FinalizeCode() { 431 EmitLiteralPool(kNoBranchRequired); 432 Assembler::FinalizeCode(); 433 } 434 435 RegisterList* GetScratchRegisterList() { return &available_; } 436 VRegisterList* GetScratchVRegisterList() { return &available_vfp_; } 437 438 // State and type helpers. 439 bool IsModifiedImmediate(uint32_t imm) { 440 return (IsUsingT32() && ImmediateT32(imm).IsValid()) || 441 ImmediateA32(imm).IsValid(); 442 } 443 444 void Bind(Label* label) { 445 VIXL_ASSERT(allow_macro_instructions_); 446 PadToMinimumBranchRange(label); 447 BindHelper(label); 448 } 449 450 void AddBranchLabel(Label* label) { 451 if (label->IsBound()) return; 452 veneer_pool_manager_.AddLabel(label); 453 } 454 455 void Place(RawLiteral* literal) { 456 VIXL_ASSERT(allow_macro_instructions_); 457 VIXL_ASSERT(literal->IsManuallyPlaced()); 458 // We have two calls to `GetBuffer()->Align()` below, that aligns on word 459 // (4 bytes) boundaries. Only one is taken into account in 460 // `GetAlignedSize()`. 461 static const size_t kMaxAlignSize = 3; 462 size_t size = literal->GetAlignedSize() + kMaxAlignSize; 463 VIXL_ASSERT(IsUint32(size)); 464 // TODO: We should use a scope here to check the size of data emitted. We 465 // currently cannot because `aarch32::CodeBufferCheckScope` currently checks 466 // for pools, so that could lead to an infinite loop. 467 EnsureEmitFor(static_cast<uint32_t>(size)); 468 // Literals must be emitted aligned on word (4 bytes) boundaries. 469 GetBuffer()->Align(); 470 PlaceHelper(literal); 471 GetBuffer()->Align(); 472 } 473 474 void ComputeCheckpoint(); 475 476 int32_t GetMarginBeforeVeneerEmission() const { 477 return veneer_pool_manager_.GetCheckpoint() - GetCursorOffset(); 478 } 479 480 int32_t GetMarginBeforeLiteralEmission() const { 481 return literal_pool_manager_.GetCheckpoint() - GetCursorOffset(); 482 } 483 484 bool VeneerPoolIsEmpty() const { return veneer_pool_manager_.IsEmpty(); } 485 bool LiteralPoolIsEmpty() const { return literal_pool_manager_.IsEmpty(); } 486 487 void EnsureEmitFor(uint32_t size) { 488 Label::Offset target = GetCursorOffset() + size; 489 if (target <= checkpoint_) return; 490 PerformEnsureEmit(target, size); 491 } 492 493 bool IsInsertTooFar(RawLiteral* literal, uint32_t where) { 494 return literal_pool_manager_.IsInsertTooFar(literal, where); 495 } 496 497 bool AliasesAvailableScratchRegister(Register reg) { 498 return GetScratchRegisterList()->Includes(reg); 499 } 500 501 bool AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg) { 502 if (reg.IsAPSR_nzcv()) return false; 503 return GetScratchRegisterList()->Includes(reg.AsRegister()); 504 } 505 506 bool AliasesAvailableScratchRegister(VRegister reg) { 507 return GetScratchVRegisterList()->IncludesAliasOf(reg); 508 } 509 510 bool AliasesAvailableScratchRegister(const Operand& operand) { 511 if (operand.IsImmediate()) return false; 512 return AliasesAvailableScratchRegister(operand.GetBaseRegister()) || 513 (operand.IsRegisterShiftedRegister() && 514 AliasesAvailableScratchRegister(operand.GetShiftRegister())); 515 } 516 517 bool AliasesAvailableScratchRegister(const NeonOperand& operand) { 518 if (operand.IsImmediate()) return false; 519 return AliasesAvailableScratchRegister(operand.GetRegister()); 520 } 521 522 bool AliasesAvailableScratchRegister(SRegisterList list) { 523 for (int n = 0; n < list.GetLength(); n++) { 524 if (AliasesAvailableScratchRegister(list.GetSRegister(n))) return true; 525 } 526 return false; 527 } 528 529 bool AliasesAvailableScratchRegister(DRegisterList list) { 530 for (int n = 0; n < list.GetLength(); n++) { 531 if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true; 532 } 533 return false; 534 } 535 536 bool AliasesAvailableScratchRegister(NeonRegisterList list) { 537 for (int n = 0; n < list.GetLength(); n++) { 538 if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true; 539 } 540 return false; 541 } 542 543 bool AliasesAvailableScratchRegister(RegisterList list) { 544 return GetScratchRegisterList()->Overlaps(list); 545 } 546 547 bool AliasesAvailableScratchRegister(const MemOperand& operand) { 548 return AliasesAvailableScratchRegister(operand.GetBaseRegister()) || 549 (operand.IsShiftedRegister() && 550 AliasesAvailableScratchRegister(operand.GetOffsetRegister())); 551 } 552 553 // Emit the literal pool in the code buffer. 554 // Every literal is placed on a 32bit boundary 555 // All the literals in the pool will be removed from the pool and potentially 556 // delete'd. 557 void EmitLiteralPool(LiteralPool* const literal_pool, EmitOption option) { 558 if (literal_pool->GetSize() > 0) { 559#ifdef VIXL_DEBUG 560 for (LiteralPool::RawLiteralListIterator literal_it = 561 literal_pool->GetFirst(); 562 literal_it != literal_pool->GetEnd(); 563 literal_it++) { 564 RawLiteral* literal = *literal_it; 565 VIXL_ASSERT(GetCursorOffset() < literal->GetCheckpoint()); 566 } 567#endif 568 Label after_literal; 569 if (option == kBranchRequired) { 570 GetBuffer()->EnsureSpaceFor(kMaxInstructionSizeInBytes); 571#ifdef VIXL_DEBUG 572 bool save_assembler_state = AllowAssembler(); 573 SetAllowAssembler(true); 574#endif 575 b(&after_literal); 576#ifdef VIXL_DEBUG 577 SetAllowAssembler(save_assembler_state); 578#endif 579 } 580 GetBuffer()->Align(); 581 GetBuffer()->EnsureSpaceFor(literal_pool->GetSize()); 582 for (LiteralPool::RawLiteralListIterator it = literal_pool->GetFirst(); 583 it != literal_pool->GetEnd(); 584 it++) { 585 PlaceHelper(*it); 586 GetBuffer()->Align(); 587 } 588 if (option == kBranchRequired) BindHelper(&after_literal); 589 literal_pool->Clear(); 590 } 591 } 592 void EmitLiteralPool(EmitOption option = kBranchRequired) { 593 EmitLiteralPool(literal_pool_manager_.GetLiteralPool(), option); 594 literal_pool_manager_.ResetCheckpoint(); 595 ComputeCheckpoint(); 596 } 597 598 size_t GetLiteralPoolSize() const { 599 return literal_pool_manager_.GetLiteralPoolSize(); 600 } 601 602 // Adr with a literal already constructed. Add the literal to the pool if it 603 // is not already done. 604 void Adr(Condition cond, Register rd, RawLiteral* literal) { 605 EmitLiteralCondRL<&Assembler::adr> emit_helper(cond, rd); 606 GenerateInstruction(emit_helper, literal); 607 } 608 void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); } 609 610 // Loads with literals already constructed. Add the literal to the pool 611 // if it is not already done. 612 void Ldr(Condition cond, Register rt, RawLiteral* literal) { 613 EmitLiteralCondRL<&Assembler::ldr> emit_helper(cond, rt); 614 GenerateInstruction(emit_helper, literal); 615 } 616 void Ldr(Register rt, RawLiteral* literal) { Ldr(al, rt, literal); } 617 618 void Ldrb(Condition cond, Register rt, RawLiteral* literal) { 619 EmitLiteralCondRL<&Assembler::ldrb> emit_helper(cond, rt); 620 GenerateInstruction(emit_helper, literal); 621 } 622 void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); } 623 624 void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) { 625 EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(cond, rt, rt2); 626 GenerateInstruction(emit_helper, literal); 627 } 628 void Ldrd(Register rt, Register rt2, RawLiteral* literal) { 629 Ldrd(al, rt, rt2, literal); 630 } 631 632 void Ldrh(Condition cond, Register rt, RawLiteral* literal) { 633 EmitLiteralCondRL<&Assembler::ldrh> emit_helper(cond, rt); 634 GenerateInstruction(emit_helper, literal); 635 } 636 void Ldrh(Register rt, RawLiteral* literal) { Ldrh(al, rt, literal); } 637 638 void Ldrsb(Condition cond, Register rt, RawLiteral* literal) { 639 EmitLiteralCondRL<&Assembler::ldrsb> emit_helper(cond, rt); 640 GenerateInstruction(emit_helper, literal); 641 } 642 void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); } 643 644 void Ldrsh(Condition cond, Register rt, RawLiteral* literal) { 645 EmitLiteralCondRL<&Assembler::ldrsh> emit_helper(cond, rt); 646 GenerateInstruction(emit_helper, literal); 647 } 648 void Ldrsh(Register rt, RawLiteral* literal) { Ldrsh(al, rt, literal); } 649 650 void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) { 651 EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(cond, dt, rd); 652 GenerateInstruction(emit_helper, literal); 653 } 654 void Vldr(DataType dt, DRegister rd, RawLiteral* literal) { 655 Vldr(al, dt, rd, literal); 656 } 657 void Vldr(Condition cond, DRegister rd, RawLiteral* literal) { 658 Vldr(cond, Untyped64, rd, literal); 659 } 660 void Vldr(DRegister rd, RawLiteral* literal) { 661 Vldr(al, Untyped64, rd, literal); 662 } 663 664 void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) { 665 EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(cond, dt, rd); 666 GenerateInstruction(emit_helper, literal); 667 } 668 void Vldr(DataType dt, SRegister rd, RawLiteral* literal) { 669 Vldr(al, dt, rd, literal); 670 } 671 void Vldr(Condition cond, SRegister rd, RawLiteral* literal) { 672 Vldr(cond, Untyped32, rd, literal); 673 } 674 void Vldr(SRegister rd, RawLiteral* literal) { 675 Vldr(al, Untyped32, rd, literal); 676 } 677 678 // Generic Ldr(register, data) 679 void Ldr(Condition cond, Register rt, uint32_t v) { 680 RawLiteral* literal = 681 new Literal<uint32_t>(v, RawLiteral::kDeletedOnPlacementByPool); 682 EmitLiteralCondRL<&Assembler::ldr> emit_helper(cond, rt); 683 GenerateInstruction(emit_helper, literal); 684 } 685 template <typename T> 686 void Ldr(Register rt, T v) { 687 Ldr(al, rt, v); 688 } 689 690 // Generic Ldrd(rt, rt2, data) 691 void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) { 692 RawLiteral* literal = 693 new Literal<uint64_t>(v, RawLiteral::kDeletedOnPlacementByPool); 694 EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(cond, rt, rt2); 695 GenerateInstruction(emit_helper, literal); 696 } 697 template <typename T> 698 void Ldrd(Register rt, Register rt2, T v) { 699 Ldrd(al, rt, rt2, v); 700 } 701 702 void Vldr(Condition cond, SRegister rd, float v) { 703 RawLiteral* literal = 704 new Literal<float>(v, RawLiteral::kDeletedOnPlacementByPool); 705 EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(cond, Untyped32, rd); 706 GenerateInstruction(emit_helper, literal); 707 } 708 void Vldr(SRegister rd, float v) { Vldr(al, rd, v); } 709 710 void Vldr(Condition cond, DRegister rd, double v) { 711 RawLiteral* literal = 712 new Literal<double>(v, RawLiteral::kDeletedOnPlacementByPool); 713 EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(cond, Untyped64, rd); 714 GenerateInstruction(emit_helper, literal); 715 } 716 void Vldr(DRegister rd, double v) { Vldr(al, rd, v); } 717 718 void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); } 719 void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); } 720 void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); } 721 void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); } 722 723 void Switch(Register reg, JumpTableBase* table); 724 void GenerateSwitchTable(JumpTableBase* table, int table_size); 725 void Case(JumpTableBase* table, int case_index); 726 void Break(JumpTableBase* table); 727 void Default(JumpTableBase* table); 728 void EndSwitch(JumpTableBase* table); 729 730 // Claim memory on the stack. 731 // Note that the Claim, Drop, and Peek helpers below ensure that offsets used 732 // are multiples of 32 bits to help maintain 32-bit SP alignment. 733 // We could `Align{Up,Down}(size, 4)`, but that's potentially problematic: 734 // Claim(3) 735 // Claim(1) 736 // Drop(4) 737 // would seem correct, when in fact: 738 // Claim(3) -> sp = sp - 4 739 // Claim(1) -> sp = sp - 4 740 // Drop(4) -> sp = sp + 4 741 // 742 void Claim(int32_t size) { 743 if (size == 0) return; 744 // The stack must be kept 32bit aligned. 745 VIXL_ASSERT((size > 0) && ((size % 4) == 0)); 746 Sub(sp, sp, size); 747 } 748 // Release memory on the stack 749 void Drop(int32_t size) { 750 if (size == 0) return; 751 // The stack must be kept 32bit aligned. 752 VIXL_ASSERT((size > 0) && ((size % 4) == 0)); 753 Add(sp, sp, size); 754 } 755 void Peek(Register dst, int32_t offset) { 756 VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0)); 757 Ldr(dst, MemOperand(sp, offset)); 758 } 759 void Poke(Register src, int32_t offset) { 760 VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0)); 761 Str(src, MemOperand(sp, offset)); 762 } 763 void Printf(const char* format, 764 CPURegister reg1 = NoReg, 765 CPURegister reg2 = NoReg, 766 CPURegister reg3 = NoReg, 767 CPURegister reg4 = NoReg); 768 // Functions used by Printf for generation. 769 void PushRegister(CPURegister reg); 770 void PreparePrintfArgument(CPURegister reg, 771 int* core_count, 772 int* vfp_count, 773 uint32_t* printf_type); 774 // Handlers for cases not handled by the assembler. 775 virtual void Delegate(InstructionType type, 776 InstructionCondROp instruction, 777 Condition cond, 778 Register rn, 779 const Operand& operand) VIXL_OVERRIDE; 780 virtual void Delegate(InstructionType type, 781 InstructionCondSizeROp instruction, 782 Condition cond, 783 EncodingSize size, 784 Register rn, 785 const Operand& operand) VIXL_OVERRIDE; 786 virtual void Delegate(InstructionType type, 787 InstructionCondRROp instruction, 788 Condition cond, 789 Register rd, 790 Register rn, 791 const Operand& operand) VIXL_OVERRIDE; 792 virtual void Delegate(InstructionType type, 793 InstructionCondSizeRROp instruction, 794 Condition cond, 795 EncodingSize size, 796 Register rd, 797 Register rn, 798 const Operand& operand) VIXL_OVERRIDE; 799 virtual void Delegate(InstructionType type, 800 InstructionRL instruction, 801 Register rn, 802 Label* label) VIXL_OVERRIDE; 803 virtual void Delegate(InstructionType type, 804 InstructionCondDtSSop instruction, 805 Condition cond, 806 DataType dt, 807 SRegister rd, 808 const SOperand& operand) VIXL_OVERRIDE; 809 virtual void Delegate(InstructionType type, 810 InstructionCondDtDDop instruction, 811 Condition cond, 812 DataType dt, 813 DRegister rd, 814 const DOperand& operand) VIXL_OVERRIDE; 815 virtual void Delegate(InstructionType type, 816 InstructionCondDtQQop instruction, 817 Condition cond, 818 DataType dt, 819 QRegister rd, 820 const QOperand& operand) VIXL_OVERRIDE; 821 virtual void Delegate(InstructionType type, 822 InstructionCondSizeRMop instruction, 823 Condition cond, 824 EncodingSize size, 825 Register rd, 826 const MemOperand& operand) VIXL_OVERRIDE; 827 virtual void Delegate(InstructionType type, 828 InstructionCondRRMop instruction, 829 Condition cond, 830 Register rt, 831 Register rt2, 832 const MemOperand& operand) VIXL_OVERRIDE; 833 virtual void Delegate(InstructionType type, 834 InstructionCondDtSMop instruction, 835 Condition cond, 836 DataType dt, 837 SRegister rd, 838 const MemOperand& operand) VIXL_OVERRIDE; 839 virtual void Delegate(InstructionType type, 840 InstructionCondDtDMop instruction, 841 Condition cond, 842 DataType dt, 843 DRegister rd, 844 const MemOperand& operand) VIXL_OVERRIDE; 845 virtual void Delegate(InstructionType type, 846 InstructionCondMsrOp instruction, 847 Condition cond, 848 MaskedSpecialRegister spec_reg, 849 const Operand& operand) VIXL_OVERRIDE; 850 851 // Start of generated code. 852 853 void Adc(Condition cond, Register rd, Register rn, const Operand& operand) { 854 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 856 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 857 VIXL_ASSERT(allow_macro_instructions_); 858 VIXL_ASSERT(OutsideITBlock()); 859 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 860 bool can_use_it = 861 // ADC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 862 operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) && 863 operand.GetBaseRegister().IsLow(); 864 ITScope it_scope(this, &cond, can_use_it); 865 adc(cond, rd, rn, operand); 866 } 867 void Adc(Register rd, Register rn, const Operand& operand) { 868 Adc(al, rd, rn, operand); 869 } 870 void Adc(FlagsUpdate flags, 871 Condition cond, 872 Register rd, 873 Register rn, 874 const Operand& operand) { 875 switch (flags) { 876 case LeaveFlags: 877 Adc(cond, rd, rn, operand); 878 break; 879 case SetFlags: 880 Adcs(cond, rd, rn, operand); 881 break; 882 case DontCare: 883 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 884 rn.Is(rd) && operand.IsPlainRegister() && 885 operand.GetBaseRegister().IsLow(); 886 if (can_be_16bit_encoded) { 887 Adcs(cond, rd, rn, operand); 888 } else { 889 Adc(cond, rd, rn, operand); 890 } 891 break; 892 } 893 } 894 void Adc(FlagsUpdate flags, 895 Register rd, 896 Register rn, 897 const Operand& operand) { 898 Adc(flags, al, rd, rn, operand); 899 } 900 901 void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) { 902 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 903 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 904 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 905 VIXL_ASSERT(allow_macro_instructions_); 906 VIXL_ASSERT(OutsideITBlock()); 907 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 908 ITScope it_scope(this, &cond); 909 adcs(cond, rd, rn, operand); 910 } 911 void Adcs(Register rd, Register rn, const Operand& operand) { 912 Adcs(al, rd, rn, operand); 913 } 914 915 void Add(Condition cond, Register rd, Register rn, const Operand& operand) { 916 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 917 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 918 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 919 VIXL_ASSERT(allow_macro_instructions_); 920 VIXL_ASSERT(OutsideITBlock()); 921 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 922 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) { 923 uint32_t immediate = operand.GetImmediate(); 924 if (immediate == 0) { 925 return; 926 } 927 } 928 bool can_use_it = 929 // ADD<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1 930 (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() && 931 rd.IsLow()) || 932 // ADD<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2 933 (operand.IsImmediate() && (operand.GetImmediate() <= 255) && 934 rd.IsLow() && rn.Is(rd)) || 935 // ADD{<c>}{<q>} <Rd>, SP, #<imm8> ; T1 936 (operand.IsImmediate() && (operand.GetImmediate() <= 508) && 937 ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) || 938 // ADD<c>{<q>} <Rd>, <Rn>, <Rm> 939 (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 940 operand.GetBaseRegister().IsLow()) || 941 // ADD<c>{<q>} <Rdn>, <Rm> ; T2 942 (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) && 943 !operand.GetBaseRegister().IsSP() && 944 !operand.GetBaseRegister().IsPC()) || 945 // ADD{<c>}{<q>} {<Rdm>,} SP, <Rdm> ; T1 946 (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() && 947 operand.GetBaseRegister().Is(rd)); 948 ITScope it_scope(this, &cond, can_use_it); 949 add(cond, rd, rn, operand); 950 } 951 void Add(Register rd, Register rn, const Operand& operand) { 952 Add(al, rd, rn, operand); 953 } 954 void Add(FlagsUpdate flags, 955 Condition cond, 956 Register rd, 957 Register rn, 958 const Operand& operand) { 959 switch (flags) { 960 case LeaveFlags: 961 Add(cond, rd, rn, operand); 962 break; 963 case SetFlags: 964 Adds(cond, rd, rn, operand); 965 break; 966 case DontCare: 967 bool can_be_16bit_encoded = 968 IsUsingT32() && cond.Is(al) && 969 ((operand.IsPlainRegister() && 970 ((rd.IsLow() && rn.IsLow() && 971 operand.GetBaseRegister().IsLow()) || 972 rd.Is(rn))) || 973 (operand.IsImmediate() && 974 ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) || 975 (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256))))); 976 if (can_be_16bit_encoded) { 977 Adds(cond, rd, rn, operand); 978 } else { 979 Add(cond, rd, rn, operand); 980 } 981 break; 982 } 983 } 984 void Add(FlagsUpdate flags, 985 Register rd, 986 Register rn, 987 const Operand& operand) { 988 Add(flags, al, rd, rn, operand); 989 } 990 991 void Adds(Condition cond, Register rd, Register rn, const Operand& operand) { 992 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 993 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 994 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 995 VIXL_ASSERT(allow_macro_instructions_); 996 VIXL_ASSERT(OutsideITBlock()); 997 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 998 ITScope it_scope(this, &cond); 999 adds(cond, rd, rn, operand); 1000 } 1001 void Adds(Register rd, Register rn, const Operand& operand) { 1002 Adds(al, rd, rn, operand); 1003 } 1004 1005 1006 void Adr(Condition cond, Register rd, Label* label) { 1007 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1008 VIXL_ASSERT(allow_macro_instructions_); 1009 VIXL_ASSERT(OutsideITBlock()); 1010 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1011 ITScope it_scope(this, &cond); 1012 adr(cond, rd, label); 1013 } 1014 void Adr(Register rd, Label* label) { Adr(al, rd, label); } 1015 1016 void And(Condition cond, Register rd, Register rn, const Operand& operand) { 1017 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1018 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1019 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1020 VIXL_ASSERT(allow_macro_instructions_); 1021 VIXL_ASSERT(OutsideITBlock()); 1022 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1023 if (cond.Is(al) && operand.IsImmediate()) { 1024 uint32_t immediate = operand.GetImmediate(); 1025 if (immediate == 0) { 1026 mov(rd, 0); 1027 return; 1028 } 1029 if ((immediate == 0xffffffff) && rd.Is(rn)) { 1030 return; 1031 } 1032 } 1033 bool can_use_it = 1034 // AND<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 1035 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 1036 operand.GetBaseRegister().IsLow(); 1037 ITScope it_scope(this, &cond, can_use_it); 1038 and_(cond, rd, rn, operand); 1039 } 1040 void And(Register rd, Register rn, const Operand& operand) { 1041 And(al, rd, rn, operand); 1042 } 1043 void And(FlagsUpdate flags, 1044 Condition cond, 1045 Register rd, 1046 Register rn, 1047 const Operand& operand) { 1048 switch (flags) { 1049 case LeaveFlags: 1050 And(cond, rd, rn, operand); 1051 break; 1052 case SetFlags: 1053 Ands(cond, rd, rn, operand); 1054 break; 1055 case DontCare: 1056 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1057 rn.Is(rd) && operand.IsPlainRegister() && 1058 operand.GetBaseRegister().IsLow(); 1059 if (can_be_16bit_encoded) { 1060 Ands(cond, rd, rn, operand); 1061 } else { 1062 And(cond, rd, rn, operand); 1063 } 1064 break; 1065 } 1066 } 1067 void And(FlagsUpdate flags, 1068 Register rd, 1069 Register rn, 1070 const Operand& operand) { 1071 And(flags, al, rd, rn, operand); 1072 } 1073 1074 void Ands(Condition cond, Register rd, Register rn, const Operand& operand) { 1075 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1076 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1077 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1078 VIXL_ASSERT(allow_macro_instructions_); 1079 VIXL_ASSERT(OutsideITBlock()); 1080 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1081 ITScope it_scope(this, &cond); 1082 ands(cond, rd, rn, operand); 1083 } 1084 void Ands(Register rd, Register rn, const Operand& operand) { 1085 Ands(al, rd, rn, operand); 1086 } 1087 1088 void Asr(Condition cond, Register rd, Register rm, const Operand& operand) { 1089 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1090 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1091 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1092 VIXL_ASSERT(allow_macro_instructions_); 1093 VIXL_ASSERT(OutsideITBlock()); 1094 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1095 bool can_use_it = 1096 // ASR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2 1097 (operand.IsImmediate() && (operand.GetImmediate() >= 1) && 1098 (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) || 1099 // ASR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 1100 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 1101 operand.GetBaseRegister().IsLow()); 1102 ITScope it_scope(this, &cond, can_use_it); 1103 asr(cond, rd, rm, operand); 1104 } 1105 void Asr(Register rd, Register rm, const Operand& operand) { 1106 Asr(al, rd, rm, operand); 1107 } 1108 void Asr(FlagsUpdate flags, 1109 Condition cond, 1110 Register rd, 1111 Register rm, 1112 const Operand& operand) { 1113 switch (flags) { 1114 case LeaveFlags: 1115 Asr(cond, rd, rm, operand); 1116 break; 1117 case SetFlags: 1118 Asrs(cond, rd, rm, operand); 1119 break; 1120 case DontCare: 1121 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1122 rm.IsLow() && operand.IsImmediate() && 1123 (operand.GetImmediate() < 32); 1124 if (can_be_16bit_encoded) { 1125 Asrs(cond, rd, rm, operand); 1126 } else { 1127 Asr(cond, rd, rm, operand); 1128 } 1129 break; 1130 } 1131 } 1132 void Asr(FlagsUpdate flags, 1133 Register rd, 1134 Register rm, 1135 const Operand& operand) { 1136 Asr(flags, al, rd, rm, operand); 1137 } 1138 1139 void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) { 1140 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1141 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1142 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1143 VIXL_ASSERT(allow_macro_instructions_); 1144 VIXL_ASSERT(OutsideITBlock()); 1145 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1146 ITScope it_scope(this, &cond); 1147 asrs(cond, rd, rm, operand); 1148 } 1149 void Asrs(Register rd, Register rm, const Operand& operand) { 1150 Asrs(al, rd, rm, operand); 1151 } 1152 1153 void B(Condition cond, Label* label) { 1154 VIXL_ASSERT(allow_macro_instructions_); 1155 VIXL_ASSERT(OutsideITBlock()); 1156 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1157 b(cond, label); 1158 AddBranchLabel(label); 1159 } 1160 void B(Label* label) { B(al, label); } 1161 1162 void Bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand) { 1163 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1164 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1165 VIXL_ASSERT(allow_macro_instructions_); 1166 VIXL_ASSERT(OutsideITBlock()); 1167 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1168 ITScope it_scope(this, &cond); 1169 bfc(cond, rd, lsb, operand); 1170 } 1171 void Bfc(Register rd, uint32_t lsb, const Operand& operand) { 1172 Bfc(al, rd, lsb, operand); 1173 } 1174 1175 void Bfi(Condition cond, 1176 Register rd, 1177 Register rn, 1178 uint32_t lsb, 1179 const Operand& operand) { 1180 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1181 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1182 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1183 VIXL_ASSERT(allow_macro_instructions_); 1184 VIXL_ASSERT(OutsideITBlock()); 1185 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1186 ITScope it_scope(this, &cond); 1187 bfi(cond, rd, rn, lsb, operand); 1188 } 1189 void Bfi(Register rd, Register rn, uint32_t lsb, const Operand& operand) { 1190 Bfi(al, rd, rn, lsb, operand); 1191 } 1192 1193 void Bic(Condition cond, Register rd, Register rn, const Operand& operand) { 1194 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1195 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1196 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1197 VIXL_ASSERT(allow_macro_instructions_); 1198 VIXL_ASSERT(OutsideITBlock()); 1199 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1200 if (cond.Is(al) && operand.IsImmediate()) { 1201 uint32_t immediate = operand.GetImmediate(); 1202 if ((immediate == 0) && rd.Is(rn)) { 1203 return; 1204 } 1205 if (immediate == 0xffffffff) { 1206 mov(rd, 0); 1207 return; 1208 } 1209 } 1210 bool can_use_it = 1211 // BIC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 1212 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 1213 operand.GetBaseRegister().IsLow(); 1214 ITScope it_scope(this, &cond, can_use_it); 1215 bic(cond, rd, rn, operand); 1216 } 1217 void Bic(Register rd, Register rn, const Operand& operand) { 1218 Bic(al, rd, rn, operand); 1219 } 1220 void Bic(FlagsUpdate flags, 1221 Condition cond, 1222 Register rd, 1223 Register rn, 1224 const Operand& operand) { 1225 switch (flags) { 1226 case LeaveFlags: 1227 Bic(cond, rd, rn, operand); 1228 break; 1229 case SetFlags: 1230 Bics(cond, rd, rn, operand); 1231 break; 1232 case DontCare: 1233 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1234 rn.Is(rd) && operand.IsPlainRegister() && 1235 operand.GetBaseRegister().IsLow(); 1236 if (can_be_16bit_encoded) { 1237 Bics(cond, rd, rn, operand); 1238 } else { 1239 Bic(cond, rd, rn, operand); 1240 } 1241 break; 1242 } 1243 } 1244 void Bic(FlagsUpdate flags, 1245 Register rd, 1246 Register rn, 1247 const Operand& operand) { 1248 Bic(flags, al, rd, rn, operand); 1249 } 1250 1251 void Bics(Condition cond, Register rd, Register rn, const Operand& operand) { 1252 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1253 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1254 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1255 VIXL_ASSERT(allow_macro_instructions_); 1256 VIXL_ASSERT(OutsideITBlock()); 1257 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1258 ITScope it_scope(this, &cond); 1259 bics(cond, rd, rn, operand); 1260 } 1261 void Bics(Register rd, Register rn, const Operand& operand) { 1262 Bics(al, rd, rn, operand); 1263 } 1264 1265 void Bkpt(Condition cond, uint32_t imm) { 1266 VIXL_ASSERT(allow_macro_instructions_); 1267 VIXL_ASSERT(OutsideITBlock()); 1268 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1269 ITScope it_scope(this, &cond); 1270 bkpt(cond, imm); 1271 } 1272 void Bkpt(uint32_t imm) { Bkpt(al, imm); } 1273 1274 void Bl(Condition cond, Label* label) { 1275 VIXL_ASSERT(allow_macro_instructions_); 1276 VIXL_ASSERT(OutsideITBlock()); 1277 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1278 ITScope it_scope(this, &cond); 1279 bl(cond, label); 1280 AddBranchLabel(label); 1281 } 1282 void Bl(Label* label) { Bl(al, label); } 1283 1284 void Blx(Condition cond, Label* label) { 1285 VIXL_ASSERT(allow_macro_instructions_); 1286 VIXL_ASSERT(OutsideITBlock()); 1287 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1288 ITScope it_scope(this, &cond); 1289 blx(cond, label); 1290 AddBranchLabel(label); 1291 } 1292 void Blx(Label* label) { Blx(al, label); } 1293 1294 void Blx(Condition cond, Register rm) { 1295 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1296 VIXL_ASSERT(allow_macro_instructions_); 1297 VIXL_ASSERT(OutsideITBlock()); 1298 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1299 bool can_use_it = 1300 // BLX{<c>}{<q>} <Rm> ; T1 1301 !rm.IsPC(); 1302 ITScope it_scope(this, &cond, can_use_it); 1303 blx(cond, rm); 1304 } 1305 void Blx(Register rm) { Blx(al, rm); } 1306 1307 void Bx(Condition cond, Register rm) { 1308 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1309 VIXL_ASSERT(allow_macro_instructions_); 1310 VIXL_ASSERT(OutsideITBlock()); 1311 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1312 bool can_use_it = 1313 // BX{<c>}{<q>} <Rm> ; T1 1314 !rm.IsPC(); 1315 ITScope it_scope(this, &cond, can_use_it); 1316 bx(cond, rm); 1317 } 1318 void Bx(Register rm) { Bx(al, rm); } 1319 1320 void Bxj(Condition cond, Register rm) { 1321 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1322 VIXL_ASSERT(allow_macro_instructions_); 1323 VIXL_ASSERT(OutsideITBlock()); 1324 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1325 ITScope it_scope(this, &cond); 1326 bxj(cond, rm); 1327 } 1328 void Bxj(Register rm) { Bxj(al, rm); } 1329 1330 void Cbnz(Register rn, Label* label) { 1331 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1332 VIXL_ASSERT(allow_macro_instructions_); 1333 VIXL_ASSERT(OutsideITBlock()); 1334 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1335 cbnz(rn, label); 1336 AddBranchLabel(label); 1337 } 1338 1339 void Cbz(Register rn, Label* label) { 1340 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1341 VIXL_ASSERT(allow_macro_instructions_); 1342 VIXL_ASSERT(OutsideITBlock()); 1343 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1344 cbz(rn, label); 1345 AddBranchLabel(label); 1346 } 1347 1348 void Clrex(Condition cond) { 1349 VIXL_ASSERT(allow_macro_instructions_); 1350 VIXL_ASSERT(OutsideITBlock()); 1351 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1352 ITScope it_scope(this, &cond); 1353 clrex(cond); 1354 } 1355 void Clrex() { Clrex(al); } 1356 1357 void Clz(Condition cond, Register rd, Register rm) { 1358 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1359 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1360 VIXL_ASSERT(allow_macro_instructions_); 1361 VIXL_ASSERT(OutsideITBlock()); 1362 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1363 ITScope it_scope(this, &cond); 1364 clz(cond, rd, rm); 1365 } 1366 void Clz(Register rd, Register rm) { Clz(al, rd, rm); } 1367 1368 void Cmn(Condition cond, Register rn, const Operand& operand) { 1369 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1370 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1371 VIXL_ASSERT(allow_macro_instructions_); 1372 VIXL_ASSERT(OutsideITBlock()); 1373 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1374 bool can_use_it = 1375 // CMN{<c>}{<q>} <Rn>, <Rm> ; T1 1376 operand.IsPlainRegister() && rn.IsLow() && 1377 operand.GetBaseRegister().IsLow(); 1378 ITScope it_scope(this, &cond, can_use_it); 1379 cmn(cond, rn, operand); 1380 } 1381 void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); } 1382 1383 void Cmp(Condition cond, Register rn, const Operand& operand) { 1384 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1385 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1386 VIXL_ASSERT(allow_macro_instructions_); 1387 VIXL_ASSERT(OutsideITBlock()); 1388 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1389 bool can_use_it = 1390 // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1 1391 (operand.IsImmediate() && (operand.GetImmediate() <= 255) && 1392 rn.IsLow()) || 1393 // CMP{<c>}{<q>} <Rn>, <Rm> ; T1 T2 1394 (operand.IsPlainRegister() && !rn.IsPC() && 1395 !operand.GetBaseRegister().IsPC()); 1396 ITScope it_scope(this, &cond, can_use_it); 1397 cmp(cond, rn, operand); 1398 } 1399 void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); } 1400 1401 void Crc32b(Condition cond, Register rd, Register rn, Register rm) { 1402 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1403 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1404 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1405 VIXL_ASSERT(allow_macro_instructions_); 1406 VIXL_ASSERT(OutsideITBlock()); 1407 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1408 ITScope it_scope(this, &cond); 1409 crc32b(cond, rd, rn, rm); 1410 } 1411 void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); } 1412 1413 void Crc32cb(Condition cond, Register rd, Register rn, Register rm) { 1414 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1415 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1416 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1417 VIXL_ASSERT(allow_macro_instructions_); 1418 VIXL_ASSERT(OutsideITBlock()); 1419 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1420 ITScope it_scope(this, &cond); 1421 crc32cb(cond, rd, rn, rm); 1422 } 1423 void Crc32cb(Register rd, Register rn, Register rm) { 1424 Crc32cb(al, rd, rn, rm); 1425 } 1426 1427 void Crc32ch(Condition cond, Register rd, Register rn, Register rm) { 1428 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1429 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1430 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1431 VIXL_ASSERT(allow_macro_instructions_); 1432 VIXL_ASSERT(OutsideITBlock()); 1433 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1434 ITScope it_scope(this, &cond); 1435 crc32ch(cond, rd, rn, rm); 1436 } 1437 void Crc32ch(Register rd, Register rn, Register rm) { 1438 Crc32ch(al, rd, rn, rm); 1439 } 1440 1441 void Crc32cw(Condition cond, Register rd, Register rn, Register rm) { 1442 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1443 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1444 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1445 VIXL_ASSERT(allow_macro_instructions_); 1446 VIXL_ASSERT(OutsideITBlock()); 1447 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1448 ITScope it_scope(this, &cond); 1449 crc32cw(cond, rd, rn, rm); 1450 } 1451 void Crc32cw(Register rd, Register rn, Register rm) { 1452 Crc32cw(al, rd, rn, rm); 1453 } 1454 1455 void Crc32h(Condition cond, Register rd, Register rn, Register rm) { 1456 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1457 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1458 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1459 VIXL_ASSERT(allow_macro_instructions_); 1460 VIXL_ASSERT(OutsideITBlock()); 1461 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1462 ITScope it_scope(this, &cond); 1463 crc32h(cond, rd, rn, rm); 1464 } 1465 void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); } 1466 1467 void Crc32w(Condition cond, Register rd, Register rn, Register rm) { 1468 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1469 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1470 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 1471 VIXL_ASSERT(allow_macro_instructions_); 1472 VIXL_ASSERT(OutsideITBlock()); 1473 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1474 ITScope it_scope(this, &cond); 1475 crc32w(cond, rd, rn, rm); 1476 } 1477 void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); } 1478 1479 void Dmb(Condition cond, MemoryBarrier option) { 1480 VIXL_ASSERT(allow_macro_instructions_); 1481 VIXL_ASSERT(OutsideITBlock()); 1482 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1483 ITScope it_scope(this, &cond); 1484 dmb(cond, option); 1485 } 1486 void Dmb(MemoryBarrier option) { Dmb(al, option); } 1487 1488 void Dsb(Condition cond, MemoryBarrier option) { 1489 VIXL_ASSERT(allow_macro_instructions_); 1490 VIXL_ASSERT(OutsideITBlock()); 1491 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1492 ITScope it_scope(this, &cond); 1493 dsb(cond, option); 1494 } 1495 void Dsb(MemoryBarrier option) { Dsb(al, option); } 1496 1497 void Eor(Condition cond, Register rd, Register rn, const Operand& operand) { 1498 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1499 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1500 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1501 VIXL_ASSERT(allow_macro_instructions_); 1502 VIXL_ASSERT(OutsideITBlock()); 1503 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1504 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) { 1505 uint32_t immediate = operand.GetImmediate(); 1506 if (immediate == 0) { 1507 return; 1508 } 1509 if (immediate == 0xffffffff) { 1510 mvn(rd, rn); 1511 return; 1512 } 1513 } 1514 bool can_use_it = 1515 // EOR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 1516 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 1517 operand.GetBaseRegister().IsLow(); 1518 ITScope it_scope(this, &cond, can_use_it); 1519 eor(cond, rd, rn, operand); 1520 } 1521 void Eor(Register rd, Register rn, const Operand& operand) { 1522 Eor(al, rd, rn, operand); 1523 } 1524 void Eor(FlagsUpdate flags, 1525 Condition cond, 1526 Register rd, 1527 Register rn, 1528 const Operand& operand) { 1529 switch (flags) { 1530 case LeaveFlags: 1531 Eor(cond, rd, rn, operand); 1532 break; 1533 case SetFlags: 1534 Eors(cond, rd, rn, operand); 1535 break; 1536 case DontCare: 1537 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 1538 rn.Is(rd) && operand.IsPlainRegister() && 1539 operand.GetBaseRegister().IsLow(); 1540 if (can_be_16bit_encoded) { 1541 Eors(cond, rd, rn, operand); 1542 } else { 1543 Eor(cond, rd, rn, operand); 1544 } 1545 break; 1546 } 1547 } 1548 void Eor(FlagsUpdate flags, 1549 Register rd, 1550 Register rn, 1551 const Operand& operand) { 1552 Eor(flags, al, rd, rn, operand); 1553 } 1554 1555 void Eors(Condition cond, Register rd, Register rn, const Operand& operand) { 1556 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 1557 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1558 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1559 VIXL_ASSERT(allow_macro_instructions_); 1560 VIXL_ASSERT(OutsideITBlock()); 1561 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1562 ITScope it_scope(this, &cond); 1563 eors(cond, rd, rn, operand); 1564 } 1565 void Eors(Register rd, Register rn, const Operand& operand) { 1566 Eors(al, rd, rn, operand); 1567 } 1568 1569 void Fldmdbx(Condition cond, 1570 Register rn, 1571 WriteBack write_back, 1572 DRegisterList dreglist) { 1573 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1574 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1575 VIXL_ASSERT(allow_macro_instructions_); 1576 VIXL_ASSERT(OutsideITBlock()); 1577 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1578 ITScope it_scope(this, &cond); 1579 fldmdbx(cond, rn, write_back, dreglist); 1580 } 1581 void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) { 1582 Fldmdbx(al, rn, write_back, dreglist); 1583 } 1584 1585 void Fldmiax(Condition cond, 1586 Register rn, 1587 WriteBack write_back, 1588 DRegisterList dreglist) { 1589 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1590 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1591 VIXL_ASSERT(allow_macro_instructions_); 1592 VIXL_ASSERT(OutsideITBlock()); 1593 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1594 ITScope it_scope(this, &cond); 1595 fldmiax(cond, rn, write_back, dreglist); 1596 } 1597 void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) { 1598 Fldmiax(al, rn, write_back, dreglist); 1599 } 1600 1601 void Fstmdbx(Condition cond, 1602 Register rn, 1603 WriteBack write_back, 1604 DRegisterList dreglist) { 1605 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1606 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1607 VIXL_ASSERT(allow_macro_instructions_); 1608 VIXL_ASSERT(OutsideITBlock()); 1609 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1610 ITScope it_scope(this, &cond); 1611 fstmdbx(cond, rn, write_back, dreglist); 1612 } 1613 void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) { 1614 Fstmdbx(al, rn, write_back, dreglist); 1615 } 1616 1617 void Fstmiax(Condition cond, 1618 Register rn, 1619 WriteBack write_back, 1620 DRegisterList dreglist) { 1621 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1622 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 1623 VIXL_ASSERT(allow_macro_instructions_); 1624 VIXL_ASSERT(OutsideITBlock()); 1625 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1626 ITScope it_scope(this, &cond); 1627 fstmiax(cond, rn, write_back, dreglist); 1628 } 1629 void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) { 1630 Fstmiax(al, rn, write_back, dreglist); 1631 } 1632 1633 void Hlt(Condition cond, uint32_t imm) { 1634 VIXL_ASSERT(allow_macro_instructions_); 1635 VIXL_ASSERT(OutsideITBlock()); 1636 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1637 ITScope it_scope(this, &cond); 1638 hlt(cond, imm); 1639 } 1640 void Hlt(uint32_t imm) { Hlt(al, imm); } 1641 1642 void Hvc(Condition cond, uint32_t imm) { 1643 VIXL_ASSERT(allow_macro_instructions_); 1644 VIXL_ASSERT(OutsideITBlock()); 1645 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1646 ITScope it_scope(this, &cond); 1647 hvc(cond, imm); 1648 } 1649 void Hvc(uint32_t imm) { Hvc(al, imm); } 1650 1651 void Isb(Condition cond, MemoryBarrier option) { 1652 VIXL_ASSERT(allow_macro_instructions_); 1653 VIXL_ASSERT(OutsideITBlock()); 1654 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1655 ITScope it_scope(this, &cond); 1656 isb(cond, option); 1657 } 1658 void Isb(MemoryBarrier option) { Isb(al, option); } 1659 1660 1661 void Lda(Condition cond, Register rt, const MemOperand& operand) { 1662 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1663 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1664 VIXL_ASSERT(allow_macro_instructions_); 1665 VIXL_ASSERT(OutsideITBlock()); 1666 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1667 ITScope it_scope(this, &cond); 1668 lda(cond, rt, operand); 1669 } 1670 void Lda(Register rt, const MemOperand& operand) { Lda(al, rt, operand); } 1671 1672 void Ldab(Condition cond, Register rt, const MemOperand& operand) { 1673 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1674 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1675 VIXL_ASSERT(allow_macro_instructions_); 1676 VIXL_ASSERT(OutsideITBlock()); 1677 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1678 ITScope it_scope(this, &cond); 1679 ldab(cond, rt, operand); 1680 } 1681 void Ldab(Register rt, const MemOperand& operand) { Ldab(al, rt, operand); } 1682 1683 void Ldaex(Condition cond, Register rt, const MemOperand& operand) { 1684 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1685 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1686 VIXL_ASSERT(allow_macro_instructions_); 1687 VIXL_ASSERT(OutsideITBlock()); 1688 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1689 ITScope it_scope(this, &cond); 1690 ldaex(cond, rt, operand); 1691 } 1692 void Ldaex(Register rt, const MemOperand& operand) { Ldaex(al, rt, operand); } 1693 1694 void Ldaexb(Condition cond, Register rt, const MemOperand& operand) { 1695 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1696 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1697 VIXL_ASSERT(allow_macro_instructions_); 1698 VIXL_ASSERT(OutsideITBlock()); 1699 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1700 ITScope it_scope(this, &cond); 1701 ldaexb(cond, rt, operand); 1702 } 1703 void Ldaexb(Register rt, const MemOperand& operand) { 1704 Ldaexb(al, rt, operand); 1705 } 1706 1707 void Ldaexd(Condition cond, 1708 Register rt, 1709 Register rt2, 1710 const MemOperand& operand) { 1711 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1712 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 1713 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1714 VIXL_ASSERT(allow_macro_instructions_); 1715 VIXL_ASSERT(OutsideITBlock()); 1716 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1717 ITScope it_scope(this, &cond); 1718 ldaexd(cond, rt, rt2, operand); 1719 } 1720 void Ldaexd(Register rt, Register rt2, const MemOperand& operand) { 1721 Ldaexd(al, rt, rt2, operand); 1722 } 1723 1724 void Ldaexh(Condition cond, Register rt, const MemOperand& operand) { 1725 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1726 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1727 VIXL_ASSERT(allow_macro_instructions_); 1728 VIXL_ASSERT(OutsideITBlock()); 1729 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1730 ITScope it_scope(this, &cond); 1731 ldaexh(cond, rt, operand); 1732 } 1733 void Ldaexh(Register rt, const MemOperand& operand) { 1734 Ldaexh(al, rt, operand); 1735 } 1736 1737 void Ldah(Condition cond, Register rt, const MemOperand& operand) { 1738 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1739 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1740 VIXL_ASSERT(allow_macro_instructions_); 1741 VIXL_ASSERT(OutsideITBlock()); 1742 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1743 ITScope it_scope(this, &cond); 1744 ldah(cond, rt, operand); 1745 } 1746 void Ldah(Register rt, const MemOperand& operand) { Ldah(al, rt, operand); } 1747 1748 void Ldm(Condition cond, 1749 Register rn, 1750 WriteBack write_back, 1751 RegisterList registers) { 1752 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1753 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1754 VIXL_ASSERT(allow_macro_instructions_); 1755 VIXL_ASSERT(OutsideITBlock()); 1756 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1757 ITScope it_scope(this, &cond); 1758 ldm(cond, rn, write_back, registers); 1759 } 1760 void Ldm(Register rn, WriteBack write_back, RegisterList registers) { 1761 Ldm(al, rn, write_back, registers); 1762 } 1763 1764 void Ldmda(Condition cond, 1765 Register rn, 1766 WriteBack write_back, 1767 RegisterList registers) { 1768 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1769 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1770 VIXL_ASSERT(allow_macro_instructions_); 1771 VIXL_ASSERT(OutsideITBlock()); 1772 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1773 ITScope it_scope(this, &cond); 1774 ldmda(cond, rn, write_back, registers); 1775 } 1776 void Ldmda(Register rn, WriteBack write_back, RegisterList registers) { 1777 Ldmda(al, rn, write_back, registers); 1778 } 1779 1780 void Ldmdb(Condition cond, 1781 Register rn, 1782 WriteBack write_back, 1783 RegisterList registers) { 1784 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1785 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1786 VIXL_ASSERT(allow_macro_instructions_); 1787 VIXL_ASSERT(OutsideITBlock()); 1788 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1789 ITScope it_scope(this, &cond); 1790 ldmdb(cond, rn, write_back, registers); 1791 } 1792 void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) { 1793 Ldmdb(al, rn, write_back, registers); 1794 } 1795 1796 void Ldmea(Condition cond, 1797 Register rn, 1798 WriteBack write_back, 1799 RegisterList registers) { 1800 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1801 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1802 VIXL_ASSERT(allow_macro_instructions_); 1803 VIXL_ASSERT(OutsideITBlock()); 1804 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1805 ITScope it_scope(this, &cond); 1806 ldmea(cond, rn, write_back, registers); 1807 } 1808 void Ldmea(Register rn, WriteBack write_back, RegisterList registers) { 1809 Ldmea(al, rn, write_back, registers); 1810 } 1811 1812 void Ldmed(Condition cond, 1813 Register rn, 1814 WriteBack write_back, 1815 RegisterList registers) { 1816 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1817 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1818 VIXL_ASSERT(allow_macro_instructions_); 1819 VIXL_ASSERT(OutsideITBlock()); 1820 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1821 ITScope it_scope(this, &cond); 1822 ldmed(cond, rn, write_back, registers); 1823 } 1824 void Ldmed(Register rn, WriteBack write_back, RegisterList registers) { 1825 Ldmed(al, rn, write_back, registers); 1826 } 1827 1828 void Ldmfa(Condition cond, 1829 Register rn, 1830 WriteBack write_back, 1831 RegisterList registers) { 1832 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1833 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1834 VIXL_ASSERT(allow_macro_instructions_); 1835 VIXL_ASSERT(OutsideITBlock()); 1836 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1837 ITScope it_scope(this, &cond); 1838 ldmfa(cond, rn, write_back, registers); 1839 } 1840 void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) { 1841 Ldmfa(al, rn, write_back, registers); 1842 } 1843 1844 void Ldmfd(Condition cond, 1845 Register rn, 1846 WriteBack write_back, 1847 RegisterList registers) { 1848 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1849 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1850 VIXL_ASSERT(allow_macro_instructions_); 1851 VIXL_ASSERT(OutsideITBlock()); 1852 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1853 ITScope it_scope(this, &cond); 1854 ldmfd(cond, rn, write_back, registers); 1855 } 1856 void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) { 1857 Ldmfd(al, rn, write_back, registers); 1858 } 1859 1860 void Ldmib(Condition cond, 1861 Register rn, 1862 WriteBack write_back, 1863 RegisterList registers) { 1864 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 1865 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 1866 VIXL_ASSERT(allow_macro_instructions_); 1867 VIXL_ASSERT(OutsideITBlock()); 1868 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1869 ITScope it_scope(this, &cond); 1870 ldmib(cond, rn, write_back, registers); 1871 } 1872 void Ldmib(Register rn, WriteBack write_back, RegisterList registers) { 1873 Ldmib(al, rn, write_back, registers); 1874 } 1875 1876 void Ldr(Condition cond, Register rt, const MemOperand& operand) { 1877 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1878 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1879 VIXL_ASSERT(allow_macro_instructions_); 1880 VIXL_ASSERT(OutsideITBlock()); 1881 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1882 bool can_use_it = 1883 // LDR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 1884 (operand.IsImmediate() && rt.IsLow() && 1885 operand.GetBaseRegister().IsLow() && 1886 operand.IsOffsetImmediateWithinRange(0, 124, 4) && 1887 (operand.GetAddrMode() == Offset)) || 1888 // LDR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2 1889 (operand.IsImmediate() && rt.IsLow() && 1890 operand.GetBaseRegister().IsSP() && 1891 operand.IsOffsetImmediateWithinRange(0, 1020, 4) && 1892 (operand.GetAddrMode() == Offset)) || 1893 // LDR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 1894 (operand.IsPlainRegister() && rt.IsLow() && 1895 operand.GetBaseRegister().IsLow() && 1896 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 1897 (operand.GetAddrMode() == Offset)); 1898 ITScope it_scope(this, &cond, can_use_it); 1899 ldr(cond, rt, operand); 1900 } 1901 void Ldr(Register rt, const MemOperand& operand) { Ldr(al, rt, operand); } 1902 1903 void Ldr(Condition cond, Register rt, Label* label) { 1904 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1905 VIXL_ASSERT(allow_macro_instructions_); 1906 VIXL_ASSERT(OutsideITBlock()); 1907 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1908 ITScope it_scope(this, &cond); 1909 ldr(cond, rt, label); 1910 } 1911 void Ldr(Register rt, Label* label) { Ldr(al, rt, label); } 1912 1913 void Ldrb(Condition cond, Register rt, const MemOperand& operand) { 1914 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1915 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1916 VIXL_ASSERT(allow_macro_instructions_); 1917 VIXL_ASSERT(OutsideITBlock()); 1918 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1919 bool can_use_it = 1920 // LDRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 1921 (operand.IsImmediate() && rt.IsLow() && 1922 operand.GetBaseRegister().IsLow() && 1923 operand.IsOffsetImmediateWithinRange(0, 31) && 1924 (operand.GetAddrMode() == Offset)) || 1925 // LDRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 1926 (operand.IsPlainRegister() && rt.IsLow() && 1927 operand.GetBaseRegister().IsLow() && 1928 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 1929 (operand.GetAddrMode() == Offset)); 1930 ITScope it_scope(this, &cond, can_use_it); 1931 ldrb(cond, rt, operand); 1932 } 1933 void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); } 1934 1935 void Ldrb(Condition cond, Register rt, Label* label) { 1936 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1937 VIXL_ASSERT(allow_macro_instructions_); 1938 VIXL_ASSERT(OutsideITBlock()); 1939 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1940 ITScope it_scope(this, &cond); 1941 ldrb(cond, rt, label); 1942 } 1943 void Ldrb(Register rt, Label* label) { Ldrb(al, rt, label); } 1944 1945 void Ldrd(Condition cond, 1946 Register rt, 1947 Register rt2, 1948 const MemOperand& operand) { 1949 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1950 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 1951 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1952 VIXL_ASSERT(allow_macro_instructions_); 1953 VIXL_ASSERT(OutsideITBlock()); 1954 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1955 ITScope it_scope(this, &cond); 1956 ldrd(cond, rt, rt2, operand); 1957 } 1958 void Ldrd(Register rt, Register rt2, const MemOperand& operand) { 1959 Ldrd(al, rt, rt2, operand); 1960 } 1961 1962 void Ldrd(Condition cond, Register rt, Register rt2, Label* label) { 1963 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1964 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 1965 VIXL_ASSERT(allow_macro_instructions_); 1966 VIXL_ASSERT(OutsideITBlock()); 1967 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1968 ITScope it_scope(this, &cond); 1969 ldrd(cond, rt, rt2, label); 1970 } 1971 void Ldrd(Register rt, Register rt2, Label* label) { 1972 Ldrd(al, rt, rt2, label); 1973 } 1974 1975 void Ldrex(Condition cond, Register rt, const MemOperand& operand) { 1976 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1977 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1978 VIXL_ASSERT(allow_macro_instructions_); 1979 VIXL_ASSERT(OutsideITBlock()); 1980 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1981 ITScope it_scope(this, &cond); 1982 ldrex(cond, rt, operand); 1983 } 1984 void Ldrex(Register rt, const MemOperand& operand) { Ldrex(al, rt, operand); } 1985 1986 void Ldrexb(Condition cond, Register rt, const MemOperand& operand) { 1987 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 1988 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 1989 VIXL_ASSERT(allow_macro_instructions_); 1990 VIXL_ASSERT(OutsideITBlock()); 1991 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 1992 ITScope it_scope(this, &cond); 1993 ldrexb(cond, rt, operand); 1994 } 1995 void Ldrexb(Register rt, const MemOperand& operand) { 1996 Ldrexb(al, rt, operand); 1997 } 1998 1999 void Ldrexd(Condition cond, 2000 Register rt, 2001 Register rt2, 2002 const MemOperand& operand) { 2003 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2004 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 2005 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2006 VIXL_ASSERT(allow_macro_instructions_); 2007 VIXL_ASSERT(OutsideITBlock()); 2008 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2009 ITScope it_scope(this, &cond); 2010 ldrexd(cond, rt, rt2, operand); 2011 } 2012 void Ldrexd(Register rt, Register rt2, const MemOperand& operand) { 2013 Ldrexd(al, rt, rt2, operand); 2014 } 2015 2016 void Ldrexh(Condition cond, Register rt, const MemOperand& operand) { 2017 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2018 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2019 VIXL_ASSERT(allow_macro_instructions_); 2020 VIXL_ASSERT(OutsideITBlock()); 2021 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2022 ITScope it_scope(this, &cond); 2023 ldrexh(cond, rt, operand); 2024 } 2025 void Ldrexh(Register rt, const MemOperand& operand) { 2026 Ldrexh(al, rt, operand); 2027 } 2028 2029 void Ldrh(Condition cond, Register rt, const MemOperand& operand) { 2030 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2031 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2032 VIXL_ASSERT(allow_macro_instructions_); 2033 VIXL_ASSERT(OutsideITBlock()); 2034 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2035 bool can_use_it = 2036 // LDRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 2037 (operand.IsImmediate() && rt.IsLow() && 2038 operand.GetBaseRegister().IsLow() && 2039 operand.IsOffsetImmediateWithinRange(0, 62, 2) && 2040 (operand.GetAddrMode() == Offset)) || 2041 // LDRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2042 (operand.IsPlainRegister() && rt.IsLow() && 2043 operand.GetBaseRegister().IsLow() && 2044 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2045 (operand.GetAddrMode() == Offset)); 2046 ITScope it_scope(this, &cond, can_use_it); 2047 ldrh(cond, rt, operand); 2048 } 2049 void Ldrh(Register rt, const MemOperand& operand) { Ldrh(al, rt, operand); } 2050 2051 void Ldrh(Condition cond, Register rt, Label* label) { 2052 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2053 VIXL_ASSERT(allow_macro_instructions_); 2054 VIXL_ASSERT(OutsideITBlock()); 2055 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2056 ITScope it_scope(this, &cond); 2057 ldrh(cond, rt, label); 2058 } 2059 void Ldrh(Register rt, Label* label) { Ldrh(al, rt, label); } 2060 2061 void Ldrsb(Condition cond, Register rt, const MemOperand& operand) { 2062 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2063 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2064 VIXL_ASSERT(allow_macro_instructions_); 2065 VIXL_ASSERT(OutsideITBlock()); 2066 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2067 bool can_use_it = 2068 // LDRSB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2069 operand.IsPlainRegister() && rt.IsLow() && 2070 operand.GetBaseRegister().IsLow() && 2071 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2072 (operand.GetAddrMode() == Offset); 2073 ITScope it_scope(this, &cond, can_use_it); 2074 ldrsb(cond, rt, operand); 2075 } 2076 void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); } 2077 2078 void Ldrsb(Condition cond, Register rt, Label* label) { 2079 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2080 VIXL_ASSERT(allow_macro_instructions_); 2081 VIXL_ASSERT(OutsideITBlock()); 2082 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2083 ITScope it_scope(this, &cond); 2084 ldrsb(cond, rt, label); 2085 } 2086 void Ldrsb(Register rt, Label* label) { Ldrsb(al, rt, label); } 2087 2088 void Ldrsh(Condition cond, Register rt, const MemOperand& operand) { 2089 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2090 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2091 VIXL_ASSERT(allow_macro_instructions_); 2092 VIXL_ASSERT(OutsideITBlock()); 2093 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2094 bool can_use_it = 2095 // LDRSH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 2096 operand.IsPlainRegister() && rt.IsLow() && 2097 operand.GetBaseRegister().IsLow() && 2098 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 2099 (operand.GetAddrMode() == Offset); 2100 ITScope it_scope(this, &cond, can_use_it); 2101 ldrsh(cond, rt, operand); 2102 } 2103 void Ldrsh(Register rt, const MemOperand& operand) { Ldrsh(al, rt, operand); } 2104 2105 void Ldrsh(Condition cond, Register rt, Label* label) { 2106 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2107 VIXL_ASSERT(allow_macro_instructions_); 2108 VIXL_ASSERT(OutsideITBlock()); 2109 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2110 ITScope it_scope(this, &cond); 2111 ldrsh(cond, rt, label); 2112 } 2113 void Ldrsh(Register rt, Label* label) { Ldrsh(al, rt, label); } 2114 2115 void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) { 2116 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2117 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2118 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2119 VIXL_ASSERT(allow_macro_instructions_); 2120 VIXL_ASSERT(OutsideITBlock()); 2121 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2122 bool can_use_it = 2123 // LSL<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2 2124 (operand.IsImmediate() && (operand.GetImmediate() >= 1) && 2125 (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) || 2126 // LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 2127 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 2128 operand.GetBaseRegister().IsLow()); 2129 ITScope it_scope(this, &cond, can_use_it); 2130 lsl(cond, rd, rm, operand); 2131 } 2132 void Lsl(Register rd, Register rm, const Operand& operand) { 2133 Lsl(al, rd, rm, operand); 2134 } 2135 void Lsl(FlagsUpdate flags, 2136 Condition cond, 2137 Register rd, 2138 Register rm, 2139 const Operand& operand) { 2140 switch (flags) { 2141 case LeaveFlags: 2142 Lsl(cond, rd, rm, operand); 2143 break; 2144 case SetFlags: 2145 Lsls(cond, rd, rm, operand); 2146 break; 2147 case DontCare: 2148 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2149 rm.IsLow() && operand.IsImmediate() && 2150 (operand.GetImmediate() < 32) && 2151 (operand.GetImmediate() != 0); 2152 if (can_be_16bit_encoded) { 2153 Lsls(cond, rd, rm, operand); 2154 } else { 2155 Lsl(cond, rd, rm, operand); 2156 } 2157 break; 2158 } 2159 } 2160 void Lsl(FlagsUpdate flags, 2161 Register rd, 2162 Register rm, 2163 const Operand& operand) { 2164 Lsl(flags, al, rd, rm, operand); 2165 } 2166 2167 void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) { 2168 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2169 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2170 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2171 VIXL_ASSERT(allow_macro_instructions_); 2172 VIXL_ASSERT(OutsideITBlock()); 2173 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2174 ITScope it_scope(this, &cond); 2175 lsls(cond, rd, rm, operand); 2176 } 2177 void Lsls(Register rd, Register rm, const Operand& operand) { 2178 Lsls(al, rd, rm, operand); 2179 } 2180 2181 void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) { 2182 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2183 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2184 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2185 VIXL_ASSERT(allow_macro_instructions_); 2186 VIXL_ASSERT(OutsideITBlock()); 2187 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2188 bool can_use_it = 2189 // LSR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2 2190 (operand.IsImmediate() && (operand.GetImmediate() >= 1) && 2191 (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) || 2192 // LSR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 2193 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 2194 operand.GetBaseRegister().IsLow()); 2195 ITScope it_scope(this, &cond, can_use_it); 2196 lsr(cond, rd, rm, operand); 2197 } 2198 void Lsr(Register rd, Register rm, const Operand& operand) { 2199 Lsr(al, rd, rm, operand); 2200 } 2201 void Lsr(FlagsUpdate flags, 2202 Condition cond, 2203 Register rd, 2204 Register rm, 2205 const Operand& operand) { 2206 switch (flags) { 2207 case LeaveFlags: 2208 Lsr(cond, rd, rm, operand); 2209 break; 2210 case SetFlags: 2211 Lsrs(cond, rd, rm, operand); 2212 break; 2213 case DontCare: 2214 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2215 rm.IsLow() && operand.IsImmediate() && 2216 (operand.GetImmediate() < 32); 2217 if (can_be_16bit_encoded) { 2218 Lsrs(cond, rd, rm, operand); 2219 } else { 2220 Lsr(cond, rd, rm, operand); 2221 } 2222 break; 2223 } 2224 } 2225 void Lsr(FlagsUpdate flags, 2226 Register rd, 2227 Register rm, 2228 const Operand& operand) { 2229 Lsr(flags, al, rd, rm, operand); 2230 } 2231 2232 void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) { 2233 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2234 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2235 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2236 VIXL_ASSERT(allow_macro_instructions_); 2237 VIXL_ASSERT(OutsideITBlock()); 2238 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2239 ITScope it_scope(this, &cond); 2240 lsrs(cond, rd, rm, operand); 2241 } 2242 void Lsrs(Register rd, Register rm, const Operand& operand) { 2243 Lsrs(al, rd, rm, operand); 2244 } 2245 2246 void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) { 2247 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2248 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2249 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2250 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 2251 VIXL_ASSERT(allow_macro_instructions_); 2252 VIXL_ASSERT(OutsideITBlock()); 2253 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2254 ITScope it_scope(this, &cond); 2255 mla(cond, rd, rn, rm, ra); 2256 } 2257 void Mla(Register rd, Register rn, Register rm, Register ra) { 2258 Mla(al, rd, rn, rm, ra); 2259 } 2260 void Mla(FlagsUpdate flags, 2261 Condition cond, 2262 Register rd, 2263 Register rn, 2264 Register rm, 2265 Register ra) { 2266 switch (flags) { 2267 case LeaveFlags: 2268 Mla(cond, rd, rn, rm, ra); 2269 break; 2270 case SetFlags: 2271 Mlas(cond, rd, rn, rm, ra); 2272 break; 2273 case DontCare: 2274 Mla(cond, rd, rn, rm, ra); 2275 break; 2276 } 2277 } 2278 void Mla( 2279 FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) { 2280 Mla(flags, al, rd, rn, rm, ra); 2281 } 2282 2283 void Mlas( 2284 Condition cond, Register rd, Register rn, Register rm, Register ra) { 2285 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2286 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2287 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2288 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 2289 VIXL_ASSERT(allow_macro_instructions_); 2290 VIXL_ASSERT(OutsideITBlock()); 2291 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2292 ITScope it_scope(this, &cond); 2293 mlas(cond, rd, rn, rm, ra); 2294 } 2295 void Mlas(Register rd, Register rn, Register rm, Register ra) { 2296 Mlas(al, rd, rn, rm, ra); 2297 } 2298 2299 void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) { 2300 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2301 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2302 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2303 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 2304 VIXL_ASSERT(allow_macro_instructions_); 2305 VIXL_ASSERT(OutsideITBlock()); 2306 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2307 ITScope it_scope(this, &cond); 2308 mls(cond, rd, rn, rm, ra); 2309 } 2310 void Mls(Register rd, Register rn, Register rm, Register ra) { 2311 Mls(al, rd, rn, rm, ra); 2312 } 2313 2314 void Mov(Condition cond, Register rd, const Operand& operand) { 2315 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2316 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2317 VIXL_ASSERT(allow_macro_instructions_); 2318 VIXL_ASSERT(OutsideITBlock()); 2319 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2320 bool can_use_it = 2321 // MOV<c>{<q>} <Rd>, #<imm8> ; T1 2322 (operand.IsImmediate() && rd.IsLow() && 2323 (operand.GetImmediate() <= 255)) || 2324 // MOV{<c>}{<q>} <Rd>, <Rm> ; T1 2325 (operand.IsPlainRegister() && !rd.IsPC() && 2326 !operand.GetBaseRegister().IsPC()) || 2327 // MOV<c>{<q>} <Rd>, <Rm> {, <shift> #<amount>} ; T2 2328 (operand.IsImmediateShiftedRegister() && rd.IsLow() && 2329 operand.GetBaseRegister().IsLow() && 2330 (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) || 2331 operand.GetShift().Is(ASR))) || 2332 // MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs> ; T1 2333 // MOV<c>{<q>} <Rdm>, <Rdm>, LSR <Rs> ; T1 2334 // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1 2335 // MOV<c>{<q>} <Rdm>, <Rdm>, ROR <Rs> ; T1 2336 (operand.IsRegisterShiftedRegister() && 2337 rd.Is(operand.GetBaseRegister()) && rd.IsLow() && 2338 (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) || 2339 operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) && 2340 operand.GetShiftRegister().IsLow()); 2341 ITScope it_scope(this, &cond, can_use_it); 2342 mov(cond, rd, operand); 2343 } 2344 void Mov(Register rd, const Operand& operand) { Mov(al, rd, operand); } 2345 void Mov(FlagsUpdate flags, 2346 Condition cond, 2347 Register rd, 2348 const Operand& operand) { 2349 switch (flags) { 2350 case LeaveFlags: 2351 Mov(cond, rd, operand); 2352 break; 2353 case SetFlags: 2354 Movs(cond, rd, operand); 2355 break; 2356 case DontCare: 2357 bool can_be_16bit_encoded = 2358 IsUsingT32() && cond.Is(al) && 2359 ((operand.IsImmediateShiftedRegister() && rd.IsLow() && 2360 operand.GetBaseRegister().IsLow() && 2361 (operand.GetShiftAmount() < 32) && 2362 (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() || 2363 operand.GetShift().IsASR())) || 2364 (operand.IsRegisterShiftedRegister() && rd.IsLow() && 2365 operand.GetBaseRegister().Is(rd) && 2366 operand.GetShiftRegister().IsLow() && 2367 (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() || 2368 operand.GetShift().IsASR() || operand.GetShift().IsROR())) || 2369 (operand.IsImmediate() && rd.IsLow() && 2370 (operand.GetImmediate() < 256))); 2371 if (can_be_16bit_encoded) { 2372 Movs(cond, rd, operand); 2373 } else { 2374 Mov(cond, rd, operand); 2375 } 2376 break; 2377 } 2378 } 2379 void Mov(FlagsUpdate flags, Register rd, const Operand& operand) { 2380 Mov(flags, al, rd, operand); 2381 } 2382 2383 void Movs(Condition cond, Register rd, const Operand& operand) { 2384 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2385 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2386 VIXL_ASSERT(allow_macro_instructions_); 2387 VIXL_ASSERT(OutsideITBlock()); 2388 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2389 ITScope it_scope(this, &cond); 2390 movs(cond, rd, operand); 2391 } 2392 void Movs(Register rd, const Operand& operand) { Movs(al, rd, operand); } 2393 2394 void Movt(Condition cond, Register rd, const Operand& operand) { 2395 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2396 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2397 VIXL_ASSERT(allow_macro_instructions_); 2398 VIXL_ASSERT(OutsideITBlock()); 2399 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2400 ITScope it_scope(this, &cond); 2401 movt(cond, rd, operand); 2402 } 2403 void Movt(Register rd, const Operand& operand) { Movt(al, rd, operand); } 2404 2405 2406 void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) { 2407 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2408 VIXL_ASSERT(allow_macro_instructions_); 2409 VIXL_ASSERT(OutsideITBlock()); 2410 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2411 ITScope it_scope(this, &cond); 2412 mrs(cond, rd, spec_reg); 2413 } 2414 void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); } 2415 2416 void Msr(Condition cond, 2417 MaskedSpecialRegister spec_reg, 2418 const Operand& operand) { 2419 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2420 VIXL_ASSERT(allow_macro_instructions_); 2421 VIXL_ASSERT(OutsideITBlock()); 2422 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2423 ITScope it_scope(this, &cond); 2424 msr(cond, spec_reg, operand); 2425 } 2426 void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) { 2427 Msr(al, spec_reg, operand); 2428 } 2429 2430 void Mul(Condition cond, Register rd, Register rn, Register rm) { 2431 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2432 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2433 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2434 VIXL_ASSERT(allow_macro_instructions_); 2435 VIXL_ASSERT(OutsideITBlock()); 2436 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2437 bool can_use_it = 2438 // MUL<c>{<q>} <Rdm>, <Rn>{, <Rdm>} ; T1 2439 rd.Is(rm) && rn.IsLow() && rm.IsLow(); 2440 ITScope it_scope(this, &cond, can_use_it); 2441 mul(cond, rd, rn, rm); 2442 } 2443 void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); } 2444 void Mul(FlagsUpdate flags, 2445 Condition cond, 2446 Register rd, 2447 Register rn, 2448 Register rm) { 2449 switch (flags) { 2450 case LeaveFlags: 2451 Mul(cond, rd, rn, rm); 2452 break; 2453 case SetFlags: 2454 Muls(cond, rd, rn, rm); 2455 break; 2456 case DontCare: 2457 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2458 rn.IsLow() && rm.Is(rd); 2459 if (can_be_16bit_encoded) { 2460 Muls(cond, rd, rn, rm); 2461 } else { 2462 Mul(cond, rd, rn, rm); 2463 } 2464 break; 2465 } 2466 } 2467 void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) { 2468 Mul(flags, al, rd, rn, rm); 2469 } 2470 2471 void Muls(Condition cond, Register rd, Register rn, Register rm) { 2472 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2473 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2474 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2475 VIXL_ASSERT(allow_macro_instructions_); 2476 VIXL_ASSERT(OutsideITBlock()); 2477 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2478 ITScope it_scope(this, &cond); 2479 muls(cond, rd, rn, rm); 2480 } 2481 void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); } 2482 2483 void Mvn(Condition cond, Register rd, const Operand& operand) { 2484 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2485 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2486 VIXL_ASSERT(allow_macro_instructions_); 2487 VIXL_ASSERT(OutsideITBlock()); 2488 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2489 bool can_use_it = 2490 // MVN<c>{<q>} <Rd>, <Rm> ; T1 2491 operand.IsPlainRegister() && rd.IsLow() && 2492 operand.GetBaseRegister().IsLow(); 2493 ITScope it_scope(this, &cond, can_use_it); 2494 mvn(cond, rd, operand); 2495 } 2496 void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); } 2497 void Mvn(FlagsUpdate flags, 2498 Condition cond, 2499 Register rd, 2500 const Operand& operand) { 2501 switch (flags) { 2502 case LeaveFlags: 2503 Mvn(cond, rd, operand); 2504 break; 2505 case SetFlags: 2506 Mvns(cond, rd, operand); 2507 break; 2508 case DontCare: 2509 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2510 operand.IsPlainRegister() && 2511 operand.GetBaseRegister().IsLow(); 2512 if (can_be_16bit_encoded) { 2513 Mvns(cond, rd, operand); 2514 } else { 2515 Mvn(cond, rd, operand); 2516 } 2517 break; 2518 } 2519 } 2520 void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) { 2521 Mvn(flags, al, rd, operand); 2522 } 2523 2524 void Mvns(Condition cond, Register rd, const Operand& operand) { 2525 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2526 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2527 VIXL_ASSERT(allow_macro_instructions_); 2528 VIXL_ASSERT(OutsideITBlock()); 2529 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2530 ITScope it_scope(this, &cond); 2531 mvns(cond, rd, operand); 2532 } 2533 void Mvns(Register rd, const Operand& operand) { Mvns(al, rd, operand); } 2534 2535 void Nop(Condition cond) { 2536 VIXL_ASSERT(allow_macro_instructions_); 2537 VIXL_ASSERT(OutsideITBlock()); 2538 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2539 ITScope it_scope(this, &cond); 2540 nop(cond); 2541 } 2542 void Nop() { Nop(al); } 2543 2544 void Orn(Condition cond, Register rd, Register rn, const Operand& operand) { 2545 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2546 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2547 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2548 VIXL_ASSERT(allow_macro_instructions_); 2549 VIXL_ASSERT(OutsideITBlock()); 2550 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2551 if (cond.Is(al) && operand.IsImmediate()) { 2552 uint32_t immediate = operand.GetImmediate(); 2553 if (immediate == 0) { 2554 mvn(rd, 0); 2555 return; 2556 } 2557 if ((immediate == 0xffffffff) && rd.Is(rn)) { 2558 return; 2559 } 2560 } 2561 ITScope it_scope(this, &cond); 2562 orn(cond, rd, rn, operand); 2563 } 2564 void Orn(Register rd, Register rn, const Operand& operand) { 2565 Orn(al, rd, rn, operand); 2566 } 2567 void Orn(FlagsUpdate flags, 2568 Condition cond, 2569 Register rd, 2570 Register rn, 2571 const Operand& operand) { 2572 switch (flags) { 2573 case LeaveFlags: 2574 Orn(cond, rd, rn, operand); 2575 break; 2576 case SetFlags: 2577 Orns(cond, rd, rn, operand); 2578 break; 2579 case DontCare: 2580 Orn(cond, rd, rn, operand); 2581 break; 2582 } 2583 } 2584 void Orn(FlagsUpdate flags, 2585 Register rd, 2586 Register rn, 2587 const Operand& operand) { 2588 Orn(flags, al, rd, rn, operand); 2589 } 2590 2591 void Orns(Condition cond, Register rd, Register rn, const Operand& operand) { 2592 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2593 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2594 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2595 VIXL_ASSERT(allow_macro_instructions_); 2596 VIXL_ASSERT(OutsideITBlock()); 2597 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2598 ITScope it_scope(this, &cond); 2599 orns(cond, rd, rn, operand); 2600 } 2601 void Orns(Register rd, Register rn, const Operand& operand) { 2602 Orns(al, rd, rn, operand); 2603 } 2604 2605 void Orr(Condition cond, Register rd, Register rn, const Operand& operand) { 2606 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2607 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2608 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2609 VIXL_ASSERT(allow_macro_instructions_); 2610 VIXL_ASSERT(OutsideITBlock()); 2611 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2612 if (cond.Is(al) && operand.IsImmediate()) { 2613 uint32_t immediate = operand.GetImmediate(); 2614 if ((immediate == 0) && rd.Is(rn)) { 2615 return; 2616 } 2617 if (immediate == 0xffffffff) { 2618 mvn(rd, 0); 2619 return; 2620 } 2621 } 2622 bool can_use_it = 2623 // ORR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 2624 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() && 2625 operand.GetBaseRegister().IsLow(); 2626 ITScope it_scope(this, &cond, can_use_it); 2627 orr(cond, rd, rn, operand); 2628 } 2629 void Orr(Register rd, Register rn, const Operand& operand) { 2630 Orr(al, rd, rn, operand); 2631 } 2632 void Orr(FlagsUpdate flags, 2633 Condition cond, 2634 Register rd, 2635 Register rn, 2636 const Operand& operand) { 2637 switch (flags) { 2638 case LeaveFlags: 2639 Orr(cond, rd, rn, operand); 2640 break; 2641 case SetFlags: 2642 Orrs(cond, rd, rn, operand); 2643 break; 2644 case DontCare: 2645 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 2646 rn.Is(rd) && operand.IsPlainRegister() && 2647 operand.GetBaseRegister().IsLow(); 2648 if (can_be_16bit_encoded) { 2649 Orrs(cond, rd, rn, operand); 2650 } else { 2651 Orr(cond, rd, rn, operand); 2652 } 2653 break; 2654 } 2655 } 2656 void Orr(FlagsUpdate flags, 2657 Register rd, 2658 Register rn, 2659 const Operand& operand) { 2660 Orr(flags, al, rd, rn, operand); 2661 } 2662 2663 void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) { 2664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2666 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2667 VIXL_ASSERT(allow_macro_instructions_); 2668 VIXL_ASSERT(OutsideITBlock()); 2669 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2670 ITScope it_scope(this, &cond); 2671 orrs(cond, rd, rn, operand); 2672 } 2673 void Orrs(Register rd, Register rn, const Operand& operand) { 2674 Orrs(al, rd, rn, operand); 2675 } 2676 2677 void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) { 2678 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2679 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2680 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2681 VIXL_ASSERT(allow_macro_instructions_); 2682 VIXL_ASSERT(OutsideITBlock()); 2683 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2684 ITScope it_scope(this, &cond); 2685 pkhbt(cond, rd, rn, operand); 2686 } 2687 void Pkhbt(Register rd, Register rn, const Operand& operand) { 2688 Pkhbt(al, rd, rn, operand); 2689 } 2690 2691 void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) { 2692 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2693 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2694 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2695 VIXL_ASSERT(allow_macro_instructions_); 2696 VIXL_ASSERT(OutsideITBlock()); 2697 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2698 ITScope it_scope(this, &cond); 2699 pkhtb(cond, rd, rn, operand); 2700 } 2701 void Pkhtb(Register rd, Register rn, const Operand& operand) { 2702 Pkhtb(al, rd, rn, operand); 2703 } 2704 2705 void Pld(Condition cond, Label* label) { 2706 VIXL_ASSERT(allow_macro_instructions_); 2707 VIXL_ASSERT(OutsideITBlock()); 2708 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2709 ITScope it_scope(this, &cond); 2710 pld(cond, label); 2711 } 2712 void Pld(Label* label) { Pld(al, label); } 2713 2714 void Pld(Condition cond, const MemOperand& operand) { 2715 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2716 VIXL_ASSERT(allow_macro_instructions_); 2717 VIXL_ASSERT(OutsideITBlock()); 2718 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2719 ITScope it_scope(this, &cond); 2720 pld(cond, operand); 2721 } 2722 void Pld(const MemOperand& operand) { Pld(al, operand); } 2723 2724 void Pldw(Condition cond, const MemOperand& operand) { 2725 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2726 VIXL_ASSERT(allow_macro_instructions_); 2727 VIXL_ASSERT(OutsideITBlock()); 2728 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2729 ITScope it_scope(this, &cond); 2730 pldw(cond, operand); 2731 } 2732 void Pldw(const MemOperand& operand) { Pldw(al, operand); } 2733 2734 void Pli(Condition cond, const MemOperand& operand) { 2735 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2736 VIXL_ASSERT(allow_macro_instructions_); 2737 VIXL_ASSERT(OutsideITBlock()); 2738 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2739 ITScope it_scope(this, &cond); 2740 pli(cond, operand); 2741 } 2742 void Pli(const MemOperand& operand) { Pli(al, operand); } 2743 2744 void Pli(Condition cond, Label* label) { 2745 VIXL_ASSERT(allow_macro_instructions_); 2746 VIXL_ASSERT(OutsideITBlock()); 2747 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2748 ITScope it_scope(this, &cond); 2749 pli(cond, label); 2750 } 2751 void Pli(Label* label) { Pli(al, label); } 2752 2753 void Pop(Condition cond, RegisterList registers) { 2754 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2755 VIXL_ASSERT(allow_macro_instructions_); 2756 VIXL_ASSERT(OutsideITBlock()); 2757 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2758 ITScope it_scope(this, &cond); 2759 pop(cond, registers); 2760 } 2761 void Pop(RegisterList registers) { Pop(al, registers); } 2762 2763 void Pop(Condition cond, Register rt) { 2764 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2765 VIXL_ASSERT(allow_macro_instructions_); 2766 VIXL_ASSERT(OutsideITBlock()); 2767 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2768 ITScope it_scope(this, &cond); 2769 pop(cond, rt); 2770 } 2771 void Pop(Register rt) { Pop(al, rt); } 2772 2773 void Push(Condition cond, RegisterList registers) { 2774 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 2775 VIXL_ASSERT(allow_macro_instructions_); 2776 VIXL_ASSERT(OutsideITBlock()); 2777 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2778 ITScope it_scope(this, &cond); 2779 push(cond, registers); 2780 } 2781 void Push(RegisterList registers) { Push(al, registers); } 2782 2783 void Push(Condition cond, Register rt) { 2784 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 2785 VIXL_ASSERT(allow_macro_instructions_); 2786 VIXL_ASSERT(OutsideITBlock()); 2787 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2788 ITScope it_scope(this, &cond); 2789 push(cond, rt); 2790 } 2791 void Push(Register rt) { Push(al, rt); } 2792 2793 void Qadd(Condition cond, Register rd, Register rm, Register rn) { 2794 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2795 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2796 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2797 VIXL_ASSERT(allow_macro_instructions_); 2798 VIXL_ASSERT(OutsideITBlock()); 2799 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2800 ITScope it_scope(this, &cond); 2801 qadd(cond, rd, rm, rn); 2802 } 2803 void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); } 2804 2805 void Qadd16(Condition cond, Register rd, Register rn, Register rm) { 2806 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2807 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2808 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2809 VIXL_ASSERT(allow_macro_instructions_); 2810 VIXL_ASSERT(OutsideITBlock()); 2811 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2812 ITScope it_scope(this, &cond); 2813 qadd16(cond, rd, rn, rm); 2814 } 2815 void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); } 2816 2817 void Qadd8(Condition cond, Register rd, Register rn, Register rm) { 2818 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2819 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2820 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2821 VIXL_ASSERT(allow_macro_instructions_); 2822 VIXL_ASSERT(OutsideITBlock()); 2823 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2824 ITScope it_scope(this, &cond); 2825 qadd8(cond, rd, rn, rm); 2826 } 2827 void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); } 2828 2829 void Qasx(Condition cond, Register rd, Register rn, Register rm) { 2830 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2831 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2832 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2833 VIXL_ASSERT(allow_macro_instructions_); 2834 VIXL_ASSERT(OutsideITBlock()); 2835 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2836 ITScope it_scope(this, &cond); 2837 qasx(cond, rd, rn, rm); 2838 } 2839 void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); } 2840 2841 void Qdadd(Condition cond, Register rd, Register rm, Register rn) { 2842 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2843 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2844 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2845 VIXL_ASSERT(allow_macro_instructions_); 2846 VIXL_ASSERT(OutsideITBlock()); 2847 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2848 ITScope it_scope(this, &cond); 2849 qdadd(cond, rd, rm, rn); 2850 } 2851 void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); } 2852 2853 void Qdsub(Condition cond, Register rd, Register rm, Register rn) { 2854 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2856 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2857 VIXL_ASSERT(allow_macro_instructions_); 2858 VIXL_ASSERT(OutsideITBlock()); 2859 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2860 ITScope it_scope(this, &cond); 2861 qdsub(cond, rd, rm, rn); 2862 } 2863 void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); } 2864 2865 void Qsax(Condition cond, Register rd, Register rn, Register rm) { 2866 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2867 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2868 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2869 VIXL_ASSERT(allow_macro_instructions_); 2870 VIXL_ASSERT(OutsideITBlock()); 2871 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2872 ITScope it_scope(this, &cond); 2873 qsax(cond, rd, rn, rm); 2874 } 2875 void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); } 2876 2877 void Qsub(Condition cond, Register rd, Register rm, Register rn) { 2878 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2879 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2880 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2881 VIXL_ASSERT(allow_macro_instructions_); 2882 VIXL_ASSERT(OutsideITBlock()); 2883 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2884 ITScope it_scope(this, &cond); 2885 qsub(cond, rd, rm, rn); 2886 } 2887 void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); } 2888 2889 void Qsub16(Condition cond, Register rd, Register rn, Register rm) { 2890 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2891 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2892 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2893 VIXL_ASSERT(allow_macro_instructions_); 2894 VIXL_ASSERT(OutsideITBlock()); 2895 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2896 ITScope it_scope(this, &cond); 2897 qsub16(cond, rd, rn, rm); 2898 } 2899 void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); } 2900 2901 void Qsub8(Condition cond, Register rd, Register rn, Register rm) { 2902 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2903 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 2904 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2905 VIXL_ASSERT(allow_macro_instructions_); 2906 VIXL_ASSERT(OutsideITBlock()); 2907 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2908 ITScope it_scope(this, &cond); 2909 qsub8(cond, rd, rn, rm); 2910 } 2911 void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); } 2912 2913 void Rbit(Condition cond, Register rd, Register rm) { 2914 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2915 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2916 VIXL_ASSERT(allow_macro_instructions_); 2917 VIXL_ASSERT(OutsideITBlock()); 2918 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2919 ITScope it_scope(this, &cond); 2920 rbit(cond, rd, rm); 2921 } 2922 void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); } 2923 2924 void Rev(Condition cond, Register rd, Register rm) { 2925 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2926 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2927 VIXL_ASSERT(allow_macro_instructions_); 2928 VIXL_ASSERT(OutsideITBlock()); 2929 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2930 ITScope it_scope(this, &cond); 2931 rev(cond, rd, rm); 2932 } 2933 void Rev(Register rd, Register rm) { Rev(al, rd, rm); } 2934 2935 void Rev16(Condition cond, Register rd, Register rm) { 2936 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2937 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2938 VIXL_ASSERT(allow_macro_instructions_); 2939 VIXL_ASSERT(OutsideITBlock()); 2940 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2941 ITScope it_scope(this, &cond); 2942 rev16(cond, rd, rm); 2943 } 2944 void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); } 2945 2946 void Revsh(Condition cond, Register rd, Register rm) { 2947 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2948 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2949 VIXL_ASSERT(allow_macro_instructions_); 2950 VIXL_ASSERT(OutsideITBlock()); 2951 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2952 ITScope it_scope(this, &cond); 2953 revsh(cond, rd, rm); 2954 } 2955 void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); } 2956 2957 void Ror(Condition cond, Register rd, Register rm, const Operand& operand) { 2958 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 2959 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 2960 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 2961 VIXL_ASSERT(allow_macro_instructions_); 2962 VIXL_ASSERT(OutsideITBlock()); 2963 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 2964 bool can_use_it = 2965 // ROR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1 2966 operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() && 2967 operand.GetBaseRegister().IsLow(); 2968 ITScope it_scope(this, &cond, can_use_it); 2969 ror(cond, rd, rm, operand); 2970 } 2971 void Ror(Register rd, Register rm, const Operand& operand) { 2972 Ror(al, rd, rm, operand); 2973 } 2974 void Ror(FlagsUpdate flags, 2975 Condition cond, 2976 Register rd, 2977 Register rm, 2978 const Operand& operand) { 2979 switch (flags) { 2980 case LeaveFlags: 2981 Ror(cond, rd, rm, operand); 2982 break; 2983 case SetFlags: 2984 Rors(cond, rd, rm, operand); 2985 break; 2986 case DontCare: 2987 Ror(cond, rd, rm, operand); 2988 break; 2989 } 2990 } 2991 void Ror(FlagsUpdate flags, 2992 Register rd, 2993 Register rm, 2994 const Operand& operand) { 2995 Ror(flags, al, rd, rm, operand); 2996 } 2997 2998 void Rors(Condition cond, Register rd, Register rm, const Operand& operand) { 2999 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3000 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3001 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3002 VIXL_ASSERT(allow_macro_instructions_); 3003 VIXL_ASSERT(OutsideITBlock()); 3004 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3005 ITScope it_scope(this, &cond); 3006 rors(cond, rd, rm, operand); 3007 } 3008 void Rors(Register rd, Register rm, const Operand& operand) { 3009 Rors(al, rd, rm, operand); 3010 } 3011 3012 void Rrx(Condition cond, Register rd, Register rm) { 3013 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3014 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3015 VIXL_ASSERT(allow_macro_instructions_); 3016 VIXL_ASSERT(OutsideITBlock()); 3017 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3018 ITScope it_scope(this, &cond); 3019 rrx(cond, rd, rm); 3020 } 3021 void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); } 3022 void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) { 3023 switch (flags) { 3024 case LeaveFlags: 3025 Rrx(cond, rd, rm); 3026 break; 3027 case SetFlags: 3028 Rrxs(cond, rd, rm); 3029 break; 3030 case DontCare: 3031 Rrx(cond, rd, rm); 3032 break; 3033 } 3034 } 3035 void Rrx(FlagsUpdate flags, Register rd, Register rm) { 3036 Rrx(flags, al, rd, rm); 3037 } 3038 3039 void Rrxs(Condition cond, Register rd, Register rm) { 3040 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3041 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3042 VIXL_ASSERT(allow_macro_instructions_); 3043 VIXL_ASSERT(OutsideITBlock()); 3044 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3045 ITScope it_scope(this, &cond); 3046 rrxs(cond, rd, rm); 3047 } 3048 void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); } 3049 3050 void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) { 3051 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3052 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3053 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3054 VIXL_ASSERT(allow_macro_instructions_); 3055 VIXL_ASSERT(OutsideITBlock()); 3056 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3057 bool can_use_it = 3058 // RSB<c>{<q>} {<Rd>, }<Rn>, #0 ; T1 3059 operand.IsImmediate() && rd.IsLow() && rn.IsLow() && 3060 (operand.GetImmediate() == 0); 3061 ITScope it_scope(this, &cond, can_use_it); 3062 rsb(cond, rd, rn, operand); 3063 } 3064 void Rsb(Register rd, Register rn, const Operand& operand) { 3065 Rsb(al, rd, rn, operand); 3066 } 3067 void Rsb(FlagsUpdate flags, 3068 Condition cond, 3069 Register rd, 3070 Register rn, 3071 const Operand& operand) { 3072 switch (flags) { 3073 case LeaveFlags: 3074 Rsb(cond, rd, rn, operand); 3075 break; 3076 case SetFlags: 3077 Rsbs(cond, rd, rn, operand); 3078 break; 3079 case DontCare: 3080 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 3081 rn.IsLow() && operand.IsImmediate() && 3082 (operand.GetImmediate() == 0); 3083 if (can_be_16bit_encoded) { 3084 Rsbs(cond, rd, rn, operand); 3085 } else { 3086 Rsb(cond, rd, rn, operand); 3087 } 3088 break; 3089 } 3090 } 3091 void Rsb(FlagsUpdate flags, 3092 Register rd, 3093 Register rn, 3094 const Operand& operand) { 3095 Rsb(flags, al, rd, rn, operand); 3096 } 3097 3098 void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) { 3099 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3100 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3101 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3102 VIXL_ASSERT(allow_macro_instructions_); 3103 VIXL_ASSERT(OutsideITBlock()); 3104 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3105 ITScope it_scope(this, &cond); 3106 rsbs(cond, rd, rn, operand); 3107 } 3108 void Rsbs(Register rd, Register rn, const Operand& operand) { 3109 Rsbs(al, rd, rn, operand); 3110 } 3111 3112 void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) { 3113 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3114 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3115 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3116 VIXL_ASSERT(allow_macro_instructions_); 3117 VIXL_ASSERT(OutsideITBlock()); 3118 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3119 ITScope it_scope(this, &cond); 3120 rsc(cond, rd, rn, operand); 3121 } 3122 void Rsc(Register rd, Register rn, const Operand& operand) { 3123 Rsc(al, rd, rn, operand); 3124 } 3125 void Rsc(FlagsUpdate flags, 3126 Condition cond, 3127 Register rd, 3128 Register rn, 3129 const Operand& operand) { 3130 switch (flags) { 3131 case LeaveFlags: 3132 Rsc(cond, rd, rn, operand); 3133 break; 3134 case SetFlags: 3135 Rscs(cond, rd, rn, operand); 3136 break; 3137 case DontCare: 3138 Rsc(cond, rd, rn, operand); 3139 break; 3140 } 3141 } 3142 void Rsc(FlagsUpdate flags, 3143 Register rd, 3144 Register rn, 3145 const Operand& operand) { 3146 Rsc(flags, al, rd, rn, operand); 3147 } 3148 3149 void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) { 3150 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3151 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3152 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3153 VIXL_ASSERT(allow_macro_instructions_); 3154 VIXL_ASSERT(OutsideITBlock()); 3155 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3156 ITScope it_scope(this, &cond); 3157 rscs(cond, rd, rn, operand); 3158 } 3159 void Rscs(Register rd, Register rn, const Operand& operand) { 3160 Rscs(al, rd, rn, operand); 3161 } 3162 3163 void Sadd16(Condition cond, Register rd, Register rn, Register rm) { 3164 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3165 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3166 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3167 VIXL_ASSERT(allow_macro_instructions_); 3168 VIXL_ASSERT(OutsideITBlock()); 3169 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3170 ITScope it_scope(this, &cond); 3171 sadd16(cond, rd, rn, rm); 3172 } 3173 void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); } 3174 3175 void Sadd8(Condition cond, Register rd, Register rn, Register rm) { 3176 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3177 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3178 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3179 VIXL_ASSERT(allow_macro_instructions_); 3180 VIXL_ASSERT(OutsideITBlock()); 3181 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3182 ITScope it_scope(this, &cond); 3183 sadd8(cond, rd, rn, rm); 3184 } 3185 void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); } 3186 3187 void Sasx(Condition cond, Register rd, Register rn, Register rm) { 3188 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3189 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3190 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3191 VIXL_ASSERT(allow_macro_instructions_); 3192 VIXL_ASSERT(OutsideITBlock()); 3193 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3194 ITScope it_scope(this, &cond); 3195 sasx(cond, rd, rn, rm); 3196 } 3197 void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); } 3198 3199 void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) { 3200 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3201 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3202 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3203 VIXL_ASSERT(allow_macro_instructions_); 3204 VIXL_ASSERT(OutsideITBlock()); 3205 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3206 bool can_use_it = 3207 // SBC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1 3208 operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) && 3209 operand.GetBaseRegister().IsLow(); 3210 ITScope it_scope(this, &cond, can_use_it); 3211 sbc(cond, rd, rn, operand); 3212 } 3213 void Sbc(Register rd, Register rn, const Operand& operand) { 3214 Sbc(al, rd, rn, operand); 3215 } 3216 void Sbc(FlagsUpdate flags, 3217 Condition cond, 3218 Register rd, 3219 Register rn, 3220 const Operand& operand) { 3221 switch (flags) { 3222 case LeaveFlags: 3223 Sbc(cond, rd, rn, operand); 3224 break; 3225 case SetFlags: 3226 Sbcs(cond, rd, rn, operand); 3227 break; 3228 case DontCare: 3229 bool can_be_16bit_encoded = IsUsingT32() && cond.Is(al) && rd.IsLow() && 3230 rn.Is(rd) && operand.IsPlainRegister() && 3231 operand.GetBaseRegister().IsLow(); 3232 if (can_be_16bit_encoded) { 3233 Sbcs(cond, rd, rn, operand); 3234 } else { 3235 Sbc(cond, rd, rn, operand); 3236 } 3237 break; 3238 } 3239 } 3240 void Sbc(FlagsUpdate flags, 3241 Register rd, 3242 Register rn, 3243 const Operand& operand) { 3244 Sbc(flags, al, rd, rn, operand); 3245 } 3246 3247 void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) { 3248 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3249 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3250 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3251 VIXL_ASSERT(allow_macro_instructions_); 3252 VIXL_ASSERT(OutsideITBlock()); 3253 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3254 ITScope it_scope(this, &cond); 3255 sbcs(cond, rd, rn, operand); 3256 } 3257 void Sbcs(Register rd, Register rn, const Operand& operand) { 3258 Sbcs(al, rd, rn, operand); 3259 } 3260 3261 void Sbfx(Condition cond, 3262 Register rd, 3263 Register rn, 3264 uint32_t lsb, 3265 const Operand& operand) { 3266 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3267 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3268 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3269 VIXL_ASSERT(allow_macro_instructions_); 3270 VIXL_ASSERT(OutsideITBlock()); 3271 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3272 ITScope it_scope(this, &cond); 3273 sbfx(cond, rd, rn, lsb, operand); 3274 } 3275 void Sbfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) { 3276 Sbfx(al, rd, rn, lsb, operand); 3277 } 3278 3279 void Sdiv(Condition cond, Register rd, Register rn, Register rm) { 3280 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3281 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3282 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3283 VIXL_ASSERT(allow_macro_instructions_); 3284 VIXL_ASSERT(OutsideITBlock()); 3285 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3286 ITScope it_scope(this, &cond); 3287 sdiv(cond, rd, rn, rm); 3288 } 3289 void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); } 3290 3291 void Sel(Condition cond, Register rd, Register rn, Register rm) { 3292 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3293 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3294 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3295 VIXL_ASSERT(allow_macro_instructions_); 3296 VIXL_ASSERT(OutsideITBlock()); 3297 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3298 ITScope it_scope(this, &cond); 3299 sel(cond, rd, rn, rm); 3300 } 3301 void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); } 3302 3303 void Shadd16(Condition cond, Register rd, Register rn, Register rm) { 3304 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3305 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3306 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3307 VIXL_ASSERT(allow_macro_instructions_); 3308 VIXL_ASSERT(OutsideITBlock()); 3309 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3310 ITScope it_scope(this, &cond); 3311 shadd16(cond, rd, rn, rm); 3312 } 3313 void Shadd16(Register rd, Register rn, Register rm) { 3314 Shadd16(al, rd, rn, rm); 3315 } 3316 3317 void Shadd8(Condition cond, Register rd, Register rn, Register rm) { 3318 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3319 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3320 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3321 VIXL_ASSERT(allow_macro_instructions_); 3322 VIXL_ASSERT(OutsideITBlock()); 3323 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3324 ITScope it_scope(this, &cond); 3325 shadd8(cond, rd, rn, rm); 3326 } 3327 void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); } 3328 3329 void Shasx(Condition cond, Register rd, Register rn, Register rm) { 3330 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3331 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3332 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3333 VIXL_ASSERT(allow_macro_instructions_); 3334 VIXL_ASSERT(OutsideITBlock()); 3335 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3336 ITScope it_scope(this, &cond); 3337 shasx(cond, rd, rn, rm); 3338 } 3339 void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); } 3340 3341 void Shsax(Condition cond, Register rd, Register rn, Register rm) { 3342 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3343 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3344 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3345 VIXL_ASSERT(allow_macro_instructions_); 3346 VIXL_ASSERT(OutsideITBlock()); 3347 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3348 ITScope it_scope(this, &cond); 3349 shsax(cond, rd, rn, rm); 3350 } 3351 void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); } 3352 3353 void Shsub16(Condition cond, Register rd, Register rn, Register rm) { 3354 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3355 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3356 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3357 VIXL_ASSERT(allow_macro_instructions_); 3358 VIXL_ASSERT(OutsideITBlock()); 3359 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3360 ITScope it_scope(this, &cond); 3361 shsub16(cond, rd, rn, rm); 3362 } 3363 void Shsub16(Register rd, Register rn, Register rm) { 3364 Shsub16(al, rd, rn, rm); 3365 } 3366 3367 void Shsub8(Condition cond, Register rd, Register rn, Register rm) { 3368 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3369 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3370 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3371 VIXL_ASSERT(allow_macro_instructions_); 3372 VIXL_ASSERT(OutsideITBlock()); 3373 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3374 ITScope it_scope(this, &cond); 3375 shsub8(cond, rd, rn, rm); 3376 } 3377 void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); } 3378 3379 void Smlabb( 3380 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3381 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3382 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3383 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3384 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3385 VIXL_ASSERT(allow_macro_instructions_); 3386 VIXL_ASSERT(OutsideITBlock()); 3387 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3388 ITScope it_scope(this, &cond); 3389 smlabb(cond, rd, rn, rm, ra); 3390 } 3391 void Smlabb(Register rd, Register rn, Register rm, Register ra) { 3392 Smlabb(al, rd, rn, rm, ra); 3393 } 3394 3395 void Smlabt( 3396 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3397 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3398 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3399 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3400 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3401 VIXL_ASSERT(allow_macro_instructions_); 3402 VIXL_ASSERT(OutsideITBlock()); 3403 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3404 ITScope it_scope(this, &cond); 3405 smlabt(cond, rd, rn, rm, ra); 3406 } 3407 void Smlabt(Register rd, Register rn, Register rm, Register ra) { 3408 Smlabt(al, rd, rn, rm, ra); 3409 } 3410 3411 void Smlad( 3412 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3413 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3414 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3415 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3416 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3417 VIXL_ASSERT(allow_macro_instructions_); 3418 VIXL_ASSERT(OutsideITBlock()); 3419 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3420 ITScope it_scope(this, &cond); 3421 smlad(cond, rd, rn, rm, ra); 3422 } 3423 void Smlad(Register rd, Register rn, Register rm, Register ra) { 3424 Smlad(al, rd, rn, rm, ra); 3425 } 3426 3427 void Smladx( 3428 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3429 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3430 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3431 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3432 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3433 VIXL_ASSERT(allow_macro_instructions_); 3434 VIXL_ASSERT(OutsideITBlock()); 3435 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3436 ITScope it_scope(this, &cond); 3437 smladx(cond, rd, rn, rm, ra); 3438 } 3439 void Smladx(Register rd, Register rn, Register rm, Register ra) { 3440 Smladx(al, rd, rn, rm, ra); 3441 } 3442 3443 void Smlal( 3444 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3445 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3446 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3447 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3448 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3449 VIXL_ASSERT(allow_macro_instructions_); 3450 VIXL_ASSERT(OutsideITBlock()); 3451 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3452 ITScope it_scope(this, &cond); 3453 smlal(cond, rdlo, rdhi, rn, rm); 3454 } 3455 void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) { 3456 Smlal(al, rdlo, rdhi, rn, rm); 3457 } 3458 3459 void Smlalbb( 3460 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3461 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3462 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3463 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3464 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3465 VIXL_ASSERT(allow_macro_instructions_); 3466 VIXL_ASSERT(OutsideITBlock()); 3467 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3468 ITScope it_scope(this, &cond); 3469 smlalbb(cond, rdlo, rdhi, rn, rm); 3470 } 3471 void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) { 3472 Smlalbb(al, rdlo, rdhi, rn, rm); 3473 } 3474 3475 void Smlalbt( 3476 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3477 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3478 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3479 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3480 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3481 VIXL_ASSERT(allow_macro_instructions_); 3482 VIXL_ASSERT(OutsideITBlock()); 3483 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3484 ITScope it_scope(this, &cond); 3485 smlalbt(cond, rdlo, rdhi, rn, rm); 3486 } 3487 void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) { 3488 Smlalbt(al, rdlo, rdhi, rn, rm); 3489 } 3490 3491 void Smlald( 3492 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3493 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3494 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3495 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3496 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3497 VIXL_ASSERT(allow_macro_instructions_); 3498 VIXL_ASSERT(OutsideITBlock()); 3499 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3500 ITScope it_scope(this, &cond); 3501 smlald(cond, rdlo, rdhi, rn, rm); 3502 } 3503 void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) { 3504 Smlald(al, rdlo, rdhi, rn, rm); 3505 } 3506 3507 void Smlaldx( 3508 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3509 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3510 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3511 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3512 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3513 VIXL_ASSERT(allow_macro_instructions_); 3514 VIXL_ASSERT(OutsideITBlock()); 3515 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3516 ITScope it_scope(this, &cond); 3517 smlaldx(cond, rdlo, rdhi, rn, rm); 3518 } 3519 void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) { 3520 Smlaldx(al, rdlo, rdhi, rn, rm); 3521 } 3522 3523 void Smlals( 3524 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3525 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3526 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3527 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3528 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3529 VIXL_ASSERT(allow_macro_instructions_); 3530 VIXL_ASSERT(OutsideITBlock()); 3531 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3532 ITScope it_scope(this, &cond); 3533 smlals(cond, rdlo, rdhi, rn, rm); 3534 } 3535 void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) { 3536 Smlals(al, rdlo, rdhi, rn, rm); 3537 } 3538 3539 void Smlaltb( 3540 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3541 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3542 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3543 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3544 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3545 VIXL_ASSERT(allow_macro_instructions_); 3546 VIXL_ASSERT(OutsideITBlock()); 3547 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3548 ITScope it_scope(this, &cond); 3549 smlaltb(cond, rdlo, rdhi, rn, rm); 3550 } 3551 void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) { 3552 Smlaltb(al, rdlo, rdhi, rn, rm); 3553 } 3554 3555 void Smlaltt( 3556 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3557 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3558 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3559 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3560 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3561 VIXL_ASSERT(allow_macro_instructions_); 3562 VIXL_ASSERT(OutsideITBlock()); 3563 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3564 ITScope it_scope(this, &cond); 3565 smlaltt(cond, rdlo, rdhi, rn, rm); 3566 } 3567 void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) { 3568 Smlaltt(al, rdlo, rdhi, rn, rm); 3569 } 3570 3571 void Smlatb( 3572 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3573 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3574 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3575 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3576 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3577 VIXL_ASSERT(allow_macro_instructions_); 3578 VIXL_ASSERT(OutsideITBlock()); 3579 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3580 ITScope it_scope(this, &cond); 3581 smlatb(cond, rd, rn, rm, ra); 3582 } 3583 void Smlatb(Register rd, Register rn, Register rm, Register ra) { 3584 Smlatb(al, rd, rn, rm, ra); 3585 } 3586 3587 void Smlatt( 3588 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3589 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3590 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3591 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3592 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3593 VIXL_ASSERT(allow_macro_instructions_); 3594 VIXL_ASSERT(OutsideITBlock()); 3595 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3596 ITScope it_scope(this, &cond); 3597 smlatt(cond, rd, rn, rm, ra); 3598 } 3599 void Smlatt(Register rd, Register rn, Register rm, Register ra) { 3600 Smlatt(al, rd, rn, rm, ra); 3601 } 3602 3603 void Smlawb( 3604 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3605 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3606 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3607 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3608 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3609 VIXL_ASSERT(allow_macro_instructions_); 3610 VIXL_ASSERT(OutsideITBlock()); 3611 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3612 ITScope it_scope(this, &cond); 3613 smlawb(cond, rd, rn, rm, ra); 3614 } 3615 void Smlawb(Register rd, Register rn, Register rm, Register ra) { 3616 Smlawb(al, rd, rn, rm, ra); 3617 } 3618 3619 void Smlawt( 3620 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3621 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3622 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3623 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3624 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3625 VIXL_ASSERT(allow_macro_instructions_); 3626 VIXL_ASSERT(OutsideITBlock()); 3627 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3628 ITScope it_scope(this, &cond); 3629 smlawt(cond, rd, rn, rm, ra); 3630 } 3631 void Smlawt(Register rd, Register rn, Register rm, Register ra) { 3632 Smlawt(al, rd, rn, rm, ra); 3633 } 3634 3635 void Smlsd( 3636 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3637 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3638 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3639 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3640 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3641 VIXL_ASSERT(allow_macro_instructions_); 3642 VIXL_ASSERT(OutsideITBlock()); 3643 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3644 ITScope it_scope(this, &cond); 3645 smlsd(cond, rd, rn, rm, ra); 3646 } 3647 void Smlsd(Register rd, Register rn, Register rm, Register ra) { 3648 Smlsd(al, rd, rn, rm, ra); 3649 } 3650 3651 void Smlsdx( 3652 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3653 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3654 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3655 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3656 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3657 VIXL_ASSERT(allow_macro_instructions_); 3658 VIXL_ASSERT(OutsideITBlock()); 3659 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3660 ITScope it_scope(this, &cond); 3661 smlsdx(cond, rd, rn, rm, ra); 3662 } 3663 void Smlsdx(Register rd, Register rn, Register rm, Register ra) { 3664 Smlsdx(al, rd, rn, rm, ra); 3665 } 3666 3667 void Smlsld( 3668 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3669 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3670 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3671 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3672 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3673 VIXL_ASSERT(allow_macro_instructions_); 3674 VIXL_ASSERT(OutsideITBlock()); 3675 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3676 ITScope it_scope(this, &cond); 3677 smlsld(cond, rdlo, rdhi, rn, rm); 3678 } 3679 void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) { 3680 Smlsld(al, rdlo, rdhi, rn, rm); 3681 } 3682 3683 void Smlsldx( 3684 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3685 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3686 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3687 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3688 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3689 VIXL_ASSERT(allow_macro_instructions_); 3690 VIXL_ASSERT(OutsideITBlock()); 3691 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3692 ITScope it_scope(this, &cond); 3693 smlsldx(cond, rdlo, rdhi, rn, rm); 3694 } 3695 void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) { 3696 Smlsldx(al, rdlo, rdhi, rn, rm); 3697 } 3698 3699 void Smmla( 3700 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3701 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3702 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3703 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3704 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3705 VIXL_ASSERT(allow_macro_instructions_); 3706 VIXL_ASSERT(OutsideITBlock()); 3707 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3708 ITScope it_scope(this, &cond); 3709 smmla(cond, rd, rn, rm, ra); 3710 } 3711 void Smmla(Register rd, Register rn, Register rm, Register ra) { 3712 Smmla(al, rd, rn, rm, ra); 3713 } 3714 3715 void Smmlar( 3716 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3717 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3718 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3719 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3720 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3721 VIXL_ASSERT(allow_macro_instructions_); 3722 VIXL_ASSERT(OutsideITBlock()); 3723 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3724 ITScope it_scope(this, &cond); 3725 smmlar(cond, rd, rn, rm, ra); 3726 } 3727 void Smmlar(Register rd, Register rn, Register rm, Register ra) { 3728 Smmlar(al, rd, rn, rm, ra); 3729 } 3730 3731 void Smmls( 3732 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3733 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3734 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3735 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3736 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3737 VIXL_ASSERT(allow_macro_instructions_); 3738 VIXL_ASSERT(OutsideITBlock()); 3739 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3740 ITScope it_scope(this, &cond); 3741 smmls(cond, rd, rn, rm, ra); 3742 } 3743 void Smmls(Register rd, Register rn, Register rm, Register ra) { 3744 Smmls(al, rd, rn, rm, ra); 3745 } 3746 3747 void Smmlsr( 3748 Condition cond, Register rd, Register rn, Register rm, Register ra) { 3749 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3750 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3751 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3752 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 3753 VIXL_ASSERT(allow_macro_instructions_); 3754 VIXL_ASSERT(OutsideITBlock()); 3755 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3756 ITScope it_scope(this, &cond); 3757 smmlsr(cond, rd, rn, rm, ra); 3758 } 3759 void Smmlsr(Register rd, Register rn, Register rm, Register ra) { 3760 Smmlsr(al, rd, rn, rm, ra); 3761 } 3762 3763 void Smmul(Condition cond, Register rd, Register rn, Register rm) { 3764 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3765 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3766 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3767 VIXL_ASSERT(allow_macro_instructions_); 3768 VIXL_ASSERT(OutsideITBlock()); 3769 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3770 ITScope it_scope(this, &cond); 3771 smmul(cond, rd, rn, rm); 3772 } 3773 void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); } 3774 3775 void Smmulr(Condition cond, Register rd, Register rn, Register rm) { 3776 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3777 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3778 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3779 VIXL_ASSERT(allow_macro_instructions_); 3780 VIXL_ASSERT(OutsideITBlock()); 3781 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3782 ITScope it_scope(this, &cond); 3783 smmulr(cond, rd, rn, rm); 3784 } 3785 void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); } 3786 3787 void Smuad(Condition cond, Register rd, Register rn, Register rm) { 3788 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3789 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3790 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3791 VIXL_ASSERT(allow_macro_instructions_); 3792 VIXL_ASSERT(OutsideITBlock()); 3793 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3794 ITScope it_scope(this, &cond); 3795 smuad(cond, rd, rn, rm); 3796 } 3797 void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); } 3798 3799 void Smuadx(Condition cond, Register rd, Register rn, Register rm) { 3800 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3801 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3802 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3803 VIXL_ASSERT(allow_macro_instructions_); 3804 VIXL_ASSERT(OutsideITBlock()); 3805 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3806 ITScope it_scope(this, &cond); 3807 smuadx(cond, rd, rn, rm); 3808 } 3809 void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); } 3810 3811 void Smulbb(Condition cond, Register rd, Register rn, Register rm) { 3812 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3813 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3814 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3815 VIXL_ASSERT(allow_macro_instructions_); 3816 VIXL_ASSERT(OutsideITBlock()); 3817 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3818 ITScope it_scope(this, &cond); 3819 smulbb(cond, rd, rn, rm); 3820 } 3821 void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); } 3822 3823 void Smulbt(Condition cond, Register rd, Register rn, Register rm) { 3824 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3825 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3826 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3827 VIXL_ASSERT(allow_macro_instructions_); 3828 VIXL_ASSERT(OutsideITBlock()); 3829 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3830 ITScope it_scope(this, &cond); 3831 smulbt(cond, rd, rn, rm); 3832 } 3833 void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); } 3834 3835 void Smull( 3836 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3837 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3838 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3839 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3840 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3841 VIXL_ASSERT(allow_macro_instructions_); 3842 VIXL_ASSERT(OutsideITBlock()); 3843 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3844 ITScope it_scope(this, &cond); 3845 smull(cond, rdlo, rdhi, rn, rm); 3846 } 3847 void Smull(Register rdlo, Register rdhi, Register rn, Register rm) { 3848 Smull(al, rdlo, rdhi, rn, rm); 3849 } 3850 void Smull(FlagsUpdate flags, 3851 Condition cond, 3852 Register rdlo, 3853 Register rdhi, 3854 Register rn, 3855 Register rm) { 3856 switch (flags) { 3857 case LeaveFlags: 3858 Smull(cond, rdlo, rdhi, rn, rm); 3859 break; 3860 case SetFlags: 3861 Smulls(cond, rdlo, rdhi, rn, rm); 3862 break; 3863 case DontCare: 3864 Smull(cond, rdlo, rdhi, rn, rm); 3865 break; 3866 } 3867 } 3868 void Smull(FlagsUpdate flags, 3869 Register rdlo, 3870 Register rdhi, 3871 Register rn, 3872 Register rm) { 3873 Smull(flags, al, rdlo, rdhi, rn, rm); 3874 } 3875 3876 void Smulls( 3877 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 3878 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 3879 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 3880 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3881 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3882 VIXL_ASSERT(allow_macro_instructions_); 3883 VIXL_ASSERT(OutsideITBlock()); 3884 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3885 ITScope it_scope(this, &cond); 3886 smulls(cond, rdlo, rdhi, rn, rm); 3887 } 3888 void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) { 3889 Smulls(al, rdlo, rdhi, rn, rm); 3890 } 3891 3892 void Smultb(Condition cond, Register rd, Register rn, Register rm) { 3893 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3894 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3895 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3896 VIXL_ASSERT(allow_macro_instructions_); 3897 VIXL_ASSERT(OutsideITBlock()); 3898 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3899 ITScope it_scope(this, &cond); 3900 smultb(cond, rd, rn, rm); 3901 } 3902 void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); } 3903 3904 void Smultt(Condition cond, Register rd, Register rn, Register rm) { 3905 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3906 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3907 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3908 VIXL_ASSERT(allow_macro_instructions_); 3909 VIXL_ASSERT(OutsideITBlock()); 3910 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3911 ITScope it_scope(this, &cond); 3912 smultt(cond, rd, rn, rm); 3913 } 3914 void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); } 3915 3916 void Smulwb(Condition cond, Register rd, Register rn, Register rm) { 3917 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3918 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3919 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3920 VIXL_ASSERT(allow_macro_instructions_); 3921 VIXL_ASSERT(OutsideITBlock()); 3922 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3923 ITScope it_scope(this, &cond); 3924 smulwb(cond, rd, rn, rm); 3925 } 3926 void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); } 3927 3928 void Smulwt(Condition cond, Register rd, Register rn, Register rm) { 3929 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3930 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3931 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3932 VIXL_ASSERT(allow_macro_instructions_); 3933 VIXL_ASSERT(OutsideITBlock()); 3934 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3935 ITScope it_scope(this, &cond); 3936 smulwt(cond, rd, rn, rm); 3937 } 3938 void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); } 3939 3940 void Smusd(Condition cond, Register rd, Register rn, Register rm) { 3941 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3942 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3943 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3944 VIXL_ASSERT(allow_macro_instructions_); 3945 VIXL_ASSERT(OutsideITBlock()); 3946 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3947 ITScope it_scope(this, &cond); 3948 smusd(cond, rd, rn, rm); 3949 } 3950 void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); } 3951 3952 void Smusdx(Condition cond, Register rd, Register rn, Register rm) { 3953 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3954 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3955 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3956 VIXL_ASSERT(allow_macro_instructions_); 3957 VIXL_ASSERT(OutsideITBlock()); 3958 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3959 ITScope it_scope(this, &cond); 3960 smusdx(cond, rd, rn, rm); 3961 } 3962 void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); } 3963 3964 void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) { 3965 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3966 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 3967 VIXL_ASSERT(allow_macro_instructions_); 3968 VIXL_ASSERT(OutsideITBlock()); 3969 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3970 ITScope it_scope(this, &cond); 3971 ssat(cond, rd, imm, operand); 3972 } 3973 void Ssat(Register rd, uint32_t imm, const Operand& operand) { 3974 Ssat(al, rd, imm, operand); 3975 } 3976 3977 void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) { 3978 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3979 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3980 VIXL_ASSERT(allow_macro_instructions_); 3981 VIXL_ASSERT(OutsideITBlock()); 3982 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3983 ITScope it_scope(this, &cond); 3984 ssat16(cond, rd, imm, rn); 3985 } 3986 void Ssat16(Register rd, uint32_t imm, Register rn) { 3987 Ssat16(al, rd, imm, rn); 3988 } 3989 3990 void Ssax(Condition cond, Register rd, Register rn, Register rm) { 3991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 3992 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 3993 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 3994 VIXL_ASSERT(allow_macro_instructions_); 3995 VIXL_ASSERT(OutsideITBlock()); 3996 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 3997 ITScope it_scope(this, &cond); 3998 ssax(cond, rd, rn, rm); 3999 } 4000 void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); } 4001 4002 void Ssub16(Condition cond, Register rd, Register rn, Register rm) { 4003 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4004 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4005 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4006 VIXL_ASSERT(allow_macro_instructions_); 4007 VIXL_ASSERT(OutsideITBlock()); 4008 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4009 ITScope it_scope(this, &cond); 4010 ssub16(cond, rd, rn, rm); 4011 } 4012 void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); } 4013 4014 void Ssub8(Condition cond, Register rd, Register rn, Register rm) { 4015 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4016 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4017 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4018 VIXL_ASSERT(allow_macro_instructions_); 4019 VIXL_ASSERT(OutsideITBlock()); 4020 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4021 ITScope it_scope(this, &cond); 4022 ssub8(cond, rd, rn, rm); 4023 } 4024 void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); } 4025 4026 void Stl(Condition cond, Register rt, const MemOperand& operand) { 4027 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4028 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4029 VIXL_ASSERT(allow_macro_instructions_); 4030 VIXL_ASSERT(OutsideITBlock()); 4031 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4032 ITScope it_scope(this, &cond); 4033 stl(cond, rt, operand); 4034 } 4035 void Stl(Register rt, const MemOperand& operand) { Stl(al, rt, operand); } 4036 4037 void Stlb(Condition cond, Register rt, const MemOperand& operand) { 4038 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4039 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4040 VIXL_ASSERT(allow_macro_instructions_); 4041 VIXL_ASSERT(OutsideITBlock()); 4042 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4043 ITScope it_scope(this, &cond); 4044 stlb(cond, rt, operand); 4045 } 4046 void Stlb(Register rt, const MemOperand& operand) { Stlb(al, rt, operand); } 4047 4048 void Stlex(Condition cond, 4049 Register rd, 4050 Register rt, 4051 const MemOperand& operand) { 4052 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4053 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4054 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4055 VIXL_ASSERT(allow_macro_instructions_); 4056 VIXL_ASSERT(OutsideITBlock()); 4057 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4058 ITScope it_scope(this, &cond); 4059 stlex(cond, rd, rt, operand); 4060 } 4061 void Stlex(Register rd, Register rt, const MemOperand& operand) { 4062 Stlex(al, rd, rt, operand); 4063 } 4064 4065 void Stlexb(Condition cond, 4066 Register rd, 4067 Register rt, 4068 const MemOperand& operand) { 4069 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4070 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4071 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4072 VIXL_ASSERT(allow_macro_instructions_); 4073 VIXL_ASSERT(OutsideITBlock()); 4074 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4075 ITScope it_scope(this, &cond); 4076 stlexb(cond, rd, rt, operand); 4077 } 4078 void Stlexb(Register rd, Register rt, const MemOperand& operand) { 4079 Stlexb(al, rd, rt, operand); 4080 } 4081 4082 void Stlexd(Condition cond, 4083 Register rd, 4084 Register rt, 4085 Register rt2, 4086 const MemOperand& operand) { 4087 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4088 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4089 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 4090 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4091 VIXL_ASSERT(allow_macro_instructions_); 4092 VIXL_ASSERT(OutsideITBlock()); 4093 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4094 ITScope it_scope(this, &cond); 4095 stlexd(cond, rd, rt, rt2, operand); 4096 } 4097 void Stlexd(Register rd, 4098 Register rt, 4099 Register rt2, 4100 const MemOperand& operand) { 4101 Stlexd(al, rd, rt, rt2, operand); 4102 } 4103 4104 void Stlexh(Condition cond, 4105 Register rd, 4106 Register rt, 4107 const MemOperand& operand) { 4108 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4109 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4110 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4111 VIXL_ASSERT(allow_macro_instructions_); 4112 VIXL_ASSERT(OutsideITBlock()); 4113 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4114 ITScope it_scope(this, &cond); 4115 stlexh(cond, rd, rt, operand); 4116 } 4117 void Stlexh(Register rd, Register rt, const MemOperand& operand) { 4118 Stlexh(al, rd, rt, operand); 4119 } 4120 4121 void Stlh(Condition cond, Register rt, const MemOperand& operand) { 4122 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4123 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4124 VIXL_ASSERT(allow_macro_instructions_); 4125 VIXL_ASSERT(OutsideITBlock()); 4126 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4127 ITScope it_scope(this, &cond); 4128 stlh(cond, rt, operand); 4129 } 4130 void Stlh(Register rt, const MemOperand& operand) { Stlh(al, rt, operand); } 4131 4132 void Stm(Condition cond, 4133 Register rn, 4134 WriteBack write_back, 4135 RegisterList registers) { 4136 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4137 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4138 VIXL_ASSERT(allow_macro_instructions_); 4139 VIXL_ASSERT(OutsideITBlock()); 4140 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4141 ITScope it_scope(this, &cond); 4142 stm(cond, rn, write_back, registers); 4143 } 4144 void Stm(Register rn, WriteBack write_back, RegisterList registers) { 4145 Stm(al, rn, write_back, registers); 4146 } 4147 4148 void Stmda(Condition cond, 4149 Register rn, 4150 WriteBack write_back, 4151 RegisterList registers) { 4152 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4153 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4154 VIXL_ASSERT(allow_macro_instructions_); 4155 VIXL_ASSERT(OutsideITBlock()); 4156 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4157 ITScope it_scope(this, &cond); 4158 stmda(cond, rn, write_back, registers); 4159 } 4160 void Stmda(Register rn, WriteBack write_back, RegisterList registers) { 4161 Stmda(al, rn, write_back, registers); 4162 } 4163 4164 void Stmdb(Condition cond, 4165 Register rn, 4166 WriteBack write_back, 4167 RegisterList registers) { 4168 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4169 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4170 VIXL_ASSERT(allow_macro_instructions_); 4171 VIXL_ASSERT(OutsideITBlock()); 4172 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4173 ITScope it_scope(this, &cond); 4174 stmdb(cond, rn, write_back, registers); 4175 } 4176 void Stmdb(Register rn, WriteBack write_back, RegisterList registers) { 4177 Stmdb(al, rn, write_back, registers); 4178 } 4179 4180 void Stmea(Condition cond, 4181 Register rn, 4182 WriteBack write_back, 4183 RegisterList registers) { 4184 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4185 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4186 VIXL_ASSERT(allow_macro_instructions_); 4187 VIXL_ASSERT(OutsideITBlock()); 4188 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4189 ITScope it_scope(this, &cond); 4190 stmea(cond, rn, write_back, registers); 4191 } 4192 void Stmea(Register rn, WriteBack write_back, RegisterList registers) { 4193 Stmea(al, rn, write_back, registers); 4194 } 4195 4196 void Stmed(Condition cond, 4197 Register rn, 4198 WriteBack write_back, 4199 RegisterList registers) { 4200 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4201 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4202 VIXL_ASSERT(allow_macro_instructions_); 4203 VIXL_ASSERT(OutsideITBlock()); 4204 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4205 ITScope it_scope(this, &cond); 4206 stmed(cond, rn, write_back, registers); 4207 } 4208 void Stmed(Register rn, WriteBack write_back, RegisterList registers) { 4209 Stmed(al, rn, write_back, registers); 4210 } 4211 4212 void Stmfa(Condition cond, 4213 Register rn, 4214 WriteBack write_back, 4215 RegisterList registers) { 4216 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4217 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4218 VIXL_ASSERT(allow_macro_instructions_); 4219 VIXL_ASSERT(OutsideITBlock()); 4220 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4221 ITScope it_scope(this, &cond); 4222 stmfa(cond, rn, write_back, registers); 4223 } 4224 void Stmfa(Register rn, WriteBack write_back, RegisterList registers) { 4225 Stmfa(al, rn, write_back, registers); 4226 } 4227 4228 void Stmfd(Condition cond, 4229 Register rn, 4230 WriteBack write_back, 4231 RegisterList registers) { 4232 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4233 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4234 VIXL_ASSERT(allow_macro_instructions_); 4235 VIXL_ASSERT(OutsideITBlock()); 4236 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4237 ITScope it_scope(this, &cond); 4238 stmfd(cond, rn, write_back, registers); 4239 } 4240 void Stmfd(Register rn, WriteBack write_back, RegisterList registers) { 4241 Stmfd(al, rn, write_back, registers); 4242 } 4243 4244 void Stmib(Condition cond, 4245 Register rn, 4246 WriteBack write_back, 4247 RegisterList registers) { 4248 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4249 VIXL_ASSERT(!AliasesAvailableScratchRegister(registers)); 4250 VIXL_ASSERT(allow_macro_instructions_); 4251 VIXL_ASSERT(OutsideITBlock()); 4252 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4253 ITScope it_scope(this, &cond); 4254 stmib(cond, rn, write_back, registers); 4255 } 4256 void Stmib(Register rn, WriteBack write_back, RegisterList registers) { 4257 Stmib(al, rn, write_back, registers); 4258 } 4259 4260 void Str(Condition cond, Register rt, const MemOperand& operand) { 4261 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4262 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4263 VIXL_ASSERT(allow_macro_instructions_); 4264 VIXL_ASSERT(OutsideITBlock()); 4265 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4266 bool can_use_it = 4267 // STR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 4268 (operand.IsImmediate() && rt.IsLow() && 4269 operand.GetBaseRegister().IsLow() && 4270 operand.IsOffsetImmediateWithinRange(0, 124, 4) && 4271 (operand.GetAddrMode() == Offset)) || 4272 // STR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2 4273 (operand.IsImmediate() && rt.IsLow() && 4274 operand.GetBaseRegister().IsSP() && 4275 operand.IsOffsetImmediateWithinRange(0, 1020, 4) && 4276 (operand.GetAddrMode() == Offset)) || 4277 // STR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 4278 (operand.IsPlainRegister() && rt.IsLow() && 4279 operand.GetBaseRegister().IsLow() && 4280 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 4281 (operand.GetAddrMode() == Offset)); 4282 ITScope it_scope(this, &cond, can_use_it); 4283 str(cond, rt, operand); 4284 } 4285 void Str(Register rt, const MemOperand& operand) { Str(al, rt, operand); } 4286 4287 void Strb(Condition cond, Register rt, const MemOperand& operand) { 4288 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4289 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4290 VIXL_ASSERT(allow_macro_instructions_); 4291 VIXL_ASSERT(OutsideITBlock()); 4292 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4293 bool can_use_it = 4294 // STRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 4295 (operand.IsImmediate() && rt.IsLow() && 4296 operand.GetBaseRegister().IsLow() && 4297 operand.IsOffsetImmediateWithinRange(0, 31) && 4298 (operand.GetAddrMode() == Offset)) || 4299 // STRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 4300 (operand.IsPlainRegister() && rt.IsLow() && 4301 operand.GetBaseRegister().IsLow() && 4302 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 4303 (operand.GetAddrMode() == Offset)); 4304 ITScope it_scope(this, &cond, can_use_it); 4305 strb(cond, rt, operand); 4306 } 4307 void Strb(Register rt, const MemOperand& operand) { Strb(al, rt, operand); } 4308 4309 void Strd(Condition cond, 4310 Register rt, 4311 Register rt2, 4312 const MemOperand& operand) { 4313 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4314 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 4315 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4316 VIXL_ASSERT(allow_macro_instructions_); 4317 VIXL_ASSERT(OutsideITBlock()); 4318 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4319 ITScope it_scope(this, &cond); 4320 strd(cond, rt, rt2, operand); 4321 } 4322 void Strd(Register rt, Register rt2, const MemOperand& operand) { 4323 Strd(al, rt, rt2, operand); 4324 } 4325 4326 void Strex(Condition cond, 4327 Register rd, 4328 Register rt, 4329 const MemOperand& operand) { 4330 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4331 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4332 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4333 VIXL_ASSERT(allow_macro_instructions_); 4334 VIXL_ASSERT(OutsideITBlock()); 4335 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4336 ITScope it_scope(this, &cond); 4337 strex(cond, rd, rt, operand); 4338 } 4339 void Strex(Register rd, Register rt, const MemOperand& operand) { 4340 Strex(al, rd, rt, operand); 4341 } 4342 4343 void Strexb(Condition cond, 4344 Register rd, 4345 Register rt, 4346 const MemOperand& operand) { 4347 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4348 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4349 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4350 VIXL_ASSERT(allow_macro_instructions_); 4351 VIXL_ASSERT(OutsideITBlock()); 4352 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4353 ITScope it_scope(this, &cond); 4354 strexb(cond, rd, rt, operand); 4355 } 4356 void Strexb(Register rd, Register rt, const MemOperand& operand) { 4357 Strexb(al, rd, rt, operand); 4358 } 4359 4360 void Strexd(Condition cond, 4361 Register rd, 4362 Register rt, 4363 Register rt2, 4364 const MemOperand& operand) { 4365 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4366 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4367 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 4368 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4369 VIXL_ASSERT(allow_macro_instructions_); 4370 VIXL_ASSERT(OutsideITBlock()); 4371 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4372 ITScope it_scope(this, &cond); 4373 strexd(cond, rd, rt, rt2, operand); 4374 } 4375 void Strexd(Register rd, 4376 Register rt, 4377 Register rt2, 4378 const MemOperand& operand) { 4379 Strexd(al, rd, rt, rt2, operand); 4380 } 4381 4382 void Strexh(Condition cond, 4383 Register rd, 4384 Register rt, 4385 const MemOperand& operand) { 4386 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4387 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4388 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4389 VIXL_ASSERT(allow_macro_instructions_); 4390 VIXL_ASSERT(OutsideITBlock()); 4391 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4392 ITScope it_scope(this, &cond); 4393 strexh(cond, rd, rt, operand); 4394 } 4395 void Strexh(Register rd, Register rt, const MemOperand& operand) { 4396 Strexh(al, rd, rt, operand); 4397 } 4398 4399 void Strh(Condition cond, Register rt, const MemOperand& operand) { 4400 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 4401 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4402 VIXL_ASSERT(allow_macro_instructions_); 4403 VIXL_ASSERT(OutsideITBlock()); 4404 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4405 bool can_use_it = 4406 // STRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1 4407 (operand.IsImmediate() && rt.IsLow() && 4408 operand.GetBaseRegister().IsLow() && 4409 operand.IsOffsetImmediateWithinRange(0, 62, 2) && 4410 (operand.GetAddrMode() == Offset)) || 4411 // STRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1 4412 (operand.IsPlainRegister() && rt.IsLow() && 4413 operand.GetBaseRegister().IsLow() && 4414 operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() && 4415 (operand.GetAddrMode() == Offset)); 4416 ITScope it_scope(this, &cond, can_use_it); 4417 strh(cond, rt, operand); 4418 } 4419 void Strh(Register rt, const MemOperand& operand) { Strh(al, rt, operand); } 4420 4421 void Sub(Condition cond, Register rd, Register rn, const Operand& operand) { 4422 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4423 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4424 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4425 VIXL_ASSERT(allow_macro_instructions_); 4426 VIXL_ASSERT(OutsideITBlock()); 4427 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4428 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) { 4429 uint32_t immediate = operand.GetImmediate(); 4430 if (immediate == 0) { 4431 return; 4432 } 4433 } 4434 bool can_use_it = 4435 // SUB<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1 4436 (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() && 4437 rd.IsLow()) || 4438 // SUB<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2 4439 (operand.IsImmediate() && (operand.GetImmediate() <= 255) && 4440 rd.IsLow() && rn.Is(rd)) || 4441 // SUB<c>{<q>} <Rd>, <Rn>, <Rm> 4442 (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 4443 operand.GetBaseRegister().IsLow()); 4444 ITScope it_scope(this, &cond, can_use_it); 4445 sub(cond, rd, rn, operand); 4446 } 4447 void Sub(Register rd, Register rn, const Operand& operand) { 4448 Sub(al, rd, rn, operand); 4449 } 4450 void Sub(FlagsUpdate flags, 4451 Condition cond, 4452 Register rd, 4453 Register rn, 4454 const Operand& operand) { 4455 switch (flags) { 4456 case LeaveFlags: 4457 Sub(cond, rd, rn, operand); 4458 break; 4459 case SetFlags: 4460 Subs(cond, rd, rn, operand); 4461 break; 4462 case DontCare: 4463 bool can_be_16bit_encoded = 4464 IsUsingT32() && cond.Is(al) && 4465 ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && 4466 operand.GetBaseRegister().IsLow()) || 4467 (operand.IsImmediate() && 4468 ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) || 4469 (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256))))); 4470 if (can_be_16bit_encoded) { 4471 Subs(cond, rd, rn, operand); 4472 } else { 4473 Sub(cond, rd, rn, operand); 4474 } 4475 break; 4476 } 4477 } 4478 void Sub(FlagsUpdate flags, 4479 Register rd, 4480 Register rn, 4481 const Operand& operand) { 4482 Sub(flags, al, rd, rn, operand); 4483 } 4484 4485 void Subs(Condition cond, Register rd, Register rn, const Operand& operand) { 4486 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4487 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4488 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4489 VIXL_ASSERT(allow_macro_instructions_); 4490 VIXL_ASSERT(OutsideITBlock()); 4491 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4492 ITScope it_scope(this, &cond); 4493 subs(cond, rd, rn, operand); 4494 } 4495 void Subs(Register rd, Register rn, const Operand& operand) { 4496 Subs(al, rd, rn, operand); 4497 } 4498 4499 4500 void Svc(Condition cond, uint32_t imm) { 4501 VIXL_ASSERT(allow_macro_instructions_); 4502 VIXL_ASSERT(OutsideITBlock()); 4503 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4504 ITScope it_scope(this, &cond); 4505 svc(cond, imm); 4506 } 4507 void Svc(uint32_t imm) { Svc(al, imm); } 4508 4509 void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) { 4510 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4511 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4512 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4513 VIXL_ASSERT(allow_macro_instructions_); 4514 VIXL_ASSERT(OutsideITBlock()); 4515 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4516 ITScope it_scope(this, &cond); 4517 sxtab(cond, rd, rn, operand); 4518 } 4519 void Sxtab(Register rd, Register rn, const Operand& operand) { 4520 Sxtab(al, rd, rn, operand); 4521 } 4522 4523 void Sxtab16(Condition cond, 4524 Register rd, 4525 Register rn, 4526 const Operand& operand) { 4527 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4528 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4529 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4530 VIXL_ASSERT(allow_macro_instructions_); 4531 VIXL_ASSERT(OutsideITBlock()); 4532 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4533 ITScope it_scope(this, &cond); 4534 sxtab16(cond, rd, rn, operand); 4535 } 4536 void Sxtab16(Register rd, Register rn, const Operand& operand) { 4537 Sxtab16(al, rd, rn, operand); 4538 } 4539 4540 void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) { 4541 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4542 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4543 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4544 VIXL_ASSERT(allow_macro_instructions_); 4545 VIXL_ASSERT(OutsideITBlock()); 4546 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4547 ITScope it_scope(this, &cond); 4548 sxtah(cond, rd, rn, operand); 4549 } 4550 void Sxtah(Register rd, Register rn, const Operand& operand) { 4551 Sxtah(al, rd, rn, operand); 4552 } 4553 4554 void Sxtb(Condition cond, Register rd, const Operand& operand) { 4555 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4556 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4557 VIXL_ASSERT(allow_macro_instructions_); 4558 VIXL_ASSERT(OutsideITBlock()); 4559 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4560 ITScope it_scope(this, &cond); 4561 sxtb(cond, rd, operand); 4562 } 4563 void Sxtb(Register rd, const Operand& operand) { Sxtb(al, rd, operand); } 4564 4565 void Sxtb16(Condition cond, Register rd, const Operand& operand) { 4566 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4567 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4568 VIXL_ASSERT(allow_macro_instructions_); 4569 VIXL_ASSERT(OutsideITBlock()); 4570 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4571 ITScope it_scope(this, &cond); 4572 sxtb16(cond, rd, operand); 4573 } 4574 void Sxtb16(Register rd, const Operand& operand) { Sxtb16(al, rd, operand); } 4575 4576 void Sxth(Condition cond, Register rd, const Operand& operand) { 4577 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4578 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4579 VIXL_ASSERT(allow_macro_instructions_); 4580 VIXL_ASSERT(OutsideITBlock()); 4581 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4582 ITScope it_scope(this, &cond); 4583 sxth(cond, rd, operand); 4584 } 4585 void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); } 4586 4587 4588 void Teq(Condition cond, Register rn, const Operand& operand) { 4589 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4590 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4591 VIXL_ASSERT(allow_macro_instructions_); 4592 VIXL_ASSERT(OutsideITBlock()); 4593 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4594 ITScope it_scope(this, &cond); 4595 teq(cond, rn, operand); 4596 } 4597 void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); } 4598 4599 void Tst(Condition cond, Register rn, const Operand& operand) { 4600 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4601 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4602 VIXL_ASSERT(allow_macro_instructions_); 4603 VIXL_ASSERT(OutsideITBlock()); 4604 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4605 bool can_use_it = 4606 // TST{<c>}{<q>} <Rn>, <Rm> ; T1 4607 operand.IsPlainRegister() && rn.IsLow() && 4608 operand.GetBaseRegister().IsLow(); 4609 ITScope it_scope(this, &cond, can_use_it); 4610 tst(cond, rn, operand); 4611 } 4612 void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); } 4613 4614 void Uadd16(Condition cond, Register rd, Register rn, Register rm) { 4615 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4616 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4617 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4618 VIXL_ASSERT(allow_macro_instructions_); 4619 VIXL_ASSERT(OutsideITBlock()); 4620 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4621 ITScope it_scope(this, &cond); 4622 uadd16(cond, rd, rn, rm); 4623 } 4624 void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); } 4625 4626 void Uadd8(Condition cond, Register rd, Register rn, Register rm) { 4627 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4628 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4629 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4630 VIXL_ASSERT(allow_macro_instructions_); 4631 VIXL_ASSERT(OutsideITBlock()); 4632 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4633 ITScope it_scope(this, &cond); 4634 uadd8(cond, rd, rn, rm); 4635 } 4636 void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); } 4637 4638 void Uasx(Condition cond, Register rd, Register rn, Register rm) { 4639 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4640 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4641 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4642 VIXL_ASSERT(allow_macro_instructions_); 4643 VIXL_ASSERT(OutsideITBlock()); 4644 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4645 ITScope it_scope(this, &cond); 4646 uasx(cond, rd, rn, rm); 4647 } 4648 void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); } 4649 4650 void Ubfx(Condition cond, 4651 Register rd, 4652 Register rn, 4653 uint32_t lsb, 4654 const Operand& operand) { 4655 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4656 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4657 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 4658 VIXL_ASSERT(allow_macro_instructions_); 4659 VIXL_ASSERT(OutsideITBlock()); 4660 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4661 ITScope it_scope(this, &cond); 4662 ubfx(cond, rd, rn, lsb, operand); 4663 } 4664 void Ubfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) { 4665 Ubfx(al, rd, rn, lsb, operand); 4666 } 4667 4668 void Udf(Condition cond, uint32_t imm) { 4669 VIXL_ASSERT(allow_macro_instructions_); 4670 VIXL_ASSERT(OutsideITBlock()); 4671 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4672 ITScope it_scope(this, &cond); 4673 udf(cond, imm); 4674 } 4675 void Udf(uint32_t imm) { Udf(al, imm); } 4676 4677 void Udiv(Condition cond, Register rd, Register rn, Register rm) { 4678 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4679 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4680 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4681 VIXL_ASSERT(allow_macro_instructions_); 4682 VIXL_ASSERT(OutsideITBlock()); 4683 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4684 ITScope it_scope(this, &cond); 4685 udiv(cond, rd, rn, rm); 4686 } 4687 void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); } 4688 4689 void Uhadd16(Condition cond, Register rd, Register rn, Register rm) { 4690 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4691 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4692 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4693 VIXL_ASSERT(allow_macro_instructions_); 4694 VIXL_ASSERT(OutsideITBlock()); 4695 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4696 ITScope it_scope(this, &cond); 4697 uhadd16(cond, rd, rn, rm); 4698 } 4699 void Uhadd16(Register rd, Register rn, Register rm) { 4700 Uhadd16(al, rd, rn, rm); 4701 } 4702 4703 void Uhadd8(Condition cond, Register rd, Register rn, Register rm) { 4704 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4705 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4706 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4707 VIXL_ASSERT(allow_macro_instructions_); 4708 VIXL_ASSERT(OutsideITBlock()); 4709 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4710 ITScope it_scope(this, &cond); 4711 uhadd8(cond, rd, rn, rm); 4712 } 4713 void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); } 4714 4715 void Uhasx(Condition cond, Register rd, Register rn, Register rm) { 4716 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4717 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4718 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4719 VIXL_ASSERT(allow_macro_instructions_); 4720 VIXL_ASSERT(OutsideITBlock()); 4721 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4722 ITScope it_scope(this, &cond); 4723 uhasx(cond, rd, rn, rm); 4724 } 4725 void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); } 4726 4727 void Uhsax(Condition cond, Register rd, Register rn, Register rm) { 4728 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4729 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4730 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4731 VIXL_ASSERT(allow_macro_instructions_); 4732 VIXL_ASSERT(OutsideITBlock()); 4733 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4734 ITScope it_scope(this, &cond); 4735 uhsax(cond, rd, rn, rm); 4736 } 4737 void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); } 4738 4739 void Uhsub16(Condition cond, Register rd, Register rn, Register rm) { 4740 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4741 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4742 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4743 VIXL_ASSERT(allow_macro_instructions_); 4744 VIXL_ASSERT(OutsideITBlock()); 4745 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4746 ITScope it_scope(this, &cond); 4747 uhsub16(cond, rd, rn, rm); 4748 } 4749 void Uhsub16(Register rd, Register rn, Register rm) { 4750 Uhsub16(al, rd, rn, rm); 4751 } 4752 4753 void Uhsub8(Condition cond, Register rd, Register rn, Register rm) { 4754 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4755 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4756 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4757 VIXL_ASSERT(allow_macro_instructions_); 4758 VIXL_ASSERT(OutsideITBlock()); 4759 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4760 ITScope it_scope(this, &cond); 4761 uhsub8(cond, rd, rn, rm); 4762 } 4763 void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); } 4764 4765 void Umaal( 4766 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4767 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4768 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4769 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4770 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4771 VIXL_ASSERT(allow_macro_instructions_); 4772 VIXL_ASSERT(OutsideITBlock()); 4773 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4774 ITScope it_scope(this, &cond); 4775 umaal(cond, rdlo, rdhi, rn, rm); 4776 } 4777 void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) { 4778 Umaal(al, rdlo, rdhi, rn, rm); 4779 } 4780 4781 void Umlal( 4782 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4783 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4784 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4785 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4786 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4787 VIXL_ASSERT(allow_macro_instructions_); 4788 VIXL_ASSERT(OutsideITBlock()); 4789 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4790 ITScope it_scope(this, &cond); 4791 umlal(cond, rdlo, rdhi, rn, rm); 4792 } 4793 void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) { 4794 Umlal(al, rdlo, rdhi, rn, rm); 4795 } 4796 void Umlal(FlagsUpdate flags, 4797 Condition cond, 4798 Register rdlo, 4799 Register rdhi, 4800 Register rn, 4801 Register rm) { 4802 switch (flags) { 4803 case LeaveFlags: 4804 Umlal(cond, rdlo, rdhi, rn, rm); 4805 break; 4806 case SetFlags: 4807 Umlals(cond, rdlo, rdhi, rn, rm); 4808 break; 4809 case DontCare: 4810 Umlal(cond, rdlo, rdhi, rn, rm); 4811 break; 4812 } 4813 } 4814 void Umlal(FlagsUpdate flags, 4815 Register rdlo, 4816 Register rdhi, 4817 Register rn, 4818 Register rm) { 4819 Umlal(flags, al, rdlo, rdhi, rn, rm); 4820 } 4821 4822 void Umlals( 4823 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4824 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4825 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4826 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4827 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4828 VIXL_ASSERT(allow_macro_instructions_); 4829 VIXL_ASSERT(OutsideITBlock()); 4830 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4831 ITScope it_scope(this, &cond); 4832 umlals(cond, rdlo, rdhi, rn, rm); 4833 } 4834 void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) { 4835 Umlals(al, rdlo, rdhi, rn, rm); 4836 } 4837 4838 void Umull( 4839 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4840 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4841 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4842 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4843 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4844 VIXL_ASSERT(allow_macro_instructions_); 4845 VIXL_ASSERT(OutsideITBlock()); 4846 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4847 ITScope it_scope(this, &cond); 4848 umull(cond, rdlo, rdhi, rn, rm); 4849 } 4850 void Umull(Register rdlo, Register rdhi, Register rn, Register rm) { 4851 Umull(al, rdlo, rdhi, rn, rm); 4852 } 4853 void Umull(FlagsUpdate flags, 4854 Condition cond, 4855 Register rdlo, 4856 Register rdhi, 4857 Register rn, 4858 Register rm) { 4859 switch (flags) { 4860 case LeaveFlags: 4861 Umull(cond, rdlo, rdhi, rn, rm); 4862 break; 4863 case SetFlags: 4864 Umulls(cond, rdlo, rdhi, rn, rm); 4865 break; 4866 case DontCare: 4867 Umull(cond, rdlo, rdhi, rn, rm); 4868 break; 4869 } 4870 } 4871 void Umull(FlagsUpdate flags, 4872 Register rdlo, 4873 Register rdhi, 4874 Register rn, 4875 Register rm) { 4876 Umull(flags, al, rdlo, rdhi, rn, rm); 4877 } 4878 4879 void Umulls( 4880 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) { 4881 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo)); 4882 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi)); 4883 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4884 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4885 VIXL_ASSERT(allow_macro_instructions_); 4886 VIXL_ASSERT(OutsideITBlock()); 4887 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4888 ITScope it_scope(this, &cond); 4889 umulls(cond, rdlo, rdhi, rn, rm); 4890 } 4891 void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) { 4892 Umulls(al, rdlo, rdhi, rn, rm); 4893 } 4894 4895 void Uqadd16(Condition cond, Register rd, Register rn, Register rm) { 4896 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4897 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4898 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4899 VIXL_ASSERT(allow_macro_instructions_); 4900 VIXL_ASSERT(OutsideITBlock()); 4901 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4902 ITScope it_scope(this, &cond); 4903 uqadd16(cond, rd, rn, rm); 4904 } 4905 void Uqadd16(Register rd, Register rn, Register rm) { 4906 Uqadd16(al, rd, rn, rm); 4907 } 4908 4909 void Uqadd8(Condition cond, Register rd, Register rn, Register rm) { 4910 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4911 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4912 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4913 VIXL_ASSERT(allow_macro_instructions_); 4914 VIXL_ASSERT(OutsideITBlock()); 4915 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4916 ITScope it_scope(this, &cond); 4917 uqadd8(cond, rd, rn, rm); 4918 } 4919 void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); } 4920 4921 void Uqasx(Condition cond, Register rd, Register rn, Register rm) { 4922 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4923 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4924 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4925 VIXL_ASSERT(allow_macro_instructions_); 4926 VIXL_ASSERT(OutsideITBlock()); 4927 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4928 ITScope it_scope(this, &cond); 4929 uqasx(cond, rd, rn, rm); 4930 } 4931 void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); } 4932 4933 void Uqsax(Condition cond, Register rd, Register rn, Register rm) { 4934 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4935 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4936 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4937 VIXL_ASSERT(allow_macro_instructions_); 4938 VIXL_ASSERT(OutsideITBlock()); 4939 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4940 ITScope it_scope(this, &cond); 4941 uqsax(cond, rd, rn, rm); 4942 } 4943 void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); } 4944 4945 void Uqsub16(Condition cond, Register rd, Register rn, Register rm) { 4946 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4947 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4948 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4949 VIXL_ASSERT(allow_macro_instructions_); 4950 VIXL_ASSERT(OutsideITBlock()); 4951 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4952 ITScope it_scope(this, &cond); 4953 uqsub16(cond, rd, rn, rm); 4954 } 4955 void Uqsub16(Register rd, Register rn, Register rm) { 4956 Uqsub16(al, rd, rn, rm); 4957 } 4958 4959 void Uqsub8(Condition cond, Register rd, Register rn, Register rm) { 4960 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4961 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4962 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4963 VIXL_ASSERT(allow_macro_instructions_); 4964 VIXL_ASSERT(OutsideITBlock()); 4965 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4966 ITScope it_scope(this, &cond); 4967 uqsub8(cond, rd, rn, rm); 4968 } 4969 void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); } 4970 4971 void Usad8(Condition cond, Register rd, Register rn, Register rm) { 4972 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4973 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4974 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4975 VIXL_ASSERT(allow_macro_instructions_); 4976 VIXL_ASSERT(OutsideITBlock()); 4977 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4978 ITScope it_scope(this, &cond); 4979 usad8(cond, rd, rn, rm); 4980 } 4981 void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); } 4982 4983 void Usada8( 4984 Condition cond, Register rd, Register rn, Register rm, Register ra) { 4985 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 4986 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 4987 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 4988 VIXL_ASSERT(!AliasesAvailableScratchRegister(ra)); 4989 VIXL_ASSERT(allow_macro_instructions_); 4990 VIXL_ASSERT(OutsideITBlock()); 4991 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 4992 ITScope it_scope(this, &cond); 4993 usada8(cond, rd, rn, rm, ra); 4994 } 4995 void Usada8(Register rd, Register rn, Register rm, Register ra) { 4996 Usada8(al, rd, rn, rm, ra); 4997 } 4998 4999 void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) { 5000 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5001 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5002 VIXL_ASSERT(allow_macro_instructions_); 5003 VIXL_ASSERT(OutsideITBlock()); 5004 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5005 ITScope it_scope(this, &cond); 5006 usat(cond, rd, imm, operand); 5007 } 5008 void Usat(Register rd, uint32_t imm, const Operand& operand) { 5009 Usat(al, rd, imm, operand); 5010 } 5011 5012 void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) { 5013 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5014 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5015 VIXL_ASSERT(allow_macro_instructions_); 5016 VIXL_ASSERT(OutsideITBlock()); 5017 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5018 ITScope it_scope(this, &cond); 5019 usat16(cond, rd, imm, rn); 5020 } 5021 void Usat16(Register rd, uint32_t imm, Register rn) { 5022 Usat16(al, rd, imm, rn); 5023 } 5024 5025 void Usax(Condition cond, Register rd, Register rn, Register rm) { 5026 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5027 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5028 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5029 VIXL_ASSERT(allow_macro_instructions_); 5030 VIXL_ASSERT(OutsideITBlock()); 5031 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5032 ITScope it_scope(this, &cond); 5033 usax(cond, rd, rn, rm); 5034 } 5035 void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); } 5036 5037 void Usub16(Condition cond, Register rd, Register rn, Register rm) { 5038 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5039 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5040 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5041 VIXL_ASSERT(allow_macro_instructions_); 5042 VIXL_ASSERT(OutsideITBlock()); 5043 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5044 ITScope it_scope(this, &cond); 5045 usub16(cond, rd, rn, rm); 5046 } 5047 void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); } 5048 5049 void Usub8(Condition cond, Register rd, Register rn, Register rm) { 5050 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5051 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5052 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5053 VIXL_ASSERT(allow_macro_instructions_); 5054 VIXL_ASSERT(OutsideITBlock()); 5055 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5056 ITScope it_scope(this, &cond); 5057 usub8(cond, rd, rn, rm); 5058 } 5059 void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); } 5060 5061 void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) { 5062 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5063 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5064 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5065 VIXL_ASSERT(allow_macro_instructions_); 5066 VIXL_ASSERT(OutsideITBlock()); 5067 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5068 ITScope it_scope(this, &cond); 5069 uxtab(cond, rd, rn, operand); 5070 } 5071 void Uxtab(Register rd, Register rn, const Operand& operand) { 5072 Uxtab(al, rd, rn, operand); 5073 } 5074 5075 void Uxtab16(Condition cond, 5076 Register rd, 5077 Register rn, 5078 const Operand& operand) { 5079 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5080 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5081 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5082 VIXL_ASSERT(allow_macro_instructions_); 5083 VIXL_ASSERT(OutsideITBlock()); 5084 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5085 ITScope it_scope(this, &cond); 5086 uxtab16(cond, rd, rn, operand); 5087 } 5088 void Uxtab16(Register rd, Register rn, const Operand& operand) { 5089 Uxtab16(al, rd, rn, operand); 5090 } 5091 5092 void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) { 5093 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5094 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5095 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5096 VIXL_ASSERT(allow_macro_instructions_); 5097 VIXL_ASSERT(OutsideITBlock()); 5098 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5099 ITScope it_scope(this, &cond); 5100 uxtah(cond, rd, rn, operand); 5101 } 5102 void Uxtah(Register rd, Register rn, const Operand& operand) { 5103 Uxtah(al, rd, rn, operand); 5104 } 5105 5106 void Uxtb(Condition cond, Register rd, const Operand& operand) { 5107 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5108 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5109 VIXL_ASSERT(allow_macro_instructions_); 5110 VIXL_ASSERT(OutsideITBlock()); 5111 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5112 ITScope it_scope(this, &cond); 5113 uxtb(cond, rd, operand); 5114 } 5115 void Uxtb(Register rd, const Operand& operand) { Uxtb(al, rd, operand); } 5116 5117 void Uxtb16(Condition cond, Register rd, const Operand& operand) { 5118 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5119 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5120 VIXL_ASSERT(allow_macro_instructions_); 5121 VIXL_ASSERT(OutsideITBlock()); 5122 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5123 ITScope it_scope(this, &cond); 5124 uxtb16(cond, rd, operand); 5125 } 5126 void Uxtb16(Register rd, const Operand& operand) { Uxtb16(al, rd, operand); } 5127 5128 void Uxth(Condition cond, Register rd, const Operand& operand) { 5129 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5130 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5131 VIXL_ASSERT(allow_macro_instructions_); 5132 VIXL_ASSERT(OutsideITBlock()); 5133 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5134 ITScope it_scope(this, &cond); 5135 uxth(cond, rd, operand); 5136 } 5137 void Uxth(Register rd, const Operand& operand) { Uxth(al, rd, operand); } 5138 5139 void Vaba( 5140 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5141 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5142 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5143 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5144 VIXL_ASSERT(allow_macro_instructions_); 5145 VIXL_ASSERT(OutsideITBlock()); 5146 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5147 ITScope it_scope(this, &cond); 5148 vaba(cond, dt, rd, rn, rm); 5149 } 5150 void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5151 Vaba(al, dt, rd, rn, rm); 5152 } 5153 5154 void Vaba( 5155 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5156 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5157 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5158 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5159 VIXL_ASSERT(allow_macro_instructions_); 5160 VIXL_ASSERT(OutsideITBlock()); 5161 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5162 ITScope it_scope(this, &cond); 5163 vaba(cond, dt, rd, rn, rm); 5164 } 5165 void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5166 Vaba(al, dt, rd, rn, rm); 5167 } 5168 5169 void Vabal( 5170 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5171 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5172 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5173 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5174 VIXL_ASSERT(allow_macro_instructions_); 5175 VIXL_ASSERT(OutsideITBlock()); 5176 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5177 ITScope it_scope(this, &cond); 5178 vabal(cond, dt, rd, rn, rm); 5179 } 5180 void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5181 Vabal(al, dt, rd, rn, rm); 5182 } 5183 5184 void Vabd( 5185 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5186 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5187 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5188 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5189 VIXL_ASSERT(allow_macro_instructions_); 5190 VIXL_ASSERT(OutsideITBlock()); 5191 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5192 ITScope it_scope(this, &cond); 5193 vabd(cond, dt, rd, rn, rm); 5194 } 5195 void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5196 Vabd(al, dt, rd, rn, rm); 5197 } 5198 5199 void Vabd( 5200 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5201 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5202 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5203 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5204 VIXL_ASSERT(allow_macro_instructions_); 5205 VIXL_ASSERT(OutsideITBlock()); 5206 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5207 ITScope it_scope(this, &cond); 5208 vabd(cond, dt, rd, rn, rm); 5209 } 5210 void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5211 Vabd(al, dt, rd, rn, rm); 5212 } 5213 5214 void Vabdl( 5215 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5216 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5217 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5218 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5219 VIXL_ASSERT(allow_macro_instructions_); 5220 VIXL_ASSERT(OutsideITBlock()); 5221 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5222 ITScope it_scope(this, &cond); 5223 vabdl(cond, dt, rd, rn, rm); 5224 } 5225 void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5226 Vabdl(al, dt, rd, rn, rm); 5227 } 5228 5229 void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) { 5230 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5231 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5232 VIXL_ASSERT(allow_macro_instructions_); 5233 VIXL_ASSERT(OutsideITBlock()); 5234 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5235 ITScope it_scope(this, &cond); 5236 vabs(cond, dt, rd, rm); 5237 } 5238 void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); } 5239 5240 void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) { 5241 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5242 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5243 VIXL_ASSERT(allow_macro_instructions_); 5244 VIXL_ASSERT(OutsideITBlock()); 5245 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5246 ITScope it_scope(this, &cond); 5247 vabs(cond, dt, rd, rm); 5248 } 5249 void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); } 5250 5251 void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) { 5252 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5253 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5254 VIXL_ASSERT(allow_macro_instructions_); 5255 VIXL_ASSERT(OutsideITBlock()); 5256 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5257 ITScope it_scope(this, &cond); 5258 vabs(cond, dt, rd, rm); 5259 } 5260 void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); } 5261 5262 void Vacge( 5263 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5264 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5265 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5266 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5267 VIXL_ASSERT(allow_macro_instructions_); 5268 VIXL_ASSERT(OutsideITBlock()); 5269 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5270 ITScope it_scope(this, &cond); 5271 vacge(cond, dt, rd, rn, rm); 5272 } 5273 void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5274 Vacge(al, dt, rd, rn, rm); 5275 } 5276 5277 void Vacge( 5278 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5279 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5280 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5281 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5282 VIXL_ASSERT(allow_macro_instructions_); 5283 VIXL_ASSERT(OutsideITBlock()); 5284 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5285 ITScope it_scope(this, &cond); 5286 vacge(cond, dt, rd, rn, rm); 5287 } 5288 void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5289 Vacge(al, dt, rd, rn, rm); 5290 } 5291 5292 void Vacgt( 5293 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5294 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5295 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5296 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5297 VIXL_ASSERT(allow_macro_instructions_); 5298 VIXL_ASSERT(OutsideITBlock()); 5299 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5300 ITScope it_scope(this, &cond); 5301 vacgt(cond, dt, rd, rn, rm); 5302 } 5303 void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5304 Vacgt(al, dt, rd, rn, rm); 5305 } 5306 5307 void Vacgt( 5308 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5309 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5310 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5311 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5312 VIXL_ASSERT(allow_macro_instructions_); 5313 VIXL_ASSERT(OutsideITBlock()); 5314 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5315 ITScope it_scope(this, &cond); 5316 vacgt(cond, dt, rd, rn, rm); 5317 } 5318 void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5319 Vacgt(al, dt, rd, rn, rm); 5320 } 5321 5322 void Vacle( 5323 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5324 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5325 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5326 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5327 VIXL_ASSERT(allow_macro_instructions_); 5328 VIXL_ASSERT(OutsideITBlock()); 5329 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5330 ITScope it_scope(this, &cond); 5331 vacle(cond, dt, rd, rn, rm); 5332 } 5333 void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5334 Vacle(al, dt, rd, rn, rm); 5335 } 5336 5337 void Vacle( 5338 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5339 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5340 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5341 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5342 VIXL_ASSERT(allow_macro_instructions_); 5343 VIXL_ASSERT(OutsideITBlock()); 5344 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5345 ITScope it_scope(this, &cond); 5346 vacle(cond, dt, rd, rn, rm); 5347 } 5348 void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5349 Vacle(al, dt, rd, rn, rm); 5350 } 5351 5352 void Vaclt( 5353 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5354 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5355 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5356 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5357 VIXL_ASSERT(allow_macro_instructions_); 5358 VIXL_ASSERT(OutsideITBlock()); 5359 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5360 ITScope it_scope(this, &cond); 5361 vaclt(cond, dt, rd, rn, rm); 5362 } 5363 void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5364 Vaclt(al, dt, rd, rn, rm); 5365 } 5366 5367 void Vaclt( 5368 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5369 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5370 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5371 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5372 VIXL_ASSERT(allow_macro_instructions_); 5373 VIXL_ASSERT(OutsideITBlock()); 5374 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5375 ITScope it_scope(this, &cond); 5376 vaclt(cond, dt, rd, rn, rm); 5377 } 5378 void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5379 Vaclt(al, dt, rd, rn, rm); 5380 } 5381 5382 void Vadd( 5383 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5384 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5385 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5386 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5387 VIXL_ASSERT(allow_macro_instructions_); 5388 VIXL_ASSERT(OutsideITBlock()); 5389 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5390 ITScope it_scope(this, &cond); 5391 vadd(cond, dt, rd, rn, rm); 5392 } 5393 void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5394 Vadd(al, dt, rd, rn, rm); 5395 } 5396 5397 void Vadd( 5398 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5399 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5400 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5401 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5402 VIXL_ASSERT(allow_macro_instructions_); 5403 VIXL_ASSERT(OutsideITBlock()); 5404 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5405 ITScope it_scope(this, &cond); 5406 vadd(cond, dt, rd, rn, rm); 5407 } 5408 void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5409 Vadd(al, dt, rd, rn, rm); 5410 } 5411 5412 void Vadd( 5413 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 5414 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5415 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5416 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5417 VIXL_ASSERT(allow_macro_instructions_); 5418 VIXL_ASSERT(OutsideITBlock()); 5419 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5420 ITScope it_scope(this, &cond); 5421 vadd(cond, dt, rd, rn, rm); 5422 } 5423 void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 5424 Vadd(al, dt, rd, rn, rm); 5425 } 5426 5427 void Vaddhn( 5428 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 5429 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5430 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5431 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5432 VIXL_ASSERT(allow_macro_instructions_); 5433 VIXL_ASSERT(OutsideITBlock()); 5434 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5435 ITScope it_scope(this, &cond); 5436 vaddhn(cond, dt, rd, rn, rm); 5437 } 5438 void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 5439 Vaddhn(al, dt, rd, rn, rm); 5440 } 5441 5442 void Vaddl( 5443 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5444 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5445 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5446 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5447 VIXL_ASSERT(allow_macro_instructions_); 5448 VIXL_ASSERT(OutsideITBlock()); 5449 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5450 ITScope it_scope(this, &cond); 5451 vaddl(cond, dt, rd, rn, rm); 5452 } 5453 void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 5454 Vaddl(al, dt, rd, rn, rm); 5455 } 5456 5457 void Vaddw( 5458 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) { 5459 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5460 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5461 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5462 VIXL_ASSERT(allow_macro_instructions_); 5463 VIXL_ASSERT(OutsideITBlock()); 5464 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5465 ITScope it_scope(this, &cond); 5466 vaddw(cond, dt, rd, rn, rm); 5467 } 5468 void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) { 5469 Vaddw(al, dt, rd, rn, rm); 5470 } 5471 5472 void Vand(Condition cond, 5473 DataType dt, 5474 DRegister rd, 5475 DRegister rn, 5476 const DOperand& operand) { 5477 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5478 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5479 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5480 VIXL_ASSERT(allow_macro_instructions_); 5481 VIXL_ASSERT(OutsideITBlock()); 5482 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5483 ITScope it_scope(this, &cond); 5484 vand(cond, dt, rd, rn, operand); 5485 } 5486 void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 5487 Vand(al, dt, rd, rn, operand); 5488 } 5489 5490 void Vand(Condition cond, 5491 DataType dt, 5492 QRegister rd, 5493 QRegister rn, 5494 const QOperand& operand) { 5495 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5496 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5497 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5498 VIXL_ASSERT(allow_macro_instructions_); 5499 VIXL_ASSERT(OutsideITBlock()); 5500 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5501 ITScope it_scope(this, &cond); 5502 vand(cond, dt, rd, rn, operand); 5503 } 5504 void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 5505 Vand(al, dt, rd, rn, operand); 5506 } 5507 5508 void Vbic(Condition cond, 5509 DataType dt, 5510 DRegister rd, 5511 DRegister rn, 5512 const DOperand& operand) { 5513 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5514 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5515 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5516 VIXL_ASSERT(allow_macro_instructions_); 5517 VIXL_ASSERT(OutsideITBlock()); 5518 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5519 ITScope it_scope(this, &cond); 5520 vbic(cond, dt, rd, rn, operand); 5521 } 5522 void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 5523 Vbic(al, dt, rd, rn, operand); 5524 } 5525 5526 void Vbic(Condition cond, 5527 DataType dt, 5528 QRegister rd, 5529 QRegister rn, 5530 const QOperand& operand) { 5531 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5532 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5533 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5534 VIXL_ASSERT(allow_macro_instructions_); 5535 VIXL_ASSERT(OutsideITBlock()); 5536 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5537 ITScope it_scope(this, &cond); 5538 vbic(cond, dt, rd, rn, operand); 5539 } 5540 void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 5541 Vbic(al, dt, rd, rn, operand); 5542 } 5543 5544 void Vbif( 5545 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5546 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5547 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5548 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5549 VIXL_ASSERT(allow_macro_instructions_); 5550 VIXL_ASSERT(OutsideITBlock()); 5551 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5552 ITScope it_scope(this, &cond); 5553 vbif(cond, dt, rd, rn, rm); 5554 } 5555 void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5556 Vbif(al, dt, rd, rn, rm); 5557 } 5558 void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 5559 Vbif(cond, kDataTypeValueNone, rd, rn, rm); 5560 } 5561 void Vbif(DRegister rd, DRegister rn, DRegister rm) { 5562 Vbif(al, kDataTypeValueNone, rd, rn, rm); 5563 } 5564 5565 void Vbif( 5566 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5567 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5568 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5569 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5570 VIXL_ASSERT(allow_macro_instructions_); 5571 VIXL_ASSERT(OutsideITBlock()); 5572 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5573 ITScope it_scope(this, &cond); 5574 vbif(cond, dt, rd, rn, rm); 5575 } 5576 void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5577 Vbif(al, dt, rd, rn, rm); 5578 } 5579 void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 5580 Vbif(cond, kDataTypeValueNone, rd, rn, rm); 5581 } 5582 void Vbif(QRegister rd, QRegister rn, QRegister rm) { 5583 Vbif(al, kDataTypeValueNone, rd, rn, rm); 5584 } 5585 5586 void Vbit( 5587 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5588 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5589 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5590 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5591 VIXL_ASSERT(allow_macro_instructions_); 5592 VIXL_ASSERT(OutsideITBlock()); 5593 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5594 ITScope it_scope(this, &cond); 5595 vbit(cond, dt, rd, rn, rm); 5596 } 5597 void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5598 Vbit(al, dt, rd, rn, rm); 5599 } 5600 void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 5601 Vbit(cond, kDataTypeValueNone, rd, rn, rm); 5602 } 5603 void Vbit(DRegister rd, DRegister rn, DRegister rm) { 5604 Vbit(al, kDataTypeValueNone, rd, rn, rm); 5605 } 5606 5607 void Vbit( 5608 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5609 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5610 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5611 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5612 VIXL_ASSERT(allow_macro_instructions_); 5613 VIXL_ASSERT(OutsideITBlock()); 5614 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5615 ITScope it_scope(this, &cond); 5616 vbit(cond, dt, rd, rn, rm); 5617 } 5618 void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5619 Vbit(al, dt, rd, rn, rm); 5620 } 5621 void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 5622 Vbit(cond, kDataTypeValueNone, rd, rn, rm); 5623 } 5624 void Vbit(QRegister rd, QRegister rn, QRegister rm) { 5625 Vbit(al, kDataTypeValueNone, rd, rn, rm); 5626 } 5627 5628 void Vbsl( 5629 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5630 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5631 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5632 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5633 VIXL_ASSERT(allow_macro_instructions_); 5634 VIXL_ASSERT(OutsideITBlock()); 5635 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5636 ITScope it_scope(this, &cond); 5637 vbsl(cond, dt, rd, rn, rm); 5638 } 5639 void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5640 Vbsl(al, dt, rd, rn, rm); 5641 } 5642 void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 5643 Vbsl(cond, kDataTypeValueNone, rd, rn, rm); 5644 } 5645 void Vbsl(DRegister rd, DRegister rn, DRegister rm) { 5646 Vbsl(al, kDataTypeValueNone, rd, rn, rm); 5647 } 5648 5649 void Vbsl( 5650 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5651 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5652 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5653 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5654 VIXL_ASSERT(allow_macro_instructions_); 5655 VIXL_ASSERT(OutsideITBlock()); 5656 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5657 ITScope it_scope(this, &cond); 5658 vbsl(cond, dt, rd, rn, rm); 5659 } 5660 void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5661 Vbsl(al, dt, rd, rn, rm); 5662 } 5663 void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 5664 Vbsl(cond, kDataTypeValueNone, rd, rn, rm); 5665 } 5666 void Vbsl(QRegister rd, QRegister rn, QRegister rm) { 5667 Vbsl(al, kDataTypeValueNone, rd, rn, rm); 5668 } 5669 5670 void Vceq(Condition cond, 5671 DataType dt, 5672 DRegister rd, 5673 DRegister rm, 5674 const DOperand& operand) { 5675 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5676 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5677 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5678 VIXL_ASSERT(allow_macro_instructions_); 5679 VIXL_ASSERT(OutsideITBlock()); 5680 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5681 ITScope it_scope(this, &cond); 5682 vceq(cond, dt, rd, rm, operand); 5683 } 5684 void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 5685 Vceq(al, dt, rd, rm, operand); 5686 } 5687 5688 void Vceq(Condition cond, 5689 DataType dt, 5690 QRegister rd, 5691 QRegister rm, 5692 const QOperand& operand) { 5693 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5694 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5695 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5696 VIXL_ASSERT(allow_macro_instructions_); 5697 VIXL_ASSERT(OutsideITBlock()); 5698 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5699 ITScope it_scope(this, &cond); 5700 vceq(cond, dt, rd, rm, operand); 5701 } 5702 void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 5703 Vceq(al, dt, rd, rm, operand); 5704 } 5705 5706 void Vceq( 5707 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5708 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5709 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5710 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5711 VIXL_ASSERT(allow_macro_instructions_); 5712 VIXL_ASSERT(OutsideITBlock()); 5713 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5714 ITScope it_scope(this, &cond); 5715 vceq(cond, dt, rd, rn, rm); 5716 } 5717 void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5718 Vceq(al, dt, rd, rn, rm); 5719 } 5720 5721 void Vceq( 5722 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5723 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5724 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5725 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5726 VIXL_ASSERT(allow_macro_instructions_); 5727 VIXL_ASSERT(OutsideITBlock()); 5728 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5729 ITScope it_scope(this, &cond); 5730 vceq(cond, dt, rd, rn, rm); 5731 } 5732 void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5733 Vceq(al, dt, rd, rn, rm); 5734 } 5735 5736 void Vcge(Condition cond, 5737 DataType dt, 5738 DRegister rd, 5739 DRegister rm, 5740 const DOperand& operand) { 5741 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5742 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5743 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5744 VIXL_ASSERT(allow_macro_instructions_); 5745 VIXL_ASSERT(OutsideITBlock()); 5746 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5747 ITScope it_scope(this, &cond); 5748 vcge(cond, dt, rd, rm, operand); 5749 } 5750 void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 5751 Vcge(al, dt, rd, rm, operand); 5752 } 5753 5754 void Vcge(Condition cond, 5755 DataType dt, 5756 QRegister rd, 5757 QRegister rm, 5758 const QOperand& operand) { 5759 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5760 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5761 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5762 VIXL_ASSERT(allow_macro_instructions_); 5763 VIXL_ASSERT(OutsideITBlock()); 5764 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5765 ITScope it_scope(this, &cond); 5766 vcge(cond, dt, rd, rm, operand); 5767 } 5768 void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 5769 Vcge(al, dt, rd, rm, operand); 5770 } 5771 5772 void Vcge( 5773 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5774 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5775 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5776 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5777 VIXL_ASSERT(allow_macro_instructions_); 5778 VIXL_ASSERT(OutsideITBlock()); 5779 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5780 ITScope it_scope(this, &cond); 5781 vcge(cond, dt, rd, rn, rm); 5782 } 5783 void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5784 Vcge(al, dt, rd, rn, rm); 5785 } 5786 5787 void Vcge( 5788 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5789 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5790 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5791 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5792 VIXL_ASSERT(allow_macro_instructions_); 5793 VIXL_ASSERT(OutsideITBlock()); 5794 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5795 ITScope it_scope(this, &cond); 5796 vcge(cond, dt, rd, rn, rm); 5797 } 5798 void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5799 Vcge(al, dt, rd, rn, rm); 5800 } 5801 5802 void Vcgt(Condition cond, 5803 DataType dt, 5804 DRegister rd, 5805 DRegister rm, 5806 const DOperand& operand) { 5807 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5808 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5809 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5810 VIXL_ASSERT(allow_macro_instructions_); 5811 VIXL_ASSERT(OutsideITBlock()); 5812 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5813 ITScope it_scope(this, &cond); 5814 vcgt(cond, dt, rd, rm, operand); 5815 } 5816 void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 5817 Vcgt(al, dt, rd, rm, operand); 5818 } 5819 5820 void Vcgt(Condition cond, 5821 DataType dt, 5822 QRegister rd, 5823 QRegister rm, 5824 const QOperand& operand) { 5825 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5826 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5827 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5828 VIXL_ASSERT(allow_macro_instructions_); 5829 VIXL_ASSERT(OutsideITBlock()); 5830 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5831 ITScope it_scope(this, &cond); 5832 vcgt(cond, dt, rd, rm, operand); 5833 } 5834 void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 5835 Vcgt(al, dt, rd, rm, operand); 5836 } 5837 5838 void Vcgt( 5839 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5840 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5841 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5842 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5843 VIXL_ASSERT(allow_macro_instructions_); 5844 VIXL_ASSERT(OutsideITBlock()); 5845 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5846 ITScope it_scope(this, &cond); 5847 vcgt(cond, dt, rd, rn, rm); 5848 } 5849 void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5850 Vcgt(al, dt, rd, rn, rm); 5851 } 5852 5853 void Vcgt( 5854 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5856 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5857 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5858 VIXL_ASSERT(allow_macro_instructions_); 5859 VIXL_ASSERT(OutsideITBlock()); 5860 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5861 ITScope it_scope(this, &cond); 5862 vcgt(cond, dt, rd, rn, rm); 5863 } 5864 void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5865 Vcgt(al, dt, rd, rn, rm); 5866 } 5867 5868 void Vcle(Condition cond, 5869 DataType dt, 5870 DRegister rd, 5871 DRegister rm, 5872 const DOperand& operand) { 5873 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5874 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5875 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5876 VIXL_ASSERT(allow_macro_instructions_); 5877 VIXL_ASSERT(OutsideITBlock()); 5878 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5879 ITScope it_scope(this, &cond); 5880 vcle(cond, dt, rd, rm, operand); 5881 } 5882 void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 5883 Vcle(al, dt, rd, rm, operand); 5884 } 5885 5886 void Vcle(Condition cond, 5887 DataType dt, 5888 QRegister rd, 5889 QRegister rm, 5890 const QOperand& operand) { 5891 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5892 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5893 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5894 VIXL_ASSERT(allow_macro_instructions_); 5895 VIXL_ASSERT(OutsideITBlock()); 5896 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5897 ITScope it_scope(this, &cond); 5898 vcle(cond, dt, rd, rm, operand); 5899 } 5900 void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 5901 Vcle(al, dt, rd, rm, operand); 5902 } 5903 5904 void Vcle( 5905 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5906 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5907 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5908 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5909 VIXL_ASSERT(allow_macro_instructions_); 5910 VIXL_ASSERT(OutsideITBlock()); 5911 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5912 ITScope it_scope(this, &cond); 5913 vcle(cond, dt, rd, rn, rm); 5914 } 5915 void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5916 Vcle(al, dt, rd, rn, rm); 5917 } 5918 5919 void Vcle( 5920 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5921 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5922 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5923 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5924 VIXL_ASSERT(allow_macro_instructions_); 5925 VIXL_ASSERT(OutsideITBlock()); 5926 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5927 ITScope it_scope(this, &cond); 5928 vcle(cond, dt, rd, rn, rm); 5929 } 5930 void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 5931 Vcle(al, dt, rd, rn, rm); 5932 } 5933 5934 void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) { 5935 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5936 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5937 VIXL_ASSERT(allow_macro_instructions_); 5938 VIXL_ASSERT(OutsideITBlock()); 5939 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5940 ITScope it_scope(this, &cond); 5941 vcls(cond, dt, rd, rm); 5942 } 5943 void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); } 5944 5945 void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) { 5946 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5947 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5948 VIXL_ASSERT(allow_macro_instructions_); 5949 VIXL_ASSERT(OutsideITBlock()); 5950 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5951 ITScope it_scope(this, &cond); 5952 vcls(cond, dt, rd, rm); 5953 } 5954 void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); } 5955 5956 void Vclt(Condition cond, 5957 DataType dt, 5958 DRegister rd, 5959 DRegister rm, 5960 const DOperand& operand) { 5961 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5962 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5963 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5964 VIXL_ASSERT(allow_macro_instructions_); 5965 VIXL_ASSERT(OutsideITBlock()); 5966 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5967 ITScope it_scope(this, &cond); 5968 vclt(cond, dt, rd, rm, operand); 5969 } 5970 void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 5971 Vclt(al, dt, rd, rm, operand); 5972 } 5973 5974 void Vclt(Condition cond, 5975 DataType dt, 5976 QRegister rd, 5977 QRegister rm, 5978 const QOperand& operand) { 5979 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5980 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5981 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 5982 VIXL_ASSERT(allow_macro_instructions_); 5983 VIXL_ASSERT(OutsideITBlock()); 5984 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 5985 ITScope it_scope(this, &cond); 5986 vclt(cond, dt, rd, rm, operand); 5987 } 5988 void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 5989 Vclt(al, dt, rd, rm, operand); 5990 } 5991 5992 void Vclt( 5993 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 5994 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 5995 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 5996 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 5997 VIXL_ASSERT(allow_macro_instructions_); 5998 VIXL_ASSERT(OutsideITBlock()); 5999 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6000 ITScope it_scope(this, &cond); 6001 vclt(cond, dt, rd, rn, rm); 6002 } 6003 void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6004 Vclt(al, dt, rd, rn, rm); 6005 } 6006 6007 void Vclt( 6008 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6009 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6010 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6011 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6012 VIXL_ASSERT(allow_macro_instructions_); 6013 VIXL_ASSERT(OutsideITBlock()); 6014 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6015 ITScope it_scope(this, &cond); 6016 vclt(cond, dt, rd, rn, rm); 6017 } 6018 void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6019 Vclt(al, dt, rd, rn, rm); 6020 } 6021 6022 void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6023 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6024 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6025 VIXL_ASSERT(allow_macro_instructions_); 6026 VIXL_ASSERT(OutsideITBlock()); 6027 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6028 ITScope it_scope(this, &cond); 6029 vclz(cond, dt, rd, rm); 6030 } 6031 void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); } 6032 6033 void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) { 6034 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6035 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6036 VIXL_ASSERT(allow_macro_instructions_); 6037 VIXL_ASSERT(OutsideITBlock()); 6038 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6039 ITScope it_scope(this, &cond); 6040 vclz(cond, dt, rd, rm); 6041 } 6042 void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); } 6043 6044 void Vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm) { 6045 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6046 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6047 VIXL_ASSERT(allow_macro_instructions_); 6048 VIXL_ASSERT(OutsideITBlock()); 6049 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6050 ITScope it_scope(this, &cond); 6051 vcmp(cond, dt, rd, rm); 6052 } 6053 void Vcmp(DataType dt, SRegister rd, SRegister rm) { Vcmp(al, dt, rd, rm); } 6054 6055 void Vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6056 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6057 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6058 VIXL_ASSERT(allow_macro_instructions_); 6059 VIXL_ASSERT(OutsideITBlock()); 6060 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6061 ITScope it_scope(this, &cond); 6062 vcmp(cond, dt, rd, rm); 6063 } 6064 void Vcmp(DataType dt, DRegister rd, DRegister rm) { Vcmp(al, dt, rd, rm); } 6065 6066 void Vcmp(Condition cond, DataType dt, SRegister rd, double imm) { 6067 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6068 VIXL_ASSERT(allow_macro_instructions_); 6069 VIXL_ASSERT(OutsideITBlock()); 6070 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6071 ITScope it_scope(this, &cond); 6072 vcmp(cond, dt, rd, imm); 6073 } 6074 void Vcmp(DataType dt, SRegister rd, double imm) { Vcmp(al, dt, rd, imm); } 6075 6076 void Vcmp(Condition cond, DataType dt, DRegister rd, double imm) { 6077 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6078 VIXL_ASSERT(allow_macro_instructions_); 6079 VIXL_ASSERT(OutsideITBlock()); 6080 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6081 ITScope it_scope(this, &cond); 6082 vcmp(cond, dt, rd, imm); 6083 } 6084 void Vcmp(DataType dt, DRegister rd, double imm) { Vcmp(al, dt, rd, imm); } 6085 6086 void Vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm) { 6087 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6088 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6089 VIXL_ASSERT(allow_macro_instructions_); 6090 VIXL_ASSERT(OutsideITBlock()); 6091 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6092 ITScope it_scope(this, &cond); 6093 vcmpe(cond, dt, rd, rm); 6094 } 6095 void Vcmpe(DataType dt, SRegister rd, SRegister rm) { Vcmpe(al, dt, rd, rm); } 6096 6097 void Vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6098 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6099 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6100 VIXL_ASSERT(allow_macro_instructions_); 6101 VIXL_ASSERT(OutsideITBlock()); 6102 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6103 ITScope it_scope(this, &cond); 6104 vcmpe(cond, dt, rd, rm); 6105 } 6106 void Vcmpe(DataType dt, DRegister rd, DRegister rm) { Vcmpe(al, dt, rd, rm); } 6107 6108 void Vcmpe(Condition cond, DataType dt, SRegister rd, double imm) { 6109 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6110 VIXL_ASSERT(allow_macro_instructions_); 6111 VIXL_ASSERT(OutsideITBlock()); 6112 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6113 ITScope it_scope(this, &cond); 6114 vcmpe(cond, dt, rd, imm); 6115 } 6116 void Vcmpe(DataType dt, SRegister rd, double imm) { Vcmpe(al, dt, rd, imm); } 6117 6118 void Vcmpe(Condition cond, DataType dt, DRegister rd, double imm) { 6119 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6120 VIXL_ASSERT(allow_macro_instructions_); 6121 VIXL_ASSERT(OutsideITBlock()); 6122 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6123 ITScope it_scope(this, &cond); 6124 vcmpe(cond, dt, rd, imm); 6125 } 6126 void Vcmpe(DataType dt, DRegister rd, double imm) { Vcmpe(al, dt, rd, imm); } 6127 6128 void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) { 6129 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6130 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6131 VIXL_ASSERT(allow_macro_instructions_); 6132 VIXL_ASSERT(OutsideITBlock()); 6133 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6134 ITScope it_scope(this, &cond); 6135 vcnt(cond, dt, rd, rm); 6136 } 6137 void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); } 6138 6139 void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) { 6140 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6141 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6142 VIXL_ASSERT(allow_macro_instructions_); 6143 VIXL_ASSERT(OutsideITBlock()); 6144 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6145 ITScope it_scope(this, &cond); 6146 vcnt(cond, dt, rd, rm); 6147 } 6148 void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); } 6149 6150 void Vcvt( 6151 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6152 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6153 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6154 VIXL_ASSERT(allow_macro_instructions_); 6155 VIXL_ASSERT(OutsideITBlock()); 6156 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6157 ITScope it_scope(this, &cond); 6158 vcvt(cond, dt1, dt2, rd, rm); 6159 } 6160 void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6161 Vcvt(al, dt1, dt2, rd, rm); 6162 } 6163 6164 void Vcvt( 6165 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6166 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6167 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6168 VIXL_ASSERT(allow_macro_instructions_); 6169 VIXL_ASSERT(OutsideITBlock()); 6170 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6171 ITScope it_scope(this, &cond); 6172 vcvt(cond, dt1, dt2, rd, rm); 6173 } 6174 void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6175 Vcvt(al, dt1, dt2, rd, rm); 6176 } 6177 6178 void Vcvt(Condition cond, 6179 DataType dt1, 6180 DataType dt2, 6181 DRegister rd, 6182 DRegister rm, 6183 int32_t fbits) { 6184 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6185 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6186 VIXL_ASSERT(allow_macro_instructions_); 6187 VIXL_ASSERT(OutsideITBlock()); 6188 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6189 ITScope it_scope(this, &cond); 6190 vcvt(cond, dt1, dt2, rd, rm, fbits); 6191 } 6192 void Vcvt( 6193 DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) { 6194 Vcvt(al, dt1, dt2, rd, rm, fbits); 6195 } 6196 6197 void Vcvt(Condition cond, 6198 DataType dt1, 6199 DataType dt2, 6200 QRegister rd, 6201 QRegister rm, 6202 int32_t fbits) { 6203 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6204 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6205 VIXL_ASSERT(allow_macro_instructions_); 6206 VIXL_ASSERT(OutsideITBlock()); 6207 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6208 ITScope it_scope(this, &cond); 6209 vcvt(cond, dt1, dt2, rd, rm, fbits); 6210 } 6211 void Vcvt( 6212 DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) { 6213 Vcvt(al, dt1, dt2, rd, rm, fbits); 6214 } 6215 6216 void Vcvt(Condition cond, 6217 DataType dt1, 6218 DataType dt2, 6219 SRegister rd, 6220 SRegister rm, 6221 int32_t fbits) { 6222 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6223 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6224 VIXL_ASSERT(allow_macro_instructions_); 6225 VIXL_ASSERT(OutsideITBlock()); 6226 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6227 ITScope it_scope(this, &cond); 6228 vcvt(cond, dt1, dt2, rd, rm, fbits); 6229 } 6230 void Vcvt( 6231 DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) { 6232 Vcvt(al, dt1, dt2, rd, rm, fbits); 6233 } 6234 6235 void Vcvt( 6236 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6237 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6238 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6239 VIXL_ASSERT(allow_macro_instructions_); 6240 VIXL_ASSERT(OutsideITBlock()); 6241 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6242 ITScope it_scope(this, &cond); 6243 vcvt(cond, dt1, dt2, rd, rm); 6244 } 6245 void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6246 Vcvt(al, dt1, dt2, rd, rm); 6247 } 6248 6249 void Vcvt( 6250 Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6251 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6252 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6253 VIXL_ASSERT(allow_macro_instructions_); 6254 VIXL_ASSERT(OutsideITBlock()); 6255 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6256 ITScope it_scope(this, &cond); 6257 vcvt(cond, dt1, dt2, rd, rm); 6258 } 6259 void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6260 Vcvt(al, dt1, dt2, rd, rm); 6261 } 6262 6263 void Vcvt( 6264 Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) { 6265 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6266 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6267 VIXL_ASSERT(allow_macro_instructions_); 6268 VIXL_ASSERT(OutsideITBlock()); 6269 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6270 ITScope it_scope(this, &cond); 6271 vcvt(cond, dt1, dt2, rd, rm); 6272 } 6273 void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) { 6274 Vcvt(al, dt1, dt2, rd, rm); 6275 } 6276 6277 void Vcvt( 6278 Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) { 6279 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6280 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6281 VIXL_ASSERT(allow_macro_instructions_); 6282 VIXL_ASSERT(OutsideITBlock()); 6283 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6284 ITScope it_scope(this, &cond); 6285 vcvt(cond, dt1, dt2, rd, rm); 6286 } 6287 void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) { 6288 Vcvt(al, dt1, dt2, rd, rm); 6289 } 6290 6291 void Vcvt( 6292 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6293 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6294 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6295 VIXL_ASSERT(allow_macro_instructions_); 6296 VIXL_ASSERT(OutsideITBlock()); 6297 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6298 ITScope it_scope(this, &cond); 6299 vcvt(cond, dt1, dt2, rd, rm); 6300 } 6301 void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6302 Vcvt(al, dt1, dt2, rd, rm); 6303 } 6304 6305 void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6306 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6307 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6308 VIXL_ASSERT(allow_macro_instructions_); 6309 VIXL_ASSERT(OutsideITBlock()); 6310 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6311 vcvta(dt1, dt2, rd, rm); 6312 } 6313 6314 void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6315 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6316 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6317 VIXL_ASSERT(allow_macro_instructions_); 6318 VIXL_ASSERT(OutsideITBlock()); 6319 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6320 vcvta(dt1, dt2, rd, rm); 6321 } 6322 6323 void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6324 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6325 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6326 VIXL_ASSERT(allow_macro_instructions_); 6327 VIXL_ASSERT(OutsideITBlock()); 6328 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6329 vcvta(dt1, dt2, rd, rm); 6330 } 6331 6332 void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6333 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6334 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6335 VIXL_ASSERT(allow_macro_instructions_); 6336 VIXL_ASSERT(OutsideITBlock()); 6337 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6338 vcvta(dt1, dt2, rd, rm); 6339 } 6340 6341 void Vcvtb( 6342 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6343 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6344 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6345 VIXL_ASSERT(allow_macro_instructions_); 6346 VIXL_ASSERT(OutsideITBlock()); 6347 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6348 ITScope it_scope(this, &cond); 6349 vcvtb(cond, dt1, dt2, rd, rm); 6350 } 6351 void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6352 Vcvtb(al, dt1, dt2, rd, rm); 6353 } 6354 6355 void Vcvtb( 6356 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6357 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6358 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6359 VIXL_ASSERT(allow_macro_instructions_); 6360 VIXL_ASSERT(OutsideITBlock()); 6361 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6362 ITScope it_scope(this, &cond); 6363 vcvtb(cond, dt1, dt2, rd, rm); 6364 } 6365 void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6366 Vcvtb(al, dt1, dt2, rd, rm); 6367 } 6368 6369 void Vcvtb( 6370 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6371 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6372 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6373 VIXL_ASSERT(allow_macro_instructions_); 6374 VIXL_ASSERT(OutsideITBlock()); 6375 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6376 ITScope it_scope(this, &cond); 6377 vcvtb(cond, dt1, dt2, rd, rm); 6378 } 6379 void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6380 Vcvtb(al, dt1, dt2, rd, rm); 6381 } 6382 6383 void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6384 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6385 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6386 VIXL_ASSERT(allow_macro_instructions_); 6387 VIXL_ASSERT(OutsideITBlock()); 6388 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6389 vcvtm(dt1, dt2, rd, rm); 6390 } 6391 6392 void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6393 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6394 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6395 VIXL_ASSERT(allow_macro_instructions_); 6396 VIXL_ASSERT(OutsideITBlock()); 6397 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6398 vcvtm(dt1, dt2, rd, rm); 6399 } 6400 6401 void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6402 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6403 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6404 VIXL_ASSERT(allow_macro_instructions_); 6405 VIXL_ASSERT(OutsideITBlock()); 6406 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6407 vcvtm(dt1, dt2, rd, rm); 6408 } 6409 6410 void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6411 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6412 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6413 VIXL_ASSERT(allow_macro_instructions_); 6414 VIXL_ASSERT(OutsideITBlock()); 6415 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6416 vcvtm(dt1, dt2, rd, rm); 6417 } 6418 6419 void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6420 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6421 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6422 VIXL_ASSERT(allow_macro_instructions_); 6423 VIXL_ASSERT(OutsideITBlock()); 6424 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6425 vcvtn(dt1, dt2, rd, rm); 6426 } 6427 6428 void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6429 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6430 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6431 VIXL_ASSERT(allow_macro_instructions_); 6432 VIXL_ASSERT(OutsideITBlock()); 6433 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6434 vcvtn(dt1, dt2, rd, rm); 6435 } 6436 6437 void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6438 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6439 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6440 VIXL_ASSERT(allow_macro_instructions_); 6441 VIXL_ASSERT(OutsideITBlock()); 6442 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6443 vcvtn(dt1, dt2, rd, rm); 6444 } 6445 6446 void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6447 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6448 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6449 VIXL_ASSERT(allow_macro_instructions_); 6450 VIXL_ASSERT(OutsideITBlock()); 6451 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6452 vcvtn(dt1, dt2, rd, rm); 6453 } 6454 6455 void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 6456 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6457 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6458 VIXL_ASSERT(allow_macro_instructions_); 6459 VIXL_ASSERT(OutsideITBlock()); 6460 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6461 vcvtp(dt1, dt2, rd, rm); 6462 } 6463 6464 void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 6465 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6466 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6467 VIXL_ASSERT(allow_macro_instructions_); 6468 VIXL_ASSERT(OutsideITBlock()); 6469 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6470 vcvtp(dt1, dt2, rd, rm); 6471 } 6472 6473 void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6474 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6475 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6476 VIXL_ASSERT(allow_macro_instructions_); 6477 VIXL_ASSERT(OutsideITBlock()); 6478 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6479 vcvtp(dt1, dt2, rd, rm); 6480 } 6481 6482 void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6483 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6484 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6485 VIXL_ASSERT(allow_macro_instructions_); 6486 VIXL_ASSERT(OutsideITBlock()); 6487 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6488 vcvtp(dt1, dt2, rd, rm); 6489 } 6490 6491 void Vcvtr( 6492 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6493 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6494 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6495 VIXL_ASSERT(allow_macro_instructions_); 6496 VIXL_ASSERT(OutsideITBlock()); 6497 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6498 ITScope it_scope(this, &cond); 6499 vcvtr(cond, dt1, dt2, rd, rm); 6500 } 6501 void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6502 Vcvtr(al, dt1, dt2, rd, rm); 6503 } 6504 6505 void Vcvtr( 6506 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6507 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6508 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6509 VIXL_ASSERT(allow_macro_instructions_); 6510 VIXL_ASSERT(OutsideITBlock()); 6511 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6512 ITScope it_scope(this, &cond); 6513 vcvtr(cond, dt1, dt2, rd, rm); 6514 } 6515 void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6516 Vcvtr(al, dt1, dt2, rd, rm); 6517 } 6518 6519 void Vcvtt( 6520 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6521 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6522 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6523 VIXL_ASSERT(allow_macro_instructions_); 6524 VIXL_ASSERT(OutsideITBlock()); 6525 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6526 ITScope it_scope(this, &cond); 6527 vcvtt(cond, dt1, dt2, rd, rm); 6528 } 6529 void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 6530 Vcvtt(al, dt1, dt2, rd, rm); 6531 } 6532 6533 void Vcvtt( 6534 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6535 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6536 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6537 VIXL_ASSERT(allow_macro_instructions_); 6538 VIXL_ASSERT(OutsideITBlock()); 6539 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6540 ITScope it_scope(this, &cond); 6541 vcvtt(cond, dt1, dt2, rd, rm); 6542 } 6543 void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { 6544 Vcvtt(al, dt1, dt2, rd, rm); 6545 } 6546 6547 void Vcvtt( 6548 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6549 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6550 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6551 VIXL_ASSERT(allow_macro_instructions_); 6552 VIXL_ASSERT(OutsideITBlock()); 6553 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6554 ITScope it_scope(this, &cond); 6555 vcvtt(cond, dt1, dt2, rd, rm); 6556 } 6557 void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { 6558 Vcvtt(al, dt1, dt2, rd, rm); 6559 } 6560 6561 void Vdiv( 6562 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6563 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6564 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6565 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6566 VIXL_ASSERT(allow_macro_instructions_); 6567 VIXL_ASSERT(OutsideITBlock()); 6568 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6569 ITScope it_scope(this, &cond); 6570 vdiv(cond, dt, rd, rn, rm); 6571 } 6572 void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6573 Vdiv(al, dt, rd, rn, rm); 6574 } 6575 6576 void Vdiv( 6577 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6578 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6579 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6580 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6581 VIXL_ASSERT(allow_macro_instructions_); 6582 VIXL_ASSERT(OutsideITBlock()); 6583 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6584 ITScope it_scope(this, &cond); 6585 vdiv(cond, dt, rd, rn, rm); 6586 } 6587 void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6588 Vdiv(al, dt, rd, rn, rm); 6589 } 6590 6591 void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) { 6592 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6593 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 6594 VIXL_ASSERT(allow_macro_instructions_); 6595 VIXL_ASSERT(OutsideITBlock()); 6596 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6597 ITScope it_scope(this, &cond); 6598 vdup(cond, dt, rd, rt); 6599 } 6600 void Vdup(DataType dt, QRegister rd, Register rt) { Vdup(al, dt, rd, rt); } 6601 6602 void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) { 6603 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6604 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 6605 VIXL_ASSERT(allow_macro_instructions_); 6606 VIXL_ASSERT(OutsideITBlock()); 6607 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6608 ITScope it_scope(this, &cond); 6609 vdup(cond, dt, rd, rt); 6610 } 6611 void Vdup(DataType dt, DRegister rd, Register rt) { Vdup(al, dt, rd, rt); } 6612 6613 void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) { 6614 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6615 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6616 VIXL_ASSERT(allow_macro_instructions_); 6617 VIXL_ASSERT(OutsideITBlock()); 6618 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6619 ITScope it_scope(this, &cond); 6620 vdup(cond, dt, rd, rm); 6621 } 6622 void Vdup(DataType dt, DRegister rd, DRegisterLane rm) { 6623 Vdup(al, dt, rd, rm); 6624 } 6625 6626 void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) { 6627 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6628 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6629 VIXL_ASSERT(allow_macro_instructions_); 6630 VIXL_ASSERT(OutsideITBlock()); 6631 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6632 ITScope it_scope(this, &cond); 6633 vdup(cond, dt, rd, rm); 6634 } 6635 void Vdup(DataType dt, QRegister rd, DRegisterLane rm) { 6636 Vdup(al, dt, rd, rm); 6637 } 6638 6639 void Veor( 6640 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6641 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6642 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6643 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6644 VIXL_ASSERT(allow_macro_instructions_); 6645 VIXL_ASSERT(OutsideITBlock()); 6646 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6647 ITScope it_scope(this, &cond); 6648 veor(cond, dt, rd, rn, rm); 6649 } 6650 void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6651 Veor(al, dt, rd, rn, rm); 6652 } 6653 void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) { 6654 Veor(cond, kDataTypeValueNone, rd, rn, rm); 6655 } 6656 void Veor(DRegister rd, DRegister rn, DRegister rm) { 6657 Veor(al, kDataTypeValueNone, rd, rn, rm); 6658 } 6659 6660 void Veor( 6661 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6662 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6663 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6665 VIXL_ASSERT(allow_macro_instructions_); 6666 VIXL_ASSERT(OutsideITBlock()); 6667 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6668 ITScope it_scope(this, &cond); 6669 veor(cond, dt, rd, rn, rm); 6670 } 6671 void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6672 Veor(al, dt, rd, rn, rm); 6673 } 6674 void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) { 6675 Veor(cond, kDataTypeValueNone, rd, rn, rm); 6676 } 6677 void Veor(QRegister rd, QRegister rn, QRegister rm) { 6678 Veor(al, kDataTypeValueNone, rd, rn, rm); 6679 } 6680 6681 void Vext(Condition cond, 6682 DataType dt, 6683 DRegister rd, 6684 DRegister rn, 6685 DRegister rm, 6686 const DOperand& operand) { 6687 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6688 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6689 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6690 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6691 VIXL_ASSERT(allow_macro_instructions_); 6692 VIXL_ASSERT(OutsideITBlock()); 6693 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6694 ITScope it_scope(this, &cond); 6695 vext(cond, dt, rd, rn, rm, operand); 6696 } 6697 void Vext(DataType dt, 6698 DRegister rd, 6699 DRegister rn, 6700 DRegister rm, 6701 const DOperand& operand) { 6702 Vext(al, dt, rd, rn, rm, operand); 6703 } 6704 6705 void Vext(Condition cond, 6706 DataType dt, 6707 QRegister rd, 6708 QRegister rn, 6709 QRegister rm, 6710 const QOperand& operand) { 6711 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6712 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6713 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6714 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6715 VIXL_ASSERT(allow_macro_instructions_); 6716 VIXL_ASSERT(OutsideITBlock()); 6717 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6718 ITScope it_scope(this, &cond); 6719 vext(cond, dt, rd, rn, rm, operand); 6720 } 6721 void Vext(DataType dt, 6722 QRegister rd, 6723 QRegister rn, 6724 QRegister rm, 6725 const QOperand& operand) { 6726 Vext(al, dt, rd, rn, rm, operand); 6727 } 6728 6729 void Vfma( 6730 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6731 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6732 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6733 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6734 VIXL_ASSERT(allow_macro_instructions_); 6735 VIXL_ASSERT(OutsideITBlock()); 6736 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6737 ITScope it_scope(this, &cond); 6738 vfma(cond, dt, rd, rn, rm); 6739 } 6740 void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6741 Vfma(al, dt, rd, rn, rm); 6742 } 6743 6744 void Vfma( 6745 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6746 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6747 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6748 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6749 VIXL_ASSERT(allow_macro_instructions_); 6750 VIXL_ASSERT(OutsideITBlock()); 6751 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6752 ITScope it_scope(this, &cond); 6753 vfma(cond, dt, rd, rn, rm); 6754 } 6755 void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6756 Vfma(al, dt, rd, rn, rm); 6757 } 6758 6759 void Vfma( 6760 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6761 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6762 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6763 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6764 VIXL_ASSERT(allow_macro_instructions_); 6765 VIXL_ASSERT(OutsideITBlock()); 6766 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6767 ITScope it_scope(this, &cond); 6768 vfma(cond, dt, rd, rn, rm); 6769 } 6770 void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6771 Vfma(al, dt, rd, rn, rm); 6772 } 6773 6774 void Vfms( 6775 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6776 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6777 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6778 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6779 VIXL_ASSERT(allow_macro_instructions_); 6780 VIXL_ASSERT(OutsideITBlock()); 6781 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6782 ITScope it_scope(this, &cond); 6783 vfms(cond, dt, rd, rn, rm); 6784 } 6785 void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6786 Vfms(al, dt, rd, rn, rm); 6787 } 6788 6789 void Vfms( 6790 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6791 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6792 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6793 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6794 VIXL_ASSERT(allow_macro_instructions_); 6795 VIXL_ASSERT(OutsideITBlock()); 6796 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6797 ITScope it_scope(this, &cond); 6798 vfms(cond, dt, rd, rn, rm); 6799 } 6800 void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6801 Vfms(al, dt, rd, rn, rm); 6802 } 6803 6804 void Vfms( 6805 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6806 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6807 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6808 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6809 VIXL_ASSERT(allow_macro_instructions_); 6810 VIXL_ASSERT(OutsideITBlock()); 6811 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6812 ITScope it_scope(this, &cond); 6813 vfms(cond, dt, rd, rn, rm); 6814 } 6815 void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6816 Vfms(al, dt, rd, rn, rm); 6817 } 6818 6819 void Vfnma( 6820 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6821 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6822 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6823 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6824 VIXL_ASSERT(allow_macro_instructions_); 6825 VIXL_ASSERT(OutsideITBlock()); 6826 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6827 ITScope it_scope(this, &cond); 6828 vfnma(cond, dt, rd, rn, rm); 6829 } 6830 void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6831 Vfnma(al, dt, rd, rn, rm); 6832 } 6833 6834 void Vfnma( 6835 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6836 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6837 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6838 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6839 VIXL_ASSERT(allow_macro_instructions_); 6840 VIXL_ASSERT(OutsideITBlock()); 6841 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6842 ITScope it_scope(this, &cond); 6843 vfnma(cond, dt, rd, rn, rm); 6844 } 6845 void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6846 Vfnma(al, dt, rd, rn, rm); 6847 } 6848 6849 void Vfnms( 6850 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6851 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6852 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6853 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6854 VIXL_ASSERT(allow_macro_instructions_); 6855 VIXL_ASSERT(OutsideITBlock()); 6856 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6857 ITScope it_scope(this, &cond); 6858 vfnms(cond, dt, rd, rn, rm); 6859 } 6860 void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 6861 Vfnms(al, dt, rd, rn, rm); 6862 } 6863 6864 void Vfnms( 6865 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6866 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6867 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6868 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6869 VIXL_ASSERT(allow_macro_instructions_); 6870 VIXL_ASSERT(OutsideITBlock()); 6871 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6872 ITScope it_scope(this, &cond); 6873 vfnms(cond, dt, rd, rn, rm); 6874 } 6875 void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6876 Vfnms(al, dt, rd, rn, rm); 6877 } 6878 6879 void Vhadd( 6880 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6881 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6882 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6883 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6884 VIXL_ASSERT(allow_macro_instructions_); 6885 VIXL_ASSERT(OutsideITBlock()); 6886 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6887 ITScope it_scope(this, &cond); 6888 vhadd(cond, dt, rd, rn, rm); 6889 } 6890 void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6891 Vhadd(al, dt, rd, rn, rm); 6892 } 6893 6894 void Vhadd( 6895 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6896 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6897 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6898 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6899 VIXL_ASSERT(allow_macro_instructions_); 6900 VIXL_ASSERT(OutsideITBlock()); 6901 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6902 ITScope it_scope(this, &cond); 6903 vhadd(cond, dt, rd, rn, rm); 6904 } 6905 void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6906 Vhadd(al, dt, rd, rn, rm); 6907 } 6908 6909 void Vhsub( 6910 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6911 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6912 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6913 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6914 VIXL_ASSERT(allow_macro_instructions_); 6915 VIXL_ASSERT(OutsideITBlock()); 6916 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6917 ITScope it_scope(this, &cond); 6918 vhsub(cond, dt, rd, rn, rm); 6919 } 6920 void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 6921 Vhsub(al, dt, rd, rn, rm); 6922 } 6923 6924 void Vhsub( 6925 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6926 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 6927 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 6928 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 6929 VIXL_ASSERT(allow_macro_instructions_); 6930 VIXL_ASSERT(OutsideITBlock()); 6931 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6932 ITScope it_scope(this, &cond); 6933 vhsub(cond, dt, rd, rn, rm); 6934 } 6935 void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 6936 Vhsub(al, dt, rd, rn, rm); 6937 } 6938 6939 void Vld1(Condition cond, 6940 DataType dt, 6941 const NeonRegisterList& nreglist, 6942 const AlignedMemOperand& operand) { 6943 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 6944 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6945 VIXL_ASSERT(allow_macro_instructions_); 6946 VIXL_ASSERT(OutsideITBlock()); 6947 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6948 ITScope it_scope(this, &cond); 6949 vld1(cond, dt, nreglist, operand); 6950 } 6951 void Vld1(DataType dt, 6952 const NeonRegisterList& nreglist, 6953 const AlignedMemOperand& operand) { 6954 Vld1(al, dt, nreglist, operand); 6955 } 6956 6957 void Vld2(Condition cond, 6958 DataType dt, 6959 const NeonRegisterList& nreglist, 6960 const AlignedMemOperand& operand) { 6961 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 6962 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6963 VIXL_ASSERT(allow_macro_instructions_); 6964 VIXL_ASSERT(OutsideITBlock()); 6965 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6966 ITScope it_scope(this, &cond); 6967 vld2(cond, dt, nreglist, operand); 6968 } 6969 void Vld2(DataType dt, 6970 const NeonRegisterList& nreglist, 6971 const AlignedMemOperand& operand) { 6972 Vld2(al, dt, nreglist, operand); 6973 } 6974 6975 void Vld3(Condition cond, 6976 DataType dt, 6977 const NeonRegisterList& nreglist, 6978 const AlignedMemOperand& operand) { 6979 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 6980 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6981 VIXL_ASSERT(allow_macro_instructions_); 6982 VIXL_ASSERT(OutsideITBlock()); 6983 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 6984 ITScope it_scope(this, &cond); 6985 vld3(cond, dt, nreglist, operand); 6986 } 6987 void Vld3(DataType dt, 6988 const NeonRegisterList& nreglist, 6989 const AlignedMemOperand& operand) { 6990 Vld3(al, dt, nreglist, operand); 6991 } 6992 6993 void Vld3(Condition cond, 6994 DataType dt, 6995 const NeonRegisterList& nreglist, 6996 const MemOperand& operand) { 6997 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 6998 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 6999 VIXL_ASSERT(allow_macro_instructions_); 7000 VIXL_ASSERT(OutsideITBlock()); 7001 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7002 ITScope it_scope(this, &cond); 7003 vld3(cond, dt, nreglist, operand); 7004 } 7005 void Vld3(DataType dt, 7006 const NeonRegisterList& nreglist, 7007 const MemOperand& operand) { 7008 Vld3(al, dt, nreglist, operand); 7009 } 7010 7011 void Vld4(Condition cond, 7012 DataType dt, 7013 const NeonRegisterList& nreglist, 7014 const AlignedMemOperand& operand) { 7015 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 7016 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7017 VIXL_ASSERT(allow_macro_instructions_); 7018 VIXL_ASSERT(OutsideITBlock()); 7019 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7020 ITScope it_scope(this, &cond); 7021 vld4(cond, dt, nreglist, operand); 7022 } 7023 void Vld4(DataType dt, 7024 const NeonRegisterList& nreglist, 7025 const AlignedMemOperand& operand) { 7026 Vld4(al, dt, nreglist, operand); 7027 } 7028 7029 void Vldm(Condition cond, 7030 DataType dt, 7031 Register rn, 7032 WriteBack write_back, 7033 DRegisterList dreglist) { 7034 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7035 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 7036 VIXL_ASSERT(allow_macro_instructions_); 7037 VIXL_ASSERT(OutsideITBlock()); 7038 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7039 ITScope it_scope(this, &cond); 7040 vldm(cond, dt, rn, write_back, dreglist); 7041 } 7042 void Vldm(DataType dt, 7043 Register rn, 7044 WriteBack write_back, 7045 DRegisterList dreglist) { 7046 Vldm(al, dt, rn, write_back, dreglist); 7047 } 7048 void Vldm(Condition cond, 7049 Register rn, 7050 WriteBack write_back, 7051 DRegisterList dreglist) { 7052 Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist); 7053 } 7054 void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) { 7055 Vldm(al, kDataTypeValueNone, rn, write_back, dreglist); 7056 } 7057 7058 void Vldm(Condition cond, 7059 DataType dt, 7060 Register rn, 7061 WriteBack write_back, 7062 SRegisterList sreglist) { 7063 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7064 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 7065 VIXL_ASSERT(allow_macro_instructions_); 7066 VIXL_ASSERT(OutsideITBlock()); 7067 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7068 ITScope it_scope(this, &cond); 7069 vldm(cond, dt, rn, write_back, sreglist); 7070 } 7071 void Vldm(DataType dt, 7072 Register rn, 7073 WriteBack write_back, 7074 SRegisterList sreglist) { 7075 Vldm(al, dt, rn, write_back, sreglist); 7076 } 7077 void Vldm(Condition cond, 7078 Register rn, 7079 WriteBack write_back, 7080 SRegisterList sreglist) { 7081 Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist); 7082 } 7083 void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) { 7084 Vldm(al, kDataTypeValueNone, rn, write_back, sreglist); 7085 } 7086 7087 void Vldmdb(Condition cond, 7088 DataType dt, 7089 Register rn, 7090 WriteBack write_back, 7091 DRegisterList dreglist) { 7092 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7093 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 7094 VIXL_ASSERT(allow_macro_instructions_); 7095 VIXL_ASSERT(OutsideITBlock()); 7096 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7097 ITScope it_scope(this, &cond); 7098 vldmdb(cond, dt, rn, write_back, dreglist); 7099 } 7100 void Vldmdb(DataType dt, 7101 Register rn, 7102 WriteBack write_back, 7103 DRegisterList dreglist) { 7104 Vldmdb(al, dt, rn, write_back, dreglist); 7105 } 7106 void Vldmdb(Condition cond, 7107 Register rn, 7108 WriteBack write_back, 7109 DRegisterList dreglist) { 7110 Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist); 7111 } 7112 void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) { 7113 Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist); 7114 } 7115 7116 void Vldmdb(Condition cond, 7117 DataType dt, 7118 Register rn, 7119 WriteBack write_back, 7120 SRegisterList sreglist) { 7121 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7122 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 7123 VIXL_ASSERT(allow_macro_instructions_); 7124 VIXL_ASSERT(OutsideITBlock()); 7125 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7126 ITScope it_scope(this, &cond); 7127 vldmdb(cond, dt, rn, write_back, sreglist); 7128 } 7129 void Vldmdb(DataType dt, 7130 Register rn, 7131 WriteBack write_back, 7132 SRegisterList sreglist) { 7133 Vldmdb(al, dt, rn, write_back, sreglist); 7134 } 7135 void Vldmdb(Condition cond, 7136 Register rn, 7137 WriteBack write_back, 7138 SRegisterList sreglist) { 7139 Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist); 7140 } 7141 void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) { 7142 Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist); 7143 } 7144 7145 void Vldmia(Condition cond, 7146 DataType dt, 7147 Register rn, 7148 WriteBack write_back, 7149 DRegisterList dreglist) { 7150 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7151 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 7152 VIXL_ASSERT(allow_macro_instructions_); 7153 VIXL_ASSERT(OutsideITBlock()); 7154 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7155 ITScope it_scope(this, &cond); 7156 vldmia(cond, dt, rn, write_back, dreglist); 7157 } 7158 void Vldmia(DataType dt, 7159 Register rn, 7160 WriteBack write_back, 7161 DRegisterList dreglist) { 7162 Vldmia(al, dt, rn, write_back, dreglist); 7163 } 7164 void Vldmia(Condition cond, 7165 Register rn, 7166 WriteBack write_back, 7167 DRegisterList dreglist) { 7168 Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist); 7169 } 7170 void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) { 7171 Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist); 7172 } 7173 7174 void Vldmia(Condition cond, 7175 DataType dt, 7176 Register rn, 7177 WriteBack write_back, 7178 SRegisterList sreglist) { 7179 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7180 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 7181 VIXL_ASSERT(allow_macro_instructions_); 7182 VIXL_ASSERT(OutsideITBlock()); 7183 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7184 ITScope it_scope(this, &cond); 7185 vldmia(cond, dt, rn, write_back, sreglist); 7186 } 7187 void Vldmia(DataType dt, 7188 Register rn, 7189 WriteBack write_back, 7190 SRegisterList sreglist) { 7191 Vldmia(al, dt, rn, write_back, sreglist); 7192 } 7193 void Vldmia(Condition cond, 7194 Register rn, 7195 WriteBack write_back, 7196 SRegisterList sreglist) { 7197 Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist); 7198 } 7199 void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) { 7200 Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist); 7201 } 7202 7203 void Vldr(Condition cond, DataType dt, DRegister rd, Label* label) { 7204 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7205 VIXL_ASSERT(allow_macro_instructions_); 7206 VIXL_ASSERT(OutsideITBlock()); 7207 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7208 ITScope it_scope(this, &cond); 7209 vldr(cond, dt, rd, label); 7210 } 7211 void Vldr(DataType dt, DRegister rd, Label* label) { 7212 Vldr(al, dt, rd, label); 7213 } 7214 void Vldr(Condition cond, DRegister rd, Label* label) { 7215 Vldr(cond, Untyped64, rd, label); 7216 } 7217 void Vldr(DRegister rd, Label* label) { Vldr(al, Untyped64, rd, label); } 7218 7219 void Vldr(Condition cond, 7220 DataType dt, 7221 DRegister rd, 7222 const MemOperand& operand) { 7223 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7224 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7225 VIXL_ASSERT(allow_macro_instructions_); 7226 VIXL_ASSERT(OutsideITBlock()); 7227 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7228 ITScope it_scope(this, &cond); 7229 vldr(cond, dt, rd, operand); 7230 } 7231 void Vldr(DataType dt, DRegister rd, const MemOperand& operand) { 7232 Vldr(al, dt, rd, operand); 7233 } 7234 void Vldr(Condition cond, DRegister rd, const MemOperand& operand) { 7235 Vldr(cond, Untyped64, rd, operand); 7236 } 7237 void Vldr(DRegister rd, const MemOperand& operand) { 7238 Vldr(al, Untyped64, rd, operand); 7239 } 7240 7241 void Vldr(Condition cond, DataType dt, SRegister rd, Label* label) { 7242 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7243 VIXL_ASSERT(allow_macro_instructions_); 7244 VIXL_ASSERT(OutsideITBlock()); 7245 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7246 ITScope it_scope(this, &cond); 7247 vldr(cond, dt, rd, label); 7248 } 7249 void Vldr(DataType dt, SRegister rd, Label* label) { 7250 Vldr(al, dt, rd, label); 7251 } 7252 void Vldr(Condition cond, SRegister rd, Label* label) { 7253 Vldr(cond, Untyped32, rd, label); 7254 } 7255 void Vldr(SRegister rd, Label* label) { Vldr(al, Untyped32, rd, label); } 7256 7257 void Vldr(Condition cond, 7258 DataType dt, 7259 SRegister rd, 7260 const MemOperand& operand) { 7261 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7262 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7263 VIXL_ASSERT(allow_macro_instructions_); 7264 VIXL_ASSERT(OutsideITBlock()); 7265 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7266 ITScope it_scope(this, &cond); 7267 vldr(cond, dt, rd, operand); 7268 } 7269 void Vldr(DataType dt, SRegister rd, const MemOperand& operand) { 7270 Vldr(al, dt, rd, operand); 7271 } 7272 void Vldr(Condition cond, SRegister rd, const MemOperand& operand) { 7273 Vldr(cond, Untyped32, rd, operand); 7274 } 7275 void Vldr(SRegister rd, const MemOperand& operand) { 7276 Vldr(al, Untyped32, rd, operand); 7277 } 7278 7279 void Vmax( 7280 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7281 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7282 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7283 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7284 VIXL_ASSERT(allow_macro_instructions_); 7285 VIXL_ASSERT(OutsideITBlock()); 7286 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7287 ITScope it_scope(this, &cond); 7288 vmax(cond, dt, rd, rn, rm); 7289 } 7290 void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7291 Vmax(al, dt, rd, rn, rm); 7292 } 7293 7294 void Vmax( 7295 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7296 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7297 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7298 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7299 VIXL_ASSERT(allow_macro_instructions_); 7300 VIXL_ASSERT(OutsideITBlock()); 7301 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7302 ITScope it_scope(this, &cond); 7303 vmax(cond, dt, rd, rn, rm); 7304 } 7305 void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7306 Vmax(al, dt, rd, rn, rm); 7307 } 7308 7309 void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7310 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7311 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7312 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7313 VIXL_ASSERT(allow_macro_instructions_); 7314 VIXL_ASSERT(OutsideITBlock()); 7315 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7316 vmaxnm(dt, rd, rn, rm); 7317 } 7318 7319 void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7320 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7321 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7322 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7323 VIXL_ASSERT(allow_macro_instructions_); 7324 VIXL_ASSERT(OutsideITBlock()); 7325 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7326 vmaxnm(dt, rd, rn, rm); 7327 } 7328 7329 void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7330 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7331 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7332 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7333 VIXL_ASSERT(allow_macro_instructions_); 7334 VIXL_ASSERT(OutsideITBlock()); 7335 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7336 vmaxnm(dt, rd, rn, rm); 7337 } 7338 7339 void Vmin( 7340 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7341 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7342 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7343 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7344 VIXL_ASSERT(allow_macro_instructions_); 7345 VIXL_ASSERT(OutsideITBlock()); 7346 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7347 ITScope it_scope(this, &cond); 7348 vmin(cond, dt, rd, rn, rm); 7349 } 7350 void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7351 Vmin(al, dt, rd, rn, rm); 7352 } 7353 7354 void Vmin( 7355 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7356 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7357 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7358 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7359 VIXL_ASSERT(allow_macro_instructions_); 7360 VIXL_ASSERT(OutsideITBlock()); 7361 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7362 ITScope it_scope(this, &cond); 7363 vmin(cond, dt, rd, rn, rm); 7364 } 7365 void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7366 Vmin(al, dt, rd, rn, rm); 7367 } 7368 7369 void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7370 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7371 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7372 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7373 VIXL_ASSERT(allow_macro_instructions_); 7374 VIXL_ASSERT(OutsideITBlock()); 7375 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7376 vminnm(dt, rd, rn, rm); 7377 } 7378 7379 void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7380 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7381 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7382 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7383 VIXL_ASSERT(allow_macro_instructions_); 7384 VIXL_ASSERT(OutsideITBlock()); 7385 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7386 vminnm(dt, rd, rn, rm); 7387 } 7388 7389 void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7390 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7391 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7392 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7393 VIXL_ASSERT(allow_macro_instructions_); 7394 VIXL_ASSERT(OutsideITBlock()); 7395 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7396 vminnm(dt, rd, rn, rm); 7397 } 7398 7399 void Vmla(Condition cond, 7400 DataType dt, 7401 DRegister rd, 7402 DRegister rn, 7403 DRegisterLane rm) { 7404 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7405 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7406 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7407 VIXL_ASSERT(allow_macro_instructions_); 7408 VIXL_ASSERT(OutsideITBlock()); 7409 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7410 ITScope it_scope(this, &cond); 7411 vmla(cond, dt, rd, rn, rm); 7412 } 7413 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 7414 Vmla(al, dt, rd, rn, rm); 7415 } 7416 7417 void Vmla(Condition cond, 7418 DataType dt, 7419 QRegister rd, 7420 QRegister rn, 7421 DRegisterLane rm) { 7422 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7423 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7424 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7425 VIXL_ASSERT(allow_macro_instructions_); 7426 VIXL_ASSERT(OutsideITBlock()); 7427 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7428 ITScope it_scope(this, &cond); 7429 vmla(cond, dt, rd, rn, rm); 7430 } 7431 void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 7432 Vmla(al, dt, rd, rn, rm); 7433 } 7434 7435 void Vmla( 7436 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7437 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7438 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7439 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7440 VIXL_ASSERT(allow_macro_instructions_); 7441 VIXL_ASSERT(OutsideITBlock()); 7442 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7443 ITScope it_scope(this, &cond); 7444 vmla(cond, dt, rd, rn, rm); 7445 } 7446 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7447 Vmla(al, dt, rd, rn, rm); 7448 } 7449 7450 void Vmla( 7451 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7452 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7453 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7454 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7455 VIXL_ASSERT(allow_macro_instructions_); 7456 VIXL_ASSERT(OutsideITBlock()); 7457 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7458 ITScope it_scope(this, &cond); 7459 vmla(cond, dt, rd, rn, rm); 7460 } 7461 void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7462 Vmla(al, dt, rd, rn, rm); 7463 } 7464 7465 void Vmla( 7466 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7467 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7468 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7469 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7470 VIXL_ASSERT(allow_macro_instructions_); 7471 VIXL_ASSERT(OutsideITBlock()); 7472 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7473 ITScope it_scope(this, &cond); 7474 vmla(cond, dt, rd, rn, rm); 7475 } 7476 void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7477 Vmla(al, dt, rd, rn, rm); 7478 } 7479 7480 void Vmlal(Condition cond, 7481 DataType dt, 7482 QRegister rd, 7483 DRegister rn, 7484 DRegisterLane rm) { 7485 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7486 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7487 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7488 VIXL_ASSERT(allow_macro_instructions_); 7489 VIXL_ASSERT(OutsideITBlock()); 7490 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7491 ITScope it_scope(this, &cond); 7492 vmlal(cond, dt, rd, rn, rm); 7493 } 7494 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { 7495 Vmlal(al, dt, rd, rn, rm); 7496 } 7497 7498 void Vmlal( 7499 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7500 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7501 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7502 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7503 VIXL_ASSERT(allow_macro_instructions_); 7504 VIXL_ASSERT(OutsideITBlock()); 7505 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7506 ITScope it_scope(this, &cond); 7507 vmlal(cond, dt, rd, rn, rm); 7508 } 7509 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7510 Vmlal(al, dt, rd, rn, rm); 7511 } 7512 7513 void Vmls(Condition cond, 7514 DataType dt, 7515 DRegister rd, 7516 DRegister rn, 7517 DRegisterLane rm) { 7518 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7519 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7520 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7521 VIXL_ASSERT(allow_macro_instructions_); 7522 VIXL_ASSERT(OutsideITBlock()); 7523 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7524 ITScope it_scope(this, &cond); 7525 vmls(cond, dt, rd, rn, rm); 7526 } 7527 void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 7528 Vmls(al, dt, rd, rn, rm); 7529 } 7530 7531 void Vmls(Condition cond, 7532 DataType dt, 7533 QRegister rd, 7534 QRegister rn, 7535 DRegisterLane rm) { 7536 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7537 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7538 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7539 VIXL_ASSERT(allow_macro_instructions_); 7540 VIXL_ASSERT(OutsideITBlock()); 7541 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7542 ITScope it_scope(this, &cond); 7543 vmls(cond, dt, rd, rn, rm); 7544 } 7545 void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 7546 Vmls(al, dt, rd, rn, rm); 7547 } 7548 7549 void Vmls( 7550 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7551 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7552 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7553 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7554 VIXL_ASSERT(allow_macro_instructions_); 7555 VIXL_ASSERT(OutsideITBlock()); 7556 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7557 ITScope it_scope(this, &cond); 7558 vmls(cond, dt, rd, rn, rm); 7559 } 7560 void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7561 Vmls(al, dt, rd, rn, rm); 7562 } 7563 7564 void Vmls( 7565 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7566 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7567 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7568 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7569 VIXL_ASSERT(allow_macro_instructions_); 7570 VIXL_ASSERT(OutsideITBlock()); 7571 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7572 ITScope it_scope(this, &cond); 7573 vmls(cond, dt, rd, rn, rm); 7574 } 7575 void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7576 Vmls(al, dt, rd, rn, rm); 7577 } 7578 7579 void Vmls( 7580 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7581 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7582 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7583 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7584 VIXL_ASSERT(allow_macro_instructions_); 7585 VIXL_ASSERT(OutsideITBlock()); 7586 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7587 ITScope it_scope(this, &cond); 7588 vmls(cond, dt, rd, rn, rm); 7589 } 7590 void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7591 Vmls(al, dt, rd, rn, rm); 7592 } 7593 7594 void Vmlsl(Condition cond, 7595 DataType dt, 7596 QRegister rd, 7597 DRegister rn, 7598 DRegisterLane rm) { 7599 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7600 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7601 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7602 VIXL_ASSERT(allow_macro_instructions_); 7603 VIXL_ASSERT(OutsideITBlock()); 7604 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7605 ITScope it_scope(this, &cond); 7606 vmlsl(cond, dt, rd, rn, rm); 7607 } 7608 void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { 7609 Vmlsl(al, dt, rd, rn, rm); 7610 } 7611 7612 void Vmlsl( 7613 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7614 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7615 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7616 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7617 VIXL_ASSERT(allow_macro_instructions_); 7618 VIXL_ASSERT(OutsideITBlock()); 7619 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7620 ITScope it_scope(this, &cond); 7621 vmlsl(cond, dt, rd, rn, rm); 7622 } 7623 void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7624 Vmlsl(al, dt, rd, rn, rm); 7625 } 7626 7627 void Vmov(Condition cond, Register rt, SRegister rn) { 7628 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7629 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7630 VIXL_ASSERT(allow_macro_instructions_); 7631 VIXL_ASSERT(OutsideITBlock()); 7632 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7633 ITScope it_scope(this, &cond); 7634 vmov(cond, rt, rn); 7635 } 7636 void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); } 7637 7638 void Vmov(Condition cond, SRegister rn, Register rt) { 7639 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7640 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7641 VIXL_ASSERT(allow_macro_instructions_); 7642 VIXL_ASSERT(OutsideITBlock()); 7643 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7644 ITScope it_scope(this, &cond); 7645 vmov(cond, rn, rt); 7646 } 7647 void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); } 7648 7649 void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) { 7650 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7651 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7652 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7653 VIXL_ASSERT(allow_macro_instructions_); 7654 VIXL_ASSERT(OutsideITBlock()); 7655 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7656 ITScope it_scope(this, &cond); 7657 vmov(cond, rt, rt2, rm); 7658 } 7659 void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); } 7660 7661 void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) { 7662 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7663 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7665 VIXL_ASSERT(allow_macro_instructions_); 7666 VIXL_ASSERT(OutsideITBlock()); 7667 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7668 ITScope it_scope(this, &cond); 7669 vmov(cond, rm, rt, rt2); 7670 } 7671 void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); } 7672 7673 void Vmov( 7674 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) { 7675 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7676 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7677 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7678 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1)); 7679 VIXL_ASSERT(allow_macro_instructions_); 7680 VIXL_ASSERT(OutsideITBlock()); 7681 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7682 ITScope it_scope(this, &cond); 7683 vmov(cond, rt, rt2, rm, rm1); 7684 } 7685 void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) { 7686 Vmov(al, rt, rt2, rm, rm1); 7687 } 7688 7689 void Vmov( 7690 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) { 7691 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7692 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1)); 7693 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7694 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2)); 7695 VIXL_ASSERT(allow_macro_instructions_); 7696 VIXL_ASSERT(OutsideITBlock()); 7697 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7698 ITScope it_scope(this, &cond); 7699 vmov(cond, rm, rm1, rt, rt2); 7700 } 7701 void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) { 7702 Vmov(al, rm, rm1, rt, rt2); 7703 } 7704 7705 void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) { 7706 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7707 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7708 VIXL_ASSERT(allow_macro_instructions_); 7709 VIXL_ASSERT(OutsideITBlock()); 7710 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7711 ITScope it_scope(this, &cond); 7712 vmov(cond, dt, rd, rt); 7713 } 7714 void Vmov(DataType dt, DRegisterLane rd, Register rt) { 7715 Vmov(al, dt, rd, rt); 7716 } 7717 void Vmov(Condition cond, DRegisterLane rd, Register rt) { 7718 Vmov(cond, kDataTypeValueNone, rd, rt); 7719 } 7720 void Vmov(DRegisterLane rd, Register rt) { 7721 Vmov(al, kDataTypeValueNone, rd, rt); 7722 } 7723 7724 void Vmov(Condition cond, 7725 DataType dt, 7726 DRegister rd, 7727 const DOperand& operand) { 7728 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7729 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7730 VIXL_ASSERT(allow_macro_instructions_); 7731 VIXL_ASSERT(OutsideITBlock()); 7732 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7733 ITScope it_scope(this, &cond); 7734 vmov(cond, dt, rd, operand); 7735 } 7736 void Vmov(DataType dt, DRegister rd, const DOperand& operand) { 7737 Vmov(al, dt, rd, operand); 7738 } 7739 7740 void Vmov(Condition cond, 7741 DataType dt, 7742 QRegister rd, 7743 const QOperand& operand) { 7744 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7745 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7746 VIXL_ASSERT(allow_macro_instructions_); 7747 VIXL_ASSERT(OutsideITBlock()); 7748 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7749 ITScope it_scope(this, &cond); 7750 vmov(cond, dt, rd, operand); 7751 } 7752 void Vmov(DataType dt, QRegister rd, const QOperand& operand) { 7753 Vmov(al, dt, rd, operand); 7754 } 7755 7756 void Vmov(Condition cond, 7757 DataType dt, 7758 SRegister rd, 7759 const SOperand& operand) { 7760 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7761 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7762 VIXL_ASSERT(allow_macro_instructions_); 7763 VIXL_ASSERT(OutsideITBlock()); 7764 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7765 ITScope it_scope(this, &cond); 7766 vmov(cond, dt, rd, operand); 7767 } 7768 void Vmov(DataType dt, SRegister rd, const SOperand& operand) { 7769 Vmov(al, dt, rd, operand); 7770 } 7771 7772 void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) { 7773 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7774 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7775 VIXL_ASSERT(allow_macro_instructions_); 7776 VIXL_ASSERT(OutsideITBlock()); 7777 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7778 ITScope it_scope(this, &cond); 7779 vmov(cond, dt, rt, rn); 7780 } 7781 void Vmov(DataType dt, Register rt, DRegisterLane rn) { 7782 Vmov(al, dt, rt, rn); 7783 } 7784 void Vmov(Condition cond, Register rt, DRegisterLane rn) { 7785 Vmov(cond, kDataTypeValueNone, rt, rn); 7786 } 7787 void Vmov(Register rt, DRegisterLane rn) { 7788 Vmov(al, kDataTypeValueNone, rt, rn); 7789 } 7790 7791 void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) { 7792 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7793 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7794 VIXL_ASSERT(allow_macro_instructions_); 7795 VIXL_ASSERT(OutsideITBlock()); 7796 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7797 ITScope it_scope(this, &cond); 7798 vmovl(cond, dt, rd, rm); 7799 } 7800 void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); } 7801 7802 void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) { 7803 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7804 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7805 VIXL_ASSERT(allow_macro_instructions_); 7806 VIXL_ASSERT(OutsideITBlock()); 7807 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7808 ITScope it_scope(this, &cond); 7809 vmovn(cond, dt, rd, rm); 7810 } 7811 void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); } 7812 7813 void Vmrs(Condition cond, 7814 RegisterOrAPSR_nzcv rt, 7815 SpecialFPRegister spec_reg) { 7816 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7817 VIXL_ASSERT(allow_macro_instructions_); 7818 VIXL_ASSERT(OutsideITBlock()); 7819 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7820 ITScope it_scope(this, &cond); 7821 vmrs(cond, rt, spec_reg); 7822 } 7823 void Vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) { 7824 Vmrs(al, rt, spec_reg); 7825 } 7826 7827 void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) { 7828 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt)); 7829 VIXL_ASSERT(allow_macro_instructions_); 7830 VIXL_ASSERT(OutsideITBlock()); 7831 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7832 ITScope it_scope(this, &cond); 7833 vmsr(cond, spec_reg, rt); 7834 } 7835 void Vmsr(SpecialFPRegister spec_reg, Register rt) { Vmsr(al, spec_reg, rt); } 7836 7837 void Vmul(Condition cond, 7838 DataType dt, 7839 DRegister rd, 7840 DRegister rn, 7841 DRegister dm, 7842 unsigned index) { 7843 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7844 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7845 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 7846 VIXL_ASSERT(allow_macro_instructions_); 7847 VIXL_ASSERT(OutsideITBlock()); 7848 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7849 ITScope it_scope(this, &cond); 7850 vmul(cond, dt, rd, rn, dm, index); 7851 } 7852 void Vmul( 7853 DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) { 7854 Vmul(al, dt, rd, rn, dm, index); 7855 } 7856 7857 void Vmul(Condition cond, 7858 DataType dt, 7859 QRegister rd, 7860 QRegister rn, 7861 DRegister dm, 7862 unsigned index) { 7863 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7864 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7865 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 7866 VIXL_ASSERT(allow_macro_instructions_); 7867 VIXL_ASSERT(OutsideITBlock()); 7868 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7869 ITScope it_scope(this, &cond); 7870 vmul(cond, dt, rd, rn, dm, index); 7871 } 7872 void Vmul( 7873 DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) { 7874 Vmul(al, dt, rd, rn, dm, index); 7875 } 7876 7877 void Vmul( 7878 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7879 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7880 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7881 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7882 VIXL_ASSERT(allow_macro_instructions_); 7883 VIXL_ASSERT(OutsideITBlock()); 7884 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7885 ITScope it_scope(this, &cond); 7886 vmul(cond, dt, rd, rn, rm); 7887 } 7888 void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 7889 Vmul(al, dt, rd, rn, rm); 7890 } 7891 7892 void Vmul( 7893 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7894 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7895 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7896 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7897 VIXL_ASSERT(allow_macro_instructions_); 7898 VIXL_ASSERT(OutsideITBlock()); 7899 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7900 ITScope it_scope(this, &cond); 7901 vmul(cond, dt, rd, rn, rm); 7902 } 7903 void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 7904 Vmul(al, dt, rd, rn, rm); 7905 } 7906 7907 void Vmul( 7908 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7909 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7910 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7911 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7912 VIXL_ASSERT(allow_macro_instructions_); 7913 VIXL_ASSERT(OutsideITBlock()); 7914 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7915 ITScope it_scope(this, &cond); 7916 vmul(cond, dt, rd, rn, rm); 7917 } 7918 void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 7919 Vmul(al, dt, rd, rn, rm); 7920 } 7921 7922 void Vmull(Condition cond, 7923 DataType dt, 7924 QRegister rd, 7925 DRegister rn, 7926 DRegister dm, 7927 unsigned index) { 7928 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7929 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7930 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 7931 VIXL_ASSERT(allow_macro_instructions_); 7932 VIXL_ASSERT(OutsideITBlock()); 7933 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7934 ITScope it_scope(this, &cond); 7935 vmull(cond, dt, rd, rn, dm, index); 7936 } 7937 void Vmull( 7938 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { 7939 Vmull(al, dt, rd, rn, dm, index); 7940 } 7941 7942 void Vmull( 7943 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7944 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7945 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 7946 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7947 VIXL_ASSERT(allow_macro_instructions_); 7948 VIXL_ASSERT(OutsideITBlock()); 7949 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7950 ITScope it_scope(this, &cond); 7951 vmull(cond, dt, rd, rn, rm); 7952 } 7953 void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 7954 Vmull(al, dt, rd, rn, rm); 7955 } 7956 7957 void Vmvn(Condition cond, 7958 DataType dt, 7959 DRegister rd, 7960 const DOperand& operand) { 7961 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7962 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7963 VIXL_ASSERT(allow_macro_instructions_); 7964 VIXL_ASSERT(OutsideITBlock()); 7965 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7966 ITScope it_scope(this, &cond); 7967 vmvn(cond, dt, rd, operand); 7968 } 7969 void Vmvn(DataType dt, DRegister rd, const DOperand& operand) { 7970 Vmvn(al, dt, rd, operand); 7971 } 7972 7973 void Vmvn(Condition cond, 7974 DataType dt, 7975 QRegister rd, 7976 const QOperand& operand) { 7977 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7978 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 7979 VIXL_ASSERT(allow_macro_instructions_); 7980 VIXL_ASSERT(OutsideITBlock()); 7981 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7982 ITScope it_scope(this, &cond); 7983 vmvn(cond, dt, rd, operand); 7984 } 7985 void Vmvn(DataType dt, QRegister rd, const QOperand& operand) { 7986 Vmvn(al, dt, rd, operand); 7987 } 7988 7989 void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) { 7990 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 7991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 7992 VIXL_ASSERT(allow_macro_instructions_); 7993 VIXL_ASSERT(OutsideITBlock()); 7994 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 7995 ITScope it_scope(this, &cond); 7996 vneg(cond, dt, rd, rm); 7997 } 7998 void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); } 7999 8000 void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8001 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8002 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8003 VIXL_ASSERT(allow_macro_instructions_); 8004 VIXL_ASSERT(OutsideITBlock()); 8005 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8006 ITScope it_scope(this, &cond); 8007 vneg(cond, dt, rd, rm); 8008 } 8009 void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); } 8010 8011 void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) { 8012 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8013 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8014 VIXL_ASSERT(allow_macro_instructions_); 8015 VIXL_ASSERT(OutsideITBlock()); 8016 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8017 ITScope it_scope(this, &cond); 8018 vneg(cond, dt, rd, rm); 8019 } 8020 void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); } 8021 8022 void Vnmla( 8023 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8024 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8025 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8026 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8027 VIXL_ASSERT(allow_macro_instructions_); 8028 VIXL_ASSERT(OutsideITBlock()); 8029 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8030 ITScope it_scope(this, &cond); 8031 vnmla(cond, dt, rd, rn, rm); 8032 } 8033 void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8034 Vnmla(al, dt, rd, rn, rm); 8035 } 8036 8037 void Vnmla( 8038 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8039 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8040 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8041 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8042 VIXL_ASSERT(allow_macro_instructions_); 8043 VIXL_ASSERT(OutsideITBlock()); 8044 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8045 ITScope it_scope(this, &cond); 8046 vnmla(cond, dt, rd, rn, rm); 8047 } 8048 void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8049 Vnmla(al, dt, rd, rn, rm); 8050 } 8051 8052 void Vnmls( 8053 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8054 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8055 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8056 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8057 VIXL_ASSERT(allow_macro_instructions_); 8058 VIXL_ASSERT(OutsideITBlock()); 8059 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8060 ITScope it_scope(this, &cond); 8061 vnmls(cond, dt, rd, rn, rm); 8062 } 8063 void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8064 Vnmls(al, dt, rd, rn, rm); 8065 } 8066 8067 void Vnmls( 8068 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8069 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8070 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8071 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8072 VIXL_ASSERT(allow_macro_instructions_); 8073 VIXL_ASSERT(OutsideITBlock()); 8074 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8075 ITScope it_scope(this, &cond); 8076 vnmls(cond, dt, rd, rn, rm); 8077 } 8078 void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8079 Vnmls(al, dt, rd, rn, rm); 8080 } 8081 8082 void Vnmul( 8083 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8084 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8085 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8086 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8087 VIXL_ASSERT(allow_macro_instructions_); 8088 VIXL_ASSERT(OutsideITBlock()); 8089 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8090 ITScope it_scope(this, &cond); 8091 vnmul(cond, dt, rd, rn, rm); 8092 } 8093 void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 8094 Vnmul(al, dt, rd, rn, rm); 8095 } 8096 8097 void Vnmul( 8098 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8099 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8100 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8101 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8102 VIXL_ASSERT(allow_macro_instructions_); 8103 VIXL_ASSERT(OutsideITBlock()); 8104 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8105 ITScope it_scope(this, &cond); 8106 vnmul(cond, dt, rd, rn, rm); 8107 } 8108 void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8109 Vnmul(al, dt, rd, rn, rm); 8110 } 8111 8112 void Vorn(Condition cond, 8113 DataType dt, 8114 DRegister rd, 8115 DRegister rn, 8116 const DOperand& operand) { 8117 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8118 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8119 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8120 VIXL_ASSERT(allow_macro_instructions_); 8121 VIXL_ASSERT(OutsideITBlock()); 8122 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8123 ITScope it_scope(this, &cond); 8124 vorn(cond, dt, rd, rn, operand); 8125 } 8126 void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 8127 Vorn(al, dt, rd, rn, operand); 8128 } 8129 8130 void Vorn(Condition cond, 8131 DataType dt, 8132 QRegister rd, 8133 QRegister rn, 8134 const QOperand& operand) { 8135 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8136 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8137 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8138 VIXL_ASSERT(allow_macro_instructions_); 8139 VIXL_ASSERT(OutsideITBlock()); 8140 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8141 ITScope it_scope(this, &cond); 8142 vorn(cond, dt, rd, rn, operand); 8143 } 8144 void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 8145 Vorn(al, dt, rd, rn, operand); 8146 } 8147 8148 void Vorr(Condition cond, 8149 DataType dt, 8150 DRegister rd, 8151 DRegister rn, 8152 const DOperand& operand) { 8153 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8154 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8155 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8156 VIXL_ASSERT(allow_macro_instructions_); 8157 VIXL_ASSERT(OutsideITBlock()); 8158 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8159 ITScope it_scope(this, &cond); 8160 vorr(cond, dt, rd, rn, operand); 8161 } 8162 void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { 8163 Vorr(al, dt, rd, rn, operand); 8164 } 8165 void Vorr(Condition cond, 8166 DRegister rd, 8167 DRegister rn, 8168 const DOperand& operand) { 8169 Vorr(cond, kDataTypeValueNone, rd, rn, operand); 8170 } 8171 void Vorr(DRegister rd, DRegister rn, const DOperand& operand) { 8172 Vorr(al, kDataTypeValueNone, rd, rn, operand); 8173 } 8174 8175 void Vorr(Condition cond, 8176 DataType dt, 8177 QRegister rd, 8178 QRegister rn, 8179 const QOperand& operand) { 8180 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8181 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8182 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8183 VIXL_ASSERT(allow_macro_instructions_); 8184 VIXL_ASSERT(OutsideITBlock()); 8185 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8186 ITScope it_scope(this, &cond); 8187 vorr(cond, dt, rd, rn, operand); 8188 } 8189 void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { 8190 Vorr(al, dt, rd, rn, operand); 8191 } 8192 void Vorr(Condition cond, 8193 QRegister rd, 8194 QRegister rn, 8195 const QOperand& operand) { 8196 Vorr(cond, kDataTypeValueNone, rd, rn, operand); 8197 } 8198 void Vorr(QRegister rd, QRegister rn, const QOperand& operand) { 8199 Vorr(al, kDataTypeValueNone, rd, rn, operand); 8200 } 8201 8202 void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8203 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8204 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8205 VIXL_ASSERT(allow_macro_instructions_); 8206 VIXL_ASSERT(OutsideITBlock()); 8207 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8208 ITScope it_scope(this, &cond); 8209 vpadal(cond, dt, rd, rm); 8210 } 8211 void Vpadal(DataType dt, DRegister rd, DRegister rm) { 8212 Vpadal(al, dt, rd, rm); 8213 } 8214 8215 void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8216 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8217 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8218 VIXL_ASSERT(allow_macro_instructions_); 8219 VIXL_ASSERT(OutsideITBlock()); 8220 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8221 ITScope it_scope(this, &cond); 8222 vpadal(cond, dt, rd, rm); 8223 } 8224 void Vpadal(DataType dt, QRegister rd, QRegister rm) { 8225 Vpadal(al, dt, rd, rm); 8226 } 8227 8228 void Vpadd( 8229 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8230 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8231 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8232 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8233 VIXL_ASSERT(allow_macro_instructions_); 8234 VIXL_ASSERT(OutsideITBlock()); 8235 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8236 ITScope it_scope(this, &cond); 8237 vpadd(cond, dt, rd, rn, rm); 8238 } 8239 void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8240 Vpadd(al, dt, rd, rn, rm); 8241 } 8242 8243 void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8244 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8245 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8246 VIXL_ASSERT(allow_macro_instructions_); 8247 VIXL_ASSERT(OutsideITBlock()); 8248 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8249 ITScope it_scope(this, &cond); 8250 vpaddl(cond, dt, rd, rm); 8251 } 8252 void Vpaddl(DataType dt, DRegister rd, DRegister rm) { 8253 Vpaddl(al, dt, rd, rm); 8254 } 8255 8256 void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8257 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8258 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8259 VIXL_ASSERT(allow_macro_instructions_); 8260 VIXL_ASSERT(OutsideITBlock()); 8261 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8262 ITScope it_scope(this, &cond); 8263 vpaddl(cond, dt, rd, rm); 8264 } 8265 void Vpaddl(DataType dt, QRegister rd, QRegister rm) { 8266 Vpaddl(al, dt, rd, rm); 8267 } 8268 8269 void Vpmax( 8270 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8271 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8272 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8273 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8274 VIXL_ASSERT(allow_macro_instructions_); 8275 VIXL_ASSERT(OutsideITBlock()); 8276 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8277 ITScope it_scope(this, &cond); 8278 vpmax(cond, dt, rd, rn, rm); 8279 } 8280 void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8281 Vpmax(al, dt, rd, rn, rm); 8282 } 8283 8284 void Vpmin( 8285 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8286 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8287 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8288 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8289 VIXL_ASSERT(allow_macro_instructions_); 8290 VIXL_ASSERT(OutsideITBlock()); 8291 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8292 ITScope it_scope(this, &cond); 8293 vpmin(cond, dt, rd, rn, rm); 8294 } 8295 void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8296 Vpmin(al, dt, rd, rn, rm); 8297 } 8298 8299 void Vpop(Condition cond, DataType dt, DRegisterList dreglist) { 8300 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 8301 VIXL_ASSERT(allow_macro_instructions_); 8302 VIXL_ASSERT(OutsideITBlock()); 8303 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8304 ITScope it_scope(this, &cond); 8305 vpop(cond, dt, dreglist); 8306 } 8307 void Vpop(DataType dt, DRegisterList dreglist) { Vpop(al, dt, dreglist); } 8308 void Vpop(Condition cond, DRegisterList dreglist) { 8309 Vpop(cond, kDataTypeValueNone, dreglist); 8310 } 8311 void Vpop(DRegisterList dreglist) { Vpop(al, kDataTypeValueNone, dreglist); } 8312 8313 void Vpop(Condition cond, DataType dt, SRegisterList sreglist) { 8314 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 8315 VIXL_ASSERT(allow_macro_instructions_); 8316 VIXL_ASSERT(OutsideITBlock()); 8317 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8318 ITScope it_scope(this, &cond); 8319 vpop(cond, dt, sreglist); 8320 } 8321 void Vpop(DataType dt, SRegisterList sreglist) { Vpop(al, dt, sreglist); } 8322 void Vpop(Condition cond, SRegisterList sreglist) { 8323 Vpop(cond, kDataTypeValueNone, sreglist); 8324 } 8325 void Vpop(SRegisterList sreglist) { Vpop(al, kDataTypeValueNone, sreglist); } 8326 8327 void Vpush(Condition cond, DataType dt, DRegisterList dreglist) { 8328 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 8329 VIXL_ASSERT(allow_macro_instructions_); 8330 VIXL_ASSERT(OutsideITBlock()); 8331 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8332 ITScope it_scope(this, &cond); 8333 vpush(cond, dt, dreglist); 8334 } 8335 void Vpush(DataType dt, DRegisterList dreglist) { Vpush(al, dt, dreglist); } 8336 void Vpush(Condition cond, DRegisterList dreglist) { 8337 Vpush(cond, kDataTypeValueNone, dreglist); 8338 } 8339 void Vpush(DRegisterList dreglist) { 8340 Vpush(al, kDataTypeValueNone, dreglist); 8341 } 8342 8343 void Vpush(Condition cond, DataType dt, SRegisterList sreglist) { 8344 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 8345 VIXL_ASSERT(allow_macro_instructions_); 8346 VIXL_ASSERT(OutsideITBlock()); 8347 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8348 ITScope it_scope(this, &cond); 8349 vpush(cond, dt, sreglist); 8350 } 8351 void Vpush(DataType dt, SRegisterList sreglist) { Vpush(al, dt, sreglist); } 8352 void Vpush(Condition cond, SRegisterList sreglist) { 8353 Vpush(cond, kDataTypeValueNone, sreglist); 8354 } 8355 void Vpush(SRegisterList sreglist) { 8356 Vpush(al, kDataTypeValueNone, sreglist); 8357 } 8358 8359 void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8360 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8361 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8362 VIXL_ASSERT(allow_macro_instructions_); 8363 VIXL_ASSERT(OutsideITBlock()); 8364 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8365 ITScope it_scope(this, &cond); 8366 vqabs(cond, dt, rd, rm); 8367 } 8368 void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); } 8369 8370 void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8371 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8372 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8373 VIXL_ASSERT(allow_macro_instructions_); 8374 VIXL_ASSERT(OutsideITBlock()); 8375 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8376 ITScope it_scope(this, &cond); 8377 vqabs(cond, dt, rd, rm); 8378 } 8379 void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); } 8380 8381 void Vqadd( 8382 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8383 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8384 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8385 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8386 VIXL_ASSERT(allow_macro_instructions_); 8387 VIXL_ASSERT(OutsideITBlock()); 8388 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8389 ITScope it_scope(this, &cond); 8390 vqadd(cond, dt, rd, rn, rm); 8391 } 8392 void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8393 Vqadd(al, dt, rd, rn, rm); 8394 } 8395 8396 void Vqadd( 8397 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8398 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8399 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8400 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8401 VIXL_ASSERT(allow_macro_instructions_); 8402 VIXL_ASSERT(OutsideITBlock()); 8403 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8404 ITScope it_scope(this, &cond); 8405 vqadd(cond, dt, rd, rn, rm); 8406 } 8407 void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8408 Vqadd(al, dt, rd, rn, rm); 8409 } 8410 8411 void Vqdmlal( 8412 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8413 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8414 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8415 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8416 VIXL_ASSERT(allow_macro_instructions_); 8417 VIXL_ASSERT(OutsideITBlock()); 8418 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8419 ITScope it_scope(this, &cond); 8420 vqdmlal(cond, dt, rd, rn, rm); 8421 } 8422 void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8423 Vqdmlal(al, dt, rd, rn, rm); 8424 } 8425 8426 void Vqdmlal(Condition cond, 8427 DataType dt, 8428 QRegister rd, 8429 DRegister rn, 8430 DRegister dm, 8431 unsigned index) { 8432 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8433 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8434 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8435 VIXL_ASSERT(allow_macro_instructions_); 8436 VIXL_ASSERT(OutsideITBlock()); 8437 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8438 ITScope it_scope(this, &cond); 8439 vqdmlal(cond, dt, rd, rn, dm, index); 8440 } 8441 void Vqdmlal( 8442 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { 8443 Vqdmlal(al, dt, rd, rn, dm, index); 8444 } 8445 8446 void Vqdmlsl( 8447 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8448 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8449 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8450 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8451 VIXL_ASSERT(allow_macro_instructions_); 8452 VIXL_ASSERT(OutsideITBlock()); 8453 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8454 ITScope it_scope(this, &cond); 8455 vqdmlsl(cond, dt, rd, rn, rm); 8456 } 8457 void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8458 Vqdmlsl(al, dt, rd, rn, rm); 8459 } 8460 8461 void Vqdmlsl(Condition cond, 8462 DataType dt, 8463 QRegister rd, 8464 DRegister rn, 8465 DRegister dm, 8466 unsigned index) { 8467 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8468 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8469 VIXL_ASSERT(!AliasesAvailableScratchRegister(dm)); 8470 VIXL_ASSERT(allow_macro_instructions_); 8471 VIXL_ASSERT(OutsideITBlock()); 8472 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8473 ITScope it_scope(this, &cond); 8474 vqdmlsl(cond, dt, rd, rn, dm, index); 8475 } 8476 void Vqdmlsl( 8477 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) { 8478 Vqdmlsl(al, dt, rd, rn, dm, index); 8479 } 8480 8481 void Vqdmulh( 8482 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8483 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8484 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8485 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8486 VIXL_ASSERT(allow_macro_instructions_); 8487 VIXL_ASSERT(OutsideITBlock()); 8488 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8489 ITScope it_scope(this, &cond); 8490 vqdmulh(cond, dt, rd, rn, rm); 8491 } 8492 void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8493 Vqdmulh(al, dt, rd, rn, rm); 8494 } 8495 8496 void Vqdmulh( 8497 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8498 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8499 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8500 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8501 VIXL_ASSERT(allow_macro_instructions_); 8502 VIXL_ASSERT(OutsideITBlock()); 8503 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8504 ITScope it_scope(this, &cond); 8505 vqdmulh(cond, dt, rd, rn, rm); 8506 } 8507 void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8508 Vqdmulh(al, dt, rd, rn, rm); 8509 } 8510 8511 void Vqdmulh(Condition cond, 8512 DataType dt, 8513 DRegister rd, 8514 DRegister rn, 8515 DRegisterLane rm) { 8516 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8517 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8518 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8519 VIXL_ASSERT(allow_macro_instructions_); 8520 VIXL_ASSERT(OutsideITBlock()); 8521 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8522 ITScope it_scope(this, &cond); 8523 vqdmulh(cond, dt, rd, rn, rm); 8524 } 8525 void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 8526 Vqdmulh(al, dt, rd, rn, rm); 8527 } 8528 8529 void Vqdmulh(Condition cond, 8530 DataType dt, 8531 QRegister rd, 8532 QRegister rn, 8533 DRegisterLane rm) { 8534 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8535 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8536 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8537 VIXL_ASSERT(allow_macro_instructions_); 8538 VIXL_ASSERT(OutsideITBlock()); 8539 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8540 ITScope it_scope(this, &cond); 8541 vqdmulh(cond, dt, rd, rn, rm); 8542 } 8543 void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 8544 Vqdmulh(al, dt, rd, rn, rm); 8545 } 8546 8547 void Vqdmull( 8548 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8549 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8550 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8551 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8552 VIXL_ASSERT(allow_macro_instructions_); 8553 VIXL_ASSERT(OutsideITBlock()); 8554 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8555 ITScope it_scope(this, &cond); 8556 vqdmull(cond, dt, rd, rn, rm); 8557 } 8558 void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 8559 Vqdmull(al, dt, rd, rn, rm); 8560 } 8561 8562 void Vqdmull(Condition cond, 8563 DataType dt, 8564 QRegister rd, 8565 DRegister rn, 8566 DRegisterLane rm) { 8567 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8568 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8569 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8570 VIXL_ASSERT(allow_macro_instructions_); 8571 VIXL_ASSERT(OutsideITBlock()); 8572 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8573 ITScope it_scope(this, &cond); 8574 vqdmull(cond, dt, rd, rn, rm); 8575 } 8576 void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { 8577 Vqdmull(al, dt, rd, rn, rm); 8578 } 8579 8580 void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) { 8581 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8582 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8583 VIXL_ASSERT(allow_macro_instructions_); 8584 VIXL_ASSERT(OutsideITBlock()); 8585 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8586 ITScope it_scope(this, &cond); 8587 vqmovn(cond, dt, rd, rm); 8588 } 8589 void Vqmovn(DataType dt, DRegister rd, QRegister rm) { 8590 Vqmovn(al, dt, rd, rm); 8591 } 8592 8593 void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) { 8594 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8595 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8596 VIXL_ASSERT(allow_macro_instructions_); 8597 VIXL_ASSERT(OutsideITBlock()); 8598 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8599 ITScope it_scope(this, &cond); 8600 vqmovun(cond, dt, rd, rm); 8601 } 8602 void Vqmovun(DataType dt, DRegister rd, QRegister rm) { 8603 Vqmovun(al, dt, rd, rm); 8604 } 8605 8606 void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8607 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8608 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8609 VIXL_ASSERT(allow_macro_instructions_); 8610 VIXL_ASSERT(OutsideITBlock()); 8611 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8612 ITScope it_scope(this, &cond); 8613 vqneg(cond, dt, rd, rm); 8614 } 8615 void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); } 8616 8617 void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8618 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8619 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8620 VIXL_ASSERT(allow_macro_instructions_); 8621 VIXL_ASSERT(OutsideITBlock()); 8622 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8623 ITScope it_scope(this, &cond); 8624 vqneg(cond, dt, rd, rm); 8625 } 8626 void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); } 8627 8628 void Vqrdmulh( 8629 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8630 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8631 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8632 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8633 VIXL_ASSERT(allow_macro_instructions_); 8634 VIXL_ASSERT(OutsideITBlock()); 8635 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8636 ITScope it_scope(this, &cond); 8637 vqrdmulh(cond, dt, rd, rn, rm); 8638 } 8639 void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8640 Vqrdmulh(al, dt, rd, rn, rm); 8641 } 8642 8643 void Vqrdmulh( 8644 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8645 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8646 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8647 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8648 VIXL_ASSERT(allow_macro_instructions_); 8649 VIXL_ASSERT(OutsideITBlock()); 8650 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8651 ITScope it_scope(this, &cond); 8652 vqrdmulh(cond, dt, rd, rn, rm); 8653 } 8654 void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8655 Vqrdmulh(al, dt, rd, rn, rm); 8656 } 8657 8658 void Vqrdmulh(Condition cond, 8659 DataType dt, 8660 DRegister rd, 8661 DRegister rn, 8662 DRegisterLane rm) { 8663 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8666 VIXL_ASSERT(allow_macro_instructions_); 8667 VIXL_ASSERT(OutsideITBlock()); 8668 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8669 ITScope it_scope(this, &cond); 8670 vqrdmulh(cond, dt, rd, rn, rm); 8671 } 8672 void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { 8673 Vqrdmulh(al, dt, rd, rn, rm); 8674 } 8675 8676 void Vqrdmulh(Condition cond, 8677 DataType dt, 8678 QRegister rd, 8679 QRegister rn, 8680 DRegisterLane rm) { 8681 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8682 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8683 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8684 VIXL_ASSERT(allow_macro_instructions_); 8685 VIXL_ASSERT(OutsideITBlock()); 8686 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8687 ITScope it_scope(this, &cond); 8688 vqrdmulh(cond, dt, rd, rn, rm); 8689 } 8690 void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { 8691 Vqrdmulh(al, dt, rd, rn, rm); 8692 } 8693 8694 void Vqrshl( 8695 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) { 8696 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8697 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8698 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8699 VIXL_ASSERT(allow_macro_instructions_); 8700 VIXL_ASSERT(OutsideITBlock()); 8701 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8702 ITScope it_scope(this, &cond); 8703 vqrshl(cond, dt, rd, rm, rn); 8704 } 8705 void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) { 8706 Vqrshl(al, dt, rd, rm, rn); 8707 } 8708 8709 void Vqrshl( 8710 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) { 8711 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8712 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8713 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8714 VIXL_ASSERT(allow_macro_instructions_); 8715 VIXL_ASSERT(OutsideITBlock()); 8716 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8717 ITScope it_scope(this, &cond); 8718 vqrshl(cond, dt, rd, rm, rn); 8719 } 8720 void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) { 8721 Vqrshl(al, dt, rd, rm, rn); 8722 } 8723 8724 void Vqrshrn(Condition cond, 8725 DataType dt, 8726 DRegister rd, 8727 QRegister rm, 8728 const QOperand& operand) { 8729 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8730 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8731 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8732 VIXL_ASSERT(allow_macro_instructions_); 8733 VIXL_ASSERT(OutsideITBlock()); 8734 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8735 ITScope it_scope(this, &cond); 8736 vqrshrn(cond, dt, rd, rm, operand); 8737 } 8738 void Vqrshrn(DataType dt, 8739 DRegister rd, 8740 QRegister rm, 8741 const QOperand& operand) { 8742 Vqrshrn(al, dt, rd, rm, operand); 8743 } 8744 8745 void Vqrshrun(Condition cond, 8746 DataType dt, 8747 DRegister rd, 8748 QRegister rm, 8749 const QOperand& operand) { 8750 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8751 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8752 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8753 VIXL_ASSERT(allow_macro_instructions_); 8754 VIXL_ASSERT(OutsideITBlock()); 8755 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8756 ITScope it_scope(this, &cond); 8757 vqrshrun(cond, dt, rd, rm, operand); 8758 } 8759 void Vqrshrun(DataType dt, 8760 DRegister rd, 8761 QRegister rm, 8762 const QOperand& operand) { 8763 Vqrshrun(al, dt, rd, rm, operand); 8764 } 8765 8766 void Vqshl(Condition cond, 8767 DataType dt, 8768 DRegister rd, 8769 DRegister rm, 8770 const DOperand& operand) { 8771 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8772 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8773 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8774 VIXL_ASSERT(allow_macro_instructions_); 8775 VIXL_ASSERT(OutsideITBlock()); 8776 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8777 ITScope it_scope(this, &cond); 8778 vqshl(cond, dt, rd, rm, operand); 8779 } 8780 void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 8781 Vqshl(al, dt, rd, rm, operand); 8782 } 8783 8784 void Vqshl(Condition cond, 8785 DataType dt, 8786 QRegister rd, 8787 QRegister rm, 8788 const QOperand& operand) { 8789 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8790 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8791 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8792 VIXL_ASSERT(allow_macro_instructions_); 8793 VIXL_ASSERT(OutsideITBlock()); 8794 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8795 ITScope it_scope(this, &cond); 8796 vqshl(cond, dt, rd, rm, operand); 8797 } 8798 void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 8799 Vqshl(al, dt, rd, rm, operand); 8800 } 8801 8802 void Vqshlu(Condition cond, 8803 DataType dt, 8804 DRegister rd, 8805 DRegister rm, 8806 const DOperand& operand) { 8807 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8808 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8809 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8810 VIXL_ASSERT(allow_macro_instructions_); 8811 VIXL_ASSERT(OutsideITBlock()); 8812 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8813 ITScope it_scope(this, &cond); 8814 vqshlu(cond, dt, rd, rm, operand); 8815 } 8816 void Vqshlu(DataType dt, 8817 DRegister rd, 8818 DRegister rm, 8819 const DOperand& operand) { 8820 Vqshlu(al, dt, rd, rm, operand); 8821 } 8822 8823 void Vqshlu(Condition cond, 8824 DataType dt, 8825 QRegister rd, 8826 QRegister rm, 8827 const QOperand& operand) { 8828 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8829 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8830 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8831 VIXL_ASSERT(allow_macro_instructions_); 8832 VIXL_ASSERT(OutsideITBlock()); 8833 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8834 ITScope it_scope(this, &cond); 8835 vqshlu(cond, dt, rd, rm, operand); 8836 } 8837 void Vqshlu(DataType dt, 8838 QRegister rd, 8839 QRegister rm, 8840 const QOperand& operand) { 8841 Vqshlu(al, dt, rd, rm, operand); 8842 } 8843 8844 void Vqshrn(Condition cond, 8845 DataType dt, 8846 DRegister rd, 8847 QRegister rm, 8848 const QOperand& operand) { 8849 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8850 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8851 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8852 VIXL_ASSERT(allow_macro_instructions_); 8853 VIXL_ASSERT(OutsideITBlock()); 8854 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8855 ITScope it_scope(this, &cond); 8856 vqshrn(cond, dt, rd, rm, operand); 8857 } 8858 void Vqshrn(DataType dt, 8859 DRegister rd, 8860 QRegister rm, 8861 const QOperand& operand) { 8862 Vqshrn(al, dt, rd, rm, operand); 8863 } 8864 8865 void Vqshrun(Condition cond, 8866 DataType dt, 8867 DRegister rd, 8868 QRegister rm, 8869 const QOperand& operand) { 8870 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8871 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8872 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 8873 VIXL_ASSERT(allow_macro_instructions_); 8874 VIXL_ASSERT(OutsideITBlock()); 8875 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8876 ITScope it_scope(this, &cond); 8877 vqshrun(cond, dt, rd, rm, operand); 8878 } 8879 void Vqshrun(DataType dt, 8880 DRegister rd, 8881 QRegister rm, 8882 const QOperand& operand) { 8883 Vqshrun(al, dt, rd, rm, operand); 8884 } 8885 8886 void Vqsub( 8887 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8888 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8889 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8890 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8891 VIXL_ASSERT(allow_macro_instructions_); 8892 VIXL_ASSERT(OutsideITBlock()); 8893 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8894 ITScope it_scope(this, &cond); 8895 vqsub(cond, dt, rd, rn, rm); 8896 } 8897 void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8898 Vqsub(al, dt, rd, rn, rm); 8899 } 8900 8901 void Vqsub( 8902 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8903 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8904 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8905 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8906 VIXL_ASSERT(allow_macro_instructions_); 8907 VIXL_ASSERT(OutsideITBlock()); 8908 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8909 ITScope it_scope(this, &cond); 8910 vqsub(cond, dt, rd, rn, rm); 8911 } 8912 void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8913 Vqsub(al, dt, rd, rn, rm); 8914 } 8915 8916 void Vraddhn( 8917 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 8918 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8919 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8920 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8921 VIXL_ASSERT(allow_macro_instructions_); 8922 VIXL_ASSERT(OutsideITBlock()); 8923 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8924 ITScope it_scope(this, &cond); 8925 vraddhn(cond, dt, rd, rn, rm); 8926 } 8927 void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 8928 Vraddhn(al, dt, rd, rn, rm); 8929 } 8930 8931 void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8932 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8933 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8934 VIXL_ASSERT(allow_macro_instructions_); 8935 VIXL_ASSERT(OutsideITBlock()); 8936 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8937 ITScope it_scope(this, &cond); 8938 vrecpe(cond, dt, rd, rm); 8939 } 8940 void Vrecpe(DataType dt, DRegister rd, DRegister rm) { 8941 Vrecpe(al, dt, rd, rm); 8942 } 8943 8944 void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) { 8945 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8946 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8947 VIXL_ASSERT(allow_macro_instructions_); 8948 VIXL_ASSERT(OutsideITBlock()); 8949 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8950 ITScope it_scope(this, &cond); 8951 vrecpe(cond, dt, rd, rm); 8952 } 8953 void Vrecpe(DataType dt, QRegister rd, QRegister rm) { 8954 Vrecpe(al, dt, rd, rm); 8955 } 8956 8957 void Vrecps( 8958 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8959 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8960 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8961 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8962 VIXL_ASSERT(allow_macro_instructions_); 8963 VIXL_ASSERT(OutsideITBlock()); 8964 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8965 ITScope it_scope(this, &cond); 8966 vrecps(cond, dt, rd, rn, rm); 8967 } 8968 void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 8969 Vrecps(al, dt, rd, rn, rm); 8970 } 8971 8972 void Vrecps( 8973 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8974 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8975 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 8976 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8977 VIXL_ASSERT(allow_macro_instructions_); 8978 VIXL_ASSERT(OutsideITBlock()); 8979 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8980 ITScope it_scope(this, &cond); 8981 vrecps(cond, dt, rd, rn, rm); 8982 } 8983 void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 8984 Vrecps(al, dt, rd, rn, rm); 8985 } 8986 8987 void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) { 8988 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 8989 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 8990 VIXL_ASSERT(allow_macro_instructions_); 8991 VIXL_ASSERT(OutsideITBlock()); 8992 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 8993 ITScope it_scope(this, &cond); 8994 vrev16(cond, dt, rd, rm); 8995 } 8996 void Vrev16(DataType dt, DRegister rd, DRegister rm) { 8997 Vrev16(al, dt, rd, rm); 8998 } 8999 9000 void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9001 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9002 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9003 VIXL_ASSERT(allow_macro_instructions_); 9004 VIXL_ASSERT(OutsideITBlock()); 9005 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9006 ITScope it_scope(this, &cond); 9007 vrev16(cond, dt, rd, rm); 9008 } 9009 void Vrev16(DataType dt, QRegister rd, QRegister rm) { 9010 Vrev16(al, dt, rd, rm); 9011 } 9012 9013 void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9014 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9015 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9016 VIXL_ASSERT(allow_macro_instructions_); 9017 VIXL_ASSERT(OutsideITBlock()); 9018 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9019 ITScope it_scope(this, &cond); 9020 vrev32(cond, dt, rd, rm); 9021 } 9022 void Vrev32(DataType dt, DRegister rd, DRegister rm) { 9023 Vrev32(al, dt, rd, rm); 9024 } 9025 9026 void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9027 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9028 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9029 VIXL_ASSERT(allow_macro_instructions_); 9030 VIXL_ASSERT(OutsideITBlock()); 9031 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9032 ITScope it_scope(this, &cond); 9033 vrev32(cond, dt, rd, rm); 9034 } 9035 void Vrev32(DataType dt, QRegister rd, QRegister rm) { 9036 Vrev32(al, dt, rd, rm); 9037 } 9038 9039 void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9040 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9041 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9042 VIXL_ASSERT(allow_macro_instructions_); 9043 VIXL_ASSERT(OutsideITBlock()); 9044 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9045 ITScope it_scope(this, &cond); 9046 vrev64(cond, dt, rd, rm); 9047 } 9048 void Vrev64(DataType dt, DRegister rd, DRegister rm) { 9049 Vrev64(al, dt, rd, rm); 9050 } 9051 9052 void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9053 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9054 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9055 VIXL_ASSERT(allow_macro_instructions_); 9056 VIXL_ASSERT(OutsideITBlock()); 9057 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9058 ITScope it_scope(this, &cond); 9059 vrev64(cond, dt, rd, rm); 9060 } 9061 void Vrev64(DataType dt, QRegister rd, QRegister rm) { 9062 Vrev64(al, dt, rd, rm); 9063 } 9064 9065 void Vrhadd( 9066 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9067 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9068 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9069 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9070 VIXL_ASSERT(allow_macro_instructions_); 9071 VIXL_ASSERT(OutsideITBlock()); 9072 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9073 ITScope it_scope(this, &cond); 9074 vrhadd(cond, dt, rd, rn, rm); 9075 } 9076 void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9077 Vrhadd(al, dt, rd, rn, rm); 9078 } 9079 9080 void Vrhadd( 9081 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9082 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9083 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9084 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9085 VIXL_ASSERT(allow_macro_instructions_); 9086 VIXL_ASSERT(OutsideITBlock()); 9087 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9088 ITScope it_scope(this, &cond); 9089 vrhadd(cond, dt, rd, rn, rm); 9090 } 9091 void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9092 Vrhadd(al, dt, rd, rn, rm); 9093 } 9094 9095 void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9096 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9097 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9098 VIXL_ASSERT(allow_macro_instructions_); 9099 VIXL_ASSERT(OutsideITBlock()); 9100 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9101 vrinta(dt1, dt2, rd, rm); 9102 } 9103 9104 void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9105 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9106 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9107 VIXL_ASSERT(allow_macro_instructions_); 9108 VIXL_ASSERT(OutsideITBlock()); 9109 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9110 vrinta(dt1, dt2, rd, rm); 9111 } 9112 9113 void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9114 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9115 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9116 VIXL_ASSERT(allow_macro_instructions_); 9117 VIXL_ASSERT(OutsideITBlock()); 9118 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9119 vrinta(dt1, dt2, rd, rm); 9120 } 9121 9122 void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9123 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9124 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9125 VIXL_ASSERT(allow_macro_instructions_); 9126 VIXL_ASSERT(OutsideITBlock()); 9127 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9128 vrintm(dt1, dt2, rd, rm); 9129 } 9130 9131 void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9132 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9133 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9134 VIXL_ASSERT(allow_macro_instructions_); 9135 VIXL_ASSERT(OutsideITBlock()); 9136 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9137 vrintm(dt1, dt2, rd, rm); 9138 } 9139 9140 void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9141 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9142 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9143 VIXL_ASSERT(allow_macro_instructions_); 9144 VIXL_ASSERT(OutsideITBlock()); 9145 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9146 vrintm(dt1, dt2, rd, rm); 9147 } 9148 9149 void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9150 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9151 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9152 VIXL_ASSERT(allow_macro_instructions_); 9153 VIXL_ASSERT(OutsideITBlock()); 9154 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9155 vrintn(dt1, dt2, rd, rm); 9156 } 9157 9158 void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9159 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9160 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9161 VIXL_ASSERT(allow_macro_instructions_); 9162 VIXL_ASSERT(OutsideITBlock()); 9163 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9164 vrintn(dt1, dt2, rd, rm); 9165 } 9166 9167 void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9168 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9169 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9170 VIXL_ASSERT(allow_macro_instructions_); 9171 VIXL_ASSERT(OutsideITBlock()); 9172 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9173 vrintn(dt1, dt2, rd, rm); 9174 } 9175 9176 void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9177 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9178 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9179 VIXL_ASSERT(allow_macro_instructions_); 9180 VIXL_ASSERT(OutsideITBlock()); 9181 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9182 vrintp(dt1, dt2, rd, rm); 9183 } 9184 9185 void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9186 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9187 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9188 VIXL_ASSERT(allow_macro_instructions_); 9189 VIXL_ASSERT(OutsideITBlock()); 9190 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9191 vrintp(dt1, dt2, rd, rm); 9192 } 9193 9194 void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9195 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9196 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9197 VIXL_ASSERT(allow_macro_instructions_); 9198 VIXL_ASSERT(OutsideITBlock()); 9199 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9200 vrintp(dt1, dt2, rd, rm); 9201 } 9202 9203 void Vrintr( 9204 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9205 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9206 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9207 VIXL_ASSERT(allow_macro_instructions_); 9208 VIXL_ASSERT(OutsideITBlock()); 9209 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9210 ITScope it_scope(this, &cond); 9211 vrintr(cond, dt1, dt2, rd, rm); 9212 } 9213 void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9214 Vrintr(al, dt1, dt2, rd, rm); 9215 } 9216 9217 void Vrintr( 9218 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9219 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9220 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9221 VIXL_ASSERT(allow_macro_instructions_); 9222 VIXL_ASSERT(OutsideITBlock()); 9223 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9224 ITScope it_scope(this, &cond); 9225 vrintr(cond, dt1, dt2, rd, rm); 9226 } 9227 void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9228 Vrintr(al, dt1, dt2, rd, rm); 9229 } 9230 9231 void Vrintx( 9232 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9233 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9234 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9235 VIXL_ASSERT(allow_macro_instructions_); 9236 VIXL_ASSERT(OutsideITBlock()); 9237 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9238 ITScope it_scope(this, &cond); 9239 vrintx(cond, dt1, dt2, rd, rm); 9240 } 9241 void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9242 Vrintx(al, dt1, dt2, rd, rm); 9243 } 9244 9245 void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9246 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9247 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9248 VIXL_ASSERT(allow_macro_instructions_); 9249 VIXL_ASSERT(OutsideITBlock()); 9250 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9251 vrintx(dt1, dt2, rd, rm); 9252 } 9253 9254 void Vrintx( 9255 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9256 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9257 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9258 VIXL_ASSERT(allow_macro_instructions_); 9259 VIXL_ASSERT(OutsideITBlock()); 9260 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9261 ITScope it_scope(this, &cond); 9262 vrintx(cond, dt1, dt2, rd, rm); 9263 } 9264 void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9265 Vrintx(al, dt1, dt2, rd, rm); 9266 } 9267 9268 void Vrintz( 9269 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9270 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9271 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9272 VIXL_ASSERT(allow_macro_instructions_); 9273 VIXL_ASSERT(OutsideITBlock()); 9274 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9275 ITScope it_scope(this, &cond); 9276 vrintz(cond, dt1, dt2, rd, rm); 9277 } 9278 void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { 9279 Vrintz(al, dt1, dt2, rd, rm); 9280 } 9281 9282 void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { 9283 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9284 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9285 VIXL_ASSERT(allow_macro_instructions_); 9286 VIXL_ASSERT(OutsideITBlock()); 9287 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9288 vrintz(dt1, dt2, rd, rm); 9289 } 9290 9291 void Vrintz( 9292 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9293 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9294 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9295 VIXL_ASSERT(allow_macro_instructions_); 9296 VIXL_ASSERT(OutsideITBlock()); 9297 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9298 ITScope it_scope(this, &cond); 9299 vrintz(cond, dt1, dt2, rd, rm); 9300 } 9301 void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { 9302 Vrintz(al, dt1, dt2, rd, rm); 9303 } 9304 9305 void Vrshl( 9306 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) { 9307 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9308 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9309 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9310 VIXL_ASSERT(allow_macro_instructions_); 9311 VIXL_ASSERT(OutsideITBlock()); 9312 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9313 ITScope it_scope(this, &cond); 9314 vrshl(cond, dt, rd, rm, rn); 9315 } 9316 void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) { 9317 Vrshl(al, dt, rd, rm, rn); 9318 } 9319 9320 void Vrshl( 9321 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) { 9322 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9323 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9324 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9325 VIXL_ASSERT(allow_macro_instructions_); 9326 VIXL_ASSERT(OutsideITBlock()); 9327 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9328 ITScope it_scope(this, &cond); 9329 vrshl(cond, dt, rd, rm, rn); 9330 } 9331 void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) { 9332 Vrshl(al, dt, rd, rm, rn); 9333 } 9334 9335 void Vrshr(Condition cond, 9336 DataType dt, 9337 DRegister rd, 9338 DRegister rm, 9339 const DOperand& operand) { 9340 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9341 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9342 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9343 VIXL_ASSERT(allow_macro_instructions_); 9344 VIXL_ASSERT(OutsideITBlock()); 9345 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9346 ITScope it_scope(this, &cond); 9347 vrshr(cond, dt, rd, rm, operand); 9348 } 9349 void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9350 Vrshr(al, dt, rd, rm, operand); 9351 } 9352 9353 void Vrshr(Condition cond, 9354 DataType dt, 9355 QRegister rd, 9356 QRegister rm, 9357 const QOperand& operand) { 9358 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9359 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9360 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9361 VIXL_ASSERT(allow_macro_instructions_); 9362 VIXL_ASSERT(OutsideITBlock()); 9363 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9364 ITScope it_scope(this, &cond); 9365 vrshr(cond, dt, rd, rm, operand); 9366 } 9367 void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9368 Vrshr(al, dt, rd, rm, operand); 9369 } 9370 9371 void Vrshrn(Condition cond, 9372 DataType dt, 9373 DRegister rd, 9374 QRegister rm, 9375 const QOperand& operand) { 9376 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9377 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9378 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9379 VIXL_ASSERT(allow_macro_instructions_); 9380 VIXL_ASSERT(OutsideITBlock()); 9381 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9382 ITScope it_scope(this, &cond); 9383 vrshrn(cond, dt, rd, rm, operand); 9384 } 9385 void Vrshrn(DataType dt, 9386 DRegister rd, 9387 QRegister rm, 9388 const QOperand& operand) { 9389 Vrshrn(al, dt, rd, rm, operand); 9390 } 9391 9392 void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9393 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9394 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9395 VIXL_ASSERT(allow_macro_instructions_); 9396 VIXL_ASSERT(OutsideITBlock()); 9397 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9398 ITScope it_scope(this, &cond); 9399 vrsqrte(cond, dt, rd, rm); 9400 } 9401 void Vrsqrte(DataType dt, DRegister rd, DRegister rm) { 9402 Vrsqrte(al, dt, rd, rm); 9403 } 9404 9405 void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) { 9406 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9407 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9408 VIXL_ASSERT(allow_macro_instructions_); 9409 VIXL_ASSERT(OutsideITBlock()); 9410 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9411 ITScope it_scope(this, &cond); 9412 vrsqrte(cond, dt, rd, rm); 9413 } 9414 void Vrsqrte(DataType dt, QRegister rd, QRegister rm) { 9415 Vrsqrte(al, dt, rd, rm); 9416 } 9417 9418 void Vrsqrts( 9419 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9420 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9421 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9422 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9423 VIXL_ASSERT(allow_macro_instructions_); 9424 VIXL_ASSERT(OutsideITBlock()); 9425 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9426 ITScope it_scope(this, &cond); 9427 vrsqrts(cond, dt, rd, rn, rm); 9428 } 9429 void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9430 Vrsqrts(al, dt, rd, rn, rm); 9431 } 9432 9433 void Vrsqrts( 9434 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9435 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9436 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9437 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9438 VIXL_ASSERT(allow_macro_instructions_); 9439 VIXL_ASSERT(OutsideITBlock()); 9440 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9441 ITScope it_scope(this, &cond); 9442 vrsqrts(cond, dt, rd, rn, rm); 9443 } 9444 void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 9445 Vrsqrts(al, dt, rd, rn, rm); 9446 } 9447 9448 void Vrsra(Condition cond, 9449 DataType dt, 9450 DRegister rd, 9451 DRegister rm, 9452 const DOperand& operand) { 9453 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9454 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9455 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9456 VIXL_ASSERT(allow_macro_instructions_); 9457 VIXL_ASSERT(OutsideITBlock()); 9458 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9459 ITScope it_scope(this, &cond); 9460 vrsra(cond, dt, rd, rm, operand); 9461 } 9462 void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9463 Vrsra(al, dt, rd, rm, operand); 9464 } 9465 9466 void Vrsra(Condition cond, 9467 DataType dt, 9468 QRegister rd, 9469 QRegister rm, 9470 const QOperand& operand) { 9471 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9472 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9473 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9474 VIXL_ASSERT(allow_macro_instructions_); 9475 VIXL_ASSERT(OutsideITBlock()); 9476 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9477 ITScope it_scope(this, &cond); 9478 vrsra(cond, dt, rd, rm, operand); 9479 } 9480 void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9481 Vrsra(al, dt, rd, rm, operand); 9482 } 9483 9484 void Vrsubhn( 9485 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 9486 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9487 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9488 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9489 VIXL_ASSERT(allow_macro_instructions_); 9490 VIXL_ASSERT(OutsideITBlock()); 9491 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9492 ITScope it_scope(this, &cond); 9493 vrsubhn(cond, dt, rd, rn, rm); 9494 } 9495 void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 9496 Vrsubhn(al, dt, rd, rn, rm); 9497 } 9498 9499 void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9500 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9501 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9502 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9503 VIXL_ASSERT(allow_macro_instructions_); 9504 VIXL_ASSERT(OutsideITBlock()); 9505 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9506 vseleq(dt, rd, rn, rm); 9507 } 9508 9509 void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9510 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9511 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9512 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9513 VIXL_ASSERT(allow_macro_instructions_); 9514 VIXL_ASSERT(OutsideITBlock()); 9515 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9516 vseleq(dt, rd, rn, rm); 9517 } 9518 9519 void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9520 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9521 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9522 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9523 VIXL_ASSERT(allow_macro_instructions_); 9524 VIXL_ASSERT(OutsideITBlock()); 9525 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9526 vselge(dt, rd, rn, rm); 9527 } 9528 9529 void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9530 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9531 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9532 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9533 VIXL_ASSERT(allow_macro_instructions_); 9534 VIXL_ASSERT(OutsideITBlock()); 9535 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9536 vselge(dt, rd, rn, rm); 9537 } 9538 9539 void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9540 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9541 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9542 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9543 VIXL_ASSERT(allow_macro_instructions_); 9544 VIXL_ASSERT(OutsideITBlock()); 9545 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9546 vselgt(dt, rd, rn, rm); 9547 } 9548 9549 void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9550 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9551 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9552 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9553 VIXL_ASSERT(allow_macro_instructions_); 9554 VIXL_ASSERT(OutsideITBlock()); 9555 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9556 vselgt(dt, rd, rn, rm); 9557 } 9558 9559 void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 9560 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9561 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9562 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9563 VIXL_ASSERT(allow_macro_instructions_); 9564 VIXL_ASSERT(OutsideITBlock()); 9565 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9566 vselvs(dt, rd, rn, rm); 9567 } 9568 9569 void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 9570 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9571 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9572 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9573 VIXL_ASSERT(allow_macro_instructions_); 9574 VIXL_ASSERT(OutsideITBlock()); 9575 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9576 vselvs(dt, rd, rn, rm); 9577 } 9578 9579 void Vshl(Condition cond, 9580 DataType dt, 9581 DRegister rd, 9582 DRegister rm, 9583 const DOperand& operand) { 9584 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9585 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9586 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9587 VIXL_ASSERT(allow_macro_instructions_); 9588 VIXL_ASSERT(OutsideITBlock()); 9589 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9590 ITScope it_scope(this, &cond); 9591 vshl(cond, dt, rd, rm, operand); 9592 } 9593 void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9594 Vshl(al, dt, rd, rm, operand); 9595 } 9596 9597 void Vshl(Condition cond, 9598 DataType dt, 9599 QRegister rd, 9600 QRegister rm, 9601 const QOperand& operand) { 9602 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9603 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9604 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9605 VIXL_ASSERT(allow_macro_instructions_); 9606 VIXL_ASSERT(OutsideITBlock()); 9607 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9608 ITScope it_scope(this, &cond); 9609 vshl(cond, dt, rd, rm, operand); 9610 } 9611 void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9612 Vshl(al, dt, rd, rm, operand); 9613 } 9614 9615 void Vshll(Condition cond, 9616 DataType dt, 9617 QRegister rd, 9618 DRegister rm, 9619 const DOperand& operand) { 9620 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9621 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9622 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9623 VIXL_ASSERT(allow_macro_instructions_); 9624 VIXL_ASSERT(OutsideITBlock()); 9625 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9626 ITScope it_scope(this, &cond); 9627 vshll(cond, dt, rd, rm, operand); 9628 } 9629 void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) { 9630 Vshll(al, dt, rd, rm, operand); 9631 } 9632 9633 void Vshr(Condition cond, 9634 DataType dt, 9635 DRegister rd, 9636 DRegister rm, 9637 const DOperand& operand) { 9638 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9639 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9640 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9641 VIXL_ASSERT(allow_macro_instructions_); 9642 VIXL_ASSERT(OutsideITBlock()); 9643 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9644 ITScope it_scope(this, &cond); 9645 vshr(cond, dt, rd, rm, operand); 9646 } 9647 void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9648 Vshr(al, dt, rd, rm, operand); 9649 } 9650 9651 void Vshr(Condition cond, 9652 DataType dt, 9653 QRegister rd, 9654 QRegister rm, 9655 const QOperand& operand) { 9656 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9657 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9658 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9659 VIXL_ASSERT(allow_macro_instructions_); 9660 VIXL_ASSERT(OutsideITBlock()); 9661 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9662 ITScope it_scope(this, &cond); 9663 vshr(cond, dt, rd, rm, operand); 9664 } 9665 void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9666 Vshr(al, dt, rd, rm, operand); 9667 } 9668 9669 void Vshrn(Condition cond, 9670 DataType dt, 9671 DRegister rd, 9672 QRegister rm, 9673 const QOperand& operand) { 9674 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9675 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9676 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9677 VIXL_ASSERT(allow_macro_instructions_); 9678 VIXL_ASSERT(OutsideITBlock()); 9679 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9680 ITScope it_scope(this, &cond); 9681 vshrn(cond, dt, rd, rm, operand); 9682 } 9683 void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) { 9684 Vshrn(al, dt, rd, rm, operand); 9685 } 9686 9687 void Vsli(Condition cond, 9688 DataType dt, 9689 DRegister rd, 9690 DRegister rm, 9691 const DOperand& operand) { 9692 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9693 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9694 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9695 VIXL_ASSERT(allow_macro_instructions_); 9696 VIXL_ASSERT(OutsideITBlock()); 9697 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9698 ITScope it_scope(this, &cond); 9699 vsli(cond, dt, rd, rm, operand); 9700 } 9701 void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9702 Vsli(al, dt, rd, rm, operand); 9703 } 9704 9705 void Vsli(Condition cond, 9706 DataType dt, 9707 QRegister rd, 9708 QRegister rm, 9709 const QOperand& operand) { 9710 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9711 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9712 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9713 VIXL_ASSERT(allow_macro_instructions_); 9714 VIXL_ASSERT(OutsideITBlock()); 9715 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9716 ITScope it_scope(this, &cond); 9717 vsli(cond, dt, rd, rm, operand); 9718 } 9719 void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9720 Vsli(al, dt, rd, rm, operand); 9721 } 9722 9723 void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) { 9724 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9725 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9726 VIXL_ASSERT(allow_macro_instructions_); 9727 VIXL_ASSERT(OutsideITBlock()); 9728 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9729 ITScope it_scope(this, &cond); 9730 vsqrt(cond, dt, rd, rm); 9731 } 9732 void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); } 9733 9734 void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) { 9735 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9736 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9737 VIXL_ASSERT(allow_macro_instructions_); 9738 VIXL_ASSERT(OutsideITBlock()); 9739 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9740 ITScope it_scope(this, &cond); 9741 vsqrt(cond, dt, rd, rm); 9742 } 9743 void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); } 9744 9745 void Vsra(Condition cond, 9746 DataType dt, 9747 DRegister rd, 9748 DRegister rm, 9749 const DOperand& operand) { 9750 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9751 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9752 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9753 VIXL_ASSERT(allow_macro_instructions_); 9754 VIXL_ASSERT(OutsideITBlock()); 9755 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9756 ITScope it_scope(this, &cond); 9757 vsra(cond, dt, rd, rm, operand); 9758 } 9759 void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9760 Vsra(al, dt, rd, rm, operand); 9761 } 9762 9763 void Vsra(Condition cond, 9764 DataType dt, 9765 QRegister rd, 9766 QRegister rm, 9767 const QOperand& operand) { 9768 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9769 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9770 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9771 VIXL_ASSERT(allow_macro_instructions_); 9772 VIXL_ASSERT(OutsideITBlock()); 9773 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9774 ITScope it_scope(this, &cond); 9775 vsra(cond, dt, rd, rm, operand); 9776 } 9777 void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9778 Vsra(al, dt, rd, rm, operand); 9779 } 9780 9781 void Vsri(Condition cond, 9782 DataType dt, 9783 DRegister rd, 9784 DRegister rm, 9785 const DOperand& operand) { 9786 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9787 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9788 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9789 VIXL_ASSERT(allow_macro_instructions_); 9790 VIXL_ASSERT(OutsideITBlock()); 9791 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9792 ITScope it_scope(this, &cond); 9793 vsri(cond, dt, rd, rm, operand); 9794 } 9795 void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { 9796 Vsri(al, dt, rd, rm, operand); 9797 } 9798 9799 void Vsri(Condition cond, 9800 DataType dt, 9801 QRegister rd, 9802 QRegister rm, 9803 const QOperand& operand) { 9804 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 9805 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 9806 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9807 VIXL_ASSERT(allow_macro_instructions_); 9808 VIXL_ASSERT(OutsideITBlock()); 9809 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9810 ITScope it_scope(this, &cond); 9811 vsri(cond, dt, rd, rm, operand); 9812 } 9813 void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { 9814 Vsri(al, dt, rd, rm, operand); 9815 } 9816 9817 void Vst1(Condition cond, 9818 DataType dt, 9819 const NeonRegisterList& nreglist, 9820 const AlignedMemOperand& operand) { 9821 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 9822 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9823 VIXL_ASSERT(allow_macro_instructions_); 9824 VIXL_ASSERT(OutsideITBlock()); 9825 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9826 ITScope it_scope(this, &cond); 9827 vst1(cond, dt, nreglist, operand); 9828 } 9829 void Vst1(DataType dt, 9830 const NeonRegisterList& nreglist, 9831 const AlignedMemOperand& operand) { 9832 Vst1(al, dt, nreglist, operand); 9833 } 9834 9835 void Vst2(Condition cond, 9836 DataType dt, 9837 const NeonRegisterList& nreglist, 9838 const AlignedMemOperand& operand) { 9839 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 9840 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9841 VIXL_ASSERT(allow_macro_instructions_); 9842 VIXL_ASSERT(OutsideITBlock()); 9843 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9844 ITScope it_scope(this, &cond); 9845 vst2(cond, dt, nreglist, operand); 9846 } 9847 void Vst2(DataType dt, 9848 const NeonRegisterList& nreglist, 9849 const AlignedMemOperand& operand) { 9850 Vst2(al, dt, nreglist, operand); 9851 } 9852 9853 void Vst3(Condition cond, 9854 DataType dt, 9855 const NeonRegisterList& nreglist, 9856 const AlignedMemOperand& operand) { 9857 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 9858 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9859 VIXL_ASSERT(allow_macro_instructions_); 9860 VIXL_ASSERT(OutsideITBlock()); 9861 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9862 ITScope it_scope(this, &cond); 9863 vst3(cond, dt, nreglist, operand); 9864 } 9865 void Vst3(DataType dt, 9866 const NeonRegisterList& nreglist, 9867 const AlignedMemOperand& operand) { 9868 Vst3(al, dt, nreglist, operand); 9869 } 9870 9871 void Vst3(Condition cond, 9872 DataType dt, 9873 const NeonRegisterList& nreglist, 9874 const MemOperand& operand) { 9875 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 9876 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9877 VIXL_ASSERT(allow_macro_instructions_); 9878 VIXL_ASSERT(OutsideITBlock()); 9879 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9880 ITScope it_scope(this, &cond); 9881 vst3(cond, dt, nreglist, operand); 9882 } 9883 void Vst3(DataType dt, 9884 const NeonRegisterList& nreglist, 9885 const MemOperand& operand) { 9886 Vst3(al, dt, nreglist, operand); 9887 } 9888 9889 void Vst4(Condition cond, 9890 DataType dt, 9891 const NeonRegisterList& nreglist, 9892 const AlignedMemOperand& operand) { 9893 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 9894 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 9895 VIXL_ASSERT(allow_macro_instructions_); 9896 VIXL_ASSERT(OutsideITBlock()); 9897 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9898 ITScope it_scope(this, &cond); 9899 vst4(cond, dt, nreglist, operand); 9900 } 9901 void Vst4(DataType dt, 9902 const NeonRegisterList& nreglist, 9903 const AlignedMemOperand& operand) { 9904 Vst4(al, dt, nreglist, operand); 9905 } 9906 9907 void Vstm(Condition cond, 9908 DataType dt, 9909 Register rn, 9910 WriteBack write_back, 9911 DRegisterList dreglist) { 9912 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9913 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 9914 VIXL_ASSERT(allow_macro_instructions_); 9915 VIXL_ASSERT(OutsideITBlock()); 9916 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9917 ITScope it_scope(this, &cond); 9918 vstm(cond, dt, rn, write_back, dreglist); 9919 } 9920 void Vstm(DataType dt, 9921 Register rn, 9922 WriteBack write_back, 9923 DRegisterList dreglist) { 9924 Vstm(al, dt, rn, write_back, dreglist); 9925 } 9926 void Vstm(Condition cond, 9927 Register rn, 9928 WriteBack write_back, 9929 DRegisterList dreglist) { 9930 Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist); 9931 } 9932 void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) { 9933 Vstm(al, kDataTypeValueNone, rn, write_back, dreglist); 9934 } 9935 9936 void Vstm(Condition cond, 9937 DataType dt, 9938 Register rn, 9939 WriteBack write_back, 9940 SRegisterList sreglist) { 9941 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9942 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 9943 VIXL_ASSERT(allow_macro_instructions_); 9944 VIXL_ASSERT(OutsideITBlock()); 9945 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9946 ITScope it_scope(this, &cond); 9947 vstm(cond, dt, rn, write_back, sreglist); 9948 } 9949 void Vstm(DataType dt, 9950 Register rn, 9951 WriteBack write_back, 9952 SRegisterList sreglist) { 9953 Vstm(al, dt, rn, write_back, sreglist); 9954 } 9955 void Vstm(Condition cond, 9956 Register rn, 9957 WriteBack write_back, 9958 SRegisterList sreglist) { 9959 Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist); 9960 } 9961 void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) { 9962 Vstm(al, kDataTypeValueNone, rn, write_back, sreglist); 9963 } 9964 9965 void Vstmdb(Condition cond, 9966 DataType dt, 9967 Register rn, 9968 WriteBack write_back, 9969 DRegisterList dreglist) { 9970 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 9971 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 9972 VIXL_ASSERT(allow_macro_instructions_); 9973 VIXL_ASSERT(OutsideITBlock()); 9974 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 9975 ITScope it_scope(this, &cond); 9976 vstmdb(cond, dt, rn, write_back, dreglist); 9977 } 9978 void Vstmdb(DataType dt, 9979 Register rn, 9980 WriteBack write_back, 9981 DRegisterList dreglist) { 9982 Vstmdb(al, dt, rn, write_back, dreglist); 9983 } 9984 void Vstmdb(Condition cond, 9985 Register rn, 9986 WriteBack write_back, 9987 DRegisterList dreglist) { 9988 Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist); 9989 } 9990 void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) { 9991 Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist); 9992 } 9993 9994 void Vstmdb(Condition cond, 9995 DataType dt, 9996 Register rn, 9997 WriteBack write_back, 9998 SRegisterList sreglist) { 9999 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10000 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 10001 VIXL_ASSERT(allow_macro_instructions_); 10002 VIXL_ASSERT(OutsideITBlock()); 10003 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10004 ITScope it_scope(this, &cond); 10005 vstmdb(cond, dt, rn, write_back, sreglist); 10006 } 10007 void Vstmdb(DataType dt, 10008 Register rn, 10009 WriteBack write_back, 10010 SRegisterList sreglist) { 10011 Vstmdb(al, dt, rn, write_back, sreglist); 10012 } 10013 void Vstmdb(Condition cond, 10014 Register rn, 10015 WriteBack write_back, 10016 SRegisterList sreglist) { 10017 Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist); 10018 } 10019 void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) { 10020 Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist); 10021 } 10022 10023 void Vstmia(Condition cond, 10024 DataType dt, 10025 Register rn, 10026 WriteBack write_back, 10027 DRegisterList dreglist) { 10028 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10029 VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist)); 10030 VIXL_ASSERT(allow_macro_instructions_); 10031 VIXL_ASSERT(OutsideITBlock()); 10032 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10033 ITScope it_scope(this, &cond); 10034 vstmia(cond, dt, rn, write_back, dreglist); 10035 } 10036 void Vstmia(DataType dt, 10037 Register rn, 10038 WriteBack write_back, 10039 DRegisterList dreglist) { 10040 Vstmia(al, dt, rn, write_back, dreglist); 10041 } 10042 void Vstmia(Condition cond, 10043 Register rn, 10044 WriteBack write_back, 10045 DRegisterList dreglist) { 10046 Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist); 10047 } 10048 void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) { 10049 Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist); 10050 } 10051 10052 void Vstmia(Condition cond, 10053 DataType dt, 10054 Register rn, 10055 WriteBack write_back, 10056 SRegisterList sreglist) { 10057 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10058 VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist)); 10059 VIXL_ASSERT(allow_macro_instructions_); 10060 VIXL_ASSERT(OutsideITBlock()); 10061 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10062 ITScope it_scope(this, &cond); 10063 vstmia(cond, dt, rn, write_back, sreglist); 10064 } 10065 void Vstmia(DataType dt, 10066 Register rn, 10067 WriteBack write_back, 10068 SRegisterList sreglist) { 10069 Vstmia(al, dt, rn, write_back, sreglist); 10070 } 10071 void Vstmia(Condition cond, 10072 Register rn, 10073 WriteBack write_back, 10074 SRegisterList sreglist) { 10075 Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist); 10076 } 10077 void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) { 10078 Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist); 10079 } 10080 10081 void Vstr(Condition cond, 10082 DataType dt, 10083 DRegister rd, 10084 const MemOperand& operand) { 10085 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10086 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10087 VIXL_ASSERT(allow_macro_instructions_); 10088 VIXL_ASSERT(OutsideITBlock()); 10089 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10090 ITScope it_scope(this, &cond); 10091 vstr(cond, dt, rd, operand); 10092 } 10093 void Vstr(DataType dt, DRegister rd, const MemOperand& operand) { 10094 Vstr(al, dt, rd, operand); 10095 } 10096 void Vstr(Condition cond, DRegister rd, const MemOperand& operand) { 10097 Vstr(cond, Untyped64, rd, operand); 10098 } 10099 void Vstr(DRegister rd, const MemOperand& operand) { 10100 Vstr(al, Untyped64, rd, operand); 10101 } 10102 10103 void Vstr(Condition cond, 10104 DataType dt, 10105 SRegister rd, 10106 const MemOperand& operand) { 10107 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10108 VIXL_ASSERT(!AliasesAvailableScratchRegister(operand)); 10109 VIXL_ASSERT(allow_macro_instructions_); 10110 VIXL_ASSERT(OutsideITBlock()); 10111 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10112 ITScope it_scope(this, &cond); 10113 vstr(cond, dt, rd, operand); 10114 } 10115 void Vstr(DataType dt, SRegister rd, const MemOperand& operand) { 10116 Vstr(al, dt, rd, operand); 10117 } 10118 void Vstr(Condition cond, SRegister rd, const MemOperand& operand) { 10119 Vstr(cond, Untyped32, rd, operand); 10120 } 10121 void Vstr(SRegister rd, const MemOperand& operand) { 10122 Vstr(al, Untyped32, rd, operand); 10123 } 10124 10125 void Vsub( 10126 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10127 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10128 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10129 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10130 VIXL_ASSERT(allow_macro_instructions_); 10131 VIXL_ASSERT(OutsideITBlock()); 10132 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10133 ITScope it_scope(this, &cond); 10134 vsub(cond, dt, rd, rn, rm); 10135 } 10136 void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10137 Vsub(al, dt, rd, rn, rm); 10138 } 10139 10140 void Vsub( 10141 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10142 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10143 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10144 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10145 VIXL_ASSERT(allow_macro_instructions_); 10146 VIXL_ASSERT(OutsideITBlock()); 10147 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10148 ITScope it_scope(this, &cond); 10149 vsub(cond, dt, rd, rn, rm); 10150 } 10151 void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10152 Vsub(al, dt, rd, rn, rm); 10153 } 10154 10155 void Vsub( 10156 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) { 10157 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10158 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10159 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10160 VIXL_ASSERT(allow_macro_instructions_); 10161 VIXL_ASSERT(OutsideITBlock()); 10162 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10163 ITScope it_scope(this, &cond); 10164 vsub(cond, dt, rd, rn, rm); 10165 } 10166 void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) { 10167 Vsub(al, dt, rd, rn, rm); 10168 } 10169 10170 void Vsubhn( 10171 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) { 10172 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10173 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10174 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10175 VIXL_ASSERT(allow_macro_instructions_); 10176 VIXL_ASSERT(OutsideITBlock()); 10177 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10178 ITScope it_scope(this, &cond); 10179 vsubhn(cond, dt, rd, rn, rm); 10180 } 10181 void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { 10182 Vsubhn(al, dt, rd, rn, rm); 10183 } 10184 10185 void Vsubl( 10186 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { 10187 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10188 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10189 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10190 VIXL_ASSERT(allow_macro_instructions_); 10191 VIXL_ASSERT(OutsideITBlock()); 10192 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10193 ITScope it_scope(this, &cond); 10194 vsubl(cond, dt, rd, rn, rm); 10195 } 10196 void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) { 10197 Vsubl(al, dt, rd, rn, rm); 10198 } 10199 10200 void Vsubw( 10201 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) { 10202 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10203 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10204 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10205 VIXL_ASSERT(allow_macro_instructions_); 10206 VIXL_ASSERT(OutsideITBlock()); 10207 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10208 ITScope it_scope(this, &cond); 10209 vsubw(cond, dt, rd, rn, rm); 10210 } 10211 void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) { 10212 Vsubw(al, dt, rd, rn, rm); 10213 } 10214 10215 void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10216 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10217 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10218 VIXL_ASSERT(allow_macro_instructions_); 10219 VIXL_ASSERT(OutsideITBlock()); 10220 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10221 ITScope it_scope(this, &cond); 10222 vswp(cond, dt, rd, rm); 10223 } 10224 void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); } 10225 void Vswp(Condition cond, DRegister rd, DRegister rm) { 10226 Vswp(cond, kDataTypeValueNone, rd, rm); 10227 } 10228 void Vswp(DRegister rd, DRegister rm) { 10229 Vswp(al, kDataTypeValueNone, rd, rm); 10230 } 10231 10232 void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10233 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10234 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10235 VIXL_ASSERT(allow_macro_instructions_); 10236 VIXL_ASSERT(OutsideITBlock()); 10237 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10238 ITScope it_scope(this, &cond); 10239 vswp(cond, dt, rd, rm); 10240 } 10241 void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); } 10242 void Vswp(Condition cond, QRegister rd, QRegister rm) { 10243 Vswp(cond, kDataTypeValueNone, rd, rm); 10244 } 10245 void Vswp(QRegister rd, QRegister rm) { 10246 Vswp(al, kDataTypeValueNone, rd, rm); 10247 } 10248 10249 void Vtbl(Condition cond, 10250 DataType dt, 10251 DRegister rd, 10252 const NeonRegisterList& nreglist, 10253 DRegister rm) { 10254 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10255 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10256 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10257 VIXL_ASSERT(allow_macro_instructions_); 10258 VIXL_ASSERT(OutsideITBlock()); 10259 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10260 ITScope it_scope(this, &cond); 10261 vtbl(cond, dt, rd, nreglist, rm); 10262 } 10263 void Vtbl(DataType dt, 10264 DRegister rd, 10265 const NeonRegisterList& nreglist, 10266 DRegister rm) { 10267 Vtbl(al, dt, rd, nreglist, rm); 10268 } 10269 10270 void Vtbx(Condition cond, 10271 DataType dt, 10272 DRegister rd, 10273 const NeonRegisterList& nreglist, 10274 DRegister rm) { 10275 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10276 VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist)); 10277 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10278 VIXL_ASSERT(allow_macro_instructions_); 10279 VIXL_ASSERT(OutsideITBlock()); 10280 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10281 ITScope it_scope(this, &cond); 10282 vtbx(cond, dt, rd, nreglist, rm); 10283 } 10284 void Vtbx(DataType dt, 10285 DRegister rd, 10286 const NeonRegisterList& nreglist, 10287 DRegister rm) { 10288 Vtbx(al, dt, rd, nreglist, rm); 10289 } 10290 10291 void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10292 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10293 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10294 VIXL_ASSERT(allow_macro_instructions_); 10295 VIXL_ASSERT(OutsideITBlock()); 10296 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10297 ITScope it_scope(this, &cond); 10298 vtrn(cond, dt, rd, rm); 10299 } 10300 void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); } 10301 10302 void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10303 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10304 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10305 VIXL_ASSERT(allow_macro_instructions_); 10306 VIXL_ASSERT(OutsideITBlock()); 10307 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10308 ITScope it_scope(this, &cond); 10309 vtrn(cond, dt, rd, rm); 10310 } 10311 void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); } 10312 10313 void Vtst( 10314 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10315 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10316 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10317 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10318 VIXL_ASSERT(allow_macro_instructions_); 10319 VIXL_ASSERT(OutsideITBlock()); 10320 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10321 ITScope it_scope(this, &cond); 10322 vtst(cond, dt, rd, rn, rm); 10323 } 10324 void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) { 10325 Vtst(al, dt, rd, rn, rm); 10326 } 10327 10328 void Vtst( 10329 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10330 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10331 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn)); 10332 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10333 VIXL_ASSERT(allow_macro_instructions_); 10334 VIXL_ASSERT(OutsideITBlock()); 10335 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10336 ITScope it_scope(this, &cond); 10337 vtst(cond, dt, rd, rn, rm); 10338 } 10339 void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) { 10340 Vtst(al, dt, rd, rn, rm); 10341 } 10342 10343 void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10344 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10345 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10346 VIXL_ASSERT(allow_macro_instructions_); 10347 VIXL_ASSERT(OutsideITBlock()); 10348 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10349 ITScope it_scope(this, &cond); 10350 vuzp(cond, dt, rd, rm); 10351 } 10352 void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); } 10353 10354 void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10355 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10356 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10357 VIXL_ASSERT(allow_macro_instructions_); 10358 VIXL_ASSERT(OutsideITBlock()); 10359 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10360 ITScope it_scope(this, &cond); 10361 vuzp(cond, dt, rd, rm); 10362 } 10363 void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); } 10364 10365 void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) { 10366 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10367 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10368 VIXL_ASSERT(allow_macro_instructions_); 10369 VIXL_ASSERT(OutsideITBlock()); 10370 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10371 ITScope it_scope(this, &cond); 10372 vzip(cond, dt, rd, rm); 10373 } 10374 void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); } 10375 10376 void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) { 10377 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); 10378 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); 10379 VIXL_ASSERT(allow_macro_instructions_); 10380 VIXL_ASSERT(OutsideITBlock()); 10381 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10382 ITScope it_scope(this, &cond); 10383 vzip(cond, dt, rd, rm); 10384 } 10385 void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); } 10386 10387 void Yield(Condition cond) { 10388 VIXL_ASSERT(allow_macro_instructions_); 10389 VIXL_ASSERT(OutsideITBlock()); 10390 AllowAssemblerEmissionScope allow_scope(this, kMaxInstructionSizeInBytes); 10391 ITScope it_scope(this, &cond); 10392 yield(cond); 10393 } 10394 void Yield() { Yield(al); } 10395 void Vabs(Condition cond, VRegister rd, VRegister rm) { 10396 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10397 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10398 if (rd.IsS()) { 10399 Vabs(cond, F32, rd.S(), rm.S()); 10400 } else { 10401 Vabs(cond, F64, rd.D(), rm.D()); 10402 } 10403 } 10404 void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); } 10405 void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10406 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10407 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10408 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10409 if (rd.IsS()) { 10410 Vadd(cond, F32, rd.S(), rn.S(), rm.S()); 10411 } else { 10412 Vadd(cond, F64, rd.D(), rn.D(), rm.D()); 10413 } 10414 } 10415 void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); } 10416 void Vcmp(Condition cond, VRegister rd, VRegister rm) { 10417 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10418 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10419 if (rd.IsS()) { 10420 Vcmp(cond, F32, rd.S(), rm.S()); 10421 } else { 10422 Vcmp(cond, F64, rd.D(), rm.D()); 10423 } 10424 } 10425 void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); } 10426 void Vcmpe(Condition cond, VRegister rd, VRegister rm) { 10427 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10428 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10429 if (rd.IsS()) { 10430 Vcmpe(cond, F32, rd.S(), rm.S()); 10431 } else { 10432 Vcmpe(cond, F64, rd.D(), rm.D()); 10433 } 10434 } 10435 void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); } 10436 void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10437 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10438 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10439 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10440 if (rd.IsS()) { 10441 Vdiv(cond, F32, rd.S(), rn.S(), rm.S()); 10442 } else { 10443 Vdiv(cond, F64, rd.D(), rn.D(), rm.D()); 10444 } 10445 } 10446 void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); } 10447 void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10448 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10449 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10450 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10451 if (rd.IsS()) { 10452 Vfma(cond, F32, rd.S(), rn.S(), rm.S()); 10453 } else { 10454 Vfma(cond, F64, rd.D(), rn.D(), rm.D()); 10455 } 10456 } 10457 void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); } 10458 void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10459 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10460 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10461 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10462 if (rd.IsS()) { 10463 Vfms(cond, F32, rd.S(), rn.S(), rm.S()); 10464 } else { 10465 Vfms(cond, F64, rd.D(), rn.D(), rm.D()); 10466 } 10467 } 10468 void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); } 10469 void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10470 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10471 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10472 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10473 if (rd.IsS()) { 10474 Vfnma(cond, F32, rd.S(), rn.S(), rm.S()); 10475 } else { 10476 Vfnma(cond, F64, rd.D(), rn.D(), rm.D()); 10477 } 10478 } 10479 void Vfnma(VRegister rd, VRegister rn, VRegister rm) { 10480 Vfnma(al, rd, rn, rm); 10481 } 10482 void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10483 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10484 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10485 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10486 if (rd.IsS()) { 10487 Vfnms(cond, F32, rd.S(), rn.S(), rm.S()); 10488 } else { 10489 Vfnms(cond, F64, rd.D(), rn.D(), rm.D()); 10490 } 10491 } 10492 void Vfnms(VRegister rd, VRegister rn, VRegister rm) { 10493 Vfnms(al, rd, rn, rm); 10494 } 10495 void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) { 10496 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10497 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10498 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10499 if (rd.IsS()) { 10500 Vmaxnm(F32, rd.S(), rn.S(), rm.S()); 10501 } else { 10502 Vmaxnm(F64, rd.D(), rn.D(), rm.D()); 10503 } 10504 } 10505 void Vminnm(VRegister rd, VRegister rn, VRegister rm) { 10506 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10507 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10508 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10509 if (rd.IsS()) { 10510 Vminnm(F32, rd.S(), rn.S(), rm.S()); 10511 } else { 10512 Vminnm(F64, rd.D(), rn.D(), rm.D()); 10513 } 10514 } 10515 void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10516 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10517 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10518 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10519 if (rd.IsS()) { 10520 Vmla(cond, F32, rd.S(), rn.S(), rm.S()); 10521 } else { 10522 Vmla(cond, F64, rd.D(), rn.D(), rm.D()); 10523 } 10524 } 10525 void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); } 10526 void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10527 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10528 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10529 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10530 if (rd.IsS()) { 10531 Vmls(cond, F32, rd.S(), rn.S(), rm.S()); 10532 } else { 10533 Vmls(cond, F64, rd.D(), rn.D(), rm.D()); 10534 } 10535 } 10536 void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); } 10537 void Vmov(Condition cond, VRegister rd, VRegister rm) { 10538 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10539 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10540 if (rd.IsS()) { 10541 Vmov(cond, F32, rd.S(), rm.S()); 10542 } else { 10543 Vmov(cond, F64, rd.D(), rm.D()); 10544 } 10545 } 10546 void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); } 10547 void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10548 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10549 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10550 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10551 if (rd.IsS()) { 10552 Vmul(cond, F32, rd.S(), rn.S(), rm.S()); 10553 } else { 10554 Vmul(cond, F64, rd.D(), rn.D(), rm.D()); 10555 } 10556 } 10557 void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); } 10558 void Vneg(Condition cond, VRegister rd, VRegister rm) { 10559 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10560 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10561 if (rd.IsS()) { 10562 Vneg(cond, F32, rd.S(), rm.S()); 10563 } else { 10564 Vneg(cond, F64, rd.D(), rm.D()); 10565 } 10566 } 10567 void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); } 10568 void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10569 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10570 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10571 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10572 if (rd.IsS()) { 10573 Vnmla(cond, F32, rd.S(), rn.S(), rm.S()); 10574 } else { 10575 Vnmla(cond, F64, rd.D(), rn.D(), rm.D()); 10576 } 10577 } 10578 void Vnmla(VRegister rd, VRegister rn, VRegister rm) { 10579 Vnmla(al, rd, rn, rm); 10580 } 10581 void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10582 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10583 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10584 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10585 if (rd.IsS()) { 10586 Vnmls(cond, F32, rd.S(), rn.S(), rm.S()); 10587 } else { 10588 Vnmls(cond, F64, rd.D(), rn.D(), rm.D()); 10589 } 10590 } 10591 void Vnmls(VRegister rd, VRegister rn, VRegister rm) { 10592 Vnmls(al, rd, rn, rm); 10593 } 10594 void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10595 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10596 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10597 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10598 if (rd.IsS()) { 10599 Vnmul(cond, F32, rd.S(), rn.S(), rm.S()); 10600 } else { 10601 Vnmul(cond, F64, rd.D(), rn.D(), rm.D()); 10602 } 10603 } 10604 void Vnmul(VRegister rd, VRegister rn, VRegister rm) { 10605 Vnmul(al, rd, rn, rm); 10606 } 10607 void Vseleq(VRegister rd, VRegister rn, VRegister rm) { 10608 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10609 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10610 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10611 if (rd.IsS()) { 10612 Vseleq(F32, rd.S(), rn.S(), rm.S()); 10613 } else { 10614 Vseleq(F64, rd.D(), rn.D(), rm.D()); 10615 } 10616 } 10617 void Vselge(VRegister rd, VRegister rn, VRegister rm) { 10618 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10619 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10620 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10621 if (rd.IsS()) { 10622 Vselge(F32, rd.S(), rn.S(), rm.S()); 10623 } else { 10624 Vselge(F64, rd.D(), rn.D(), rm.D()); 10625 } 10626 } 10627 void Vselgt(VRegister rd, VRegister rn, VRegister rm) { 10628 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10629 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10630 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10631 if (rd.IsS()) { 10632 Vselgt(F32, rd.S(), rn.S(), rm.S()); 10633 } else { 10634 Vselgt(F64, rd.D(), rn.D(), rm.D()); 10635 } 10636 } 10637 void Vselvs(VRegister rd, VRegister rn, VRegister rm) { 10638 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10639 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10640 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10641 if (rd.IsS()) { 10642 Vselvs(F32, rd.S(), rn.S(), rm.S()); 10643 } else { 10644 Vselvs(F64, rd.D(), rn.D(), rm.D()); 10645 } 10646 } 10647 void Vsqrt(Condition cond, VRegister rd, VRegister rm) { 10648 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10649 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10650 if (rd.IsS()) { 10651 Vsqrt(cond, F32, rd.S(), rm.S()); 10652 } else { 10653 Vsqrt(cond, F64, rd.D(), rm.D()); 10654 } 10655 } 10656 void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); } 10657 void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) { 10658 VIXL_ASSERT(rd.IsS() || rd.IsD()); 10659 VIXL_ASSERT(rd.GetType() == rn.GetType()); 10660 VIXL_ASSERT(rd.GetType() == rm.GetType()); 10661 if (rd.IsS()) { 10662 Vsub(cond, F32, rd.S(), rn.S(), rm.S()); 10663 } else { 10664 Vsub(cond, F64, rd.D(), rn.D(), rm.D()); 10665 } 10666 } 10667 void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); } 10668 // End of generated code. 10669 10670 virtual bool AllowUnpredictable() VIXL_OVERRIDE { 10671 VIXL_ABORT_WITH_MSG("Unpredictable instruction.\n"); 10672 return false; 10673 } 10674 virtual bool AllowStronglyDiscouraged() VIXL_OVERRIDE { 10675 VIXL_ABORT_WITH_MSG( 10676 "ARM strongly recommends to not use this instruction.\n"); 10677 return false; 10678 } 10679 10680 private: 10681 RegisterList available_; 10682 VRegisterList available_vfp_; 10683 MacroAssemblerContext context_; 10684 Label::Offset checkpoint_; 10685 LiteralPoolManager literal_pool_manager_; 10686 VeneerPoolManager veneer_pool_manager_; 10687 bool generate_simulator_code_; 10688 bool allow_macro_instructions_; 10689}; 10690 10691// This scope is used to ensure that the specified size of instructions will be 10692// emitted contiguously. The assert policy kExtactSize should only be used 10693// when you use directly the assembler as it's difficult to know exactly how 10694// many instructions will be emitted by the macro-assembler. Using the assembler 10695// means that you directly use the assembler instructions (in lower case) from a 10696// MacroAssembler object. 10697class CodeBufferCheckScope { 10698 public: 10699 // Tell whether or not the scope should assert the amount of code emitted 10700 // within the scope is consistent with the requested amount. 10701 enum AssertPolicy { 10702 kNoAssert, // No assert required. 10703 kExactSize, // The code emitted must be exactly size bytes. 10704 kMaximumSize // The code emitted must be at most size bytes. 10705 }; 10706 10707 CodeBufferCheckScope(MacroAssembler* masm, 10708 uint32_t size, 10709 AssertPolicy assert_policy = kMaximumSize) 10710 : masm_(masm) { 10711 masm->EnsureEmitFor(size); 10712#ifdef VIXL_DEBUG 10713 initial_cursor_offset_ = masm->GetCursorOffset(); 10714 size_ = size; 10715 assert_policy_ = assert_policy; 10716#else 10717 USE(assert_policy); 10718#endif 10719 } 10720 10721 ~CodeBufferCheckScope() { 10722#ifdef VIXL_DEBUG 10723 switch (assert_policy_) { 10724 case kNoAssert: 10725 break; 10726 case kExactSize: 10727 VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ == size_); 10728 break; 10729 case kMaximumSize: 10730 VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <= size_); 10731 break; 10732 default: 10733 VIXL_UNREACHABLE(); 10734 } 10735#endif 10736 } 10737 10738 protected: 10739 MacroAssembler* masm_; 10740 uint32_t initial_cursor_offset_; 10741 uint32_t size_; 10742 AssertPolicy assert_policy_; 10743}; 10744 10745// Use this scope when you need a one-to-one mapping between methods and 10746// instructions. This scope prevents the MacroAssembler functions from being 10747// called and the literal pools and veneers from being emitted (they can only be 10748// emitted when you create the scope). It also asserts the size of the emitted 10749// instructions is the specified size (or not greater than the specified size). 10750// This scope must be used when you want to directly use the assembler. It will 10751// ensure that the buffer is big enough and that you don't break the pool and 10752// veneer mechanisms. 10753class AssemblerAccurateScope : public CodeBufferCheckScope { 10754 public: 10755 AssemblerAccurateScope(MacroAssembler* masm, 10756 uint32_t size, 10757 AssertPolicy policy = kExactSize) 10758 : CodeBufferCheckScope(masm, size, policy) { 10759 VIXL_ASSERT(policy != kNoAssert); 10760#ifdef VIXL_DEBUG 10761 old_allow_macro_instructions_ = masm->AllowMacroInstructions(); 10762 old_allow_assembler_ = masm->AllowAssembler(); 10763 masm->SetAllowMacroInstructions(false); 10764 masm->SetAllowAssembler(true); 10765#else 10766 USE(old_allow_macro_instructions_); 10767 USE(old_allow_assembler_); 10768#endif 10769 } 10770 10771 ~AssemblerAccurateScope() { 10772#ifdef VIXL_DEBUG 10773 masm_->SetAllowMacroInstructions(old_allow_macro_instructions_); 10774 masm_->SetAllowAssembler(old_allow_assembler_); 10775#endif 10776 } 10777 10778 private: 10779 bool old_allow_macro_instructions_; 10780 bool old_allow_assembler_; 10781}; 10782 10783// This scope utility allows scratch registers to be managed safely. The 10784// MacroAssembler's GetScratchRegisterList() is used as a pool of scratch 10785// registers. These registers can be allocated on demand, and will be returned 10786// at the end of the scope. 10787// 10788// When the scope ends, the MacroAssembler's lists will be restored to their 10789// original state, even if the lists were modified by some other means. 10790class UseScratchRegisterScope { 10791 public: 10792 // This constructor implicitly calls the `Open` function to initialise the 10793 // scope, so it is ready to use immediately after it has been constructed. 10794 explicit UseScratchRegisterScope(MacroAssembler* masm) 10795 : available_(NULL), 10796 available_vfp_(NULL), 10797 old_available_(0), 10798 old_available_vfp_(0) { 10799 Open(masm); 10800 } 10801 // This constructor allows deferred and optional initialisation of the scope. 10802 // The user is required to explicitly call the `Open` function before using 10803 // the scope. 10804 UseScratchRegisterScope() 10805 : available_(NULL), 10806 available_vfp_(NULL), 10807 old_available_(0), 10808 old_available_vfp_(0) {} 10809 10810 // This function performs the actual initialisation work. 10811 void Open(MacroAssembler* masm); 10812 10813 // The destructor always implicitly calls the `Close` function. 10814 ~UseScratchRegisterScope() { Close(); } 10815 10816 // This function performs the cleaning-up work. It must succeed even if the 10817 // scope has not been opened. It is safe to call multiple times. 10818 void Close(); 10819 10820 bool IsAvailable(const Register& reg) const; 10821 bool IsAvailable(const VRegister& reg) const; 10822 10823 // Take a register from the temp list. It will be returned automatically when 10824 // the scope ends. 10825 Register Acquire(); 10826 VRegister AcquireV(unsigned size_in_bits); 10827 QRegister AcquireQ(); 10828 DRegister AcquireD(); 10829 SRegister AcquireS(); 10830 10831 // Explicitly release an acquired (or excluded) register, putting it back in 10832 // the temp list. 10833 void Release(const Register& reg); 10834 void Release(const VRegister& reg); 10835 10836 // Make the specified registers available as scratch registers for the 10837 // duration of this scope. 10838 void Include(const RegisterList& list); 10839 void Include(const Register& reg1, 10840 const Register& reg2 = NoReg, 10841 const Register& reg3 = NoReg, 10842 const Register& reg4 = NoReg) { 10843 Include(RegisterList(reg1, reg2, reg3, reg4)); 10844 } 10845 void Include(const VRegisterList& list); 10846 void Include(const VRegister& reg1, 10847 const VRegister& reg2 = NoVReg, 10848 const VRegister& reg3 = NoVReg, 10849 const VRegister& reg4 = NoVReg) { 10850 Include(VRegisterList(reg1, reg2, reg3, reg4)); 10851 } 10852 10853 // Make sure that the specified registers are not available in this scope. 10854 // This can be used to prevent helper functions from using sensitive 10855 // registers, for example. 10856 void Exclude(const RegisterList& list); 10857 void Exclude(const Register& reg1, 10858 const Register& reg2 = NoReg, 10859 const Register& reg3 = NoReg, 10860 const Register& reg4 = NoReg) { 10861 Exclude(RegisterList(reg1, reg2, reg3, reg4)); 10862 } 10863 void Exclude(const VRegisterList& list); 10864 void Exclude(const VRegister& reg1, 10865 const VRegister& reg2 = NoVReg, 10866 const VRegister& reg3 = NoVReg, 10867 const VRegister& reg4 = NoVReg) { 10868 Exclude(VRegisterList(reg1, reg2, reg3, reg4)); 10869 } 10870 10871 // Prevent any scratch registers from being used in this scope. 10872 void ExcludeAll(); 10873 10874 private: 10875 // Available scratch registers. 10876 RegisterList* available_; // kRRegister 10877 VRegisterList* available_vfp_; // kVRegister 10878 10879 // The state of the available lists at the start of this scope. 10880 uint32_t old_available_; // kRRegister 10881 uint64_t old_available_vfp_; // kVRegister 10882 10883 VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) { 10884 VIXL_UNREACHABLE(); 10885 } 10886 VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) { 10887 VIXL_UNREACHABLE(); 10888 } 10889}; 10890 10891class JumpTableBase { 10892 protected: 10893 JumpTableBase(int len, int offset_size) 10894 : table_location_(Label::kMaxOffset), 10895 branch_location_(Label::kMaxOffset), 10896 length_(len), 10897 offset_shift_(WhichPowerOf2(offset_size)), 10898 presence_(length_) { 10899 VIXL_ASSERT((length_ >= 0) && (offset_size <= 4)); 10900 } 10901 virtual ~JumpTableBase() {} 10902 10903 public: 10904 int GetTableSizeInBytes() const { return length_ * (1 << offset_shift_); } 10905 int GetOffsetShift() const { return offset_shift_; } 10906 int GetLength() const { return length_; } 10907 Label* GetDefaultLabel() { return &default_; } 10908 Label* GetEndLabel() { return &end_; } 10909 void SetBranchLocation(uint32_t branch_location) { 10910 branch_location_ = branch_location; 10911 } 10912 uint32_t GetBranchLocation() const { return branch_location_; } 10913 void BindTable(uint32_t location) { table_location_ = location; } 10914 virtual void Link(MacroAssembler* masm, 10915 int case_index, 10916 uint32_t location) = 0; 10917 10918 uint32_t GetLocationForCase(int i) { 10919 VIXL_ASSERT((i >= 0) && (i < length_)); 10920 return table_location_ + (i * (1 << offset_shift_)); 10921 } 10922 void SetPresenceBitForCase(int i) { 10923 VIXL_ASSERT((i >= 0) && (i < length_)); 10924 presence_.Set(i); 10925 } 10926 10927 void Finalize(MacroAssembler* masm) { 10928 if (!default_.IsBound()) { 10929 masm->Bind(&default_); 10930 } 10931 masm->Bind(&end_); 10932 10933 presence_.ForEachBitNotSet(LinkIt(this, masm, default_.GetLocation())); 10934 } 10935 10936 private: 10937 uint32_t table_location_; 10938 uint32_t branch_location_; 10939 const int length_; 10940 const int offset_shift_; 10941 BitField presence_; 10942 Label default_; 10943 Label end_; 10944 struct LinkIt { 10945 JumpTableBase* table_; 10946 MacroAssembler* const masm_; 10947 const uint32_t location_; 10948 LinkIt(JumpTableBase* table, MacroAssembler* const masm, uint32_t location) 10949 : table_(table), masm_(masm), location_(location) {} 10950 bool execute(int id) const { 10951 VIXL_ASSERT(id < table_->GetLength()); 10952 table_->Link(masm_, static_cast<int>(id), location_); 10953 return true; 10954 } 10955 }; 10956}; 10957 10958// JumpTable<T>(len): Helper to describe a jump table 10959// len here describes the number of possible case. Values in [0, n[ can have a 10960// jump offset. Any other value will assert. 10961template <typename T> 10962class JumpTable : public JumpTableBase { 10963 protected: 10964 explicit JumpTable(int length) : JumpTableBase(length, sizeof(T)) {} 10965 10966 public: 10967 virtual void Link(MacroAssembler* masm, 10968 int case_index, 10969 uint32_t location) VIXL_OVERRIDE { 10970 uint32_t position_in_table = GetLocationForCase(case_index); 10971 uint32_t from = GetBranchLocation(); 10972 int offset = location - from; 10973 T* case_offset = masm->GetBuffer()->GetOffsetAddress<T*>(position_in_table); 10974 if (masm->IsUsingT32()) { 10975 *case_offset = offset >> 1; 10976 } else { 10977 *case_offset = offset >> 2; 10978 } 10979 } 10980}; 10981 10982class JumpTable8bitOffset : public JumpTable<uint8_t> { 10983 public: 10984 explicit JumpTable8bitOffset(int length) : JumpTable<uint8_t>(length) {} 10985}; 10986 10987class JumpTable16bitOffset : public JumpTable<uint16_t> { 10988 public: 10989 explicit JumpTable16bitOffset(int length) : JumpTable<uint16_t>(length) {} 10990}; 10991 10992class JumpTable32bitOffset : public JumpTable<uint32_t> { 10993 public: 10994 explicit JumpTable32bitOffset(int length) : JumpTable<uint32_t>(length) {} 10995}; 10996 10997} // namespace aarch32 10998} // namespace vixl 10999 11000#endif // VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_ 11001