macro-assembler-aarch32.h revision e31fda5ecc961cdb78a0a5311d692ae4b15e5933 
1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7//   * Redistributions of source code must retain the above copyright notice,
8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright
10//     notice, this list of conditions and the following disclaimer in the
11//     documentation and/or other materials provided with the distribution.
12//   * Neither the name of ARM Limited nor the names of its contributors may
13//     be used to endorse or promote products derived from this software
14//     without specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26// POSSIBILITY OF SUCH DAMAGE.
27
28#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
29#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
30
31#include "code-generation-scopes-vixl.h"
32#include "macro-assembler-interface.h"
33#include "utils-vixl.h"
34
35#include "aarch32/instructions-aarch32.h"
36#include "aarch32/assembler-aarch32.h"
37#include "aarch32/operands-aarch32.h"
38
39namespace vixl {
40namespace aarch32 {
41
42class JumpTableBase;
43
44enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 };
45
46// LiteralPool class, defined as a container for literals
47class LiteralPool {
48 public:
49  typedef std::list<RawLiteral*>::iterator RawLiteralListIterator;
50
51 public:
52  LiteralPool() : size_(0) {}
53  ~LiteralPool() {
54    VIXL_ASSERT(literals_.empty() && (size_ == 0));
55    for (RawLiteralListIterator literal_it = keep_until_delete_.begin();
56         literal_it != keep_until_delete_.end();
57         literal_it++) {
58      delete *literal_it;
59    }
60    keep_until_delete_.clear();
61  }
62
63  unsigned GetSize() const { return size_; }
64
65  // Add a literal to the literal container.
66  void AddLiteral(RawLiteral* literal) {
67    // Manually placed literals can't be added to a literal pool.
68    VIXL_ASSERT(!literal->IsManuallyPlaced());
69    VIXL_ASSERT(!literal->IsBound());
70    if (literal->GetPositionInPool() == Label::kMaxOffset) {
71      uint32_t position = GetSize();
72      literal->SetPositionInPool(position);
73      literals_.push_back(literal);
74      size_ += literal->GetAlignedSize();
75    }
76  }
77
78  // First literal to be emitted.
79  RawLiteralListIterator GetFirst() { return literals_.begin(); }
80
81  // Mark the end of the literal container.
82  RawLiteralListIterator GetEnd() { return literals_.end(); }
83
84  // Remove all the literals from the container.
85  // If the literal's memory management has been delegated to the container
86  // it will be delete'd.
87  void Clear() {
88    for (RawLiteralListIterator literal_it = GetFirst(); literal_it != GetEnd();
89         literal_it++) {
90      RawLiteral* literal = *literal_it;
91      switch (literal->GetDeletionPolicy()) {
92        case RawLiteral::kDeletedOnPlacementByPool:
93          delete literal;
94          break;
95        case RawLiteral::kDeletedOnPoolDestruction:
96          keep_until_delete_.push_back(literal);
97          break;
98        case RawLiteral::kManuallyDeleted:
99          break;
100      }
101    }
102    literals_.clear();
103    size_ = 0;
104  }
105
106 private:
107  // Size (in bytes and including alignments) of the literal pool.
108  unsigned size_;
109
110  // Literal container.
111  std::list<RawLiteral*> literals_;
112  // Already bound Literal container the app requested this pool to keep.
113  std::list<RawLiteral*> keep_until_delete_;
114};
115
116
117// Macro assembler for aarch32 instruction set.
118class MacroAssembler : public Assembler, public MacroAssemblerInterface {
119 public:
120  enum EmitOption { kBranchRequired, kNoBranchRequired };
121
122  virtual internal::AssemblerBase* AsAssemblerBase() VIXL_OVERRIDE {
123    return this;
124  }
125
126  virtual void BlockPools() VIXL_OVERRIDE {
127    literal_pool_manager_.Block();
128    veneer_pool_manager_.Block();
129  }
130  virtual void ReleasePools() VIXL_OVERRIDE {
131    literal_pool_manager_.Release();
132    veneer_pool_manager_.Release();
133  }
134  virtual void EnsureEmitPoolsFor(size_t size) VIXL_OVERRIDE {
135    // TODO: Optimise this. It also checks that there is space in the buffer,
136    // which we do not need to do here.
137    VIXL_ASSERT(IsUint32(size));
138    EnsureEmitFor(static_cast<uint32_t>(size));
139  }
140
141 private:
142  class MacroEmissionCheckScope : public EmissionCheckScope {
143   public:
144    explicit MacroEmissionCheckScope(MacroAssemblerInterface* masm)
145        : EmissionCheckScope(masm, kTypicalMacroInstructionMaxSize) {}
146
147   private:
148    static const size_t kTypicalMacroInstructionMaxSize =
149        8 * kMaxInstructionSizeInBytes;
150  };
151
152  class MacroAssemblerContext {
153   public:
154    MacroAssemblerContext() : count_(0) {}
155    ~MacroAssemblerContext() {}
156    unsigned GetRecursiveCount() const { return count_; }
157    void Up(const char* loc) {
158      location_stack_[count_] = loc;
159      count_++;
160      if (count_ >= kMaxRecursion) {
161        printf(
162            "Recursion limit reached; unable to resolve macro assembler "
163            "call.\n");
164        printf("Macro assembler context stack:\n");
165        for (unsigned i = 0; i < kMaxRecursion; i++) {
166          printf("%10s %s\n", (i == 0) ? "oldest -> " : "", location_stack_[i]);
167        }
168        VIXL_ABORT();
169      }
170    }
171    void Down() {
172      VIXL_ASSERT((count_ > 0) && (count_ < kMaxRecursion));
173      count_--;
174    }
175
176   private:
177    unsigned count_;
178    static const uint32_t kMaxRecursion = 5;
179    const char* location_stack_[kMaxRecursion];
180  };
181
182  // This scope is used at each Delegate entry to avoid infinite recursion of
183  // Delegate calls. The limit is defined by
184  // MacroAssemblerContext::kMaxRecursion.
185  class ContextScope {
186   public:
187    explicit ContextScope(MacroAssembler* const masm, const char* loc)
188        : masm_(masm) {
189      VIXL_ASSERT(masm_->AllowMacroInstructions());
190      masm_->GetContext()->Up(loc);
191    }
192    ~ContextScope() { masm_->GetContext()->Down(); }
193
194   private:
195    MacroAssembler* const masm_;
196  };
197
198  MacroAssemblerContext* GetContext() { return &context_; }
199
200  class ITScope {
201   public:
202    ITScope(MacroAssembler* masm, Condition* cond, bool can_use_it = false)
203        : masm_(masm), cond_(*cond), can_use_it_(can_use_it) {
204      if (!cond_.Is(al) && masm->IsUsingT32()) {
205        if (can_use_it_) {
206          // IT is not deprecated (that implies a 16 bit T32 instruction).
207          // We generate an IT instruction and a conditional instruction.
208          masm->it(cond_);
209        } else {
210          // The usage of IT is deprecated for the instruction.
211          // We generate a conditional branch and an unconditional instruction.
212          // TODO: Use a scope utility with a size check. To do that, we'd need
213          // one with Open() and Close() implemented.
214          masm_->EnsureEmitFor(kMaxT32MacroInstructionSizeInBytes);
215          // Generate the branch.
216          masm_->b(cond_.Negate(), Narrow, &label_);
217          // Tell the macro-assembler to generate unconditional instructions.
218          *cond = al;
219        }
220      }
221#ifdef VIXL_DEBUG
222      initial_cursor_offset_ = masm->GetCursorOffset();
223#else
224      USE(initial_cursor_offset_);
225#endif
226    }
227    ~ITScope() {
228      if (label_.IsReferenced()) {
229        // We only use the label for conditional T32 instructions for which we
230        // cannot use IT.
231        VIXL_ASSERT(!cond_.Is(al));
232        VIXL_ASSERT(masm_->IsUsingT32());
233        VIXL_ASSERT(!can_use_it_);
234        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
235                    kMaxT32MacroInstructionSizeInBytes);
236        masm_->BindHelper(&label_);
237      } else if (masm_->IsUsingT32() && !cond_.Is(al)) {
238        // If we've generated a conditional T32 instruction but haven't used the
239        // label, we must have used IT. Check that we did not generate a
240        // deprecated sequence.
241        VIXL_ASSERT(can_use_it_);
242        VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
243                    k16BitT32InstructionSizeInBytes);
244      }
245    }
246
247   private:
248    MacroAssembler* masm_;
249    Condition cond_;
250    Label label_;
251    bool can_use_it_;
252    uint32_t initial_cursor_offset_;
253  };
254
255  template <Assembler::InstructionCondDtDL asmfn>
256  class EmitLiteralCondDtDL {
257   public:
258    EmitLiteralCondDtDL(Condition cond, DataType dt, DRegister rt)
259        : cond_(cond), dt_(dt), rt_(rt) {}
260    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
261      (masm->*asmfn)(cond_, dt_, rt_, literal);
262    }
263
264   private:
265    Condition cond_;
266    DataType dt_;
267    DRegister rt_;
268  };
269
270  template <Assembler::InstructionCondDtSL asmfn>
271  class EmitLiteralCondDtSL {
272   public:
273    EmitLiteralCondDtSL(Condition cond, DataType dt, SRegister rt)
274        : cond_(cond), dt_(dt), rt_(rt) {}
275    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
276      (masm->*asmfn)(cond_, dt_, rt_, literal);
277    }
278
279   private:
280    Condition cond_;
281    DataType dt_;
282    SRegister rt_;
283  };
284
285  template <Assembler::InstructionCondRL asmfn>
286  class EmitLiteralCondRL {
287   public:
288    EmitLiteralCondRL(Condition cond, Register rt) : cond_(cond), rt_(rt) {}
289    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
290      (masm->*asmfn)(cond_, rt_, literal);
291    }
292
293   private:
294    Condition cond_;
295    Register rt_;
296  };
297
298  template <Assembler::InstructionCondRRL asmfn>
299  class EmitLiteralCondRRL {
300   public:
301    EmitLiteralCondRRL(Condition cond, Register rt, Register rt2)
302        : cond_(cond), rt_(rt), rt2_(rt2) {}
303    void emit(MacroAssembler* const masm, RawLiteral* const literal) {
304      (masm->*asmfn)(cond_, rt_, rt2_, literal);
305    }
306
307   private:
308    Condition cond_;
309    Register rt_, rt2_;
310  };
311
312  class LiteralPoolManager {
313   public:
314    explicit LiteralPoolManager(MacroAssembler* const masm)
315        : masm_(masm), monitor_(0) {
316      ResetCheckpoint();
317    }
318
319    void ResetCheckpoint() { checkpoint_ = Label::kMaxOffset; }
320
321    LiteralPool* GetLiteralPool() { return &literal_pool_; }
322    Label::Offset GetCheckpoint() const {
323      // Make room for a branch over the pools.
324      return checkpoint_ - kMaxInstructionSizeInBytes;
325    }
326    size_t GetLiteralPoolSize() const { return literal_pool_.GetSize(); }
327
328    // Checks if the insertion of the literal will put the forward reference
329    // too far in the literal pool.
330    // This function is called after generating an instruction with a literal.
331    // We want to know if the literal can be reached by the instruction.
332    // If not, we will unwind the instruction, generate the pool (without the
333    // last literal) and generate the instruction again.
334    // "literal" is the literal we want to insert into the pool.
335    // "from" is the location where the instruction which uses the literal has
336    // been generated.
337    bool IsInsertTooFar(RawLiteral* literal, uint32_t from) const {
338      // Last accessible location for the instruction which uses the literal.
339      uint32_t checkpoint = from + literal->GetLastInsertForwardDistance();
340      checkpoint =
341          std::min(checkpoint, static_cast<uint32_t>(literal->GetCheckpoint()));
342      // Compare the checkpoint to the location where the literal should be
343      // added.
344      // We add space for two instructions: one branch and one potential veneer
345      // which may be added after the check. In this particular use case, no
346      // veneer can be added but, this way, we are consistent with all the
347      // literal pool checks.
348      bool too_far =
349          AlignDown(checkpoint, 4) <
350          from + literal_pool_.GetSize() + 2 * kMaxInstructionSizeInBytes;
351      return too_far;
352    }
353
354    // Set the different checkpoints where the literal pool has to be emited.
355    void UpdateCheckpoint(RawLiteral* literal) {
356      // The literal should have been placed somewhere in the literal pool
357      VIXL_ASSERT(literal->GetPositionInPool() != Label::kMaxOffset);
358      // TODO(all): Consider AddForwardRef as a  virtual so the checkpoint is
359      //   updated when inserted. Or move checkpoint_ into Label,
360      literal->UpdateCheckpoint();
361      Label::Offset tmp =
362          literal->GetAlignedCheckpoint(4) - literal->GetPositionInPool();
363      if (checkpoint_ > tmp) {
364        checkpoint_ = tmp;
365        masm_->ComputeCheckpoint();
366      }
367    }
368
369    bool IsEmpty() const { return GetLiteralPoolSize() == 0; }
370
371    void Block() { monitor_++; }
372    void Release() {
373      VIXL_ASSERT(IsBlocked());
374      if (--monitor_ == 0) {
375        // Ensure the pool has not been blocked for too long.
376        VIXL_ASSERT(masm_->GetCursorOffset() <= checkpoint_);
377      }
378    }
379    bool IsBlocked() const { return monitor_ != 0; }
380
381   private:
382    MacroAssembler* const masm_;
383    LiteralPool literal_pool_;
384
385    // Max offset in the code buffer where the literal needs to be
386    // emitted. A default value of Label::kMaxOffset means that the checkpoint
387    // is invalid.
388    Label::Offset checkpoint_;
389    // Indicates whether the emission of this pool is blocked.
390    int monitor_;
391  };
392
393  void PerformEnsureEmit(Label::Offset target, uint32_t extra_size);
394
395 protected:
396  void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm);
397  void PadToMinimumBranchRange(Label* label);
398
399  // Generate the instruction and if it's not possible revert the whole thing.
400  // emit the literal pool and regenerate the instruction.
401  // Note: The instruction is generated via
402  // void T::emit(MacroAssembler* const, RawLiteral* const)
403  template <typename T>
404  void GenerateInstruction(T instr_callback, RawLiteral* const literal) {
405    int32_t cursor = GetCursorOffset();
406    uint32_t where = cursor + GetArchitectureStatePCOffset();
407    // Emit the instruction, via the assembler
408    {
409      MacroEmissionCheckScope guard(this);
410      instr_callback.emit(this, literal);
411    }
412    if (!literal->IsManuallyPlaced() && !literal->IsBound()) {
413      if (IsInsertTooFar(literal, where)) {
414        // The instruction's data is too far: revert the emission
415        GetBuffer()->Rewind(cursor);
416        literal->InvalidateLastForwardReference(RawLiteral::kNoUpdateNecessary);
417        EmitLiteralPool(kBranchRequired);
418        MacroEmissionCheckScope guard(this);
419        instr_callback.emit(this, literal);
420      }
421      literal_pool_manager_.GetLiteralPool()->AddLiteral(literal);
422      literal_pool_manager_.UpdateCheckpoint(literal);
423    }
424  }
425
426 public:
427  explicit MacroAssembler(InstructionSet isa = A32)
428      : Assembler(isa),
429        available_(r12),
430        checkpoint_(Label::kMaxOffset),
431        literal_pool_manager_(this),
432        veneer_pool_manager_(this),
433        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
434        doing_veneer_pool_generation_(false) {
435#ifdef VIXL_DEBUG
436    SetAllowMacroInstructions(true);
437#else
438    USE(literal_pool_manager_);
439    USE(allow_macro_instructions_);
440#endif
441    ComputeCheckpoint();
442  }
443  explicit MacroAssembler(size_t size, InstructionSet isa = A32)
444      : Assembler(size, isa),
445        available_(r12),
446        checkpoint_(Label::kMaxOffset),
447        literal_pool_manager_(this),
448        veneer_pool_manager_(this),
449        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
450        doing_veneer_pool_generation_(false) {
451#ifdef VIXL_DEBUG
452    SetAllowMacroInstructions(true);
453#endif
454    ComputeCheckpoint();
455  }
456  MacroAssembler(byte* buffer, size_t size, InstructionSet isa = A32)
457      : Assembler(buffer, size, isa),
458        available_(r12),
459        checkpoint_(Label::kMaxOffset),
460        literal_pool_manager_(this),
461        veneer_pool_manager_(this),
462        generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
463        doing_veneer_pool_generation_(false) {
464#ifdef VIXL_DEBUG
465    SetAllowMacroInstructions(true);
466#endif
467    ComputeCheckpoint();
468  }
469
470  bool GenerateSimulatorCode() const { return generate_simulator_code_; }
471
472  // Tell whether any of the macro instruction can be used. When false the
473  // MacroAssembler will assert if a method which can emit a variable number
474  // of instructions is called.
475  virtual void SetAllowMacroInstructions(bool value) VIXL_OVERRIDE {
476    allow_macro_instructions_ = value;
477  }
478  virtual bool AllowMacroInstructions() const VIXL_OVERRIDE {
479    return allow_macro_instructions_;
480  }
481
482  void FinalizeCode() {
483    EmitLiteralPool(kNoBranchRequired);
484    Assembler::FinalizeCode();
485  }
486
487  RegisterList* GetScratchRegisterList() { return &available_; }
488  VRegisterList* GetScratchVRegisterList() { return &available_vfp_; }
489
490  // Given an address calculation (Register + immediate), generate code to
491  // partially compute the address. The returned MemOperand will perform any
492  // remaining computation in a subsequent load or store instruction.
493  //
494  // The offset provided should be the offset that would be used in a load or
495  // store instruction (if it had sufficient range). This only matters where
496  // base.Is(pc), since load and store instructions align the pc before
497  // dereferencing it.
498  //
499  // TODO: Improve the handling of negative offsets. They are not implemented
500  // precisely for now because they only have a marginal benefit for the
501  // existing uses (in delegates).
502  MemOperand MemOperandComputationHelper(Condition cond,
503                                         Register scratch,
504                                         Register base,
505                                         uint32_t offset,
506                                         uint32_t extra_offset_mask = 0);
507
508  MemOperand MemOperandComputationHelper(Register scratch,
509                                         Register base,
510                                         uint32_t offset,
511                                         uint32_t extra_offset_mask = 0) {
512    return MemOperandComputationHelper(al,
513                                       scratch,
514                                       base,
515                                       offset,
516                                       extra_offset_mask);
517  }
518  MemOperand MemOperandComputationHelper(Condition cond,
519                                         Register scratch,
520                                         Label* label,
521                                         uint32_t extra_offset_mask = 0) {
522    // Check for buffer space _before_ calculating the offset, in case we
523    // generate a pool that affects the offset calculation.
524    CodeBufferCheckScope scope(this, 4 * kMaxInstructionSizeInBytes);
525    Label::Offset offset =
526        label->GetLocation() -
527        AlignDown(GetCursorOffset() + GetArchitectureStatePCOffset(), 4);
528    return MemOperandComputationHelper(cond,
529                                       scratch,
530                                       pc,
531                                       offset,
532                                       extra_offset_mask);
533  }
534  MemOperand MemOperandComputationHelper(Register scratch,
535                                         Label* label,
536                                         uint32_t extra_offset_mask = 0) {
537    return MemOperandComputationHelper(al, scratch, label, extra_offset_mask);
538  }
539
540  // Determine the appropriate mask to pass into MemOperandComputationHelper.
541  uint32_t GetOffsetMask(InstructionType type, AddrMode addrmode);
542
543  // State and type helpers.
544  bool IsModifiedImmediate(uint32_t imm) {
545    return (IsUsingT32() && ImmediateT32(imm).IsValid()) ||
546           ImmediateA32(imm).IsValid();
547  }
548
549  void Bind(Label* label) {
550    VIXL_ASSERT(allow_macro_instructions_);
551    PadToMinimumBranchRange(label);
552    BindHelper(label);
553  }
554
555  void AddBranchLabel(Label* label) {
556    if (label->IsBound()) return;
557    veneer_pool_manager_.AddLabel(label);
558  }
559
560  void Place(RawLiteral* literal) {
561    VIXL_ASSERT(allow_macro_instructions_);
562    VIXL_ASSERT(literal->IsManuallyPlaced());
563    // We have two calls to `GetBuffer()->Align()` below, that aligns on word
564    // (4 bytes) boundaries. Only one is taken into account in
565    // `GetAlignedSize()`.
566    static const size_t kMaxAlignSize = 3;
567    size_t size = literal->GetAlignedSize() + kMaxAlignSize;
568    VIXL_ASSERT(IsUint32(size));
569    // TODO: We should use a scope here to check the size of data emitted.  We
570    // currently cannot because `aarch32::CodeBufferCheckScope` currently checks
571    // for pools, so that could lead to an infinite loop.
572    EnsureEmitFor(static_cast<uint32_t>(size));
573    // Literals must be emitted aligned on word (4 bytes) boundaries.
574    GetBuffer()->Align();
575    PlaceHelper(literal);
576    GetBuffer()->Align();
577  }
578
579  void ComputeCheckpoint();
580
581  int32_t GetMarginBeforeVeneerEmission() const {
582    return veneer_pool_manager_.GetCheckpoint() - GetCursorOffset();
583  }
584
585  Label::Offset GetTargetForLiteralEmission() const {
586    if (literal_pool_manager_.IsEmpty()) return Label::kMaxOffset;
587    // We add an instruction to the size as the instruction which calls this
588    // function may add a veneer and, without this extra instruction, could put
589    // the literals out of range. For example, it's the case for a "B"
590    // instruction. At the beginning of the instruction we call EnsureEmitFor
591    // which calls this function. However, the target of the branch hasn't been
592    // inserted yet in the veneer pool.
593    size_t veneer_max_size =
594        veneer_pool_manager_.GetMaxSize() + kMaxInstructionSizeInBytes;
595    VIXL_ASSERT(IsInt32(veneer_max_size));
596    // We must be able to generate the veneer pool first.
597    Label::Offset tmp = literal_pool_manager_.GetCheckpoint() -
598                        static_cast<Label::Offset>(veneer_max_size);
599    VIXL_ASSERT(tmp >= 0);
600    return tmp;
601  }
602
603  int32_t GetMarginBeforeLiteralEmission() const {
604    Label::Offset tmp = GetTargetForLiteralEmission();
605    VIXL_ASSERT(tmp >= GetCursorOffset());
606    return tmp - GetCursorOffset();
607  }
608
609  bool VeneerPoolIsEmpty() const { return veneer_pool_manager_.IsEmpty(); }
610  bool LiteralPoolIsEmpty() const { return literal_pool_manager_.IsEmpty(); }
611
612  void EnsureEmitFor(uint32_t size) {
613    Label::Offset target = GetCursorOffset() + size;
614    if (target <= checkpoint_) return;
615    PerformEnsureEmit(target, size);
616  }
617
618  bool IsInsertTooFar(RawLiteral* literal, uint32_t where) {
619    return literal_pool_manager_.IsInsertTooFar(literal, where);
620  }
621
622  bool AliasesAvailableScratchRegister(Register reg) {
623    return GetScratchRegisterList()->Includes(reg);
624  }
625
626  bool AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg) {
627    if (reg.IsAPSR_nzcv()) return false;
628    return GetScratchRegisterList()->Includes(reg.AsRegister());
629  }
630
631  bool AliasesAvailableScratchRegister(VRegister reg) {
632    return GetScratchVRegisterList()->IncludesAliasOf(reg);
633  }
634
635  bool AliasesAvailableScratchRegister(const Operand& operand) {
636    if (operand.IsImmediate()) return false;
637    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
638           (operand.IsRegisterShiftedRegister() &&
639            AliasesAvailableScratchRegister(operand.GetShiftRegister()));
640  }
641
642  bool AliasesAvailableScratchRegister(const NeonOperand& operand) {
643    if (operand.IsImmediate()) return false;
644    return AliasesAvailableScratchRegister(operand.GetRegister());
645  }
646
647  bool AliasesAvailableScratchRegister(SRegisterList list) {
648    for (int n = 0; n < list.GetLength(); n++) {
649      if (AliasesAvailableScratchRegister(list.GetSRegister(n))) return true;
650    }
651    return false;
652  }
653
654  bool AliasesAvailableScratchRegister(DRegisterList list) {
655    for (int n = 0; n < list.GetLength(); n++) {
656      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
657    }
658    return false;
659  }
660
661  bool AliasesAvailableScratchRegister(NeonRegisterList list) {
662    for (int n = 0; n < list.GetLength(); n++) {
663      if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
664    }
665    return false;
666  }
667
668  bool AliasesAvailableScratchRegister(RegisterList list) {
669    return GetScratchRegisterList()->Overlaps(list);
670  }
671
672  bool AliasesAvailableScratchRegister(const MemOperand& operand) {
673    return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
674           (operand.IsShiftedRegister() &&
675            AliasesAvailableScratchRegister(operand.GetOffsetRegister()));
676  }
677
678  // Emit the literal pool in the code buffer.
679  // Every literal is placed on a 32bit boundary
680  // All the literals in the pool will be removed from the pool and potentially
681  // delete'd.
682  void EmitLiteralPool(LiteralPool* const literal_pool, EmitOption option);
683  void EmitLiteralPool(EmitOption option = kBranchRequired) {
684    VIXL_ASSERT(!literal_pool_manager_.IsBlocked());
685    EmitLiteralPool(literal_pool_manager_.GetLiteralPool(), option);
686    literal_pool_manager_.ResetCheckpoint();
687    ComputeCheckpoint();
688  }
689
690  size_t GetLiteralPoolSize() const {
691    return literal_pool_manager_.GetLiteralPoolSize();
692  }
693
694  // Adr with a literal already constructed. Add the literal to the pool if it
695  // is not already done.
696  void Adr(Condition cond, Register rd, RawLiteral* literal) {
697    EmitLiteralCondRL<&Assembler::adr> emit_helper(cond, rd);
698    GenerateInstruction(emit_helper, literal);
699  }
700  void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); }
701
702  // Loads with literals already constructed. Add the literal to the pool
703  // if it is not already done.
704  void Ldr(Condition cond, Register rt, RawLiteral* literal) {
705    EmitLiteralCondRL<&Assembler::ldr> emit_helper(cond, rt);
706    GenerateInstruction(emit_helper, literal);
707  }
708  void Ldr(Register rt, RawLiteral* literal) { Ldr(al, rt, literal); }
709
710  void Ldrb(Condition cond, Register rt, RawLiteral* literal) {
711    EmitLiteralCondRL<&Assembler::ldrb> emit_helper(cond, rt);
712    GenerateInstruction(emit_helper, literal);
713  }
714  void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); }
715
716  void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) {
717    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(cond, rt, rt2);
718    GenerateInstruction(emit_helper, literal);
719  }
720  void Ldrd(Register rt, Register rt2, RawLiteral* literal) {
721    Ldrd(al, rt, rt2, literal);
722  }
723
724  void Ldrh(Condition cond, Register rt, RawLiteral* literal) {
725    EmitLiteralCondRL<&Assembler::ldrh> emit_helper(cond, rt);
726    GenerateInstruction(emit_helper, literal);
727  }
728  void Ldrh(Register rt, RawLiteral* literal) { Ldrh(al, rt, literal); }
729
730  void Ldrsb(Condition cond, Register rt, RawLiteral* literal) {
731    EmitLiteralCondRL<&Assembler::ldrsb> emit_helper(cond, rt);
732    GenerateInstruction(emit_helper, literal);
733  }
734  void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); }
735
736  void Ldrsh(Condition cond, Register rt, RawLiteral* literal) {
737    EmitLiteralCondRL<&Assembler::ldrsh> emit_helper(cond, rt);
738    GenerateInstruction(emit_helper, literal);
739  }
740  void Ldrsh(Register rt, RawLiteral* literal) { Ldrsh(al, rt, literal); }
741
742  void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) {
743    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(cond, dt, rd);
744    GenerateInstruction(emit_helper, literal);
745  }
746  void Vldr(DataType dt, DRegister rd, RawLiteral* literal) {
747    Vldr(al, dt, rd, literal);
748  }
749  void Vldr(Condition cond, DRegister rd, RawLiteral* literal) {
750    Vldr(cond, Untyped64, rd, literal);
751  }
752  void Vldr(DRegister rd, RawLiteral* literal) {
753    Vldr(al, Untyped64, rd, literal);
754  }
755
756  void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) {
757    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(cond, dt, rd);
758    GenerateInstruction(emit_helper, literal);
759  }
760  void Vldr(DataType dt, SRegister rd, RawLiteral* literal) {
761    Vldr(al, dt, rd, literal);
762  }
763  void Vldr(Condition cond, SRegister rd, RawLiteral* literal) {
764    Vldr(cond, Untyped32, rd, literal);
765  }
766  void Vldr(SRegister rd, RawLiteral* literal) {
767    Vldr(al, Untyped32, rd, literal);
768  }
769
770  // Generic Ldr(register, data)
771  void Ldr(Condition cond, Register rt, uint32_t v) {
772    RawLiteral* literal =
773        new Literal<uint32_t>(v, RawLiteral::kDeletedOnPlacementByPool);
774    EmitLiteralCondRL<&Assembler::ldr> emit_helper(cond, rt);
775    GenerateInstruction(emit_helper, literal);
776  }
777  template <typename T>
778  void Ldr(Register rt, T v) {
779    Ldr(al, rt, v);
780  }
781
782  // Generic Ldrd(rt, rt2, data)
783  void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) {
784    RawLiteral* literal =
785        new Literal<uint64_t>(v, RawLiteral::kDeletedOnPlacementByPool);
786    EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(cond, rt, rt2);
787    GenerateInstruction(emit_helper, literal);
788  }
789  template <typename T>
790  void Ldrd(Register rt, Register rt2, T v) {
791    Ldrd(al, rt, rt2, v);
792  }
793
794  void Vldr(Condition cond, SRegister rd, float v) {
795    RawLiteral* literal =
796        new Literal<float>(v, RawLiteral::kDeletedOnPlacementByPool);
797    EmitLiteralCondDtSL<&Assembler::vldr> emit_helper(cond, Untyped32, rd);
798    GenerateInstruction(emit_helper, literal);
799  }
800  void Vldr(SRegister rd, float v) { Vldr(al, rd, v); }
801
802  void Vldr(Condition cond, DRegister rd, double v) {
803    RawLiteral* literal =
804        new Literal<double>(v, RawLiteral::kDeletedOnPlacementByPool);
805    EmitLiteralCondDtDL<&Assembler::vldr> emit_helper(cond, Untyped64, rd);
806    GenerateInstruction(emit_helper, literal);
807  }
808  void Vldr(DRegister rd, double v) { Vldr(al, rd, v); }
809
810  void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); }
811  void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); }
812  void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); }
813  void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); }
814
815  void Switch(Register reg, JumpTableBase* table);
816  void GenerateSwitchTable(JumpTableBase* table, int table_size);
817  void Case(JumpTableBase* table, int case_index);
818  void Break(JumpTableBase* table);
819  void Default(JumpTableBase* table);
820  void EndSwitch(JumpTableBase* table);
821
822  // Claim memory on the stack.
823  // Note that the Claim, Drop, and Peek helpers below ensure that offsets used
824  // are multiples of 32 bits to help maintain 32-bit SP alignment.
825  // We could `Align{Up,Down}(size, 4)`, but that's potentially problematic:
826  //     Claim(3)
827  //     Claim(1)
828  //     Drop(4)
829  // would seem correct, when in fact:
830  //    Claim(3) -> sp = sp - 4
831  //    Claim(1) -> sp = sp - 4
832  //    Drop(4)  -> sp = sp + 4
833  //
834  void Claim(int32_t size) {
835    if (size == 0) return;
836    // The stack must be kept 32bit aligned.
837    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
838    Sub(sp, sp, size);
839  }
840  // Release memory on the stack
841  void Drop(int32_t size) {
842    if (size == 0) return;
843    // The stack must be kept 32bit aligned.
844    VIXL_ASSERT((size > 0) && ((size % 4) == 0));
845    Add(sp, sp, size);
846  }
847  void Peek(Register dst, int32_t offset) {
848    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
849    Ldr(dst, MemOperand(sp, offset));
850  }
851  void Poke(Register src, int32_t offset) {
852    VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
853    Str(src, MemOperand(sp, offset));
854  }
855  void Printf(const char* format,
856              CPURegister reg1 = NoReg,
857              CPURegister reg2 = NoReg,
858              CPURegister reg3 = NoReg,
859              CPURegister reg4 = NoReg);
860  // Functions used by Printf for generation.
861  void PushRegister(CPURegister reg);
862  void PreparePrintfArgument(CPURegister reg,
863                             int* core_count,
864                             int* vfp_count,
865                             uint32_t* printf_type);
866  // Handlers for cases not handled by the assembler.
867  // ADD, MOVT, MOVW, SUB, SXTB16, TEQ, UXTB16
868  virtual void Delegate(InstructionType type,
869                        InstructionCondROp instruction,
870                        Condition cond,
871                        Register rn,
872                        const Operand& operand) VIXL_OVERRIDE;
873  // CMN, CMP, MOV, MOVS, MVN, MVNS, SXTB, SXTH, TST, UXTB, UXTH
874  virtual void Delegate(InstructionType type,
875                        InstructionCondSizeROp instruction,
876                        Condition cond,
877                        EncodingSize size,
878                        Register rn,
879                        const Operand& operand) VIXL_OVERRIDE;
880  // ADDW, ORN, ORNS, PKHBT, PKHTB, RSC, RSCS, SUBW, SXTAB, SXTAB16, SXTAH,
881  // UXTAB, UXTAB16, UXTAH
882  virtual void Delegate(InstructionType type,
883                        InstructionCondRROp instruction,
884                        Condition cond,
885                        Register rd,
886                        Register rn,
887                        const Operand& operand) VIXL_OVERRIDE;
888  // ADC, ADCS, ADD, ADDS, AND, ANDS, ASR, ASRS, BIC, BICS, EOR, EORS, LSL,
889  // LSLS, LSR, LSRS, ORR, ORRS, ROR, RORS, RSB, RSBS, SBC, SBCS, SUB, SUBS
890  virtual void Delegate(InstructionType type,
891                        InstructionCondSizeRL instruction,
892                        Condition cond,
893                        EncodingSize size,
894                        Register rd,
895                        Label* label) VIXL_OVERRIDE;
896  virtual void Delegate(InstructionType type,
897                        InstructionCondSizeRROp instruction,
898                        Condition cond,
899                        EncodingSize size,
900                        Register rd,
901                        Register rn,
902                        const Operand& operand) VIXL_OVERRIDE;
903  // CBNZ, CBZ
904  virtual void Delegate(InstructionType type,
905                        InstructionRL instruction,
906                        Register rn,
907                        Label* label) VIXL_OVERRIDE;
908  // VMOV
909  virtual void Delegate(InstructionType type,
910                        InstructionCondDtSSop instruction,
911                        Condition cond,
912                        DataType dt,
913                        SRegister rd,
914                        const SOperand& operand) VIXL_OVERRIDE;
915  // VMOV, VMVN
916  virtual void Delegate(InstructionType type,
917                        InstructionCondDtDDop instruction,
918                        Condition cond,
919                        DataType dt,
920                        DRegister rd,
921                        const DOperand& operand) VIXL_OVERRIDE;
922  // VMOV, VMVN
923  virtual void Delegate(InstructionType type,
924                        InstructionCondDtQQop instruction,
925                        Condition cond,
926                        DataType dt,
927                        QRegister rd,
928                        const QOperand& operand) VIXL_OVERRIDE;
929  // LDR, LDRB, LDRH, LDRSB, LDRSH, STR, STRB, STRH
930  virtual void Delegate(InstructionType type,
931                        InstructionCondSizeRMop instruction,
932                        Condition cond,
933                        EncodingSize size,
934                        Register rd,
935                        const MemOperand& operand) VIXL_OVERRIDE;
936  // LDAEXD, LDRD, LDREXD, STLEX, STLEXB, STLEXH, STRD, STREX, STREXB, STREXH
937  virtual void Delegate(InstructionType type,
938                        InstructionCondRL instruction,
939                        Condition cond,
940                        Register rt,
941                        Label* label) VIXL_OVERRIDE;
942  virtual void Delegate(InstructionType type,
943                        InstructionCondRRL instruction,
944                        Condition cond,
945                        Register rt,
946                        Register rt2,
947                        Label* label) VIXL_OVERRIDE;
948  virtual void Delegate(InstructionType type,
949                        InstructionCondRRMop instruction,
950                        Condition cond,
951                        Register rt,
952                        Register rt2,
953                        const MemOperand& operand) VIXL_OVERRIDE;
954  // VLDR, VSTR
955  virtual void Delegate(InstructionType type,
956                        InstructionCondDtSMop instruction,
957                        Condition cond,
958                        DataType dt,
959                        SRegister rd,
960                        const MemOperand& operand) VIXL_OVERRIDE;
961  // VLDR, VSTR
962  virtual void Delegate(InstructionType type,
963                        InstructionCondDtDMop instruction,
964                        Condition cond,
965                        DataType dt,
966                        DRegister rd,
967                        const MemOperand& operand) VIXL_OVERRIDE;
968  // MSR
969  virtual void Delegate(InstructionType type,
970                        InstructionCondMsrOp instruction,
971                        Condition cond,
972                        MaskedSpecialRegister spec_reg,
973                        const Operand& operand) VIXL_OVERRIDE;
974  virtual void Delegate(InstructionType type,
975                        InstructionCondDtDL instruction,
976                        Condition cond,
977                        DataType dt,
978                        DRegister rd,
979                        Label* label) VIXL_OVERRIDE;
980  virtual void Delegate(InstructionType type,
981                        InstructionCondDtSL instruction,
982                        Condition cond,
983                        DataType dt,
984                        SRegister rd,
985                        Label* label) VIXL_OVERRIDE;
986
987  // Start of generated code.
988
989  void Adc(Condition cond, Register rd, Register rn, const Operand& operand) {
990    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
991    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
992    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
993    VIXL_ASSERT(allow_macro_instructions_);
994    VIXL_ASSERT(OutsideITBlock());
995    MacroEmissionCheckScope guard(this);
996    bool can_use_it =
997        // ADC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
998        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
999        operand.GetBaseRegister().IsLow();
1000    ITScope it_scope(this, &cond, can_use_it);
1001    adc(cond, rd, rn, operand);
1002  }
1003  void Adc(Register rd, Register rn, const Operand& operand) {
1004    Adc(al, rd, rn, operand);
1005  }
1006  void Adc(FlagsUpdate flags,
1007           Condition cond,
1008           Register rd,
1009           Register rn,
1010           const Operand& operand) {
1011    switch (flags) {
1012      case LeaveFlags:
1013        Adc(cond, rd, rn, operand);
1014        break;
1015      case SetFlags:
1016        Adcs(cond, rd, rn, operand);
1017        break;
1018      case DontCare:
1019        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1020                                   rn.Is(rd) && operand.IsPlainRegister() &&
1021                                   operand.GetBaseRegister().IsLow();
1022        if (setflags_is_smaller) {
1023          Adcs(cond, rd, rn, operand);
1024        } else {
1025          Adc(cond, rd, rn, operand);
1026        }
1027        break;
1028    }
1029  }
1030  void Adc(FlagsUpdate flags,
1031           Register rd,
1032           Register rn,
1033           const Operand& operand) {
1034    Adc(flags, al, rd, rn, operand);
1035  }
1036
1037  void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) {
1038    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1039    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1040    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1041    VIXL_ASSERT(allow_macro_instructions_);
1042    VIXL_ASSERT(OutsideITBlock());
1043    MacroEmissionCheckScope guard(this);
1044    ITScope it_scope(this, &cond);
1045    adcs(cond, rd, rn, operand);
1046  }
1047  void Adcs(Register rd, Register rn, const Operand& operand) {
1048    Adcs(al, rd, rn, operand);
1049  }
1050
1051  void Add(Condition cond, Register rd, Register rn, const Operand& operand) {
1052    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1053    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1054    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1055    VIXL_ASSERT(allow_macro_instructions_);
1056    VIXL_ASSERT(OutsideITBlock());
1057    MacroEmissionCheckScope guard(this);
1058    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1059      uint32_t immediate = operand.GetImmediate();
1060      if (immediate == 0) {
1061        return;
1062      }
1063    }
1064    bool can_use_it =
1065        // ADD<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
1066        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
1067         rd.IsLow()) ||
1068        // ADD<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
1069        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1070         rd.IsLow() && rn.Is(rd)) ||
1071        // ADD{<c>}{<q>} <Rd>, SP, #<imm8> ; T1
1072        (operand.IsImmediate() && (operand.GetImmediate() <= 1020) &&
1073         ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) ||
1074        // ADD<c>{<q>} <Rd>, <Rn>, <Rm>
1075        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1076         operand.GetBaseRegister().IsLow()) ||
1077        // ADD<c>{<q>} <Rdn>, <Rm> ; T2
1078        (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) &&
1079         !operand.GetBaseRegister().IsSP() &&
1080         !operand.GetBaseRegister().IsPC()) ||
1081        // ADD{<c>}{<q>} {<Rdm>,} SP, <Rdm> ; T1
1082        (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() &&
1083         operand.GetBaseRegister().Is(rd));
1084    ITScope it_scope(this, &cond, can_use_it);
1085    add(cond, rd, rn, operand);
1086  }
1087  void Add(Register rd, Register rn, const Operand& operand) {
1088    Add(al, rd, rn, operand);
1089  }
1090  void Add(FlagsUpdate flags,
1091           Condition cond,
1092           Register rd,
1093           Register rn,
1094           const Operand& operand) {
1095    switch (flags) {
1096      case LeaveFlags:
1097        Add(cond, rd, rn, operand);
1098        break;
1099      case SetFlags:
1100        Adds(cond, rd, rn, operand);
1101        break;
1102      case DontCare:
1103        bool setflags_is_smaller =
1104            IsUsingT32() && cond.Is(al) &&
1105            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1106              operand.GetBaseRegister().IsLow()) ||
1107             (operand.IsImmediate() &&
1108              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
1109               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
1110        if (setflags_is_smaller) {
1111          Adds(cond, rd, rn, operand);
1112        } else {
1113          bool changed_op_is_smaller =
1114              operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
1115              ((rd.IsLow() && rn.IsLow() &&
1116                (operand.GetSignedImmediate() >= -7)) ||
1117               (rd.IsLow() && rn.Is(rd) &&
1118                (operand.GetSignedImmediate() >= -255)));
1119          if (changed_op_is_smaller) {
1120            Subs(cond, rd, rn, -operand.GetSignedImmediate());
1121          } else {
1122            Add(cond, rd, rn, operand);
1123          }
1124        }
1125        break;
1126    }
1127  }
1128  void Add(FlagsUpdate flags,
1129           Register rd,
1130           Register rn,
1131           const Operand& operand) {
1132    Add(flags, al, rd, rn, operand);
1133  }
1134
1135  void Adds(Condition cond, Register rd, Register rn, const Operand& operand) {
1136    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1137    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1138    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1139    VIXL_ASSERT(allow_macro_instructions_);
1140    VIXL_ASSERT(OutsideITBlock());
1141    MacroEmissionCheckScope guard(this);
1142    ITScope it_scope(this, &cond);
1143    adds(cond, rd, rn, operand);
1144  }
1145  void Adds(Register rd, Register rn, const Operand& operand) {
1146    Adds(al, rd, rn, operand);
1147  }
1148
1149
1150  void Adr(Condition cond, Register rd, Label* label) {
1151    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1152    VIXL_ASSERT(allow_macro_instructions_);
1153    VIXL_ASSERT(OutsideITBlock());
1154    MacroEmissionCheckScope guard(this);
1155    ITScope it_scope(this, &cond);
1156    adr(cond, rd, label);
1157  }
1158  void Adr(Register rd, Label* label) { Adr(al, rd, label); }
1159
1160  void And(Condition cond, Register rd, Register rn, const Operand& operand) {
1161    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1162    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1163    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1164    VIXL_ASSERT(allow_macro_instructions_);
1165    VIXL_ASSERT(OutsideITBlock());
1166    MacroEmissionCheckScope guard(this);
1167    if (cond.Is(al) && operand.IsImmediate()) {
1168      uint32_t immediate = operand.GetImmediate();
1169      if (immediate == 0) {
1170        mov(rd, 0);
1171        return;
1172      }
1173      if ((immediate == 0xffffffff) && rd.Is(rn)) {
1174        return;
1175      }
1176    }
1177    bool can_use_it =
1178        // AND<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1179        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1180        operand.GetBaseRegister().IsLow();
1181    ITScope it_scope(this, &cond, can_use_it);
1182    and_(cond, rd, rn, operand);
1183  }
1184  void And(Register rd, Register rn, const Operand& operand) {
1185    And(al, rd, rn, operand);
1186  }
1187  void And(FlagsUpdate flags,
1188           Condition cond,
1189           Register rd,
1190           Register rn,
1191           const Operand& operand) {
1192    switch (flags) {
1193      case LeaveFlags:
1194        And(cond, rd, rn, operand);
1195        break;
1196      case SetFlags:
1197        Ands(cond, rd, rn, operand);
1198        break;
1199      case DontCare:
1200        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1201                                   rn.Is(rd) && operand.IsPlainRegister() &&
1202                                   operand.GetBaseRegister().IsLow();
1203        if (setflags_is_smaller) {
1204          Ands(cond, rd, rn, operand);
1205        } else {
1206          And(cond, rd, rn, operand);
1207        }
1208        break;
1209    }
1210  }
1211  void And(FlagsUpdate flags,
1212           Register rd,
1213           Register rn,
1214           const Operand& operand) {
1215    And(flags, al, rd, rn, operand);
1216  }
1217
1218  void Ands(Condition cond, Register rd, Register rn, const Operand& operand) {
1219    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1220    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1221    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1222    VIXL_ASSERT(allow_macro_instructions_);
1223    VIXL_ASSERT(OutsideITBlock());
1224    MacroEmissionCheckScope guard(this);
1225    ITScope it_scope(this, &cond);
1226    ands(cond, rd, rn, operand);
1227  }
1228  void Ands(Register rd, Register rn, const Operand& operand) {
1229    Ands(al, rd, rn, operand);
1230  }
1231
1232  void Asr(Condition cond, Register rd, Register rm, const Operand& operand) {
1233    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1234    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1235    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1236    VIXL_ASSERT(allow_macro_instructions_);
1237    VIXL_ASSERT(OutsideITBlock());
1238    MacroEmissionCheckScope guard(this);
1239    bool can_use_it =
1240        // ASR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
1241        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1242         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
1243        // ASR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
1244        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
1245         operand.GetBaseRegister().IsLow());
1246    ITScope it_scope(this, &cond, can_use_it);
1247    asr(cond, rd, rm, operand);
1248  }
1249  void Asr(Register rd, Register rm, const Operand& operand) {
1250    Asr(al, rd, rm, operand);
1251  }
1252  void Asr(FlagsUpdate flags,
1253           Condition cond,
1254           Register rd,
1255           Register rm,
1256           const Operand& operand) {
1257    switch (flags) {
1258      case LeaveFlags:
1259        Asr(cond, rd, rm, operand);
1260        break;
1261      case SetFlags:
1262        Asrs(cond, rd, rm, operand);
1263        break;
1264      case DontCare:
1265        bool setflags_is_smaller =
1266            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
1267            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1268              (operand.GetImmediate() <= 32)) ||
1269             (operand.IsPlainRegister() && rd.Is(rm)));
1270        if (setflags_is_smaller) {
1271          Asrs(cond, rd, rm, operand);
1272        } else {
1273          Asr(cond, rd, rm, operand);
1274        }
1275        break;
1276    }
1277  }
1278  void Asr(FlagsUpdate flags,
1279           Register rd,
1280           Register rm,
1281           const Operand& operand) {
1282    Asr(flags, al, rd, rm, operand);
1283  }
1284
1285  void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) {
1286    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1287    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1288    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1289    VIXL_ASSERT(allow_macro_instructions_);
1290    VIXL_ASSERT(OutsideITBlock());
1291    MacroEmissionCheckScope guard(this);
1292    ITScope it_scope(this, &cond);
1293    asrs(cond, rd, rm, operand);
1294  }
1295  void Asrs(Register rd, Register rm, const Operand& operand) {
1296    Asrs(al, rd, rm, operand);
1297  }
1298
1299  void B(Condition cond, Label* label) {
1300    VIXL_ASSERT(allow_macro_instructions_);
1301    VIXL_ASSERT(OutsideITBlock());
1302    MacroEmissionCheckScope guard(this);
1303    b(cond, label);
1304    AddBranchLabel(label);
1305  }
1306  void B(Label* label) { B(al, label); }
1307
1308  void Bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand) {
1309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1310    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1311    VIXL_ASSERT(allow_macro_instructions_);
1312    VIXL_ASSERT(OutsideITBlock());
1313    MacroEmissionCheckScope guard(this);
1314    ITScope it_scope(this, &cond);
1315    bfc(cond, rd, lsb, operand);
1316  }
1317  void Bfc(Register rd, uint32_t lsb, const Operand& operand) {
1318    Bfc(al, rd, lsb, operand);
1319  }
1320
1321  void Bfi(Condition cond,
1322           Register rd,
1323           Register rn,
1324           uint32_t lsb,
1325           const Operand& operand) {
1326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1327    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1328    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1329    VIXL_ASSERT(allow_macro_instructions_);
1330    VIXL_ASSERT(OutsideITBlock());
1331    MacroEmissionCheckScope guard(this);
1332    ITScope it_scope(this, &cond);
1333    bfi(cond, rd, rn, lsb, operand);
1334  }
1335  void Bfi(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
1336    Bfi(al, rd, rn, lsb, operand);
1337  }
1338
1339  void Bic(Condition cond, Register rd, Register rn, const Operand& operand) {
1340    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1341    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1342    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1343    VIXL_ASSERT(allow_macro_instructions_);
1344    VIXL_ASSERT(OutsideITBlock());
1345    MacroEmissionCheckScope guard(this);
1346    if (cond.Is(al) && operand.IsImmediate()) {
1347      uint32_t immediate = operand.GetImmediate();
1348      if ((immediate == 0) && rd.Is(rn)) {
1349        return;
1350      }
1351      if (immediate == 0xffffffff) {
1352        mov(rd, 0);
1353        return;
1354      }
1355    }
1356    bool can_use_it =
1357        // BIC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1358        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1359        operand.GetBaseRegister().IsLow();
1360    ITScope it_scope(this, &cond, can_use_it);
1361    bic(cond, rd, rn, operand);
1362  }
1363  void Bic(Register rd, Register rn, const Operand& operand) {
1364    Bic(al, rd, rn, operand);
1365  }
1366  void Bic(FlagsUpdate flags,
1367           Condition cond,
1368           Register rd,
1369           Register rn,
1370           const Operand& operand) {
1371    switch (flags) {
1372      case LeaveFlags:
1373        Bic(cond, rd, rn, operand);
1374        break;
1375      case SetFlags:
1376        Bics(cond, rd, rn, operand);
1377        break;
1378      case DontCare:
1379        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1380                                   rn.Is(rd) && operand.IsPlainRegister() &&
1381                                   operand.GetBaseRegister().IsLow();
1382        if (setflags_is_smaller) {
1383          Bics(cond, rd, rn, operand);
1384        } else {
1385          Bic(cond, rd, rn, operand);
1386        }
1387        break;
1388    }
1389  }
1390  void Bic(FlagsUpdate flags,
1391           Register rd,
1392           Register rn,
1393           const Operand& operand) {
1394    Bic(flags, al, rd, rn, operand);
1395  }
1396
1397  void Bics(Condition cond, Register rd, Register rn, const Operand& operand) {
1398    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1399    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1400    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1401    VIXL_ASSERT(allow_macro_instructions_);
1402    VIXL_ASSERT(OutsideITBlock());
1403    MacroEmissionCheckScope guard(this);
1404    ITScope it_scope(this, &cond);
1405    bics(cond, rd, rn, operand);
1406  }
1407  void Bics(Register rd, Register rn, const Operand& operand) {
1408    Bics(al, rd, rn, operand);
1409  }
1410
1411  void Bkpt(Condition cond, uint32_t imm) {
1412    VIXL_ASSERT(allow_macro_instructions_);
1413    VIXL_ASSERT(OutsideITBlock());
1414    MacroEmissionCheckScope guard(this);
1415    ITScope it_scope(this, &cond);
1416    bkpt(cond, imm);
1417  }
1418  void Bkpt(uint32_t imm) { Bkpt(al, imm); }
1419
1420  void Bl(Condition cond, Label* label) {
1421    VIXL_ASSERT(allow_macro_instructions_);
1422    VIXL_ASSERT(OutsideITBlock());
1423    MacroEmissionCheckScope guard(this);
1424    ITScope it_scope(this, &cond);
1425    bl(cond, label);
1426    AddBranchLabel(label);
1427  }
1428  void Bl(Label* label) { Bl(al, label); }
1429
1430  void Blx(Condition cond, Label* label) {
1431    VIXL_ASSERT(allow_macro_instructions_);
1432    VIXL_ASSERT(OutsideITBlock());
1433    MacroEmissionCheckScope guard(this);
1434    ITScope it_scope(this, &cond);
1435    blx(cond, label);
1436    AddBranchLabel(label);
1437  }
1438  void Blx(Label* label) { Blx(al, label); }
1439
1440  void Blx(Condition cond, Register rm) {
1441    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1442    VIXL_ASSERT(allow_macro_instructions_);
1443    VIXL_ASSERT(OutsideITBlock());
1444    MacroEmissionCheckScope guard(this);
1445    bool can_use_it =
1446        // BLX{<c>}{<q>} <Rm> ; T1
1447        !rm.IsPC();
1448    ITScope it_scope(this, &cond, can_use_it);
1449    blx(cond, rm);
1450  }
1451  void Blx(Register rm) { Blx(al, rm); }
1452
1453  void Bx(Condition cond, Register rm) {
1454    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1455    VIXL_ASSERT(allow_macro_instructions_);
1456    VIXL_ASSERT(OutsideITBlock());
1457    MacroEmissionCheckScope guard(this);
1458    bool can_use_it =
1459        // BX{<c>}{<q>} <Rm> ; T1
1460        !rm.IsPC();
1461    ITScope it_scope(this, &cond, can_use_it);
1462    bx(cond, rm);
1463  }
1464  void Bx(Register rm) { Bx(al, rm); }
1465
1466  void Bxj(Condition cond, Register rm) {
1467    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1468    VIXL_ASSERT(allow_macro_instructions_);
1469    VIXL_ASSERT(OutsideITBlock());
1470    MacroEmissionCheckScope guard(this);
1471    ITScope it_scope(this, &cond);
1472    bxj(cond, rm);
1473  }
1474  void Bxj(Register rm) { Bxj(al, rm); }
1475
1476  void Cbnz(Register rn, Label* label) {
1477    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1478    VIXL_ASSERT(allow_macro_instructions_);
1479    VIXL_ASSERT(OutsideITBlock());
1480    MacroEmissionCheckScope guard(this);
1481    cbnz(rn, label);
1482    AddBranchLabel(label);
1483  }
1484
1485  void Cbz(Register rn, Label* label) {
1486    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1487    VIXL_ASSERT(allow_macro_instructions_);
1488    VIXL_ASSERT(OutsideITBlock());
1489    MacroEmissionCheckScope guard(this);
1490    cbz(rn, label);
1491    AddBranchLabel(label);
1492  }
1493
1494  void Clrex(Condition cond) {
1495    VIXL_ASSERT(allow_macro_instructions_);
1496    VIXL_ASSERT(OutsideITBlock());
1497    MacroEmissionCheckScope guard(this);
1498    ITScope it_scope(this, &cond);
1499    clrex(cond);
1500  }
1501  void Clrex() { Clrex(al); }
1502
1503  void Clz(Condition cond, Register rd, Register rm) {
1504    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1505    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1506    VIXL_ASSERT(allow_macro_instructions_);
1507    VIXL_ASSERT(OutsideITBlock());
1508    MacroEmissionCheckScope guard(this);
1509    ITScope it_scope(this, &cond);
1510    clz(cond, rd, rm);
1511  }
1512  void Clz(Register rd, Register rm) { Clz(al, rd, rm); }
1513
1514  void Cmn(Condition cond, Register rn, const Operand& operand) {
1515    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1516    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1517    VIXL_ASSERT(allow_macro_instructions_);
1518    VIXL_ASSERT(OutsideITBlock());
1519    MacroEmissionCheckScope guard(this);
1520    bool can_use_it =
1521        // CMN{<c>}{<q>} <Rn>, <Rm> ; T1
1522        operand.IsPlainRegister() && rn.IsLow() &&
1523        operand.GetBaseRegister().IsLow();
1524    ITScope it_scope(this, &cond, can_use_it);
1525    cmn(cond, rn, operand);
1526  }
1527  void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); }
1528
1529  void Cmp(Condition cond, Register rn, const Operand& operand) {
1530    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1531    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1532    VIXL_ASSERT(allow_macro_instructions_);
1533    VIXL_ASSERT(OutsideITBlock());
1534    MacroEmissionCheckScope guard(this);
1535    bool can_use_it =
1536        // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1
1537        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1538         rn.IsLow()) ||
1539        // CMP{<c>}{<q>} <Rn>, <Rm> ; T1 T2
1540        (operand.IsPlainRegister() && !rn.IsPC() &&
1541         !operand.GetBaseRegister().IsPC());
1542    ITScope it_scope(this, &cond, can_use_it);
1543    cmp(cond, rn, operand);
1544  }
1545  void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); }
1546
1547  void Crc32b(Condition cond, Register rd, Register rn, Register rm) {
1548    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1549    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1550    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1551    VIXL_ASSERT(allow_macro_instructions_);
1552    VIXL_ASSERT(OutsideITBlock());
1553    MacroEmissionCheckScope guard(this);
1554    ITScope it_scope(this, &cond);
1555    crc32b(cond, rd, rn, rm);
1556  }
1557  void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); }
1558
1559  void Crc32cb(Condition cond, Register rd, Register rn, Register rm) {
1560    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1561    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1562    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1563    VIXL_ASSERT(allow_macro_instructions_);
1564    VIXL_ASSERT(OutsideITBlock());
1565    MacroEmissionCheckScope guard(this);
1566    ITScope it_scope(this, &cond);
1567    crc32cb(cond, rd, rn, rm);
1568  }
1569  void Crc32cb(Register rd, Register rn, Register rm) {
1570    Crc32cb(al, rd, rn, rm);
1571  }
1572
1573  void Crc32ch(Condition cond, Register rd, Register rn, Register rm) {
1574    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1575    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1576    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1577    VIXL_ASSERT(allow_macro_instructions_);
1578    VIXL_ASSERT(OutsideITBlock());
1579    MacroEmissionCheckScope guard(this);
1580    ITScope it_scope(this, &cond);
1581    crc32ch(cond, rd, rn, rm);
1582  }
1583  void Crc32ch(Register rd, Register rn, Register rm) {
1584    Crc32ch(al, rd, rn, rm);
1585  }
1586
1587  void Crc32cw(Condition cond, Register rd, Register rn, Register rm) {
1588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1589    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1590    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1591    VIXL_ASSERT(allow_macro_instructions_);
1592    VIXL_ASSERT(OutsideITBlock());
1593    MacroEmissionCheckScope guard(this);
1594    ITScope it_scope(this, &cond);
1595    crc32cw(cond, rd, rn, rm);
1596  }
1597  void Crc32cw(Register rd, Register rn, Register rm) {
1598    Crc32cw(al, rd, rn, rm);
1599  }
1600
1601  void Crc32h(Condition cond, Register rd, Register rn, Register rm) {
1602    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1605    VIXL_ASSERT(allow_macro_instructions_);
1606    VIXL_ASSERT(OutsideITBlock());
1607    MacroEmissionCheckScope guard(this);
1608    ITScope it_scope(this, &cond);
1609    crc32h(cond, rd, rn, rm);
1610  }
1611  void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); }
1612
1613  void Crc32w(Condition cond, Register rd, Register rn, Register rm) {
1614    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1615    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1617    VIXL_ASSERT(allow_macro_instructions_);
1618    VIXL_ASSERT(OutsideITBlock());
1619    MacroEmissionCheckScope guard(this);
1620    ITScope it_scope(this, &cond);
1621    crc32w(cond, rd, rn, rm);
1622  }
1623  void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); }
1624
1625  void Dmb(Condition cond, MemoryBarrier option) {
1626    VIXL_ASSERT(allow_macro_instructions_);
1627    VIXL_ASSERT(OutsideITBlock());
1628    MacroEmissionCheckScope guard(this);
1629    ITScope it_scope(this, &cond);
1630    dmb(cond, option);
1631  }
1632  void Dmb(MemoryBarrier option) { Dmb(al, option); }
1633
1634  void Dsb(Condition cond, MemoryBarrier option) {
1635    VIXL_ASSERT(allow_macro_instructions_);
1636    VIXL_ASSERT(OutsideITBlock());
1637    MacroEmissionCheckScope guard(this);
1638    ITScope it_scope(this, &cond);
1639    dsb(cond, option);
1640  }
1641  void Dsb(MemoryBarrier option) { Dsb(al, option); }
1642
1643  void Eor(Condition cond, Register rd, Register rn, const Operand& operand) {
1644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1645    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1646    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1647    VIXL_ASSERT(allow_macro_instructions_);
1648    VIXL_ASSERT(OutsideITBlock());
1649    MacroEmissionCheckScope guard(this);
1650    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1651      uint32_t immediate = operand.GetImmediate();
1652      if (immediate == 0) {
1653        return;
1654      }
1655      if (immediate == 0xffffffff) {
1656        mvn(rd, rn);
1657        return;
1658      }
1659    }
1660    bool can_use_it =
1661        // EOR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1662        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1663        operand.GetBaseRegister().IsLow();
1664    ITScope it_scope(this, &cond, can_use_it);
1665    eor(cond, rd, rn, operand);
1666  }
1667  void Eor(Register rd, Register rn, const Operand& operand) {
1668    Eor(al, rd, rn, operand);
1669  }
1670  void Eor(FlagsUpdate flags,
1671           Condition cond,
1672           Register rd,
1673           Register rn,
1674           const Operand& operand) {
1675    switch (flags) {
1676      case LeaveFlags:
1677        Eor(cond, rd, rn, operand);
1678        break;
1679      case SetFlags:
1680        Eors(cond, rd, rn, operand);
1681        break;
1682      case DontCare:
1683        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1684                                   rn.Is(rd) && operand.IsPlainRegister() &&
1685                                   operand.GetBaseRegister().IsLow();
1686        if (setflags_is_smaller) {
1687          Eors(cond, rd, rn, operand);
1688        } else {
1689          Eor(cond, rd, rn, operand);
1690        }
1691        break;
1692    }
1693  }
1694  void Eor(FlagsUpdate flags,
1695           Register rd,
1696           Register rn,
1697           const Operand& operand) {
1698    Eor(flags, al, rd, rn, operand);
1699  }
1700
1701  void Eors(Condition cond, Register rd, Register rn, const Operand& operand) {
1702    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1703    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1704    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1705    VIXL_ASSERT(allow_macro_instructions_);
1706    VIXL_ASSERT(OutsideITBlock());
1707    MacroEmissionCheckScope guard(this);
1708    ITScope it_scope(this, &cond);
1709    eors(cond, rd, rn, operand);
1710  }
1711  void Eors(Register rd, Register rn, const Operand& operand) {
1712    Eors(al, rd, rn, operand);
1713  }
1714
1715  void Fldmdbx(Condition cond,
1716               Register rn,
1717               WriteBack write_back,
1718               DRegisterList dreglist) {
1719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1720    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1721    VIXL_ASSERT(allow_macro_instructions_);
1722    VIXL_ASSERT(OutsideITBlock());
1723    MacroEmissionCheckScope guard(this);
1724    ITScope it_scope(this, &cond);
1725    fldmdbx(cond, rn, write_back, dreglist);
1726  }
1727  void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1728    Fldmdbx(al, rn, write_back, dreglist);
1729  }
1730
1731  void Fldmiax(Condition cond,
1732               Register rn,
1733               WriteBack write_back,
1734               DRegisterList dreglist) {
1735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1736    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1737    VIXL_ASSERT(allow_macro_instructions_);
1738    VIXL_ASSERT(OutsideITBlock());
1739    MacroEmissionCheckScope guard(this);
1740    ITScope it_scope(this, &cond);
1741    fldmiax(cond, rn, write_back, dreglist);
1742  }
1743  void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1744    Fldmiax(al, rn, write_back, dreglist);
1745  }
1746
1747  void Fstmdbx(Condition cond,
1748               Register rn,
1749               WriteBack write_back,
1750               DRegisterList dreglist) {
1751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1752    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1753    VIXL_ASSERT(allow_macro_instructions_);
1754    VIXL_ASSERT(OutsideITBlock());
1755    MacroEmissionCheckScope guard(this);
1756    ITScope it_scope(this, &cond);
1757    fstmdbx(cond, rn, write_back, dreglist);
1758  }
1759  void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1760    Fstmdbx(al, rn, write_back, dreglist);
1761  }
1762
1763  void Fstmiax(Condition cond,
1764               Register rn,
1765               WriteBack write_back,
1766               DRegisterList dreglist) {
1767    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1768    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1769    VIXL_ASSERT(allow_macro_instructions_);
1770    VIXL_ASSERT(OutsideITBlock());
1771    MacroEmissionCheckScope guard(this);
1772    ITScope it_scope(this, &cond);
1773    fstmiax(cond, rn, write_back, dreglist);
1774  }
1775  void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1776    Fstmiax(al, rn, write_back, dreglist);
1777  }
1778
1779  void Hlt(Condition cond, uint32_t imm) {
1780    VIXL_ASSERT(allow_macro_instructions_);
1781    VIXL_ASSERT(OutsideITBlock());
1782    MacroEmissionCheckScope guard(this);
1783    ITScope it_scope(this, &cond);
1784    hlt(cond, imm);
1785  }
1786  void Hlt(uint32_t imm) { Hlt(al, imm); }
1787
1788  void Hvc(Condition cond, uint32_t imm) {
1789    VIXL_ASSERT(allow_macro_instructions_);
1790    VIXL_ASSERT(OutsideITBlock());
1791    MacroEmissionCheckScope guard(this);
1792    ITScope it_scope(this, &cond);
1793    hvc(cond, imm);
1794  }
1795  void Hvc(uint32_t imm) { Hvc(al, imm); }
1796
1797  void Isb(Condition cond, MemoryBarrier option) {
1798    VIXL_ASSERT(allow_macro_instructions_);
1799    VIXL_ASSERT(OutsideITBlock());
1800    MacroEmissionCheckScope guard(this);
1801    ITScope it_scope(this, &cond);
1802    isb(cond, option);
1803  }
1804  void Isb(MemoryBarrier option) { Isb(al, option); }
1805
1806  void Lda(Condition cond, Register rt, const MemOperand& operand) {
1807    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1808    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1809    VIXL_ASSERT(allow_macro_instructions_);
1810    VIXL_ASSERT(OutsideITBlock());
1811    MacroEmissionCheckScope guard(this);
1812    ITScope it_scope(this, &cond);
1813    lda(cond, rt, operand);
1814  }
1815  void Lda(Register rt, const MemOperand& operand) { Lda(al, rt, operand); }
1816
1817  void Ldab(Condition cond, Register rt, const MemOperand& operand) {
1818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1819    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1820    VIXL_ASSERT(allow_macro_instructions_);
1821    VIXL_ASSERT(OutsideITBlock());
1822    MacroEmissionCheckScope guard(this);
1823    ITScope it_scope(this, &cond);
1824    ldab(cond, rt, operand);
1825  }
1826  void Ldab(Register rt, const MemOperand& operand) { Ldab(al, rt, operand); }
1827
1828  void Ldaex(Condition cond, Register rt, const MemOperand& operand) {
1829    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1830    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1831    VIXL_ASSERT(allow_macro_instructions_);
1832    VIXL_ASSERT(OutsideITBlock());
1833    MacroEmissionCheckScope guard(this);
1834    ITScope it_scope(this, &cond);
1835    ldaex(cond, rt, operand);
1836  }
1837  void Ldaex(Register rt, const MemOperand& operand) { Ldaex(al, rt, operand); }
1838
1839  void Ldaexb(Condition cond, Register rt, const MemOperand& operand) {
1840    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1841    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1842    VIXL_ASSERT(allow_macro_instructions_);
1843    VIXL_ASSERT(OutsideITBlock());
1844    MacroEmissionCheckScope guard(this);
1845    ITScope it_scope(this, &cond);
1846    ldaexb(cond, rt, operand);
1847  }
1848  void Ldaexb(Register rt, const MemOperand& operand) {
1849    Ldaexb(al, rt, operand);
1850  }
1851
1852  void Ldaexd(Condition cond,
1853              Register rt,
1854              Register rt2,
1855              const MemOperand& operand) {
1856    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1857    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
1858    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1859    VIXL_ASSERT(allow_macro_instructions_);
1860    VIXL_ASSERT(OutsideITBlock());
1861    MacroEmissionCheckScope guard(this);
1862    ITScope it_scope(this, &cond);
1863    ldaexd(cond, rt, rt2, operand);
1864  }
1865  void Ldaexd(Register rt, Register rt2, const MemOperand& operand) {
1866    Ldaexd(al, rt, rt2, operand);
1867  }
1868
1869  void Ldaexh(Condition cond, Register rt, const MemOperand& operand) {
1870    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1871    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1872    VIXL_ASSERT(allow_macro_instructions_);
1873    VIXL_ASSERT(OutsideITBlock());
1874    MacroEmissionCheckScope guard(this);
1875    ITScope it_scope(this, &cond);
1876    ldaexh(cond, rt, operand);
1877  }
1878  void Ldaexh(Register rt, const MemOperand& operand) {
1879    Ldaexh(al, rt, operand);
1880  }
1881
1882  void Ldah(Condition cond, Register rt, const MemOperand& operand) {
1883    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1884    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1885    VIXL_ASSERT(allow_macro_instructions_);
1886    VIXL_ASSERT(OutsideITBlock());
1887    MacroEmissionCheckScope guard(this);
1888    ITScope it_scope(this, &cond);
1889    ldah(cond, rt, operand);
1890  }
1891  void Ldah(Register rt, const MemOperand& operand) { Ldah(al, rt, operand); }
1892
1893  void Ldm(Condition cond,
1894           Register rn,
1895           WriteBack write_back,
1896           RegisterList registers) {
1897    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1898    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1899    VIXL_ASSERT(allow_macro_instructions_);
1900    VIXL_ASSERT(OutsideITBlock());
1901    MacroEmissionCheckScope guard(this);
1902    ITScope it_scope(this, &cond);
1903    ldm(cond, rn, write_back, registers);
1904  }
1905  void Ldm(Register rn, WriteBack write_back, RegisterList registers) {
1906    Ldm(al, rn, write_back, registers);
1907  }
1908
1909  void Ldmda(Condition cond,
1910             Register rn,
1911             WriteBack write_back,
1912             RegisterList registers) {
1913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1914    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1915    VIXL_ASSERT(allow_macro_instructions_);
1916    VIXL_ASSERT(OutsideITBlock());
1917    MacroEmissionCheckScope guard(this);
1918    ITScope it_scope(this, &cond);
1919    ldmda(cond, rn, write_back, registers);
1920  }
1921  void Ldmda(Register rn, WriteBack write_back, RegisterList registers) {
1922    Ldmda(al, rn, write_back, registers);
1923  }
1924
1925  void Ldmdb(Condition cond,
1926             Register rn,
1927             WriteBack write_back,
1928             RegisterList registers) {
1929    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1930    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1931    VIXL_ASSERT(allow_macro_instructions_);
1932    VIXL_ASSERT(OutsideITBlock());
1933    MacroEmissionCheckScope guard(this);
1934    ITScope it_scope(this, &cond);
1935    ldmdb(cond, rn, write_back, registers);
1936  }
1937  void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) {
1938    Ldmdb(al, rn, write_back, registers);
1939  }
1940
1941  void Ldmea(Condition cond,
1942             Register rn,
1943             WriteBack write_back,
1944             RegisterList registers) {
1945    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1946    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1947    VIXL_ASSERT(allow_macro_instructions_);
1948    VIXL_ASSERT(OutsideITBlock());
1949    MacroEmissionCheckScope guard(this);
1950    ITScope it_scope(this, &cond);
1951    ldmea(cond, rn, write_back, registers);
1952  }
1953  void Ldmea(Register rn, WriteBack write_back, RegisterList registers) {
1954    Ldmea(al, rn, write_back, registers);
1955  }
1956
1957  void Ldmed(Condition cond,
1958             Register rn,
1959             WriteBack write_back,
1960             RegisterList registers) {
1961    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1962    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1963    VIXL_ASSERT(allow_macro_instructions_);
1964    VIXL_ASSERT(OutsideITBlock());
1965    MacroEmissionCheckScope guard(this);
1966    ITScope it_scope(this, &cond);
1967    ldmed(cond, rn, write_back, registers);
1968  }
1969  void Ldmed(Register rn, WriteBack write_back, RegisterList registers) {
1970    Ldmed(al, rn, write_back, registers);
1971  }
1972
1973  void Ldmfa(Condition cond,
1974             Register rn,
1975             WriteBack write_back,
1976             RegisterList registers) {
1977    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1978    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1979    VIXL_ASSERT(allow_macro_instructions_);
1980    VIXL_ASSERT(OutsideITBlock());
1981    MacroEmissionCheckScope guard(this);
1982    ITScope it_scope(this, &cond);
1983    ldmfa(cond, rn, write_back, registers);
1984  }
1985  void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) {
1986    Ldmfa(al, rn, write_back, registers);
1987  }
1988
1989  void Ldmfd(Condition cond,
1990             Register rn,
1991             WriteBack write_back,
1992             RegisterList registers) {
1993    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1994    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1995    VIXL_ASSERT(allow_macro_instructions_);
1996    VIXL_ASSERT(OutsideITBlock());
1997    MacroEmissionCheckScope guard(this);
1998    ITScope it_scope(this, &cond);
1999    ldmfd(cond, rn, write_back, registers);
2000  }
2001  void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) {
2002    Ldmfd(al, rn, write_back, registers);
2003  }
2004
2005  void Ldmib(Condition cond,
2006             Register rn,
2007             WriteBack write_back,
2008             RegisterList registers) {
2009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2010    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2011    VIXL_ASSERT(allow_macro_instructions_);
2012    VIXL_ASSERT(OutsideITBlock());
2013    MacroEmissionCheckScope guard(this);
2014    ITScope it_scope(this, &cond);
2015    ldmib(cond, rn, write_back, registers);
2016  }
2017  void Ldmib(Register rn, WriteBack write_back, RegisterList registers) {
2018    Ldmib(al, rn, write_back, registers);
2019  }
2020
2021  void Ldr(Condition cond, Register rt, const MemOperand& operand) {
2022    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2023    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2024    VIXL_ASSERT(allow_macro_instructions_);
2025    VIXL_ASSERT(OutsideITBlock());
2026    MacroEmissionCheckScope guard(this);
2027    bool can_use_it =
2028        // LDR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2029        (operand.IsImmediate() && rt.IsLow() &&
2030         operand.GetBaseRegister().IsLow() &&
2031         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
2032         (operand.GetAddrMode() == Offset)) ||
2033        // LDR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
2034        (operand.IsImmediate() && rt.IsLow() &&
2035         operand.GetBaseRegister().IsSP() &&
2036         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
2037         (operand.GetAddrMode() == Offset)) ||
2038        // LDR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2039        (operand.IsPlainRegister() && rt.IsLow() &&
2040         operand.GetBaseRegister().IsLow() &&
2041         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2042         (operand.GetAddrMode() == Offset));
2043    ITScope it_scope(this, &cond, can_use_it);
2044    ldr(cond, rt, operand);
2045  }
2046  void Ldr(Register rt, const MemOperand& operand) { Ldr(al, rt, operand); }
2047
2048  void Ldr(Condition cond, Register rt, Label* label) {
2049    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2050    VIXL_ASSERT(allow_macro_instructions_);
2051    VIXL_ASSERT(OutsideITBlock());
2052    MacroEmissionCheckScope guard(this);
2053    ITScope it_scope(this, &cond);
2054    ldr(cond, rt, label);
2055  }
2056  void Ldr(Register rt, Label* label) { Ldr(al, rt, label); }
2057
2058  void Ldrb(Condition cond, Register rt, const MemOperand& operand) {
2059    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2060    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2061    VIXL_ASSERT(allow_macro_instructions_);
2062    VIXL_ASSERT(OutsideITBlock());
2063    MacroEmissionCheckScope guard(this);
2064    bool can_use_it =
2065        // LDRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2066        (operand.IsImmediate() && rt.IsLow() &&
2067         operand.GetBaseRegister().IsLow() &&
2068         operand.IsOffsetImmediateWithinRange(0, 31) &&
2069         (operand.GetAddrMode() == Offset)) ||
2070        // LDRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2071        (operand.IsPlainRegister() && rt.IsLow() &&
2072         operand.GetBaseRegister().IsLow() &&
2073         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2074         (operand.GetAddrMode() == Offset));
2075    ITScope it_scope(this, &cond, can_use_it);
2076    ldrb(cond, rt, operand);
2077  }
2078  void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); }
2079
2080  void Ldrb(Condition cond, Register rt, Label* label) {
2081    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2082    VIXL_ASSERT(allow_macro_instructions_);
2083    VIXL_ASSERT(OutsideITBlock());
2084    MacroEmissionCheckScope guard(this);
2085    ITScope it_scope(this, &cond);
2086    ldrb(cond, rt, label);
2087  }
2088  void Ldrb(Register rt, Label* label) { Ldrb(al, rt, label); }
2089
2090  void Ldrd(Condition cond,
2091            Register rt,
2092            Register rt2,
2093            const MemOperand& operand) {
2094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2095    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2096    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2097    VIXL_ASSERT(allow_macro_instructions_);
2098    VIXL_ASSERT(OutsideITBlock());
2099    MacroEmissionCheckScope guard(this);
2100    ITScope it_scope(this, &cond);
2101    ldrd(cond, rt, rt2, operand);
2102  }
2103  void Ldrd(Register rt, Register rt2, const MemOperand& operand) {
2104    Ldrd(al, rt, rt2, operand);
2105  }
2106
2107  void Ldrd(Condition cond, Register rt, Register rt2, Label* label) {
2108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2109    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2110    VIXL_ASSERT(allow_macro_instructions_);
2111    VIXL_ASSERT(OutsideITBlock());
2112    MacroEmissionCheckScope guard(this);
2113    ITScope it_scope(this, &cond);
2114    ldrd(cond, rt, rt2, label);
2115  }
2116  void Ldrd(Register rt, Register rt2, Label* label) {
2117    Ldrd(al, rt, rt2, label);
2118  }
2119
2120  void Ldrex(Condition cond, Register rt, const MemOperand& operand) {
2121    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2122    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2123    VIXL_ASSERT(allow_macro_instructions_);
2124    VIXL_ASSERT(OutsideITBlock());
2125    MacroEmissionCheckScope guard(this);
2126    ITScope it_scope(this, &cond);
2127    ldrex(cond, rt, operand);
2128  }
2129  void Ldrex(Register rt, const MemOperand& operand) { Ldrex(al, rt, operand); }
2130
2131  void Ldrexb(Condition cond, Register rt, const MemOperand& operand) {
2132    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2133    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2134    VIXL_ASSERT(allow_macro_instructions_);
2135    VIXL_ASSERT(OutsideITBlock());
2136    MacroEmissionCheckScope guard(this);
2137    ITScope it_scope(this, &cond);
2138    ldrexb(cond, rt, operand);
2139  }
2140  void Ldrexb(Register rt, const MemOperand& operand) {
2141    Ldrexb(al, rt, operand);
2142  }
2143
2144  void Ldrexd(Condition cond,
2145              Register rt,
2146              Register rt2,
2147              const MemOperand& operand) {
2148    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2149    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2150    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2151    VIXL_ASSERT(allow_macro_instructions_);
2152    VIXL_ASSERT(OutsideITBlock());
2153    MacroEmissionCheckScope guard(this);
2154    ITScope it_scope(this, &cond);
2155    ldrexd(cond, rt, rt2, operand);
2156  }
2157  void Ldrexd(Register rt, Register rt2, const MemOperand& operand) {
2158    Ldrexd(al, rt, rt2, operand);
2159  }
2160
2161  void Ldrexh(Condition cond, Register rt, const MemOperand& operand) {
2162    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2163    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2164    VIXL_ASSERT(allow_macro_instructions_);
2165    VIXL_ASSERT(OutsideITBlock());
2166    MacroEmissionCheckScope guard(this);
2167    ITScope it_scope(this, &cond);
2168    ldrexh(cond, rt, operand);
2169  }
2170  void Ldrexh(Register rt, const MemOperand& operand) {
2171    Ldrexh(al, rt, operand);
2172  }
2173
2174  void Ldrh(Condition cond, Register rt, const MemOperand& operand) {
2175    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2176    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2177    VIXL_ASSERT(allow_macro_instructions_);
2178    VIXL_ASSERT(OutsideITBlock());
2179    MacroEmissionCheckScope guard(this);
2180    bool can_use_it =
2181        // LDRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2182        (operand.IsImmediate() && rt.IsLow() &&
2183         operand.GetBaseRegister().IsLow() &&
2184         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
2185         (operand.GetAddrMode() == Offset)) ||
2186        // LDRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2187        (operand.IsPlainRegister() && rt.IsLow() &&
2188         operand.GetBaseRegister().IsLow() &&
2189         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2190         (operand.GetAddrMode() == Offset));
2191    ITScope it_scope(this, &cond, can_use_it);
2192    ldrh(cond, rt, operand);
2193  }
2194  void Ldrh(Register rt, const MemOperand& operand) { Ldrh(al, rt, operand); }
2195
2196  void Ldrh(Condition cond, Register rt, Label* label) {
2197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2198    VIXL_ASSERT(allow_macro_instructions_);
2199    VIXL_ASSERT(OutsideITBlock());
2200    MacroEmissionCheckScope guard(this);
2201    ITScope it_scope(this, &cond);
2202    ldrh(cond, rt, label);
2203  }
2204  void Ldrh(Register rt, Label* label) { Ldrh(al, rt, label); }
2205
2206  void Ldrsb(Condition cond, Register rt, const MemOperand& operand) {
2207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2208    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2209    VIXL_ASSERT(allow_macro_instructions_);
2210    VIXL_ASSERT(OutsideITBlock());
2211    MacroEmissionCheckScope guard(this);
2212    bool can_use_it =
2213        // LDRSB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2214        operand.IsPlainRegister() && rt.IsLow() &&
2215        operand.GetBaseRegister().IsLow() &&
2216        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2217        (operand.GetAddrMode() == Offset);
2218    ITScope it_scope(this, &cond, can_use_it);
2219    ldrsb(cond, rt, operand);
2220  }
2221  void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); }
2222
2223  void Ldrsb(Condition cond, Register rt, Label* label) {
2224    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2225    VIXL_ASSERT(allow_macro_instructions_);
2226    VIXL_ASSERT(OutsideITBlock());
2227    MacroEmissionCheckScope guard(this);
2228    ITScope it_scope(this, &cond);
2229    ldrsb(cond, rt, label);
2230  }
2231  void Ldrsb(Register rt, Label* label) { Ldrsb(al, rt, label); }
2232
2233  void Ldrsh(Condition cond, Register rt, const MemOperand& operand) {
2234    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2235    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2236    VIXL_ASSERT(allow_macro_instructions_);
2237    VIXL_ASSERT(OutsideITBlock());
2238    MacroEmissionCheckScope guard(this);
2239    bool can_use_it =
2240        // LDRSH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2241        operand.IsPlainRegister() && rt.IsLow() &&
2242        operand.GetBaseRegister().IsLow() &&
2243        operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2244        (operand.GetAddrMode() == Offset);
2245    ITScope it_scope(this, &cond, can_use_it);
2246    ldrsh(cond, rt, operand);
2247  }
2248  void Ldrsh(Register rt, const MemOperand& operand) { Ldrsh(al, rt, operand); }
2249
2250  void Ldrsh(Condition cond, Register rt, Label* label) {
2251    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2252    VIXL_ASSERT(allow_macro_instructions_);
2253    VIXL_ASSERT(OutsideITBlock());
2254    MacroEmissionCheckScope guard(this);
2255    ITScope it_scope(this, &cond);
2256    ldrsh(cond, rt, label);
2257  }
2258  void Ldrsh(Register rt, Label* label) { Ldrsh(al, rt, label); }
2259
2260  void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) {
2261    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2262    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2263    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2264    VIXL_ASSERT(allow_macro_instructions_);
2265    VIXL_ASSERT(OutsideITBlock());
2266    MacroEmissionCheckScope guard(this);
2267    bool can_use_it =
2268        // LSL<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2269        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2270         (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) ||
2271        // LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2272        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2273         operand.GetBaseRegister().IsLow());
2274    ITScope it_scope(this, &cond, can_use_it);
2275    lsl(cond, rd, rm, operand);
2276  }
2277  void Lsl(Register rd, Register rm, const Operand& operand) {
2278    Lsl(al, rd, rm, operand);
2279  }
2280  void Lsl(FlagsUpdate flags,
2281           Condition cond,
2282           Register rd,
2283           Register rm,
2284           const Operand& operand) {
2285    switch (flags) {
2286      case LeaveFlags:
2287        Lsl(cond, rd, rm, operand);
2288        break;
2289      case SetFlags:
2290        Lsls(cond, rd, rm, operand);
2291        break;
2292      case DontCare:
2293        bool setflags_is_smaller =
2294            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2295            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2296              (operand.GetImmediate() < 32)) ||
2297             (operand.IsPlainRegister() && rd.Is(rm)));
2298        if (setflags_is_smaller) {
2299          Lsls(cond, rd, rm, operand);
2300        } else {
2301          Lsl(cond, rd, rm, operand);
2302        }
2303        break;
2304    }
2305  }
2306  void Lsl(FlagsUpdate flags,
2307           Register rd,
2308           Register rm,
2309           const Operand& operand) {
2310    Lsl(flags, al, rd, rm, operand);
2311  }
2312
2313  void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) {
2314    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2315    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2316    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2317    VIXL_ASSERT(allow_macro_instructions_);
2318    VIXL_ASSERT(OutsideITBlock());
2319    MacroEmissionCheckScope guard(this);
2320    ITScope it_scope(this, &cond);
2321    lsls(cond, rd, rm, operand);
2322  }
2323  void Lsls(Register rd, Register rm, const Operand& operand) {
2324    Lsls(al, rd, rm, operand);
2325  }
2326
2327  void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) {
2328    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2329    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2330    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2331    VIXL_ASSERT(allow_macro_instructions_);
2332    VIXL_ASSERT(OutsideITBlock());
2333    MacroEmissionCheckScope guard(this);
2334    bool can_use_it =
2335        // LSR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2336        (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2337         (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
2338        // LSR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2339        (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2340         operand.GetBaseRegister().IsLow());
2341    ITScope it_scope(this, &cond, can_use_it);
2342    lsr(cond, rd, rm, operand);
2343  }
2344  void Lsr(Register rd, Register rm, const Operand& operand) {
2345    Lsr(al, rd, rm, operand);
2346  }
2347  void Lsr(FlagsUpdate flags,
2348           Condition cond,
2349           Register rd,
2350           Register rm,
2351           const Operand& operand) {
2352    switch (flags) {
2353      case LeaveFlags:
2354        Lsr(cond, rd, rm, operand);
2355        break;
2356      case SetFlags:
2357        Lsrs(cond, rd, rm, operand);
2358        break;
2359      case DontCare:
2360        bool setflags_is_smaller =
2361            IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2362            ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2363              (operand.GetImmediate() <= 32)) ||
2364             (operand.IsPlainRegister() && rd.Is(rm)));
2365        if (setflags_is_smaller) {
2366          Lsrs(cond, rd, rm, operand);
2367        } else {
2368          Lsr(cond, rd, rm, operand);
2369        }
2370        break;
2371    }
2372  }
2373  void Lsr(FlagsUpdate flags,
2374           Register rd,
2375           Register rm,
2376           const Operand& operand) {
2377    Lsr(flags, al, rd, rm, operand);
2378  }
2379
2380  void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) {
2381    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2382    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2383    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2384    VIXL_ASSERT(allow_macro_instructions_);
2385    VIXL_ASSERT(OutsideITBlock());
2386    MacroEmissionCheckScope guard(this);
2387    ITScope it_scope(this, &cond);
2388    lsrs(cond, rd, rm, operand);
2389  }
2390  void Lsrs(Register rd, Register rm, const Operand& operand) {
2391    Lsrs(al, rd, rm, operand);
2392  }
2393
2394  void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2395    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2396    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2397    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2398    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2399    VIXL_ASSERT(allow_macro_instructions_);
2400    VIXL_ASSERT(OutsideITBlock());
2401    MacroEmissionCheckScope guard(this);
2402    ITScope it_scope(this, &cond);
2403    mla(cond, rd, rn, rm, ra);
2404  }
2405  void Mla(Register rd, Register rn, Register rm, Register ra) {
2406    Mla(al, rd, rn, rm, ra);
2407  }
2408  void Mla(FlagsUpdate flags,
2409           Condition cond,
2410           Register rd,
2411           Register rn,
2412           Register rm,
2413           Register ra) {
2414    switch (flags) {
2415      case LeaveFlags:
2416        Mla(cond, rd, rn, rm, ra);
2417        break;
2418      case SetFlags:
2419        Mlas(cond, rd, rn, rm, ra);
2420        break;
2421      case DontCare:
2422        Mla(cond, rd, rn, rm, ra);
2423        break;
2424    }
2425  }
2426  void Mla(
2427      FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) {
2428    Mla(flags, al, rd, rn, rm, ra);
2429  }
2430
2431  void Mlas(
2432      Condition cond, Register rd, Register rn, Register rm, Register ra) {
2433    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2434    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2435    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2436    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2437    VIXL_ASSERT(allow_macro_instructions_);
2438    VIXL_ASSERT(OutsideITBlock());
2439    MacroEmissionCheckScope guard(this);
2440    ITScope it_scope(this, &cond);
2441    mlas(cond, rd, rn, rm, ra);
2442  }
2443  void Mlas(Register rd, Register rn, Register rm, Register ra) {
2444    Mlas(al, rd, rn, rm, ra);
2445  }
2446
2447  void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2448    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2450    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2451    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2452    VIXL_ASSERT(allow_macro_instructions_);
2453    VIXL_ASSERT(OutsideITBlock());
2454    MacroEmissionCheckScope guard(this);
2455    ITScope it_scope(this, &cond);
2456    mls(cond, rd, rn, rm, ra);
2457  }
2458  void Mls(Register rd, Register rn, Register rm, Register ra) {
2459    Mls(al, rd, rn, rm, ra);
2460  }
2461
2462  void Mov(Condition cond, Register rd, const Operand& operand) {
2463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2464    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2465    VIXL_ASSERT(allow_macro_instructions_);
2466    VIXL_ASSERT(OutsideITBlock());
2467    MacroEmissionCheckScope guard(this);
2468    bool can_use_it =
2469        // MOV<c>{<q>} <Rd>, #<imm8> ; T1
2470        (operand.IsImmediate() && rd.IsLow() &&
2471         (operand.GetImmediate() <= 255)) ||
2472        // MOV{<c>}{<q>} <Rd>, <Rm> ; T1
2473        (operand.IsPlainRegister() && !rd.IsPC() &&
2474         !operand.GetBaseRegister().IsPC()) ||
2475        // MOV<c>{<q>} <Rd>, <Rm> {, <shift> #<amount>} ; T2
2476        (operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2477         operand.GetBaseRegister().IsLow() &&
2478         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2479          operand.GetShift().Is(ASR))) ||
2480        // MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs> ; T1
2481        // MOV<c>{<q>} <Rdm>, <Rdm>, LSR <Rs> ; T1
2482        // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1
2483        // MOV<c>{<q>} <Rdm>, <Rdm>, ROR <Rs> ; T1
2484        (operand.IsRegisterShiftedRegister() &&
2485         rd.Is(operand.GetBaseRegister()) && rd.IsLow() &&
2486         (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2487          operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) &&
2488         operand.GetShiftRegister().IsLow());
2489    ITScope it_scope(this, &cond, can_use_it);
2490    mov(cond, rd, operand);
2491  }
2492  void Mov(Register rd, const Operand& operand) { Mov(al, rd, operand); }
2493  void Mov(FlagsUpdate flags,
2494           Condition cond,
2495           Register rd,
2496           const Operand& operand) {
2497    switch (flags) {
2498      case LeaveFlags:
2499        Mov(cond, rd, operand);
2500        break;
2501      case SetFlags:
2502        Movs(cond, rd, operand);
2503        break;
2504      case DontCare:
2505        bool setflags_is_smaller =
2506            IsUsingT32() && cond.Is(al) &&
2507            ((operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2508              operand.GetBaseRegister().IsLow() &&
2509              (operand.GetShiftAmount() >= 1) &&
2510              (((operand.GetShiftAmount() <= 32) &&
2511                ((operand.GetShift().IsLSR() || operand.GetShift().IsASR()))) ||
2512               ((operand.GetShiftAmount() < 32) &&
2513                operand.GetShift().IsLSL()))) ||
2514             (operand.IsRegisterShiftedRegister() && rd.IsLow() &&
2515              operand.GetBaseRegister().Is(rd) &&
2516              operand.GetShiftRegister().IsLow() &&
2517              (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() ||
2518               operand.GetShift().IsASR() || operand.GetShift().IsROR())) ||
2519             (operand.IsImmediate() && rd.IsLow() &&
2520              (operand.GetImmediate() < 256)));
2521        if (setflags_is_smaller) {
2522          Movs(cond, rd, operand);
2523        } else {
2524          Mov(cond, rd, operand);
2525        }
2526        break;
2527    }
2528  }
2529  void Mov(FlagsUpdate flags, Register rd, const Operand& operand) {
2530    Mov(flags, al, rd, operand);
2531  }
2532
2533  void Movs(Condition cond, Register rd, const Operand& operand) {
2534    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2535    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2536    VIXL_ASSERT(allow_macro_instructions_);
2537    VIXL_ASSERT(OutsideITBlock());
2538    MacroEmissionCheckScope guard(this);
2539    ITScope it_scope(this, &cond);
2540    movs(cond, rd, operand);
2541  }
2542  void Movs(Register rd, const Operand& operand) { Movs(al, rd, operand); }
2543
2544  void Movt(Condition cond, Register rd, const Operand& operand) {
2545    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2546    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2547    VIXL_ASSERT(allow_macro_instructions_);
2548    VIXL_ASSERT(OutsideITBlock());
2549    MacroEmissionCheckScope guard(this);
2550    ITScope it_scope(this, &cond);
2551    movt(cond, rd, operand);
2552  }
2553  void Movt(Register rd, const Operand& operand) { Movt(al, rd, operand); }
2554
2555
2556  void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
2557    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2558    VIXL_ASSERT(allow_macro_instructions_);
2559    VIXL_ASSERT(OutsideITBlock());
2560    MacroEmissionCheckScope guard(this);
2561    ITScope it_scope(this, &cond);
2562    mrs(cond, rd, spec_reg);
2563  }
2564  void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); }
2565
2566  void Msr(Condition cond,
2567           MaskedSpecialRegister spec_reg,
2568           const Operand& operand) {
2569    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2570    VIXL_ASSERT(allow_macro_instructions_);
2571    VIXL_ASSERT(OutsideITBlock());
2572    MacroEmissionCheckScope guard(this);
2573    ITScope it_scope(this, &cond);
2574    msr(cond, spec_reg, operand);
2575  }
2576  void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) {
2577    Msr(al, spec_reg, operand);
2578  }
2579
2580  void Mul(Condition cond, Register rd, Register rn, Register rm) {
2581    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2583    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2584    VIXL_ASSERT(allow_macro_instructions_);
2585    VIXL_ASSERT(OutsideITBlock());
2586    MacroEmissionCheckScope guard(this);
2587    bool can_use_it =
2588        // MUL<c>{<q>} <Rdm>, <Rn>{, <Rdm>} ; T1
2589        rd.Is(rm) && rn.IsLow() && rm.IsLow();
2590    ITScope it_scope(this, &cond, can_use_it);
2591    mul(cond, rd, rn, rm);
2592  }
2593  void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); }
2594  void Mul(FlagsUpdate flags,
2595           Condition cond,
2596           Register rd,
2597           Register rn,
2598           Register rm) {
2599    switch (flags) {
2600      case LeaveFlags:
2601        Mul(cond, rd, rn, rm);
2602        break;
2603      case SetFlags:
2604        Muls(cond, rd, rn, rm);
2605        break;
2606      case DontCare:
2607        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2608                                   rn.IsLow() && rm.Is(rd);
2609        if (setflags_is_smaller) {
2610          Muls(cond, rd, rn, rm);
2611        } else {
2612          Mul(cond, rd, rn, rm);
2613        }
2614        break;
2615    }
2616  }
2617  void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) {
2618    Mul(flags, al, rd, rn, rm);
2619  }
2620
2621  void Muls(Condition cond, Register rd, Register rn, Register rm) {
2622    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2623    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2624    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2625    VIXL_ASSERT(allow_macro_instructions_);
2626    VIXL_ASSERT(OutsideITBlock());
2627    MacroEmissionCheckScope guard(this);
2628    ITScope it_scope(this, &cond);
2629    muls(cond, rd, rn, rm);
2630  }
2631  void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); }
2632
2633  void Mvn(Condition cond, Register rd, const Operand& operand) {
2634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2635    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2636    VIXL_ASSERT(allow_macro_instructions_);
2637    VIXL_ASSERT(OutsideITBlock());
2638    MacroEmissionCheckScope guard(this);
2639    bool can_use_it =
2640        // MVN<c>{<q>} <Rd>, <Rm> ; T1
2641        operand.IsPlainRegister() && rd.IsLow() &&
2642        operand.GetBaseRegister().IsLow();
2643    ITScope it_scope(this, &cond, can_use_it);
2644    mvn(cond, rd, operand);
2645  }
2646  void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); }
2647  void Mvn(FlagsUpdate flags,
2648           Condition cond,
2649           Register rd,
2650           const Operand& operand) {
2651    switch (flags) {
2652      case LeaveFlags:
2653        Mvn(cond, rd, operand);
2654        break;
2655      case SetFlags:
2656        Mvns(cond, rd, operand);
2657        break;
2658      case DontCare:
2659        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2660                                   operand.IsPlainRegister() &&
2661                                   operand.GetBaseRegister().IsLow();
2662        if (setflags_is_smaller) {
2663          Mvns(cond, rd, operand);
2664        } else {
2665          Mvn(cond, rd, operand);
2666        }
2667        break;
2668    }
2669  }
2670  void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) {
2671    Mvn(flags, al, rd, operand);
2672  }
2673
2674  void Mvns(Condition cond, Register rd, const Operand& operand) {
2675    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2676    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2677    VIXL_ASSERT(allow_macro_instructions_);
2678    VIXL_ASSERT(OutsideITBlock());
2679    MacroEmissionCheckScope guard(this);
2680    ITScope it_scope(this, &cond);
2681    mvns(cond, rd, operand);
2682  }
2683  void Mvns(Register rd, const Operand& operand) { Mvns(al, rd, operand); }
2684
2685  void Nop(Condition cond) {
2686    VIXL_ASSERT(allow_macro_instructions_);
2687    VIXL_ASSERT(OutsideITBlock());
2688    MacroEmissionCheckScope guard(this);
2689    ITScope it_scope(this, &cond);
2690    nop(cond);
2691  }
2692  void Nop() { Nop(al); }
2693
2694  void Orn(Condition cond, Register rd, Register rn, const Operand& operand) {
2695    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2696    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2697    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2698    VIXL_ASSERT(allow_macro_instructions_);
2699    VIXL_ASSERT(OutsideITBlock());
2700    MacroEmissionCheckScope guard(this);
2701    if (cond.Is(al) && operand.IsImmediate()) {
2702      uint32_t immediate = operand.GetImmediate();
2703      if (immediate == 0) {
2704        mvn(rd, 0);
2705        return;
2706      }
2707      if ((immediate == 0xffffffff) && rd.Is(rn)) {
2708        return;
2709      }
2710    }
2711    ITScope it_scope(this, &cond);
2712    orn(cond, rd, rn, operand);
2713  }
2714  void Orn(Register rd, Register rn, const Operand& operand) {
2715    Orn(al, rd, rn, operand);
2716  }
2717  void Orn(FlagsUpdate flags,
2718           Condition cond,
2719           Register rd,
2720           Register rn,
2721           const Operand& operand) {
2722    switch (flags) {
2723      case LeaveFlags:
2724        Orn(cond, rd, rn, operand);
2725        break;
2726      case SetFlags:
2727        Orns(cond, rd, rn, operand);
2728        break;
2729      case DontCare:
2730        Orn(cond, rd, rn, operand);
2731        break;
2732    }
2733  }
2734  void Orn(FlagsUpdate flags,
2735           Register rd,
2736           Register rn,
2737           const Operand& operand) {
2738    Orn(flags, al, rd, rn, operand);
2739  }
2740
2741  void Orns(Condition cond, Register rd, Register rn, const Operand& operand) {
2742    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2743    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2744    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2745    VIXL_ASSERT(allow_macro_instructions_);
2746    VIXL_ASSERT(OutsideITBlock());
2747    MacroEmissionCheckScope guard(this);
2748    ITScope it_scope(this, &cond);
2749    orns(cond, rd, rn, operand);
2750  }
2751  void Orns(Register rd, Register rn, const Operand& operand) {
2752    Orns(al, rd, rn, operand);
2753  }
2754
2755  void Orr(Condition cond, Register rd, Register rn, const Operand& operand) {
2756    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2757    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2758    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2759    VIXL_ASSERT(allow_macro_instructions_);
2760    VIXL_ASSERT(OutsideITBlock());
2761    MacroEmissionCheckScope guard(this);
2762    if (cond.Is(al) && operand.IsImmediate()) {
2763      uint32_t immediate = operand.GetImmediate();
2764      if ((immediate == 0) && rd.Is(rn)) {
2765        return;
2766      }
2767      if (immediate == 0xffffffff) {
2768        mvn(rd, 0);
2769        return;
2770      }
2771    }
2772    bool can_use_it =
2773        // ORR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
2774        operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
2775        operand.GetBaseRegister().IsLow();
2776    ITScope it_scope(this, &cond, can_use_it);
2777    orr(cond, rd, rn, operand);
2778  }
2779  void Orr(Register rd, Register rn, const Operand& operand) {
2780    Orr(al, rd, rn, operand);
2781  }
2782  void Orr(FlagsUpdate flags,
2783           Condition cond,
2784           Register rd,
2785           Register rn,
2786           const Operand& operand) {
2787    switch (flags) {
2788      case LeaveFlags:
2789        Orr(cond, rd, rn, operand);
2790        break;
2791      case SetFlags:
2792        Orrs(cond, rd, rn, operand);
2793        break;
2794      case DontCare:
2795        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2796                                   rn.Is(rd) && operand.IsPlainRegister() &&
2797                                   operand.GetBaseRegister().IsLow();
2798        if (setflags_is_smaller) {
2799          Orrs(cond, rd, rn, operand);
2800        } else {
2801          Orr(cond, rd, rn, operand);
2802        }
2803        break;
2804    }
2805  }
2806  void Orr(FlagsUpdate flags,
2807           Register rd,
2808           Register rn,
2809           const Operand& operand) {
2810    Orr(flags, al, rd, rn, operand);
2811  }
2812
2813  void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) {
2814    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2815    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2816    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2817    VIXL_ASSERT(allow_macro_instructions_);
2818    VIXL_ASSERT(OutsideITBlock());
2819    MacroEmissionCheckScope guard(this);
2820    ITScope it_scope(this, &cond);
2821    orrs(cond, rd, rn, operand);
2822  }
2823  void Orrs(Register rd, Register rn, const Operand& operand) {
2824    Orrs(al, rd, rn, operand);
2825  }
2826
2827  void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) {
2828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2829    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2830    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2831    VIXL_ASSERT(allow_macro_instructions_);
2832    VIXL_ASSERT(OutsideITBlock());
2833    MacroEmissionCheckScope guard(this);
2834    ITScope it_scope(this, &cond);
2835    pkhbt(cond, rd, rn, operand);
2836  }
2837  void Pkhbt(Register rd, Register rn, const Operand& operand) {
2838    Pkhbt(al, rd, rn, operand);
2839  }
2840
2841  void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) {
2842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2844    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2845    VIXL_ASSERT(allow_macro_instructions_);
2846    VIXL_ASSERT(OutsideITBlock());
2847    MacroEmissionCheckScope guard(this);
2848    ITScope it_scope(this, &cond);
2849    pkhtb(cond, rd, rn, operand);
2850  }
2851  void Pkhtb(Register rd, Register rn, const Operand& operand) {
2852    Pkhtb(al, rd, rn, operand);
2853  }
2854
2855  void Pld(Condition cond, Label* label) {
2856    VIXL_ASSERT(allow_macro_instructions_);
2857    VIXL_ASSERT(OutsideITBlock());
2858    MacroEmissionCheckScope guard(this);
2859    ITScope it_scope(this, &cond);
2860    pld(cond, label);
2861  }
2862  void Pld(Label* label) { Pld(al, label); }
2863
2864  void Pld(Condition cond, const MemOperand& operand) {
2865    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2866    VIXL_ASSERT(allow_macro_instructions_);
2867    VIXL_ASSERT(OutsideITBlock());
2868    MacroEmissionCheckScope guard(this);
2869    ITScope it_scope(this, &cond);
2870    pld(cond, operand);
2871  }
2872  void Pld(const MemOperand& operand) { Pld(al, operand); }
2873
2874  void Pldw(Condition cond, const MemOperand& operand) {
2875    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2876    VIXL_ASSERT(allow_macro_instructions_);
2877    VIXL_ASSERT(OutsideITBlock());
2878    MacroEmissionCheckScope guard(this);
2879    ITScope it_scope(this, &cond);
2880    pldw(cond, operand);
2881  }
2882  void Pldw(const MemOperand& operand) { Pldw(al, operand); }
2883
2884  void Pli(Condition cond, const MemOperand& operand) {
2885    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2886    VIXL_ASSERT(allow_macro_instructions_);
2887    VIXL_ASSERT(OutsideITBlock());
2888    MacroEmissionCheckScope guard(this);
2889    ITScope it_scope(this, &cond);
2890    pli(cond, operand);
2891  }
2892  void Pli(const MemOperand& operand) { Pli(al, operand); }
2893
2894  void Pli(Condition cond, Label* label) {
2895    VIXL_ASSERT(allow_macro_instructions_);
2896    VIXL_ASSERT(OutsideITBlock());
2897    MacroEmissionCheckScope guard(this);
2898    ITScope it_scope(this, &cond);
2899    pli(cond, label);
2900  }
2901  void Pli(Label* label) { Pli(al, label); }
2902
2903  void Pop(Condition cond, RegisterList registers) {
2904    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2905    VIXL_ASSERT(allow_macro_instructions_);
2906    VIXL_ASSERT(OutsideITBlock());
2907    MacroEmissionCheckScope guard(this);
2908    ITScope it_scope(this, &cond);
2909    pop(cond, registers);
2910  }
2911  void Pop(RegisterList registers) { Pop(al, registers); }
2912
2913  void Pop(Condition cond, Register rt) {
2914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2915    VIXL_ASSERT(allow_macro_instructions_);
2916    VIXL_ASSERT(OutsideITBlock());
2917    MacroEmissionCheckScope guard(this);
2918    ITScope it_scope(this, &cond);
2919    pop(cond, rt);
2920  }
2921  void Pop(Register rt) { Pop(al, rt); }
2922
2923  void Push(Condition cond, RegisterList registers) {
2924    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2925    VIXL_ASSERT(allow_macro_instructions_);
2926    VIXL_ASSERT(OutsideITBlock());
2927    MacroEmissionCheckScope guard(this);
2928    ITScope it_scope(this, &cond);
2929    push(cond, registers);
2930  }
2931  void Push(RegisterList registers) { Push(al, registers); }
2932
2933  void Push(Condition cond, Register rt) {
2934    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2935    VIXL_ASSERT(allow_macro_instructions_);
2936    VIXL_ASSERT(OutsideITBlock());
2937    MacroEmissionCheckScope guard(this);
2938    ITScope it_scope(this, &cond);
2939    push(cond, rt);
2940  }
2941  void Push(Register rt) { Push(al, rt); }
2942
2943  void Qadd(Condition cond, Register rd, Register rm, Register rn) {
2944    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2945    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2946    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2947    VIXL_ASSERT(allow_macro_instructions_);
2948    VIXL_ASSERT(OutsideITBlock());
2949    MacroEmissionCheckScope guard(this);
2950    ITScope it_scope(this, &cond);
2951    qadd(cond, rd, rm, rn);
2952  }
2953  void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); }
2954
2955  void Qadd16(Condition cond, Register rd, Register rn, Register rm) {
2956    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2957    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2958    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2959    VIXL_ASSERT(allow_macro_instructions_);
2960    VIXL_ASSERT(OutsideITBlock());
2961    MacroEmissionCheckScope guard(this);
2962    ITScope it_scope(this, &cond);
2963    qadd16(cond, rd, rn, rm);
2964  }
2965  void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); }
2966
2967  void Qadd8(Condition cond, Register rd, Register rn, Register rm) {
2968    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2969    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2970    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2971    VIXL_ASSERT(allow_macro_instructions_);
2972    VIXL_ASSERT(OutsideITBlock());
2973    MacroEmissionCheckScope guard(this);
2974    ITScope it_scope(this, &cond);
2975    qadd8(cond, rd, rn, rm);
2976  }
2977  void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); }
2978
2979  void Qasx(Condition cond, Register rd, Register rn, Register rm) {
2980    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2981    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2982    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2983    VIXL_ASSERT(allow_macro_instructions_);
2984    VIXL_ASSERT(OutsideITBlock());
2985    MacroEmissionCheckScope guard(this);
2986    ITScope it_scope(this, &cond);
2987    qasx(cond, rd, rn, rm);
2988  }
2989  void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); }
2990
2991  void Qdadd(Condition cond, Register rd, Register rm, Register rn) {
2992    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2993    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2995    VIXL_ASSERT(allow_macro_instructions_);
2996    VIXL_ASSERT(OutsideITBlock());
2997    MacroEmissionCheckScope guard(this);
2998    ITScope it_scope(this, &cond);
2999    qdadd(cond, rd, rm, rn);
3000  }
3001  void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); }
3002
3003  void Qdsub(Condition cond, Register rd, Register rm, Register rn) {
3004    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3005    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3006    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3007    VIXL_ASSERT(allow_macro_instructions_);
3008    VIXL_ASSERT(OutsideITBlock());
3009    MacroEmissionCheckScope guard(this);
3010    ITScope it_scope(this, &cond);
3011    qdsub(cond, rd, rm, rn);
3012  }
3013  void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); }
3014
3015  void Qsax(Condition cond, Register rd, Register rn, Register rm) {
3016    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3017    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3018    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3019    VIXL_ASSERT(allow_macro_instructions_);
3020    VIXL_ASSERT(OutsideITBlock());
3021    MacroEmissionCheckScope guard(this);
3022    ITScope it_scope(this, &cond);
3023    qsax(cond, rd, rn, rm);
3024  }
3025  void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); }
3026
3027  void Qsub(Condition cond, Register rd, Register rm, Register rn) {
3028    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3029    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3030    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3031    VIXL_ASSERT(allow_macro_instructions_);
3032    VIXL_ASSERT(OutsideITBlock());
3033    MacroEmissionCheckScope guard(this);
3034    ITScope it_scope(this, &cond);
3035    qsub(cond, rd, rm, rn);
3036  }
3037  void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); }
3038
3039  void Qsub16(Condition cond, Register rd, Register rn, Register rm) {
3040    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3041    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3042    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3043    VIXL_ASSERT(allow_macro_instructions_);
3044    VIXL_ASSERT(OutsideITBlock());
3045    MacroEmissionCheckScope guard(this);
3046    ITScope it_scope(this, &cond);
3047    qsub16(cond, rd, rn, rm);
3048  }
3049  void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); }
3050
3051  void Qsub8(Condition cond, Register rd, Register rn, Register rm) {
3052    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3053    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3054    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3055    VIXL_ASSERT(allow_macro_instructions_);
3056    VIXL_ASSERT(OutsideITBlock());
3057    MacroEmissionCheckScope guard(this);
3058    ITScope it_scope(this, &cond);
3059    qsub8(cond, rd, rn, rm);
3060  }
3061  void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); }
3062
3063  void Rbit(Condition cond, Register rd, Register rm) {
3064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3066    VIXL_ASSERT(allow_macro_instructions_);
3067    VIXL_ASSERT(OutsideITBlock());
3068    MacroEmissionCheckScope guard(this);
3069    ITScope it_scope(this, &cond);
3070    rbit(cond, rd, rm);
3071  }
3072  void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); }
3073
3074  void Rev(Condition cond, Register rd, Register rm) {
3075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3076    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3077    VIXL_ASSERT(allow_macro_instructions_);
3078    VIXL_ASSERT(OutsideITBlock());
3079    MacroEmissionCheckScope guard(this);
3080    ITScope it_scope(this, &cond);
3081    rev(cond, rd, rm);
3082  }
3083  void Rev(Register rd, Register rm) { Rev(al, rd, rm); }
3084
3085  void Rev16(Condition cond, Register rd, Register rm) {
3086    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3087    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3088    VIXL_ASSERT(allow_macro_instructions_);
3089    VIXL_ASSERT(OutsideITBlock());
3090    MacroEmissionCheckScope guard(this);
3091    ITScope it_scope(this, &cond);
3092    rev16(cond, rd, rm);
3093  }
3094  void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); }
3095
3096  void Revsh(Condition cond, Register rd, Register rm) {
3097    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3098    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3099    VIXL_ASSERT(allow_macro_instructions_);
3100    VIXL_ASSERT(OutsideITBlock());
3101    MacroEmissionCheckScope guard(this);
3102    ITScope it_scope(this, &cond);
3103    revsh(cond, rd, rm);
3104  }
3105  void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); }
3106
3107  void Ror(Condition cond, Register rd, Register rm, const Operand& operand) {
3108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3109    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3110    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3111    VIXL_ASSERT(allow_macro_instructions_);
3112    VIXL_ASSERT(OutsideITBlock());
3113    MacroEmissionCheckScope guard(this);
3114    bool can_use_it =
3115        // ROR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
3116        operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
3117        operand.GetBaseRegister().IsLow();
3118    ITScope it_scope(this, &cond, can_use_it);
3119    ror(cond, rd, rm, operand);
3120  }
3121  void Ror(Register rd, Register rm, const Operand& operand) {
3122    Ror(al, rd, rm, operand);
3123  }
3124  void Ror(FlagsUpdate flags,
3125           Condition cond,
3126           Register rd,
3127           Register rm,
3128           const Operand& operand) {
3129    switch (flags) {
3130      case LeaveFlags:
3131        Ror(cond, rd, rm, operand);
3132        break;
3133      case SetFlags:
3134        Rors(cond, rd, rm, operand);
3135        break;
3136      case DontCare:
3137        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3138                                   rm.IsLow() && operand.IsPlainRegister() &&
3139                                   rd.Is(rm);
3140        if (setflags_is_smaller) {
3141          Rors(cond, rd, rm, operand);
3142        } else {
3143          Ror(cond, rd, rm, operand);
3144        }
3145        break;
3146    }
3147  }
3148  void Ror(FlagsUpdate flags,
3149           Register rd,
3150           Register rm,
3151           const Operand& operand) {
3152    Ror(flags, al, rd, rm, operand);
3153  }
3154
3155  void Rors(Condition cond, Register rd, Register rm, const Operand& operand) {
3156    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3158    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3159    VIXL_ASSERT(allow_macro_instructions_);
3160    VIXL_ASSERT(OutsideITBlock());
3161    MacroEmissionCheckScope guard(this);
3162    ITScope it_scope(this, &cond);
3163    rors(cond, rd, rm, operand);
3164  }
3165  void Rors(Register rd, Register rm, const Operand& operand) {
3166    Rors(al, rd, rm, operand);
3167  }
3168
3169  void Rrx(Condition cond, Register rd, Register rm) {
3170    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3171    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3172    VIXL_ASSERT(allow_macro_instructions_);
3173    VIXL_ASSERT(OutsideITBlock());
3174    MacroEmissionCheckScope guard(this);
3175    ITScope it_scope(this, &cond);
3176    rrx(cond, rd, rm);
3177  }
3178  void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); }
3179  void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) {
3180    switch (flags) {
3181      case LeaveFlags:
3182        Rrx(cond, rd, rm);
3183        break;
3184      case SetFlags:
3185        Rrxs(cond, rd, rm);
3186        break;
3187      case DontCare:
3188        Rrx(cond, rd, rm);
3189        break;
3190    }
3191  }
3192  void Rrx(FlagsUpdate flags, Register rd, Register rm) {
3193    Rrx(flags, al, rd, rm);
3194  }
3195
3196  void Rrxs(Condition cond, Register rd, Register rm) {
3197    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3198    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3199    VIXL_ASSERT(allow_macro_instructions_);
3200    VIXL_ASSERT(OutsideITBlock());
3201    MacroEmissionCheckScope guard(this);
3202    ITScope it_scope(this, &cond);
3203    rrxs(cond, rd, rm);
3204  }
3205  void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); }
3206
3207  void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) {
3208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3210    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3211    VIXL_ASSERT(allow_macro_instructions_);
3212    VIXL_ASSERT(OutsideITBlock());
3213    MacroEmissionCheckScope guard(this);
3214    bool can_use_it =
3215        // RSB<c>{<q>} {<Rd>, }<Rn>, #0 ; T1
3216        operand.IsImmediate() && rd.IsLow() && rn.IsLow() &&
3217        (operand.GetImmediate() == 0);
3218    ITScope it_scope(this, &cond, can_use_it);
3219    rsb(cond, rd, rn, operand);
3220  }
3221  void Rsb(Register rd, Register rn, const Operand& operand) {
3222    Rsb(al, rd, rn, operand);
3223  }
3224  void Rsb(FlagsUpdate flags,
3225           Condition cond,
3226           Register rd,
3227           Register rn,
3228           const Operand& operand) {
3229    switch (flags) {
3230      case LeaveFlags:
3231        Rsb(cond, rd, rn, operand);
3232        break;
3233      case SetFlags:
3234        Rsbs(cond, rd, rn, operand);
3235        break;
3236      case DontCare:
3237        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3238                                   rn.IsLow() && operand.IsImmediate() &&
3239                                   (operand.GetImmediate() == 0);
3240        if (setflags_is_smaller) {
3241          Rsbs(cond, rd, rn, operand);
3242        } else {
3243          Rsb(cond, rd, rn, operand);
3244        }
3245        break;
3246    }
3247  }
3248  void Rsb(FlagsUpdate flags,
3249           Register rd,
3250           Register rn,
3251           const Operand& operand) {
3252    Rsb(flags, al, rd, rn, operand);
3253  }
3254
3255  void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) {
3256    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3257    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3258    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3259    VIXL_ASSERT(allow_macro_instructions_);
3260    VIXL_ASSERT(OutsideITBlock());
3261    MacroEmissionCheckScope guard(this);
3262    ITScope it_scope(this, &cond);
3263    rsbs(cond, rd, rn, operand);
3264  }
3265  void Rsbs(Register rd, Register rn, const Operand& operand) {
3266    Rsbs(al, rd, rn, operand);
3267  }
3268
3269  void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) {
3270    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3271    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3272    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3273    VIXL_ASSERT(allow_macro_instructions_);
3274    VIXL_ASSERT(OutsideITBlock());
3275    MacroEmissionCheckScope guard(this);
3276    ITScope it_scope(this, &cond);
3277    rsc(cond, rd, rn, operand);
3278  }
3279  void Rsc(Register rd, Register rn, const Operand& operand) {
3280    Rsc(al, rd, rn, operand);
3281  }
3282  void Rsc(FlagsUpdate flags,
3283           Condition cond,
3284           Register rd,
3285           Register rn,
3286           const Operand& operand) {
3287    switch (flags) {
3288      case LeaveFlags:
3289        Rsc(cond, rd, rn, operand);
3290        break;
3291      case SetFlags:
3292        Rscs(cond, rd, rn, operand);
3293        break;
3294      case DontCare:
3295        Rsc(cond, rd, rn, operand);
3296        break;
3297    }
3298  }
3299  void Rsc(FlagsUpdate flags,
3300           Register rd,
3301           Register rn,
3302           const Operand& operand) {
3303    Rsc(flags, al, rd, rn, operand);
3304  }
3305
3306  void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) {
3307    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3308    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3309    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3310    VIXL_ASSERT(allow_macro_instructions_);
3311    VIXL_ASSERT(OutsideITBlock());
3312    MacroEmissionCheckScope guard(this);
3313    ITScope it_scope(this, &cond);
3314    rscs(cond, rd, rn, operand);
3315  }
3316  void Rscs(Register rd, Register rn, const Operand& operand) {
3317    Rscs(al, rd, rn, operand);
3318  }
3319
3320  void Sadd16(Condition cond, Register rd, Register rn, Register rm) {
3321    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3322    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3323    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3324    VIXL_ASSERT(allow_macro_instructions_);
3325    VIXL_ASSERT(OutsideITBlock());
3326    MacroEmissionCheckScope guard(this);
3327    ITScope it_scope(this, &cond);
3328    sadd16(cond, rd, rn, rm);
3329  }
3330  void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); }
3331
3332  void Sadd8(Condition cond, Register rd, Register rn, Register rm) {
3333    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3334    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3335    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3336    VIXL_ASSERT(allow_macro_instructions_);
3337    VIXL_ASSERT(OutsideITBlock());
3338    MacroEmissionCheckScope guard(this);
3339    ITScope it_scope(this, &cond);
3340    sadd8(cond, rd, rn, rm);
3341  }
3342  void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); }
3343
3344  void Sasx(Condition cond, Register rd, Register rn, Register rm) {
3345    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3346    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3347    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3348    VIXL_ASSERT(allow_macro_instructions_);
3349    VIXL_ASSERT(OutsideITBlock());
3350    MacroEmissionCheckScope guard(this);
3351    ITScope it_scope(this, &cond);
3352    sasx(cond, rd, rn, rm);
3353  }
3354  void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); }
3355
3356  void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) {
3357    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3358    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3359    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3360    VIXL_ASSERT(allow_macro_instructions_);
3361    VIXL_ASSERT(OutsideITBlock());
3362    MacroEmissionCheckScope guard(this);
3363    bool can_use_it =
3364        // SBC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
3365        operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
3366        operand.GetBaseRegister().IsLow();
3367    ITScope it_scope(this, &cond, can_use_it);
3368    sbc(cond, rd, rn, operand);
3369  }
3370  void Sbc(Register rd, Register rn, const Operand& operand) {
3371    Sbc(al, rd, rn, operand);
3372  }
3373  void Sbc(FlagsUpdate flags,
3374           Condition cond,
3375           Register rd,
3376           Register rn,
3377           const Operand& operand) {
3378    switch (flags) {
3379      case LeaveFlags:
3380        Sbc(cond, rd, rn, operand);
3381        break;
3382      case SetFlags:
3383        Sbcs(cond, rd, rn, operand);
3384        break;
3385      case DontCare:
3386        bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3387                                   rn.Is(rd) && operand.IsPlainRegister() &&
3388                                   operand.GetBaseRegister().IsLow();
3389        if (setflags_is_smaller) {
3390          Sbcs(cond, rd, rn, operand);
3391        } else {
3392          Sbc(cond, rd, rn, operand);
3393        }
3394        break;
3395    }
3396  }
3397  void Sbc(FlagsUpdate flags,
3398           Register rd,
3399           Register rn,
3400           const Operand& operand) {
3401    Sbc(flags, al, rd, rn, operand);
3402  }
3403
3404  void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) {
3405    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3406    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3407    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3408    VIXL_ASSERT(allow_macro_instructions_);
3409    VIXL_ASSERT(OutsideITBlock());
3410    MacroEmissionCheckScope guard(this);
3411    ITScope it_scope(this, &cond);
3412    sbcs(cond, rd, rn, operand);
3413  }
3414  void Sbcs(Register rd, Register rn, const Operand& operand) {
3415    Sbcs(al, rd, rn, operand);
3416  }
3417
3418  void Sbfx(Condition cond,
3419            Register rd,
3420            Register rn,
3421            uint32_t lsb,
3422            const Operand& operand) {
3423    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3425    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3426    VIXL_ASSERT(allow_macro_instructions_);
3427    VIXL_ASSERT(OutsideITBlock());
3428    MacroEmissionCheckScope guard(this);
3429    ITScope it_scope(this, &cond);
3430    sbfx(cond, rd, rn, lsb, operand);
3431  }
3432  void Sbfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
3433    Sbfx(al, rd, rn, lsb, operand);
3434  }
3435
3436  void Sdiv(Condition cond, Register rd, Register rn, Register rm) {
3437    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3438    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3440    VIXL_ASSERT(allow_macro_instructions_);
3441    VIXL_ASSERT(OutsideITBlock());
3442    MacroEmissionCheckScope guard(this);
3443    ITScope it_scope(this, &cond);
3444    sdiv(cond, rd, rn, rm);
3445  }
3446  void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); }
3447
3448  void Sel(Condition cond, Register rd, Register rn, Register rm) {
3449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3450    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3451    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3452    VIXL_ASSERT(allow_macro_instructions_);
3453    VIXL_ASSERT(OutsideITBlock());
3454    MacroEmissionCheckScope guard(this);
3455    ITScope it_scope(this, &cond);
3456    sel(cond, rd, rn, rm);
3457  }
3458  void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); }
3459
3460  void Shadd16(Condition cond, Register rd, Register rn, Register rm) {
3461    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3462    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3464    VIXL_ASSERT(allow_macro_instructions_);
3465    VIXL_ASSERT(OutsideITBlock());
3466    MacroEmissionCheckScope guard(this);
3467    ITScope it_scope(this, &cond);
3468    shadd16(cond, rd, rn, rm);
3469  }
3470  void Shadd16(Register rd, Register rn, Register rm) {
3471    Shadd16(al, rd, rn, rm);
3472  }
3473
3474  void Shadd8(Condition cond, Register rd, Register rn, Register rm) {
3475    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3476    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3477    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3478    VIXL_ASSERT(allow_macro_instructions_);
3479    VIXL_ASSERT(OutsideITBlock());
3480    MacroEmissionCheckScope guard(this);
3481    ITScope it_scope(this, &cond);
3482    shadd8(cond, rd, rn, rm);
3483  }
3484  void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); }
3485
3486  void Shasx(Condition cond, Register rd, Register rn, Register rm) {
3487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3488    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3490    VIXL_ASSERT(allow_macro_instructions_);
3491    VIXL_ASSERT(OutsideITBlock());
3492    MacroEmissionCheckScope guard(this);
3493    ITScope it_scope(this, &cond);
3494    shasx(cond, rd, rn, rm);
3495  }
3496  void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); }
3497
3498  void Shsax(Condition cond, Register rd, Register rn, Register rm) {
3499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3501    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3502    VIXL_ASSERT(allow_macro_instructions_);
3503    VIXL_ASSERT(OutsideITBlock());
3504    MacroEmissionCheckScope guard(this);
3505    ITScope it_scope(this, &cond);
3506    shsax(cond, rd, rn, rm);
3507  }
3508  void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); }
3509
3510  void Shsub16(Condition cond, Register rd, Register rn, Register rm) {
3511    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3512    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3513    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3514    VIXL_ASSERT(allow_macro_instructions_);
3515    VIXL_ASSERT(OutsideITBlock());
3516    MacroEmissionCheckScope guard(this);
3517    ITScope it_scope(this, &cond);
3518    shsub16(cond, rd, rn, rm);
3519  }
3520  void Shsub16(Register rd, Register rn, Register rm) {
3521    Shsub16(al, rd, rn, rm);
3522  }
3523
3524  void Shsub8(Condition cond, Register rd, Register rn, Register rm) {
3525    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3526    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3528    VIXL_ASSERT(allow_macro_instructions_);
3529    VIXL_ASSERT(OutsideITBlock());
3530    MacroEmissionCheckScope guard(this);
3531    ITScope it_scope(this, &cond);
3532    shsub8(cond, rd, rn, rm);
3533  }
3534  void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); }
3535
3536  void Smlabb(
3537      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3540    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3541    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3542    VIXL_ASSERT(allow_macro_instructions_);
3543    VIXL_ASSERT(OutsideITBlock());
3544    MacroEmissionCheckScope guard(this);
3545    ITScope it_scope(this, &cond);
3546    smlabb(cond, rd, rn, rm, ra);
3547  }
3548  void Smlabb(Register rd, Register rn, Register rm, Register ra) {
3549    Smlabb(al, rd, rn, rm, ra);
3550  }
3551
3552  void Smlabt(
3553      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3554    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3555    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3556    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3557    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3558    VIXL_ASSERT(allow_macro_instructions_);
3559    VIXL_ASSERT(OutsideITBlock());
3560    MacroEmissionCheckScope guard(this);
3561    ITScope it_scope(this, &cond);
3562    smlabt(cond, rd, rn, rm, ra);
3563  }
3564  void Smlabt(Register rd, Register rn, Register rm, Register ra) {
3565    Smlabt(al, rd, rn, rm, ra);
3566  }
3567
3568  void Smlad(
3569      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3571    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3572    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3573    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3574    VIXL_ASSERT(allow_macro_instructions_);
3575    VIXL_ASSERT(OutsideITBlock());
3576    MacroEmissionCheckScope guard(this);
3577    ITScope it_scope(this, &cond);
3578    smlad(cond, rd, rn, rm, ra);
3579  }
3580  void Smlad(Register rd, Register rn, Register rm, Register ra) {
3581    Smlad(al, rd, rn, rm, ra);
3582  }
3583
3584  void Smladx(
3585      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3586    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3587    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3589    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3590    VIXL_ASSERT(allow_macro_instructions_);
3591    VIXL_ASSERT(OutsideITBlock());
3592    MacroEmissionCheckScope guard(this);
3593    ITScope it_scope(this, &cond);
3594    smladx(cond, rd, rn, rm, ra);
3595  }
3596  void Smladx(Register rd, Register rn, Register rm, Register ra) {
3597    Smladx(al, rd, rn, rm, ra);
3598  }
3599
3600  void Smlal(
3601      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3602    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3606    VIXL_ASSERT(allow_macro_instructions_);
3607    VIXL_ASSERT(OutsideITBlock());
3608    MacroEmissionCheckScope guard(this);
3609    ITScope it_scope(this, &cond);
3610    smlal(cond, rdlo, rdhi, rn, rm);
3611  }
3612  void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
3613    Smlal(al, rdlo, rdhi, rn, rm);
3614  }
3615
3616  void Smlalbb(
3617      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3618    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3621    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3622    VIXL_ASSERT(allow_macro_instructions_);
3623    VIXL_ASSERT(OutsideITBlock());
3624    MacroEmissionCheckScope guard(this);
3625    ITScope it_scope(this, &cond);
3626    smlalbb(cond, rdlo, rdhi, rn, rm);
3627  }
3628  void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
3629    Smlalbb(al, rdlo, rdhi, rn, rm);
3630  }
3631
3632  void Smlalbt(
3633      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3636    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3637    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3638    VIXL_ASSERT(allow_macro_instructions_);
3639    VIXL_ASSERT(OutsideITBlock());
3640    MacroEmissionCheckScope guard(this);
3641    ITScope it_scope(this, &cond);
3642    smlalbt(cond, rdlo, rdhi, rn, rm);
3643  }
3644  void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
3645    Smlalbt(al, rdlo, rdhi, rn, rm);
3646  }
3647
3648  void Smlald(
3649      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3651    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3652    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3654    VIXL_ASSERT(allow_macro_instructions_);
3655    VIXL_ASSERT(OutsideITBlock());
3656    MacroEmissionCheckScope guard(this);
3657    ITScope it_scope(this, &cond);
3658    smlald(cond, rdlo, rdhi, rn, rm);
3659  }
3660  void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
3661    Smlald(al, rdlo, rdhi, rn, rm);
3662  }
3663
3664  void Smlaldx(
3665      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3666    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3670    VIXL_ASSERT(allow_macro_instructions_);
3671    VIXL_ASSERT(OutsideITBlock());
3672    MacroEmissionCheckScope guard(this);
3673    ITScope it_scope(this, &cond);
3674    smlaldx(cond, rdlo, rdhi, rn, rm);
3675  }
3676  void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3677    Smlaldx(al, rdlo, rdhi, rn, rm);
3678  }
3679
3680  void Smlals(
3681      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3682    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3686    VIXL_ASSERT(allow_macro_instructions_);
3687    VIXL_ASSERT(OutsideITBlock());
3688    MacroEmissionCheckScope guard(this);
3689    ITScope it_scope(this, &cond);
3690    smlals(cond, rdlo, rdhi, rn, rm);
3691  }
3692  void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
3693    Smlals(al, rdlo, rdhi, rn, rm);
3694  }
3695
3696  void Smlaltb(
3697      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3700    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3701    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3702    VIXL_ASSERT(allow_macro_instructions_);
3703    VIXL_ASSERT(OutsideITBlock());
3704    MacroEmissionCheckScope guard(this);
3705    ITScope it_scope(this, &cond);
3706    smlaltb(cond, rdlo, rdhi, rn, rm);
3707  }
3708  void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
3709    Smlaltb(al, rdlo, rdhi, rn, rm);
3710  }
3711
3712  void Smlaltt(
3713      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3716    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3717    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3718    VIXL_ASSERT(allow_macro_instructions_);
3719    VIXL_ASSERT(OutsideITBlock());
3720    MacroEmissionCheckScope guard(this);
3721    ITScope it_scope(this, &cond);
3722    smlaltt(cond, rdlo, rdhi, rn, rm);
3723  }
3724  void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
3725    Smlaltt(al, rdlo, rdhi, rn, rm);
3726  }
3727
3728  void Smlatb(
3729      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3733    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3734    VIXL_ASSERT(allow_macro_instructions_);
3735    VIXL_ASSERT(OutsideITBlock());
3736    MacroEmissionCheckScope guard(this);
3737    ITScope it_scope(this, &cond);
3738    smlatb(cond, rd, rn, rm, ra);
3739  }
3740  void Smlatb(Register rd, Register rn, Register rm, Register ra) {
3741    Smlatb(al, rd, rn, rm, ra);
3742  }
3743
3744  void Smlatt(
3745      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3746    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3748    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3749    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3750    VIXL_ASSERT(allow_macro_instructions_);
3751    VIXL_ASSERT(OutsideITBlock());
3752    MacroEmissionCheckScope guard(this);
3753    ITScope it_scope(this, &cond);
3754    smlatt(cond, rd, rn, rm, ra);
3755  }
3756  void Smlatt(Register rd, Register rn, Register rm, Register ra) {
3757    Smlatt(al, rd, rn, rm, ra);
3758  }
3759
3760  void Smlawb(
3761      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3762    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3763    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3764    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3765    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3766    VIXL_ASSERT(allow_macro_instructions_);
3767    VIXL_ASSERT(OutsideITBlock());
3768    MacroEmissionCheckScope guard(this);
3769    ITScope it_scope(this, &cond);
3770    smlawb(cond, rd, rn, rm, ra);
3771  }
3772  void Smlawb(Register rd, Register rn, Register rm, Register ra) {
3773    Smlawb(al, rd, rn, rm, ra);
3774  }
3775
3776  void Smlawt(
3777      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3779    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3780    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3781    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3782    VIXL_ASSERT(allow_macro_instructions_);
3783    VIXL_ASSERT(OutsideITBlock());
3784    MacroEmissionCheckScope guard(this);
3785    ITScope it_scope(this, &cond);
3786    smlawt(cond, rd, rn, rm, ra);
3787  }
3788  void Smlawt(Register rd, Register rn, Register rm, Register ra) {
3789    Smlawt(al, rd, rn, rm, ra);
3790  }
3791
3792  void Smlsd(
3793      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3797    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3798    VIXL_ASSERT(allow_macro_instructions_);
3799    VIXL_ASSERT(OutsideITBlock());
3800    MacroEmissionCheckScope guard(this);
3801    ITScope it_scope(this, &cond);
3802    smlsd(cond, rd, rn, rm, ra);
3803  }
3804  void Smlsd(Register rd, Register rn, Register rm, Register ra) {
3805    Smlsd(al, rd, rn, rm, ra);
3806  }
3807
3808  void Smlsdx(
3809      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3810    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3811    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3813    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3814    VIXL_ASSERT(allow_macro_instructions_);
3815    VIXL_ASSERT(OutsideITBlock());
3816    MacroEmissionCheckScope guard(this);
3817    ITScope it_scope(this, &cond);
3818    smlsdx(cond, rd, rn, rm, ra);
3819  }
3820  void Smlsdx(Register rd, Register rn, Register rm, Register ra) {
3821    Smlsdx(al, rd, rn, rm, ra);
3822  }
3823
3824  void Smlsld(
3825      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3826    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3827    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3828    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3829    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3830    VIXL_ASSERT(allow_macro_instructions_);
3831    VIXL_ASSERT(OutsideITBlock());
3832    MacroEmissionCheckScope guard(this);
3833    ITScope it_scope(this, &cond);
3834    smlsld(cond, rdlo, rdhi, rn, rm);
3835  }
3836  void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
3837    Smlsld(al, rdlo, rdhi, rn, rm);
3838  }
3839
3840  void Smlsldx(
3841      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3844    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3846    VIXL_ASSERT(allow_macro_instructions_);
3847    VIXL_ASSERT(OutsideITBlock());
3848    MacroEmissionCheckScope guard(this);
3849    ITScope it_scope(this, &cond);
3850    smlsldx(cond, rdlo, rdhi, rn, rm);
3851  }
3852  void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3853    Smlsldx(al, rdlo, rdhi, rn, rm);
3854  }
3855
3856  void Smmla(
3857      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3861    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3862    VIXL_ASSERT(allow_macro_instructions_);
3863    VIXL_ASSERT(OutsideITBlock());
3864    MacroEmissionCheckScope guard(this);
3865    ITScope it_scope(this, &cond);
3866    smmla(cond, rd, rn, rm, ra);
3867  }
3868  void Smmla(Register rd, Register rn, Register rm, Register ra) {
3869    Smmla(al, rd, rn, rm, ra);
3870  }
3871
3872  void Smmlar(
3873      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3874    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3877    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3878    VIXL_ASSERT(allow_macro_instructions_);
3879    VIXL_ASSERT(OutsideITBlock());
3880    MacroEmissionCheckScope guard(this);
3881    ITScope it_scope(this, &cond);
3882    smmlar(cond, rd, rn, rm, ra);
3883  }
3884  void Smmlar(Register rd, Register rn, Register rm, Register ra) {
3885    Smmlar(al, rd, rn, rm, ra);
3886  }
3887
3888  void Smmls(
3889      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3892    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3893    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3894    VIXL_ASSERT(allow_macro_instructions_);
3895    VIXL_ASSERT(OutsideITBlock());
3896    MacroEmissionCheckScope guard(this);
3897    ITScope it_scope(this, &cond);
3898    smmls(cond, rd, rn, rm, ra);
3899  }
3900  void Smmls(Register rd, Register rn, Register rm, Register ra) {
3901    Smmls(al, rd, rn, rm, ra);
3902  }
3903
3904  void Smmlsr(
3905      Condition cond, Register rd, Register rn, Register rm, Register ra) {
3906    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3907    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3909    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3910    VIXL_ASSERT(allow_macro_instructions_);
3911    VIXL_ASSERT(OutsideITBlock());
3912    MacroEmissionCheckScope guard(this);
3913    ITScope it_scope(this, &cond);
3914    smmlsr(cond, rd, rn, rm, ra);
3915  }
3916  void Smmlsr(Register rd, Register rn, Register rm, Register ra) {
3917    Smmlsr(al, rd, rn, rm, ra);
3918  }
3919
3920  void Smmul(Condition cond, Register rd, Register rn, Register rm) {
3921    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3922    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3923    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3924    VIXL_ASSERT(allow_macro_instructions_);
3925    VIXL_ASSERT(OutsideITBlock());
3926    MacroEmissionCheckScope guard(this);
3927    ITScope it_scope(this, &cond);
3928    smmul(cond, rd, rn, rm);
3929  }
3930  void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); }
3931
3932  void Smmulr(Condition cond, Register rd, Register rn, Register rm) {
3933    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3934    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3935    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3936    VIXL_ASSERT(allow_macro_instructions_);
3937    VIXL_ASSERT(OutsideITBlock());
3938    MacroEmissionCheckScope guard(this);
3939    ITScope it_scope(this, &cond);
3940    smmulr(cond, rd, rn, rm);
3941  }
3942  void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); }
3943
3944  void Smuad(Condition cond, Register rd, Register rn, Register rm) {
3945    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3946    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3947    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3948    VIXL_ASSERT(allow_macro_instructions_);
3949    VIXL_ASSERT(OutsideITBlock());
3950    MacroEmissionCheckScope guard(this);
3951    ITScope it_scope(this, &cond);
3952    smuad(cond, rd, rn, rm);
3953  }
3954  void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); }
3955
3956  void Smuadx(Condition cond, Register rd, Register rn, Register rm) {
3957    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3958    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3959    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3960    VIXL_ASSERT(allow_macro_instructions_);
3961    VIXL_ASSERT(OutsideITBlock());
3962    MacroEmissionCheckScope guard(this);
3963    ITScope it_scope(this, &cond);
3964    smuadx(cond, rd, rn, rm);
3965  }
3966  void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); }
3967
3968  void Smulbb(Condition cond, Register rd, Register rn, Register rm) {
3969    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3970    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3971    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3972    VIXL_ASSERT(allow_macro_instructions_);
3973    VIXL_ASSERT(OutsideITBlock());
3974    MacroEmissionCheckScope guard(this);
3975    ITScope it_scope(this, &cond);
3976    smulbb(cond, rd, rn, rm);
3977  }
3978  void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); }
3979
3980  void Smulbt(Condition cond, Register rd, Register rn, Register rm) {
3981    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3982    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3983    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3984    VIXL_ASSERT(allow_macro_instructions_);
3985    VIXL_ASSERT(OutsideITBlock());
3986    MacroEmissionCheckScope guard(this);
3987    ITScope it_scope(this, &cond);
3988    smulbt(cond, rd, rn, rm);
3989  }
3990  void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); }
3991
3992  void Smull(
3993      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3997    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3998    VIXL_ASSERT(allow_macro_instructions_);
3999    VIXL_ASSERT(OutsideITBlock());
4000    MacroEmissionCheckScope guard(this);
4001    ITScope it_scope(this, &cond);
4002    smull(cond, rdlo, rdhi, rn, rm);
4003  }
4004  void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
4005    Smull(al, rdlo, rdhi, rn, rm);
4006  }
4007  void Smull(FlagsUpdate flags,
4008             Condition cond,
4009             Register rdlo,
4010             Register rdhi,
4011             Register rn,
4012             Register rm) {
4013    switch (flags) {
4014      case LeaveFlags:
4015        Smull(cond, rdlo, rdhi, rn, rm);
4016        break;
4017      case SetFlags:
4018        Smulls(cond, rdlo, rdhi, rn, rm);
4019        break;
4020      case DontCare:
4021        Smull(cond, rdlo, rdhi, rn, rm);
4022        break;
4023    }
4024  }
4025  void Smull(FlagsUpdate flags,
4026             Register rdlo,
4027             Register rdhi,
4028             Register rn,
4029             Register rm) {
4030    Smull(flags, al, rdlo, rdhi, rn, rm);
4031  }
4032
4033  void Smulls(
4034      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4035    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4036    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4037    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4038    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4039    VIXL_ASSERT(allow_macro_instructions_);
4040    VIXL_ASSERT(OutsideITBlock());
4041    MacroEmissionCheckScope guard(this);
4042    ITScope it_scope(this, &cond);
4043    smulls(cond, rdlo, rdhi, rn, rm);
4044  }
4045  void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4046    Smulls(al, rdlo, rdhi, rn, rm);
4047  }
4048
4049  void Smultb(Condition cond, Register rd, Register rn, Register rm) {
4050    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4051    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4052    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4053    VIXL_ASSERT(allow_macro_instructions_);
4054    VIXL_ASSERT(OutsideITBlock());
4055    MacroEmissionCheckScope guard(this);
4056    ITScope it_scope(this, &cond);
4057    smultb(cond, rd, rn, rm);
4058  }
4059  void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); }
4060
4061  void Smultt(Condition cond, Register rd, Register rn, Register rm) {
4062    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4065    VIXL_ASSERT(allow_macro_instructions_);
4066    VIXL_ASSERT(OutsideITBlock());
4067    MacroEmissionCheckScope guard(this);
4068    ITScope it_scope(this, &cond);
4069    smultt(cond, rd, rn, rm);
4070  }
4071  void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); }
4072
4073  void Smulwb(Condition cond, Register rd, Register rn, Register rm) {
4074    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4076    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4077    VIXL_ASSERT(allow_macro_instructions_);
4078    VIXL_ASSERT(OutsideITBlock());
4079    MacroEmissionCheckScope guard(this);
4080    ITScope it_scope(this, &cond);
4081    smulwb(cond, rd, rn, rm);
4082  }
4083  void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); }
4084
4085  void Smulwt(Condition cond, Register rd, Register rn, Register rm) {
4086    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4087    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4088    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4089    VIXL_ASSERT(allow_macro_instructions_);
4090    VIXL_ASSERT(OutsideITBlock());
4091    MacroEmissionCheckScope guard(this);
4092    ITScope it_scope(this, &cond);
4093    smulwt(cond, rd, rn, rm);
4094  }
4095  void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); }
4096
4097  void Smusd(Condition cond, Register rd, Register rn, Register rm) {
4098    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4099    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4100    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4101    VIXL_ASSERT(allow_macro_instructions_);
4102    VIXL_ASSERT(OutsideITBlock());
4103    MacroEmissionCheckScope guard(this);
4104    ITScope it_scope(this, &cond);
4105    smusd(cond, rd, rn, rm);
4106  }
4107  void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); }
4108
4109  void Smusdx(Condition cond, Register rd, Register rn, Register rm) {
4110    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4112    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4113    VIXL_ASSERT(allow_macro_instructions_);
4114    VIXL_ASSERT(OutsideITBlock());
4115    MacroEmissionCheckScope guard(this);
4116    ITScope it_scope(this, &cond);
4117    smusdx(cond, rd, rn, rm);
4118  }
4119  void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); }
4120
4121  void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
4122    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4123    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4124    VIXL_ASSERT(allow_macro_instructions_);
4125    VIXL_ASSERT(OutsideITBlock());
4126    MacroEmissionCheckScope guard(this);
4127    ITScope it_scope(this, &cond);
4128    ssat(cond, rd, imm, operand);
4129  }
4130  void Ssat(Register rd, uint32_t imm, const Operand& operand) {
4131    Ssat(al, rd, imm, operand);
4132  }
4133
4134  void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) {
4135    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4136    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4137    VIXL_ASSERT(allow_macro_instructions_);
4138    VIXL_ASSERT(OutsideITBlock());
4139    MacroEmissionCheckScope guard(this);
4140    ITScope it_scope(this, &cond);
4141    ssat16(cond, rd, imm, rn);
4142  }
4143  void Ssat16(Register rd, uint32_t imm, Register rn) {
4144    Ssat16(al, rd, imm, rn);
4145  }
4146
4147  void Ssax(Condition cond, Register rd, Register rn, Register rm) {
4148    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4149    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4150    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4151    VIXL_ASSERT(allow_macro_instructions_);
4152    VIXL_ASSERT(OutsideITBlock());
4153    MacroEmissionCheckScope guard(this);
4154    ITScope it_scope(this, &cond);
4155    ssax(cond, rd, rn, rm);
4156  }
4157  void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); }
4158
4159  void Ssub16(Condition cond, Register rd, Register rn, Register rm) {
4160    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4161    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4162    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4163    VIXL_ASSERT(allow_macro_instructions_);
4164    VIXL_ASSERT(OutsideITBlock());
4165    MacroEmissionCheckScope guard(this);
4166    ITScope it_scope(this, &cond);
4167    ssub16(cond, rd, rn, rm);
4168  }
4169  void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); }
4170
4171  void Ssub8(Condition cond, Register rd, Register rn, Register rm) {
4172    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4173    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4174    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4175    VIXL_ASSERT(allow_macro_instructions_);
4176    VIXL_ASSERT(OutsideITBlock());
4177    MacroEmissionCheckScope guard(this);
4178    ITScope it_scope(this, &cond);
4179    ssub8(cond, rd, rn, rm);
4180  }
4181  void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); }
4182
4183  void Stl(Condition cond, Register rt, const MemOperand& operand) {
4184    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4185    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4186    VIXL_ASSERT(allow_macro_instructions_);
4187    VIXL_ASSERT(OutsideITBlock());
4188    MacroEmissionCheckScope guard(this);
4189    ITScope it_scope(this, &cond);
4190    stl(cond, rt, operand);
4191  }
4192  void Stl(Register rt, const MemOperand& operand) { Stl(al, rt, operand); }
4193
4194  void Stlb(Condition cond, Register rt, const MemOperand& operand) {
4195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4196    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4197    VIXL_ASSERT(allow_macro_instructions_);
4198    VIXL_ASSERT(OutsideITBlock());
4199    MacroEmissionCheckScope guard(this);
4200    ITScope it_scope(this, &cond);
4201    stlb(cond, rt, operand);
4202  }
4203  void Stlb(Register rt, const MemOperand& operand) { Stlb(al, rt, operand); }
4204
4205  void Stlex(Condition cond,
4206             Register rd,
4207             Register rt,
4208             const MemOperand& operand) {
4209    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4210    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4211    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4212    VIXL_ASSERT(allow_macro_instructions_);
4213    VIXL_ASSERT(OutsideITBlock());
4214    MacroEmissionCheckScope guard(this);
4215    ITScope it_scope(this, &cond);
4216    stlex(cond, rd, rt, operand);
4217  }
4218  void Stlex(Register rd, Register rt, const MemOperand& operand) {
4219    Stlex(al, rd, rt, operand);
4220  }
4221
4222  void Stlexb(Condition cond,
4223              Register rd,
4224              Register rt,
4225              const MemOperand& operand) {
4226    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4227    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4228    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4229    VIXL_ASSERT(allow_macro_instructions_);
4230    VIXL_ASSERT(OutsideITBlock());
4231    MacroEmissionCheckScope guard(this);
4232    ITScope it_scope(this, &cond);
4233    stlexb(cond, rd, rt, operand);
4234  }
4235  void Stlexb(Register rd, Register rt, const MemOperand& operand) {
4236    Stlexb(al, rd, rt, operand);
4237  }
4238
4239  void Stlexd(Condition cond,
4240              Register rd,
4241              Register rt,
4242              Register rt2,
4243              const MemOperand& operand) {
4244    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4245    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4247    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4248    VIXL_ASSERT(allow_macro_instructions_);
4249    VIXL_ASSERT(OutsideITBlock());
4250    MacroEmissionCheckScope guard(this);
4251    ITScope it_scope(this, &cond);
4252    stlexd(cond, rd, rt, rt2, operand);
4253  }
4254  void Stlexd(Register rd,
4255              Register rt,
4256              Register rt2,
4257              const MemOperand& operand) {
4258    Stlexd(al, rd, rt, rt2, operand);
4259  }
4260
4261  void Stlexh(Condition cond,
4262              Register rd,
4263              Register rt,
4264              const MemOperand& operand) {
4265    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4266    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4267    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4268    VIXL_ASSERT(allow_macro_instructions_);
4269    VIXL_ASSERT(OutsideITBlock());
4270    MacroEmissionCheckScope guard(this);
4271    ITScope it_scope(this, &cond);
4272    stlexh(cond, rd, rt, operand);
4273  }
4274  void Stlexh(Register rd, Register rt, const MemOperand& operand) {
4275    Stlexh(al, rd, rt, operand);
4276  }
4277
4278  void Stlh(Condition cond, Register rt, const MemOperand& operand) {
4279    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4280    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4281    VIXL_ASSERT(allow_macro_instructions_);
4282    VIXL_ASSERT(OutsideITBlock());
4283    MacroEmissionCheckScope guard(this);
4284    ITScope it_scope(this, &cond);
4285    stlh(cond, rt, operand);
4286  }
4287  void Stlh(Register rt, const MemOperand& operand) { Stlh(al, rt, operand); }
4288
4289  void Stm(Condition cond,
4290           Register rn,
4291           WriteBack write_back,
4292           RegisterList registers) {
4293    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4294    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4295    VIXL_ASSERT(allow_macro_instructions_);
4296    VIXL_ASSERT(OutsideITBlock());
4297    MacroEmissionCheckScope guard(this);
4298    ITScope it_scope(this, &cond);
4299    stm(cond, rn, write_back, registers);
4300  }
4301  void Stm(Register rn, WriteBack write_back, RegisterList registers) {
4302    Stm(al, rn, write_back, registers);
4303  }
4304
4305  void Stmda(Condition cond,
4306             Register rn,
4307             WriteBack write_back,
4308             RegisterList registers) {
4309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4310    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4311    VIXL_ASSERT(allow_macro_instructions_);
4312    VIXL_ASSERT(OutsideITBlock());
4313    MacroEmissionCheckScope guard(this);
4314    ITScope it_scope(this, &cond);
4315    stmda(cond, rn, write_back, registers);
4316  }
4317  void Stmda(Register rn, WriteBack write_back, RegisterList registers) {
4318    Stmda(al, rn, write_back, registers);
4319  }
4320
4321  void Stmdb(Condition cond,
4322             Register rn,
4323             WriteBack write_back,
4324             RegisterList registers) {
4325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4326    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4327    VIXL_ASSERT(allow_macro_instructions_);
4328    VIXL_ASSERT(OutsideITBlock());
4329    MacroEmissionCheckScope guard(this);
4330    ITScope it_scope(this, &cond);
4331    stmdb(cond, rn, write_back, registers);
4332  }
4333  void Stmdb(Register rn, WriteBack write_back, RegisterList registers) {
4334    Stmdb(al, rn, write_back, registers);
4335  }
4336
4337  void Stmea(Condition cond,
4338             Register rn,
4339             WriteBack write_back,
4340             RegisterList registers) {
4341    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4342    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4343    VIXL_ASSERT(allow_macro_instructions_);
4344    VIXL_ASSERT(OutsideITBlock());
4345    MacroEmissionCheckScope guard(this);
4346    ITScope it_scope(this, &cond);
4347    stmea(cond, rn, write_back, registers);
4348  }
4349  void Stmea(Register rn, WriteBack write_back, RegisterList registers) {
4350    Stmea(al, rn, write_back, registers);
4351  }
4352
4353  void Stmed(Condition cond,
4354             Register rn,
4355             WriteBack write_back,
4356             RegisterList registers) {
4357    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4358    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4359    VIXL_ASSERT(allow_macro_instructions_);
4360    VIXL_ASSERT(OutsideITBlock());
4361    MacroEmissionCheckScope guard(this);
4362    ITScope it_scope(this, &cond);
4363    stmed(cond, rn, write_back, registers);
4364  }
4365  void Stmed(Register rn, WriteBack write_back, RegisterList registers) {
4366    Stmed(al, rn, write_back, registers);
4367  }
4368
4369  void Stmfa(Condition cond,
4370             Register rn,
4371             WriteBack write_back,
4372             RegisterList registers) {
4373    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4374    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4375    VIXL_ASSERT(allow_macro_instructions_);
4376    VIXL_ASSERT(OutsideITBlock());
4377    MacroEmissionCheckScope guard(this);
4378    ITScope it_scope(this, &cond);
4379    stmfa(cond, rn, write_back, registers);
4380  }
4381  void Stmfa(Register rn, WriteBack write_back, RegisterList registers) {
4382    Stmfa(al, rn, write_back, registers);
4383  }
4384
4385  void Stmfd(Condition cond,
4386             Register rn,
4387             WriteBack write_back,
4388             RegisterList registers) {
4389    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4390    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4391    VIXL_ASSERT(allow_macro_instructions_);
4392    VIXL_ASSERT(OutsideITBlock());
4393    MacroEmissionCheckScope guard(this);
4394    ITScope it_scope(this, &cond);
4395    stmfd(cond, rn, write_back, registers);
4396  }
4397  void Stmfd(Register rn, WriteBack write_back, RegisterList registers) {
4398    Stmfd(al, rn, write_back, registers);
4399  }
4400
4401  void Stmib(Condition cond,
4402             Register rn,
4403             WriteBack write_back,
4404             RegisterList registers) {
4405    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4406    VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4407    VIXL_ASSERT(allow_macro_instructions_);
4408    VIXL_ASSERT(OutsideITBlock());
4409    MacroEmissionCheckScope guard(this);
4410    ITScope it_scope(this, &cond);
4411    stmib(cond, rn, write_back, registers);
4412  }
4413  void Stmib(Register rn, WriteBack write_back, RegisterList registers) {
4414    Stmib(al, rn, write_back, registers);
4415  }
4416
4417  void Str(Condition cond, Register rt, const MemOperand& operand) {
4418    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4419    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4420    VIXL_ASSERT(allow_macro_instructions_);
4421    VIXL_ASSERT(OutsideITBlock());
4422    MacroEmissionCheckScope guard(this);
4423    bool can_use_it =
4424        // STR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4425        (operand.IsImmediate() && rt.IsLow() &&
4426         operand.GetBaseRegister().IsLow() &&
4427         operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
4428         (operand.GetAddrMode() == Offset)) ||
4429        // STR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
4430        (operand.IsImmediate() && rt.IsLow() &&
4431         operand.GetBaseRegister().IsSP() &&
4432         operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
4433         (operand.GetAddrMode() == Offset)) ||
4434        // STR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4435        (operand.IsPlainRegister() && rt.IsLow() &&
4436         operand.GetBaseRegister().IsLow() &&
4437         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4438         (operand.GetAddrMode() == Offset));
4439    ITScope it_scope(this, &cond, can_use_it);
4440    str(cond, rt, operand);
4441  }
4442  void Str(Register rt, const MemOperand& operand) { Str(al, rt, operand); }
4443
4444  void Strb(Condition cond, Register rt, const MemOperand& operand) {
4445    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4446    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4447    VIXL_ASSERT(allow_macro_instructions_);
4448    VIXL_ASSERT(OutsideITBlock());
4449    MacroEmissionCheckScope guard(this);
4450    bool can_use_it =
4451        // STRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4452        (operand.IsImmediate() && rt.IsLow() &&
4453         operand.GetBaseRegister().IsLow() &&
4454         operand.IsOffsetImmediateWithinRange(0, 31) &&
4455         (operand.GetAddrMode() == Offset)) ||
4456        // STRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4457        (operand.IsPlainRegister() && rt.IsLow() &&
4458         operand.GetBaseRegister().IsLow() &&
4459         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4460         (operand.GetAddrMode() == Offset));
4461    ITScope it_scope(this, &cond, can_use_it);
4462    strb(cond, rt, operand);
4463  }
4464  void Strb(Register rt, const MemOperand& operand) { Strb(al, rt, operand); }
4465
4466  void Strd(Condition cond,
4467            Register rt,
4468            Register rt2,
4469            const MemOperand& operand) {
4470    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4471    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4472    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4473    VIXL_ASSERT(allow_macro_instructions_);
4474    VIXL_ASSERT(OutsideITBlock());
4475    MacroEmissionCheckScope guard(this);
4476    ITScope it_scope(this, &cond);
4477    strd(cond, rt, rt2, operand);
4478  }
4479  void Strd(Register rt, Register rt2, const MemOperand& operand) {
4480    Strd(al, rt, rt2, operand);
4481  }
4482
4483  void Strex(Condition cond,
4484             Register rd,
4485             Register rt,
4486             const MemOperand& operand) {
4487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4488    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4489    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4490    VIXL_ASSERT(allow_macro_instructions_);
4491    VIXL_ASSERT(OutsideITBlock());
4492    MacroEmissionCheckScope guard(this);
4493    ITScope it_scope(this, &cond);
4494    strex(cond, rd, rt, operand);
4495  }
4496  void Strex(Register rd, Register rt, const MemOperand& operand) {
4497    Strex(al, rd, rt, operand);
4498  }
4499
4500  void Strexb(Condition cond,
4501              Register rd,
4502              Register rt,
4503              const MemOperand& operand) {
4504    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4505    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4506    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4507    VIXL_ASSERT(allow_macro_instructions_);
4508    VIXL_ASSERT(OutsideITBlock());
4509    MacroEmissionCheckScope guard(this);
4510    ITScope it_scope(this, &cond);
4511    strexb(cond, rd, rt, operand);
4512  }
4513  void Strexb(Register rd, Register rt, const MemOperand& operand) {
4514    Strexb(al, rd, rt, operand);
4515  }
4516
4517  void Strexd(Condition cond,
4518              Register rd,
4519              Register rt,
4520              Register rt2,
4521              const MemOperand& operand) {
4522    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4523    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4524    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4525    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4526    VIXL_ASSERT(allow_macro_instructions_);
4527    VIXL_ASSERT(OutsideITBlock());
4528    MacroEmissionCheckScope guard(this);
4529    ITScope it_scope(this, &cond);
4530    strexd(cond, rd, rt, rt2, operand);
4531  }
4532  void Strexd(Register rd,
4533              Register rt,
4534              Register rt2,
4535              const MemOperand& operand) {
4536    Strexd(al, rd, rt, rt2, operand);
4537  }
4538
4539  void Strexh(Condition cond,
4540              Register rd,
4541              Register rt,
4542              const MemOperand& operand) {
4543    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4544    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4545    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4546    VIXL_ASSERT(allow_macro_instructions_);
4547    VIXL_ASSERT(OutsideITBlock());
4548    MacroEmissionCheckScope guard(this);
4549    ITScope it_scope(this, &cond);
4550    strexh(cond, rd, rt, operand);
4551  }
4552  void Strexh(Register rd, Register rt, const MemOperand& operand) {
4553    Strexh(al, rd, rt, operand);
4554  }
4555
4556  void Strh(Condition cond, Register rt, const MemOperand& operand) {
4557    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4558    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4559    VIXL_ASSERT(allow_macro_instructions_);
4560    VIXL_ASSERT(OutsideITBlock());
4561    MacroEmissionCheckScope guard(this);
4562    bool can_use_it =
4563        // STRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4564        (operand.IsImmediate() && rt.IsLow() &&
4565         operand.GetBaseRegister().IsLow() &&
4566         operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
4567         (operand.GetAddrMode() == Offset)) ||
4568        // STRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4569        (operand.IsPlainRegister() && rt.IsLow() &&
4570         operand.GetBaseRegister().IsLow() &&
4571         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4572         (operand.GetAddrMode() == Offset));
4573    ITScope it_scope(this, &cond, can_use_it);
4574    strh(cond, rt, operand);
4575  }
4576  void Strh(Register rt, const MemOperand& operand) { Strh(al, rt, operand); }
4577
4578  void Sub(Condition cond, Register rd, Register rn, const Operand& operand) {
4579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4581    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4582    VIXL_ASSERT(allow_macro_instructions_);
4583    VIXL_ASSERT(OutsideITBlock());
4584    MacroEmissionCheckScope guard(this);
4585    if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
4586      uint32_t immediate = operand.GetImmediate();
4587      if (immediate == 0) {
4588        return;
4589      }
4590    }
4591    bool can_use_it =
4592        // SUB<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
4593        (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
4594         rd.IsLow()) ||
4595        // SUB<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
4596        (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
4597         rd.IsLow() && rn.Is(rd)) ||
4598        // SUB<c>{<q>} <Rd>, <Rn>, <Rm>
4599        (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4600         operand.GetBaseRegister().IsLow());
4601    ITScope it_scope(this, &cond, can_use_it);
4602    sub(cond, rd, rn, operand);
4603  }
4604  void Sub(Register rd, Register rn, const Operand& operand) {
4605    Sub(al, rd, rn, operand);
4606  }
4607  void Sub(FlagsUpdate flags,
4608           Condition cond,
4609           Register rd,
4610           Register rn,
4611           const Operand& operand) {
4612    switch (flags) {
4613      case LeaveFlags:
4614        Sub(cond, rd, rn, operand);
4615        break;
4616      case SetFlags:
4617        Subs(cond, rd, rn, operand);
4618        break;
4619      case DontCare:
4620        bool setflags_is_smaller =
4621            IsUsingT32() && cond.Is(al) &&
4622            ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4623              operand.GetBaseRegister().IsLow()) ||
4624             (operand.IsImmediate() &&
4625              ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
4626               (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
4627        if (setflags_is_smaller) {
4628          Subs(cond, rd, rn, operand);
4629        } else {
4630          bool changed_op_is_smaller =
4631              operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
4632              ((rd.IsLow() && rn.IsLow() &&
4633                (operand.GetSignedImmediate() >= -7)) ||
4634               (rd.IsLow() && rn.Is(rd) &&
4635                (operand.GetSignedImmediate() >= -255)));
4636          if (changed_op_is_smaller) {
4637            Adds(cond, rd, rn, -operand.GetSignedImmediate());
4638          } else {
4639            Sub(cond, rd, rn, operand);
4640          }
4641        }
4642        break;
4643    }
4644  }
4645  void Sub(FlagsUpdate flags,
4646           Register rd,
4647           Register rn,
4648           const Operand& operand) {
4649    Sub(flags, al, rd, rn, operand);
4650  }
4651
4652  void Subs(Condition cond, Register rd, Register rn, const Operand& operand) {
4653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4655    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4656    VIXL_ASSERT(allow_macro_instructions_);
4657    VIXL_ASSERT(OutsideITBlock());
4658    MacroEmissionCheckScope guard(this);
4659    ITScope it_scope(this, &cond);
4660    subs(cond, rd, rn, operand);
4661  }
4662  void Subs(Register rd, Register rn, const Operand& operand) {
4663    Subs(al, rd, rn, operand);
4664  }
4665
4666
4667  void Svc(Condition cond, uint32_t imm) {
4668    VIXL_ASSERT(allow_macro_instructions_);
4669    VIXL_ASSERT(OutsideITBlock());
4670    MacroEmissionCheckScope guard(this);
4671    ITScope it_scope(this, &cond);
4672    svc(cond, imm);
4673  }
4674  void Svc(uint32_t imm) { Svc(al, imm); }
4675
4676  void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
4677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4678    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4679    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4680    VIXL_ASSERT(allow_macro_instructions_);
4681    VIXL_ASSERT(OutsideITBlock());
4682    MacroEmissionCheckScope guard(this);
4683    ITScope it_scope(this, &cond);
4684    sxtab(cond, rd, rn, operand);
4685  }
4686  void Sxtab(Register rd, Register rn, const Operand& operand) {
4687    Sxtab(al, rd, rn, operand);
4688  }
4689
4690  void Sxtab16(Condition cond,
4691               Register rd,
4692               Register rn,
4693               const Operand& operand) {
4694    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4695    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4696    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4697    VIXL_ASSERT(allow_macro_instructions_);
4698    VIXL_ASSERT(OutsideITBlock());
4699    MacroEmissionCheckScope guard(this);
4700    ITScope it_scope(this, &cond);
4701    sxtab16(cond, rd, rn, operand);
4702  }
4703  void Sxtab16(Register rd, Register rn, const Operand& operand) {
4704    Sxtab16(al, rd, rn, operand);
4705  }
4706
4707  void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
4708    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4709    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4710    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4711    VIXL_ASSERT(allow_macro_instructions_);
4712    VIXL_ASSERT(OutsideITBlock());
4713    MacroEmissionCheckScope guard(this);
4714    ITScope it_scope(this, &cond);
4715    sxtah(cond, rd, rn, operand);
4716  }
4717  void Sxtah(Register rd, Register rn, const Operand& operand) {
4718    Sxtah(al, rd, rn, operand);
4719  }
4720
4721  void Sxtb(Condition cond, Register rd, const Operand& operand) {
4722    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4723    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4724    VIXL_ASSERT(allow_macro_instructions_);
4725    VIXL_ASSERT(OutsideITBlock());
4726    MacroEmissionCheckScope guard(this);
4727    ITScope it_scope(this, &cond);
4728    sxtb(cond, rd, operand);
4729  }
4730  void Sxtb(Register rd, const Operand& operand) { Sxtb(al, rd, operand); }
4731
4732  void Sxtb16(Condition cond, Register rd, const Operand& operand) {
4733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4734    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4735    VIXL_ASSERT(allow_macro_instructions_);
4736    VIXL_ASSERT(OutsideITBlock());
4737    MacroEmissionCheckScope guard(this);
4738    ITScope it_scope(this, &cond);
4739    sxtb16(cond, rd, operand);
4740  }
4741  void Sxtb16(Register rd, const Operand& operand) { Sxtb16(al, rd, operand); }
4742
4743  void Sxth(Condition cond, Register rd, const Operand& operand) {
4744    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4745    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4746    VIXL_ASSERT(allow_macro_instructions_);
4747    VIXL_ASSERT(OutsideITBlock());
4748    MacroEmissionCheckScope guard(this);
4749    ITScope it_scope(this, &cond);
4750    sxth(cond, rd, operand);
4751  }
4752  void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); }
4753
4754
4755  void Teq(Condition cond, Register rn, const Operand& operand) {
4756    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4757    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4758    VIXL_ASSERT(allow_macro_instructions_);
4759    VIXL_ASSERT(OutsideITBlock());
4760    MacroEmissionCheckScope guard(this);
4761    ITScope it_scope(this, &cond);
4762    teq(cond, rn, operand);
4763  }
4764  void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); }
4765
4766  void Tst(Condition cond, Register rn, const Operand& operand) {
4767    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4768    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4769    VIXL_ASSERT(allow_macro_instructions_);
4770    VIXL_ASSERT(OutsideITBlock());
4771    MacroEmissionCheckScope guard(this);
4772    bool can_use_it =
4773        // TST{<c>}{<q>} <Rn>, <Rm> ; T1
4774        operand.IsPlainRegister() && rn.IsLow() &&
4775        operand.GetBaseRegister().IsLow();
4776    ITScope it_scope(this, &cond, can_use_it);
4777    tst(cond, rn, operand);
4778  }
4779  void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); }
4780
4781  void Uadd16(Condition cond, Register rd, Register rn, Register rm) {
4782    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4783    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4784    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4785    VIXL_ASSERT(allow_macro_instructions_);
4786    VIXL_ASSERT(OutsideITBlock());
4787    MacroEmissionCheckScope guard(this);
4788    ITScope it_scope(this, &cond);
4789    uadd16(cond, rd, rn, rm);
4790  }
4791  void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); }
4792
4793  void Uadd8(Condition cond, Register rd, Register rn, Register rm) {
4794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4797    VIXL_ASSERT(allow_macro_instructions_);
4798    VIXL_ASSERT(OutsideITBlock());
4799    MacroEmissionCheckScope guard(this);
4800    ITScope it_scope(this, &cond);
4801    uadd8(cond, rd, rn, rm);
4802  }
4803  void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); }
4804
4805  void Uasx(Condition cond, Register rd, Register rn, Register rm) {
4806    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4807    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4808    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4809    VIXL_ASSERT(allow_macro_instructions_);
4810    VIXL_ASSERT(OutsideITBlock());
4811    MacroEmissionCheckScope guard(this);
4812    ITScope it_scope(this, &cond);
4813    uasx(cond, rd, rn, rm);
4814  }
4815  void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); }
4816
4817  void Ubfx(Condition cond,
4818            Register rd,
4819            Register rn,
4820            uint32_t lsb,
4821            const Operand& operand) {
4822    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4823    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4824    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4825    VIXL_ASSERT(allow_macro_instructions_);
4826    VIXL_ASSERT(OutsideITBlock());
4827    MacroEmissionCheckScope guard(this);
4828    ITScope it_scope(this, &cond);
4829    ubfx(cond, rd, rn, lsb, operand);
4830  }
4831  void Ubfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
4832    Ubfx(al, rd, rn, lsb, operand);
4833  }
4834
4835  void Udf(Condition cond, uint32_t imm) {
4836    VIXL_ASSERT(allow_macro_instructions_);
4837    VIXL_ASSERT(OutsideITBlock());
4838    MacroEmissionCheckScope guard(this);
4839    ITScope it_scope(this, &cond);
4840    udf(cond, imm);
4841  }
4842  void Udf(uint32_t imm) { Udf(al, imm); }
4843
4844  void Udiv(Condition cond, Register rd, Register rn, Register rm) {
4845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4846    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4847    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4848    VIXL_ASSERT(allow_macro_instructions_);
4849    VIXL_ASSERT(OutsideITBlock());
4850    MacroEmissionCheckScope guard(this);
4851    ITScope it_scope(this, &cond);
4852    udiv(cond, rd, rn, rm);
4853  }
4854  void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); }
4855
4856  void Uhadd16(Condition cond, Register rd, Register rn, Register rm) {
4857    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4860    VIXL_ASSERT(allow_macro_instructions_);
4861    VIXL_ASSERT(OutsideITBlock());
4862    MacroEmissionCheckScope guard(this);
4863    ITScope it_scope(this, &cond);
4864    uhadd16(cond, rd, rn, rm);
4865  }
4866  void Uhadd16(Register rd, Register rn, Register rm) {
4867    Uhadd16(al, rd, rn, rm);
4868  }
4869
4870  void Uhadd8(Condition cond, Register rd, Register rn, Register rm) {
4871    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4872    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4873    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4874    VIXL_ASSERT(allow_macro_instructions_);
4875    VIXL_ASSERT(OutsideITBlock());
4876    MacroEmissionCheckScope guard(this);
4877    ITScope it_scope(this, &cond);
4878    uhadd8(cond, rd, rn, rm);
4879  }
4880  void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); }
4881
4882  void Uhasx(Condition cond, Register rd, Register rn, Register rm) {
4883    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4884    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4885    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4886    VIXL_ASSERT(allow_macro_instructions_);
4887    VIXL_ASSERT(OutsideITBlock());
4888    MacroEmissionCheckScope guard(this);
4889    ITScope it_scope(this, &cond);
4890    uhasx(cond, rd, rn, rm);
4891  }
4892  void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); }
4893
4894  void Uhsax(Condition cond, Register rd, Register rn, Register rm) {
4895    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4896    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4897    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4898    VIXL_ASSERT(allow_macro_instructions_);
4899    VIXL_ASSERT(OutsideITBlock());
4900    MacroEmissionCheckScope guard(this);
4901    ITScope it_scope(this, &cond);
4902    uhsax(cond, rd, rn, rm);
4903  }
4904  void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); }
4905
4906  void Uhsub16(Condition cond, Register rd, Register rn, Register rm) {
4907    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4909    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4910    VIXL_ASSERT(allow_macro_instructions_);
4911    VIXL_ASSERT(OutsideITBlock());
4912    MacroEmissionCheckScope guard(this);
4913    ITScope it_scope(this, &cond);
4914    uhsub16(cond, rd, rn, rm);
4915  }
4916  void Uhsub16(Register rd, Register rn, Register rm) {
4917    Uhsub16(al, rd, rn, rm);
4918  }
4919
4920  void Uhsub8(Condition cond, Register rd, Register rn, Register rm) {
4921    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4922    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4923    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4924    VIXL_ASSERT(allow_macro_instructions_);
4925    VIXL_ASSERT(OutsideITBlock());
4926    MacroEmissionCheckScope guard(this);
4927    ITScope it_scope(this, &cond);
4928    uhsub8(cond, rd, rn, rm);
4929  }
4930  void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); }
4931
4932  void Umaal(
4933      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4934    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4935    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4936    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4937    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4938    VIXL_ASSERT(allow_macro_instructions_);
4939    VIXL_ASSERT(OutsideITBlock());
4940    MacroEmissionCheckScope guard(this);
4941    ITScope it_scope(this, &cond);
4942    umaal(cond, rdlo, rdhi, rn, rm);
4943  }
4944  void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
4945    Umaal(al, rdlo, rdhi, rn, rm);
4946  }
4947
4948  void Umlal(
4949      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4950    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4951    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4952    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4953    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4954    VIXL_ASSERT(allow_macro_instructions_);
4955    VIXL_ASSERT(OutsideITBlock());
4956    MacroEmissionCheckScope guard(this);
4957    ITScope it_scope(this, &cond);
4958    umlal(cond, rdlo, rdhi, rn, rm);
4959  }
4960  void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
4961    Umlal(al, rdlo, rdhi, rn, rm);
4962  }
4963  void Umlal(FlagsUpdate flags,
4964             Condition cond,
4965             Register rdlo,
4966             Register rdhi,
4967             Register rn,
4968             Register rm) {
4969    switch (flags) {
4970      case LeaveFlags:
4971        Umlal(cond, rdlo, rdhi, rn, rm);
4972        break;
4973      case SetFlags:
4974        Umlals(cond, rdlo, rdhi, rn, rm);
4975        break;
4976      case DontCare:
4977        Umlal(cond, rdlo, rdhi, rn, rm);
4978        break;
4979    }
4980  }
4981  void Umlal(FlagsUpdate flags,
4982             Register rdlo,
4983             Register rdhi,
4984             Register rn,
4985             Register rm) {
4986    Umlal(flags, al, rdlo, rdhi, rn, rm);
4987  }
4988
4989  void Umlals(
4990      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4991    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4992    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4993    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4994    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4995    VIXL_ASSERT(allow_macro_instructions_);
4996    VIXL_ASSERT(OutsideITBlock());
4997    MacroEmissionCheckScope guard(this);
4998    ITScope it_scope(this, &cond);
4999    umlals(cond, rdlo, rdhi, rn, rm);
5000  }
5001  void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
5002    Umlals(al, rdlo, rdhi, rn, rm);
5003  }
5004
5005  void Umull(
5006      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5007    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5008    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5010    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5011    VIXL_ASSERT(allow_macro_instructions_);
5012    VIXL_ASSERT(OutsideITBlock());
5013    MacroEmissionCheckScope guard(this);
5014    ITScope it_scope(this, &cond);
5015    umull(cond, rdlo, rdhi, rn, rm);
5016  }
5017  void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
5018    Umull(al, rdlo, rdhi, rn, rm);
5019  }
5020  void Umull(FlagsUpdate flags,
5021             Condition cond,
5022             Register rdlo,
5023             Register rdhi,
5024             Register rn,
5025             Register rm) {
5026    switch (flags) {
5027      case LeaveFlags:
5028        Umull(cond, rdlo, rdhi, rn, rm);
5029        break;
5030      case SetFlags:
5031        Umulls(cond, rdlo, rdhi, rn, rm);
5032        break;
5033      case DontCare:
5034        Umull(cond, rdlo, rdhi, rn, rm);
5035        break;
5036    }
5037  }
5038  void Umull(FlagsUpdate flags,
5039             Register rdlo,
5040             Register rdhi,
5041             Register rn,
5042             Register rm) {
5043    Umull(flags, al, rdlo, rdhi, rn, rm);
5044  }
5045
5046  void Umulls(
5047      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5048    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5049    VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5050    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5051    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5052    VIXL_ASSERT(allow_macro_instructions_);
5053    VIXL_ASSERT(OutsideITBlock());
5054    MacroEmissionCheckScope guard(this);
5055    ITScope it_scope(this, &cond);
5056    umulls(cond, rdlo, rdhi, rn, rm);
5057  }
5058  void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
5059    Umulls(al, rdlo, rdhi, rn, rm);
5060  }
5061
5062  void Uqadd16(Condition cond, Register rd, Register rn, Register rm) {
5063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5066    VIXL_ASSERT(allow_macro_instructions_);
5067    VIXL_ASSERT(OutsideITBlock());
5068    MacroEmissionCheckScope guard(this);
5069    ITScope it_scope(this, &cond);
5070    uqadd16(cond, rd, rn, rm);
5071  }
5072  void Uqadd16(Register rd, Register rn, Register rm) {
5073    Uqadd16(al, rd, rn, rm);
5074  }
5075
5076  void Uqadd8(Condition cond, Register rd, Register rn, Register rm) {
5077    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5080    VIXL_ASSERT(allow_macro_instructions_);
5081    VIXL_ASSERT(OutsideITBlock());
5082    MacroEmissionCheckScope guard(this);
5083    ITScope it_scope(this, &cond);
5084    uqadd8(cond, rd, rn, rm);
5085  }
5086  void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); }
5087
5088  void Uqasx(Condition cond, Register rd, Register rn, Register rm) {
5089    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5091    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5092    VIXL_ASSERT(allow_macro_instructions_);
5093    VIXL_ASSERT(OutsideITBlock());
5094    MacroEmissionCheckScope guard(this);
5095    ITScope it_scope(this, &cond);
5096    uqasx(cond, rd, rn, rm);
5097  }
5098  void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); }
5099
5100  void Uqsax(Condition cond, Register rd, Register rn, Register rm) {
5101    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5103    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5104    VIXL_ASSERT(allow_macro_instructions_);
5105    VIXL_ASSERT(OutsideITBlock());
5106    MacroEmissionCheckScope guard(this);
5107    ITScope it_scope(this, &cond);
5108    uqsax(cond, rd, rn, rm);
5109  }
5110  void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); }
5111
5112  void Uqsub16(Condition cond, Register rd, Register rn, Register rm) {
5113    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5115    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5116    VIXL_ASSERT(allow_macro_instructions_);
5117    VIXL_ASSERT(OutsideITBlock());
5118    MacroEmissionCheckScope guard(this);
5119    ITScope it_scope(this, &cond);
5120    uqsub16(cond, rd, rn, rm);
5121  }
5122  void Uqsub16(Register rd, Register rn, Register rm) {
5123    Uqsub16(al, rd, rn, rm);
5124  }
5125
5126  void Uqsub8(Condition cond, Register rd, Register rn, Register rm) {
5127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5129    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5130    VIXL_ASSERT(allow_macro_instructions_);
5131    VIXL_ASSERT(OutsideITBlock());
5132    MacroEmissionCheckScope guard(this);
5133    ITScope it_scope(this, &cond);
5134    uqsub8(cond, rd, rn, rm);
5135  }
5136  void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); }
5137
5138  void Usad8(Condition cond, Register rd, Register rn, Register rm) {
5139    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5140    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5141    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5142    VIXL_ASSERT(allow_macro_instructions_);
5143    VIXL_ASSERT(OutsideITBlock());
5144    MacroEmissionCheckScope guard(this);
5145    ITScope it_scope(this, &cond);
5146    usad8(cond, rd, rn, rm);
5147  }
5148  void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); }
5149
5150  void Usada8(
5151      Condition cond, Register rd, Register rn, Register rm, Register ra) {
5152    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5153    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5154    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5155    VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
5156    VIXL_ASSERT(allow_macro_instructions_);
5157    VIXL_ASSERT(OutsideITBlock());
5158    MacroEmissionCheckScope guard(this);
5159    ITScope it_scope(this, &cond);
5160    usada8(cond, rd, rn, rm, ra);
5161  }
5162  void Usada8(Register rd, Register rn, Register rm, Register ra) {
5163    Usada8(al, rd, rn, rm, ra);
5164  }
5165
5166  void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
5167    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5168    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5169    VIXL_ASSERT(allow_macro_instructions_);
5170    VIXL_ASSERT(OutsideITBlock());
5171    MacroEmissionCheckScope guard(this);
5172    ITScope it_scope(this, &cond);
5173    usat(cond, rd, imm, operand);
5174  }
5175  void Usat(Register rd, uint32_t imm, const Operand& operand) {
5176    Usat(al, rd, imm, operand);
5177  }
5178
5179  void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) {
5180    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5181    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5182    VIXL_ASSERT(allow_macro_instructions_);
5183    VIXL_ASSERT(OutsideITBlock());
5184    MacroEmissionCheckScope guard(this);
5185    ITScope it_scope(this, &cond);
5186    usat16(cond, rd, imm, rn);
5187  }
5188  void Usat16(Register rd, uint32_t imm, Register rn) {
5189    Usat16(al, rd, imm, rn);
5190  }
5191
5192  void Usax(Condition cond, Register rd, Register rn, Register rm) {
5193    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5194    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5196    VIXL_ASSERT(allow_macro_instructions_);
5197    VIXL_ASSERT(OutsideITBlock());
5198    MacroEmissionCheckScope guard(this);
5199    ITScope it_scope(this, &cond);
5200    usax(cond, rd, rn, rm);
5201  }
5202  void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); }
5203
5204  void Usub16(Condition cond, Register rd, Register rn, Register rm) {
5205    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5206    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5208    VIXL_ASSERT(allow_macro_instructions_);
5209    VIXL_ASSERT(OutsideITBlock());
5210    MacroEmissionCheckScope guard(this);
5211    ITScope it_scope(this, &cond);
5212    usub16(cond, rd, rn, rm);
5213  }
5214  void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); }
5215
5216  void Usub8(Condition cond, Register rd, Register rn, Register rm) {
5217    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5218    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5219    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5220    VIXL_ASSERT(allow_macro_instructions_);
5221    VIXL_ASSERT(OutsideITBlock());
5222    MacroEmissionCheckScope guard(this);
5223    ITScope it_scope(this, &cond);
5224    usub8(cond, rd, rn, rm);
5225  }
5226  void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); }
5227
5228  void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
5229    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5230    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5231    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5232    VIXL_ASSERT(allow_macro_instructions_);
5233    VIXL_ASSERT(OutsideITBlock());
5234    MacroEmissionCheckScope guard(this);
5235    ITScope it_scope(this, &cond);
5236    uxtab(cond, rd, rn, operand);
5237  }
5238  void Uxtab(Register rd, Register rn, const Operand& operand) {
5239    Uxtab(al, rd, rn, operand);
5240  }
5241
5242  void Uxtab16(Condition cond,
5243               Register rd,
5244               Register rn,
5245               const Operand& operand) {
5246    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5247    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5248    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5249    VIXL_ASSERT(allow_macro_instructions_);
5250    VIXL_ASSERT(OutsideITBlock());
5251    MacroEmissionCheckScope guard(this);
5252    ITScope it_scope(this, &cond);
5253    uxtab16(cond, rd, rn, operand);
5254  }
5255  void Uxtab16(Register rd, Register rn, const Operand& operand) {
5256    Uxtab16(al, rd, rn, operand);
5257  }
5258
5259  void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
5260    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5261    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5262    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5263    VIXL_ASSERT(allow_macro_instructions_);
5264    VIXL_ASSERT(OutsideITBlock());
5265    MacroEmissionCheckScope guard(this);
5266    ITScope it_scope(this, &cond);
5267    uxtah(cond, rd, rn, operand);
5268  }
5269  void Uxtah(Register rd, Register rn, const Operand& operand) {
5270    Uxtah(al, rd, rn, operand);
5271  }
5272
5273  void Uxtb(Condition cond, Register rd, const Operand& operand) {
5274    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5275    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5276    VIXL_ASSERT(allow_macro_instructions_);
5277    VIXL_ASSERT(OutsideITBlock());
5278    MacroEmissionCheckScope guard(this);
5279    ITScope it_scope(this, &cond);
5280    uxtb(cond, rd, operand);
5281  }
5282  void Uxtb(Register rd, const Operand& operand) { Uxtb(al, rd, operand); }
5283
5284  void Uxtb16(Condition cond, Register rd, const Operand& operand) {
5285    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5286    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5287    VIXL_ASSERT(allow_macro_instructions_);
5288    VIXL_ASSERT(OutsideITBlock());
5289    MacroEmissionCheckScope guard(this);
5290    ITScope it_scope(this, &cond);
5291    uxtb16(cond, rd, operand);
5292  }
5293  void Uxtb16(Register rd, const Operand& operand) { Uxtb16(al, rd, operand); }
5294
5295  void Uxth(Condition cond, Register rd, const Operand& operand) {
5296    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5297    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5298    VIXL_ASSERT(allow_macro_instructions_);
5299    VIXL_ASSERT(OutsideITBlock());
5300    MacroEmissionCheckScope guard(this);
5301    ITScope it_scope(this, &cond);
5302    uxth(cond, rd, operand);
5303  }
5304  void Uxth(Register rd, const Operand& operand) { Uxth(al, rd, operand); }
5305
5306  void Vaba(
5307      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5308    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5311    VIXL_ASSERT(allow_macro_instructions_);
5312    VIXL_ASSERT(OutsideITBlock());
5313    MacroEmissionCheckScope guard(this);
5314    ITScope it_scope(this, &cond);
5315    vaba(cond, dt, rd, rn, rm);
5316  }
5317  void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5318    Vaba(al, dt, rd, rn, rm);
5319  }
5320
5321  void Vaba(
5322      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5323    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5326    VIXL_ASSERT(allow_macro_instructions_);
5327    VIXL_ASSERT(OutsideITBlock());
5328    MacroEmissionCheckScope guard(this);
5329    ITScope it_scope(this, &cond);
5330    vaba(cond, dt, rd, rn, rm);
5331  }
5332  void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5333    Vaba(al, dt, rd, rn, rm);
5334  }
5335
5336  void Vabal(
5337      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5338    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5340    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5341    VIXL_ASSERT(allow_macro_instructions_);
5342    VIXL_ASSERT(OutsideITBlock());
5343    MacroEmissionCheckScope guard(this);
5344    ITScope it_scope(this, &cond);
5345    vabal(cond, dt, rd, rn, rm);
5346  }
5347  void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5348    Vabal(al, dt, rd, rn, rm);
5349  }
5350
5351  void Vabd(
5352      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5353    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5354    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5355    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5356    VIXL_ASSERT(allow_macro_instructions_);
5357    VIXL_ASSERT(OutsideITBlock());
5358    MacroEmissionCheckScope guard(this);
5359    ITScope it_scope(this, &cond);
5360    vabd(cond, dt, rd, rn, rm);
5361  }
5362  void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5363    Vabd(al, dt, rd, rn, rm);
5364  }
5365
5366  void Vabd(
5367      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5368    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5369    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5371    VIXL_ASSERT(allow_macro_instructions_);
5372    VIXL_ASSERT(OutsideITBlock());
5373    MacroEmissionCheckScope guard(this);
5374    ITScope it_scope(this, &cond);
5375    vabd(cond, dt, rd, rn, rm);
5376  }
5377  void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5378    Vabd(al, dt, rd, rn, rm);
5379  }
5380
5381  void Vabdl(
5382      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5384    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5385    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5386    VIXL_ASSERT(allow_macro_instructions_);
5387    VIXL_ASSERT(OutsideITBlock());
5388    MacroEmissionCheckScope guard(this);
5389    ITScope it_scope(this, &cond);
5390    vabdl(cond, dt, rd, rn, rm);
5391  }
5392  void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5393    Vabdl(al, dt, rd, rn, rm);
5394  }
5395
5396  void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
5397    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5398    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5399    VIXL_ASSERT(allow_macro_instructions_);
5400    VIXL_ASSERT(OutsideITBlock());
5401    MacroEmissionCheckScope guard(this);
5402    ITScope it_scope(this, &cond);
5403    vabs(cond, dt, rd, rm);
5404  }
5405  void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); }
5406
5407  void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
5408    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5409    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5410    VIXL_ASSERT(allow_macro_instructions_);
5411    VIXL_ASSERT(OutsideITBlock());
5412    MacroEmissionCheckScope guard(this);
5413    ITScope it_scope(this, &cond);
5414    vabs(cond, dt, rd, rm);
5415  }
5416  void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); }
5417
5418  void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) {
5419    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5420    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5421    VIXL_ASSERT(allow_macro_instructions_);
5422    VIXL_ASSERT(OutsideITBlock());
5423    MacroEmissionCheckScope guard(this);
5424    ITScope it_scope(this, &cond);
5425    vabs(cond, dt, rd, rm);
5426  }
5427  void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); }
5428
5429  void Vacge(
5430      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5431    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5432    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5433    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5434    VIXL_ASSERT(allow_macro_instructions_);
5435    VIXL_ASSERT(OutsideITBlock());
5436    MacroEmissionCheckScope guard(this);
5437    ITScope it_scope(this, &cond);
5438    vacge(cond, dt, rd, rn, rm);
5439  }
5440  void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5441    Vacge(al, dt, rd, rn, rm);
5442  }
5443
5444  void Vacge(
5445      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5446    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5447    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5448    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5449    VIXL_ASSERT(allow_macro_instructions_);
5450    VIXL_ASSERT(OutsideITBlock());
5451    MacroEmissionCheckScope guard(this);
5452    ITScope it_scope(this, &cond);
5453    vacge(cond, dt, rd, rn, rm);
5454  }
5455  void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5456    Vacge(al, dt, rd, rn, rm);
5457  }
5458
5459  void Vacgt(
5460      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5461    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5462    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5464    VIXL_ASSERT(allow_macro_instructions_);
5465    VIXL_ASSERT(OutsideITBlock());
5466    MacroEmissionCheckScope guard(this);
5467    ITScope it_scope(this, &cond);
5468    vacgt(cond, dt, rd, rn, rm);
5469  }
5470  void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5471    Vacgt(al, dt, rd, rn, rm);
5472  }
5473
5474  void Vacgt(
5475      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5476    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5477    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5478    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5479    VIXL_ASSERT(allow_macro_instructions_);
5480    VIXL_ASSERT(OutsideITBlock());
5481    MacroEmissionCheckScope guard(this);
5482    ITScope it_scope(this, &cond);
5483    vacgt(cond, dt, rd, rn, rm);
5484  }
5485  void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5486    Vacgt(al, dt, rd, rn, rm);
5487  }
5488
5489  void Vacle(
5490      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5491    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5493    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5494    VIXL_ASSERT(allow_macro_instructions_);
5495    VIXL_ASSERT(OutsideITBlock());
5496    MacroEmissionCheckScope guard(this);
5497    ITScope it_scope(this, &cond);
5498    vacle(cond, dt, rd, rn, rm);
5499  }
5500  void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5501    Vacle(al, dt, rd, rn, rm);
5502  }
5503
5504  void Vacle(
5505      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5506    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5508    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5509    VIXL_ASSERT(allow_macro_instructions_);
5510    VIXL_ASSERT(OutsideITBlock());
5511    MacroEmissionCheckScope guard(this);
5512    ITScope it_scope(this, &cond);
5513    vacle(cond, dt, rd, rn, rm);
5514  }
5515  void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5516    Vacle(al, dt, rd, rn, rm);
5517  }
5518
5519  void Vaclt(
5520      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5521    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5522    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5523    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5524    VIXL_ASSERT(allow_macro_instructions_);
5525    VIXL_ASSERT(OutsideITBlock());
5526    MacroEmissionCheckScope guard(this);
5527    ITScope it_scope(this, &cond);
5528    vaclt(cond, dt, rd, rn, rm);
5529  }
5530  void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5531    Vaclt(al, dt, rd, rn, rm);
5532  }
5533
5534  void Vaclt(
5535      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5536    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5537    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5539    VIXL_ASSERT(allow_macro_instructions_);
5540    VIXL_ASSERT(OutsideITBlock());
5541    MacroEmissionCheckScope guard(this);
5542    ITScope it_scope(this, &cond);
5543    vaclt(cond, dt, rd, rn, rm);
5544  }
5545  void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5546    Vaclt(al, dt, rd, rn, rm);
5547  }
5548
5549  void Vadd(
5550      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5551    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5552    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5553    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5554    VIXL_ASSERT(allow_macro_instructions_);
5555    VIXL_ASSERT(OutsideITBlock());
5556    MacroEmissionCheckScope guard(this);
5557    ITScope it_scope(this, &cond);
5558    vadd(cond, dt, rd, rn, rm);
5559  }
5560  void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5561    Vadd(al, dt, rd, rn, rm);
5562  }
5563
5564  void Vadd(
5565      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5567    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5568    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5569    VIXL_ASSERT(allow_macro_instructions_);
5570    VIXL_ASSERT(OutsideITBlock());
5571    MacroEmissionCheckScope guard(this);
5572    ITScope it_scope(this, &cond);
5573    vadd(cond, dt, rd, rn, rm);
5574  }
5575  void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5576    Vadd(al, dt, rd, rn, rm);
5577  }
5578
5579  void Vadd(
5580      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5581    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5583    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5584    VIXL_ASSERT(allow_macro_instructions_);
5585    VIXL_ASSERT(OutsideITBlock());
5586    MacroEmissionCheckScope guard(this);
5587    ITScope it_scope(this, &cond);
5588    vadd(cond, dt, rd, rn, rm);
5589  }
5590  void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5591    Vadd(al, dt, rd, rn, rm);
5592  }
5593
5594  void Vaddhn(
5595      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5596    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5598    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5599    VIXL_ASSERT(allow_macro_instructions_);
5600    VIXL_ASSERT(OutsideITBlock());
5601    MacroEmissionCheckScope guard(this);
5602    ITScope it_scope(this, &cond);
5603    vaddhn(cond, dt, rd, rn, rm);
5604  }
5605  void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5606    Vaddhn(al, dt, rd, rn, rm);
5607  }
5608
5609  void Vaddl(
5610      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5611    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5612    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5613    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5614    VIXL_ASSERT(allow_macro_instructions_);
5615    VIXL_ASSERT(OutsideITBlock());
5616    MacroEmissionCheckScope guard(this);
5617    ITScope it_scope(this, &cond);
5618    vaddl(cond, dt, rd, rn, rm);
5619  }
5620  void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5621    Vaddl(al, dt, rd, rn, rm);
5622  }
5623
5624  void Vaddw(
5625      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5626    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5627    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5628    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5629    VIXL_ASSERT(allow_macro_instructions_);
5630    VIXL_ASSERT(OutsideITBlock());
5631    MacroEmissionCheckScope guard(this);
5632    ITScope it_scope(this, &cond);
5633    vaddw(cond, dt, rd, rn, rm);
5634  }
5635  void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5636    Vaddw(al, dt, rd, rn, rm);
5637  }
5638
5639  void Vand(Condition cond,
5640            DataType dt,
5641            DRegister rd,
5642            DRegister rn,
5643            const DOperand& operand) {
5644    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5645    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5646    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5647    VIXL_ASSERT(allow_macro_instructions_);
5648    VIXL_ASSERT(OutsideITBlock());
5649    MacroEmissionCheckScope guard(this);
5650    ITScope it_scope(this, &cond);
5651    vand(cond, dt, rd, rn, operand);
5652  }
5653  void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5654    Vand(al, dt, rd, rn, operand);
5655  }
5656
5657  void Vand(Condition cond,
5658            DataType dt,
5659            QRegister rd,
5660            QRegister rn,
5661            const QOperand& operand) {
5662    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5663    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5664    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5665    VIXL_ASSERT(allow_macro_instructions_);
5666    VIXL_ASSERT(OutsideITBlock());
5667    MacroEmissionCheckScope guard(this);
5668    ITScope it_scope(this, &cond);
5669    vand(cond, dt, rd, rn, operand);
5670  }
5671  void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5672    Vand(al, dt, rd, rn, operand);
5673  }
5674
5675  void Vbic(Condition cond,
5676            DataType dt,
5677            DRegister rd,
5678            DRegister rn,
5679            const DOperand& operand) {
5680    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5681    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5682    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5683    VIXL_ASSERT(allow_macro_instructions_);
5684    VIXL_ASSERT(OutsideITBlock());
5685    MacroEmissionCheckScope guard(this);
5686    ITScope it_scope(this, &cond);
5687    vbic(cond, dt, rd, rn, operand);
5688  }
5689  void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5690    Vbic(al, dt, rd, rn, operand);
5691  }
5692
5693  void Vbic(Condition cond,
5694            DataType dt,
5695            QRegister rd,
5696            QRegister rn,
5697            const QOperand& operand) {
5698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5700    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5701    VIXL_ASSERT(allow_macro_instructions_);
5702    VIXL_ASSERT(OutsideITBlock());
5703    MacroEmissionCheckScope guard(this);
5704    ITScope it_scope(this, &cond);
5705    vbic(cond, dt, rd, rn, operand);
5706  }
5707  void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5708    Vbic(al, dt, rd, rn, operand);
5709  }
5710
5711  void Vbif(
5712      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5713    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5714    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5715    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5716    VIXL_ASSERT(allow_macro_instructions_);
5717    VIXL_ASSERT(OutsideITBlock());
5718    MacroEmissionCheckScope guard(this);
5719    ITScope it_scope(this, &cond);
5720    vbif(cond, dt, rd, rn, rm);
5721  }
5722  void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5723    Vbif(al, dt, rd, rn, rm);
5724  }
5725  void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5726    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5727  }
5728  void Vbif(DRegister rd, DRegister rn, DRegister rm) {
5729    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5730  }
5731
5732  void Vbif(
5733      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5734    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5737    VIXL_ASSERT(allow_macro_instructions_);
5738    VIXL_ASSERT(OutsideITBlock());
5739    MacroEmissionCheckScope guard(this);
5740    ITScope it_scope(this, &cond);
5741    vbif(cond, dt, rd, rn, rm);
5742  }
5743  void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5744    Vbif(al, dt, rd, rn, rm);
5745  }
5746  void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5747    Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5748  }
5749  void Vbif(QRegister rd, QRegister rn, QRegister rm) {
5750    Vbif(al, kDataTypeValueNone, rd, rn, rm);
5751  }
5752
5753  void Vbit(
5754      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5755    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5756    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5757    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5758    VIXL_ASSERT(allow_macro_instructions_);
5759    VIXL_ASSERT(OutsideITBlock());
5760    MacroEmissionCheckScope guard(this);
5761    ITScope it_scope(this, &cond);
5762    vbit(cond, dt, rd, rn, rm);
5763  }
5764  void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5765    Vbit(al, dt, rd, rn, rm);
5766  }
5767  void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5768    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5769  }
5770  void Vbit(DRegister rd, DRegister rn, DRegister rm) {
5771    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5772  }
5773
5774  void Vbit(
5775      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5776    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5777    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5778    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5779    VIXL_ASSERT(allow_macro_instructions_);
5780    VIXL_ASSERT(OutsideITBlock());
5781    MacroEmissionCheckScope guard(this);
5782    ITScope it_scope(this, &cond);
5783    vbit(cond, dt, rd, rn, rm);
5784  }
5785  void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5786    Vbit(al, dt, rd, rn, rm);
5787  }
5788  void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5789    Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5790  }
5791  void Vbit(QRegister rd, QRegister rn, QRegister rm) {
5792    Vbit(al, kDataTypeValueNone, rd, rn, rm);
5793  }
5794
5795  void Vbsl(
5796      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5799    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5800    VIXL_ASSERT(allow_macro_instructions_);
5801    VIXL_ASSERT(OutsideITBlock());
5802    MacroEmissionCheckScope guard(this);
5803    ITScope it_scope(this, &cond);
5804    vbsl(cond, dt, rd, rn, rm);
5805  }
5806  void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5807    Vbsl(al, dt, rd, rn, rm);
5808  }
5809  void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5810    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5811  }
5812  void Vbsl(DRegister rd, DRegister rn, DRegister rm) {
5813    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5814  }
5815
5816  void Vbsl(
5817      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5820    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5821    VIXL_ASSERT(allow_macro_instructions_);
5822    VIXL_ASSERT(OutsideITBlock());
5823    MacroEmissionCheckScope guard(this);
5824    ITScope it_scope(this, &cond);
5825    vbsl(cond, dt, rd, rn, rm);
5826  }
5827  void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5828    Vbsl(al, dt, rd, rn, rm);
5829  }
5830  void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5831    Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5832  }
5833  void Vbsl(QRegister rd, QRegister rn, QRegister rm) {
5834    Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5835  }
5836
5837  void Vceq(Condition cond,
5838            DataType dt,
5839            DRegister rd,
5840            DRegister rm,
5841            const DOperand& operand) {
5842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5844    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5845    VIXL_ASSERT(allow_macro_instructions_);
5846    VIXL_ASSERT(OutsideITBlock());
5847    MacroEmissionCheckScope guard(this);
5848    ITScope it_scope(this, &cond);
5849    vceq(cond, dt, rd, rm, operand);
5850  }
5851  void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5852    Vceq(al, dt, rd, rm, operand);
5853  }
5854
5855  void Vceq(Condition cond,
5856            DataType dt,
5857            QRegister rd,
5858            QRegister rm,
5859            const QOperand& operand) {
5860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5861    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5862    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5863    VIXL_ASSERT(allow_macro_instructions_);
5864    VIXL_ASSERT(OutsideITBlock());
5865    MacroEmissionCheckScope guard(this);
5866    ITScope it_scope(this, &cond);
5867    vceq(cond, dt, rd, rm, operand);
5868  }
5869  void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5870    Vceq(al, dt, rd, rm, operand);
5871  }
5872
5873  void Vceq(
5874      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5875    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5876    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5877    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5878    VIXL_ASSERT(allow_macro_instructions_);
5879    VIXL_ASSERT(OutsideITBlock());
5880    MacroEmissionCheckScope guard(this);
5881    ITScope it_scope(this, &cond);
5882    vceq(cond, dt, rd, rn, rm);
5883  }
5884  void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5885    Vceq(al, dt, rd, rn, rm);
5886  }
5887
5888  void Vceq(
5889      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5890    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5892    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5893    VIXL_ASSERT(allow_macro_instructions_);
5894    VIXL_ASSERT(OutsideITBlock());
5895    MacroEmissionCheckScope guard(this);
5896    ITScope it_scope(this, &cond);
5897    vceq(cond, dt, rd, rn, rm);
5898  }
5899  void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5900    Vceq(al, dt, rd, rn, rm);
5901  }
5902
5903  void Vcge(Condition cond,
5904            DataType dt,
5905            DRegister rd,
5906            DRegister rm,
5907            const DOperand& operand) {
5908    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5909    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5910    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5911    VIXL_ASSERT(allow_macro_instructions_);
5912    VIXL_ASSERT(OutsideITBlock());
5913    MacroEmissionCheckScope guard(this);
5914    ITScope it_scope(this, &cond);
5915    vcge(cond, dt, rd, rm, operand);
5916  }
5917  void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5918    Vcge(al, dt, rd, rm, operand);
5919  }
5920
5921  void Vcge(Condition cond,
5922            DataType dt,
5923            QRegister rd,
5924            QRegister rm,
5925            const QOperand& operand) {
5926    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5927    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5928    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5929    VIXL_ASSERT(allow_macro_instructions_);
5930    VIXL_ASSERT(OutsideITBlock());
5931    MacroEmissionCheckScope guard(this);
5932    ITScope it_scope(this, &cond);
5933    vcge(cond, dt, rd, rm, operand);
5934  }
5935  void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5936    Vcge(al, dt, rd, rm, operand);
5937  }
5938
5939  void Vcge(
5940      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5941    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5942    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5943    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5944    VIXL_ASSERT(allow_macro_instructions_);
5945    VIXL_ASSERT(OutsideITBlock());
5946    MacroEmissionCheckScope guard(this);
5947    ITScope it_scope(this, &cond);
5948    vcge(cond, dt, rd, rn, rm);
5949  }
5950  void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5951    Vcge(al, dt, rd, rn, rm);
5952  }
5953
5954  void Vcge(
5955      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5956    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5957    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5958    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5959    VIXL_ASSERT(allow_macro_instructions_);
5960    VIXL_ASSERT(OutsideITBlock());
5961    MacroEmissionCheckScope guard(this);
5962    ITScope it_scope(this, &cond);
5963    vcge(cond, dt, rd, rn, rm);
5964  }
5965  void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5966    Vcge(al, dt, rd, rn, rm);
5967  }
5968
5969  void Vcgt(Condition cond,
5970            DataType dt,
5971            DRegister rd,
5972            DRegister rm,
5973            const DOperand& operand) {
5974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5976    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5977    VIXL_ASSERT(allow_macro_instructions_);
5978    VIXL_ASSERT(OutsideITBlock());
5979    MacroEmissionCheckScope guard(this);
5980    ITScope it_scope(this, &cond);
5981    vcgt(cond, dt, rd, rm, operand);
5982  }
5983  void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5984    Vcgt(al, dt, rd, rm, operand);
5985  }
5986
5987  void Vcgt(Condition cond,
5988            DataType dt,
5989            QRegister rd,
5990            QRegister rm,
5991            const QOperand& operand) {
5992    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5993    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5994    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5995    VIXL_ASSERT(allow_macro_instructions_);
5996    VIXL_ASSERT(OutsideITBlock());
5997    MacroEmissionCheckScope guard(this);
5998    ITScope it_scope(this, &cond);
5999    vcgt(cond, dt, rd, rm, operand);
6000  }
6001  void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6002    Vcgt(al, dt, rd, rm, operand);
6003  }
6004
6005  void Vcgt(
6006      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6007    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6008    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6009    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6010    VIXL_ASSERT(allow_macro_instructions_);
6011    VIXL_ASSERT(OutsideITBlock());
6012    MacroEmissionCheckScope guard(this);
6013    ITScope it_scope(this, &cond);
6014    vcgt(cond, dt, rd, rn, rm);
6015  }
6016  void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6017    Vcgt(al, dt, rd, rn, rm);
6018  }
6019
6020  void Vcgt(
6021      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6022    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6023    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6024    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6025    VIXL_ASSERT(allow_macro_instructions_);
6026    VIXL_ASSERT(OutsideITBlock());
6027    MacroEmissionCheckScope guard(this);
6028    ITScope it_scope(this, &cond);
6029    vcgt(cond, dt, rd, rn, rm);
6030  }
6031  void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6032    Vcgt(al, dt, rd, rn, rm);
6033  }
6034
6035  void Vcle(Condition cond,
6036            DataType dt,
6037            DRegister rd,
6038            DRegister rm,
6039            const DOperand& operand) {
6040    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6041    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6042    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6043    VIXL_ASSERT(allow_macro_instructions_);
6044    VIXL_ASSERT(OutsideITBlock());
6045    MacroEmissionCheckScope guard(this);
6046    ITScope it_scope(this, &cond);
6047    vcle(cond, dt, rd, rm, operand);
6048  }
6049  void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6050    Vcle(al, dt, rd, rm, operand);
6051  }
6052
6053  void Vcle(Condition cond,
6054            DataType dt,
6055            QRegister rd,
6056            QRegister rm,
6057            const QOperand& operand) {
6058    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6059    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6060    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6061    VIXL_ASSERT(allow_macro_instructions_);
6062    VIXL_ASSERT(OutsideITBlock());
6063    MacroEmissionCheckScope guard(this);
6064    ITScope it_scope(this, &cond);
6065    vcle(cond, dt, rd, rm, operand);
6066  }
6067  void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6068    Vcle(al, dt, rd, rm, operand);
6069  }
6070
6071  void Vcle(
6072      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6073    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6074    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6075    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6076    VIXL_ASSERT(allow_macro_instructions_);
6077    VIXL_ASSERT(OutsideITBlock());
6078    MacroEmissionCheckScope guard(this);
6079    ITScope it_scope(this, &cond);
6080    vcle(cond, dt, rd, rn, rm);
6081  }
6082  void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6083    Vcle(al, dt, rd, rn, rm);
6084  }
6085
6086  void Vcle(
6087      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6088    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6089    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6090    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6091    VIXL_ASSERT(allow_macro_instructions_);
6092    VIXL_ASSERT(OutsideITBlock());
6093    MacroEmissionCheckScope guard(this);
6094    ITScope it_scope(this, &cond);
6095    vcle(cond, dt, rd, rn, rm);
6096  }
6097  void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6098    Vcle(al, dt, rd, rn, rm);
6099  }
6100
6101  void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6102    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6103    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6104    VIXL_ASSERT(allow_macro_instructions_);
6105    VIXL_ASSERT(OutsideITBlock());
6106    MacroEmissionCheckScope guard(this);
6107    ITScope it_scope(this, &cond);
6108    vcls(cond, dt, rd, rm);
6109  }
6110  void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); }
6111
6112  void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6113    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6114    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6115    VIXL_ASSERT(allow_macro_instructions_);
6116    VIXL_ASSERT(OutsideITBlock());
6117    MacroEmissionCheckScope guard(this);
6118    ITScope it_scope(this, &cond);
6119    vcls(cond, dt, rd, rm);
6120  }
6121  void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); }
6122
6123  void Vclt(Condition cond,
6124            DataType dt,
6125            DRegister rd,
6126            DRegister rm,
6127            const DOperand& operand) {
6128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6129    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6130    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6131    VIXL_ASSERT(allow_macro_instructions_);
6132    VIXL_ASSERT(OutsideITBlock());
6133    MacroEmissionCheckScope guard(this);
6134    ITScope it_scope(this, &cond);
6135    vclt(cond, dt, rd, rm, operand);
6136  }
6137  void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6138    Vclt(al, dt, rd, rm, operand);
6139  }
6140
6141  void Vclt(Condition cond,
6142            DataType dt,
6143            QRegister rd,
6144            QRegister rm,
6145            const QOperand& operand) {
6146    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6147    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6148    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6149    VIXL_ASSERT(allow_macro_instructions_);
6150    VIXL_ASSERT(OutsideITBlock());
6151    MacroEmissionCheckScope guard(this);
6152    ITScope it_scope(this, &cond);
6153    vclt(cond, dt, rd, rm, operand);
6154  }
6155  void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6156    Vclt(al, dt, rd, rm, operand);
6157  }
6158
6159  void Vclt(
6160      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6161    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6162    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6163    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6164    VIXL_ASSERT(allow_macro_instructions_);
6165    VIXL_ASSERT(OutsideITBlock());
6166    MacroEmissionCheckScope guard(this);
6167    ITScope it_scope(this, &cond);
6168    vclt(cond, dt, rd, rn, rm);
6169  }
6170  void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6171    Vclt(al, dt, rd, rn, rm);
6172  }
6173
6174  void Vclt(
6175      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6176    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6177    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6178    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6179    VIXL_ASSERT(allow_macro_instructions_);
6180    VIXL_ASSERT(OutsideITBlock());
6181    MacroEmissionCheckScope guard(this);
6182    ITScope it_scope(this, &cond);
6183    vclt(cond, dt, rd, rn, rm);
6184  }
6185  void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6186    Vclt(al, dt, rd, rn, rm);
6187  }
6188
6189  void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6190    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6191    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6192    VIXL_ASSERT(allow_macro_instructions_);
6193    VIXL_ASSERT(OutsideITBlock());
6194    MacroEmissionCheckScope guard(this);
6195    ITScope it_scope(this, &cond);
6196    vclz(cond, dt, rd, rm);
6197  }
6198  void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); }
6199
6200  void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6201    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6202    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6203    VIXL_ASSERT(allow_macro_instructions_);
6204    VIXL_ASSERT(OutsideITBlock());
6205    MacroEmissionCheckScope guard(this);
6206    ITScope it_scope(this, &cond);
6207    vclz(cond, dt, rd, rm);
6208  }
6209  void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); }
6210
6211  void Vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6212    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6213    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6214    VIXL_ASSERT(allow_macro_instructions_);
6215    VIXL_ASSERT(OutsideITBlock());
6216    MacroEmissionCheckScope guard(this);
6217    ITScope it_scope(this, &cond);
6218    vcmp(cond, dt, rd, rm);
6219  }
6220  void Vcmp(DataType dt, SRegister rd, SRegister rm) { Vcmp(al, dt, rd, rm); }
6221
6222  void Vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6224    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6225    VIXL_ASSERT(allow_macro_instructions_);
6226    VIXL_ASSERT(OutsideITBlock());
6227    MacroEmissionCheckScope guard(this);
6228    ITScope it_scope(this, &cond);
6229    vcmp(cond, dt, rd, rm);
6230  }
6231  void Vcmp(DataType dt, DRegister rd, DRegister rm) { Vcmp(al, dt, rd, rm); }
6232
6233  void Vcmp(Condition cond, DataType dt, SRegister rd, double imm) {
6234    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6235    VIXL_ASSERT(allow_macro_instructions_);
6236    VIXL_ASSERT(OutsideITBlock());
6237    MacroEmissionCheckScope guard(this);
6238    ITScope it_scope(this, &cond);
6239    vcmp(cond, dt, rd, imm);
6240  }
6241  void Vcmp(DataType dt, SRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6242
6243  void Vcmp(Condition cond, DataType dt, DRegister rd, double imm) {
6244    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6245    VIXL_ASSERT(allow_macro_instructions_);
6246    VIXL_ASSERT(OutsideITBlock());
6247    MacroEmissionCheckScope guard(this);
6248    ITScope it_scope(this, &cond);
6249    vcmp(cond, dt, rd, imm);
6250  }
6251  void Vcmp(DataType dt, DRegister rd, double imm) { Vcmp(al, dt, rd, imm); }
6252
6253  void Vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6254    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6255    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6256    VIXL_ASSERT(allow_macro_instructions_);
6257    VIXL_ASSERT(OutsideITBlock());
6258    MacroEmissionCheckScope guard(this);
6259    ITScope it_scope(this, &cond);
6260    vcmpe(cond, dt, rd, rm);
6261  }
6262  void Vcmpe(DataType dt, SRegister rd, SRegister rm) { Vcmpe(al, dt, rd, rm); }
6263
6264  void Vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6265    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6266    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6267    VIXL_ASSERT(allow_macro_instructions_);
6268    VIXL_ASSERT(OutsideITBlock());
6269    MacroEmissionCheckScope guard(this);
6270    ITScope it_scope(this, &cond);
6271    vcmpe(cond, dt, rd, rm);
6272  }
6273  void Vcmpe(DataType dt, DRegister rd, DRegister rm) { Vcmpe(al, dt, rd, rm); }
6274
6275  void Vcmpe(Condition cond, DataType dt, SRegister rd, double imm) {
6276    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6277    VIXL_ASSERT(allow_macro_instructions_);
6278    VIXL_ASSERT(OutsideITBlock());
6279    MacroEmissionCheckScope guard(this);
6280    ITScope it_scope(this, &cond);
6281    vcmpe(cond, dt, rd, imm);
6282  }
6283  void Vcmpe(DataType dt, SRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6284
6285  void Vcmpe(Condition cond, DataType dt, DRegister rd, double imm) {
6286    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6287    VIXL_ASSERT(allow_macro_instructions_);
6288    VIXL_ASSERT(OutsideITBlock());
6289    MacroEmissionCheckScope guard(this);
6290    ITScope it_scope(this, &cond);
6291    vcmpe(cond, dt, rd, imm);
6292  }
6293  void Vcmpe(DataType dt, DRegister rd, double imm) { Vcmpe(al, dt, rd, imm); }
6294
6295  void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6296    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6297    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6298    VIXL_ASSERT(allow_macro_instructions_);
6299    VIXL_ASSERT(OutsideITBlock());
6300    MacroEmissionCheckScope guard(this);
6301    ITScope it_scope(this, &cond);
6302    vcnt(cond, dt, rd, rm);
6303  }
6304  void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); }
6305
6306  void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6307    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6308    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6309    VIXL_ASSERT(allow_macro_instructions_);
6310    VIXL_ASSERT(OutsideITBlock());
6311    MacroEmissionCheckScope guard(this);
6312    ITScope it_scope(this, &cond);
6313    vcnt(cond, dt, rd, rm);
6314  }
6315  void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); }
6316
6317  void Vcvt(
6318      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6319    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6320    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6321    VIXL_ASSERT(allow_macro_instructions_);
6322    VIXL_ASSERT(OutsideITBlock());
6323    MacroEmissionCheckScope guard(this);
6324    ITScope it_scope(this, &cond);
6325    vcvt(cond, dt1, dt2, rd, rm);
6326  }
6327  void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6328    Vcvt(al, dt1, dt2, rd, rm);
6329  }
6330
6331  void Vcvt(
6332      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6333    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6334    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6335    VIXL_ASSERT(allow_macro_instructions_);
6336    VIXL_ASSERT(OutsideITBlock());
6337    MacroEmissionCheckScope guard(this);
6338    ITScope it_scope(this, &cond);
6339    vcvt(cond, dt1, dt2, rd, rm);
6340  }
6341  void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6342    Vcvt(al, dt1, dt2, rd, rm);
6343  }
6344
6345  void Vcvt(Condition cond,
6346            DataType dt1,
6347            DataType dt2,
6348            DRegister rd,
6349            DRegister rm,
6350            int32_t fbits) {
6351    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6352    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6353    VIXL_ASSERT(allow_macro_instructions_);
6354    VIXL_ASSERT(OutsideITBlock());
6355    MacroEmissionCheckScope guard(this);
6356    ITScope it_scope(this, &cond);
6357    vcvt(cond, dt1, dt2, rd, rm, fbits);
6358  }
6359  void Vcvt(
6360      DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) {
6361    Vcvt(al, dt1, dt2, rd, rm, fbits);
6362  }
6363
6364  void Vcvt(Condition cond,
6365            DataType dt1,
6366            DataType dt2,
6367            QRegister rd,
6368            QRegister rm,
6369            int32_t fbits) {
6370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6372    VIXL_ASSERT(allow_macro_instructions_);
6373    VIXL_ASSERT(OutsideITBlock());
6374    MacroEmissionCheckScope guard(this);
6375    ITScope it_scope(this, &cond);
6376    vcvt(cond, dt1, dt2, rd, rm, fbits);
6377  }
6378  void Vcvt(
6379      DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) {
6380    Vcvt(al, dt1, dt2, rd, rm, fbits);
6381  }
6382
6383  void Vcvt(Condition cond,
6384            DataType dt1,
6385            DataType dt2,
6386            SRegister rd,
6387            SRegister rm,
6388            int32_t fbits) {
6389    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6390    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6391    VIXL_ASSERT(allow_macro_instructions_);
6392    VIXL_ASSERT(OutsideITBlock());
6393    MacroEmissionCheckScope guard(this);
6394    ITScope it_scope(this, &cond);
6395    vcvt(cond, dt1, dt2, rd, rm, fbits);
6396  }
6397  void Vcvt(
6398      DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) {
6399    Vcvt(al, dt1, dt2, rd, rm, fbits);
6400  }
6401
6402  void Vcvt(
6403      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6404    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6405    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6406    VIXL_ASSERT(allow_macro_instructions_);
6407    VIXL_ASSERT(OutsideITBlock());
6408    MacroEmissionCheckScope guard(this);
6409    ITScope it_scope(this, &cond);
6410    vcvt(cond, dt1, dt2, rd, rm);
6411  }
6412  void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6413    Vcvt(al, dt1, dt2, rd, rm);
6414  }
6415
6416  void Vcvt(
6417      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6418    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6419    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6420    VIXL_ASSERT(allow_macro_instructions_);
6421    VIXL_ASSERT(OutsideITBlock());
6422    MacroEmissionCheckScope guard(this);
6423    ITScope it_scope(this, &cond);
6424    vcvt(cond, dt1, dt2, rd, rm);
6425  }
6426  void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6427    Vcvt(al, dt1, dt2, rd, rm);
6428  }
6429
6430  void Vcvt(
6431      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6432    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6433    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6434    VIXL_ASSERT(allow_macro_instructions_);
6435    VIXL_ASSERT(OutsideITBlock());
6436    MacroEmissionCheckScope guard(this);
6437    ITScope it_scope(this, &cond);
6438    vcvt(cond, dt1, dt2, rd, rm);
6439  }
6440  void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6441    Vcvt(al, dt1, dt2, rd, rm);
6442  }
6443
6444  void Vcvt(
6445      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6446    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6447    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6448    VIXL_ASSERT(allow_macro_instructions_);
6449    VIXL_ASSERT(OutsideITBlock());
6450    MacroEmissionCheckScope guard(this);
6451    ITScope it_scope(this, &cond);
6452    vcvt(cond, dt1, dt2, rd, rm);
6453  }
6454  void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6455    Vcvt(al, dt1, dt2, rd, rm);
6456  }
6457
6458  void Vcvt(
6459      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6460    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6461    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6462    VIXL_ASSERT(allow_macro_instructions_);
6463    VIXL_ASSERT(OutsideITBlock());
6464    MacroEmissionCheckScope guard(this);
6465    ITScope it_scope(this, &cond);
6466    vcvt(cond, dt1, dt2, rd, rm);
6467  }
6468  void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6469    Vcvt(al, dt1, dt2, rd, rm);
6470  }
6471
6472  void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6473    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6474    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6475    VIXL_ASSERT(allow_macro_instructions_);
6476    VIXL_ASSERT(OutsideITBlock());
6477    MacroEmissionCheckScope guard(this);
6478    vcvta(dt1, dt2, rd, rm);
6479  }
6480
6481  void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6482    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6483    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6484    VIXL_ASSERT(allow_macro_instructions_);
6485    VIXL_ASSERT(OutsideITBlock());
6486    MacroEmissionCheckScope guard(this);
6487    vcvta(dt1, dt2, rd, rm);
6488  }
6489
6490  void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6491    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6492    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6493    VIXL_ASSERT(allow_macro_instructions_);
6494    VIXL_ASSERT(OutsideITBlock());
6495    MacroEmissionCheckScope guard(this);
6496    vcvta(dt1, dt2, rd, rm);
6497  }
6498
6499  void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6500    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6501    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6502    VIXL_ASSERT(allow_macro_instructions_);
6503    VIXL_ASSERT(OutsideITBlock());
6504    MacroEmissionCheckScope guard(this);
6505    vcvta(dt1, dt2, rd, rm);
6506  }
6507
6508  void Vcvtb(
6509      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6510    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6511    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6512    VIXL_ASSERT(allow_macro_instructions_);
6513    VIXL_ASSERT(OutsideITBlock());
6514    MacroEmissionCheckScope guard(this);
6515    ITScope it_scope(this, &cond);
6516    vcvtb(cond, dt1, dt2, rd, rm);
6517  }
6518  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6519    Vcvtb(al, dt1, dt2, rd, rm);
6520  }
6521
6522  void Vcvtb(
6523      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6524    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6525    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6526    VIXL_ASSERT(allow_macro_instructions_);
6527    VIXL_ASSERT(OutsideITBlock());
6528    MacroEmissionCheckScope guard(this);
6529    ITScope it_scope(this, &cond);
6530    vcvtb(cond, dt1, dt2, rd, rm);
6531  }
6532  void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6533    Vcvtb(al, dt1, dt2, rd, rm);
6534  }
6535
6536  void Vcvtb(
6537      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6540    VIXL_ASSERT(allow_macro_instructions_);
6541    VIXL_ASSERT(OutsideITBlock());
6542    MacroEmissionCheckScope guard(this);
6543    ITScope it_scope(this, &cond);
6544    vcvtb(cond, dt1, dt2, rd, rm);
6545  }
6546  void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6547    Vcvtb(al, dt1, dt2, rd, rm);
6548  }
6549
6550  void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6551    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6552    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6553    VIXL_ASSERT(allow_macro_instructions_);
6554    VIXL_ASSERT(OutsideITBlock());
6555    MacroEmissionCheckScope guard(this);
6556    vcvtm(dt1, dt2, rd, rm);
6557  }
6558
6559  void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6560    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6561    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6562    VIXL_ASSERT(allow_macro_instructions_);
6563    VIXL_ASSERT(OutsideITBlock());
6564    MacroEmissionCheckScope guard(this);
6565    vcvtm(dt1, dt2, rd, rm);
6566  }
6567
6568  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6569    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6570    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6571    VIXL_ASSERT(allow_macro_instructions_);
6572    VIXL_ASSERT(OutsideITBlock());
6573    MacroEmissionCheckScope guard(this);
6574    vcvtm(dt1, dt2, rd, rm);
6575  }
6576
6577  void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6578    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6579    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6580    VIXL_ASSERT(allow_macro_instructions_);
6581    VIXL_ASSERT(OutsideITBlock());
6582    MacroEmissionCheckScope guard(this);
6583    vcvtm(dt1, dt2, rd, rm);
6584  }
6585
6586  void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6587    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6589    VIXL_ASSERT(allow_macro_instructions_);
6590    VIXL_ASSERT(OutsideITBlock());
6591    MacroEmissionCheckScope guard(this);
6592    vcvtn(dt1, dt2, rd, rm);
6593  }
6594
6595  void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6596    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6597    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6598    VIXL_ASSERT(allow_macro_instructions_);
6599    VIXL_ASSERT(OutsideITBlock());
6600    MacroEmissionCheckScope guard(this);
6601    vcvtn(dt1, dt2, rd, rm);
6602  }
6603
6604  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6607    VIXL_ASSERT(allow_macro_instructions_);
6608    VIXL_ASSERT(OutsideITBlock());
6609    MacroEmissionCheckScope guard(this);
6610    vcvtn(dt1, dt2, rd, rm);
6611  }
6612
6613  void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6614    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6615    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6616    VIXL_ASSERT(allow_macro_instructions_);
6617    VIXL_ASSERT(OutsideITBlock());
6618    MacroEmissionCheckScope guard(this);
6619    vcvtn(dt1, dt2, rd, rm);
6620  }
6621
6622  void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6623    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6624    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6625    VIXL_ASSERT(allow_macro_instructions_);
6626    VIXL_ASSERT(OutsideITBlock());
6627    MacroEmissionCheckScope guard(this);
6628    vcvtp(dt1, dt2, rd, rm);
6629  }
6630
6631  void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6632    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6633    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6634    VIXL_ASSERT(allow_macro_instructions_);
6635    VIXL_ASSERT(OutsideITBlock());
6636    MacroEmissionCheckScope guard(this);
6637    vcvtp(dt1, dt2, rd, rm);
6638  }
6639
6640  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6641    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6642    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6643    VIXL_ASSERT(allow_macro_instructions_);
6644    VIXL_ASSERT(OutsideITBlock());
6645    MacroEmissionCheckScope guard(this);
6646    vcvtp(dt1, dt2, rd, rm);
6647  }
6648
6649  void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6651    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6652    VIXL_ASSERT(allow_macro_instructions_);
6653    VIXL_ASSERT(OutsideITBlock());
6654    MacroEmissionCheckScope guard(this);
6655    vcvtp(dt1, dt2, rd, rm);
6656  }
6657
6658  void Vcvtr(
6659      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6660    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6661    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6662    VIXL_ASSERT(allow_macro_instructions_);
6663    VIXL_ASSERT(OutsideITBlock());
6664    MacroEmissionCheckScope guard(this);
6665    ITScope it_scope(this, &cond);
6666    vcvtr(cond, dt1, dt2, rd, rm);
6667  }
6668  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6669    Vcvtr(al, dt1, dt2, rd, rm);
6670  }
6671
6672  void Vcvtr(
6673      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6674    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6675    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6676    VIXL_ASSERT(allow_macro_instructions_);
6677    VIXL_ASSERT(OutsideITBlock());
6678    MacroEmissionCheckScope guard(this);
6679    ITScope it_scope(this, &cond);
6680    vcvtr(cond, dt1, dt2, rd, rm);
6681  }
6682  void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6683    Vcvtr(al, dt1, dt2, rd, rm);
6684  }
6685
6686  void Vcvtt(
6687      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6688    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6689    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6690    VIXL_ASSERT(allow_macro_instructions_);
6691    VIXL_ASSERT(OutsideITBlock());
6692    MacroEmissionCheckScope guard(this);
6693    ITScope it_scope(this, &cond);
6694    vcvtt(cond, dt1, dt2, rd, rm);
6695  }
6696  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6697    Vcvtt(al, dt1, dt2, rd, rm);
6698  }
6699
6700  void Vcvtt(
6701      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6702    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6703    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6704    VIXL_ASSERT(allow_macro_instructions_);
6705    VIXL_ASSERT(OutsideITBlock());
6706    MacroEmissionCheckScope guard(this);
6707    ITScope it_scope(this, &cond);
6708    vcvtt(cond, dt1, dt2, rd, rm);
6709  }
6710  void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6711    Vcvtt(al, dt1, dt2, rd, rm);
6712  }
6713
6714  void Vcvtt(
6715      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6716    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6717    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6718    VIXL_ASSERT(allow_macro_instructions_);
6719    VIXL_ASSERT(OutsideITBlock());
6720    MacroEmissionCheckScope guard(this);
6721    ITScope it_scope(this, &cond);
6722    vcvtt(cond, dt1, dt2, rd, rm);
6723  }
6724  void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6725    Vcvtt(al, dt1, dt2, rd, rm);
6726  }
6727
6728  void Vdiv(
6729      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6730    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6731    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6732    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6733    VIXL_ASSERT(allow_macro_instructions_);
6734    VIXL_ASSERT(OutsideITBlock());
6735    MacroEmissionCheckScope guard(this);
6736    ITScope it_scope(this, &cond);
6737    vdiv(cond, dt, rd, rn, rm);
6738  }
6739  void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6740    Vdiv(al, dt, rd, rn, rm);
6741  }
6742
6743  void Vdiv(
6744      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6745    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6746    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6747    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6748    VIXL_ASSERT(allow_macro_instructions_);
6749    VIXL_ASSERT(OutsideITBlock());
6750    MacroEmissionCheckScope guard(this);
6751    ITScope it_scope(this, &cond);
6752    vdiv(cond, dt, rd, rn, rm);
6753  }
6754  void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6755    Vdiv(al, dt, rd, rn, rm);
6756  }
6757
6758  void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) {
6759    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6760    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6761    VIXL_ASSERT(allow_macro_instructions_);
6762    VIXL_ASSERT(OutsideITBlock());
6763    MacroEmissionCheckScope guard(this);
6764    ITScope it_scope(this, &cond);
6765    vdup(cond, dt, rd, rt);
6766  }
6767  void Vdup(DataType dt, QRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6768
6769  void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) {
6770    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6771    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6772    VIXL_ASSERT(allow_macro_instructions_);
6773    VIXL_ASSERT(OutsideITBlock());
6774    MacroEmissionCheckScope guard(this);
6775    ITScope it_scope(this, &cond);
6776    vdup(cond, dt, rd, rt);
6777  }
6778  void Vdup(DataType dt, DRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6779
6780  void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) {
6781    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6782    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6783    VIXL_ASSERT(allow_macro_instructions_);
6784    VIXL_ASSERT(OutsideITBlock());
6785    MacroEmissionCheckScope guard(this);
6786    ITScope it_scope(this, &cond);
6787    vdup(cond, dt, rd, rm);
6788  }
6789  void Vdup(DataType dt, DRegister rd, DRegisterLane rm) {
6790    Vdup(al, dt, rd, rm);
6791  }
6792
6793  void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) {
6794    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6796    VIXL_ASSERT(allow_macro_instructions_);
6797    VIXL_ASSERT(OutsideITBlock());
6798    MacroEmissionCheckScope guard(this);
6799    ITScope it_scope(this, &cond);
6800    vdup(cond, dt, rd, rm);
6801  }
6802  void Vdup(DataType dt, QRegister rd, DRegisterLane rm) {
6803    Vdup(al, dt, rd, rm);
6804  }
6805
6806  void Veor(
6807      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6808    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6809    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6810    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6811    VIXL_ASSERT(allow_macro_instructions_);
6812    VIXL_ASSERT(OutsideITBlock());
6813    MacroEmissionCheckScope guard(this);
6814    ITScope it_scope(this, &cond);
6815    veor(cond, dt, rd, rn, rm);
6816  }
6817  void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6818    Veor(al, dt, rd, rn, rm);
6819  }
6820  void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6821    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6822  }
6823  void Veor(DRegister rd, DRegister rn, DRegister rm) {
6824    Veor(al, kDataTypeValueNone, rd, rn, rm);
6825  }
6826
6827  void Veor(
6828      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6829    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6830    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6831    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6832    VIXL_ASSERT(allow_macro_instructions_);
6833    VIXL_ASSERT(OutsideITBlock());
6834    MacroEmissionCheckScope guard(this);
6835    ITScope it_scope(this, &cond);
6836    veor(cond, dt, rd, rn, rm);
6837  }
6838  void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6839    Veor(al, dt, rd, rn, rm);
6840  }
6841  void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
6842    Veor(cond, kDataTypeValueNone, rd, rn, rm);
6843  }
6844  void Veor(QRegister rd, QRegister rn, QRegister rm) {
6845    Veor(al, kDataTypeValueNone, rd, rn, rm);
6846  }
6847
6848  void Vext(Condition cond,
6849            DataType dt,
6850            DRegister rd,
6851            DRegister rn,
6852            DRegister rm,
6853            const DOperand& operand) {
6854    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6855    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6856    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6857    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6858    VIXL_ASSERT(allow_macro_instructions_);
6859    VIXL_ASSERT(OutsideITBlock());
6860    MacroEmissionCheckScope guard(this);
6861    ITScope it_scope(this, &cond);
6862    vext(cond, dt, rd, rn, rm, operand);
6863  }
6864  void Vext(DataType dt,
6865            DRegister rd,
6866            DRegister rn,
6867            DRegister rm,
6868            const DOperand& operand) {
6869    Vext(al, dt, rd, rn, rm, operand);
6870  }
6871
6872  void Vext(Condition cond,
6873            DataType dt,
6874            QRegister rd,
6875            QRegister rn,
6876            QRegister rm,
6877            const QOperand& operand) {
6878    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6879    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6880    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6881    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6882    VIXL_ASSERT(allow_macro_instructions_);
6883    VIXL_ASSERT(OutsideITBlock());
6884    MacroEmissionCheckScope guard(this);
6885    ITScope it_scope(this, &cond);
6886    vext(cond, dt, rd, rn, rm, operand);
6887  }
6888  void Vext(DataType dt,
6889            QRegister rd,
6890            QRegister rn,
6891            QRegister rm,
6892            const QOperand& operand) {
6893    Vext(al, dt, rd, rn, rm, operand);
6894  }
6895
6896  void Vfma(
6897      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6898    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6899    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6900    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6901    VIXL_ASSERT(allow_macro_instructions_);
6902    VIXL_ASSERT(OutsideITBlock());
6903    MacroEmissionCheckScope guard(this);
6904    ITScope it_scope(this, &cond);
6905    vfma(cond, dt, rd, rn, rm);
6906  }
6907  void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6908    Vfma(al, dt, rd, rn, rm);
6909  }
6910
6911  void Vfma(
6912      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6913    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6914    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6915    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6916    VIXL_ASSERT(allow_macro_instructions_);
6917    VIXL_ASSERT(OutsideITBlock());
6918    MacroEmissionCheckScope guard(this);
6919    ITScope it_scope(this, &cond);
6920    vfma(cond, dt, rd, rn, rm);
6921  }
6922  void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6923    Vfma(al, dt, rd, rn, rm);
6924  }
6925
6926  void Vfma(
6927      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6928    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6929    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6930    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6931    VIXL_ASSERT(allow_macro_instructions_);
6932    VIXL_ASSERT(OutsideITBlock());
6933    MacroEmissionCheckScope guard(this);
6934    ITScope it_scope(this, &cond);
6935    vfma(cond, dt, rd, rn, rm);
6936  }
6937  void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6938    Vfma(al, dt, rd, rn, rm);
6939  }
6940
6941  void Vfms(
6942      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6943    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6944    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6945    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6946    VIXL_ASSERT(allow_macro_instructions_);
6947    VIXL_ASSERT(OutsideITBlock());
6948    MacroEmissionCheckScope guard(this);
6949    ITScope it_scope(this, &cond);
6950    vfms(cond, dt, rd, rn, rm);
6951  }
6952  void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6953    Vfms(al, dt, rd, rn, rm);
6954  }
6955
6956  void Vfms(
6957      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6958    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6959    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6960    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6961    VIXL_ASSERT(allow_macro_instructions_);
6962    VIXL_ASSERT(OutsideITBlock());
6963    MacroEmissionCheckScope guard(this);
6964    ITScope it_scope(this, &cond);
6965    vfms(cond, dt, rd, rn, rm);
6966  }
6967  void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6968    Vfms(al, dt, rd, rn, rm);
6969  }
6970
6971  void Vfms(
6972      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6973    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6976    VIXL_ASSERT(allow_macro_instructions_);
6977    VIXL_ASSERT(OutsideITBlock());
6978    MacroEmissionCheckScope guard(this);
6979    ITScope it_scope(this, &cond);
6980    vfms(cond, dt, rd, rn, rm);
6981  }
6982  void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6983    Vfms(al, dt, rd, rn, rm);
6984  }
6985
6986  void Vfnma(
6987      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6988    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6989    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6990    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6991    VIXL_ASSERT(allow_macro_instructions_);
6992    VIXL_ASSERT(OutsideITBlock());
6993    MacroEmissionCheckScope guard(this);
6994    ITScope it_scope(this, &cond);
6995    vfnma(cond, dt, rd, rn, rm);
6996  }
6997  void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6998    Vfnma(al, dt, rd, rn, rm);
6999  }
7000
7001  void Vfnma(
7002      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7003    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7004    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7005    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7006    VIXL_ASSERT(allow_macro_instructions_);
7007    VIXL_ASSERT(OutsideITBlock());
7008    MacroEmissionCheckScope guard(this);
7009    ITScope it_scope(this, &cond);
7010    vfnma(cond, dt, rd, rn, rm);
7011  }
7012  void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7013    Vfnma(al, dt, rd, rn, rm);
7014  }
7015
7016  void Vfnms(
7017      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7018    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7019    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7020    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7021    VIXL_ASSERT(allow_macro_instructions_);
7022    VIXL_ASSERT(OutsideITBlock());
7023    MacroEmissionCheckScope guard(this);
7024    ITScope it_scope(this, &cond);
7025    vfnms(cond, dt, rd, rn, rm);
7026  }
7027  void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7028    Vfnms(al, dt, rd, rn, rm);
7029  }
7030
7031  void Vfnms(
7032      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7033    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7034    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7035    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7036    VIXL_ASSERT(allow_macro_instructions_);
7037    VIXL_ASSERT(OutsideITBlock());
7038    MacroEmissionCheckScope guard(this);
7039    ITScope it_scope(this, &cond);
7040    vfnms(cond, dt, rd, rn, rm);
7041  }
7042  void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7043    Vfnms(al, dt, rd, rn, rm);
7044  }
7045
7046  void Vhadd(
7047      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7048    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7049    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7050    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7051    VIXL_ASSERT(allow_macro_instructions_);
7052    VIXL_ASSERT(OutsideITBlock());
7053    MacroEmissionCheckScope guard(this);
7054    ITScope it_scope(this, &cond);
7055    vhadd(cond, dt, rd, rn, rm);
7056  }
7057  void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7058    Vhadd(al, dt, rd, rn, rm);
7059  }
7060
7061  void Vhadd(
7062      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7064    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7065    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7066    VIXL_ASSERT(allow_macro_instructions_);
7067    VIXL_ASSERT(OutsideITBlock());
7068    MacroEmissionCheckScope guard(this);
7069    ITScope it_scope(this, &cond);
7070    vhadd(cond, dt, rd, rn, rm);
7071  }
7072  void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7073    Vhadd(al, dt, rd, rn, rm);
7074  }
7075
7076  void Vhsub(
7077      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7080    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7081    VIXL_ASSERT(allow_macro_instructions_);
7082    VIXL_ASSERT(OutsideITBlock());
7083    MacroEmissionCheckScope guard(this);
7084    ITScope it_scope(this, &cond);
7085    vhsub(cond, dt, rd, rn, rm);
7086  }
7087  void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7088    Vhsub(al, dt, rd, rn, rm);
7089  }
7090
7091  void Vhsub(
7092      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7093    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7094    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7095    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7096    VIXL_ASSERT(allow_macro_instructions_);
7097    VIXL_ASSERT(OutsideITBlock());
7098    MacroEmissionCheckScope guard(this);
7099    ITScope it_scope(this, &cond);
7100    vhsub(cond, dt, rd, rn, rm);
7101  }
7102  void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7103    Vhsub(al, dt, rd, rn, rm);
7104  }
7105
7106  void Vld1(Condition cond,
7107            DataType dt,
7108            const NeonRegisterList& nreglist,
7109            const AlignedMemOperand& operand) {
7110    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7111    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7112    VIXL_ASSERT(allow_macro_instructions_);
7113    VIXL_ASSERT(OutsideITBlock());
7114    MacroEmissionCheckScope guard(this);
7115    ITScope it_scope(this, &cond);
7116    vld1(cond, dt, nreglist, operand);
7117  }
7118  void Vld1(DataType dt,
7119            const NeonRegisterList& nreglist,
7120            const AlignedMemOperand& operand) {
7121    Vld1(al, dt, nreglist, operand);
7122  }
7123
7124  void Vld2(Condition cond,
7125            DataType dt,
7126            const NeonRegisterList& nreglist,
7127            const AlignedMemOperand& operand) {
7128    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7129    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7130    VIXL_ASSERT(allow_macro_instructions_);
7131    VIXL_ASSERT(OutsideITBlock());
7132    MacroEmissionCheckScope guard(this);
7133    ITScope it_scope(this, &cond);
7134    vld2(cond, dt, nreglist, operand);
7135  }
7136  void Vld2(DataType dt,
7137            const NeonRegisterList& nreglist,
7138            const AlignedMemOperand& operand) {
7139    Vld2(al, dt, nreglist, operand);
7140  }
7141
7142  void Vld3(Condition cond,
7143            DataType dt,
7144            const NeonRegisterList& nreglist,
7145            const AlignedMemOperand& operand) {
7146    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7147    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7148    VIXL_ASSERT(allow_macro_instructions_);
7149    VIXL_ASSERT(OutsideITBlock());
7150    MacroEmissionCheckScope guard(this);
7151    ITScope it_scope(this, &cond);
7152    vld3(cond, dt, nreglist, operand);
7153  }
7154  void Vld3(DataType dt,
7155            const NeonRegisterList& nreglist,
7156            const AlignedMemOperand& operand) {
7157    Vld3(al, dt, nreglist, operand);
7158  }
7159
7160  void Vld3(Condition cond,
7161            DataType dt,
7162            const NeonRegisterList& nreglist,
7163            const MemOperand& operand) {
7164    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7165    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7166    VIXL_ASSERT(allow_macro_instructions_);
7167    VIXL_ASSERT(OutsideITBlock());
7168    MacroEmissionCheckScope guard(this);
7169    ITScope it_scope(this, &cond);
7170    vld3(cond, dt, nreglist, operand);
7171  }
7172  void Vld3(DataType dt,
7173            const NeonRegisterList& nreglist,
7174            const MemOperand& operand) {
7175    Vld3(al, dt, nreglist, operand);
7176  }
7177
7178  void Vld4(Condition cond,
7179            DataType dt,
7180            const NeonRegisterList& nreglist,
7181            const AlignedMemOperand& operand) {
7182    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7183    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7184    VIXL_ASSERT(allow_macro_instructions_);
7185    VIXL_ASSERT(OutsideITBlock());
7186    MacroEmissionCheckScope guard(this);
7187    ITScope it_scope(this, &cond);
7188    vld4(cond, dt, nreglist, operand);
7189  }
7190  void Vld4(DataType dt,
7191            const NeonRegisterList& nreglist,
7192            const AlignedMemOperand& operand) {
7193    Vld4(al, dt, nreglist, operand);
7194  }
7195
7196  void Vldm(Condition cond,
7197            DataType dt,
7198            Register rn,
7199            WriteBack write_back,
7200            DRegisterList dreglist) {
7201    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7202    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7203    VIXL_ASSERT(allow_macro_instructions_);
7204    VIXL_ASSERT(OutsideITBlock());
7205    MacroEmissionCheckScope guard(this);
7206    ITScope it_scope(this, &cond);
7207    vldm(cond, dt, rn, write_back, dreglist);
7208  }
7209  void Vldm(DataType dt,
7210            Register rn,
7211            WriteBack write_back,
7212            DRegisterList dreglist) {
7213    Vldm(al, dt, rn, write_back, dreglist);
7214  }
7215  void Vldm(Condition cond,
7216            Register rn,
7217            WriteBack write_back,
7218            DRegisterList dreglist) {
7219    Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist);
7220  }
7221  void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) {
7222    Vldm(al, kDataTypeValueNone, rn, write_back, dreglist);
7223  }
7224
7225  void Vldm(Condition cond,
7226            DataType dt,
7227            Register rn,
7228            WriteBack write_back,
7229            SRegisterList sreglist) {
7230    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7231    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7232    VIXL_ASSERT(allow_macro_instructions_);
7233    VIXL_ASSERT(OutsideITBlock());
7234    MacroEmissionCheckScope guard(this);
7235    ITScope it_scope(this, &cond);
7236    vldm(cond, dt, rn, write_back, sreglist);
7237  }
7238  void Vldm(DataType dt,
7239            Register rn,
7240            WriteBack write_back,
7241            SRegisterList sreglist) {
7242    Vldm(al, dt, rn, write_back, sreglist);
7243  }
7244  void Vldm(Condition cond,
7245            Register rn,
7246            WriteBack write_back,
7247            SRegisterList sreglist) {
7248    Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist);
7249  }
7250  void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) {
7251    Vldm(al, kDataTypeValueNone, rn, write_back, sreglist);
7252  }
7253
7254  void Vldmdb(Condition cond,
7255              DataType dt,
7256              Register rn,
7257              WriteBack write_back,
7258              DRegisterList dreglist) {
7259    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7260    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7261    VIXL_ASSERT(allow_macro_instructions_);
7262    VIXL_ASSERT(OutsideITBlock());
7263    MacroEmissionCheckScope guard(this);
7264    ITScope it_scope(this, &cond);
7265    vldmdb(cond, dt, rn, write_back, dreglist);
7266  }
7267  void Vldmdb(DataType dt,
7268              Register rn,
7269              WriteBack write_back,
7270              DRegisterList dreglist) {
7271    Vldmdb(al, dt, rn, write_back, dreglist);
7272  }
7273  void Vldmdb(Condition cond,
7274              Register rn,
7275              WriteBack write_back,
7276              DRegisterList dreglist) {
7277    Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
7278  }
7279  void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
7280    Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
7281  }
7282
7283  void Vldmdb(Condition cond,
7284              DataType dt,
7285              Register rn,
7286              WriteBack write_back,
7287              SRegisterList sreglist) {
7288    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7289    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7290    VIXL_ASSERT(allow_macro_instructions_);
7291    VIXL_ASSERT(OutsideITBlock());
7292    MacroEmissionCheckScope guard(this);
7293    ITScope it_scope(this, &cond);
7294    vldmdb(cond, dt, rn, write_back, sreglist);
7295  }
7296  void Vldmdb(DataType dt,
7297              Register rn,
7298              WriteBack write_back,
7299              SRegisterList sreglist) {
7300    Vldmdb(al, dt, rn, write_back, sreglist);
7301  }
7302  void Vldmdb(Condition cond,
7303              Register rn,
7304              WriteBack write_back,
7305              SRegisterList sreglist) {
7306    Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
7307  }
7308  void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
7309    Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
7310  }
7311
7312  void Vldmia(Condition cond,
7313              DataType dt,
7314              Register rn,
7315              WriteBack write_back,
7316              DRegisterList dreglist) {
7317    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7318    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7319    VIXL_ASSERT(allow_macro_instructions_);
7320    VIXL_ASSERT(OutsideITBlock());
7321    MacroEmissionCheckScope guard(this);
7322    ITScope it_scope(this, &cond);
7323    vldmia(cond, dt, rn, write_back, dreglist);
7324  }
7325  void Vldmia(DataType dt,
7326              Register rn,
7327              WriteBack write_back,
7328              DRegisterList dreglist) {
7329    Vldmia(al, dt, rn, write_back, dreglist);
7330  }
7331  void Vldmia(Condition cond,
7332              Register rn,
7333              WriteBack write_back,
7334              DRegisterList dreglist) {
7335    Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
7336  }
7337  void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
7338    Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist);
7339  }
7340
7341  void Vldmia(Condition cond,
7342              DataType dt,
7343              Register rn,
7344              WriteBack write_back,
7345              SRegisterList sreglist) {
7346    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7347    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7348    VIXL_ASSERT(allow_macro_instructions_);
7349    VIXL_ASSERT(OutsideITBlock());
7350    MacroEmissionCheckScope guard(this);
7351    ITScope it_scope(this, &cond);
7352    vldmia(cond, dt, rn, write_back, sreglist);
7353  }
7354  void Vldmia(DataType dt,
7355              Register rn,
7356              WriteBack write_back,
7357              SRegisterList sreglist) {
7358    Vldmia(al, dt, rn, write_back, sreglist);
7359  }
7360  void Vldmia(Condition cond,
7361              Register rn,
7362              WriteBack write_back,
7363              SRegisterList sreglist) {
7364    Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
7365  }
7366  void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
7367    Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist);
7368  }
7369
7370  void Vldr(Condition cond, DataType dt, DRegister rd, Label* label) {
7371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7372    VIXL_ASSERT(allow_macro_instructions_);
7373    VIXL_ASSERT(OutsideITBlock());
7374    MacroEmissionCheckScope guard(this);
7375    ITScope it_scope(this, &cond);
7376    vldr(cond, dt, rd, label);
7377  }
7378  void Vldr(DataType dt, DRegister rd, Label* label) {
7379    Vldr(al, dt, rd, label);
7380  }
7381  void Vldr(Condition cond, DRegister rd, Label* label) {
7382    Vldr(cond, Untyped64, rd, label);
7383  }
7384  void Vldr(DRegister rd, Label* label) { Vldr(al, Untyped64, rd, label); }
7385
7386  void Vldr(Condition cond,
7387            DataType dt,
7388            DRegister rd,
7389            const MemOperand& operand) {
7390    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7391    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7392    VIXL_ASSERT(allow_macro_instructions_);
7393    VIXL_ASSERT(OutsideITBlock());
7394    MacroEmissionCheckScope guard(this);
7395    ITScope it_scope(this, &cond);
7396    vldr(cond, dt, rd, operand);
7397  }
7398  void Vldr(DataType dt, DRegister rd, const MemOperand& operand) {
7399    Vldr(al, dt, rd, operand);
7400  }
7401  void Vldr(Condition cond, DRegister rd, const MemOperand& operand) {
7402    Vldr(cond, Untyped64, rd, operand);
7403  }
7404  void Vldr(DRegister rd, const MemOperand& operand) {
7405    Vldr(al, Untyped64, rd, operand);
7406  }
7407
7408  void Vldr(Condition cond, DataType dt, SRegister rd, Label* label) {
7409    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7410    VIXL_ASSERT(allow_macro_instructions_);
7411    VIXL_ASSERT(OutsideITBlock());
7412    MacroEmissionCheckScope guard(this);
7413    ITScope it_scope(this, &cond);
7414    vldr(cond, dt, rd, label);
7415  }
7416  void Vldr(DataType dt, SRegister rd, Label* label) {
7417    Vldr(al, dt, rd, label);
7418  }
7419  void Vldr(Condition cond, SRegister rd, Label* label) {
7420    Vldr(cond, Untyped32, rd, label);
7421  }
7422  void Vldr(SRegister rd, Label* label) { Vldr(al, Untyped32, rd, label); }
7423
7424  void Vldr(Condition cond,
7425            DataType dt,
7426            SRegister rd,
7427            const MemOperand& operand) {
7428    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7429    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7430    VIXL_ASSERT(allow_macro_instructions_);
7431    VIXL_ASSERT(OutsideITBlock());
7432    MacroEmissionCheckScope guard(this);
7433    ITScope it_scope(this, &cond);
7434    vldr(cond, dt, rd, operand);
7435  }
7436  void Vldr(DataType dt, SRegister rd, const MemOperand& operand) {
7437    Vldr(al, dt, rd, operand);
7438  }
7439  void Vldr(Condition cond, SRegister rd, const MemOperand& operand) {
7440    Vldr(cond, Untyped32, rd, operand);
7441  }
7442  void Vldr(SRegister rd, const MemOperand& operand) {
7443    Vldr(al, Untyped32, rd, operand);
7444  }
7445
7446  void Vmax(
7447      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7448    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7449    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7450    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7451    VIXL_ASSERT(allow_macro_instructions_);
7452    VIXL_ASSERT(OutsideITBlock());
7453    MacroEmissionCheckScope guard(this);
7454    ITScope it_scope(this, &cond);
7455    vmax(cond, dt, rd, rn, rm);
7456  }
7457  void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7458    Vmax(al, dt, rd, rn, rm);
7459  }
7460
7461  void Vmax(
7462      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7463    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7464    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7465    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7466    VIXL_ASSERT(allow_macro_instructions_);
7467    VIXL_ASSERT(OutsideITBlock());
7468    MacroEmissionCheckScope guard(this);
7469    ITScope it_scope(this, &cond);
7470    vmax(cond, dt, rd, rn, rm);
7471  }
7472  void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7473    Vmax(al, dt, rd, rn, rm);
7474  }
7475
7476  void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7477    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7478    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7479    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7480    VIXL_ASSERT(allow_macro_instructions_);
7481    VIXL_ASSERT(OutsideITBlock());
7482    MacroEmissionCheckScope guard(this);
7483    vmaxnm(dt, rd, rn, rm);
7484  }
7485
7486  void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7487    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7488    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7490    VIXL_ASSERT(allow_macro_instructions_);
7491    VIXL_ASSERT(OutsideITBlock());
7492    MacroEmissionCheckScope guard(this);
7493    vmaxnm(dt, rd, rn, rm);
7494  }
7495
7496  void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7497    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7498    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7500    VIXL_ASSERT(allow_macro_instructions_);
7501    VIXL_ASSERT(OutsideITBlock());
7502    MacroEmissionCheckScope guard(this);
7503    vmaxnm(dt, rd, rn, rm);
7504  }
7505
7506  void Vmin(
7507      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7508    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7509    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7510    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7511    VIXL_ASSERT(allow_macro_instructions_);
7512    VIXL_ASSERT(OutsideITBlock());
7513    MacroEmissionCheckScope guard(this);
7514    ITScope it_scope(this, &cond);
7515    vmin(cond, dt, rd, rn, rm);
7516  }
7517  void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7518    Vmin(al, dt, rd, rn, rm);
7519  }
7520
7521  void Vmin(
7522      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7523    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7524    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7525    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7526    VIXL_ASSERT(allow_macro_instructions_);
7527    VIXL_ASSERT(OutsideITBlock());
7528    MacroEmissionCheckScope guard(this);
7529    ITScope it_scope(this, &cond);
7530    vmin(cond, dt, rd, rn, rm);
7531  }
7532  void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7533    Vmin(al, dt, rd, rn, rm);
7534  }
7535
7536  void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7537    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7540    VIXL_ASSERT(allow_macro_instructions_);
7541    VIXL_ASSERT(OutsideITBlock());
7542    MacroEmissionCheckScope guard(this);
7543    vminnm(dt, rd, rn, rm);
7544  }
7545
7546  void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7547    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7548    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7549    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7550    VIXL_ASSERT(allow_macro_instructions_);
7551    VIXL_ASSERT(OutsideITBlock());
7552    MacroEmissionCheckScope guard(this);
7553    vminnm(dt, rd, rn, rm);
7554  }
7555
7556  void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7557    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7558    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7559    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7560    VIXL_ASSERT(allow_macro_instructions_);
7561    VIXL_ASSERT(OutsideITBlock());
7562    MacroEmissionCheckScope guard(this);
7563    vminnm(dt, rd, rn, rm);
7564  }
7565
7566  void Vmla(Condition cond,
7567            DataType dt,
7568            DRegister rd,
7569            DRegister rn,
7570            DRegisterLane rm) {
7571    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7572    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7573    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7574    VIXL_ASSERT(allow_macro_instructions_);
7575    VIXL_ASSERT(OutsideITBlock());
7576    MacroEmissionCheckScope guard(this);
7577    ITScope it_scope(this, &cond);
7578    vmla(cond, dt, rd, rn, rm);
7579  }
7580  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7581    Vmla(al, dt, rd, rn, rm);
7582  }
7583
7584  void Vmla(Condition cond,
7585            DataType dt,
7586            QRegister rd,
7587            QRegister rn,
7588            DRegisterLane rm) {
7589    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7590    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7591    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7592    VIXL_ASSERT(allow_macro_instructions_);
7593    VIXL_ASSERT(OutsideITBlock());
7594    MacroEmissionCheckScope guard(this);
7595    ITScope it_scope(this, &cond);
7596    vmla(cond, dt, rd, rn, rm);
7597  }
7598  void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7599    Vmla(al, dt, rd, rn, rm);
7600  }
7601
7602  void Vmla(
7603      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7605    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7606    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7607    VIXL_ASSERT(allow_macro_instructions_);
7608    VIXL_ASSERT(OutsideITBlock());
7609    MacroEmissionCheckScope guard(this);
7610    ITScope it_scope(this, &cond);
7611    vmla(cond, dt, rd, rn, rm);
7612  }
7613  void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7614    Vmla(al, dt, rd, rn, rm);
7615  }
7616
7617  void Vmla(
7618      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7619    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7621    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7622    VIXL_ASSERT(allow_macro_instructions_);
7623    VIXL_ASSERT(OutsideITBlock());
7624    MacroEmissionCheckScope guard(this);
7625    ITScope it_scope(this, &cond);
7626    vmla(cond, dt, rd, rn, rm);
7627  }
7628  void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7629    Vmla(al, dt, rd, rn, rm);
7630  }
7631
7632  void Vmla(
7633      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7636    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7637    VIXL_ASSERT(allow_macro_instructions_);
7638    VIXL_ASSERT(OutsideITBlock());
7639    MacroEmissionCheckScope guard(this);
7640    ITScope it_scope(this, &cond);
7641    vmla(cond, dt, rd, rn, rm);
7642  }
7643  void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7644    Vmla(al, dt, rd, rn, rm);
7645  }
7646
7647  void Vmlal(Condition cond,
7648             DataType dt,
7649             QRegister rd,
7650             DRegister rn,
7651             DRegisterLane rm) {
7652    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7655    VIXL_ASSERT(allow_macro_instructions_);
7656    VIXL_ASSERT(OutsideITBlock());
7657    MacroEmissionCheckScope guard(this);
7658    ITScope it_scope(this, &cond);
7659    vmlal(cond, dt, rd, rn, rm);
7660  }
7661  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7662    Vmlal(al, dt, rd, rn, rm);
7663  }
7664
7665  void Vmlal(
7666      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7670    VIXL_ASSERT(allow_macro_instructions_);
7671    VIXL_ASSERT(OutsideITBlock());
7672    MacroEmissionCheckScope guard(this);
7673    ITScope it_scope(this, &cond);
7674    vmlal(cond, dt, rd, rn, rm);
7675  }
7676  void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7677    Vmlal(al, dt, rd, rn, rm);
7678  }
7679
7680  void Vmls(Condition cond,
7681            DataType dt,
7682            DRegister rd,
7683            DRegister rn,
7684            DRegisterLane rm) {
7685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7686    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7687    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7688    VIXL_ASSERT(allow_macro_instructions_);
7689    VIXL_ASSERT(OutsideITBlock());
7690    MacroEmissionCheckScope guard(this);
7691    ITScope it_scope(this, &cond);
7692    vmls(cond, dt, rd, rn, rm);
7693  }
7694  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7695    Vmls(al, dt, rd, rn, rm);
7696  }
7697
7698  void Vmls(Condition cond,
7699            DataType dt,
7700            QRegister rd,
7701            QRegister rn,
7702            DRegisterLane rm) {
7703    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7704    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7705    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7706    VIXL_ASSERT(allow_macro_instructions_);
7707    VIXL_ASSERT(OutsideITBlock());
7708    MacroEmissionCheckScope guard(this);
7709    ITScope it_scope(this, &cond);
7710    vmls(cond, dt, rd, rn, rm);
7711  }
7712  void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7713    Vmls(al, dt, rd, rn, rm);
7714  }
7715
7716  void Vmls(
7717      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7718    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7720    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7721    VIXL_ASSERT(allow_macro_instructions_);
7722    VIXL_ASSERT(OutsideITBlock());
7723    MacroEmissionCheckScope guard(this);
7724    ITScope it_scope(this, &cond);
7725    vmls(cond, dt, rd, rn, rm);
7726  }
7727  void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7728    Vmls(al, dt, rd, rn, rm);
7729  }
7730
7731  void Vmls(
7732      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7733    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7734    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7736    VIXL_ASSERT(allow_macro_instructions_);
7737    VIXL_ASSERT(OutsideITBlock());
7738    MacroEmissionCheckScope guard(this);
7739    ITScope it_scope(this, &cond);
7740    vmls(cond, dt, rd, rn, rm);
7741  }
7742  void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7743    Vmls(al, dt, rd, rn, rm);
7744  }
7745
7746  void Vmls(
7747      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7748    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7749    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7750    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7751    VIXL_ASSERT(allow_macro_instructions_);
7752    VIXL_ASSERT(OutsideITBlock());
7753    MacroEmissionCheckScope guard(this);
7754    ITScope it_scope(this, &cond);
7755    vmls(cond, dt, rd, rn, rm);
7756  }
7757  void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7758    Vmls(al, dt, rd, rn, rm);
7759  }
7760
7761  void Vmlsl(Condition cond,
7762             DataType dt,
7763             QRegister rd,
7764             DRegister rn,
7765             DRegisterLane rm) {
7766    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7767    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7768    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7769    VIXL_ASSERT(allow_macro_instructions_);
7770    VIXL_ASSERT(OutsideITBlock());
7771    MacroEmissionCheckScope guard(this);
7772    ITScope it_scope(this, &cond);
7773    vmlsl(cond, dt, rd, rn, rm);
7774  }
7775  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7776    Vmlsl(al, dt, rd, rn, rm);
7777  }
7778
7779  void Vmlsl(
7780      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7781    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7782    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7783    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7784    VIXL_ASSERT(allow_macro_instructions_);
7785    VIXL_ASSERT(OutsideITBlock());
7786    MacroEmissionCheckScope guard(this);
7787    ITScope it_scope(this, &cond);
7788    vmlsl(cond, dt, rd, rn, rm);
7789  }
7790  void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7791    Vmlsl(al, dt, rd, rn, rm);
7792  }
7793
7794  void Vmov(Condition cond, Register rt, SRegister rn) {
7795    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7796    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7797    VIXL_ASSERT(allow_macro_instructions_);
7798    VIXL_ASSERT(OutsideITBlock());
7799    MacroEmissionCheckScope guard(this);
7800    ITScope it_scope(this, &cond);
7801    vmov(cond, rt, rn);
7802  }
7803  void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); }
7804
7805  void Vmov(Condition cond, SRegister rn, Register rt) {
7806    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7807    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7808    VIXL_ASSERT(allow_macro_instructions_);
7809    VIXL_ASSERT(OutsideITBlock());
7810    MacroEmissionCheckScope guard(this);
7811    ITScope it_scope(this, &cond);
7812    vmov(cond, rn, rt);
7813  }
7814  void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); }
7815
7816  void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) {
7817    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7818    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7819    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7820    VIXL_ASSERT(allow_macro_instructions_);
7821    VIXL_ASSERT(OutsideITBlock());
7822    MacroEmissionCheckScope guard(this);
7823    ITScope it_scope(this, &cond);
7824    vmov(cond, rt, rt2, rm);
7825  }
7826  void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); }
7827
7828  void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) {
7829    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7830    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7831    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7832    VIXL_ASSERT(allow_macro_instructions_);
7833    VIXL_ASSERT(OutsideITBlock());
7834    MacroEmissionCheckScope guard(this);
7835    ITScope it_scope(this, &cond);
7836    vmov(cond, rm, rt, rt2);
7837  }
7838  void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); }
7839
7840  void Vmov(
7841      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) {
7842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7843    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7844    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7845    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7846    VIXL_ASSERT(allow_macro_instructions_);
7847    VIXL_ASSERT(OutsideITBlock());
7848    MacroEmissionCheckScope guard(this);
7849    ITScope it_scope(this, &cond);
7850    vmov(cond, rt, rt2, rm, rm1);
7851  }
7852  void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) {
7853    Vmov(al, rt, rt2, rm, rm1);
7854  }
7855
7856  void Vmov(
7857      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) {
7858    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7861    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7862    VIXL_ASSERT(allow_macro_instructions_);
7863    VIXL_ASSERT(OutsideITBlock());
7864    MacroEmissionCheckScope guard(this);
7865    ITScope it_scope(this, &cond);
7866    vmov(cond, rm, rm1, rt, rt2);
7867  }
7868  void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) {
7869    Vmov(al, rm, rm1, rt, rt2);
7870  }
7871
7872  void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) {
7873    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7874    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7875    VIXL_ASSERT(allow_macro_instructions_);
7876    VIXL_ASSERT(OutsideITBlock());
7877    MacroEmissionCheckScope guard(this);
7878    ITScope it_scope(this, &cond);
7879    vmov(cond, dt, rd, rt);
7880  }
7881  void Vmov(DataType dt, DRegisterLane rd, Register rt) {
7882    Vmov(al, dt, rd, rt);
7883  }
7884  void Vmov(Condition cond, DRegisterLane rd, Register rt) {
7885    Vmov(cond, kDataTypeValueNone, rd, rt);
7886  }
7887  void Vmov(DRegisterLane rd, Register rt) {
7888    Vmov(al, kDataTypeValueNone, rd, rt);
7889  }
7890
7891  void Vmov(Condition cond,
7892            DataType dt,
7893            DRegister rd,
7894            const DOperand& operand) {
7895    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7896    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7897    VIXL_ASSERT(allow_macro_instructions_);
7898    VIXL_ASSERT(OutsideITBlock());
7899    MacroEmissionCheckScope guard(this);
7900    ITScope it_scope(this, &cond);
7901    vmov(cond, dt, rd, operand);
7902  }
7903  void Vmov(DataType dt, DRegister rd, const DOperand& operand) {
7904    Vmov(al, dt, rd, operand);
7905  }
7906
7907  void Vmov(Condition cond,
7908            DataType dt,
7909            QRegister rd,
7910            const QOperand& operand) {
7911    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7912    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7913    VIXL_ASSERT(allow_macro_instructions_);
7914    VIXL_ASSERT(OutsideITBlock());
7915    MacroEmissionCheckScope guard(this);
7916    ITScope it_scope(this, &cond);
7917    vmov(cond, dt, rd, operand);
7918  }
7919  void Vmov(DataType dt, QRegister rd, const QOperand& operand) {
7920    Vmov(al, dt, rd, operand);
7921  }
7922
7923  void Vmov(Condition cond,
7924            DataType dt,
7925            SRegister rd,
7926            const SOperand& operand) {
7927    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7928    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7929    VIXL_ASSERT(allow_macro_instructions_);
7930    VIXL_ASSERT(OutsideITBlock());
7931    MacroEmissionCheckScope guard(this);
7932    ITScope it_scope(this, &cond);
7933    vmov(cond, dt, rd, operand);
7934  }
7935  void Vmov(DataType dt, SRegister rd, const SOperand& operand) {
7936    Vmov(al, dt, rd, operand);
7937  }
7938
7939  void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) {
7940    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7941    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7942    VIXL_ASSERT(allow_macro_instructions_);
7943    VIXL_ASSERT(OutsideITBlock());
7944    MacroEmissionCheckScope guard(this);
7945    ITScope it_scope(this, &cond);
7946    vmov(cond, dt, rt, rn);
7947  }
7948  void Vmov(DataType dt, Register rt, DRegisterLane rn) {
7949    Vmov(al, dt, rt, rn);
7950  }
7951  void Vmov(Condition cond, Register rt, DRegisterLane rn) {
7952    Vmov(cond, kDataTypeValueNone, rt, rn);
7953  }
7954  void Vmov(Register rt, DRegisterLane rn) {
7955    Vmov(al, kDataTypeValueNone, rt, rn);
7956  }
7957
7958  void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) {
7959    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7960    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7961    VIXL_ASSERT(allow_macro_instructions_);
7962    VIXL_ASSERT(OutsideITBlock());
7963    MacroEmissionCheckScope guard(this);
7964    ITScope it_scope(this, &cond);
7965    vmovl(cond, dt, rd, rm);
7966  }
7967  void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); }
7968
7969  void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
7970    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7971    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7972    VIXL_ASSERT(allow_macro_instructions_);
7973    VIXL_ASSERT(OutsideITBlock());
7974    MacroEmissionCheckScope guard(this);
7975    ITScope it_scope(this, &cond);
7976    vmovn(cond, dt, rd, rm);
7977  }
7978  void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); }
7979
7980  void Vmrs(Condition cond,
7981            RegisterOrAPSR_nzcv rt,
7982            SpecialFPRegister spec_reg) {
7983    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7984    VIXL_ASSERT(allow_macro_instructions_);
7985    VIXL_ASSERT(OutsideITBlock());
7986    MacroEmissionCheckScope guard(this);
7987    ITScope it_scope(this, &cond);
7988    vmrs(cond, rt, spec_reg);
7989  }
7990  void Vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) {
7991    Vmrs(al, rt, spec_reg);
7992  }
7993
7994  void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) {
7995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7996    VIXL_ASSERT(allow_macro_instructions_);
7997    VIXL_ASSERT(OutsideITBlock());
7998    MacroEmissionCheckScope guard(this);
7999    ITScope it_scope(this, &cond);
8000    vmsr(cond, spec_reg, rt);
8001  }
8002  void Vmsr(SpecialFPRegister spec_reg, Register rt) { Vmsr(al, spec_reg, rt); }
8003
8004  void Vmul(Condition cond,
8005            DataType dt,
8006            DRegister rd,
8007            DRegister rn,
8008            DRegister dm,
8009            unsigned index) {
8010    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8011    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8012    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8013    VIXL_ASSERT(allow_macro_instructions_);
8014    VIXL_ASSERT(OutsideITBlock());
8015    MacroEmissionCheckScope guard(this);
8016    ITScope it_scope(this, &cond);
8017    vmul(cond, dt, rd, rn, dm, index);
8018  }
8019  void Vmul(
8020      DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) {
8021    Vmul(al, dt, rd, rn, dm, index);
8022  }
8023
8024  void Vmul(Condition cond,
8025            DataType dt,
8026            QRegister rd,
8027            QRegister rn,
8028            DRegister dm,
8029            unsigned index) {
8030    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8031    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8032    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8033    VIXL_ASSERT(allow_macro_instructions_);
8034    VIXL_ASSERT(OutsideITBlock());
8035    MacroEmissionCheckScope guard(this);
8036    ITScope it_scope(this, &cond);
8037    vmul(cond, dt, rd, rn, dm, index);
8038  }
8039  void Vmul(
8040      DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) {
8041    Vmul(al, dt, rd, rn, dm, index);
8042  }
8043
8044  void Vmul(
8045      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8046    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8047    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8048    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8049    VIXL_ASSERT(allow_macro_instructions_);
8050    VIXL_ASSERT(OutsideITBlock());
8051    MacroEmissionCheckScope guard(this);
8052    ITScope it_scope(this, &cond);
8053    vmul(cond, dt, rd, rn, rm);
8054  }
8055  void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8056    Vmul(al, dt, rd, rn, rm);
8057  }
8058
8059  void Vmul(
8060      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8061    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8062    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8063    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8064    VIXL_ASSERT(allow_macro_instructions_);
8065    VIXL_ASSERT(OutsideITBlock());
8066    MacroEmissionCheckScope guard(this);
8067    ITScope it_scope(this, &cond);
8068    vmul(cond, dt, rd, rn, rm);
8069  }
8070  void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8071    Vmul(al, dt, rd, rn, rm);
8072  }
8073
8074  void Vmul(
8075      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8076    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8077    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8078    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8079    VIXL_ASSERT(allow_macro_instructions_);
8080    VIXL_ASSERT(OutsideITBlock());
8081    MacroEmissionCheckScope guard(this);
8082    ITScope it_scope(this, &cond);
8083    vmul(cond, dt, rd, rn, rm);
8084  }
8085  void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8086    Vmul(al, dt, rd, rn, rm);
8087  }
8088
8089  void Vmull(Condition cond,
8090             DataType dt,
8091             QRegister rd,
8092             DRegister rn,
8093             DRegister dm,
8094             unsigned index) {
8095    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8096    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8097    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8098    VIXL_ASSERT(allow_macro_instructions_);
8099    VIXL_ASSERT(OutsideITBlock());
8100    MacroEmissionCheckScope guard(this);
8101    ITScope it_scope(this, &cond);
8102    vmull(cond, dt, rd, rn, dm, index);
8103  }
8104  void Vmull(
8105      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8106    Vmull(al, dt, rd, rn, dm, index);
8107  }
8108
8109  void Vmull(
8110      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8111    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8112    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8113    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8114    VIXL_ASSERT(allow_macro_instructions_);
8115    VIXL_ASSERT(OutsideITBlock());
8116    MacroEmissionCheckScope guard(this);
8117    ITScope it_scope(this, &cond);
8118    vmull(cond, dt, rd, rn, rm);
8119  }
8120  void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8121    Vmull(al, dt, rd, rn, rm);
8122  }
8123
8124  void Vmvn(Condition cond,
8125            DataType dt,
8126            DRegister rd,
8127            const DOperand& operand) {
8128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8129    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8130    VIXL_ASSERT(allow_macro_instructions_);
8131    VIXL_ASSERT(OutsideITBlock());
8132    MacroEmissionCheckScope guard(this);
8133    ITScope it_scope(this, &cond);
8134    vmvn(cond, dt, rd, operand);
8135  }
8136  void Vmvn(DataType dt, DRegister rd, const DOperand& operand) {
8137    Vmvn(al, dt, rd, operand);
8138  }
8139
8140  void Vmvn(Condition cond,
8141            DataType dt,
8142            QRegister rd,
8143            const QOperand& operand) {
8144    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8145    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8146    VIXL_ASSERT(allow_macro_instructions_);
8147    VIXL_ASSERT(OutsideITBlock());
8148    MacroEmissionCheckScope guard(this);
8149    ITScope it_scope(this, &cond);
8150    vmvn(cond, dt, rd, operand);
8151  }
8152  void Vmvn(DataType dt, QRegister rd, const QOperand& operand) {
8153    Vmvn(al, dt, rd, operand);
8154  }
8155
8156  void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8157    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8158    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8159    VIXL_ASSERT(allow_macro_instructions_);
8160    VIXL_ASSERT(OutsideITBlock());
8161    MacroEmissionCheckScope guard(this);
8162    ITScope it_scope(this, &cond);
8163    vneg(cond, dt, rd, rm);
8164  }
8165  void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); }
8166
8167  void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8168    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8169    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8170    VIXL_ASSERT(allow_macro_instructions_);
8171    VIXL_ASSERT(OutsideITBlock());
8172    MacroEmissionCheckScope guard(this);
8173    ITScope it_scope(this, &cond);
8174    vneg(cond, dt, rd, rm);
8175  }
8176  void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); }
8177
8178  void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) {
8179    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8180    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8181    VIXL_ASSERT(allow_macro_instructions_);
8182    VIXL_ASSERT(OutsideITBlock());
8183    MacroEmissionCheckScope guard(this);
8184    ITScope it_scope(this, &cond);
8185    vneg(cond, dt, rd, rm);
8186  }
8187  void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); }
8188
8189  void Vnmla(
8190      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8191    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8192    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8193    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8194    VIXL_ASSERT(allow_macro_instructions_);
8195    VIXL_ASSERT(OutsideITBlock());
8196    MacroEmissionCheckScope guard(this);
8197    ITScope it_scope(this, &cond);
8198    vnmla(cond, dt, rd, rn, rm);
8199  }
8200  void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8201    Vnmla(al, dt, rd, rn, rm);
8202  }
8203
8204  void Vnmla(
8205      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8206    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8209    VIXL_ASSERT(allow_macro_instructions_);
8210    VIXL_ASSERT(OutsideITBlock());
8211    MacroEmissionCheckScope guard(this);
8212    ITScope it_scope(this, &cond);
8213    vnmla(cond, dt, rd, rn, rm);
8214  }
8215  void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8216    Vnmla(al, dt, rd, rn, rm);
8217  }
8218
8219  void Vnmls(
8220      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8222    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8223    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8224    VIXL_ASSERT(allow_macro_instructions_);
8225    VIXL_ASSERT(OutsideITBlock());
8226    MacroEmissionCheckScope guard(this);
8227    ITScope it_scope(this, &cond);
8228    vnmls(cond, dt, rd, rn, rm);
8229  }
8230  void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8231    Vnmls(al, dt, rd, rn, rm);
8232  }
8233
8234  void Vnmls(
8235      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8236    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8237    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8238    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8239    VIXL_ASSERT(allow_macro_instructions_);
8240    VIXL_ASSERT(OutsideITBlock());
8241    MacroEmissionCheckScope guard(this);
8242    ITScope it_scope(this, &cond);
8243    vnmls(cond, dt, rd, rn, rm);
8244  }
8245  void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8246    Vnmls(al, dt, rd, rn, rm);
8247  }
8248
8249  void Vnmul(
8250      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8251    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8252    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8253    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8254    VIXL_ASSERT(allow_macro_instructions_);
8255    VIXL_ASSERT(OutsideITBlock());
8256    MacroEmissionCheckScope guard(this);
8257    ITScope it_scope(this, &cond);
8258    vnmul(cond, dt, rd, rn, rm);
8259  }
8260  void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8261    Vnmul(al, dt, rd, rn, rm);
8262  }
8263
8264  void Vnmul(
8265      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8266    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8267    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8268    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8269    VIXL_ASSERT(allow_macro_instructions_);
8270    VIXL_ASSERT(OutsideITBlock());
8271    MacroEmissionCheckScope guard(this);
8272    ITScope it_scope(this, &cond);
8273    vnmul(cond, dt, rd, rn, rm);
8274  }
8275  void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8276    Vnmul(al, dt, rd, rn, rm);
8277  }
8278
8279  void Vorn(Condition cond,
8280            DataType dt,
8281            DRegister rd,
8282            DRegister rn,
8283            const DOperand& operand) {
8284    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8285    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8286    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8287    VIXL_ASSERT(allow_macro_instructions_);
8288    VIXL_ASSERT(OutsideITBlock());
8289    MacroEmissionCheckScope guard(this);
8290    ITScope it_scope(this, &cond);
8291    vorn(cond, dt, rd, rn, operand);
8292  }
8293  void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8294    Vorn(al, dt, rd, rn, operand);
8295  }
8296
8297  void Vorn(Condition cond,
8298            DataType dt,
8299            QRegister rd,
8300            QRegister rn,
8301            const QOperand& operand) {
8302    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8303    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8304    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8305    VIXL_ASSERT(allow_macro_instructions_);
8306    VIXL_ASSERT(OutsideITBlock());
8307    MacroEmissionCheckScope guard(this);
8308    ITScope it_scope(this, &cond);
8309    vorn(cond, dt, rd, rn, operand);
8310  }
8311  void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8312    Vorn(al, dt, rd, rn, operand);
8313  }
8314
8315  void Vorr(Condition cond,
8316            DataType dt,
8317            DRegister rd,
8318            DRegister rn,
8319            const DOperand& operand) {
8320    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8321    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8322    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8323    VIXL_ASSERT(allow_macro_instructions_);
8324    VIXL_ASSERT(OutsideITBlock());
8325    MacroEmissionCheckScope guard(this);
8326    ITScope it_scope(this, &cond);
8327    vorr(cond, dt, rd, rn, operand);
8328  }
8329  void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8330    Vorr(al, dt, rd, rn, operand);
8331  }
8332  void Vorr(Condition cond,
8333            DRegister rd,
8334            DRegister rn,
8335            const DOperand& operand) {
8336    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8337  }
8338  void Vorr(DRegister rd, DRegister rn, const DOperand& operand) {
8339    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8340  }
8341
8342  void Vorr(Condition cond,
8343            DataType dt,
8344            QRegister rd,
8345            QRegister rn,
8346            const QOperand& operand) {
8347    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8348    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8349    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8350    VIXL_ASSERT(allow_macro_instructions_);
8351    VIXL_ASSERT(OutsideITBlock());
8352    MacroEmissionCheckScope guard(this);
8353    ITScope it_scope(this, &cond);
8354    vorr(cond, dt, rd, rn, operand);
8355  }
8356  void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8357    Vorr(al, dt, rd, rn, operand);
8358  }
8359  void Vorr(Condition cond,
8360            QRegister rd,
8361            QRegister rn,
8362            const QOperand& operand) {
8363    Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8364  }
8365  void Vorr(QRegister rd, QRegister rn, const QOperand& operand) {
8366    Vorr(al, kDataTypeValueNone, rd, rn, operand);
8367  }
8368
8369  void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8372    VIXL_ASSERT(allow_macro_instructions_);
8373    VIXL_ASSERT(OutsideITBlock());
8374    MacroEmissionCheckScope guard(this);
8375    ITScope it_scope(this, &cond);
8376    vpadal(cond, dt, rd, rm);
8377  }
8378  void Vpadal(DataType dt, DRegister rd, DRegister rm) {
8379    Vpadal(al, dt, rd, rm);
8380  }
8381
8382  void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8384    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8385    VIXL_ASSERT(allow_macro_instructions_);
8386    VIXL_ASSERT(OutsideITBlock());
8387    MacroEmissionCheckScope guard(this);
8388    ITScope it_scope(this, &cond);
8389    vpadal(cond, dt, rd, rm);
8390  }
8391  void Vpadal(DataType dt, QRegister rd, QRegister rm) {
8392    Vpadal(al, dt, rd, rm);
8393  }
8394
8395  void Vpadd(
8396      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8397    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8398    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8399    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8400    VIXL_ASSERT(allow_macro_instructions_);
8401    VIXL_ASSERT(OutsideITBlock());
8402    MacroEmissionCheckScope guard(this);
8403    ITScope it_scope(this, &cond);
8404    vpadd(cond, dt, rd, rn, rm);
8405  }
8406  void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8407    Vpadd(al, dt, rd, rn, rm);
8408  }
8409
8410  void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8411    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8412    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8413    VIXL_ASSERT(allow_macro_instructions_);
8414    VIXL_ASSERT(OutsideITBlock());
8415    MacroEmissionCheckScope guard(this);
8416    ITScope it_scope(this, &cond);
8417    vpaddl(cond, dt, rd, rm);
8418  }
8419  void Vpaddl(DataType dt, DRegister rd, DRegister rm) {
8420    Vpaddl(al, dt, rd, rm);
8421  }
8422
8423  void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8425    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8426    VIXL_ASSERT(allow_macro_instructions_);
8427    VIXL_ASSERT(OutsideITBlock());
8428    MacroEmissionCheckScope guard(this);
8429    ITScope it_scope(this, &cond);
8430    vpaddl(cond, dt, rd, rm);
8431  }
8432  void Vpaddl(DataType dt, QRegister rd, QRegister rm) {
8433    Vpaddl(al, dt, rd, rm);
8434  }
8435
8436  void Vpmax(
8437      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8438    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8439    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8440    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8441    VIXL_ASSERT(allow_macro_instructions_);
8442    VIXL_ASSERT(OutsideITBlock());
8443    MacroEmissionCheckScope guard(this);
8444    ITScope it_scope(this, &cond);
8445    vpmax(cond, dt, rd, rn, rm);
8446  }
8447  void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8448    Vpmax(al, dt, rd, rn, rm);
8449  }
8450
8451  void Vpmin(
8452      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8453    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8454    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8455    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8456    VIXL_ASSERT(allow_macro_instructions_);
8457    VIXL_ASSERT(OutsideITBlock());
8458    MacroEmissionCheckScope guard(this);
8459    ITScope it_scope(this, &cond);
8460    vpmin(cond, dt, rd, rn, rm);
8461  }
8462  void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8463    Vpmin(al, dt, rd, rn, rm);
8464  }
8465
8466  void Vpop(Condition cond, DataType dt, DRegisterList dreglist) {
8467    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8468    VIXL_ASSERT(allow_macro_instructions_);
8469    VIXL_ASSERT(OutsideITBlock());
8470    MacroEmissionCheckScope guard(this);
8471    ITScope it_scope(this, &cond);
8472    vpop(cond, dt, dreglist);
8473  }
8474  void Vpop(DataType dt, DRegisterList dreglist) { Vpop(al, dt, dreglist); }
8475  void Vpop(Condition cond, DRegisterList dreglist) {
8476    Vpop(cond, kDataTypeValueNone, dreglist);
8477  }
8478  void Vpop(DRegisterList dreglist) { Vpop(al, kDataTypeValueNone, dreglist); }
8479
8480  void Vpop(Condition cond, DataType dt, SRegisterList sreglist) {
8481    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8482    VIXL_ASSERT(allow_macro_instructions_);
8483    VIXL_ASSERT(OutsideITBlock());
8484    MacroEmissionCheckScope guard(this);
8485    ITScope it_scope(this, &cond);
8486    vpop(cond, dt, sreglist);
8487  }
8488  void Vpop(DataType dt, SRegisterList sreglist) { Vpop(al, dt, sreglist); }
8489  void Vpop(Condition cond, SRegisterList sreglist) {
8490    Vpop(cond, kDataTypeValueNone, sreglist);
8491  }
8492  void Vpop(SRegisterList sreglist) { Vpop(al, kDataTypeValueNone, sreglist); }
8493
8494  void Vpush(Condition cond, DataType dt, DRegisterList dreglist) {
8495    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8496    VIXL_ASSERT(allow_macro_instructions_);
8497    VIXL_ASSERT(OutsideITBlock());
8498    MacroEmissionCheckScope guard(this);
8499    ITScope it_scope(this, &cond);
8500    vpush(cond, dt, dreglist);
8501  }
8502  void Vpush(DataType dt, DRegisterList dreglist) { Vpush(al, dt, dreglist); }
8503  void Vpush(Condition cond, DRegisterList dreglist) {
8504    Vpush(cond, kDataTypeValueNone, dreglist);
8505  }
8506  void Vpush(DRegisterList dreglist) {
8507    Vpush(al, kDataTypeValueNone, dreglist);
8508  }
8509
8510  void Vpush(Condition cond, DataType dt, SRegisterList sreglist) {
8511    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8512    VIXL_ASSERT(allow_macro_instructions_);
8513    VIXL_ASSERT(OutsideITBlock());
8514    MacroEmissionCheckScope guard(this);
8515    ITScope it_scope(this, &cond);
8516    vpush(cond, dt, sreglist);
8517  }
8518  void Vpush(DataType dt, SRegisterList sreglist) { Vpush(al, dt, sreglist); }
8519  void Vpush(Condition cond, SRegisterList sreglist) {
8520    Vpush(cond, kDataTypeValueNone, sreglist);
8521  }
8522  void Vpush(SRegisterList sreglist) {
8523    Vpush(al, kDataTypeValueNone, sreglist);
8524  }
8525
8526  void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8527    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8528    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8529    VIXL_ASSERT(allow_macro_instructions_);
8530    VIXL_ASSERT(OutsideITBlock());
8531    MacroEmissionCheckScope guard(this);
8532    ITScope it_scope(this, &cond);
8533    vqabs(cond, dt, rd, rm);
8534  }
8535  void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); }
8536
8537  void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8538    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8539    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8540    VIXL_ASSERT(allow_macro_instructions_);
8541    VIXL_ASSERT(OutsideITBlock());
8542    MacroEmissionCheckScope guard(this);
8543    ITScope it_scope(this, &cond);
8544    vqabs(cond, dt, rd, rm);
8545  }
8546  void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); }
8547
8548  void Vqadd(
8549      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8550    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8551    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8552    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8553    VIXL_ASSERT(allow_macro_instructions_);
8554    VIXL_ASSERT(OutsideITBlock());
8555    MacroEmissionCheckScope guard(this);
8556    ITScope it_scope(this, &cond);
8557    vqadd(cond, dt, rd, rn, rm);
8558  }
8559  void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8560    Vqadd(al, dt, rd, rn, rm);
8561  }
8562
8563  void Vqadd(
8564      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8565    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8566    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8567    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8568    VIXL_ASSERT(allow_macro_instructions_);
8569    VIXL_ASSERT(OutsideITBlock());
8570    MacroEmissionCheckScope guard(this);
8571    ITScope it_scope(this, &cond);
8572    vqadd(cond, dt, rd, rn, rm);
8573  }
8574  void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8575    Vqadd(al, dt, rd, rn, rm);
8576  }
8577
8578  void Vqdmlal(
8579      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8580    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8581    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8582    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8583    VIXL_ASSERT(allow_macro_instructions_);
8584    VIXL_ASSERT(OutsideITBlock());
8585    MacroEmissionCheckScope guard(this);
8586    ITScope it_scope(this, &cond);
8587    vqdmlal(cond, dt, rd, rn, rm);
8588  }
8589  void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8590    Vqdmlal(al, dt, rd, rn, rm);
8591  }
8592
8593  void Vqdmlal(Condition cond,
8594               DataType dt,
8595               QRegister rd,
8596               DRegister rn,
8597               DRegister dm,
8598               unsigned index) {
8599    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8600    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8601    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8602    VIXL_ASSERT(allow_macro_instructions_);
8603    VIXL_ASSERT(OutsideITBlock());
8604    MacroEmissionCheckScope guard(this);
8605    ITScope it_scope(this, &cond);
8606    vqdmlal(cond, dt, rd, rn, dm, index);
8607  }
8608  void Vqdmlal(
8609      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8610    Vqdmlal(al, dt, rd, rn, dm, index);
8611  }
8612
8613  void Vqdmlsl(
8614      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8615    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8616    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8617    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8618    VIXL_ASSERT(allow_macro_instructions_);
8619    VIXL_ASSERT(OutsideITBlock());
8620    MacroEmissionCheckScope guard(this);
8621    ITScope it_scope(this, &cond);
8622    vqdmlsl(cond, dt, rd, rn, rm);
8623  }
8624  void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8625    Vqdmlsl(al, dt, rd, rn, rm);
8626  }
8627
8628  void Vqdmlsl(Condition cond,
8629               DataType dt,
8630               QRegister rd,
8631               DRegister rn,
8632               DRegister dm,
8633               unsigned index) {
8634    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8635    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8636    VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8637    VIXL_ASSERT(allow_macro_instructions_);
8638    VIXL_ASSERT(OutsideITBlock());
8639    MacroEmissionCheckScope guard(this);
8640    ITScope it_scope(this, &cond);
8641    vqdmlsl(cond, dt, rd, rn, dm, index);
8642  }
8643  void Vqdmlsl(
8644      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8645    Vqdmlsl(al, dt, rd, rn, dm, index);
8646  }
8647
8648  void Vqdmulh(
8649      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8650    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8651    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8652    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8653    VIXL_ASSERT(allow_macro_instructions_);
8654    VIXL_ASSERT(OutsideITBlock());
8655    MacroEmissionCheckScope guard(this);
8656    ITScope it_scope(this, &cond);
8657    vqdmulh(cond, dt, rd, rn, rm);
8658  }
8659  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8660    Vqdmulh(al, dt, rd, rn, rm);
8661  }
8662
8663  void Vqdmulh(
8664      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8665    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8666    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8668    VIXL_ASSERT(allow_macro_instructions_);
8669    VIXL_ASSERT(OutsideITBlock());
8670    MacroEmissionCheckScope guard(this);
8671    ITScope it_scope(this, &cond);
8672    vqdmulh(cond, dt, rd, rn, rm);
8673  }
8674  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8675    Vqdmulh(al, dt, rd, rn, rm);
8676  }
8677
8678  void Vqdmulh(Condition cond,
8679               DataType dt,
8680               DRegister rd,
8681               DRegister rn,
8682               DRegisterLane rm) {
8683    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8684    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8685    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8686    VIXL_ASSERT(allow_macro_instructions_);
8687    VIXL_ASSERT(OutsideITBlock());
8688    MacroEmissionCheckScope guard(this);
8689    ITScope it_scope(this, &cond);
8690    vqdmulh(cond, dt, rd, rn, rm);
8691  }
8692  void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8693    Vqdmulh(al, dt, rd, rn, rm);
8694  }
8695
8696  void Vqdmulh(Condition cond,
8697               DataType dt,
8698               QRegister rd,
8699               QRegister rn,
8700               DRegisterLane rm) {
8701    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8702    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8703    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8704    VIXL_ASSERT(allow_macro_instructions_);
8705    VIXL_ASSERT(OutsideITBlock());
8706    MacroEmissionCheckScope guard(this);
8707    ITScope it_scope(this, &cond);
8708    vqdmulh(cond, dt, rd, rn, rm);
8709  }
8710  void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8711    Vqdmulh(al, dt, rd, rn, rm);
8712  }
8713
8714  void Vqdmull(
8715      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8716    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8717    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8718    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8719    VIXL_ASSERT(allow_macro_instructions_);
8720    VIXL_ASSERT(OutsideITBlock());
8721    MacroEmissionCheckScope guard(this);
8722    ITScope it_scope(this, &cond);
8723    vqdmull(cond, dt, rd, rn, rm);
8724  }
8725  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8726    Vqdmull(al, dt, rd, rn, rm);
8727  }
8728
8729  void Vqdmull(Condition cond,
8730               DataType dt,
8731               QRegister rd,
8732               DRegister rn,
8733               DRegisterLane rm) {
8734    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8735    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8736    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8737    VIXL_ASSERT(allow_macro_instructions_);
8738    VIXL_ASSERT(OutsideITBlock());
8739    MacroEmissionCheckScope guard(this);
8740    ITScope it_scope(this, &cond);
8741    vqdmull(cond, dt, rd, rn, rm);
8742  }
8743  void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
8744    Vqdmull(al, dt, rd, rn, rm);
8745  }
8746
8747  void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8748    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8749    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8750    VIXL_ASSERT(allow_macro_instructions_);
8751    VIXL_ASSERT(OutsideITBlock());
8752    MacroEmissionCheckScope guard(this);
8753    ITScope it_scope(this, &cond);
8754    vqmovn(cond, dt, rd, rm);
8755  }
8756  void Vqmovn(DataType dt, DRegister rd, QRegister rm) {
8757    Vqmovn(al, dt, rd, rm);
8758  }
8759
8760  void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8761    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8762    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8763    VIXL_ASSERT(allow_macro_instructions_);
8764    VIXL_ASSERT(OutsideITBlock());
8765    MacroEmissionCheckScope guard(this);
8766    ITScope it_scope(this, &cond);
8767    vqmovun(cond, dt, rd, rm);
8768  }
8769  void Vqmovun(DataType dt, DRegister rd, QRegister rm) {
8770    Vqmovun(al, dt, rd, rm);
8771  }
8772
8773  void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8774    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8775    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8776    VIXL_ASSERT(allow_macro_instructions_);
8777    VIXL_ASSERT(OutsideITBlock());
8778    MacroEmissionCheckScope guard(this);
8779    ITScope it_scope(this, &cond);
8780    vqneg(cond, dt, rd, rm);
8781  }
8782  void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); }
8783
8784  void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8785    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8786    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8787    VIXL_ASSERT(allow_macro_instructions_);
8788    VIXL_ASSERT(OutsideITBlock());
8789    MacroEmissionCheckScope guard(this);
8790    ITScope it_scope(this, &cond);
8791    vqneg(cond, dt, rd, rm);
8792  }
8793  void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); }
8794
8795  void Vqrdmulh(
8796      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8797    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8798    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8799    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8800    VIXL_ASSERT(allow_macro_instructions_);
8801    VIXL_ASSERT(OutsideITBlock());
8802    MacroEmissionCheckScope guard(this);
8803    ITScope it_scope(this, &cond);
8804    vqrdmulh(cond, dt, rd, rn, rm);
8805  }
8806  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8807    Vqrdmulh(al, dt, rd, rn, rm);
8808  }
8809
8810  void Vqrdmulh(
8811      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8812    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8813    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8814    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8815    VIXL_ASSERT(allow_macro_instructions_);
8816    VIXL_ASSERT(OutsideITBlock());
8817    MacroEmissionCheckScope guard(this);
8818    ITScope it_scope(this, &cond);
8819    vqrdmulh(cond, dt, rd, rn, rm);
8820  }
8821  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8822    Vqrdmulh(al, dt, rd, rn, rm);
8823  }
8824
8825  void Vqrdmulh(Condition cond,
8826                DataType dt,
8827                DRegister rd,
8828                DRegister rn,
8829                DRegisterLane rm) {
8830    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8831    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8832    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8833    VIXL_ASSERT(allow_macro_instructions_);
8834    VIXL_ASSERT(OutsideITBlock());
8835    MacroEmissionCheckScope guard(this);
8836    ITScope it_scope(this, &cond);
8837    vqrdmulh(cond, dt, rd, rn, rm);
8838  }
8839  void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8840    Vqrdmulh(al, dt, rd, rn, rm);
8841  }
8842
8843  void Vqrdmulh(Condition cond,
8844                DataType dt,
8845                QRegister rd,
8846                QRegister rn,
8847                DRegisterLane rm) {
8848    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8849    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8850    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8851    VIXL_ASSERT(allow_macro_instructions_);
8852    VIXL_ASSERT(OutsideITBlock());
8853    MacroEmissionCheckScope guard(this);
8854    ITScope it_scope(this, &cond);
8855    vqrdmulh(cond, dt, rd, rn, rm);
8856  }
8857  void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8858    Vqrdmulh(al, dt, rd, rn, rm);
8859  }
8860
8861  void Vqrshl(
8862      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8863    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8864    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8865    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8866    VIXL_ASSERT(allow_macro_instructions_);
8867    VIXL_ASSERT(OutsideITBlock());
8868    MacroEmissionCheckScope guard(this);
8869    ITScope it_scope(this, &cond);
8870    vqrshl(cond, dt, rd, rm, rn);
8871  }
8872  void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8873    Vqrshl(al, dt, rd, rm, rn);
8874  }
8875
8876  void Vqrshl(
8877      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8878    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8879    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8880    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8881    VIXL_ASSERT(allow_macro_instructions_);
8882    VIXL_ASSERT(OutsideITBlock());
8883    MacroEmissionCheckScope guard(this);
8884    ITScope it_scope(this, &cond);
8885    vqrshl(cond, dt, rd, rm, rn);
8886  }
8887  void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8888    Vqrshl(al, dt, rd, rm, rn);
8889  }
8890
8891  void Vqrshrn(Condition cond,
8892               DataType dt,
8893               DRegister rd,
8894               QRegister rm,
8895               const QOperand& operand) {
8896    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8897    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8898    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8899    VIXL_ASSERT(allow_macro_instructions_);
8900    VIXL_ASSERT(OutsideITBlock());
8901    MacroEmissionCheckScope guard(this);
8902    ITScope it_scope(this, &cond);
8903    vqrshrn(cond, dt, rd, rm, operand);
8904  }
8905  void Vqrshrn(DataType dt,
8906               DRegister rd,
8907               QRegister rm,
8908               const QOperand& operand) {
8909    Vqrshrn(al, dt, rd, rm, operand);
8910  }
8911
8912  void Vqrshrun(Condition cond,
8913                DataType dt,
8914                DRegister rd,
8915                QRegister rm,
8916                const QOperand& operand) {
8917    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8918    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8919    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8920    VIXL_ASSERT(allow_macro_instructions_);
8921    VIXL_ASSERT(OutsideITBlock());
8922    MacroEmissionCheckScope guard(this);
8923    ITScope it_scope(this, &cond);
8924    vqrshrun(cond, dt, rd, rm, operand);
8925  }
8926  void Vqrshrun(DataType dt,
8927                DRegister rd,
8928                QRegister rm,
8929                const QOperand& operand) {
8930    Vqrshrun(al, dt, rd, rm, operand);
8931  }
8932
8933  void Vqshl(Condition cond,
8934             DataType dt,
8935             DRegister rd,
8936             DRegister rm,
8937             const DOperand& operand) {
8938    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8939    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8940    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8941    VIXL_ASSERT(allow_macro_instructions_);
8942    VIXL_ASSERT(OutsideITBlock());
8943    MacroEmissionCheckScope guard(this);
8944    ITScope it_scope(this, &cond);
8945    vqshl(cond, dt, rd, rm, operand);
8946  }
8947  void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
8948    Vqshl(al, dt, rd, rm, operand);
8949  }
8950
8951  void Vqshl(Condition cond,
8952             DataType dt,
8953             QRegister rd,
8954             QRegister rm,
8955             const QOperand& operand) {
8956    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8957    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8958    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8959    VIXL_ASSERT(allow_macro_instructions_);
8960    VIXL_ASSERT(OutsideITBlock());
8961    MacroEmissionCheckScope guard(this);
8962    ITScope it_scope(this, &cond);
8963    vqshl(cond, dt, rd, rm, operand);
8964  }
8965  void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
8966    Vqshl(al, dt, rd, rm, operand);
8967  }
8968
8969  void Vqshlu(Condition cond,
8970              DataType dt,
8971              DRegister rd,
8972              DRegister rm,
8973              const DOperand& operand) {
8974    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8975    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8976    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8977    VIXL_ASSERT(allow_macro_instructions_);
8978    VIXL_ASSERT(OutsideITBlock());
8979    MacroEmissionCheckScope guard(this);
8980    ITScope it_scope(this, &cond);
8981    vqshlu(cond, dt, rd, rm, operand);
8982  }
8983  void Vqshlu(DataType dt,
8984              DRegister rd,
8985              DRegister rm,
8986              const DOperand& operand) {
8987    Vqshlu(al, dt, rd, rm, operand);
8988  }
8989
8990  void Vqshlu(Condition cond,
8991              DataType dt,
8992              QRegister rd,
8993              QRegister rm,
8994              const QOperand& operand) {
8995    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8996    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8997    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8998    VIXL_ASSERT(allow_macro_instructions_);
8999    VIXL_ASSERT(OutsideITBlock());
9000    MacroEmissionCheckScope guard(this);
9001    ITScope it_scope(this, &cond);
9002    vqshlu(cond, dt, rd, rm, operand);
9003  }
9004  void Vqshlu(DataType dt,
9005              QRegister rd,
9006              QRegister rm,
9007              const QOperand& operand) {
9008    Vqshlu(al, dt, rd, rm, operand);
9009  }
9010
9011  void Vqshrn(Condition cond,
9012              DataType dt,
9013              DRegister rd,
9014              QRegister rm,
9015              const QOperand& operand) {
9016    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9017    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9018    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9019    VIXL_ASSERT(allow_macro_instructions_);
9020    VIXL_ASSERT(OutsideITBlock());
9021    MacroEmissionCheckScope guard(this);
9022    ITScope it_scope(this, &cond);
9023    vqshrn(cond, dt, rd, rm, operand);
9024  }
9025  void Vqshrn(DataType dt,
9026              DRegister rd,
9027              QRegister rm,
9028              const QOperand& operand) {
9029    Vqshrn(al, dt, rd, rm, operand);
9030  }
9031
9032  void Vqshrun(Condition cond,
9033               DataType dt,
9034               DRegister rd,
9035               QRegister rm,
9036               const QOperand& operand) {
9037    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9038    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9039    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9040    VIXL_ASSERT(allow_macro_instructions_);
9041    VIXL_ASSERT(OutsideITBlock());
9042    MacroEmissionCheckScope guard(this);
9043    ITScope it_scope(this, &cond);
9044    vqshrun(cond, dt, rd, rm, operand);
9045  }
9046  void Vqshrun(DataType dt,
9047               DRegister rd,
9048               QRegister rm,
9049               const QOperand& operand) {
9050    Vqshrun(al, dt, rd, rm, operand);
9051  }
9052
9053  void Vqsub(
9054      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9055    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9056    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9057    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9058    VIXL_ASSERT(allow_macro_instructions_);
9059    VIXL_ASSERT(OutsideITBlock());
9060    MacroEmissionCheckScope guard(this);
9061    ITScope it_scope(this, &cond);
9062    vqsub(cond, dt, rd, rn, rm);
9063  }
9064  void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9065    Vqsub(al, dt, rd, rn, rm);
9066  }
9067
9068  void Vqsub(
9069      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9070    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9071    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9072    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9073    VIXL_ASSERT(allow_macro_instructions_);
9074    VIXL_ASSERT(OutsideITBlock());
9075    MacroEmissionCheckScope guard(this);
9076    ITScope it_scope(this, &cond);
9077    vqsub(cond, dt, rd, rn, rm);
9078  }
9079  void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9080    Vqsub(al, dt, rd, rn, rm);
9081  }
9082
9083  void Vraddhn(
9084      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9085    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9086    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9087    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9088    VIXL_ASSERT(allow_macro_instructions_);
9089    VIXL_ASSERT(OutsideITBlock());
9090    MacroEmissionCheckScope guard(this);
9091    ITScope it_scope(this, &cond);
9092    vraddhn(cond, dt, rd, rn, rm);
9093  }
9094  void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9095    Vraddhn(al, dt, rd, rn, rm);
9096  }
9097
9098  void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9099    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9100    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9101    VIXL_ASSERT(allow_macro_instructions_);
9102    VIXL_ASSERT(OutsideITBlock());
9103    MacroEmissionCheckScope guard(this);
9104    ITScope it_scope(this, &cond);
9105    vrecpe(cond, dt, rd, rm);
9106  }
9107  void Vrecpe(DataType dt, DRegister rd, DRegister rm) {
9108    Vrecpe(al, dt, rd, rm);
9109  }
9110
9111  void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9112    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9113    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9114    VIXL_ASSERT(allow_macro_instructions_);
9115    VIXL_ASSERT(OutsideITBlock());
9116    MacroEmissionCheckScope guard(this);
9117    ITScope it_scope(this, &cond);
9118    vrecpe(cond, dt, rd, rm);
9119  }
9120  void Vrecpe(DataType dt, QRegister rd, QRegister rm) {
9121    Vrecpe(al, dt, rd, rm);
9122  }
9123
9124  void Vrecps(
9125      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9126    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9127    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9128    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9129    VIXL_ASSERT(allow_macro_instructions_);
9130    VIXL_ASSERT(OutsideITBlock());
9131    MacroEmissionCheckScope guard(this);
9132    ITScope it_scope(this, &cond);
9133    vrecps(cond, dt, rd, rn, rm);
9134  }
9135  void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9136    Vrecps(al, dt, rd, rn, rm);
9137  }
9138
9139  void Vrecps(
9140      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9141    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9142    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9143    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9144    VIXL_ASSERT(allow_macro_instructions_);
9145    VIXL_ASSERT(OutsideITBlock());
9146    MacroEmissionCheckScope guard(this);
9147    ITScope it_scope(this, &cond);
9148    vrecps(cond, dt, rd, rn, rm);
9149  }
9150  void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9151    Vrecps(al, dt, rd, rn, rm);
9152  }
9153
9154  void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9155    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9156    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9157    VIXL_ASSERT(allow_macro_instructions_);
9158    VIXL_ASSERT(OutsideITBlock());
9159    MacroEmissionCheckScope guard(this);
9160    ITScope it_scope(this, &cond);
9161    vrev16(cond, dt, rd, rm);
9162  }
9163  void Vrev16(DataType dt, DRegister rd, DRegister rm) {
9164    Vrev16(al, dt, rd, rm);
9165  }
9166
9167  void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9168    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9169    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9170    VIXL_ASSERT(allow_macro_instructions_);
9171    VIXL_ASSERT(OutsideITBlock());
9172    MacroEmissionCheckScope guard(this);
9173    ITScope it_scope(this, &cond);
9174    vrev16(cond, dt, rd, rm);
9175  }
9176  void Vrev16(DataType dt, QRegister rd, QRegister rm) {
9177    Vrev16(al, dt, rd, rm);
9178  }
9179
9180  void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9181    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9182    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9183    VIXL_ASSERT(allow_macro_instructions_);
9184    VIXL_ASSERT(OutsideITBlock());
9185    MacroEmissionCheckScope guard(this);
9186    ITScope it_scope(this, &cond);
9187    vrev32(cond, dt, rd, rm);
9188  }
9189  void Vrev32(DataType dt, DRegister rd, DRegister rm) {
9190    Vrev32(al, dt, rd, rm);
9191  }
9192
9193  void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9194    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9196    VIXL_ASSERT(allow_macro_instructions_);
9197    VIXL_ASSERT(OutsideITBlock());
9198    MacroEmissionCheckScope guard(this);
9199    ITScope it_scope(this, &cond);
9200    vrev32(cond, dt, rd, rm);
9201  }
9202  void Vrev32(DataType dt, QRegister rd, QRegister rm) {
9203    Vrev32(al, dt, rd, rm);
9204  }
9205
9206  void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9207    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9208    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9209    VIXL_ASSERT(allow_macro_instructions_);
9210    VIXL_ASSERT(OutsideITBlock());
9211    MacroEmissionCheckScope guard(this);
9212    ITScope it_scope(this, &cond);
9213    vrev64(cond, dt, rd, rm);
9214  }
9215  void Vrev64(DataType dt, DRegister rd, DRegister rm) {
9216    Vrev64(al, dt, rd, rm);
9217  }
9218
9219  void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9220    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9221    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9222    VIXL_ASSERT(allow_macro_instructions_);
9223    VIXL_ASSERT(OutsideITBlock());
9224    MacroEmissionCheckScope guard(this);
9225    ITScope it_scope(this, &cond);
9226    vrev64(cond, dt, rd, rm);
9227  }
9228  void Vrev64(DataType dt, QRegister rd, QRegister rm) {
9229    Vrev64(al, dt, rd, rm);
9230  }
9231
9232  void Vrhadd(
9233      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9234    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9235    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9236    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9237    VIXL_ASSERT(allow_macro_instructions_);
9238    VIXL_ASSERT(OutsideITBlock());
9239    MacroEmissionCheckScope guard(this);
9240    ITScope it_scope(this, &cond);
9241    vrhadd(cond, dt, rd, rn, rm);
9242  }
9243  void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9244    Vrhadd(al, dt, rd, rn, rm);
9245  }
9246
9247  void Vrhadd(
9248      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9249    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9250    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9251    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9252    VIXL_ASSERT(allow_macro_instructions_);
9253    VIXL_ASSERT(OutsideITBlock());
9254    MacroEmissionCheckScope guard(this);
9255    ITScope it_scope(this, &cond);
9256    vrhadd(cond, dt, rd, rn, rm);
9257  }
9258  void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9259    Vrhadd(al, dt, rd, rn, rm);
9260  }
9261
9262  void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9263    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9264    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9265    VIXL_ASSERT(allow_macro_instructions_);
9266    VIXL_ASSERT(OutsideITBlock());
9267    MacroEmissionCheckScope guard(this);
9268    vrinta(dt1, dt2, rd, rm);
9269  }
9270
9271  void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9272    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9273    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9274    VIXL_ASSERT(allow_macro_instructions_);
9275    VIXL_ASSERT(OutsideITBlock());
9276    MacroEmissionCheckScope guard(this);
9277    vrinta(dt1, dt2, rd, rm);
9278  }
9279
9280  void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9281    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9282    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9283    VIXL_ASSERT(allow_macro_instructions_);
9284    VIXL_ASSERT(OutsideITBlock());
9285    MacroEmissionCheckScope guard(this);
9286    vrinta(dt1, dt2, rd, rm);
9287  }
9288
9289  void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9290    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9291    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9292    VIXL_ASSERT(allow_macro_instructions_);
9293    VIXL_ASSERT(OutsideITBlock());
9294    MacroEmissionCheckScope guard(this);
9295    vrintm(dt1, dt2, rd, rm);
9296  }
9297
9298  void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9299    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9300    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9301    VIXL_ASSERT(allow_macro_instructions_);
9302    VIXL_ASSERT(OutsideITBlock());
9303    MacroEmissionCheckScope guard(this);
9304    vrintm(dt1, dt2, rd, rm);
9305  }
9306
9307  void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9308    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9310    VIXL_ASSERT(allow_macro_instructions_);
9311    VIXL_ASSERT(OutsideITBlock());
9312    MacroEmissionCheckScope guard(this);
9313    vrintm(dt1, dt2, rd, rm);
9314  }
9315
9316  void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9317    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9318    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9319    VIXL_ASSERT(allow_macro_instructions_);
9320    VIXL_ASSERT(OutsideITBlock());
9321    MacroEmissionCheckScope guard(this);
9322    vrintn(dt1, dt2, rd, rm);
9323  }
9324
9325  void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9327    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9328    VIXL_ASSERT(allow_macro_instructions_);
9329    VIXL_ASSERT(OutsideITBlock());
9330    MacroEmissionCheckScope guard(this);
9331    vrintn(dt1, dt2, rd, rm);
9332  }
9333
9334  void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9335    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9336    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9337    VIXL_ASSERT(allow_macro_instructions_);
9338    VIXL_ASSERT(OutsideITBlock());
9339    MacroEmissionCheckScope guard(this);
9340    vrintn(dt1, dt2, rd, rm);
9341  }
9342
9343  void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9344    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9345    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9346    VIXL_ASSERT(allow_macro_instructions_);
9347    VIXL_ASSERT(OutsideITBlock());
9348    MacroEmissionCheckScope guard(this);
9349    vrintp(dt1, dt2, rd, rm);
9350  }
9351
9352  void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9353    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9354    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9355    VIXL_ASSERT(allow_macro_instructions_);
9356    VIXL_ASSERT(OutsideITBlock());
9357    MacroEmissionCheckScope guard(this);
9358    vrintp(dt1, dt2, rd, rm);
9359  }
9360
9361  void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9362    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9363    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9364    VIXL_ASSERT(allow_macro_instructions_);
9365    VIXL_ASSERT(OutsideITBlock());
9366    MacroEmissionCheckScope guard(this);
9367    vrintp(dt1, dt2, rd, rm);
9368  }
9369
9370  void Vrintr(
9371      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9372    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9373    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9374    VIXL_ASSERT(allow_macro_instructions_);
9375    VIXL_ASSERT(OutsideITBlock());
9376    MacroEmissionCheckScope guard(this);
9377    ITScope it_scope(this, &cond);
9378    vrintr(cond, dt1, dt2, rd, rm);
9379  }
9380  void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9381    Vrintr(al, dt1, dt2, rd, rm);
9382  }
9383
9384  void Vrintr(
9385      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9386    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9387    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9388    VIXL_ASSERT(allow_macro_instructions_);
9389    VIXL_ASSERT(OutsideITBlock());
9390    MacroEmissionCheckScope guard(this);
9391    ITScope it_scope(this, &cond);
9392    vrintr(cond, dt1, dt2, rd, rm);
9393  }
9394  void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9395    Vrintr(al, dt1, dt2, rd, rm);
9396  }
9397
9398  void Vrintx(
9399      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9401    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9402    VIXL_ASSERT(allow_macro_instructions_);
9403    VIXL_ASSERT(OutsideITBlock());
9404    MacroEmissionCheckScope guard(this);
9405    ITScope it_scope(this, &cond);
9406    vrintx(cond, dt1, dt2, rd, rm);
9407  }
9408  void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9409    Vrintx(al, dt1, dt2, rd, rm);
9410  }
9411
9412  void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9413    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9414    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9415    VIXL_ASSERT(allow_macro_instructions_);
9416    VIXL_ASSERT(OutsideITBlock());
9417    MacroEmissionCheckScope guard(this);
9418    vrintx(dt1, dt2, rd, rm);
9419  }
9420
9421  void Vrintx(
9422      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9423    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9424    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9425    VIXL_ASSERT(allow_macro_instructions_);
9426    VIXL_ASSERT(OutsideITBlock());
9427    MacroEmissionCheckScope guard(this);
9428    ITScope it_scope(this, &cond);
9429    vrintx(cond, dt1, dt2, rd, rm);
9430  }
9431  void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9432    Vrintx(al, dt1, dt2, rd, rm);
9433  }
9434
9435  void Vrintz(
9436      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9437    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9438    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9439    VIXL_ASSERT(allow_macro_instructions_);
9440    VIXL_ASSERT(OutsideITBlock());
9441    MacroEmissionCheckScope guard(this);
9442    ITScope it_scope(this, &cond);
9443    vrintz(cond, dt1, dt2, rd, rm);
9444  }
9445  void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9446    Vrintz(al, dt1, dt2, rd, rm);
9447  }
9448
9449  void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
9450    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9451    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9452    VIXL_ASSERT(allow_macro_instructions_);
9453    VIXL_ASSERT(OutsideITBlock());
9454    MacroEmissionCheckScope guard(this);
9455    vrintz(dt1, dt2, rd, rm);
9456  }
9457
9458  void Vrintz(
9459      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9460    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9461    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9462    VIXL_ASSERT(allow_macro_instructions_);
9463    VIXL_ASSERT(OutsideITBlock());
9464    MacroEmissionCheckScope guard(this);
9465    ITScope it_scope(this, &cond);
9466    vrintz(cond, dt1, dt2, rd, rm);
9467  }
9468  void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9469    Vrintz(al, dt1, dt2, rd, rm);
9470  }
9471
9472  void Vrshl(
9473      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9474    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9475    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9476    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9477    VIXL_ASSERT(allow_macro_instructions_);
9478    VIXL_ASSERT(OutsideITBlock());
9479    MacroEmissionCheckScope guard(this);
9480    ITScope it_scope(this, &cond);
9481    vrshl(cond, dt, rd, rm, rn);
9482  }
9483  void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9484    Vrshl(al, dt, rd, rm, rn);
9485  }
9486
9487  void Vrshl(
9488      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9489    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9490    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9491    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9492    VIXL_ASSERT(allow_macro_instructions_);
9493    VIXL_ASSERT(OutsideITBlock());
9494    MacroEmissionCheckScope guard(this);
9495    ITScope it_scope(this, &cond);
9496    vrshl(cond, dt, rd, rm, rn);
9497  }
9498  void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9499    Vrshl(al, dt, rd, rm, rn);
9500  }
9501
9502  void Vrshr(Condition cond,
9503             DataType dt,
9504             DRegister rd,
9505             DRegister rm,
9506             const DOperand& operand) {
9507    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9508    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9509    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9510    VIXL_ASSERT(allow_macro_instructions_);
9511    VIXL_ASSERT(OutsideITBlock());
9512    MacroEmissionCheckScope guard(this);
9513    ITScope it_scope(this, &cond);
9514    vrshr(cond, dt, rd, rm, operand);
9515  }
9516  void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9517    Vrshr(al, dt, rd, rm, operand);
9518  }
9519
9520  void Vrshr(Condition cond,
9521             DataType dt,
9522             QRegister rd,
9523             QRegister rm,
9524             const QOperand& operand) {
9525    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9526    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9527    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9528    VIXL_ASSERT(allow_macro_instructions_);
9529    VIXL_ASSERT(OutsideITBlock());
9530    MacroEmissionCheckScope guard(this);
9531    ITScope it_scope(this, &cond);
9532    vrshr(cond, dt, rd, rm, operand);
9533  }
9534  void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9535    Vrshr(al, dt, rd, rm, operand);
9536  }
9537
9538  void Vrshrn(Condition cond,
9539              DataType dt,
9540              DRegister rd,
9541              QRegister rm,
9542              const QOperand& operand) {
9543    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9544    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9545    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9546    VIXL_ASSERT(allow_macro_instructions_);
9547    VIXL_ASSERT(OutsideITBlock());
9548    MacroEmissionCheckScope guard(this);
9549    ITScope it_scope(this, &cond);
9550    vrshrn(cond, dt, rd, rm, operand);
9551  }
9552  void Vrshrn(DataType dt,
9553              DRegister rd,
9554              QRegister rm,
9555              const QOperand& operand) {
9556    Vrshrn(al, dt, rd, rm, operand);
9557  }
9558
9559  void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9560    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9561    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9562    VIXL_ASSERT(allow_macro_instructions_);
9563    VIXL_ASSERT(OutsideITBlock());
9564    MacroEmissionCheckScope guard(this);
9565    ITScope it_scope(this, &cond);
9566    vrsqrte(cond, dt, rd, rm);
9567  }
9568  void Vrsqrte(DataType dt, DRegister rd, DRegister rm) {
9569    Vrsqrte(al, dt, rd, rm);
9570  }
9571
9572  void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9573    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9574    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9575    VIXL_ASSERT(allow_macro_instructions_);
9576    VIXL_ASSERT(OutsideITBlock());
9577    MacroEmissionCheckScope guard(this);
9578    ITScope it_scope(this, &cond);
9579    vrsqrte(cond, dt, rd, rm);
9580  }
9581  void Vrsqrte(DataType dt, QRegister rd, QRegister rm) {
9582    Vrsqrte(al, dt, rd, rm);
9583  }
9584
9585  void Vrsqrts(
9586      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9587    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9588    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9589    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9590    VIXL_ASSERT(allow_macro_instructions_);
9591    VIXL_ASSERT(OutsideITBlock());
9592    MacroEmissionCheckScope guard(this);
9593    ITScope it_scope(this, &cond);
9594    vrsqrts(cond, dt, rd, rn, rm);
9595  }
9596  void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9597    Vrsqrts(al, dt, rd, rn, rm);
9598  }
9599
9600  void Vrsqrts(
9601      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9602    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9603    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9604    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9605    VIXL_ASSERT(allow_macro_instructions_);
9606    VIXL_ASSERT(OutsideITBlock());
9607    MacroEmissionCheckScope guard(this);
9608    ITScope it_scope(this, &cond);
9609    vrsqrts(cond, dt, rd, rn, rm);
9610  }
9611  void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9612    Vrsqrts(al, dt, rd, rn, rm);
9613  }
9614
9615  void Vrsra(Condition cond,
9616             DataType dt,
9617             DRegister rd,
9618             DRegister rm,
9619             const DOperand& operand) {
9620    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9621    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9622    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9623    VIXL_ASSERT(allow_macro_instructions_);
9624    VIXL_ASSERT(OutsideITBlock());
9625    MacroEmissionCheckScope guard(this);
9626    ITScope it_scope(this, &cond);
9627    vrsra(cond, dt, rd, rm, operand);
9628  }
9629  void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9630    Vrsra(al, dt, rd, rm, operand);
9631  }
9632
9633  void Vrsra(Condition cond,
9634             DataType dt,
9635             QRegister rd,
9636             QRegister rm,
9637             const QOperand& operand) {
9638    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9639    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9640    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9641    VIXL_ASSERT(allow_macro_instructions_);
9642    VIXL_ASSERT(OutsideITBlock());
9643    MacroEmissionCheckScope guard(this);
9644    ITScope it_scope(this, &cond);
9645    vrsra(cond, dt, rd, rm, operand);
9646  }
9647  void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9648    Vrsra(al, dt, rd, rm, operand);
9649  }
9650
9651  void Vrsubhn(
9652      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9653    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9654    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9655    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9656    VIXL_ASSERT(allow_macro_instructions_);
9657    VIXL_ASSERT(OutsideITBlock());
9658    MacroEmissionCheckScope guard(this);
9659    ITScope it_scope(this, &cond);
9660    vrsubhn(cond, dt, rd, rn, rm);
9661  }
9662  void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9663    Vrsubhn(al, dt, rd, rn, rm);
9664  }
9665
9666  void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9667    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9668    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9669    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9670    VIXL_ASSERT(allow_macro_instructions_);
9671    VIXL_ASSERT(OutsideITBlock());
9672    MacroEmissionCheckScope guard(this);
9673    vseleq(dt, rd, rn, rm);
9674  }
9675
9676  void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9677    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9678    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9679    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9680    VIXL_ASSERT(allow_macro_instructions_);
9681    VIXL_ASSERT(OutsideITBlock());
9682    MacroEmissionCheckScope guard(this);
9683    vseleq(dt, rd, rn, rm);
9684  }
9685
9686  void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9687    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9688    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9689    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9690    VIXL_ASSERT(allow_macro_instructions_);
9691    VIXL_ASSERT(OutsideITBlock());
9692    MacroEmissionCheckScope guard(this);
9693    vselge(dt, rd, rn, rm);
9694  }
9695
9696  void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9697    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9698    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9699    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9700    VIXL_ASSERT(allow_macro_instructions_);
9701    VIXL_ASSERT(OutsideITBlock());
9702    MacroEmissionCheckScope guard(this);
9703    vselge(dt, rd, rn, rm);
9704  }
9705
9706  void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9707    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9708    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9709    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9710    VIXL_ASSERT(allow_macro_instructions_);
9711    VIXL_ASSERT(OutsideITBlock());
9712    MacroEmissionCheckScope guard(this);
9713    vselgt(dt, rd, rn, rm);
9714  }
9715
9716  void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9717    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9718    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9719    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9720    VIXL_ASSERT(allow_macro_instructions_);
9721    VIXL_ASSERT(OutsideITBlock());
9722    MacroEmissionCheckScope guard(this);
9723    vselgt(dt, rd, rn, rm);
9724  }
9725
9726  void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9727    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9728    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9729    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9730    VIXL_ASSERT(allow_macro_instructions_);
9731    VIXL_ASSERT(OutsideITBlock());
9732    MacroEmissionCheckScope guard(this);
9733    vselvs(dt, rd, rn, rm);
9734  }
9735
9736  void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9737    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9738    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9739    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9740    VIXL_ASSERT(allow_macro_instructions_);
9741    VIXL_ASSERT(OutsideITBlock());
9742    MacroEmissionCheckScope guard(this);
9743    vselvs(dt, rd, rn, rm);
9744  }
9745
9746  void Vshl(Condition cond,
9747            DataType dt,
9748            DRegister rd,
9749            DRegister rm,
9750            const DOperand& operand) {
9751    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9752    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9753    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9754    VIXL_ASSERT(allow_macro_instructions_);
9755    VIXL_ASSERT(OutsideITBlock());
9756    MacroEmissionCheckScope guard(this);
9757    ITScope it_scope(this, &cond);
9758    vshl(cond, dt, rd, rm, operand);
9759  }
9760  void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9761    Vshl(al, dt, rd, rm, operand);
9762  }
9763
9764  void Vshl(Condition cond,
9765            DataType dt,
9766            QRegister rd,
9767            QRegister rm,
9768            const QOperand& operand) {
9769    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9770    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9771    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9772    VIXL_ASSERT(allow_macro_instructions_);
9773    VIXL_ASSERT(OutsideITBlock());
9774    MacroEmissionCheckScope guard(this);
9775    ITScope it_scope(this, &cond);
9776    vshl(cond, dt, rd, rm, operand);
9777  }
9778  void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9779    Vshl(al, dt, rd, rm, operand);
9780  }
9781
9782  void Vshll(Condition cond,
9783             DataType dt,
9784             QRegister rd,
9785             DRegister rm,
9786             const DOperand& operand) {
9787    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9788    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9789    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9790    VIXL_ASSERT(allow_macro_instructions_);
9791    VIXL_ASSERT(OutsideITBlock());
9792    MacroEmissionCheckScope guard(this);
9793    ITScope it_scope(this, &cond);
9794    vshll(cond, dt, rd, rm, operand);
9795  }
9796  void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) {
9797    Vshll(al, dt, rd, rm, operand);
9798  }
9799
9800  void Vshr(Condition cond,
9801            DataType dt,
9802            DRegister rd,
9803            DRegister rm,
9804            const DOperand& operand) {
9805    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9806    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9807    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9808    VIXL_ASSERT(allow_macro_instructions_);
9809    VIXL_ASSERT(OutsideITBlock());
9810    MacroEmissionCheckScope guard(this);
9811    ITScope it_scope(this, &cond);
9812    vshr(cond, dt, rd, rm, operand);
9813  }
9814  void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9815    Vshr(al, dt, rd, rm, operand);
9816  }
9817
9818  void Vshr(Condition cond,
9819            DataType dt,
9820            QRegister rd,
9821            QRegister rm,
9822            const QOperand& operand) {
9823    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9824    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9825    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9826    VIXL_ASSERT(allow_macro_instructions_);
9827    VIXL_ASSERT(OutsideITBlock());
9828    MacroEmissionCheckScope guard(this);
9829    ITScope it_scope(this, &cond);
9830    vshr(cond, dt, rd, rm, operand);
9831  }
9832  void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9833    Vshr(al, dt, rd, rm, operand);
9834  }
9835
9836  void Vshrn(Condition cond,
9837             DataType dt,
9838             DRegister rd,
9839             QRegister rm,
9840             const QOperand& operand) {
9841    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9842    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9843    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9844    VIXL_ASSERT(allow_macro_instructions_);
9845    VIXL_ASSERT(OutsideITBlock());
9846    MacroEmissionCheckScope guard(this);
9847    ITScope it_scope(this, &cond);
9848    vshrn(cond, dt, rd, rm, operand);
9849  }
9850  void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) {
9851    Vshrn(al, dt, rd, rm, operand);
9852  }
9853
9854  void Vsli(Condition cond,
9855            DataType dt,
9856            DRegister rd,
9857            DRegister rm,
9858            const DOperand& operand) {
9859    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9860    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9861    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9862    VIXL_ASSERT(allow_macro_instructions_);
9863    VIXL_ASSERT(OutsideITBlock());
9864    MacroEmissionCheckScope guard(this);
9865    ITScope it_scope(this, &cond);
9866    vsli(cond, dt, rd, rm, operand);
9867  }
9868  void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9869    Vsli(al, dt, rd, rm, operand);
9870  }
9871
9872  void Vsli(Condition cond,
9873            DataType dt,
9874            QRegister rd,
9875            QRegister rm,
9876            const QOperand& operand) {
9877    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9878    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9879    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9880    VIXL_ASSERT(allow_macro_instructions_);
9881    VIXL_ASSERT(OutsideITBlock());
9882    MacroEmissionCheckScope guard(this);
9883    ITScope it_scope(this, &cond);
9884    vsli(cond, dt, rd, rm, operand);
9885  }
9886  void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9887    Vsli(al, dt, rd, rm, operand);
9888  }
9889
9890  void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) {
9891    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9892    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9893    VIXL_ASSERT(allow_macro_instructions_);
9894    VIXL_ASSERT(OutsideITBlock());
9895    MacroEmissionCheckScope guard(this);
9896    ITScope it_scope(this, &cond);
9897    vsqrt(cond, dt, rd, rm);
9898  }
9899  void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); }
9900
9901  void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9902    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9903    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9904    VIXL_ASSERT(allow_macro_instructions_);
9905    VIXL_ASSERT(OutsideITBlock());
9906    MacroEmissionCheckScope guard(this);
9907    ITScope it_scope(this, &cond);
9908    vsqrt(cond, dt, rd, rm);
9909  }
9910  void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); }
9911
9912  void Vsra(Condition cond,
9913            DataType dt,
9914            DRegister rd,
9915            DRegister rm,
9916            const DOperand& operand) {
9917    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9918    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9919    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9920    VIXL_ASSERT(allow_macro_instructions_);
9921    VIXL_ASSERT(OutsideITBlock());
9922    MacroEmissionCheckScope guard(this);
9923    ITScope it_scope(this, &cond);
9924    vsra(cond, dt, rd, rm, operand);
9925  }
9926  void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9927    Vsra(al, dt, rd, rm, operand);
9928  }
9929
9930  void Vsra(Condition cond,
9931            DataType dt,
9932            QRegister rd,
9933            QRegister rm,
9934            const QOperand& operand) {
9935    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9936    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9937    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9938    VIXL_ASSERT(allow_macro_instructions_);
9939    VIXL_ASSERT(OutsideITBlock());
9940    MacroEmissionCheckScope guard(this);
9941    ITScope it_scope(this, &cond);
9942    vsra(cond, dt, rd, rm, operand);
9943  }
9944  void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9945    Vsra(al, dt, rd, rm, operand);
9946  }
9947
9948  void Vsri(Condition cond,
9949            DataType dt,
9950            DRegister rd,
9951            DRegister rm,
9952            const DOperand& operand) {
9953    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9954    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9955    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9956    VIXL_ASSERT(allow_macro_instructions_);
9957    VIXL_ASSERT(OutsideITBlock());
9958    MacroEmissionCheckScope guard(this);
9959    ITScope it_scope(this, &cond);
9960    vsri(cond, dt, rd, rm, operand);
9961  }
9962  void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9963    Vsri(al, dt, rd, rm, operand);
9964  }
9965
9966  void Vsri(Condition cond,
9967            DataType dt,
9968            QRegister rd,
9969            QRegister rm,
9970            const QOperand& operand) {
9971    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9972    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9973    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9974    VIXL_ASSERT(allow_macro_instructions_);
9975    VIXL_ASSERT(OutsideITBlock());
9976    MacroEmissionCheckScope guard(this);
9977    ITScope it_scope(this, &cond);
9978    vsri(cond, dt, rd, rm, operand);
9979  }
9980  void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9981    Vsri(al, dt, rd, rm, operand);
9982  }
9983
9984  void Vst1(Condition cond,
9985            DataType dt,
9986            const NeonRegisterList& nreglist,
9987            const AlignedMemOperand& operand) {
9988    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
9989    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9990    VIXL_ASSERT(allow_macro_instructions_);
9991    VIXL_ASSERT(OutsideITBlock());
9992    MacroEmissionCheckScope guard(this);
9993    ITScope it_scope(this, &cond);
9994    vst1(cond, dt, nreglist, operand);
9995  }
9996  void Vst1(DataType dt,
9997            const NeonRegisterList& nreglist,
9998            const AlignedMemOperand& operand) {
9999    Vst1(al, dt, nreglist, operand);
10000  }
10001
10002  void Vst2(Condition cond,
10003            DataType dt,
10004            const NeonRegisterList& nreglist,
10005            const AlignedMemOperand& operand) {
10006    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10007    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10008    VIXL_ASSERT(allow_macro_instructions_);
10009    VIXL_ASSERT(OutsideITBlock());
10010    MacroEmissionCheckScope guard(this);
10011    ITScope it_scope(this, &cond);
10012    vst2(cond, dt, nreglist, operand);
10013  }
10014  void Vst2(DataType dt,
10015            const NeonRegisterList& nreglist,
10016            const AlignedMemOperand& operand) {
10017    Vst2(al, dt, nreglist, operand);
10018  }
10019
10020  void Vst3(Condition cond,
10021            DataType dt,
10022            const NeonRegisterList& nreglist,
10023            const AlignedMemOperand& operand) {
10024    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10025    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10026    VIXL_ASSERT(allow_macro_instructions_);
10027    VIXL_ASSERT(OutsideITBlock());
10028    MacroEmissionCheckScope guard(this);
10029    ITScope it_scope(this, &cond);
10030    vst3(cond, dt, nreglist, operand);
10031  }
10032  void Vst3(DataType dt,
10033            const NeonRegisterList& nreglist,
10034            const AlignedMemOperand& operand) {
10035    Vst3(al, dt, nreglist, operand);
10036  }
10037
10038  void Vst3(Condition cond,
10039            DataType dt,
10040            const NeonRegisterList& nreglist,
10041            const MemOperand& operand) {
10042    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10043    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10044    VIXL_ASSERT(allow_macro_instructions_);
10045    VIXL_ASSERT(OutsideITBlock());
10046    MacroEmissionCheckScope guard(this);
10047    ITScope it_scope(this, &cond);
10048    vst3(cond, dt, nreglist, operand);
10049  }
10050  void Vst3(DataType dt,
10051            const NeonRegisterList& nreglist,
10052            const MemOperand& operand) {
10053    Vst3(al, dt, nreglist, operand);
10054  }
10055
10056  void Vst4(Condition cond,
10057            DataType dt,
10058            const NeonRegisterList& nreglist,
10059            const AlignedMemOperand& operand) {
10060    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10061    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10062    VIXL_ASSERT(allow_macro_instructions_);
10063    VIXL_ASSERT(OutsideITBlock());
10064    MacroEmissionCheckScope guard(this);
10065    ITScope it_scope(this, &cond);
10066    vst4(cond, dt, nreglist, operand);
10067  }
10068  void Vst4(DataType dt,
10069            const NeonRegisterList& nreglist,
10070            const AlignedMemOperand& operand) {
10071    Vst4(al, dt, nreglist, operand);
10072  }
10073
10074  void Vstm(Condition cond,
10075            DataType dt,
10076            Register rn,
10077            WriteBack write_back,
10078            DRegisterList dreglist) {
10079    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10080    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10081    VIXL_ASSERT(allow_macro_instructions_);
10082    VIXL_ASSERT(OutsideITBlock());
10083    MacroEmissionCheckScope guard(this);
10084    ITScope it_scope(this, &cond);
10085    vstm(cond, dt, rn, write_back, dreglist);
10086  }
10087  void Vstm(DataType dt,
10088            Register rn,
10089            WriteBack write_back,
10090            DRegisterList dreglist) {
10091    Vstm(al, dt, rn, write_back, dreglist);
10092  }
10093  void Vstm(Condition cond,
10094            Register rn,
10095            WriteBack write_back,
10096            DRegisterList dreglist) {
10097    Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist);
10098  }
10099  void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) {
10100    Vstm(al, kDataTypeValueNone, rn, write_back, dreglist);
10101  }
10102
10103  void Vstm(Condition cond,
10104            DataType dt,
10105            Register rn,
10106            WriteBack write_back,
10107            SRegisterList sreglist) {
10108    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10109    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10110    VIXL_ASSERT(allow_macro_instructions_);
10111    VIXL_ASSERT(OutsideITBlock());
10112    MacroEmissionCheckScope guard(this);
10113    ITScope it_scope(this, &cond);
10114    vstm(cond, dt, rn, write_back, sreglist);
10115  }
10116  void Vstm(DataType dt,
10117            Register rn,
10118            WriteBack write_back,
10119            SRegisterList sreglist) {
10120    Vstm(al, dt, rn, write_back, sreglist);
10121  }
10122  void Vstm(Condition cond,
10123            Register rn,
10124            WriteBack write_back,
10125            SRegisterList sreglist) {
10126    Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist);
10127  }
10128  void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) {
10129    Vstm(al, kDataTypeValueNone, rn, write_back, sreglist);
10130  }
10131
10132  void Vstmdb(Condition cond,
10133              DataType dt,
10134              Register rn,
10135              WriteBack write_back,
10136              DRegisterList dreglist) {
10137    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10138    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10139    VIXL_ASSERT(allow_macro_instructions_);
10140    VIXL_ASSERT(OutsideITBlock());
10141    MacroEmissionCheckScope guard(this);
10142    ITScope it_scope(this, &cond);
10143    vstmdb(cond, dt, rn, write_back, dreglist);
10144  }
10145  void Vstmdb(DataType dt,
10146              Register rn,
10147              WriteBack write_back,
10148              DRegisterList dreglist) {
10149    Vstmdb(al, dt, rn, write_back, dreglist);
10150  }
10151  void Vstmdb(Condition cond,
10152              Register rn,
10153              WriteBack write_back,
10154              DRegisterList dreglist) {
10155    Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
10156  }
10157  void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
10158    Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
10159  }
10160
10161  void Vstmdb(Condition cond,
10162              DataType dt,
10163              Register rn,
10164              WriteBack write_back,
10165              SRegisterList sreglist) {
10166    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10167    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10168    VIXL_ASSERT(allow_macro_instructions_);
10169    VIXL_ASSERT(OutsideITBlock());
10170    MacroEmissionCheckScope guard(this);
10171    ITScope it_scope(this, &cond);
10172    vstmdb(cond, dt, rn, write_back, sreglist);
10173  }
10174  void Vstmdb(DataType dt,
10175              Register rn,
10176              WriteBack write_back,
10177              SRegisterList sreglist) {
10178    Vstmdb(al, dt, rn, write_back, sreglist);
10179  }
10180  void Vstmdb(Condition cond,
10181              Register rn,
10182              WriteBack write_back,
10183              SRegisterList sreglist) {
10184    Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
10185  }
10186  void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
10187    Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
10188  }
10189
10190  void Vstmia(Condition cond,
10191              DataType dt,
10192              Register rn,
10193              WriteBack write_back,
10194              DRegisterList dreglist) {
10195    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10196    VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10197    VIXL_ASSERT(allow_macro_instructions_);
10198    VIXL_ASSERT(OutsideITBlock());
10199    MacroEmissionCheckScope guard(this);
10200    ITScope it_scope(this, &cond);
10201    vstmia(cond, dt, rn, write_back, dreglist);
10202  }
10203  void Vstmia(DataType dt,
10204              Register rn,
10205              WriteBack write_back,
10206              DRegisterList dreglist) {
10207    Vstmia(al, dt, rn, write_back, dreglist);
10208  }
10209  void Vstmia(Condition cond,
10210              Register rn,
10211              WriteBack write_back,
10212              DRegisterList dreglist) {
10213    Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
10214  }
10215  void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
10216    Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist);
10217  }
10218
10219  void Vstmia(Condition cond,
10220              DataType dt,
10221              Register rn,
10222              WriteBack write_back,
10223              SRegisterList sreglist) {
10224    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10225    VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10226    VIXL_ASSERT(allow_macro_instructions_);
10227    VIXL_ASSERT(OutsideITBlock());
10228    MacroEmissionCheckScope guard(this);
10229    ITScope it_scope(this, &cond);
10230    vstmia(cond, dt, rn, write_back, sreglist);
10231  }
10232  void Vstmia(DataType dt,
10233              Register rn,
10234              WriteBack write_back,
10235              SRegisterList sreglist) {
10236    Vstmia(al, dt, rn, write_back, sreglist);
10237  }
10238  void Vstmia(Condition cond,
10239              Register rn,
10240              WriteBack write_back,
10241              SRegisterList sreglist) {
10242    Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
10243  }
10244  void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
10245    Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist);
10246  }
10247
10248  void Vstr(Condition cond,
10249            DataType dt,
10250            DRegister rd,
10251            const MemOperand& operand) {
10252    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10253    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10254    VIXL_ASSERT(allow_macro_instructions_);
10255    VIXL_ASSERT(OutsideITBlock());
10256    MacroEmissionCheckScope guard(this);
10257    ITScope it_scope(this, &cond);
10258    vstr(cond, dt, rd, operand);
10259  }
10260  void Vstr(DataType dt, DRegister rd, const MemOperand& operand) {
10261    Vstr(al, dt, rd, operand);
10262  }
10263  void Vstr(Condition cond, DRegister rd, const MemOperand& operand) {
10264    Vstr(cond, Untyped64, rd, operand);
10265  }
10266  void Vstr(DRegister rd, const MemOperand& operand) {
10267    Vstr(al, Untyped64, rd, operand);
10268  }
10269
10270  void Vstr(Condition cond,
10271            DataType dt,
10272            SRegister rd,
10273            const MemOperand& operand) {
10274    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10275    VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10276    VIXL_ASSERT(allow_macro_instructions_);
10277    VIXL_ASSERT(OutsideITBlock());
10278    MacroEmissionCheckScope guard(this);
10279    ITScope it_scope(this, &cond);
10280    vstr(cond, dt, rd, operand);
10281  }
10282  void Vstr(DataType dt, SRegister rd, const MemOperand& operand) {
10283    Vstr(al, dt, rd, operand);
10284  }
10285  void Vstr(Condition cond, SRegister rd, const MemOperand& operand) {
10286    Vstr(cond, Untyped32, rd, operand);
10287  }
10288  void Vstr(SRegister rd, const MemOperand& operand) {
10289    Vstr(al, Untyped32, rd, operand);
10290  }
10291
10292  void Vsub(
10293      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10294    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10295    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10296    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10297    VIXL_ASSERT(allow_macro_instructions_);
10298    VIXL_ASSERT(OutsideITBlock());
10299    MacroEmissionCheckScope guard(this);
10300    ITScope it_scope(this, &cond);
10301    vsub(cond, dt, rd, rn, rm);
10302  }
10303  void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10304    Vsub(al, dt, rd, rn, rm);
10305  }
10306
10307  void Vsub(
10308      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10309    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10310    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10311    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10312    VIXL_ASSERT(allow_macro_instructions_);
10313    VIXL_ASSERT(OutsideITBlock());
10314    MacroEmissionCheckScope guard(this);
10315    ITScope it_scope(this, &cond);
10316    vsub(cond, dt, rd, rn, rm);
10317  }
10318  void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10319    Vsub(al, dt, rd, rn, rm);
10320  }
10321
10322  void Vsub(
10323      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10324    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10325    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10326    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10327    VIXL_ASSERT(allow_macro_instructions_);
10328    VIXL_ASSERT(OutsideITBlock());
10329    MacroEmissionCheckScope guard(this);
10330    ITScope it_scope(this, &cond);
10331    vsub(cond, dt, rd, rn, rm);
10332  }
10333  void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10334    Vsub(al, dt, rd, rn, rm);
10335  }
10336
10337  void Vsubhn(
10338      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10339    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10340    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10341    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10342    VIXL_ASSERT(allow_macro_instructions_);
10343    VIXL_ASSERT(OutsideITBlock());
10344    MacroEmissionCheckScope guard(this);
10345    ITScope it_scope(this, &cond);
10346    vsubhn(cond, dt, rd, rn, rm);
10347  }
10348  void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10349    Vsubhn(al, dt, rd, rn, rm);
10350  }
10351
10352  void Vsubl(
10353      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10354    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10355    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10356    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10357    VIXL_ASSERT(allow_macro_instructions_);
10358    VIXL_ASSERT(OutsideITBlock());
10359    MacroEmissionCheckScope guard(this);
10360    ITScope it_scope(this, &cond);
10361    vsubl(cond, dt, rd, rn, rm);
10362  }
10363  void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10364    Vsubl(al, dt, rd, rn, rm);
10365  }
10366
10367  void Vsubw(
10368      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10369    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10370    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10371    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10372    VIXL_ASSERT(allow_macro_instructions_);
10373    VIXL_ASSERT(OutsideITBlock());
10374    MacroEmissionCheckScope guard(this);
10375    ITScope it_scope(this, &cond);
10376    vsubw(cond, dt, rd, rn, rm);
10377  }
10378  void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10379    Vsubw(al, dt, rd, rn, rm);
10380  }
10381
10382  void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10383    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10384    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10385    VIXL_ASSERT(allow_macro_instructions_);
10386    VIXL_ASSERT(OutsideITBlock());
10387    MacroEmissionCheckScope guard(this);
10388    ITScope it_scope(this, &cond);
10389    vswp(cond, dt, rd, rm);
10390  }
10391  void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); }
10392  void Vswp(Condition cond, DRegister rd, DRegister rm) {
10393    Vswp(cond, kDataTypeValueNone, rd, rm);
10394  }
10395  void Vswp(DRegister rd, DRegister rm) {
10396    Vswp(al, kDataTypeValueNone, rd, rm);
10397  }
10398
10399  void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10400    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10401    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10402    VIXL_ASSERT(allow_macro_instructions_);
10403    VIXL_ASSERT(OutsideITBlock());
10404    MacroEmissionCheckScope guard(this);
10405    ITScope it_scope(this, &cond);
10406    vswp(cond, dt, rd, rm);
10407  }
10408  void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); }
10409  void Vswp(Condition cond, QRegister rd, QRegister rm) {
10410    Vswp(cond, kDataTypeValueNone, rd, rm);
10411  }
10412  void Vswp(QRegister rd, QRegister rm) {
10413    Vswp(al, kDataTypeValueNone, rd, rm);
10414  }
10415
10416  void Vtbl(Condition cond,
10417            DataType dt,
10418            DRegister rd,
10419            const NeonRegisterList& nreglist,
10420            DRegister rm) {
10421    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10422    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10423    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10424    VIXL_ASSERT(allow_macro_instructions_);
10425    VIXL_ASSERT(OutsideITBlock());
10426    MacroEmissionCheckScope guard(this);
10427    ITScope it_scope(this, &cond);
10428    vtbl(cond, dt, rd, nreglist, rm);
10429  }
10430  void Vtbl(DataType dt,
10431            DRegister rd,
10432            const NeonRegisterList& nreglist,
10433            DRegister rm) {
10434    Vtbl(al, dt, rd, nreglist, rm);
10435  }
10436
10437  void Vtbx(Condition cond,
10438            DataType dt,
10439            DRegister rd,
10440            const NeonRegisterList& nreglist,
10441            DRegister rm) {
10442    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10443    VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10444    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10445    VIXL_ASSERT(allow_macro_instructions_);
10446    VIXL_ASSERT(OutsideITBlock());
10447    MacroEmissionCheckScope guard(this);
10448    ITScope it_scope(this, &cond);
10449    vtbx(cond, dt, rd, nreglist, rm);
10450  }
10451  void Vtbx(DataType dt,
10452            DRegister rd,
10453            const NeonRegisterList& nreglist,
10454            DRegister rm) {
10455    Vtbx(al, dt, rd, nreglist, rm);
10456  }
10457
10458  void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10459    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10460    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10461    VIXL_ASSERT(allow_macro_instructions_);
10462    VIXL_ASSERT(OutsideITBlock());
10463    MacroEmissionCheckScope guard(this);
10464    ITScope it_scope(this, &cond);
10465    vtrn(cond, dt, rd, rm);
10466  }
10467  void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); }
10468
10469  void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10470    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10471    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10472    VIXL_ASSERT(allow_macro_instructions_);
10473    VIXL_ASSERT(OutsideITBlock());
10474    MacroEmissionCheckScope guard(this);
10475    ITScope it_scope(this, &cond);
10476    vtrn(cond, dt, rd, rm);
10477  }
10478  void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); }
10479
10480  void Vtst(
10481      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10482    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10483    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10484    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10485    VIXL_ASSERT(allow_macro_instructions_);
10486    VIXL_ASSERT(OutsideITBlock());
10487    MacroEmissionCheckScope guard(this);
10488    ITScope it_scope(this, &cond);
10489    vtst(cond, dt, rd, rn, rm);
10490  }
10491  void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10492    Vtst(al, dt, rd, rn, rm);
10493  }
10494
10495  void Vtst(
10496      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10497    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10498    VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10499    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10500    VIXL_ASSERT(allow_macro_instructions_);
10501    VIXL_ASSERT(OutsideITBlock());
10502    MacroEmissionCheckScope guard(this);
10503    ITScope it_scope(this, &cond);
10504    vtst(cond, dt, rd, rn, rm);
10505  }
10506  void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10507    Vtst(al, dt, rd, rn, rm);
10508  }
10509
10510  void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10511    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10512    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10513    VIXL_ASSERT(allow_macro_instructions_);
10514    VIXL_ASSERT(OutsideITBlock());
10515    MacroEmissionCheckScope guard(this);
10516    ITScope it_scope(this, &cond);
10517    vuzp(cond, dt, rd, rm);
10518  }
10519  void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); }
10520
10521  void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10522    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10523    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10524    VIXL_ASSERT(allow_macro_instructions_);
10525    VIXL_ASSERT(OutsideITBlock());
10526    MacroEmissionCheckScope guard(this);
10527    ITScope it_scope(this, &cond);
10528    vuzp(cond, dt, rd, rm);
10529  }
10530  void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); }
10531
10532  void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10533    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10534    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10535    VIXL_ASSERT(allow_macro_instructions_);
10536    VIXL_ASSERT(OutsideITBlock());
10537    MacroEmissionCheckScope guard(this);
10538    ITScope it_scope(this, &cond);
10539    vzip(cond, dt, rd, rm);
10540  }
10541  void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); }
10542
10543  void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10544    VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10545    VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10546    VIXL_ASSERT(allow_macro_instructions_);
10547    VIXL_ASSERT(OutsideITBlock());
10548    MacroEmissionCheckScope guard(this);
10549    ITScope it_scope(this, &cond);
10550    vzip(cond, dt, rd, rm);
10551  }
10552  void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); }
10553
10554  void Yield(Condition cond) {
10555    VIXL_ASSERT(allow_macro_instructions_);
10556    VIXL_ASSERT(OutsideITBlock());
10557    MacroEmissionCheckScope guard(this);
10558    ITScope it_scope(this, &cond);
10559    yield(cond);
10560  }
10561  void Yield() { Yield(al); }
10562  void Vabs(Condition cond, VRegister rd, VRegister rm) {
10563    VIXL_ASSERT(rd.IsS() || rd.IsD());
10564    VIXL_ASSERT(rd.GetType() == rm.GetType());
10565    if (rd.IsS()) {
10566      Vabs(cond, F32, rd.S(), rm.S());
10567    } else {
10568      Vabs(cond, F64, rd.D(), rm.D());
10569    }
10570  }
10571  void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); }
10572  void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10573    VIXL_ASSERT(rd.IsS() || rd.IsD());
10574    VIXL_ASSERT(rd.GetType() == rn.GetType());
10575    VIXL_ASSERT(rd.GetType() == rm.GetType());
10576    if (rd.IsS()) {
10577      Vadd(cond, F32, rd.S(), rn.S(), rm.S());
10578    } else {
10579      Vadd(cond, F64, rd.D(), rn.D(), rm.D());
10580    }
10581  }
10582  void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); }
10583  void Vcmp(Condition cond, VRegister rd, VRegister rm) {
10584    VIXL_ASSERT(rd.IsS() || rd.IsD());
10585    VIXL_ASSERT(rd.GetType() == rm.GetType());
10586    if (rd.IsS()) {
10587      Vcmp(cond, F32, rd.S(), rm.S());
10588    } else {
10589      Vcmp(cond, F64, rd.D(), rm.D());
10590    }
10591  }
10592  void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); }
10593  void Vcmpe(Condition cond, VRegister rd, VRegister rm) {
10594    VIXL_ASSERT(rd.IsS() || rd.IsD());
10595    VIXL_ASSERT(rd.GetType() == rm.GetType());
10596    if (rd.IsS()) {
10597      Vcmpe(cond, F32, rd.S(), rm.S());
10598    } else {
10599      Vcmpe(cond, F64, rd.D(), rm.D());
10600    }
10601  }
10602  void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); }
10603  void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10604    VIXL_ASSERT(rd.IsS() || rd.IsD());
10605    VIXL_ASSERT(rd.GetType() == rn.GetType());
10606    VIXL_ASSERT(rd.GetType() == rm.GetType());
10607    if (rd.IsS()) {
10608      Vdiv(cond, F32, rd.S(), rn.S(), rm.S());
10609    } else {
10610      Vdiv(cond, F64, rd.D(), rn.D(), rm.D());
10611    }
10612  }
10613  void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); }
10614  void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10615    VIXL_ASSERT(rd.IsS() || rd.IsD());
10616    VIXL_ASSERT(rd.GetType() == rn.GetType());
10617    VIXL_ASSERT(rd.GetType() == rm.GetType());
10618    if (rd.IsS()) {
10619      Vfma(cond, F32, rd.S(), rn.S(), rm.S());
10620    } else {
10621      Vfma(cond, F64, rd.D(), rn.D(), rm.D());
10622    }
10623  }
10624  void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); }
10625  void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10626    VIXL_ASSERT(rd.IsS() || rd.IsD());
10627    VIXL_ASSERT(rd.GetType() == rn.GetType());
10628    VIXL_ASSERT(rd.GetType() == rm.GetType());
10629    if (rd.IsS()) {
10630      Vfms(cond, F32, rd.S(), rn.S(), rm.S());
10631    } else {
10632      Vfms(cond, F64, rd.D(), rn.D(), rm.D());
10633    }
10634  }
10635  void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); }
10636  void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10637    VIXL_ASSERT(rd.IsS() || rd.IsD());
10638    VIXL_ASSERT(rd.GetType() == rn.GetType());
10639    VIXL_ASSERT(rd.GetType() == rm.GetType());
10640    if (rd.IsS()) {
10641      Vfnma(cond, F32, rd.S(), rn.S(), rm.S());
10642    } else {
10643      Vfnma(cond, F64, rd.D(), rn.D(), rm.D());
10644    }
10645  }
10646  void Vfnma(VRegister rd, VRegister rn, VRegister rm) {
10647    Vfnma(al, rd, rn, rm);
10648  }
10649  void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10650    VIXL_ASSERT(rd.IsS() || rd.IsD());
10651    VIXL_ASSERT(rd.GetType() == rn.GetType());
10652    VIXL_ASSERT(rd.GetType() == rm.GetType());
10653    if (rd.IsS()) {
10654      Vfnms(cond, F32, rd.S(), rn.S(), rm.S());
10655    } else {
10656      Vfnms(cond, F64, rd.D(), rn.D(), rm.D());
10657    }
10658  }
10659  void Vfnms(VRegister rd, VRegister rn, VRegister rm) {
10660    Vfnms(al, rd, rn, rm);
10661  }
10662  void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) {
10663    VIXL_ASSERT(rd.IsS() || rd.IsD());
10664    VIXL_ASSERT(rd.GetType() == rn.GetType());
10665    VIXL_ASSERT(rd.GetType() == rm.GetType());
10666    if (rd.IsS()) {
10667      Vmaxnm(F32, rd.S(), rn.S(), rm.S());
10668    } else {
10669      Vmaxnm(F64, rd.D(), rn.D(), rm.D());
10670    }
10671  }
10672  void Vminnm(VRegister rd, VRegister rn, VRegister rm) {
10673    VIXL_ASSERT(rd.IsS() || rd.IsD());
10674    VIXL_ASSERT(rd.GetType() == rn.GetType());
10675    VIXL_ASSERT(rd.GetType() == rm.GetType());
10676    if (rd.IsS()) {
10677      Vminnm(F32, rd.S(), rn.S(), rm.S());
10678    } else {
10679      Vminnm(F64, rd.D(), rn.D(), rm.D());
10680    }
10681  }
10682  void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10683    VIXL_ASSERT(rd.IsS() || rd.IsD());
10684    VIXL_ASSERT(rd.GetType() == rn.GetType());
10685    VIXL_ASSERT(rd.GetType() == rm.GetType());
10686    if (rd.IsS()) {
10687      Vmla(cond, F32, rd.S(), rn.S(), rm.S());
10688    } else {
10689      Vmla(cond, F64, rd.D(), rn.D(), rm.D());
10690    }
10691  }
10692  void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); }
10693  void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10694    VIXL_ASSERT(rd.IsS() || rd.IsD());
10695    VIXL_ASSERT(rd.GetType() == rn.GetType());
10696    VIXL_ASSERT(rd.GetType() == rm.GetType());
10697    if (rd.IsS()) {
10698      Vmls(cond, F32, rd.S(), rn.S(), rm.S());
10699    } else {
10700      Vmls(cond, F64, rd.D(), rn.D(), rm.D());
10701    }
10702  }
10703  void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); }
10704  void Vmov(Condition cond, VRegister rd, VRegister rm) {
10705    VIXL_ASSERT(rd.IsS() || rd.IsD());
10706    VIXL_ASSERT(rd.GetType() == rm.GetType());
10707    if (rd.IsS()) {
10708      Vmov(cond, F32, rd.S(), rm.S());
10709    } else {
10710      Vmov(cond, F64, rd.D(), rm.D());
10711    }
10712  }
10713  void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); }
10714  void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10715    VIXL_ASSERT(rd.IsS() || rd.IsD());
10716    VIXL_ASSERT(rd.GetType() == rn.GetType());
10717    VIXL_ASSERT(rd.GetType() == rm.GetType());
10718    if (rd.IsS()) {
10719      Vmul(cond, F32, rd.S(), rn.S(), rm.S());
10720    } else {
10721      Vmul(cond, F64, rd.D(), rn.D(), rm.D());
10722    }
10723  }
10724  void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); }
10725  void Vneg(Condition cond, VRegister rd, VRegister rm) {
10726    VIXL_ASSERT(rd.IsS() || rd.IsD());
10727    VIXL_ASSERT(rd.GetType() == rm.GetType());
10728    if (rd.IsS()) {
10729      Vneg(cond, F32, rd.S(), rm.S());
10730    } else {
10731      Vneg(cond, F64, rd.D(), rm.D());
10732    }
10733  }
10734  void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); }
10735  void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10736    VIXL_ASSERT(rd.IsS() || rd.IsD());
10737    VIXL_ASSERT(rd.GetType() == rn.GetType());
10738    VIXL_ASSERT(rd.GetType() == rm.GetType());
10739    if (rd.IsS()) {
10740      Vnmla(cond, F32, rd.S(), rn.S(), rm.S());
10741    } else {
10742      Vnmla(cond, F64, rd.D(), rn.D(), rm.D());
10743    }
10744  }
10745  void Vnmla(VRegister rd, VRegister rn, VRegister rm) {
10746    Vnmla(al, rd, rn, rm);
10747  }
10748  void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10749    VIXL_ASSERT(rd.IsS() || rd.IsD());
10750    VIXL_ASSERT(rd.GetType() == rn.GetType());
10751    VIXL_ASSERT(rd.GetType() == rm.GetType());
10752    if (rd.IsS()) {
10753      Vnmls(cond, F32, rd.S(), rn.S(), rm.S());
10754    } else {
10755      Vnmls(cond, F64, rd.D(), rn.D(), rm.D());
10756    }
10757  }
10758  void Vnmls(VRegister rd, VRegister rn, VRegister rm) {
10759    Vnmls(al, rd, rn, rm);
10760  }
10761  void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10762    VIXL_ASSERT(rd.IsS() || rd.IsD());
10763    VIXL_ASSERT(rd.GetType() == rn.GetType());
10764    VIXL_ASSERT(rd.GetType() == rm.GetType());
10765    if (rd.IsS()) {
10766      Vnmul(cond, F32, rd.S(), rn.S(), rm.S());
10767    } else {
10768      Vnmul(cond, F64, rd.D(), rn.D(), rm.D());
10769    }
10770  }
10771  void Vnmul(VRegister rd, VRegister rn, VRegister rm) {
10772    Vnmul(al, rd, rn, rm);
10773  }
10774  void Vseleq(VRegister rd, VRegister rn, VRegister rm) {
10775    VIXL_ASSERT(rd.IsS() || rd.IsD());
10776    VIXL_ASSERT(rd.GetType() == rn.GetType());
10777    VIXL_ASSERT(rd.GetType() == rm.GetType());
10778    if (rd.IsS()) {
10779      Vseleq(F32, rd.S(), rn.S(), rm.S());
10780    } else {
10781      Vseleq(F64, rd.D(), rn.D(), rm.D());
10782    }
10783  }
10784  void Vselge(VRegister rd, VRegister rn, VRegister rm) {
10785    VIXL_ASSERT(rd.IsS() || rd.IsD());
10786    VIXL_ASSERT(rd.GetType() == rn.GetType());
10787    VIXL_ASSERT(rd.GetType() == rm.GetType());
10788    if (rd.IsS()) {
10789      Vselge(F32, rd.S(), rn.S(), rm.S());
10790    } else {
10791      Vselge(F64, rd.D(), rn.D(), rm.D());
10792    }
10793  }
10794  void Vselgt(VRegister rd, VRegister rn, VRegister rm) {
10795    VIXL_ASSERT(rd.IsS() || rd.IsD());
10796    VIXL_ASSERT(rd.GetType() == rn.GetType());
10797    VIXL_ASSERT(rd.GetType() == rm.GetType());
10798    if (rd.IsS()) {
10799      Vselgt(F32, rd.S(), rn.S(), rm.S());
10800    } else {
10801      Vselgt(F64, rd.D(), rn.D(), rm.D());
10802    }
10803  }
10804  void Vselvs(VRegister rd, VRegister rn, VRegister rm) {
10805    VIXL_ASSERT(rd.IsS() || rd.IsD());
10806    VIXL_ASSERT(rd.GetType() == rn.GetType());
10807    VIXL_ASSERT(rd.GetType() == rm.GetType());
10808    if (rd.IsS()) {
10809      Vselvs(F32, rd.S(), rn.S(), rm.S());
10810    } else {
10811      Vselvs(F64, rd.D(), rn.D(), rm.D());
10812    }
10813  }
10814  void Vsqrt(Condition cond, VRegister rd, VRegister rm) {
10815    VIXL_ASSERT(rd.IsS() || rd.IsD());
10816    VIXL_ASSERT(rd.GetType() == rm.GetType());
10817    if (rd.IsS()) {
10818      Vsqrt(cond, F32, rd.S(), rm.S());
10819    } else {
10820      Vsqrt(cond, F64, rd.D(), rm.D());
10821    }
10822  }
10823  void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); }
10824  void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10825    VIXL_ASSERT(rd.IsS() || rd.IsD());
10826    VIXL_ASSERT(rd.GetType() == rn.GetType());
10827    VIXL_ASSERT(rd.GetType() == rm.GetType());
10828    if (rd.IsS()) {
10829      Vsub(cond, F32, rd.S(), rn.S(), rm.S());
10830    } else {
10831      Vsub(cond, F64, rd.D(), rn.D(), rm.D());
10832    }
10833  }
10834  void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); }
10835  // End of generated code.
10836
10837  virtual bool AllowUnpredictable() VIXL_OVERRIDE {
10838    VIXL_ABORT_WITH_MSG("Unpredictable instruction.\n");
10839    return false;
10840  }
10841  virtual bool AllowStronglyDiscouraged() VIXL_OVERRIDE {
10842    VIXL_ABORT_WITH_MSG(
10843        "ARM strongly recommends to not use this instruction.\n");
10844    return false;
10845  }
10846
10847 private:
10848  RegisterList available_;
10849  VRegisterList available_vfp_;
10850  MacroAssemblerContext context_;
10851  Label::Offset checkpoint_;
10852  LiteralPoolManager literal_pool_manager_;
10853  VeneerPoolManager veneer_pool_manager_;
10854  bool generate_simulator_code_;
10855  bool allow_macro_instructions_;
10856  bool doing_veneer_pool_generation_;
10857};
10858
10859// This scope utility allows scratch registers to be managed safely. The
10860// MacroAssembler's GetScratchRegisterList() is used as a pool of scratch
10861// registers. These registers can be allocated on demand, and will be returned
10862// at the end of the scope.
10863//
10864// When the scope ends, the MacroAssembler's lists will be restored to their
10865// original state, even if the lists were modified by some other means.
10866class UseScratchRegisterScope {
10867 public:
10868  // This constructor implicitly calls the `Open` function to initialise the
10869  // scope, so it is ready to use immediately after it has been constructed.
10870  explicit UseScratchRegisterScope(MacroAssembler* masm)
10871      : available_(NULL),
10872        available_vfp_(NULL),
10873        old_available_(0),
10874        old_available_vfp_(0) {
10875    Open(masm);
10876  }
10877  // This constructor allows deferred and optional initialisation of the scope.
10878  // The user is required to explicitly call the `Open` function before using
10879  // the scope.
10880  UseScratchRegisterScope()
10881      : available_(NULL),
10882        available_vfp_(NULL),
10883        old_available_(0),
10884        old_available_vfp_(0) {}
10885
10886  // This function performs the actual initialisation work.
10887  void Open(MacroAssembler* masm);
10888
10889  // The destructor always implicitly calls the `Close` function.
10890  ~UseScratchRegisterScope() { Close(); }
10891
10892  // This function performs the cleaning-up work. It must succeed even if the
10893  // scope has not been opened. It is safe to call multiple times.
10894  void Close();
10895
10896  bool IsAvailable(const Register& reg) const;
10897  bool IsAvailable(const VRegister& reg) const;
10898
10899  // Take a register from the temp list. It will be returned automatically when
10900  // the scope ends.
10901  Register Acquire();
10902  VRegister AcquireV(unsigned size_in_bits);
10903  QRegister AcquireQ();
10904  DRegister AcquireD();
10905  SRegister AcquireS();
10906
10907  // Explicitly release an acquired (or excluded) register, putting it back in
10908  // the temp list.
10909  void Release(const Register& reg);
10910  void Release(const VRegister& reg);
10911
10912  // Make the specified registers available as scratch registers for the
10913  // duration of this scope.
10914  void Include(const RegisterList& list);
10915  void Include(const Register& reg1,
10916               const Register& reg2 = NoReg,
10917               const Register& reg3 = NoReg,
10918               const Register& reg4 = NoReg) {
10919    Include(RegisterList(reg1, reg2, reg3, reg4));
10920  }
10921  void Include(const VRegisterList& list);
10922  void Include(const VRegister& reg1,
10923               const VRegister& reg2 = NoVReg,
10924               const VRegister& reg3 = NoVReg,
10925               const VRegister& reg4 = NoVReg) {
10926    Include(VRegisterList(reg1, reg2, reg3, reg4));
10927  }
10928
10929  // Make sure that the specified registers are not available in this scope.
10930  // This can be used to prevent helper functions from using sensitive
10931  // registers, for example.
10932  void Exclude(const RegisterList& list);
10933  void Exclude(const Register& reg1,
10934               const Register& reg2 = NoReg,
10935               const Register& reg3 = NoReg,
10936               const Register& reg4 = NoReg) {
10937    Exclude(RegisterList(reg1, reg2, reg3, reg4));
10938  }
10939  void Exclude(const VRegisterList& list);
10940  void Exclude(const VRegister& reg1,
10941               const VRegister& reg2 = NoVReg,
10942               const VRegister& reg3 = NoVReg,
10943               const VRegister& reg4 = NoVReg) {
10944    Exclude(VRegisterList(reg1, reg2, reg3, reg4));
10945  }
10946
10947  // A convenience helper to exclude any registers used by the operand.
10948  void Exclude(const Operand& operand);
10949
10950  // Prevent any scratch registers from being used in this scope.
10951  void ExcludeAll();
10952
10953 private:
10954  // Available scratch registers.
10955  RegisterList* available_;       // kRRegister
10956  VRegisterList* available_vfp_;  // kVRegister
10957
10958  // The state of the available lists at the start of this scope.
10959  uint32_t old_available_;      // kRRegister
10960  uint64_t old_available_vfp_;  // kVRegister
10961
10962  VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) {
10963    VIXL_UNREACHABLE();
10964  }
10965  VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) {
10966    VIXL_UNREACHABLE();
10967  }
10968};
10969
10970class JumpTableBase {
10971 protected:
10972  JumpTableBase(int len, int offset_size)
10973      : table_location_(Label::kMaxOffset),
10974        branch_location_(Label::kMaxOffset),
10975        length_(len),
10976        offset_shift_(WhichPowerOf2(offset_size)),
10977        presence_(length_) {
10978    VIXL_ASSERT((length_ >= 0) && (offset_size <= 4));
10979  }
10980  virtual ~JumpTableBase() {}
10981
10982 public:
10983  int GetTableSizeInBytes() const { return length_ * (1 << offset_shift_); }
10984  int GetOffsetShift() const { return offset_shift_; }
10985  int GetLength() const { return length_; }
10986  Label* GetDefaultLabel() { return &default_; }
10987  Label* GetEndLabel() { return &end_; }
10988  void SetBranchLocation(uint32_t branch_location) {
10989    branch_location_ = branch_location;
10990  }
10991  uint32_t GetBranchLocation() const { return branch_location_; }
10992  void BindTable(uint32_t location) { table_location_ = location; }
10993  virtual void Link(MacroAssembler* masm,
10994                    int case_index,
10995                    uint32_t location) = 0;
10996
10997  uint32_t GetLocationForCase(int i) {
10998    VIXL_ASSERT((i >= 0) && (i < length_));
10999    return table_location_ + (i * (1 << offset_shift_));
11000  }
11001  void SetPresenceBitForCase(int i) {
11002    VIXL_ASSERT((i >= 0) && (i < length_));
11003    presence_.Set(i);
11004  }
11005
11006  void Finalize(MacroAssembler* masm) {
11007    if (!default_.IsBound()) {
11008      masm->Bind(&default_);
11009    }
11010    masm->Bind(&end_);
11011
11012    presence_.ForEachBitNotSet(LinkIt(this, masm, default_.GetLocation()));
11013  }
11014
11015 private:
11016  uint32_t table_location_;
11017  uint32_t branch_location_;
11018  const int length_;
11019  const int offset_shift_;
11020  BitField presence_;
11021  Label default_;
11022  Label end_;
11023  struct LinkIt {
11024    JumpTableBase* table_;
11025    MacroAssembler* const masm_;
11026    const uint32_t location_;
11027    LinkIt(JumpTableBase* table, MacroAssembler* const masm, uint32_t location)
11028        : table_(table), masm_(masm), location_(location) {}
11029    bool execute(int id) const {
11030      VIXL_ASSERT(id < table_->GetLength());
11031      table_->Link(masm_, static_cast<int>(id), location_);
11032      return true;
11033    }
11034  };
11035};
11036
11037// JumpTable<T>(len): Helper to describe a jump table
11038// len here describes the number of possible case. Values in [0, n[ can have a
11039// jump offset. Any other value will assert.
11040template <typename T>
11041class JumpTable : public JumpTableBase {
11042 protected:
11043  explicit JumpTable(int length) : JumpTableBase(length, sizeof(T)) {}
11044
11045 public:
11046  virtual void Link(MacroAssembler* masm,
11047                    int case_index,
11048                    uint32_t location) VIXL_OVERRIDE {
11049    uint32_t position_in_table = GetLocationForCase(case_index);
11050    uint32_t from = GetBranchLocation();
11051    int offset = location - from;
11052    T* case_offset = masm->GetBuffer()->GetOffsetAddress<T*>(position_in_table);
11053    if (masm->IsUsingT32()) {
11054      *case_offset = offset >> 1;
11055    } else {
11056      *case_offset = offset >> 2;
11057    }
11058  }
11059};
11060
11061class JumpTable8bitOffset : public JumpTable<uint8_t> {
11062 public:
11063  explicit JumpTable8bitOffset(int length) : JumpTable<uint8_t>(length) {}
11064};
11065
11066class JumpTable16bitOffset : public JumpTable<uint16_t> {
11067 public:
11068  explicit JumpTable16bitOffset(int length) : JumpTable<uint16_t>(length) {}
11069};
11070
11071class JumpTable32bitOffset : public JumpTable<uint32_t> {
11072 public:
11073  explicit JumpTable32bitOffset(int length) : JumpTable<uint32_t>(length) {}
11074};
11075
11076}  // namespace aarch32
11077}  // namespace vixl
11078
11079#endif  // VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
11080