1;//
2;// Copyright (C) 2007-2008 ARM Limited
3;//
4;// Licensed under the Apache License, Version 2.0 (the "License");
5;// you may not use this file except in compliance with the License.
6;// You may obtain a copy of the License at
7;//
8;//      http://www.apache.org/licenses/LICENSE-2.0
9;//
10;// Unless required by applicable law or agreed to in writing, software
11;// distributed under the License is distributed on an "AS IS" BASIS,
12;// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13;// See the License for the specific language governing permissions and
14;// limitations under the License.
15;//
16;//
17;//
18;// File Name:  armVCM4P10_InterpolateLuma_Copy_unsafe_s.s
19;// OpenMAX DL: v1.0.2
20;// Revision:   9641
21;// Date:       Thursday, February 7, 2008
22;//
23;//
24;//
25;//
26
27;// Function:
28;//     armVCM4P10_InterpolateLuma_Copy4x4_unsafe
29;//
30;// Implements copy from an arbitrary aligned source memory location (pSrc) to an aligned
31;// destination pointed by (pDst)
32;//
33;// Registers preserved for top level function
34;// r1,r3,r4,r5,r6,r7,r10,r11,r14
35;//
36;// Registers modified by the function
37;// r0,r2,r8,r9,r12
38
39        INCLUDE omxtypes_s.h
40        INCLUDE armCOMM_s.h
41
42        M_VARIANTS ARM1136JS
43
44        EXPORT armVCM4P10_InterpolateLuma_Copy4x4_unsafe
45
46;// Declare input registers
47pSrc            RN 0
48srcStep         RN 1
49pDst            RN 2
50dstStep         RN 3
51
52;// Declare other intermediate registers
53x0              RN 4
54x1              RN 5
55x2              RN 8
56x3              RN 9
57Temp            RN 12
58
59    IF ARM1136JS
60
61        M_START armVCM4P10_InterpolateLuma_Copy4x4_unsafe, r6
62
63Copy4x4Start
64        ;// Do Copy and branch to EndOfInterpolation
65        AND     Temp, pSrc, #3
66        BIC     pSrc, pSrc, #3
67
68        M_SWITCH Temp
69        M_CASE  Copy4x4Align0
70        M_CASE  Copy4x4Align1
71        M_CASE  Copy4x4Align2
72        M_CASE  Copy4x4Align3
73        M_ENDSWITCH
74
75Copy4x4Align0
76        M_LDR   x0, [pSrc], srcStep
77        M_LDR   x1, [pSrc], srcStep
78        M_STR   x0, [pDst], dstStep
79        M_LDR   x2, [pSrc], srcStep
80        M_STR   x1, [pDst], dstStep
81        M_LDR   x3, [pSrc], srcStep
82        M_STR   x2, [pDst], dstStep
83        M_STR   x3, [pDst], dstStep
84        B       Copy4x4End
85
86Copy4x4Align1
87        LDR     x1, [pSrc, #4]
88        M_LDR   x0, [pSrc], srcStep
89        LDR     x3, [pSrc, #4]
90        M_LDR   x2, [pSrc], srcStep
91        MOV     x0, x0, LSR #8
92        ORR     x0, x0, x1, LSL #24
93        M_STR   x0, [pDst], dstStep
94        MOV     x2, x2, LSR #8
95        ORR     x2, x2, x3, LSL #24
96        LDR     x1, [pSrc, #4]
97        M_LDR   x0, [pSrc], srcStep
98        M_STR   x2, [pDst], dstStep
99        LDR     x3, [pSrc, #4]
100        M_LDR   x2, [pSrc], srcStep
101        MOV     x0, x0, LSR #8
102        ORR     x0, x0, x1, LSL #24
103        M_STR   x0, [pDst], dstStep
104        MOV     x2, x2, LSR #8
105        ORR     x2, x2, x3, LSL #24
106        M_STR   x2, [pDst], dstStep
107        B       Copy4x4End
108
109Copy4x4Align2
110        LDR     x1, [pSrc, #4]
111        M_LDR   x0, [pSrc], srcStep
112        LDR     x3, [pSrc, #4]
113        M_LDR   x2, [pSrc], srcStep
114        MOV     x0, x0, LSR #16
115        ORR     x0, x0, x1, LSL #16
116        M_STR   x0, [pDst], dstStep
117        MOV     x2, x2, LSR #16
118        ORR     x2, x2, x3, LSL #16
119        M_STR   x2, [pDst], dstStep
120
121        LDR     x1, [pSrc, #4]
122        M_LDR   x0, [pSrc], srcStep
123        LDR     x3, [pSrc, #4]
124        M_LDR   x2, [pSrc], srcStep
125        MOV     x0, x0, LSR #16
126        ORR     x0, x0, x1, LSL #16
127        M_STR   x0, [pDst], dstStep
128        MOV     x2, x2, LSR #16
129        ORR     x2, x2, x3, LSL #16
130        M_STR   x2, [pDst], dstStep
131        B       Copy4x4End
132
133Copy4x4Align3
134        LDR     x1, [pSrc, #4]
135        M_LDR   x0, [pSrc], srcStep
136        LDR     x3, [pSrc, #4]
137        M_LDR   x2, [pSrc], srcStep
138        MOV     x0, x0, LSR #24
139        ORR     x0, x0, x1, LSL #8
140        M_STR   x0, [pDst], dstStep
141        MOV     x2, x2, LSR #24
142        ORR     x2, x2, x3, LSL #8
143        M_STR   x2, [pDst], dstStep
144
145        LDR     x1, [pSrc, #4]
146        M_LDR   x0, [pSrc], srcStep
147        LDR     x3, [pSrc, #4]
148        M_LDR   x2, [pSrc], srcStep
149        MOV     x0, x0, LSR #24
150        ORR     x0, x0, x1, LSL #8
151        M_STR   x0, [pDst], dstStep
152        MOV     x2, x2, LSR #24
153        ORR     x2, x2, x3, LSL #8
154        M_STR   x2, [pDst], dstStep
155        B       Copy4x4End
156
157Copy4x4End
158        M_END
159
160    ENDIF
161
162    END
163
164