10c1bc742181ded4930842b46e9507372f0b1b963James Dong;// 278e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// Copyright (C) 2007-2008 ARM Limited 378e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// 478e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// Licensed under the Apache License, Version 2.0 (the "License"); 578e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// you may not use this file except in compliance with the License. 678e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// You may obtain a copy of the License at 778e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// 878e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// http://www.apache.org/licenses/LICENSE-2.0 978e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// 1078e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// Unless required by applicable law or agreed to in writing, software 1178e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// distributed under the License is distributed on an "AS IS" BASIS, 1278e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 1378e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// See the License for the specific language governing permissions and 1478e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// limitations under the License. 1578e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// 1678e52bfac041d71ce53b5b13c2abf78af742b09dLajos Molnar;// 170c1bc742181ded4930842b46e9507372f0b1b963James Dong;// 180c1bc742181ded4930842b46e9507372f0b1b963James Dong;// File Name: omxVCM4P10_TransformDequantChromaDCFromPair_s.s 190c1bc742181ded4930842b46e9507372f0b1b963James Dong;// OpenMAX DL: v1.0.2 200c1bc742181ded4930842b46e9507372f0b1b963James Dong;// Revision: 9641 210c1bc742181ded4930842b46e9507372f0b1b963James Dong;// Date: Thursday, February 7, 2008 220c1bc742181ded4930842b46e9507372f0b1b963James Dong;// 230c1bc742181ded4930842b46e9507372f0b1b963James Dong;// 240c1bc742181ded4930842b46e9507372f0b1b963James Dong;// 250c1bc742181ded4930842b46e9507372f0b1b963James Dong;// 260c1bc742181ded4930842b46e9507372f0b1b963James Dong 270c1bc742181ded4930842b46e9507372f0b1b963James Dong 280c1bc742181ded4930842b46e9507372f0b1b963James Dong INCLUDE omxtypes_s.h 290c1bc742181ded4930842b46e9507372f0b1b963James Dong INCLUDE armCOMM_s.h 300c1bc742181ded4930842b46e9507372f0b1b963James Dong 310c1bc742181ded4930842b46e9507372f0b1b963James Dong IMPORT armVCM4P10_QPDivTable 320c1bc742181ded4930842b46e9507372f0b1b963James Dong IMPORT armVCM4P10_VMatrixQPModTable 330c1bc742181ded4930842b46e9507372f0b1b963James Dong 340c1bc742181ded4930842b46e9507372f0b1b963James Dong M_VARIANTS ARM1136JS 350c1bc742181ded4930842b46e9507372f0b1b963James Dong 360c1bc742181ded4930842b46e9507372f0b1b963James Dong 370c1bc742181ded4930842b46e9507372f0b1b963James Dong IF ARM1136JS 380c1bc742181ded4930842b46e9507372f0b1b963James Dong 390c1bc742181ded4930842b46e9507372f0b1b963James Dong;//-------------------------------------- 400c1bc742181ded4930842b46e9507372f0b1b963James Dong;// Declare input registers 410c1bc742181ded4930842b46e9507372f0b1b963James Dong;//-------------------------------------- 420c1bc742181ded4930842b46e9507372f0b1b963James DongppSrc RN 0 430c1bc742181ded4930842b46e9507372f0b1b963James DongpDst RN 1 440c1bc742181ded4930842b46e9507372f0b1b963James DongQP RN 2 450c1bc742181ded4930842b46e9507372f0b1b963James Dong 460c1bc742181ded4930842b46e9507372f0b1b963James Dong;//-------------------------------- 470c1bc742181ded4930842b46e9507372f0b1b963James Dong;// Scratch variable for Unpack2x2 480c1bc742181ded4930842b46e9507372f0b1b963James Dong;//-------------------------------- 490c1bc742181ded4930842b46e9507372f0b1b963James DongpSrc RN 9 500c1bc742181ded4930842b46e9507372f0b1b963James DongValue RN 4 510c1bc742181ded4930842b46e9507372f0b1b963James DongValue2 RN 5 520c1bc742181ded4930842b46e9507372f0b1b963James DongFlag RN 6 530c1bc742181ded4930842b46e9507372f0b1b963James DongstrOffset RN 7 540c1bc742181ded4930842b46e9507372f0b1b963James DongcstOffset RN 8 550c1bc742181ded4930842b46e9507372f0b1b963James Dong 560c1bc742181ded4930842b46e9507372f0b1b963James Dong;//-------------------------------- 570c1bc742181ded4930842b46e9507372f0b1b963James Dong;// Scratch variable 580c1bc742181ded4930842b46e9507372f0b1b963James Dong;//-------------------------------- 590c1bc742181ded4930842b46e9507372f0b1b963James Dongr0w0 RN 3 600c1bc742181ded4930842b46e9507372f0b1b963James Dongr0w1 RN 4 610c1bc742181ded4930842b46e9507372f0b1b963James Dong 620c1bc742181ded4930842b46e9507372f0b1b963James Dongc0w0 RN 5 630c1bc742181ded4930842b46e9507372f0b1b963James Dongc1w0 RN 6 640c1bc742181ded4930842b46e9507372f0b1b963James Dong 650c1bc742181ded4930842b46e9507372f0b1b963James Dongreturn RN 0 660c1bc742181ded4930842b46e9507372f0b1b963James DongpQPDivTable RN 5 670c1bc742181ded4930842b46e9507372f0b1b963James DongpQPModTable RN 6 680c1bc742181ded4930842b46e9507372f0b1b963James DongShift RN 9 690c1bc742181ded4930842b46e9507372f0b1b963James DongScale RN 2 700c1bc742181ded4930842b46e9507372f0b1b963James Dong 710c1bc742181ded4930842b46e9507372f0b1b963James DongTemp1 RN 3 720c1bc742181ded4930842b46e9507372f0b1b963James DongTemp2 RN 4 730c1bc742181ded4930842b46e9507372f0b1b963James DongTemp3 RN 7 740c1bc742181ded4930842b46e9507372f0b1b963James DongTemp4 RN 8 750c1bc742181ded4930842b46e9507372f0b1b963James Dong 760c1bc742181ded4930842b46e9507372f0b1b963James Dong ;// Write function header 770c1bc742181ded4930842b46e9507372f0b1b963James Dong M_START omxVCM4P10_TransformDequantChromaDCFromPair, r9 780c1bc742181ded4930842b46e9507372f0b1b963James Dong 790c1bc742181ded4930842b46e9507372f0b1b963James Dong 800c1bc742181ded4930842b46e9507372f0b1b963James Dong LDR pSrc, [ppSrc] ;// Load pSrc 810c1bc742181ded4930842b46e9507372f0b1b963James Dong MOV cstOffset, #31 ;// To be used in the loop, to compute offset 820c1bc742181ded4930842b46e9507372f0b1b963James Dong 830c1bc742181ded4930842b46e9507372f0b1b963James Dong ;//----------------------------------------------------------------------- 840c1bc742181ded4930842b46e9507372f0b1b963James Dong ;// Firstly, fill all the coefficient values on the <pDst> buffer by zero 850c1bc742181ded4930842b46e9507372f0b1b963James Dong ;//----------------------------------------------------------------------- 860c1bc742181ded4930842b46e9507372f0b1b963James Dong 870c1bc742181ded4930842b46e9507372f0b1b963James Dong MOV Value, #0 ;// Initialize the zero value 880c1bc742181ded4930842b46e9507372f0b1b963James Dong MOV Value2, #0 ;// Initialize the zero value 890c1bc742181ded4930842b46e9507372f0b1b963James Dong LDRB Flag, [pSrc], #1 ;// Preload <Flag> before <unpackLoop> 900c1bc742181ded4930842b46e9507372f0b1b963James Dong STRD Value, [pDst, #0] ;// pDst[0] = pDst[1] = pDst[2] = pDst[3] = 0 910c1bc742181ded4930842b46e9507372f0b1b963James Dong 920c1bc742181ded4930842b46e9507372f0b1b963James Dong 930c1bc742181ded4930842b46e9507372f0b1b963James DongunpackLoop 940c1bc742181ded4930842b46e9507372f0b1b963James Dong TST Flag, #0x10 ;// Computing (Flag & 0x10) 950c1bc742181ded4930842b46e9507372f0b1b963James Dong LDRSBNE Value2,[pSrc,#1] 960c1bc742181ded4930842b46e9507372f0b1b963James Dong LDRBNE Value, [pSrc], #2 ;// Load byte wise to avoid unaligned access 970c1bc742181ded4930842b46e9507372f0b1b963James Dong AND strOffset, cstOffset, Flag, LSL #1 ;// strOffset = (Flag & 15) < 1; 980c1bc742181ded4930842b46e9507372f0b1b963James Dong LDRSBEQ Value, [pSrc], #1 ;// Value = (OMX_U8) *pSrc++ 990c1bc742181ded4930842b46e9507372f0b1b963James Dong ORRNE Value,Value,Value2, LSL #8 ;// Value = (OMX_U16) *pSrc++ 1000c1bc742181ded4930842b46e9507372f0b1b963James Dong 1010c1bc742181ded4930842b46e9507372f0b1b963James Dong TST Flag, #0x20 ;// Computing (Flag & 0x20) to check, if we're done 1020c1bc742181ded4930842b46e9507372f0b1b963James Dong LDRBEQ Flag, [pSrc], #1 ;// Flag = (OMX_U8) *pSrc++, for next iteration 1030c1bc742181ded4930842b46e9507372f0b1b963James Dong STRH Value, [pDst, strOffset] ;// Store <Value> at offset <strOffset> 1040c1bc742181ded4930842b46e9507372f0b1b963James Dong BEQ unpackLoop ;// Branch to the loop beginning 1050c1bc742181ded4930842b46e9507372f0b1b963James Dong 1060c1bc742181ded4930842b46e9507372f0b1b963James Dong LDMIA pDst, {r0w0, r0w1} ;// r0w0 = |c1|c0| & r0w1 = |c3|c2| 1070c1bc742181ded4930842b46e9507372f0b1b963James Dong 1080c1bc742181ded4930842b46e9507372f0b1b963James Dong 1090c1bc742181ded4930842b46e9507372f0b1b963James Dong STR pSrc, [ppSrc] ;// Update the bitstream pointer 1100c1bc742181ded4930842b46e9507372f0b1b963James Dong 1110c1bc742181ded4930842b46e9507372f0b1b963James Dong LDR pQPDivTable, =armVCM4P10_QPDivTable ;// QP Division look-up-table base pointer 1120c1bc742181ded4930842b46e9507372f0b1b963James Dong LDR pQPModTable, =armVCM4P10_VMatrixQPModTable ;// QP Modulo look-up-table base pointer 1130c1bc742181ded4930842b46e9507372f0b1b963James Dong 1140c1bc742181ded4930842b46e9507372f0b1b963James Dong SADDSUBX r0w0, r0w0, r0w0 ;// [ c00+c01, c00-c01 ] 1150c1bc742181ded4930842b46e9507372f0b1b963James Dong SADDSUBX r0w1, r0w1, r0w1 ;// [ c10+c11, c10-c11 ] 1160c1bc742181ded4930842b46e9507372f0b1b963James Dong 1170c1bc742181ded4930842b46e9507372f0b1b963James Dong LDRSB Shift, [pQPDivTable, QP] ;// Shift = pQPDivTable[QP] 1180c1bc742181ded4930842b46e9507372f0b1b963James Dong LDRSB Scale, [pQPModTable, QP] ;// Scale = pQPModTable[QP] 1190c1bc742181ded4930842b46e9507372f0b1b963James Dong 1200c1bc742181ded4930842b46e9507372f0b1b963James Dong SADD16 c0w0, r0w0, r0w1 ;// [ d00+d10, d01+d11 ] 1210c1bc742181ded4930842b46e9507372f0b1b963James Dong SSUB16 c1w0, r0w0, r0w1 ;// [ d00-d10, d01-d11 ] 1220c1bc742181ded4930842b46e9507372f0b1b963James Dong 1230c1bc742181ded4930842b46e9507372f0b1b963James Dong LSL Scale, Scale, Shift ;// Scale = Scale << Shift 1240c1bc742181ded4930842b46e9507372f0b1b963James Dong 1250c1bc742181ded4930842b46e9507372f0b1b963James Dong SMULTB Temp2, c0w0, Scale ;// Temp2 = T(c0w0) * Scale 1260c1bc742181ded4930842b46e9507372f0b1b963James Dong SMULTB Temp4, c1w0, Scale ;// Temp4 = T(c1w0) * Scale 1270c1bc742181ded4930842b46e9507372f0b1b963James Dong SMULBB Temp1, c0w0, Scale ;// Temp1 = B(c0w0) * Scale 1280c1bc742181ded4930842b46e9507372f0b1b963James Dong SMULBB Temp3, c1w0, Scale ;// Temp3 = B(c1w0) * Scale 1290c1bc742181ded4930842b46e9507372f0b1b963James Dong MOV Temp2, Temp2, ASR #1 ;// Temp2 = Temp2 >> 1 & Temp1 = (Temp1 >> 1) << 16 1300c1bc742181ded4930842b46e9507372f0b1b963James Dong MOV Temp4, Temp4, ASR #1 ;// Temp4 = Temp4 >> 1 & Temp3 = (Temp3 >> 1) << 16 1310c1bc742181ded4930842b46e9507372f0b1b963James Dong PKHBT c0w0, Temp2, Temp1, LSL #15 ;// c0w0 = | Temp1 | Temp2 | 1320c1bc742181ded4930842b46e9507372f0b1b963James Dong PKHBT c1w0, Temp4, Temp3, LSL #15 ;// c1w0 = | Temp3 | Temp4 | 1330c1bc742181ded4930842b46e9507372f0b1b963James Dong STMIA pDst, {c0w0, c1w0} ;// Storing all the coefficients at once 1340c1bc742181ded4930842b46e9507372f0b1b963James Dong MOV return, #OMX_Sts_NoErr 1350c1bc742181ded4930842b46e9507372f0b1b963James Dong M_END 1360c1bc742181ded4930842b46e9507372f0b1b963James Dong 1370c1bc742181ded4930842b46e9507372f0b1b963James Dong ENDIF ;// ARM1136JS 1380c1bc742181ded4930842b46e9507372f0b1b963James Dong 1390c1bc742181ded4930842b46e9507372f0b1b963James Dong 1400c1bc742181ded4930842b46e9507372f0b1b963James Dong 1410c1bc742181ded4930842b46e9507372f0b1b963James Dong 1420c1bc742181ded4930842b46e9507372f0b1b963James Dong END 143