msm_q6vdec.h revision 8611d5578ff014a1415b26e75e63aecbc4ad266c
1/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are met:
5 *     * Redistributions of source code must retain the above copyright
6 *       notice, this list of conditions and the following disclaimer.
7 *     * Redistributions in binary form must reproduce the above copyright
8 *       notice, this list of conditions and the following disclaimer in the
9 *       documentation and/or other materials provided with the distribution.
10 *     * Neither the name of Code Aurora nor
11 *       the names of its contributors may be used to endorse or promote
12 *       products derived from this software without specific prior written
13 *       permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NON-INFRINGEMENT ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
19 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 */
28
29#ifndef _MSM_VDEC_H_
30#define _MSM_VDEC_H_
31
32#include <linux/types.h>
33
34#define VDEC_IOCTL_MAGIC 'v'
35
36#define VDEC_IOCTL_INITIALIZE   _IOWR(VDEC_IOCTL_MAGIC, 1, struct vdec_init)
37#define VDEC_IOCTL_SETBUFFERS   _IOW(VDEC_IOCTL_MAGIC, 2, struct vdec_buffer)
38#define VDEC_IOCTL_QUEUE        _IOWR(VDEC_IOCTL_MAGIC, 3, \
39					struct vdec_input_buf)
40#define VDEC_IOCTL_REUSEFRAMEBUFFER  _IOW(VDEC_IOCTL_MAGIC, 4, unsigned int)
41#define VDEC_IOCTL_FLUSH        _IOW(VDEC_IOCTL_MAGIC, 5, unsigned int)
42#define VDEC_IOCTL_EOS          _IO(VDEC_IOCTL_MAGIC, 6)
43#define VDEC_IOCTL_GETMSG       _IOR(VDEC_IOCTL_MAGIC, 7, struct vdec_msg)
44#define VDEC_IOCTL_CLOSE        _IO(VDEC_IOCTL_MAGIC, 8)
45#define VDEC_IOCTL_FREEBUFFERS  _IOW(VDEC_IOCTL_MAGIC, 9, struct vdec_buf_info)
46#define VDEC_IOCTL_GETDECATTRIBUTES   _IOR(VDEC_IOCTL_MAGIC, 10, \
47						struct vdec_dec_attributes)
48
49enum {
50	VDEC_FRAME_DECODE_OK,
51	VDEC_FRAME_DECODE_ERR,
52	VDEC_FATAL_ERR,
53	VDEC_FLUSH_FINISH,
54	VDEC_EOS,
55	VDEC_FRAME_FLUSH,
56	VDEC_STREAM_SWITCH,
57	VDEC_SUSPEND_FINISH,
58	VDEC_BUFFER_CONSUMED
59};
60
61enum {
62	VDEC_FLUSH_INPUT,
63	VDEC_FLUSH_OUTPUT,
64	VDEC_FLUSH_ALL
65};
66
67enum {
68	VDEC_BUFFER_TYPE_INPUT,
69	VDEC_BUFFER_TYPE_OUTPUT,
70	VDEC_BUFFER_TYPE_INTERNAL1,
71	VDEC_BUFFER_TYPE_INTERNAL2,
72};
73
74enum {
75	VDEC_QUEUE_SUCCESS,
76	VDEC_QUEUE_FAILED,
77	VDEC_QUEUE_BADSTATE,
78};
79
80struct vdec_input_buf_info {
81	u32 offset;
82	u32 data;
83	u32 size;
84	int timestamp_lo;
85	int timestamp_hi;
86	int avsync_state;
87	u32 flags;
88};
89
90struct vdec_buf_desc {
91	u32 bufsize;
92	u32 num_min_buffers;
93	u32 num_max_buffers;
94};
95
96struct vdec_buf_req {
97	u32 max_input_queue_size;
98	struct vdec_buf_desc input;
99	struct vdec_buf_desc output;
100	struct vdec_buf_desc dec_req1;
101	struct vdec_buf_desc dec_req2;
102};
103
104struct vdec_region_info {
105	u32 src_id;
106	u32 offset;
107	u32 size;
108};
109
110struct vdec_config {
111	u32 fourcc;		/* video format */
112	u32 width;		/* source width */
113	u32 height;		/* source height */
114	u32 order;		/* render decoder order */
115	u32 notify_enable;	/* enable notify input buffer done event */
116	u32 vc1_rowbase;
117	u32 h264_startcode_detect;
118	u32 h264_nal_len_size;
119	u32 postproc_flag;
120	u32 fruc_enable;
121	u32 reserved;
122};
123
124struct vdec_vc1_panscan_regions {
125	int num;
126	int width[4];
127	int height[4];
128	int xoffset[4];
129	int yoffset[4];
130};
131
132struct vdec_cropping_window {
133	u32 x1;
134	u32 y1;
135	u32 x2;
136	u32 y2;
137};
138
139struct vdec_frame_info {
140	u32 status;		/* video decode status */
141	u32 offset;		/* buffer offset */
142	u32 data1;		/* user data field 1 */
143	u32 data2;		/* user data field 2 */
144	int timestamp_lo;	/* lower 32 bits timestamp, in msec */
145	int timestamp_hi;	/* higher 32 bits timestamp, in msec */
146	int cal_timestamp_lo;	/* lower 32 bits cal timestamp, in msec */
147	int cal_timestamp_hi;	/* higher  32 bits cal timestamp, in msec */
148	u32 dec_width;		/* frame roi width */
149	u32 dec_height;		/* frame roi height */
150	struct vdec_cropping_window cwin;	/* The frame cropping window */
151	u32 picture_type[2];	/* picture coding type */
152	u32 picture_format;	/* picture coding format */
153	u32 vc1_rangeY;		/* luma range mapping */
154	u32 vc1_rangeUV;	/* chroma range mapping */
155	u32 picture_resolution;	/* scaling factor */
156	u32 frame_disp_repeat;	/* how often repeated by disp */
157	u32 repeat_first_field;	/* repeat 1st field after 2nd */
158	u32 top_field_first;	/* top field displayed first */
159	u32 interframe_interp;	/* not for inter-frame interp */
160	struct vdec_vc1_panscan_regions panscan;	/* pan region */
161	u32 concealed_macblk_num;	/* number of concealed macro blk */
162	u32 flags;		/* input flags */
163	u32 performance_stats;	/* performance statistics returned by decoder */
164	u32 data3;		/* user data field 3 */
165};
166
167struct vdec_buf_info {
168	u32 buf_type;
169	struct vdec_region_info region;
170	u32 num_buf;
171	u32 islast;
172};
173
174struct vdec_buffer {
175	u32 pmem_id;
176	struct vdec_buf_info buf;
177};
178
179struct vdec_sequence {
180	u8 *header;
181	u32 len;
182};
183
184struct vdec_config_sps {
185	struct vdec_config cfg;
186	struct vdec_sequence seq;
187};
188
189#define VDEC_MSG_REUSEINPUTBUFFER 	1
190#define VDEC_MSG_FRAMEDONE 		2
191
192struct vdec_msg {
193	u32 id;
194
195	union {
196		/* id = VDEC_MSG_REUSEINPUTBUFFER */
197		u32 buf_id;
198		/* id = VDEC_MSG_FRAMEDONE */
199		struct vdec_frame_info vfr_info;
200	};
201};
202
203struct vdec_init {
204	struct vdec_config_sps sps_cfg;
205	struct vdec_buf_req *buf_req;
206};
207
208struct vdec_input_buf {
209	u32 pmem_id;
210	struct vdec_input_buf_info buffer;
211	struct vdec_queue_status *queue_status;
212};
213
214struct vdec_queue_status {
215	u32 status;
216};
217
218struct vdec_dec_attributes {
219	u32 fourcc;
220	u32 profile;
221	u32 level;
222	u32 dec_pic_width;
223	u32 dec_pic_height;
224	struct vdec_buf_desc input;
225	struct vdec_buf_desc output;
226	struct vdec_buf_desc dec_req1;
227	struct vdec_buf_desc dec_req2;
228};
229
230#endif /* _MSM_VDEC_H_ */
231