au1xxx_psc.h revision 11cd02dfb91661c65134cac258cf5924270e9d2b
1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef _AU1000_PSC_H_ 20#define _AU1000_PSC_H_ 21#define PSC_SEL_OFFSET 0x00000000 22#define PSC_CTRL_OFFSET 0x00000004 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#define PSC_SEL_CLK_MASK (3 << 4) 25#define PSC_SEL_CLK_INTCLK (0 << 4) 26#define PSC_SEL_CLK_EXTCLK (1 << 4) 27#define PSC_SEL_CLK_SERCLK (2 << 4) 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define PSC_SEL_PS_MASK 0x00000007 30#define PSC_SEL_PS_DISABLED 0 31#define PSC_SEL_PS_SPIMODE 2 32#define PSC_SEL_PS_I2SMODE 3 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#define PSC_SEL_PS_AC97MODE 4 35#define PSC_SEL_PS_SMBUSMODE 5 36#define PSC_CTRL_DISABLE 0 37#define PSC_CTRL_SUSPEND 2 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39#define PSC_CTRL_ENABLE 3 40#define PSC_AC97CFG_OFFSET 0x00000008 41#define PSC_AC97MSK_OFFSET 0x0000000c 42#define PSC_AC97PCR_OFFSET 0x00000010 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44#define PSC_AC97STAT_OFFSET 0x00000014 45#define PSC_AC97EVNT_OFFSET 0x00000018 46#define PSC_AC97TXRX_OFFSET 0x0000001c 47#define PSC_AC97CDC_OFFSET 0x00000020 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49#define PSC_AC97RST_OFFSET 0x00000024 50#define PSC_AC97GPO_OFFSET 0x00000028 51#define PSC_AC97GPI_OFFSET 0x0000002c 52#define AC97_PSC_SEL (AC97_PSC_BASE + PSC_SEL_OFFSET) 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54#define AC97_PSC_CTRL (AC97_PSC_BASE + PSC_CTRL_OFFSET) 55#define PSC_AC97CFG (AC97_PSC_BASE + PSC_AC97CFG_OFFSET) 56#define PSC_AC97MSK (AC97_PSC_BASE + PSC_AC97MSK_OFFSET) 57#define PSC_AC97PCR (AC97_PSC_BASE + PSC_AC97PCR_OFFSET) 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59#define PSC_AC97STAT (AC97_PSC_BASE + PSC_AC97STAT_OFFSET) 60#define PSC_AC97EVNT (AC97_PSC_BASE + PSC_AC97EVNT_OFFSET) 61#define PSC_AC97TXRX (AC97_PSC_BASE + PSC_AC97TXRX_OFFSET) 62#define PSC_AC97CDC (AC97_PSC_BASE + PSC_AC97CDC_OFFSET) 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64#define PSC_AC97RST (AC97_PSC_BASE + PSC_AC97RST_OFFSET) 65#define PSC_AC97GPO (AC97_PSC_BASE + PSC_AC97GPO_OFFSET) 66#define PSC_AC97GPI (AC97_PSC_BASE + PSC_AC97GPI_OFFSET) 67#define PSC_AC97CFG_RT_MASK (3 << 30) 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69#define PSC_AC97CFG_RT_FIFO1 (0 << 30) 70#define PSC_AC97CFG_RT_FIFO2 (1 << 30) 71#define PSC_AC97CFG_RT_FIFO4 (2 << 30) 72#define PSC_AC97CFG_RT_FIFO8 (3 << 30) 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74#define PSC_AC97CFG_TT_MASK (3 << 28) 75#define PSC_AC97CFG_TT_FIFO1 (0 << 28) 76#define PSC_AC97CFG_TT_FIFO2 (1 << 28) 77#define PSC_AC97CFG_TT_FIFO4 (2 << 28) 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79#define PSC_AC97CFG_TT_FIFO8 (3 << 28) 80#define PSC_AC97CFG_DD_DISABLE (1 << 27) 81#define PSC_AC97CFG_DE_ENABLE (1 << 26) 82#define PSC_AC97CFG_SE_ENABLE (1 << 25) 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84#define PSC_AC97CFG_LEN_MASK (0xf << 21) 85#define PSC_AC97CFG_TXSLOT_MASK (0x3ff << 11) 86#define PSC_AC97CFG_RXSLOT_MASK (0x3ff << 1) 87#define PSC_AC97CFG_GE_ENABLE (1) 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89#define PSC_AC97CFG_TXSLOT_ENA(x) (1 << (((x) - 3) + 11)) 90#define PSC_AC97CFG_RXSLOT_ENA(x) (1 << (((x) - 3) + 1)) 91#define PSC_AC97CFG_SET_LEN(x) (((((x) - 2) / 2) & 0xf) << 21) 92#define PSC_AC97CFG_GET_LEN(x) (((((x) >> 21) & 0xf) * 2) + 2) 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94#define PSC_AC97MSK_GR (1 << 25) 95#define PSC_AC97MSK_CD (1 << 24) 96#define PSC_AC97MSK_RR (1 << 13) 97#define PSC_AC97MSK_RO (1 << 12) 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99#define PSC_AC97MSK_RU (1 << 11) 100#define PSC_AC97MSK_TR (1 << 10) 101#define PSC_AC97MSK_TO (1 << 9) 102#define PSC_AC97MSK_TU (1 << 8) 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104#define PSC_AC97MSK_RD (1 << 5) 105#define PSC_AC97MSK_TD (1 << 4) 106#define PSC_AC97MSK_ALLMASK (PSC_AC97MSK_GR | PSC_AC97MSK_CD | PSC_AC97MSK_RR | PSC_AC97MSK_RO | PSC_AC97MSK_RU | PSC_AC97MSK_TR | PSC_AC97MSK_TO | PSC_AC97MSK_TU | PSC_AC97MSK_RD | PSC_AC97MSK_TD) 107#define PSC_AC97PCR_RC (1 << 6) 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109#define PSC_AC97PCR_RP (1 << 5) 110#define PSC_AC97PCR_RS (1 << 4) 111#define PSC_AC97PCR_TC (1 << 2) 112#define PSC_AC97PCR_TP (1 << 1) 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114#define PSC_AC97PCR_TS (1 << 0) 115#define PSC_AC97STAT_CB (1 << 26) 116#define PSC_AC97STAT_CP (1 << 25) 117#define PSC_AC97STAT_CR (1 << 24) 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119#define PSC_AC97STAT_RF (1 << 13) 120#define PSC_AC97STAT_RE (1 << 12) 121#define PSC_AC97STAT_RR (1 << 11) 122#define PSC_AC97STAT_TF (1 << 10) 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124#define PSC_AC97STAT_TE (1 << 9) 125#define PSC_AC97STAT_TR (1 << 8) 126#define PSC_AC97STAT_RB (1 << 5) 127#define PSC_AC97STAT_TB (1 << 4) 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129#define PSC_AC97STAT_DI (1 << 2) 130#define PSC_AC97STAT_DR (1 << 1) 131#define PSC_AC97STAT_SR (1 << 0) 132#define PSC_AC97EVNT_GR (1 << 25) 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134#define PSC_AC97EVNT_CD (1 << 24) 135#define PSC_AC97EVNT_RR (1 << 13) 136#define PSC_AC97EVNT_RO (1 << 12) 137#define PSC_AC97EVNT_RU (1 << 11) 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139#define PSC_AC97EVNT_TR (1 << 10) 140#define PSC_AC97EVNT_TO (1 << 9) 141#define PSC_AC97EVNT_TU (1 << 8) 142#define PSC_AC97EVNT_RD (1 << 5) 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144#define PSC_AC97EVNT_TD (1 << 4) 145#define PSC_AC97CDC_RD (1 << 25) 146#define PSC_AC97CDC_ID_MASK (3 << 23) 147#define PSC_AC97CDC_INDX_MASK (0x7f << 16) 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149#define PSC_AC97CDC_ID(x) (((x) & 0x03) << 23) 150#define PSC_AC97CDC_INDX(x) (((x) & 0x7f) << 16) 151#define PSC_AC97RST_RST (1 << 1) 152#define PSC_AC97RST_SNC (1 << 0) 153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154typedef struct psc_i2s { 155 u32 psc_sel; 156 u32 psc_ctrl; 157 u32 psc_i2scfg; 158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 u32 psc_i2smsk; 160 u32 psc_i2spcr; 161 u32 psc_i2sstat; 162 u32 psc_i2sevent; 163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 u32 psc_i2stxrx; 165 u32 psc_i2sudf; 166} psc_i2s_t; 167#define PSC_I2SCFG_OFFSET 0x08 168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169#define PSC_I2SMASK_OFFSET 0x0C 170#define PSC_I2SPCR_OFFSET 0x10 171#define PSC_I2SSTAT_OFFSET 0x14 172#define PSC_I2SEVENT_OFFSET 0x18 173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174#define PSC_I2SRXTX_OFFSET 0x1C 175#define PSC_I2SUDF_OFFSET 0x20 176#define PSC_I2SCFG_RT_MASK (3 << 30) 177#define PSC_I2SCFG_RT_FIFO1 (0 << 30) 178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179#define PSC_I2SCFG_RT_FIFO2 (1 << 30) 180#define PSC_I2SCFG_RT_FIFO4 (2 << 30) 181#define PSC_I2SCFG_RT_FIFO8 (3 << 30) 182#define PSC_I2SCFG_TT_MASK (3 << 28) 183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184#define PSC_I2SCFG_TT_FIFO1 (0 << 28) 185#define PSC_I2SCFG_TT_FIFO2 (1 << 28) 186#define PSC_I2SCFG_TT_FIFO4 (2 << 28) 187#define PSC_I2SCFG_TT_FIFO8 (3 << 28) 188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189#define PSC_I2SCFG_DD_DISABLE (1 << 27) 190#define PSC_I2SCFG_DE_ENABLE (1 << 26) 191#define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16) 192#define PSC_I2SCFG_WS(n) ((n & 0xFF) << 16) 193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194#define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F)) 195#define PSC_I2SCFG_WI (1 << 15) 196#define PSC_I2SCFG_DIV_MASK (3 << 13) 197#define PSC_I2SCFG_DIV2 (0 << 13) 198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199#define PSC_I2SCFG_DIV4 (1 << 13) 200#define PSC_I2SCFG_DIV8 (2 << 13) 201#define PSC_I2SCFG_DIV16 (3 << 13) 202#define PSC_I2SCFG_BI (1 << 12) 203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204#define PSC_I2SCFG_BUF (1 << 11) 205#define PSC_I2SCFG_MLJ (1 << 10) 206#define PSC_I2SCFG_XM (1 << 9) 207#define PSC_I2SCFG_SET_LEN(x) ((((x) - 1) & 0x1f) << 4) 208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209#define PSC_I2SCFG_GET_LEN(x) ((((x) >> 4) & 0x1f) + 1) 210#define PSC_I2SCFG_LB (1 << 2) 211#define PSC_I2SCFG_MLF (1 << 1) 212#define PSC_I2SCFG_MS (1 << 0) 213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214#define PSC_I2SMSK_RR (1 << 13) 215#define PSC_I2SMSK_RO (1 << 12) 216#define PSC_I2SMSK_RU (1 << 11) 217#define PSC_I2SMSK_TR (1 << 10) 218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219#define PSC_I2SMSK_TO (1 << 9) 220#define PSC_I2SMSK_TU (1 << 8) 221#define PSC_I2SMSK_RD (1 << 5) 222#define PSC_I2SMSK_TD (1 << 4) 223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224#define PSC_I2SMSK_ALLMASK (PSC_I2SMSK_RR | PSC_I2SMSK_RO | PSC_I2SMSK_RU | PSC_I2SMSK_TR | PSC_I2SMSK_TO | PSC_I2SMSK_TU | PSC_I2SMSK_RD | PSC_I2SMSK_TD) 225#define PSC_I2SPCR_RC (1 << 6) 226#define PSC_I2SPCR_RP (1 << 5) 227#define PSC_I2SPCR_RS (1 << 4) 228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229#define PSC_I2SPCR_TC (1 << 2) 230#define PSC_I2SPCR_TP (1 << 1) 231#define PSC_I2SPCR_TS (1 << 0) 232#define PSC_I2SSTAT_RF (1 << 13) 233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234#define PSC_I2SSTAT_RE (1 << 12) 235#define PSC_I2SSTAT_RR (1 << 11) 236#define PSC_I2SSTAT_TF (1 << 10) 237#define PSC_I2SSTAT_TE (1 << 9) 238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239#define PSC_I2SSTAT_TR (1 << 8) 240#define PSC_I2SSTAT_RB (1 << 5) 241#define PSC_I2SSTAT_TB (1 << 4) 242#define PSC_I2SSTAT_DI (1 << 2) 243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244#define PSC_I2SSTAT_DR (1 << 1) 245#define PSC_I2SSTAT_SR (1 << 0) 246#define PSC_I2SEVNT_RR (1 << 13) 247#define PSC_I2SEVNT_RO (1 << 12) 248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249#define PSC_I2SEVNT_RU (1 << 11) 250#define PSC_I2SEVNT_TR (1 << 10) 251#define PSC_I2SEVNT_TO (1 << 9) 252#define PSC_I2SEVNT_TU (1 << 8) 253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254#define PSC_I2SEVNT_RD (1 << 5) 255#define PSC_I2SEVNT_TD (1 << 4) 256typedef struct psc_spi { 257 u32 psc_sel; 258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 u32 psc_ctrl; 260 u32 psc_spicfg; 261 u32 psc_spimsk; 262 u32 psc_spipcr; 263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 u32 psc_spistat; 265 u32 psc_spievent; 266 u32 psc_spitxrx; 267} psc_spi_t; 268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269#define PSC_SPICFG_RT_MASK (3 << 30) 270#define PSC_SPICFG_RT_FIFO1 (0 << 30) 271#define PSC_SPICFG_RT_FIFO2 (1 << 30) 272#define PSC_SPICFG_RT_FIFO4 (2 << 30) 273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274#define PSC_SPICFG_RT_FIFO8 (3 << 30) 275#define PSC_SPICFG_TT_MASK (3 << 28) 276#define PSC_SPICFG_TT_FIFO1 (0 << 28) 277#define PSC_SPICFG_TT_FIFO2 (1 << 28) 278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279#define PSC_SPICFG_TT_FIFO4 (2 << 28) 280#define PSC_SPICFG_TT_FIFO8 (3 << 28) 281#define PSC_SPICFG_DD_DISABLE (1 << 27) 282#define PSC_SPICFG_DE_ENABLE (1 << 26) 283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284#define PSC_SPICFG_CLR_BAUD(x) ((x) & ~((0x3f) << 15)) 285#define PSC_SPICFG_SET_BAUD(x) (((x) & 0x3f) << 15) 286#define PSC_SPICFG_SET_DIV(x) (((x) & 0x03) << 13) 287#define PSC_SPICFG_DIV2 0 288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289#define PSC_SPICFG_DIV4 1 290#define PSC_SPICFG_DIV8 2 291#define PSC_SPICFG_DIV16 3 292#define PSC_SPICFG_BI (1 << 12) 293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294#define PSC_SPICFG_PSE (1 << 11) 295#define PSC_SPICFG_CGE (1 << 10) 296#define PSC_SPICFG_CDE (1 << 9) 297#define PSC_SPICFG_CLR_LEN(x) ((x) & ~((0x1f) << 4)) 298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299#define PSC_SPICFG_SET_LEN(x) (((x-1) & 0x1f) << 4) 300#define PSC_SPICFG_LB (1 << 3) 301#define PSC_SPICFG_MLF (1 << 1) 302#define PSC_SPICFG_MO (1 << 0) 303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304#define PSC_SPIMSK_MM (1 << 16) 305#define PSC_SPIMSK_RR (1 << 13) 306#define PSC_SPIMSK_RO (1 << 12) 307#define PSC_SPIMSK_RU (1 << 11) 308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309#define PSC_SPIMSK_TR (1 << 10) 310#define PSC_SPIMSK_TO (1 << 9) 311#define PSC_SPIMSK_TU (1 << 8) 312#define PSC_SPIMSK_SD (1 << 5) 313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314#define PSC_SPIMSK_MD (1 << 4) 315#define PSC_SPIMSK_ALLMASK (PSC_SPIMSK_MM | PSC_SPIMSK_RR | PSC_SPIMSK_RO | PSC_SPIMSK_TO | PSC_SPIMSK_TU | PSC_SPIMSK_SD | PSC_SPIMSK_MD) 316#define PSC_SPIPCR_RC (1 << 6) 317#define PSC_SPIPCR_SP (1 << 5) 318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319#define PSC_SPIPCR_SS (1 << 4) 320#define PSC_SPIPCR_TC (1 << 2) 321#define PSC_SPIPCR_MS (1 << 0) 322#define PSC_SPISTAT_RF (1 << 13) 323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324#define PSC_SPISTAT_RE (1 << 12) 325#define PSC_SPISTAT_RR (1 << 11) 326#define PSC_SPISTAT_TF (1 << 10) 327#define PSC_SPISTAT_TE (1 << 9) 328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329#define PSC_SPISTAT_TR (1 << 8) 330#define PSC_SPISTAT_SB (1 << 5) 331#define PSC_SPISTAT_MB (1 << 4) 332#define PSC_SPISTAT_DI (1 << 2) 333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334#define PSC_SPISTAT_DR (1 << 1) 335#define PSC_SPISTAT_SR (1 << 0) 336#define PSC_SPIEVNT_MM (1 << 16) 337#define PSC_SPIEVNT_RR (1 << 13) 338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339#define PSC_SPIEVNT_RO (1 << 12) 340#define PSC_SPIEVNT_RU (1 << 11) 341#define PSC_SPIEVNT_TR (1 << 10) 342#define PSC_SPIEVNT_TO (1 << 9) 343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344#define PSC_SPIEVNT_TU (1 << 8) 345#define PSC_SPIEVNT_SD (1 << 5) 346#define PSC_SPIEVNT_MD (1 << 4) 347#define PSC_SPITXRX_LC (1 << 29) 348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349#define PSC_SPITXRX_SR (1 << 28) 350typedef struct psc_smb { 351 u32 psc_sel; 352 u32 psc_ctrl; 353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 u32 psc_smbcfg; 355 u32 psc_smbmsk; 356 u32 psc_smbpcr; 357 u32 psc_smbstat; 358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 u32 psc_smbevnt; 360 u32 psc_smbtxrx; 361 u32 psc_smbtmr; 362} psc_smb_t; 363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364#define PSC_SMBCFG_RT_MASK (3 << 30) 365#define PSC_SMBCFG_RT_FIFO1 (0 << 30) 366#define PSC_SMBCFG_RT_FIFO2 (1 << 30) 367#define PSC_SMBCFG_RT_FIFO4 (2 << 30) 368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369#define PSC_SMBCFG_RT_FIFO8 (3 << 30) 370#define PSC_SMBCFG_TT_MASK (3 << 28) 371#define PSC_SMBCFG_TT_FIFO1 (0 << 28) 372#define PSC_SMBCFG_TT_FIFO2 (1 << 28) 373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374#define PSC_SMBCFG_TT_FIFO4 (2 << 28) 375#define PSC_SMBCFG_TT_FIFO8 (3 << 28) 376#define PSC_SMBCFG_DD_DISABLE (1 << 27) 377#define PSC_SMBCFG_DE_ENABLE (1 << 26) 378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379#define PSC_SMBCFG_SET_DIV(x) (((x) & 0x03) << 13) 380#define PSC_SMBCFG_DIV2 0 381#define PSC_SMBCFG_DIV4 1 382#define PSC_SMBCFG_DIV8 2 383/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384#define PSC_SMBCFG_DIV16 3 385#define PSC_SMBCFG_GCE (1 << 9) 386#define PSC_SMBCFG_SFM (1 << 8) 387#define PSC_SMBCFG_SET_SLV(x) (((x) & 0x7f) << 1) 388/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389#define PSC_SMBMSK_DN (1 << 30) 390#define PSC_SMBMSK_AN (1 << 29) 391#define PSC_SMBMSK_AL (1 << 28) 392#define PSC_SMBMSK_RR (1 << 13) 393/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394#define PSC_SMBMSK_RO (1 << 12) 395#define PSC_SMBMSK_RU (1 << 11) 396#define PSC_SMBMSK_TR (1 << 10) 397#define PSC_SMBMSK_TO (1 << 9) 398/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399#define PSC_SMBMSK_TU (1 << 8) 400#define PSC_SMBMSK_SD (1 << 5) 401#define PSC_SMBMSK_MD (1 << 4) 402#define PSC_SMBMSK_ALLMASK (PSC_SMBMSK_DN | PSC_SMBMSK_AN | PSC_SMBMSK_AL | PSC_SMBMSK_RR | PSC_SMBMSK_RO | PSC_SMBMSK_TO | PSC_SMBMSK_TU | PSC_SMBMSK_SD | PSC_SMBMSK_MD) 403/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404#define PSC_SMBPCR_DC (1 << 2) 405#define PSC_SMBPCR_MS (1 << 0) 406#define PSC_SMBSTAT_BB (1 << 28) 407#define PSC_SMBSTAT_RF (1 << 13) 408/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 409#define PSC_SMBSTAT_RE (1 << 12) 410#define PSC_SMBSTAT_RR (1 << 11) 411#define PSC_SMBSTAT_TF (1 << 10) 412#define PSC_SMBSTAT_TE (1 << 9) 413/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 414#define PSC_SMBSTAT_TR (1 << 8) 415#define PSC_SMBSTAT_SB (1 << 5) 416#define PSC_SMBSTAT_MB (1 << 4) 417#define PSC_SMBSTAT_DI (1 << 2) 418/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 419#define PSC_SMBSTAT_DR (1 << 1) 420#define PSC_SMBSTAT_SR (1 << 0) 421#define PSC_SMBEVNT_DN (1 << 30) 422#define PSC_SMBEVNT_AN (1 << 29) 423/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 424#define PSC_SMBEVNT_AL (1 << 28) 425#define PSC_SMBEVNT_RR (1 << 13) 426#define PSC_SMBEVNT_RO (1 << 12) 427#define PSC_SMBEVNT_RU (1 << 11) 428/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 429#define PSC_SMBEVNT_TR (1 << 10) 430#define PSC_SMBEVNT_TO (1 << 9) 431#define PSC_SMBEVNT_TU (1 << 8) 432#define PSC_SMBEVNT_SD (1 << 5) 433/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 434#define PSC_SMBEVNT_MD (1 << 4) 435#define PSC_SMBEVNT_ALLCLR (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL | PSC_SMBEVNT_RR | PSC_SMBEVNT_RO | PSC_SMBEVNT_TO | PSC_SMBEVNT_TU | PSC_SMBEVNT_SD | PSC_SMBEVNT_MD) 436#define PSC_SMBTXRX_RSR (1 << 28) 437#define PSC_SMBTXRX_STP (1 << 29) 438/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 439#define PSC_SMBTXRX_DATAMASK 0xff 440#define PSC_SMBTMR_SET_TH(x) (((x) & 0x03) << 30) 441#define PSC_SMBTMR_SET_PS(x) (((x) & 0x1f) << 25) 442#define PSC_SMBTMR_SET_PU(x) (((x) & 0x1f) << 20) 443/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 444#define PSC_SMBTMR_SET_SH(x) (((x) & 0x1f) << 15) 445#define PSC_SMBTMR_SET_SU(x) (((x) & 0x1f) << 10) 446#define PSC_SMBTMR_SET_CL(x) (((x) & 0x1f) << 5) 447#define PSC_SMBTMR_SET_CH(x) (((x) & 0x1f) << 0) 448/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 449#endif 450