1/*
2 * Copyright (C) 2006 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16/*
17 *  memset32.S
18 *
19 */
20
21    .syntax unified
22
23    .text
24    .align
25
26    .global android_memset32
27    .type   android_memset32, %function
28    .global android_memset16
29    .type   android_memset16, %function
30
31        /*
32         * Optimized memset32 and memset16 for ARM.
33         *
34         * void android_memset16(uint16_t* dst, uint16_t value, size_t size);
35         * void android_memset32(uint32_t* dst, uint32_t value, size_t size);
36         *
37         */
38
39android_memset16:
40        .fnstart
41        cmp         r2, #1
42        bxle        lr
43
44        /* expand the data to 32 bits */
45        mov         r1, r1, lsl #16
46        orr         r1, r1, r1, lsr #16
47
48        /* align to 32 bits */
49        tst         r0, #2
50        strhne      r1, [r0], #2
51        subne       r2, r2, #2
52        .fnend
53
54android_memset32:
55        .fnstart
56        .cfi_startproc
57        str         lr, [sp, #-4]!
58        .cfi_def_cfa_offset 4
59        .cfi_rel_offset lr, 0
60
61        /* align the destination to a cache-line */
62        mov         r12, r1
63        mov         lr, r1
64        rsb         r3, r0, #0
65        ands        r3, r3, #0x1C
66        beq         .Laligned32
67        cmp         r3, r2
68        andhi       r3, r2, #0x1C
69        sub         r2, r2, r3
70
71        /* conditionally writes 0 to 7 words (length in r3) */
72        movs        r3, r3, lsl #28
73        stmiacs     r0!, {r1, lr}
74        stmiacs     r0!, {r1, lr}
75        stmiami     r0!, {r1, lr}
76        movs        r3, r3, lsl #2
77        strcs       r1, [r0], #4
78
79.Laligned32:
80        mov         r3, r1
811:      subs        r2, r2, #32
82        stmiahs     r0!, {r1,r3,r12,lr}
83        stmiahs     r0!, {r1,r3,r12,lr}
84        bhs         1b
85        add         r2, r2, #32
86
87        /* conditionally stores 0 to 30 bytes */
88        movs        r2, r2, lsl #28
89        stmiacs     r0!, {r1,r3,r12,lr}
90        stmiami     r0!, {r1,lr}
91        movs        r2, r2, lsl #2
92        strcs       r1, [r0], #4
93        strhmi      lr, [r0], #2
94
95        ldr         lr, [sp], #4
96        .cfi_def_cfa_offset 0
97        .cfi_restore lr
98        bx          lr
99        .cfi_endproc
100        .fnend
101