| 8a3437f6056414cdb72222fa7ed118442efcc9f6 |
13-Dec-2016 |
Colin Cross <ccross@android.com> |
Rearrange header libraries
Use a header library for the LLVM headers. External libraries can
depend on the headers by depending on llvm-headers. All modules in
LLVM get all the headers, including the autogenerated ones, except
for the few that opt-out in order to allow tblgen to compile and
generate the generated headers.
Test: mma -j
Change-Id: I5e0a58fdf9ade97337222822ddf8596a197aa442
ndroid.bp
|
| d4da2d9602d41ee76a45cf1ea6ec2070cc3540af |
01-Dec-2016 |
Colin Cross <ccross@android.com> |
Convert the rest of llvm to Android.bp
A few makefiles still exist in external/llvm/*.mk, they are referenced
outside external/llvm but no longer used by anything in external/llvm.
Test: m -j checkbuild
Change-Id: I8227d8feeac7314c237d2d3379b473dc0ee03ded
ndroid.bp
|
| 4094d25cd1d80da9b06cff4c690c077c4d515f67 |
22-Nov-2016 |
Colin Cross <ccross@android.com> |
Convert libLLVM to Android.bp
Test: m -j checkbuild
Test: external/llvm/android_test.sh
Test: compare symbols for out/host/linux-x86/lib64/libLLVM.so and
prebuilts/sdk/tools/linux/lib64/libLLVM.so, only difference is removed
RTTI symbols
Change-Id: Iead18820cf19c678365978ee3b13e1fd9336e305
ndroid.bp
ndroid.mk
|
| de2d8694e25a814696358e95141f4b1aa4d8847e |
20-Sep-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r275480
Bug: http://b/31320715
This merges commit 7dcf7f03e005379ef2f06db96aa93f06186b66d5 from
aosp/dev.
Test: Build AOSP and run RenderScript tests (host tests for slang and
libbcc, RsTest, CTS)
Change-Id: Iaf3738f74312d875e69f61d604ac058f381a2a1a
akefile
ipsAsmParser.cpp
|
| f3ef5332fa3f4d5ec72c178a2b19dac363a19383 |
04-Mar-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r256229
http://b/26987366
Change-Id: I1f29c4676a8abe633ab5707dded58d846c973d50
ndroid.mk
ipsAsmParser.cpp
|
| 2b5f56b066cfdb6d55d42228e0df2a2de24b3429 |
19-Aug-2015 |
Dan Willemsen <dwillemsen@google.com> |
Stop checking HOST_OS, whitelist windows modules
Bug: 23566667
Change-Id: If7a149c047ccd36c7789eda3c29d6cc8977ca6d6
ndroid.mk
|
| 6948897e478cbd66626159776a8017b3c18579b9 |
01-Jul-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r239765
Bug: 20140355: This rebase pulls the upstream fix for the spurious
warnings mentioned in the bug.
Change-Id: I7fd24253c50f4d48d900875dcf43ce3f1721a3da
ipsAsmParser.cpp
|
| 0c7f116bb6950ef819323d855415b2f2b0aad987 |
06-May-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r235153
Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
ipsAsmParser.cpp
|
| 4c5e43da7792f75567b693105cc53e3f1992ad98 |
08-Apr-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
ipsAsmParser.cpp
|
| ebe69fe11e48d322045d5949c83283927a0d790b |
23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
ipsAsmParser.cpp
|
| 37ed9c199ca639565f6ce88105f9e39e898d82d0 |
01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
ipsAsmParser.cpp
|
| c6a4f5e819217e1e12c458aed8e7b122e23a3a58 |
21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749.
Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
ipsAsmParser.cpp
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
LVMBuild.txt
ipsAsmParser.cpp
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
ndroid.mk
MakeLists.txt
ipsAsmParser.cpp
|
| ce9904c6ea8fd669978a8eefb854b330eb9828ff |
12-Feb-2014 |
Stephen Hines <srhines@google.com> |
Merge remote-tracking branch 'upstream/release_34' into merge-20140211
Conflicts:
lib/Linker/LinkModules.cpp
lib/Support/Unix/Signals.inc
Change-Id: Ia54f291fa5dc828052d2412736e8495c1282aa64
|
| a87a147ee7bb9adb4caea631ff0ba7e66bb9b0b5 |
20-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195152:
------------------------------------------------------------------------
r195152 | jacksprat | 2013-11-19 12:53:28 -0800 (Tue, 19 Nov 2013) | 1 line
reverts 195057 per request
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195220 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| e53969b4758274ee833ce3acef37134bcf6554ea |
19-Nov-2013 |
Jack Carter <jack.carter@imgtec.com> |
[Mips] Support for MicroMips STO refactoring.
No true functional changes.
Change the "hack" name of emitMipsHackSTOCG to emitSymSTO.
Remove demonstration code in AsmParser for emitMipsHackSTOCG and
emitMipsHackELFFlags. The STO field is in an ELF symbol and is not
an explicit directive. That said, we are missing the compliment call
in AsmParser and that will need to be addressed soon.
XFAIL dummy tests for emitMipsHackELFFlags and emitMipsHackELFFlags.
These will built out with following patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195067 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 95adf91f29980e374bf094e15bc3f2764ef9baf4 |
18-Nov-2013 |
Matheus Almeida <matheus.almeida@imgtec.com> |
[mips][msa] Fix immediate value of LSA instruction as it was being wrongly encoded.
The immediate field should be encoded as "imm - 1" as the CPU always adds one to that field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195004 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| c0fad4d9fdb1aebe029bcb54311fad7059b1a9e5 |
13-Nov-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
Fix bug in .gpword directive parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194570 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| c7ebe502765fecc2af047ced115845936e8ed58e |
13-Nov-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
This patch fixes a bug in floating point operands parsing, when instruction alias uses default register operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194562 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 2263a2ca72e21206d45a69532004a0b17881e733 |
06-Nov-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
Implement gpword directive for mips, test case added. Stype changes using clang-format are also included.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194145 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 006cff8d7b60ddf632f8642f01693dace7827d8b |
21-Oct-2013 |
Matheus Almeida <matheus.almeida@imgtec.com> |
[mips][msa] Direct Object Emission support for CTCMSA and CFCMSA.
These instructions are logically related as they allow read/write of MSA control registers.
Currently MSA control registers are emitted by number but hopefully that will change as soon
as GAS starts accepting them by name as that would make the assembly easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193078 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 45ecbfc8e58923131068dced0cf89348ac61208f |
14-Oct-2013 |
Matheus Almeida <matheus.almeida@imgtec.com> |
[mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction.
INSERT is the first type of MSA instruction that requires a change to the way
MSA registers are parsed. This happens because MSA registers may be suffixed by
an index in the form of an immediate or a general purpose register. The changes
to parseMSARegs reflect that requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192582 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 21d60f02c36c2362899109239d16824caa56d8ab |
11-Oct-2013 |
Matheus Almeida <matheus.almeida@imgtec.com> |
This reverts 192447 because of compiler warning generated on darwin build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192451 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 6f36ea5c4778ac0519d821798b94aaac92ec1389 |
11-Oct-2013 |
Matheus Almeida <matheus.almeida@imgtec.com> |
[mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction.
INSERT is the first type of MSA instruction that requires a change to the way MSA registers are parsed.
This happens because MSA registers may be suffixed by an index in the form of an immediate or a
general purpose register. The changes to parseMSARegs reflect that requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192447 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 320296a4cfe414ce59f406b8a5ce15272f563103 |
08-Oct-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add a MCTargetStreamer interface.
This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.
The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.
I will send an email to llvmdev with instructions on how to use this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192181 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 5e195a4c8d8cd4498ab7e0aa16a3b6f273daf457 |
05-Oct-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove some really nasty uses of hasRawTextSupport.
When MC was first added, targets could use hasRawTextSupport to keep features
working before they were added to the MC interface.
The design goal of MC is to provide an uniform api for printing assembly and
object files. Short of relaxations and other corner cases, a object file is
just another representation of the assembly.
It was never the intention that targets would keep doing things like
if (hasRawTextSupport())
Set flags in one way.
else
Set flags in another way.
When they do that they create two code paths and the object file is no longer
just another representation of the assembly. This also then requires testing
with llc -filetype=obj, which is extremelly brittle.
This patch removes some of these hacks by replacing them with smaller ones.
The ARM flag setting is trivial, so I just moved it to the constructor. For
Mips, the patch adds two temporary hack directives that allow the assembly
to represent the same things as the object file was already able to.
The hope is that the mips developers will replace the hack directives with
the same ones that gas uses and drop the -print-hack-directives flag.
I will also try to implement a target streamer interface, so that we can
move this out of the common code.
In summary, for any new work, two rules of the thumb are
* Don't use "llc -filetype=obj" in tests.
* Don't add calls to hasRawTextSupport.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192035 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 596654bd100b64cc20ef7476f5f95899bd7afdec |
05-Oct-2013 |
Jack Carter <jack.carter@imgtec.com> |
forgot to remove this file as well
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191993 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmFlags.h
|
| 6d389f5ebae9aa08309c5795234cf155054b6b39 |
05-Oct-2013 |
Jack Carter <jack.carter@imgtec.com> |
reverting per request
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191992 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 8e48edcf3dd7dea9fec58b05a6ace6fbd0260d7c |
04-Oct-2013 |
Jack Carter <jack.carter@imgtec.com> |
[MC][AsmParser] Hook for post assembly file processing
This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file
directive processing.
Mips assembly requires processing inline directives that directly and
indirectly affect the output ELF header flags. This patch handles one
".abicalls".
To process these directives we are following the model the code generator
uses by storing state in a container as we go through processing and when
we detect the end of input file processing, AsmParser is notified and we
update the ELF header flags through a MipsELFStreamer method with a call from
MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer).
This patch will allow other targets the same functionality.
Jack
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191982 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmFlags.h
ipsAsmParser.cpp
|
| d59ad8a8013fd76177fb61c741562af3024d34cd |
01-Oct-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
This patch adds aliases for Mips sub instruction with immediate operands. Corresponding test cases are added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191734 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 42d9ca629934d0c20ac19949399ce4faa9a7bbb3 |
26-Sep-2013 |
Jack Carter <jack.carter@imgtec.com> |
[mips][msa] Direct Object Emission support for the MSA instruction set.
In more detail, this patch adds the ability to parse, encode and decode MSA registers ($w0-$w31). The format of 2RF instructions (MipsMSAInstrFormat.td) was updated so that we could attach a test case to this patch i.e., the test case parses, encodes and decodes 2 MSA instructions. Following patches will add the remainder of the instructions.
Note that DecodeMSA128BRegisterClass is missing from MipsDisassembler.td because it's not yet required at this stage and having it would cause a compiler warning (unused function).
Patch by Matheus Almeida
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191412 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| e925f7dbbf497412cd0cc3f67b9b96fed0cc3712 |
16-Sep-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
This patch implements Mips load/store instructions from/to coprocessor 2. Test cases are added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190780 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 715d98d657491b3fb8ea0e14643e9801b2f9628c |
12-Sep-2013 |
Joey Gouly <joey.gouly@arm.com> |
Add an instruction deprecation feature to TableGen.
The 'Deprecated' class allows you to specify a SubtargetFeature that the
instruction is deprecated on.
The 'ComplexDeprecationPredicate' class allows you to define a custom
predicate that is called to check for deprecation.
For example:
ComplexDeprecationPredicate<"MCR">
would mean you would have to define the following function:
bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
std::string &Info)
Which returns 'false' for not deprecated, and 'true' for deprecated
and store the warning message in 'Info'.
The MCTargetAsmParser constructor was chaned to take an extra argument of
the MCInstrInfo class, so out-of-tree targets will need to be changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190598 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| b15da6dc09fdf2699146cd4317f3a43e70397553 |
10-Sep-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
Add test cases for Mips mthc1/mfhc1 instructions. Add check for odd value of register when PFU is 32 bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190397 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 798cdc6af1bf2877a941bba4587e6bf72f5d140d |
10-Sep-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
Remove obsolete code from MipsAsmParser.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190396 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| a796d90c0ed7ebd5d58fced43c60afc2e9bf6225 |
28-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Use ptr_rc to simplify definitions of base+index load/store instructions.
Also, fix predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189432 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 3531db14c61957e7ad00ce972e9685864c3887da |
21-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Define register class FGRH32 for the high half of the 64-bit floating
point registers. We will need this register class later when we add
definitions for instructions mfhc1 and mthc1. Also, remove sub-register indices
sub_fpeven and sub_fpodd and use sub_lo and sub_hi instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188842 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 899ee589f5182a35495f068ae15b5f2b5ff4ef8a |
14-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Fix bug in parsing accumulator registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188344 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 88373c29fe9d0b498ed21c3d29129f31806d7ec8 |
14-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Use register operands instead of register classes in DSP instruction
definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188343 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| bd980e5569d085ab73e351ec9fca8b698e06d44f |
13-Aug-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
This patch introduces changes to MipsAsmParser register parsing routines. The code now follows more deterministic path and makes the code more efficient and easier to maintain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188264 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 491d04969d9f29ed891c73238648853954ba4f81 |
08-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Rename accumulator register classes and FP register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188020 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 94a88c49b0e87ee8c911669ff6c6bbd31b912542 |
08-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Delete register class HWRegs64.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188016 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| fab2daa4a1127ecb217abe2b07c1769122b6fee1 |
08-Aug-2013 |
Stephen Hines <srhines@google.com> |
Merge commit '10251753b6897adcd22cc981c0cc42f348c109de' into merge-20130807
Conflicts:
lib/Archive/ArchiveReader.cpp
lib/Support/Unix/PathV2.inc
Change-Id: I29d8c1e321a4a380b6013f00bac6a8e4b593cc4e
|
| 1858786285139b87961d9ca08de91dcd59364afb |
07-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Rename register classes CPURegs and CPU64Regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187832 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 6b034bb3ae3f6e1f3831bfc24f90e84b9578944c |
07-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Mark instructions defined in Mips64InstrInfo.td that are duplicates of
instructions defined in MipsInstrInfo.td as codegen-only instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187828 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| a1fe9ef62e18dcb30cdee62a2fad82d05791d359 |
07-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Replace usages of register classes with register operands. Also, remove
unnecessary jalr InstAliases in Mips64InstrInfo.td and add the code to print
jalr InstAliases in MipsInstPrinter::printAlias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187821 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| b67775df0cc702cd94408200ff2d58cf83f1334a |
30-Jul-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
This patch implements parsing of mips FCC register operands. The example instructions have been added to test files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187410 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 94ce6dadd131ca80adf2ba05391f689684540601 |
24-Jul-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Make MipsAsmParser::parseCCRRegs return NoMatch instead of ParseFail
when there wasn't a match. This behavior is consistent with other register
parsing methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187063 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| f63ef914b67593e4b20a0b85e889380c20b41f55 |
24-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Split generated asm mnemonic matching table into a separate table for each asm variant.
This removes the need to store the asm variant in each row of the single table that existed before. Shaves ~16K off the size of X86AsmParser.o.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187026 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 9a05b98ef9ec58c52f35ce04677f24ef62a79701 |
22-Jul-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Fix MipsAsmParser::parseCCRRegs.
Enable parsing all 32 floating point control registers $0-31 and stop trying to
parse floating point condition code register $fcc0. Also, return ParseFail if
the operand being parsed is not in the expected format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186861 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 764f6f51257a0669acc58c8e5b4b802a29069302 |
18-Jul-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
This patch extends mips register parsing methods to allow indexed register parsing. The corresponding test cases are added to the patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186567 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| fce9279ac0265fd5ea637dd30253bad26f4273da |
17-Jul-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
This patch checks for valid mnemonics at the beginning of parseInstruction method, thus giving the user the right error message for non-existing instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186512 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 088483627720acb58c96951b7b634f67312c7272 |
16-Jul-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
This patch represents Mips utilization of r186388 code that alows asm matcher to emit mnemonics contain '.' characters. This makes asm parser code simpler and more efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186397 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 90b1086b93708149ed7a3749e2eeccea264a037d |
24-Jun-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184716 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 7231625f75b4da1c87deb833cd9cad6c5ee95d95 |
20-Jun-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184411 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| dd5fe2ffc6f564192876065d2617ecbc18d03f23 |
19-Jun-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
The RenderMethod field in RegisterOperand class sets the name of the method on the target specific operand to call to add the target specific operand to an MCInst. This patch defines RenderMethod for mips RegisterOperand classes and removes redundant code from MipsAsmParser.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184292 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 99cb622041a0839c7dfcf0263c5102a305a0fdb5 |
18-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Use pointers to the MCAsmInfo and MCRegInfo.
Someone may want to do something crazy, like replace these objects if they
change or something.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184175 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 1878f9a7874b1ff569d745c0269f49d3daf7203d |
12-Jun-2013 |
Stephen Hines <srhines@google.com> |
Merge commit '100fbdd06be7590b23c4707a98cd605bdb519498' into merge_20130612
|
| 164de543917ca82df431c4453e7c9d94580b4d06 |
04-Jun-2013 |
Vladimir Medic <Vladimir.Medic@imgtec.com> |
Test commit for user vmedic, to verify commit access. One line of comment is added to MipsAsmParser.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183215 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| c57905ef4dfc7a8b573efbf8e0a1f9580d98bfe8 |
29-May-2013 |
Jack Carter <jack.carter@imgtec.com> |
Mips assembler: Improve set register alias handling
This patch solves the problem of numeric register values not being accepted:
../set_alias.s:1:11: error: expected valid expression after comma
.set r4,$4
^
The parsing of .set directive is changed and handling of symbols in code
as well to enable this feature.
The test example is added.
Patch by Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182807 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 38578c4919ea18ceb27e29988b2d857afe6215bf |
03-May-2013 |
Stephen Hines <srhines@google.com> |
Merge remote-tracking branch 'upstream/master' into merge-20130502
Conflicts:
lib/Support/Unix/Signals.inc
unittests/Transforms/Utils/Cloning.cpp
Change-Id: I027581a4390ec3ce4cd8d33da8b5f4c0c7d372c8
|
| 97265a48895a2cda7f04e47bfe935c4fdd71f8ae |
26-Apr-2013 |
Jack Carter <jack.carter@imgtec.com> |
Mips assembler: .set reorder support
Mips have delayslots for certain instructions
like jumps and branches. These are instructions
that follow the branch or jump and are executed
before the jump or branch is completed.
Early Mips compilers could not cope with delayslots
and left them up to the assembler. The assembler would
fill the delayslots with the appropriate instruction,
usually just a nop to allow correct runtime behavior.
The default behavior for this is set with .set reorder.
To tell the assembler that you don't want it to mess with
the delayslot one used .set noreorder.
For backwards compatibility we need to support
.set reorder and have it be the default behavior in the
assembler.
Our support for it is to insert a NOP directly after an
instruction with a delayslot when in .set reorder mode.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180584 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 86924b4182537745659f2660244f3402c1e1ca4d |
18-Apr-2013 |
Jack Carter <jack.carter@imgtec.com> |
Mips assembler: formatting and comment changes.
This patch should not have any functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179737 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| ce47d5ba8cf7e30cbf0d6b80d3f7d10916c7fe31 |
17-Apr-2013 |
Evgeniy Stepanov <eugeni.stepanov@gmail.com> |
Fix -Werror build.
Broken in r179657.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179669 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 8afc8b7e63d5ce2d027e92934d16b19e5ba2db59 |
17-Apr-2013 |
Jack Carter <jack.carter@imgtec.com> |
Mips assembler: Enable handling of nested expressions
This patch allows the Mips assembler to parse and emit nested
expressions as instruction operands. It also extends the
expansion of memory instructions when an offset is given as
an expression.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179657 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| b8145e3881872fffbac15693c94536446f060330 |
16-Apr-2013 |
Jack Carter <jack.carter@imgtec.com> |
Mips assembler: Explicit floating point condition register recognition.
This patch allows the assembler to recognize $fcc0
as a valid register for conditional move instructions.
Corresponding test cases have been added.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179567 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 25df6a93f3324bd30f44dcb95fd17aff0a92d438 |
22-Mar-2013 |
Jack Carter <jack.carter@imgtec.com> |
This patch that enables the Mips assembler to use symbols for offset for instructions
This patch uses the generated instruction info tables to
identify memory/load store instructions.
After successful matching and based on the operand type
and size, it generates additional instructions to the output.
Contributor: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177685 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| c91b5e197bb41ccb2f9f78b6176e61c848df9e15 |
21-Mar-2013 |
Jack Carter <jack.carter@imgtec.com> |
This patch enables the Mips .set directive to define aliases
The .set directive in the Mips the assembler can be
used to set the value of a symbol to an expression.
This changes the symbol's value and type to conform
to the expression's.
Syntax: .set symbol, expression
This patch implements the parsing of the above syntax
and enables the parser to use defined symbols when
parsing operands.
Contributor: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177667 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 2d4629c5d7dcc6582fa7b85a517744f1a3654eba |
19-Mar-2013 |
Stephen Hines <srhines@google.com> |
Merge branch 'upstream' into merge_2013_03_18
|
| a286fc065a5bc846d73c8407a534a1d3c1d70b59 |
15-Mar-2013 |
Eric Christopher <echristo@gmail.com> |
Silence anonymous type in anonymous union warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177135 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 5adb136be579e8fff3734461580cb34d1d2983b8 |
06-Mar-2013 |
Stephen Hines <srhines@google.com> |
Merge commit 'b3201c5cf1e183d840f7c99ff779d57f1549d8e5' into merge_20130226
Conflicts:
include/llvm/Support/ELF.h
lib/Support/DeltaAlgorithm.cpp
Change-Id: I24a4fbce62eb39d924efee3c687b55e1e17b30cd
|
| 77217229ba1bbc92f3a53099fa91bcdaa7797da8 |
21-Feb-2013 |
Jack Carter <jcarter@mips.com> |
Mips specific standalone assembler addressing mode %hi and %lo.
The constructs %hi() and %lo() represent the high and low 16
bits of the address.
Because the 16 bit offset field of an LW instruction is
interpreted as signed, if bit 15 of the low part is 1 then the
low part will act as a negative and 1 needs to be added to the
high part.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175707 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 99e98551bf8719764f9345ce856118f3f1a9c441 |
21-Feb-2013 |
Jack Carter <jcarter@mips.com> |
ELF symbol table field st_other support,
excluding visibility bits.
Mips specific standalone assembler directive "set at".
This directive changes the general purpose register
that the assembler will use when given the symbolic
register name $at.
This does not include negative testing. That will come
in a future patch.
A side affect of this patch recognizes the different
GPR register names for temporaries between old abi
and new abi so a test case for that is included.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175686 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| cb2ae3d98e3bb36e5813f8f69b00d39efd026dcd |
20-Feb-2013 |
Jim Grosbach <grosbach@apple.com> |
MCParser: Update method names per coding guidelines.
s/AddDirectiveHandler/addDirectiveHandler/
s/ParseMSInlineAsm/parseMSInlineAsm/
s/ParseIdentifier/parseIdentifier/
s/ParseStringToEndOfStatement/parseStringToEndOfStatement/
s/ParseEscapedString/parseEscapedString/
s/EatToEndOfStatement/eatToEndOfStatement/
s/ParseExpression/parseExpression/
s/ParseParenExpression/parseParenExpression/
s/ParseAbsoluteExpression/parseAbsoluteExpression/
s/CheckForValidSection/checkForValidSection/
http://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175675 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 801c5838830d190a6b0d8e462bd43805f66ba50f |
25-Jan-2013 |
Jack Carter <jcarter@mips.com> |
This patch implements parsing the .word
directive for the Mips assembler.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173407 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 059800f9e3fee2852672f846d91a2da14da7783a |
21-Jan-2013 |
Stephen Hines <srhines@google.com> |
Merge remote-tracking branch 'upstream/master' into merge-llvm
Conflicts:
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
lib/MC/MCAssembler.cpp
lib/Support/Atomic.cpp
lib/Support/Memory.cpp
lib/Target/ARM/ARMJITInfo.cpp
Change-Id: Ib339baf88df5b04870c8df1bedcfe1f877ccab8d
|
| c147b678206db510336ee95c3b55dc9c0ff19595 |
17-Jan-2013 |
Jack Carter <jcarter@mips.com> |
This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
The Mips RDHWR (Read Hardware Register) instruction was not
tested for assembler or dissassembler consumption. This patch
adds that functionality.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172685 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 457ee1a12e2c52624af7fdb81cf938f6d8d96572 |
16-Jan-2013 |
Jack Carter <jcarter@mips.com> |
reverting 172579
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172594 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 490c7d97737ea7719efcea7321d3cfa3984b0027 |
16-Jan-2013 |
Jack Carter <jcarter@mips.com> |
Akira,
Hope you are feeling better.
The Mips RDHWR (Read Hardware Register) instruction was not
tested for assembler or dissassembler consumption. This patch
adds that functionality.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172579 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| a96a96cefaa3196bde76a7bda8e57c95893f723b |
12-Jan-2013 |
NAKAMURA Takumi <geek4civic@gmail.com> |
MipsAsmParser: Try to unbreak tests to add extra check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172315 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| ec3199f675b17b12fd779df557c6bff25aa4e862 |
12-Jan-2013 |
Jack Carter <jcarter@mips.com> |
This patch tackles the problem of parsing Mips
register names in the standalone assembler llvm-mc.
Registers such as $A1 can represent either a 32 or
64 bit register based on the instruction using it.
In addition, based on the abi, $T0 can represent different
32 bit registers.
The problem is resolved by the Mips specific AsmParser
td definitions changing to work together. Many cases of
RegisterClass parameters are now RegisterOperand.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172284 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 3ebe59c892051375623fea55e977ff559fdb3323 |
07-Jan-2013 |
Jordan Rose <jordan_rose@apple.com> |
Change SMRange to be half-open (exclusive end) instead of closed (inclusive)
This is necessary not only for representing empty ranges, but for handling
multibyte characters in the input. (If the end pointer in a range refers to
a multibyte character, should it point to the beginning or the end of the
character in a char array?) Some of the code in the asm parsers was already
assuming this anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171765 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.
Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 6a020a71173a3ea7738a9df69982e85ddbfe0303 |
25-Oct-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Add support for creating AsmRewrites in the target specific
AsmParser logic. To be used/tested in a subsequent commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166714 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 84125ca43c758fd21fdab2b05196e0df57c55c96 |
13-Oct-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Remove the MatchInstruction() function. Previously, this was
the interface between the front-end and the MC layer when parsing inline
assembly. Unfortunately, this is too deep into the parsing stack. Specifically,
we're unable to handle target-independent assembly (i.e., assembly directives,
labels, etc.). Note the MatchAndEmitInstruction() isn't the correct
abstraction either. I'll be exposing target-independent hooks shortly, so this
is really just a cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165858 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 6e006d3de882784527d4d9cc92b1a91f6773505e |
13-Oct-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Use the new API introduced in r165830 in lieu of the
MapAndConstraints vector. Also remove the unused Kind argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165833 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 2f68b311a1b0efb3cafeca3780f5c3d09a762a50 |
10-Oct-2012 |
Jack Carter <jcarter@mips.com> |
Initial assembler implementation of Mips load address macro
This patch provides initial implementation of load address
macro instruction for Mips. We have implemented two kinds
of expansions with their variations depending on the size
of immediate operand:
1) load address with immediate value directly:
* la d,j => addiu d,$zero,j (for -32768 <= j <= 65535)
* la d,j => lui d,hi16(j)
ori d,d,lo16(j) (for any other 32 bit value of j)
2) load load address with register offset value
* la d,j(s) => addiu d,s,j (for -32768 <= j <= 65535)
* la d,j(s) => lui d,hi16(j) (for any other 32 bit value of j)
ori d,d,lo16(j)
addu d,d,s
This patch does not cover the case when the address is loaded
from the value of the label or function.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165561 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 572e1bd109518f80b54d229de10699c4603944c3 |
09-Oct-2012 |
David Chisnall <csdavec@swan.ac.uk> |
Improvements to MIPS64 assembler:
- Teach it about dadd[i] instructions and move pseudo-instruction
- Make it parse the register names correctly (for N32 / N64)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165506 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 2490dc650895149423bb59538dc03ca352222702 |
06-Oct-2012 |
Jack Carter <jcarter@mips.com> |
Minor changes based on post commit review:
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165350 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 10d5ff6b1dceec77c23cd200ef200e2e9dec4c85 |
06-Oct-2012 |
Jack Carter <jcarter@mips.com> |
Minor changes based on post commit review:
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165346 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 9ba9d4d76bfa8de2b05cbce02a5a3ff7d46cb331 |
05-Oct-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Add a few typedefs to simplify future changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165324 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 9d577c861414c28967d77c2a1edf64b68efdeaee |
04-Oct-2012 |
Jack Carter <jcarter@mips.com> |
Implement methods that enable expansion of load immediate
macro instruction (li) in the assembler.
We have identified three possible expansions depending on
the size of immediate operand:
1) for 0 ≤ j ≤ 65535.
li d,j =>
ori d,$zero,j
2) for −32768 ≤ j < 0.
li d,j =>
addiu d,$zero,j
3) for any other value of j that is representable as a 32-bit integer.
li d,j =>
lui d,hi16(j)
ori d,d,lo16(j)
All of the above have been implemented in ths patch.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165199 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 30116cd2e24a4a2b6c2771ef2665d655de93b984 |
04-Oct-2012 |
Jack Carter <jcarter@mips.com> |
This patch is a partial implementation of mips .set assembler directive. Directive is defined as follows:
.set option
The patch implements following options
at - lets the assembler use the $at register for macros,
but generates warnings if the source program uses $at
noat - let source programs use $at without issuingwarnings.
noreorder - prevents the assembler from reordering machine
language instructions.
nomacro - causes the assembler to print a warning whenever
an assembler operation generates more than one
machine language instruction.
macro - lets the assembler generate multiple machine instructions
from a single assembler instruction
reorder - lets the assembler reorder machine language
instructions to improve performance
The above variants are parsed and their boolean values set or unset.
The code to actually use them will come later.
Following options are not implemented yet:
nomips16
nomicromips
move
nomove
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165194 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 22685876ed7231f32f7d1698c00acab22825b74c |
02-Oct-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Add the convertToMapAndConstraints() function that is used to
map constraints and MCInst operands to inline asm operands. This replaces the
getMCInstOperandNum() function.
The logic to determine the constraints are not in place, so we still default to
a register constraint (i.e., "r"). Also, we no longer build the MCInst but
rather return just the opcode to get the MCInstrDesc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164979 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 2590c2e1e9e2f2a7f28672c10c2df55566238dfa |
25-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
Rather then have a wrapper function, have tblgen instantiate the implementation.
Also remove an unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164567 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 00796a1b15a83247e19c2445a6ff7a31e72299a4 |
24-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
Rather then have a wrapper function, have tblgen instantiate the implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164548 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| d717a066c6ddaff401b9259579b265eeafb83b6e |
22-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164420 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 1c4ad5ef4fab105f0c8af7edd026e00502fb6279 |
11-Sep-2012 |
Stephen Hines <srhines@google.com> |
Merge branch 'upstream' into merge-2012_09_10
Conflicts:
lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
lib/Support/DynamicLibrary.cpp
lib/Support/LockFileManager.cpp
Change-Id: I91e94c3a7a76e19c688307c5a480a640a3bd2b7e
|
| 1ac4587eb32e639576973b793d465c5d9577bef7 |
10-Sep-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Make helper function static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163504 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 38539ebc2b55d2decec2322efd3360bf61f31da1 |
07-Sep-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
MipsAsmParser: Fix a couple of string use-after-frees and misuses of classof.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163383 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| acbea45573078631e116c2aa91e57d3a9cb2dde1 |
07-Sep-2012 |
Jack Carter <jcarter@mips.com> |
The Mips standalone assembler intial directive support.
Actually these are just stubs for parsing the directives.
Semantic support will come later.
Test cases included
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163364 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| f740d6e328bd10904b079e1ce6583f436d6c9817 |
07-Sep-2012 |
Jack Carter <jcarter@mips.com> |
The Mips standalone assembler fpu instruction support.
Test cases included
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163363 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 35e3aed169aa7fc9c7118f24e5e2a07e25bef512 |
07-Sep-2012 |
David Blaikie <dblaikie@gmail.com> |
Remove unused variable introduced by r163346.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163359 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 6b96c3f71fce6b0a7c380dfc3b7ebf22c40e804b |
06-Sep-2012 |
Jack Carter <jcarter@mips.com> |
The Mips standalone assembler memory instruction support.
This includes sb,sc,sh,sw,lb,lw,lbu,lh,lhu,ll,lw
Test case included
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163346 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| ec65be84cd630d53233e7a37f0ef9d2303ac5153 |
06-Sep-2012 |
Jack Carter <jcarter@mips.com> |
Mips specific llvm assembler support for ALU instructions. This includes
register support. Test case included.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163268 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 5d637d7e93c1f6058c16b41b8ac7dd36c61b4a5c |
05-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
Fix function name per coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163187 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 2cc97def7434345e399e4f5f3f2001d6d7a93c6f |
03-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Asm operands can map to one or more MCOperands. Therefore, add
the NumMCOperands argument to the GetMCInstOperandNum() function that is set
to the number of MCOperands this asm operand mapped to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163124 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| efeaae8578ce9173a47f9e3fa5c44b90ae60c5ab |
03-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163123 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 038f3e31276f8cc86d91d0e4513e1a3ddb8509ba |
03-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Add an interface to the GetMCInstOperandNum() function in the
MCTargetAsmParser class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163122 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| d62cdbe700ab288e9ad447824066edb7d17167d9 |
23-Aug-2012 |
Stephen Hines <srhines@google.com> |
Add new files for Mips + fixups for merge to upstream r162314.
Change-Id: Ib545c0c991575c14b0b74e3b8fd4cc8c789b25d0
ndroid.mk
|
| 31675153bd2d7617db8cb6aeb58054934c7b9f73 |
24-Aug-2012 |
Stephen Hines <srhines@google.com> |
Merge branch 'upstream' into merge_2
Conflicts:
lib/Target/ARM/ARMCodeEmitter.cpp
Change-Id: I6702d340c733e9721499b5d85b13b96ad9c14eb5
|
| 72e9b6aeb48d9496bac9db8b02c88a618b464588 |
17-Aug-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Add stub methods for mips assembly matcher.
Patch by Vladimir Medic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
ipsAsmParser.cpp
|
| 7744acd1ab73b3eec6f1449f47083abe3fb1b527 |
03-Aug-2012 |
Shih-wei Liao <sliao@google.com> |
Merge with LLVM upstream r160668 (Jul 24th 2012)
Conflicts:
include/llvm/Support/ELF.h
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
lib/Support/Memory.cpp
lib/Transforms/Instrumentation/AddressSanitizer.cpp
Change-Id: Iddd658cf2eadc7165b2805b446d31af2c5c9917f
|
| 9d58f935bc95ab3f55936c7a67ff975c3d51cf75 |
16-Jun-2012 |
NAKAMURA Takumi <geek4civic@gmail.com> |
Mips/AsmParser/CMakeLists.txt: Fix dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158602 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 9318a38869458cef6806cf85a7d7d8157101fb9f |
08-May-2012 |
Logan Chien <loganchien@google.com> |
Reconfigure config.h and llvm-config.h.
The config.h and llvm-config.h was out-of-date, and missing
a lot of important #defines.
Change-Id: I1394a2de64915efd56686de4bdb7999cc9705660
ndroid.mk
|
| c5707112e7635d1dd2f2cc9c4f42e79a51302cca |
17-Feb-2012 |
Jia Liu <proljc@gmail.com> |
remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150805 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| 8f5e8c1cd69fa77bea20140a7132ee2dea166c6d |
17-Feb-2012 |
Jia Liu <proljc@gmail.com> |
add Emacs tag and fix some comment error in file headers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150775 91177308-0d34-0410-b5e6-96231b3b80d8
ipsAsmParser.cpp
|
| fddf80459747198d2ee33974c90f6137ea29cbd8 |
11-Jan-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add the skeleton of an asm parser for mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147923 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
LVMBuild.txt
akefile
ipsAsmParser.cpp
|