Cross Reference: /external/mesa3d/src/amd/vulkan/radv

Lines Matching defs:iview
1583 			      struct radv_image_view *iview)
1590 	const struct radeon_surf *surf = &iview->image->surface;
1591 	const struct radeon_surf_level *level_info = &surf->level[iview->base_mip];
1593 	desc = vk_format_description(iview->vk_format);
1597 	va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1602 	va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1603 	va += iview->image->cmask.offset;
1605 	cb->cb_color_cmask_slice = iview->image->cmask.slice_tile_max;
1607 	va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1608 	va += iview->image->dcc_offset;
1611 	cb->cb_color_view = S_028C6C_SLICE_START(iview->base_layer) |
1612 		S_028C6C_SLICE_MAX(iview->base_layer + iview->extent.depth - 1);
1614 	cb->micro_tile_mode = iview->image->surface.micro_tile_mode;
1617 	tile_mode_index = si_tile_mode_index(iview->image, iview->base_mip, false);
1626 	if (iview->image->samples > 1) {
1627 		unsigned log_samples = util_logbase2(iview->image->samples);
1633 	if (iview->image->fmask.size) {
1634 		va = device->ws->buffer_get_va(iview->bo) + iview->image->offset + iview->image->fmask.offset;
1636 			cb->cb_color_pitch |= S_028C64_FMASK_TILE_MAX(iview->image->fmask.pitch_in_pixels / 8 - 1);
1637 		cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(iview->image->fmask.tile_mode_index);
1639 		cb->cb_color_fmask_slice = S_028C88_TILE_MAX(iview->image->fmask.slice_tile_max);
1649 	ntype = radv_translate_color_numformat(iview->vk_format,
1651 					       vk_format_get_first_non_void_channel(iview->vk_format));
1652 	format = radv_translate_colorformat(iview->vk_format);
1655 	swap = radv_translate_colorswap(iview->vk_format, FALSE);
1691 	if (iview->image->samples > 1)
1692 		if (iview->image->fmask.size)
1695 	if (iview->image->cmask.size &&
1699 	if (iview->image->surface.dcc_size && level_info->dcc_enabled)
1704 		if (iview->image->samples > 1) {
1705 			if (iview->image->surface.bpe == 1)
1707 			else if (iview->image->surface.bpe == 2)
1716 	if (!iview->image->fmask.size &&
1718 		unsigned bankh = util_logbase2(iview->image->surface.bankh);
1726 			   struct radv_image_view *iview)
1728 	unsigned level = iview->base_mip;
1731 	const struct radeon_surf_level *level_info = &iview->image->surface.level[level];
1733 	switch (iview->vk_format) {
1754 	format = radv_translate_dbformat(iview->vk_format);
1756 		fprintf(stderr, "Invalid DB format: %d, disabling DB.\n", iview->vk_format);
1759 	va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1761 	z_offs += iview->image->surface.level[level].offset;
1762 	s_offs += iview->image->surface.stencil_level[level].offset;
1764 	ds->db_depth_view = S_028008_SLICE_START(iview->base_layer) |
1765 		S_028008_SLICE_MAX(iview->base_layer + iview->extent.depth - 1);
1769 	if (iview->image->samples > 1)
1770 		ds->db_z_info |= S_028040_NUM_SAMPLES(util_logbase2(iview->image->samples));
1772 	if (iview->image->surface.flags & RADEON_SURF_SBUFFER)
1779 		unsigned tiling_index = iview->image->surface.tiling_index[level];
1780 		unsigned stencil_index = iview->image->surface.stencil_tiling_index[level];
1781 		unsigned macro_index = iview->image->surface.macro_tile_index;
1796 		unsigned tile_mode_index = si_tile_mode_index(iview->image, level, false);
1798 		tile_mode_index = si_tile_mode_index(iview->image, level, true);
1802 	if (iview->image->htile.size && !level) {
1806 		if (iview->image->surface.flags & RADEON_SURF_SBUFFER) {
1818 			if (iview->image->samples <= 1)
1824 		va = device->ws->buffer_get_va(iview->bo) + iview->image->offset +
1825 		     iview->image->htile.offset;
1862 		struct radv_image_view *iview = radv_image_view_from_handle(_iview);
1863 		framebuffer->attachments[i].attachment = iview;
1864 		if (iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT) {
1865 			radv_initialise_color_surface(device, &framebuffer->attachments[i].cb, iview);
1866 		} else if (iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) {
1867 			radv_initialise_ds_surface(device, &framebuffer->attachments[i].ds, iview);