Lines Matching refs:align1
186 /* These are different sizes in align1 vs align16:
2954 const bool align1 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1;
2961 const unsigned mask = align1 ? WRITEMASK_XYZW : WRITEMASK_X;
2966 align1);
3055 const bool align1 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1;
3057 const unsigned mask = devinfo->gen == 7 && !devinfo->is_haswell && !align1 ?
3061 payload, surface, msg_length, 0, align1);
3113 const bool align1 = (brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1);
3115 const unsigned mask = align1 ? WRITEMASK_XYZW : WRITEMASK_X;
3224 const bool align1 = (brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1);
3226 const unsigned mask = (devinfo->gen == 7 && !devinfo->is_haswell && !align1 ?
3458 const bool align1 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1;
3463 brw_set_default_exec_size(p, align1 ? BRW_EXECUTE_1 : BRW_EXECUTE_4);
3468 if ((src.vstride == 0 && (src.hstride == 0 || !align1)) ||
3476 (align1 ? stride(suboffset(src, i), 0, 1, 0) :
3479 if (align1) {
3533 * This instruction is generated as a single-channel align1 instruction by