Lines Matching defs:Is64Bit
88 bool Is64Bit) {
128 const unsigned *CS = Is64Bit ? CallerSavedRegs64Bit : CallerSavedRegs32Bit;
144 bool Is64Bit, const TargetInstrInfo &TII,
149 getSUBriOpcode(Is64Bit, Offset) :
150 getADDriOpcode(Is64Bit, Offset);
156 if (ThisVal == (Is64Bit ? 8 : 4)) {
159 ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
160 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
163 ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
164 : (Is64Bit ? X86::POP64r : X86::POP32r);
367 bool Is64Bit) {
386 const unsigned *CURegs = (Is64Bit ? CU64BitRegs : CU32BitRegs);
439 bool Is64Bit) {
446 const unsigned *CURegs = (Is64Bit ? CU64BitRegs : CU32BitRegs);
472 bool Is64Bit = STI.is64Bit();
478 unsigned OffsetSize = (Is64Bit ? 8 : 4);
480 unsigned PushInstr = (Is64Bit ? X86::PUSH64r : X86::PUSH32r);
482 unsigned MoveInstr = (Is64Bit ? X86::MOV64rr : X86::MOV32rr);
483 unsigned MoveInstrSize = (Is64Bit ? 3 : 2);
484 unsigned SubtractInstr = getSUBriOpcode(Is64Bit, -TailCallReturnAddrDelta);
485 unsigned SubtractInstrIdx = (Is64Bit ? 3 : 2);
487 unsigned StackDivide = (Is64Bit ? 8 : 4);
550 uint32_t RegEnc = encodeCompactUnwindRegistersWithFrame(SavedRegs, Is64Bit);
583 Is64Bit);
609 bool Is64Bit = STI.is64Bit();
638 if (Is64Bit && !Fn->hasFnAttr(Attribute::NoRedZone) &&
656 TII.get(getSUBriOpcode(Is64Bit, -TailCallReturnAddrDelta)),
697 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
726 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr)
751 TII.get(Is64Bit ? X86::AND64ri32 : X86::AND32ri), StackPtr)
813 if (Is64Bit) {
831 assert(!Is64Bit && "EAX is livein in x64 case!");
839 if (Is64Bit) {
853 if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
875 emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit,
887 emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit,
931 bool Is64Bit = STI.is64Bit();
980 TII.get(Is64Bit ? X86::POP64r : X86::POP32r), FramePtr);
1012 emitSPUpdate(MBB, MBBI, StackPtr, NumBytes, Is64Bit, TII, *RegInfo);
1017 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
1021 unsigned Opc = Is64Bit ? X86::LEA64r : X86::LEA32r;
1028 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), StackPtr)
1033 emitSPUpdate(MBB, MBBI, StackPtr, NumBytes, Is64Bit, TII, *RegInfo);
1042 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
1068 emitSPUpdate(MBB, MBBI, StackPtr, Offset, Is64Bit, TII, *RegInfo);
1112 emitSPUpdate(MBB, MBBI, StackPtr, delta, Is64Bit, TII, *RegInfo);
1296 GetScratchRegister(bool Is64Bit, const MachineFunction &MF) {
1297 if (Is64Bit) {
1326 bool Is64Bit = STI.is64Bit();
1331 unsigned ScratchReg = GetScratchRegister(Is64Bit, MF);
1346 if (Is64Bit)
1380 if (Is64Bit) {
1404 if (Is64Bit) {
1428 if (Is64Bit)
1437 if (!Is64Bit)