Searched defs:DestRC (Results 1 - 6 of 6) sorted by relevance
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXInstrInfo.cpp | 38 const TargetRegisterClass *DestRC = MRI.getRegClass(DestReg); local 41 if (DestRC->getSize() != SrcRC->getSize()) 45 if (DestRC == &NVPTX::Int1RegsRegClass) { 47 } else if (DestRC == &NVPTX::Int16RegsRegClass) { 49 } else if (DestRC == &NVPTX::Int32RegsRegClass) { 52 } else if (DestRC == &NVPTX::Int64RegsRegClass) { 55 } else if (DestRC == &NVPTX::Float32RegsRegClass) { 58 } else if (DestRC == &NVPTX::Float64RegsRegClass) {
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/external/llvm/lib/Target/AMDGPU/ |
H A D | SIFoldOperands.cpp | 238 const TargetRegisterClass *DestRC local 243 unsigned MovOp = TII->getMovOpcode(DestRC);
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGFast.cpp | 381 const TargetRegisterClass *DestRC, 386 CopyFromSU->CopyDstRC = DestRC; 389 CopyToSU->CopySrcRC = DestRC; 572 const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC); local 582 if (DestRC != RC) { 584 if (!DestRC && !NewDef) 591 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); 380 InsertCopiesAndMoveSuccs(SUnit *SU, unsigned Reg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC, SmallVector<SUnit*, 2> &Copies) argument
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H A D | ScheduleDAGRRList.cpp | 972 const TargetRegisterClass *DestRC, 977 CopyFromSU->CopyDstRC = DestRC; 980 CopyToSU->CopySrcRC = DestRC; 1211 const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC); local 1221 if (DestRC != RC) { 1223 if (!DestRC && !NewDef) 1229 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); 971 InsertCopiesAndMoveSuccs(SUnit *SU, unsigned Reg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC, SmallVector<SUnit*, 2> &Copies) argument
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGFast.cpp | 388 const TargetRegisterClass *DestRC, 393 CopyFromSU->CopyDstRC = DestRC; 396 CopyToSU->CopySrcRC = DestRC; 583 const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC); local 593 if (DestRC != RC) { 595 if (!DestRC && !NewDef) 602 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); 387 InsertCopiesAndMoveSuccs(SUnit *SU, unsigned Reg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC, SmallVectorImpl<SUnit*> &Copies) argument
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H A D | ScheduleDAGRRList.cpp | 1136 const TargetRegisterClass *DestRC, 1141 CopyFromSU->CopyDstRC = DestRC; 1144 CopyToSU->CopySrcRC = DestRC; 1449 const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC); local 1459 if (DestRC != RC) { 1461 if (!DestRC && !NewDef) 1467 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); 1135 InsertCopiesAndMoveSuccs(SUnit *SU, unsigned Reg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC, SmallVectorImpl<SUnit*> &Copies) argument
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