Searched defs:Dst (Results 1 - 25 of 135) sorted by relevance

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/external/llvm/bindings/ocaml/linker/
H A Dlinker_ocaml.c28 CAMLprim value llvm_link_modules(LLVMModuleRef Dst, LLVMModuleRef Src) { argument
29 if (LLVMLinkModules2(Dst, Src))
/external/skia/tools/
H A Dok.h39 struct Dst { struct
40 virtual ~Dst() {}
53 // Create globals to register your new type of Stream or Dst.
56 Register(const char* name, const char* help, std::unique_ptr<Dst> (*factory)(Options));
58 std::unique_ptr<Dst>(*factory)(Options, std::unique_ptr<Dst>));
/external/clang/lib/Analysis/
H A DCFGReachabilityAnalysis.cpp26 const CFGBlock *Dst) {
28 const unsigned DstBlockID = Dst->getBlockID();
32 mapReachability(Dst);
42 void CFGReverseBlockReachabilityAnalysis::mapReachability(const CFGBlock *Dst) { argument
46 ReachableSet &DstReachability = reachable[Dst->getBlockID()];
51 worklist.push_back(Dst);
61 // Update reachability information for this node -> Dst
63 // Don't insert Dst -> Dst unless it was a predecessor of itself
25 isReachable(const CFGBlock *Src, const CFGBlock *Dst) argument
/external/llvm/include/llvm/Target/
H A DCostTable.h46 MVT::SimpleValueType Dst; member in struct:llvm::TypeConversionCostTblEntry
55 int ISD, MVT Dst, MVT Src) {
59 Dst == Entry.Dst;
54 ConvertCostTableLookup(ArrayRef<TypeConversionCostTblEntry> Tbl, int ISD, MVT Dst, MVT Src) argument
/external/llvm/lib/Target/Lanai/
H A DLanaiSelectionDAGInfo.cpp23 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
22 EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
H A DLanaiFrameLowering.cpp76 unsigned Dst = MI.getOperand(0).getReg(); local
79 BuildMI(*MBB, MI, DL, LII.get(Lanai::ADD_I_LO), Dst)
/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dradeon_variable.h46 struct rc_dst_register Dst; member in struct:rc_variable
/external/swiftshader/src/Shader/
H A DPixelRoutine.hpp43 typedef Shader::DestinationParameter Dst; typedef in class:sw::PixelRoutine
H A DVertexProgram.hpp61 typedef Shader::DestinationParameter Dst; typedef in class:sw::VertexProgram
/external/swiftshader/third_party/LLVM/include/llvm/Transforms/Utils/
H A DBasicBlockUtils.h134 /// SplitCriticalEdge - If an edge from Src to Dst is critical, split the edge
138 inline BasicBlock *SplitCriticalEdge(BasicBlock *Src, BasicBlock *Dst, argument
146 if (TI->getSuccessor(i) == Dst)
/external/llvm/lib/Target/Hexagon/
H A DHexagonSelectionDAGInfo.cpp21 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
38 Entry.Node = Dst;
20 EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
H A DHexagonPeephole.cpp105 void ChangeOpInto(MachineOperand &Dst, MachineOperand &Src);
140 MachineOperand &Dst = MI.getOperand(0); local
142 unsigned DstReg = Dst.getReg();
158 MachineOperand &Dst = MI.getOperand(0); local
163 unsigned DstReg = Dst.getReg();
175 MachineOperand &Dst = MI.getOperand(0); local
180 unsigned DstReg = Dst.getReg();
189 MachineOperand &Dst = MI.getOperand(0); local
191 unsigned DstReg = Dst.getReg();
207 MachineOperand &Dst local
300 ChangeOpInto(MachineOperand &Dst, MachineOperand &Src) argument
[all...]
H A DRDFCopy.cpp33 const MachineOperand &Dst = MI->getOperand(0); local
35 RegisterRef DstR = { Dst.getReg(), Dst.getSubReg() };
58 const MachineOperand &Dst = MI->getOperand(0); local
59 RegisterRef DefR = { Dst.getReg(), Dst.getSubReg() };
/external/llvm/lib/Target/XCore/
H A DXCoreSelectionDAGInfo.cpp20 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
31 Entry.Node = Dst; Args.push_back(Entry);
19 EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
/external/libchrome/base/numerics/
H A Dsafe_conversions.h20 template <typename Dst, typename Src>
22 return internal::DstRangeRelationToSrcRange<Dst>(value) ==
47 template <typename Dst, typename Src>
48 inline Dst checked_cast(Src value) {
49 CHECK(IsValueInRangeForNumericType<Dst>(value));
50 return static_cast<Dst>(value);
73 template <typename Dst, class NaNHandler, typename Src>
74 constexpr Dst saturated_cast_impl(const Src value,
77 ? static_cast<Dst>(value)
79 ? std::numeric_limits<Dst>
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/external/llvm/include/llvm/Transforms/Utils/
H A DBasicBlockUtils.h148 /// If an edge from Src to Dst is critical, split the edge and return true,
152 SplitCriticalEdge(BasicBlock *Src, BasicBlock *Dst, argument
159 if (TI->getSuccessor(i) == Dst)
/external/llvm/lib/Target/AArch64/
H A DAArch64SelectionDAGInfo.cpp20 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
39 Entry.Node = Dst;
19 EmitTargetCodeForMemset( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
/external/llvm/lib/Target/AMDGPU/
H A DSILowerI1Copies.cpp95 const MachineOperand &Dst = MI.getOperand(0); local
99 !TargetRegisterInfo::isVirtualRegister(Dst.getReg()))
102 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst.getReg());
107 I1Defs.push_back(Dst.getReg());
113 I1Defs.push_back(Dst.getReg());
119 .addOperand(Dst)
127 .addOperand(Dst)
135 .addOperand(Dst)
/external/swiftshader/third_party/LLVM/lib/CodeGen/AsmPrinter/
H A DAsmPrinterDwarf.cpp213 const MachineLocation &Dst = Move.getDestination(); local
217 if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
226 assert(Dst.isReg() && "Machine move not supported yet.");
227 OutStreamer.EmitCFIDefCfaRegister(RI->getDwarfRegNum(Dst.getReg(), true));
229 assert(!Dst.isReg() && "Machine move not supported yet.");
231 Dst.getOffset());
/external/llvm/lib/IR/
H A DGCOV.cpp181 uint32_t Dst; local
182 if (!Buff.readInt(Dst))
184 Edges.push_back(make_unique<GCOVEdge>(*Blocks[BlockNo], *Blocks[Dst]));
187 Blocks[Dst]->addSrcEdge(Edge);
384 if (!DstEdges[DstEdgeNo]->Dst.getNumDstEdges())
385 DstEdges[DstEdgeNo]->Dst.Counter += N;
416 dbgs() << Edge->Dst.Number << " (" << Edge->Count << "), ";
/external/llvm/lib/Support/
H A DConvertUTFWrapper.cpp118 UTF8 *Dst = reinterpret_cast<UTF8 *>(&Out[0]); local
119 UTF8 *DstEnd = Dst + Out.size();
122 ConvertUTF16toUTF8(&Src, SrcEnd, &Dst, DstEnd, strictConversion);
130 Out.resize(reinterpret_cast<char *>(Dst) - &Out[0]);
163 UTF16 *Dst = &DstUTF16[0]; local
164 UTF16 *DstEnd = Dst + DstUTF16.size();
167 ConvertUTF8toUTF16(&Src, SrcEnd, &Dst, DstEnd, strictConversion);
175 DstUTF16.resize(Dst - &DstUTF16[0]);
/external/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUAsmBackend.cpp105 uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset()); local
106 *Dst = BrImm;
/external/pdfium/third_party/base/numerics/
H A Dsafe_conversions.h53 template <typename Dst, typename Src>
55 return internal::DstRangeRelationToSrcRange<Dst>(value).IsValid();
74 template <typename Dst, class CheckHandler = CheckOnFailure, typename Src>
75 constexpr Dst checked_cast(Src value) {
79 return IsValueInRangeForNumericType<Dst, SrcType>(value)
80 ? static_cast<Dst>(static_cast<SrcType>(value))
81 : CheckHandler::template HandleFailure<Dst>();
108 template <typename Dst, template <typename> class S, typename Src>
109 constexpr Dst saturated_cast_impl(Src value, RangeCheck constraint) {
113 ? (!constraint.IsUnderflowFlagSet() ? static_cast<Dst>(valu
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp31 SDValue Dst, SDValue Src,
79 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
128 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
143 SDValue Chain, SDValue Dst,
158 Entry.Node = Dst;
29 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
142 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
H A DPTXSelectionDAGInfo.cpp31 SDValue Dst, SDValue Src,
82 DAG.getNode(ISD::ADD, dl, PointerType, Dst,
131 DAG.getNode(ISD::ADD, dl, PointerType, Dst,
143 SDValue Chain, SDValue Dst,
29 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
142 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument

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