Searched defs:DstHi (Results 1 - 5 of 5) sorted by relevance
/external/llvm/lib/Target/Mips/ |
H A D | MipsSEFrameLowering.cpp | 249 unsigned DstHi = RegInfo.getSubReg(Dst, Mips::sub_hi); local 256 BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstHi)
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H A D | MipsSEInstrInfo.cpp | 575 unsigned DstHi = getRegisterInfo().getSubReg(DstReg, Mips::sub_hi); local 577 HiInst.addReg(DstHi, RegState::Define);
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/external/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.cpp | 859 unsigned DstHi = RI.getSubReg(Dst, AMDGPU::sub1); local 869 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstHi) 877 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstHi) 888 unsigned DstHi = RI.getSubReg(Dst, AMDGPU::sub1); local 898 BuildMI(MBB, MI, DL, get(AMDGPU::V_CNDMASK_B32_e64), DstHi)
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonFrameLowering.cpp | 1604 unsigned DstHi = HRI.getSubReg(DstR, Hexagon::subreg_hireg); local 1635 BuildMI(B, It, DL, HII.get(LoadOpc), DstHi)
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H A D | HexagonInstrInfo.cpp | 847 unsigned DstHi = HRI.getSubReg(DestReg, Hexagon::subreg_hireg); local 848 BuildMI(MBB, I, DL, get(Hexagon::V6_pred_and), DstHi)
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