Searched defs:Inst (Results 1 - 25 of 285) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/MC/
H A DMCInstrAnalysis.cpp13 uint64_t MCInstrAnalysis::evaluateBranch(const MCInst &Inst, uint64_t Addr, argument
15 if (Inst.getNumOperands() == 0 ||
16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL)
19 int64_t Imm = Inst.getOperand(0).getImm();
/external/llvm/lib/MC/
H A DMCInstrAnalysis.cpp13 bool MCInstrAnalysis::evaluateBranch(const MCInst &Inst, uint64_t Addr, argument
15 if (Inst.getNumOperands() == 0 ||
16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL)
19 int64_t Imm = Inst.getOperand(0).getImm();
/external/swiftshader/third_party/LLVM/lib/MC/MCDisassembler/
H A DEDOperand.h36 const EDInst &Inst; member in struct:llvm::EDOperand
/external/clang/test/Parser/
H A Dcxx-default-args.cpp10 typedef struct Inst { struct
/external/llvm/include/llvm/MC/
H A DMCInstBuilder.h23 MCInst Inst; member in class:llvm::MCInstBuilder
28 Inst.setOpcode(Opcode);
33 Inst.addOperand(MCOperand::createReg(Reg));
39 Inst.addOperand(MCOperand::createImm(Val));
45 Inst.addOperand(MCOperand::createFPImm(Val));
51 Inst.addOperand(MCOperand::createExpr(Val));
57 Inst.addOperand(MCOperand::createInst(Val));
63 Inst.addOperand(Op);
68 return Inst;
/external/llvm/lib/Analysis/
H A DIndirectCallPromotionAnalysis.cpp74 const Instruction *Inst, uint32_t NumVals, uint64_t TotalCount) {
77 DEBUG(dbgs() << " \nWork on callsite " << *Inst << " Num_targets: " << NumVals
73 getProfitablePromotionCandidates( const Instruction *Inst, uint32_t NumVals, uint64_t TotalCount) argument
H A DOrderedBasicBlock.cpp37 const Instruction *Inst = nullptr; local
49 Inst = cast<Instruction>(II);
50 NumberedInsts[Inst] = NextInstPos++;
51 if (Inst == A || Inst == B)
56 assert((Inst == A || Inst == B) && "Should find A or B");
58 return Inst == A;
H A DDelinearization.cpp72 static Value *getPointerOperand(Instruction &Inst) { argument
73 if (LoadInst *Load = dyn_cast<LoadInst>(&Inst))
75 else if (StoreInst *Store = dyn_cast<StoreInst>(&Inst))
77 else if (GetElementPtrInst *Gep = dyn_cast<GetElementPtrInst>(&Inst))
85 Instruction *Inst = &(*I); local
88 if (!isa<StoreInst>(Inst) && !isa<LoadInst>(Inst) &&
89 !isa<GetElementPtrInst>(Inst))
92 const BasicBlock *BB = Inst->getParent();
96 const SCEV *AccessFn = SE->getSCEVAtScope(getPointerOperand(*Inst),
106 O << "Inst:" << *Inst << "\\n"; local
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/external/llvm/lib/MC/MCDisassembler/
H A DMCDisassembler.cpp19 bool MCDisassembler::tryAddingSymbolicOperand(MCInst &Inst, int64_t Value, argument
25 return Symbolizer->tryAddingSymbolicOperand(Inst, cStream, Value, Address,
/external/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64TargetStreamer.cpp41 void AArch64TargetStreamer::emitInst(uint32_t Inst) {} argument
/external/llvm/lib/Target/Mips/
H A DMipsAnalyzeImmediate.h19 struct Inst { struct in class:llvm::MipsAnalyzeImmediate
21 Inst(unsigned Opc, unsigned ImmOpnd);
23 typedef SmallVector<Inst, 7 > InstSeq;
33 void AddInstr(InstSeqLs &SeqLs, const Inst &I);
H A DMipsOs16.cpp82 const Instruction &Inst = *I; local
83 switch (Inst.getOpcode()) {
H A DMipsAnalyzeImmediate.cpp15 MipsAnalyzeImmediate::Inst::Inst(unsigned O, unsigned I) : Opc(O), ImmOpnd(I) {} function in class:MipsAnalyzeImmediate::Inst
18 void MipsAnalyzeImmediate::AddInstr(InstSeqLs &SeqLs, const Inst &I) {
32 AddInstr(SeqLs, Inst(ADDiu, Imm & 0xffffULL));
38 AddInstr(SeqLs, Inst(ORi, Imm & 0xffffULL));
45 AddInstr(SeqLs, Inst(SLL, Shamt));
58 AddInstr(SeqLs, Inst(ADDiu, MaskedImm));
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblyOptimizeReturned.cpp58 Instruction *Inst = CS.getInstruction(); local
66 if (DT->dominates(Inst, U))
67 U.set(Inst);
/external/llvm/lib/Transforms/ObjCARC/
H A DDependencyAnalysis.h62 Depends(DependenceKind Flavor, Instruction *Inst, const Value *Arg,
67 bool CanUse(const Instruction *Inst, const Value *Ptr, ProvenanceAnalysis &PA,
72 bool CanAlterRefCount(const Instruction *Inst, const Value *Ptr,
75 /// Returns true if we can not conservatively prove that Inst can not decrement
77 bool CanDecrementRefCount(const Instruction *Inst, const Value *Ptr,
80 static inline bool CanDecrementRefCount(const Instruction *Inst, argument
83 return CanDecrementRefCount(Inst, Ptr, PA, GetARCInstKind(Inst));
H A DObjCARCExpand.cpp97 Instruction *Inst = &*I; local
99 DEBUG(dbgs() << "ObjCARCExpand: Visiting: " << *Inst << "\n");
101 switch (GetBasicARCInstKind(Inst)) {
113 Value *Value = cast<CallInst>(Inst)->getArgOperand(0);
114 DEBUG(dbgs() << "ObjCARCExpand: Old = " << *Inst << "\n"
116 Inst->replaceAllUsesWith(Value);
H A DObjCARCAPElim.cpp96 Instruction *Inst = &*I++; local
97 switch (GetBasicARCInstKind(Inst)) {
99 Push = Inst;
104 if (Push && cast<CallInst>(Inst)->getArgOperand(0) == Push) {
108 " Pop: " << *Inst << "\n"
110 Inst->eraseFromParent();
116 if (MayAutorelease(ImmutableCallSite(Inst)))
/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dradeon_variable.h48 struct rc_instruction * Inst; member in struct:rc_variable
/external/llvm/lib/Transforms/Scalar/
H A DDCE.cpp12 // Dead Inst Elimination performs a single pass over the function removing
51 Instruction *Inst = &*DI++; variable
52 if (isInstructionTriviallyDead(Inst, TLI)) {
53 Inst->eraseFromParent();
/external/swiftshader/third_party/LLVM/include/llvm/MC/
H A DMCTargetAsmParser.h95 virtual unsigned checkTargetMatchPredicate(MCInst &Inst) { argument
/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/
H A DDCE.cpp12 // Dead Inst Elimination performs a single pass over the function removing
43 Instruction *Inst = DI++; local
44 if (isInstructionTriviallyDead(Inst)) {
45 Inst->eraseFromParent();
/external/llvm/include/llvm/Analysis/
H A DMemoryLocation.h70 static MemoryLocation get(const Instruction *Inst) { argument
71 if (auto *I = dyn_cast<LoadInst>(Inst))
73 else if (auto *I = dyn_cast<StoreInst>(Inst))
75 else if (auto *I = dyn_cast<VAArgInst>(Inst))
77 else if (auto *I = dyn_cast<AtomicCmpXchgInst>(Inst))
79 else if (auto *I = dyn_cast<AtomicRMWInst>(Inst))
/external/llvm/lib/Object/
H A DRecordStreamer.cpp76 void RecordStreamer::EmitInstruction(const MCInst &Inst, argument
78 MCStreamer::EmitInstruction(Inst, STI);
/external/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsELFStreamer.cpp18 void MipsELFStreamer::EmitInstruction(const MCInst &Inst, argument
20 MCELFStreamer::EmitInstruction(Inst, STI);
25 for (unsigned OpIndex = 0; OpIndex < Inst.getNumOperands(); ++OpIndex) {
26 const MCOperand &Op = Inst.getOperand(OpIndex);
/external/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp77 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, argument
83 Inst.addOperand(MCOperand::createReg(RegNo));
87 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
90 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs, 16);
93 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
96 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs, 16);
99 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
102 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR64Regs, 16);
105 static DecodeStatus DecodeGR128BitRegisterClass(MCInst &Inst, uint64_t RegNo,
108 return decodeRegisterClass(Inst, RegN
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